****** START compiling Program:Main() (MethodHash=cb019401)
Generating code for Windows x64
OPTIONS: compCodeOpt = BLENDED_CODE
OPTIONS: compDbgCode = false
OPTIONS: compDbgInfo = true
OPTIONS: compDbgEnC  = false
OPTIONS: compProcedureSplitting   = false
OPTIONS: compProcedureSplittingEH = false
OPTIONS: No PGO data
IL to import:
IL_0000  73 09 00 00 06    newobj       0x6000009
IL_0005  80 08 00 00 04    stsfld       0x4000008
IL_000a  7f 0a 00 00 04    ldsflda      0x400000A
IL_000f  7b 07 00 00 04    ldfld        0x4000007
IL_0014  0a                stloc.0     
IL_0015  12 01             ldloca.s     0x1
IL_0017  fe 15 05 00 00 02 initobj      0x2000005
IL_001d  7f 0a 00 00 04    ldsflda      0x400000A
IL_0022  7c 07 00 00 04    ldflda       0x4000007
IL_0027  7b 03 00 00 04    ldfld        0x4000003
IL_002c  0c                stloc.2     
IL_002d  17                ldc.i4.1    
IL_002e  8d 07 00 00 01    newarr       0x1000007
IL_0033  0d                stloc.3     
IL_0034  07                ldloc.1     
IL_0035  06                ldloc.0     
IL_0036  7b 02 00 00 04    ldfld        0x4000002
IL_003b  08                ldloc.2     
IL_003c  09                ldloc.3     
IL_003d  06                ldloc.0     
IL_003e  16                ldc.i4.0    
IL_003f  28 04 00 00 06    call         0x6000004
IL_0044  67                conv.i1     
IL_0045  17                ldc.i4.1    
IL_0046  28 05 00 00 06    call         0x6000005
IL_004b  2a                ret         

lvaSetClass: setting class for V03 to (00007FF93744E2D8) short[] 

lvaGrabTemp returning 4 (V04 tmp0) (a long lifetime temp) called for OutgoingArgSpace.
; Initial local variable assignments
;
;  V00 loc0           struct <S0, 24>
;  V01 loc1           struct <S1, 24>
;  V02 loc2              int 
;  V03 loc3              ref  class-hnd
;  V04 OutArgs        lclBlk <na>  "OutgoingArgSpace"
*************** In compInitDebuggingInfo() for Program:Main()
getVars() returned cVars = 0, extendOthers = true
info.compVarScopesCount = 4
    	VarNum 	LVNum 	      Name 	Beg 	End
 0: 	00h 	00h 	  V00 loc0 	000h   	04Ch
 1: 	01h 	01h 	  V01 loc1 	000h   	04Ch
 2: 	02h 	02h 	  V02 loc2 	000h   	04Ch
 3: 	03h 	03h 	  V03 loc3 	000h   	04Ch
info.compStmtOffsetsCount    = 0
info.compStmtOffsetsImplicit = 0005h ( STACK_EMPTY CALL_SITE )
*************** In fgFindBasicBlocks() for Program:Main()
Marked V00 as a single def local
Marked V02 as a single def local
Marked V03 as a single def local
Jump targets:
  none
New Basic Block BB01 [0000] created.
BB01 [000..04C)
IL Code Size,Instr   76,  26, Basic Block count   1, Local Variable Num,Ref count   5,  9 for method Program:Main()
OPTIONS: opts.MinOpts() == false
Basic block list for 'Program:Main()'

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     
-----------------------------------------------------------------------------------------------------------------------------------------

*************** Starting PHASE Pre-import

*************** Finishing PHASE Pre-import
Trees after Pre-import

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..04C) (return), preds={} succs={}

-------------------------------------------------------------------------------------------------------------------

*************** Starting PHASE Profile incorporation
BBOPT set, but no profile data available (hr=80004001)

*************** Finishing PHASE Profile incorporation [no changes]

*************** Starting PHASE Importation
*************** In impImport() for Program:Main()

impImportBlockPending for BB01

Importing BB01 (PC=000) of 'Program:Main()'
    [ 0]   0 (0x000) newobj
lvaGrabTemp returning 5 (V05 tmp1) called for NewObj constructor temp.


STMT00000 ( 0x000[E-] ... ??? )
               [000003] -A---------                         ▌  ASG       ref   
               [000002] D------N---                         ├──▌  LCL_VAR   ref    V05 tmp1         
               [000001] -----------                         └──▌  ALLOCOBJ  ref   
               [000000] H----------                            └──▌  CNS_INT(h) long   0x7ff93744e858 class
Marked V05 as a single def local

lvaSetClass: setting class for V05 to (00007FF93744E858) Runtime  [exact]
 06000009
In Compiler::impImportCall: opcode is newobj, kind=0, callRetType is void, structSize is 0
INLINER: during 'impMarkInlineCandidate' result 'CheckCanInline Success' reason 'CheckCanInline Success' for 'Program:Main()' calling 'Runtime:.ctor():this'
INLINER: during 'impMarkInlineCandidate' result 'CheckCanInline Success' reason 'CheckCanInline Success'


STMT00001 ( ??? ... ??? )
               [000005] I-C-G------                         ▌  CALL      void   Runtime:.ctor():this (exactContextHnd=0x00007FF93744E859)
               [000004] ----------- this                    └──▌  LCL_VAR   ref    V05 tmp1         

    [ 1]   5 (0x005) stsfld 04000008

STMT00002 ( 0x005[--] ... ??? )
               [000013] H-CXG------                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000011] ----------- arg0                    ├──▌  CNS_INT   long   0x7ff9372b1818
               [000012] ----------- arg1                    └──▌  CNS_INT   int    5


STMT00003 ( ??? ... ??? )
               [000009] -A--G------                         ▌  ASG       ref   
               [000008] h---G--N---                         ├──▌  IND       ref   
               [000007] I----------                         │  └──▌  CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt]
               [000006] -----------                         └──▌  LCL_VAR   ref    V05 tmp1         

    [ 0]  10 (0x00a) ldsflda 0400000A
    [ 1]  15 (0x00f) ldfld 04000007
    [ 1]  20 (0x014) stloc.0

STMT00004 ( 0x00A[E-] ... ??? )
               [000025] -ACXG------                         ▌  ASG       struct (copy)
               [000024] D------N---                         ├──▌  LCL_VAR   struct<S0, 24> V00 loc0         
               [000023] --CXG------                         └──▌  FIELD     struct S1:F2
               [000022] --CXG------                            └──▌  COMMA     byref 
               [000021] H-CXG------                               ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000019] ----------- arg0                          │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000020] ----------- arg1                          │  └──▌  CNS_INT   int    5
               [000017] -----------                               └──▌  ADD       byref 
               [000015] #----------                                  ├──▌  IND       ref   
               [000014] I----------                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000016] -----------                                  └──▌  CNS_INT   long   8 Fseq[s_2]

    [ 0]  21 (0x015) ldloca.s 1
    [ 1]  23 (0x017) initobj 02000005

STMT00005 ( 0x015[E-] ... ??? )
               [000029] IA---------                         ▌  ASG       struct (init)
               [000027] D------N---                         ├──▌  LCL_VAR   struct<S1, 24> V01 loc1         
               [000028] -----------                         └──▌  CNS_INT   int    0

    [ 0]  29 (0x01d) ldsflda 0400000A
    [ 1]  34 (0x022) ldflda 04000007
    [ 1]  39 (0x027) ldfld 04000003
    [ 1]  44 (0x02c) stloc.2

STMT00006 ( 0x01D[E-] ... ??? )
               [000042] -ACXG------                         ▌  ASG       int   
               [000041] D------N---                         ├──▌  LCL_VAR   int    V02 loc2         
               [000040] --CXG------                         └──▌  FIELD     int    S0:F4
               [000039] --CXG------                            └──▌  FIELD_ADDR byref  S1:F2
               [000038] --CXG------                               └──▌  COMMA     byref 
               [000037] H-CXG------                                  ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000035] ----------- arg0                             │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000036] ----------- arg1                             │  └──▌  CNS_INT   int    5
               [000033] -----------                                  └──▌  ADD       byref 
               [000031] #----------                                     ├──▌  IND       ref   
               [000030] I----------                                     │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000032] -----------                                     └──▌  CNS_INT   long   8 Fseq[s_2]

    [ 0]  45 (0x02d) ldc.i4.1 1
    [ 1]  46 (0x02e) newarr 01000007
    [ 1]  51 (0x033) stloc.3
lvaUpdateClass: Updating class for V03 from (00007FF93744E2D8) short[] to (00007FF93744E2D8) short[] [exact]


STMT00007 ( 0x02D[E-] ... ??? )
               [000047] -ACXG------                         ▌  ASG       ref   
               [000046] D------N---                         ├──▌  LCL_VAR   ref    V03 loc3         
               [000045] --CXG------                         └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC
               [000044] H---------- arg0                       ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class
               [000043] ----------- arg1                       └──▌  CNS_INT   long   1

    [ 0]  52 (0x034) ldloc.1
    [ 1]  53 (0x035) ldloc.0
    [ 2]  54 (0x036) ldfld 04000002
    [ 2]  59 (0x03b) ldloc.2
    [ 3]  60 (0x03c) ldloc.3
    [ 4]  61 (0x03d) ldloc.0
    [ 5]  62 (0x03e) ldc.i4.0 0
    [ 6]  63 (0x03f) call 06000004
In Compiler::impImportCall: opcode is call, kind=0, callRetType is long, structSize is 0
Calling impNormStructVal on:
               [000054] -----------                         ▌  LCL_VAR   struct<S0, 24> V00 loc0         
resulting tree:
               [000058] n----------                         ▌  OBJ       struct<S0, 24>
               [000057] -----------                         └──▌  LCL_VAR_ADDR byref  V00 loc0         
INLINER: during 'impMarkInlineCandidate' result 'CheckCanInline Success' reason 'CheckCanInline Success' for 'Program:Main()' calling 'Program:M23(S0,ushort):ulong'
INLINER: during 'impMarkInlineCandidate' result 'CheckCanInline Success' reason 'CheckCanInline Success'

lvaGrabTemp returning 6 (V06 tmp2) called for impAppendStmt.


STMT00009 ( 0x034[E-] ... ??? )
               [000060] -A---------                         ▌  ASG       struct (copy)
               [000059] D------N---                         ├──▌  LCL_VAR   struct<S1, 24> V06 tmp2         
               [000048] -----------                         └──▌  LCL_VAR   struct<S1, 24> V01 loc1         


STMT00008 ( 0x034[E-] ... ??? )
               [000056] I-C-G------                         ▌  CALL      long   Program:M23(S0,ushort):ulong (exactContextHnd=0x00007FF9372B3AF1)
               [000058] n---------- arg0                    ├──▌  OBJ       struct<S0, 24>
               [000057] -----------                         │  └──▌  LCL_VAR_ADDR byref  V00 loc0         
               [000055] ----------- arg1                    └──▌  CNS_INT   int    0

    [ 5]  68 (0x044) conv.i1
    [ 5]  69 (0x045) ldc.i4.1 1
    [ 6]  70 (0x046) call 06000005
 (Implicit Tail call: prefixFlags |= PREFIX_TAILCALL_IMPLICIT)
In Compiler::impImportCall: opcode is call, kind=0, callRetType is void, structSize is 0
Calling impNormStructVal on:
               [000061] -----------                         ▌  LCL_VAR   struct<S1, 24> V06 tmp2         
resulting tree:
               [000067] n----------                         ▌  OBJ       struct<S1, 24>
               [000066] -----------                         └──▌  LCL_VAR_ADDR byref  V06 tmp2         

info.compCompHnd->canTailCall returned false for call [000065]
INLINER: during 'impMarkInlineCandidate' result 'CheckCanInline Success' reason 'CheckCanInline Success' for 'Program:Main()' calling 'Program:M24(S1,ubyte,uint,short[],byte,ushort)'
INLINER: during 'impMarkInlineCandidate' result 'CheckCanInline Success' reason 'CheckCanInline Success'


STMT00010 ( ??? ... ??? )
               [000065] I-C-G------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort) (exactContextHnd=0x00007FF9372B3AF1)
               [000067] n---------- arg0                    ├──▌  OBJ       struct<S1, 24>
               [000066] -----------                         │  └──▌  LCL_VAR_ADDR byref  V06 tmp2         
               [000051] ----------- arg1                    ├──▌  FIELD     ubyte  S0:F3
               [000050] -----------                         │  └──▌  LCL_VAR_ADDR byref  V00 loc0         
               [000052] ----------- arg2                    ├──▌  LCL_VAR   int    V02 loc2         
               [000053] ----------- arg3                    ├──▌  LCL_VAR   ref    V03 loc3         
               [000063] --C-------- arg4                    ├──▌  CAST      int <- byte <- long
               [000062] --C--------                         │  └──▌  RET_EXPR  long  (for [000056])
               [000064] ----------- arg5                    └──▌  CNS_INT   int    1

    [ 0]  75 (0x04b) ret

STMT00011 ( 0x04B[E-] ... ??? )
               [000068] -----------                         ▌  RETURN    void  

*************** Finishing PHASE Importation
Trees after Importation

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..04C) (return), preds={} succs={}

***** BB01
STMT00000 ( 0x000[E-] ... 0x005 )
               [000003] -A---------                         ▌  ASG       ref   
               [000002] D------N---                         ├──▌  LCL_VAR   ref    V05 tmp1         
               [000001] -----------                         └──▌  ALLOCOBJ  ref   
               [000000] H----------                            └──▌  CNS_INT(h) long   0x7ff93744e858 class

***** BB01
STMT00001 ( ??? ... ??? )
               [000005] I-C-G------                         ▌  CALL      void   Runtime:.ctor():this (exactContextHnd=0x00007FF93744E859)
               [000004] ----------- this                    └──▌  LCL_VAR   ref    V05 tmp1         

***** BB01
STMT00002 ( 0x005[--] ... ??? )
               [000013] H-CXG------                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000011] ----------- arg0                    ├──▌  CNS_INT   long   0x7ff9372b1818
               [000012] ----------- arg1                    └──▌  CNS_INT   int    5

***** BB01
STMT00003 ( ??? ... ??? )
               [000009] -A--G------                         ▌  ASG       ref   
               [000008] h---G--N---                         ├──▌  IND       ref   
               [000007] I----------                         │  └──▌  CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt]
               [000006] -----------                         └──▌  LCL_VAR   ref    V05 tmp1         

***** BB01
STMT00004 ( 0x00A[E-] ... 0x014 )
               [000025] -ACXG------                         ▌  ASG       struct (copy)
               [000024] D------N---                         ├──▌  LCL_VAR   struct<S0, 24> V00 loc0         
               [000023] --CXG------                         └──▌  FIELD     struct S1:F2
               [000022] --CXG------                            └──▌  COMMA     byref 
               [000021] H-CXG------                               ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000019] ----------- arg0                          │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000020] ----------- arg1                          │  └──▌  CNS_INT   int    5
               [000017] -----------                               └──▌  ADD       byref 
               [000015] #----------                                  ├──▌  IND       ref   
               [000014] I----------                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000016] -----------                                  └──▌  CNS_INT   long   8 Fseq[s_2]

***** BB01
STMT00005 ( 0x015[E-] ... 0x018 )
               [000029] IA---------                         ▌  ASG       struct (init)
               [000027] D------N---                         ├──▌  LCL_VAR   struct<S1, 24> V01 loc1         
               [000028] -----------                         └──▌  CNS_INT   int    0

***** BB01
STMT00006 ( 0x01D[E-] ... 0x02C )
               [000042] -ACXG------                         ▌  ASG       int   
               [000041] D------N---                         ├──▌  LCL_VAR   int    V02 loc2         
               [000040] --CXG------                         └──▌  FIELD     int    S0:F4
               [000039] --CXG------                            └──▌  FIELD_ADDR byref  S1:F2
               [000038] --CXG------                               └──▌  COMMA     byref 
               [000037] H-CXG------                                  ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000035] ----------- arg0                             │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000036] ----------- arg1                             │  └──▌  CNS_INT   int    5
               [000033] -----------                                  └──▌  ADD       byref 
               [000031] #----------                                     ├──▌  IND       ref   
               [000030] I----------                                     │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000032] -----------                                     └──▌  CNS_INT   long   8 Fseq[s_2]

***** BB01
STMT00007 ( 0x02D[E-] ... 0x033 )
               [000047] -ACXG------                         ▌  ASG       ref   
               [000046] D------N---                         ├──▌  LCL_VAR   ref    V03 loc3         
               [000045] --CXG------                         └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC
               [000044] H---------- arg0                       ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class
               [000043] ----------- arg1                       └──▌  CNS_INT   long   1

***** BB01
STMT00009 ( 0x034[E-] ... 0x04B )
               [000060] -A---------                         ▌  ASG       struct (copy)
               [000059] D------N---                         ├──▌  LCL_VAR   struct<S1, 24> V06 tmp2         
               [000048] -----------                         └──▌  LCL_VAR   struct<S1, 24> V01 loc1         

***** BB01
STMT00008 ( 0x034[E-] ... ??? )
               [000056] I-C-G------                         ▌  CALL      long   Program:M23(S0,ushort):ulong (exactContextHnd=0x00007FF9372B3AF1)
               [000058] n---------- arg0                    ├──▌  OBJ       struct<S0, 24>
               [000057] -----------                         │  └──▌  LCL_VAR_ADDR byref  V00 loc0         
               [000055] ----------- arg1                    └──▌  CNS_INT   int    0

***** BB01
STMT00010 ( ??? ... ??? )
               [000065] I-C-G------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort) (exactContextHnd=0x00007FF9372B3AF1)
               [000067] n---------- arg0                    ├──▌  OBJ       struct<S1, 24>
               [000066] -----------                         │  └──▌  LCL_VAR_ADDR byref  V06 tmp2         
               [000051] ----------- arg1                    ├──▌  FIELD     ubyte  S0:F3
               [000050] -----------                         │  └──▌  LCL_VAR_ADDR byref  V00 loc0         
               [000052] ----------- arg2                    ├──▌  LCL_VAR   int    V02 loc2         
               [000053] ----------- arg3                    ├──▌  LCL_VAR   ref    V03 loc3         
               [000063] --C-------- arg4                    ├──▌  CAST      int <- byte <- long
               [000062] --C--------                         │  └──▌  RET_EXPR  long  (for [000056])
               [000064] ----------- arg5                    └──▌  CNS_INT   int    1

***** BB01
STMT00011 ( 0x04B[E-] ... ??? )
               [000068] -----------                         ▌  RETURN    void  

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckLoopTable: loop table not valid

*************** Starting PHASE Expand patchpoints

 -- no patchpoints to transform

*************** Finishing PHASE Expand patchpoints [no changes]

*************** Starting PHASE Indirect call transform

 -- no candidates to transform

*************** Finishing PHASE Indirect call transform [no changes]

*************** Starting PHASE Post-import

*************** Finishing PHASE Post-import [no changes]

*************** Starting PHASE Morph - Init

New BlockSet epoch 1, # of blocks (including unused BB00): 2, bitset array size: 1 (short)

*************** Finishing PHASE Morph - Init [no changes]

*************** Starting PHASE Morph - Inlining
*************** In fgDebugCheckBBlist
Expanding INLINE_CANDIDATE in statement STMT00001 in BB01:
STMT00001 ( ??? ... ??? )
               [000005] I-C-G------                         ▌  CALL      void   Runtime:.ctor():this (exactContextHnd=0x00007FF93744E859)
               [000004] ----------- this                    └──▌  LCL_VAR   ref    V05 tmp1         
thisArg: is a local var
               [000004] -----------                         ▌  LCL_VAR   ref    V05 tmp1         

INLINER: inlineInfo.tokenLookupContextHandle for Runtime:.ctor():this set to 0x00007FF93744E859:

Invoking compiler for the inlinee method Runtime:.ctor():this :
IL to import:
IL_0000  02                ldarg.0     
IL_0001  28 04 00 00 0a    call         0xA000004
IL_0006  2a                ret         

INLINER impTokenLookupContextHandle for Runtime:.ctor():this is 0x00007FF93744E859.
*************** In compInitDebuggingInfo() for Runtime:.ctor():this
info.compStmtOffsetsCount    = 0
info.compStmtOffsetsImplicit = 0005h ( STACK_EMPTY CALL_SITE )
*************** In fgFindBasicBlocks() for Runtime:.ctor():this
Jump targets:
  none
New Basic Block BB02 [0001] created.
BB02 [000..007)
Basic block list for 'Runtime:.ctor():this'

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB02 [0001]  1                             1       [000..007)        (return)                     
-----------------------------------------------------------------------------------------------------------------------------------------

*************** Inline @[000005] Starting PHASE Pre-import

*************** Inline @[000005] Finishing PHASE Pre-import
Trees after Pre-import

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB02 [0001]  1                             1       [000..007)        (return)                     
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB02 [000..007) (return), preds={} succs={}

-------------------------------------------------------------------------------------------------------------------

*************** Inline @[000005] Starting PHASE Profile incorporation
BBOPT set, but no profile data available (hr=80004001)
Computing inlinee profile scale:
   ... no callee profile data, will use non-pgo weight to scale
   ... call site not profiled, will use non-pgo weight to scale
   call site count 100 callee entry count 100 scale 1
Scaling inlinee blocks

*************** Inline @[000005] Finishing PHASE Profile incorporation
Trees after Profile incorporation

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB02 [0001]  1                             1       [000..007)        (return)                     
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB02 [000..007) (return), preds={} succs={}

-------------------------------------------------------------------------------------------------------------------

*************** Inline @[000005] Starting PHASE Importation
*************** In impImport() for Runtime:.ctor():this

impImportBlockPending for BB02

Importing BB02 (PC=000) of 'Runtime:.ctor():this'
    [ 0]   0 (0x000) ldarg.0
    [ 1]   1 (0x001) call 0A000004
In Compiler::impImportCall: opcode is call, kind=0, callRetType is void, structSize is 0
INLINER: during 'impMarkInlineCandidate' result 'CheckCanInline Success' reason 'CheckCanInline Success' for 'Runtime:.ctor():this' calling 'System.Object:.ctor():this'
INLINER: during 'impMarkInlineCandidate' result 'CheckCanInline Success' reason 'CheckCanInline Success'


STMT00012 ( 0x000[E-] ... ??? ) <- INLRT @ ???
               [000069] I-C-G------                         ▌  CALL      void   System.Object:.ctor():this (exactContextHnd=0x00007FF936DF99E1)
               [000004] ----------- this                    └──▌  LCL_VAR   ref    V05 tmp1         

    [ 0]   6 (0x006) ret
*************** Inline @[000005] Finishing PHASE Importation
Trees after Importation

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB02 [0001]  1                             1       [000..007)        (return)                     i 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB02 [000..007) (return), preds={} succs={}

***** BB02
STMT00012 ( 0x000[E-] ... ??? ) <- INLRT @ ???
               [000069] I-C-G------                         ▌  CALL      void   System.Object:.ctor():this (exactContextHnd=0x00007FF936DF99E1)
               [000004] ----------- this                    └──▌  LCL_VAR   ref    V05 tmp1         

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckLoopTable: loop table not valid

*************** Inline @[000005] Starting PHASE Expand patchpoints

 -- no patchpoints to transform

*************** Inline @[000005] Finishing PHASE Expand patchpoints [no changes]

*************** Inline @[000005] Starting PHASE Indirect call transform

 -- no candidates to transform

*************** Inline @[000005] Finishing PHASE Indirect call transform [no changes]

*************** Inline @[000005] Starting PHASE Post-import

*************** Inline @[000005] Finishing PHASE Post-import [no changes]


----------- Statements (and blocks) added due to the inlining of call [000005] -----------

Arguments setup:

Inlinee method body:
STMT00012 ( INL01 @ 0x000[E-] ... ??? ) <- INLRT @ ???
               [000069] I-C-G------                         ▌  CALL      void   System.Object:.ctor():this (exactContextHnd=0x00007FF936DF99E1)
               [000004] ----------- this                    └──▌  LCL_VAR   ref    V05 tmp1         

fgInlineAppendStatements: no gc ref inline locals.
Successfully inlined Runtime:.ctor():this (7 IL bytes) (depth 1) [below ALWAYS_INLINE size]
--------------------------------------------------------------------------------------------
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for 'Program:Main()' calling 'Runtime:.ctor():this'
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size'
Expanding INLINE_CANDIDATE in statement STMT00012 in BB01:
STMT00012 ( INL01 @ 0x000[E-] ... ??? ) <- INLRT @ ???
               [000069] I-C-G------                         ▌  CALL      void   System.Object:.ctor():this (exactContextHnd=0x00007FF936DF99E1)
               [000004] ----------- this                    └──▌  LCL_VAR   ref    V05 tmp1         
thisArg: is a local var
               [000004] -----------                         ▌  LCL_VAR   ref    V05 tmp1         

INLINER: inlineInfo.tokenLookupContextHandle for System.Object:.ctor():this set to 0x00007FF936DF99E1:

Invoking compiler for the inlinee method System.Object:.ctor():this :
IL to import:
IL_0000  2a                ret         

INLINER impTokenLookupContextHandle for System.Object:.ctor():this is 0x00007FF936DF99E1.
*************** In compInitDebuggingInfo() for System.Object:.ctor():this
info.compStmtOffsetsCount    = 0
info.compStmtOffsetsImplicit = 0005h ( STACK_EMPTY CALL_SITE )
*************** In fgFindBasicBlocks() for System.Object:.ctor():this
Jump targets:
  none
New Basic Block BB03 [0002] created.
BB03 [000..001)
Basic block list for 'System.Object:.ctor():this'

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB03 [0002]  1                             1       [000..001)        (return)                     
-----------------------------------------------------------------------------------------------------------------------------------------

*************** Inline @[000069] Starting PHASE Pre-import

*************** Inline @[000069] Finishing PHASE Pre-import
Trees after Pre-import

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB03 [0002]  1                             1       [000..001)        (return)                     
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB03 [000..001) (return), preds={} succs={}

-------------------------------------------------------------------------------------------------------------------

*************** Inline @[000069] Starting PHASE Profile incorporation
BBOPT set, but no profile data available (hr=80004001)
Computing inlinee profile scale:
   ... no callee profile data, will use non-pgo weight to scale
   ... call site not profiled, will use non-pgo weight to scale
   call site count 100 callee entry count 100 scale 1
Scaling inlinee blocks

*************** Inline @[000069] Finishing PHASE Profile incorporation
Trees after Profile incorporation

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB03 [0002]  1                             1       [000..001)        (return)                     
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB03 [000..001) (return), preds={} succs={}

-------------------------------------------------------------------------------------------------------------------

*************** Inline @[000069] Starting PHASE Importation
*************** In impImport() for System.Object:.ctor():this

impImportBlockPending for BB03

Importing BB03 (PC=000) of 'System.Object:.ctor():this'
    [ 0]   0 (0x000) ret
** Note: inlinee IL was partially imported -- imported 0 of 1 bytes of method IL

*************** Inline @[000069] Finishing PHASE Importation
Trees after Importation

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB03 [0002]  1                             1       [000..001)        (return)                     i 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB03 [000..001) (return), preds={} succs={}

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckLoopTable: loop table not valid

*************** Inline @[000069] Starting PHASE Expand patchpoints

 -- no patchpoints to transform

*************** Inline @[000069] Finishing PHASE Expand patchpoints [no changes]

*************** Inline @[000069] Starting PHASE Indirect call transform

 -- no candidates to transform

*************** Inline @[000069] Finishing PHASE Indirect call transform [no changes]

*************** Inline @[000069] Starting PHASE Post-import

*************** Inline @[000069] Finishing PHASE Post-import [no changes]


----------- Statements (and blocks) added due to the inlining of call [000069] -----------

Arguments setup:

Inlinee method body:fgInlineAppendStatements: no gc ref inline locals.
Successfully inlined System.Object:.ctor():this (1 IL bytes) (depth 2) [below ALWAYS_INLINE size]
--------------------------------------------------------------------------------------------
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for 'Program:Main()' calling 'System.Object:.ctor():this'
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size'
INLINER: during 'fgNoteNonInlineCandidate' result 'failed this call site' reason 'target is helper' for 'Program:Main()' calling 'n/a'
INLINER: during 'fgNoteNonInlineCandidate' result 'failed this call site' reason 'target is helper'
INLINER: during 'fgNoteNonInlineCandidate' result 'failed this call site' reason 'target is helper' for 'Program:Main()' calling 'n/a'
INLINER: during 'fgNoteNonInlineCandidate' result 'failed this call site' reason 'target is helper'
INLINER: during 'fgNoteNonInlineCandidate' result 'failed this call site' reason 'target is helper' for 'Program:Main()' calling 'n/a'
INLINER: during 'fgNoteNonInlineCandidate' result 'failed this call site' reason 'target is helper'
INLINER: during 'fgNoteNonInlineCandidate' result 'failed this call site' reason 'target is helper' for 'Program:Main()' calling 'n/a'
INLINER: during 'fgNoteNonInlineCandidate' result 'failed this call site' reason 'target is helper'
Expanding INLINE_CANDIDATE in statement STMT00008 in BB01:
STMT00008 ( 0x034[E-] ... ??? )
               [000056] I-C-G------                         ▌  CALL      long   Program:M23(S0,ushort):ulong (exactContextHnd=0x00007FF9372B3AF1)
               [000058] n---------- arg0                    ├──▌  OBJ       struct<S0, 24>
               [000057] -----------                         │  └──▌  LCL_VAR_ADDR byref  V00 loc0         
               [000055] ----------- arg1                    └──▌  CNS_INT   int    0

Argument #0:
               [000058] n----------                         ▌  OBJ       struct<S0, 24>
               [000057] -----------                         └──▌  LCL_VAR_ADDR byref  V00 loc0         


Argument #1: is a constant or invariant
               [000055] -----------                         ▌  CNS_INT   int    0


Folding operator with constant nodes into a constant:
               [000072] -----------                         ▌  CAST      int <- ushort <- int
               [000055] -----------                         └──▌  CNS_INT   int    0
Bashed to int constant:
               [000072] -----------                         ▌  CNS_INT   int    0
INLINER: inlineInfo.tokenLookupContextHandle for Program:M23(S0,ushort):ulong set to 0x00007FF9372B3AF1:

Invoking compiler for the inlinee method Program:M23(S0,ushort):ulong :
IL to import:
IL_0000  0f 00             ldarga.s     0x0
IL_0002  7c 02 00 00 04    ldflda       0x4000002
IL_0007  25                dup         
IL_0008  47                ldind.u1    
IL_0009  13 04             stloc.s      0x4
IL_000b  11 04             ldloc.s      0x4
IL_000d  17                ldc.i4.1    
IL_000e  59                sub         
IL_000f  d2                conv.u1     
IL_0010  52                stind.i1    
IL_0011  11 04             ldloc.s      0x4
IL_0013  0a                stloc.0     
IL_0014  02                ldarg.0     
IL_0015  7b 06 00 00 04    ldfld        0x4000006
IL_001a  0b                stloc.1     
IL_001b  17                ldc.i4.1    
IL_001c  8d 07 00 00 01    newarr       0x1000007
IL_0021  0c                stloc.2     
IL_0022  7e 09 00 00 04    ldsfld       0x4000009
IL_0027  67                conv.i1     
IL_0028  0d                stloc.3     
IL_0029  7e 0b 00 00 04    ldsfld       0x400000B
IL_002e  06                ldloc.0     
IL_002f  07                ldloc.1     
IL_0030  08                ldloc.2     
IL_0031  09                ldloc.3     
IL_0032  03                ldarg.1     
IL_0033  28 05 00 00 06    call         0x6000005
IL_0038  7e 09 00 00 04    ldsfld       0x4000009
IL_003d  6e                conv.u8     
IL_003e  2a                ret         

INLINER impTokenLookupContextHandle for Program:M23(S0,ushort):ulong is 0x00007FF9372B3AF1.
*************** In compInitDebuggingInfo() for Program:M23(S0,ushort):ulong
info.compStmtOffsetsCount    = 0
info.compStmtOffsetsImplicit = 0005h ( STACK_EMPTY CALL_SITE )
*************** In fgFindBasicBlocks() for Program:M23(S0,ushort):ulong
weight= 77 : state  16 [ ldarga.s ]
weight= 17 : state 110 [ ldflda ]
weight= 11 : state  38 [ dup ]
weight= 17 : state  59 [ ldind.u1 ]
weight=-45 : state  20 [ stloc.s ]
weight= 32 : state  18 [ ldloc.s ]
weight= 28 : state  24 [ ldc.i4.1 ]
weight=-15 : state  77 [ sub ]
weight= 50 : state 156 [ conv.u1 ]
weight= 36 : state  70 [ stind.i1 ]
weight= 32 : state  18 [ ldloc.s ]
weight=  6 : state  11 [ stloc.0 ]
weight= 31 : state 191 [ ldarg.0 -> ldfld ]
weight= 34 : state  12 [ stloc.1 ]
weight= 28 : state  24 [ ldc.i4.1 ]
weight=152 : state 118 [ newarr ]
weight=  4 : state  13 [ stloc.2 ]
weight=159 : state 112 [ ldsfld ]
weight= 78 : state  91 [ conv.i1 ]
weight= 49 : state  14 [ stloc.3 ]
weight=159 : state 112 [ ldsfld ]
weight= 12 : state   7 [ ldloc.0 ]
weight=  9 : state   8 [ ldloc.1 ]
weight= 22 : state   9 [ ldloc.2 ]
weight= 24 : state  10 [ ldloc.3 ]
weight= 16 : state   4 [ ldarg.1 ]
weight= 79 : state  40 [ call ]
weight=159 : state 112 [ ldsfld ]
weight= 55 : state  98 [ conv.u8 ]
weight= 19 : state  42 [ ret ]

1 arguments are structs passed by value.  Multiplier increased to 2.
Callsite passes a constant.  Multiplier increased to 5.
Inline candidate callsite is boring.  Multiplier increased to 6.3.
calleeNativeSizeEstimate=1335
callsiteNativeSizeEstimate=155
benefit multiplier=6.3
threshold=976
Native estimate for function size exceeds threshold for inlining 133.5 > 97.6 (multiplier = 6.3)


Inline expansion aborted, inline not profitable
Inlining [000056] failed, so bashing STMT00008 to NOP
INLINER: during 'fgInline' result 'failed this call site' reason 'unprofitable inline' for 'Program:Main()' calling 'Program:M23(S0,ushort):ulong'
INLINER: during 'fgInline' result 'failed this call site' reason 'unprofitable inline'

Replacing the return expression placeholder [000062] with [000056]
               [000062] --C--------                         ▌  RET_EXPR  long  (for [000056]) -> [000056]

Inserting the inline return expression
               [000056] --C-G------                         ▌  CALL      long   Program:M23(S0,ushort):ulong
               [000058] n---------- arg0                    ├──▌  OBJ       struct<S0, 24>
               [000057] -----------                         │  └──▌  LCL_VAR_ADDR byref  V00 loc0         
               [000072] ----------- arg1                    └──▌  CNS_INT   int    0

Expanding INLINE_CANDIDATE in statement STMT00010 in BB01:
STMT00010 ( ??? ... ??? )
               [000065] I-C-G------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort) (exactContextHnd=0x00007FF9372B3AF1)
               [000067] n---------- arg0                    ├──▌  OBJ       struct<S1, 24>
               [000066] -----------                         │  └──▌  LCL_VAR_ADDR byref  V06 tmp2         
               [000051] ----------- arg1                    ├──▌  FIELD     ubyte  S0:F3
               [000050] -----------                         │  └──▌  LCL_VAR_ADDR byref  V00 loc0         
               [000052] ----------- arg2                    ├──▌  LCL_VAR   int    V02 loc2         
               [000053] ----------- arg3                    ├──▌  LCL_VAR   ref    V03 loc3         
               [000063] --C-------- arg4                    ├──▌  CAST      int <- byte <- long
               [000056] --C-G------                         │  └──▌  CALL      long   Program:M23(S0,ushort):ulong
               [000058] n---------- arg0                    │     ├──▌  OBJ       struct<S0, 24>
               [000057] -----------                         │     │  └──▌  LCL_VAR_ADDR byref  V00 loc0         
               [000072] ----------- arg1                    │     └──▌  CNS_INT   int    0
               [000064] ----------- arg5                    └──▌  CNS_INT   int    1

Argument #0:
               [000067] n----------                         ▌  OBJ       struct<S1, 24>
               [000066] -----------                         └──▌  LCL_VAR_ADDR byref  V06 tmp2         


Argument #1:
               [000051] -----------                         ▌  FIELD     ubyte  S0:F3
               [000050] -----------                         └──▌  LCL_VAR_ADDR byref  V00 loc0         


Argument #2: is a local var
               [000052] -----------                         ▌  LCL_VAR   int    V02 loc2         


Argument #3: is a local var
               [000053] -----------                         ▌  LCL_VAR   ref    V03 loc3         


Argument #4: has side effects
               [000063] --C--------                         ▌  CAST      int <- byte <- long
               [000056] --C-G------                         └──▌  CALL      long   Program:M23(S0,ushort):ulong
               [000058] n---------- arg0                       ├──▌  OBJ       struct<S0, 24>
               [000057] -----------                            │  └──▌  LCL_VAR_ADDR byref  V00 loc0         
               [000072] ----------- arg1                       └──▌  CNS_INT   int    0


Argument #5: is a constant or invariant
               [000064] -----------                         ▌  CNS_INT   int    1


Folding operator with constant nodes into a constant:
               [000075] -----------                         ▌  CAST      int <- ushort <- int
               [000064] -----------                         └──▌  CNS_INT   int    1
Bashed to int constant:
               [000075] -----------                         ▌  CNS_INT   int    1
INLINER: inlineInfo.tokenLookupContextHandle for Program:M24(S1,ubyte,uint,short[],byte,ushort) set to 0x00007FF9372B3AF1:

Invoking compiler for the inlinee method Program:M24(S1,ubyte,uint,short[],byte,ushort) :
IL to import:
IL_0000  7e 08 00 00 04    ldsfld       0x4000008
IL_0005  03                ldarg.1     
IL_0006  6f 01 00 00 2b    callvirt     0x2B000001
IL_000b  2a                ret         

INLINER impTokenLookupContextHandle for Program:M24(S1,ubyte,uint,short[],byte,ushort) is 0x00007FF9372B3AF1.
*************** In compInitDebuggingInfo() for Program:M24(S1,ubyte,uint,short[],byte,ushort)
info.compStmtOffsetsCount    = 0
info.compStmtOffsetsImplicit = 0005h ( STACK_EMPTY CALL_SITE )
*************** In fgFindBasicBlocks() for Program:M24(S1,ubyte,uint,short[],byte,ushort)
Jump targets:
  none
New Basic Block BB04 [0003] created.
BB04 [000..00C)
Basic block list for 'Program:M24(S1,ubyte,uint,short[],byte,ushort)'

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB04 [0003]  1                             1       [000..00C)        (return)                     
-----------------------------------------------------------------------------------------------------------------------------------------

*************** Inline @[000065] Starting PHASE Pre-import

*************** Inline @[000065] Finishing PHASE Pre-import
Trees after Pre-import

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB04 [0003]  1                             1       [000..00C)        (return)                     
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB04 [000..00C) (return), preds={} succs={}

-------------------------------------------------------------------------------------------------------------------

*************** Inline @[000065] Starting PHASE Profile incorporation
BBOPT set, but no profile data available (hr=80004001)
Computing inlinee profile scale:
   ... no callee profile data, will use non-pgo weight to scale
   ... call site not profiled, will use non-pgo weight to scale
   call site count 100 callee entry count 100 scale 1
Scaling inlinee blocks

*************** Inline @[000065] Finishing PHASE Profile incorporation
Trees after Profile incorporation

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB04 [0003]  1                             1       [000..00C)        (return)                     
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB04 [000..00C) (return), preds={} succs={}

-------------------------------------------------------------------------------------------------------------------

*************** Inline @[000065] Starting PHASE Importation
*************** In impImport() for Program:M24(S1,ubyte,uint,short[],byte,ushort)

impImportBlockPending for BB04

Importing BB04 (PC=000) of 'Program:M24(S1,ubyte,uint,short[],byte,ushort)'
    [ 0]   0 (0x000) ldsfld 04000008
    [ 1]   5 (0x005) ldarg.1
lvaGrabTemp returning 7 (V07 tmp3) called for Inlining Arg.

    [ 2]   6 (0x006) callvirt 2B000001
In Compiler::impImportCall: opcode is callvirt, kind=3, callRetType is void, structSize is 0

** Note: inlinee IL was partially imported -- imported 0 of 12 bytes of method IL

*************** Inline @[000065] Finishing PHASE Importation
Trees after Importation

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB04 [0003]  1                             1       [000..00C)        (return)                     
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB04 [000..00C) (return), preds={} succs={}

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckLoopTable: loop table not valid

*************** Inline @[000065] Starting PHASE Expand patchpoints

 -- no patchpoints to transform

*************** Inline @[000065] Finishing PHASE Expand patchpoints [no changes]

*************** Inline @[000065] Starting PHASE Indirect call transform

 -- no candidates to transform

*************** Inline @[000065] Finishing PHASE Indirect call transform [no changes]

*************** Inline @[000065] Starting PHASE Post-import

*************** Inline @[000065] Finishing PHASE Post-import [no changes]
INLINER: during 'fgInline' result 'failed this callee' reason 'generic virtual' for 'Program:Main()' calling 'Program:M24(S1,ubyte,uint,short[],byte,ushort)'

INLINER: Marking Program:M24(S1,ubyte,uint,short[],byte,ushort) as NOINLINE because of generic virtual
INLINER: during 'fgInline' result 'failed this callee' reason 'generic virtual'
**************** Inline Tree

Inlines into 06000003 [via ExtendedDefaultPolicy] Program:Main():
  [INL01 IL=0000 TR=000005 06000009] [INLINED: callee: below ALWAYS_INLINE size] Runtime:.ctor():this
    [INL02 IL=0001 TR=000069 06000630] [INLINED: callee: below ALWAYS_INLINE size] System.Object:.ctor():this
  [INL00 IL=0063 TR=000056 06000004] [FAILED: call site: unprofitable inline] Program:M23(S0,ushort):ulong
  [INL00 IL=0070 TR=000065 06000005] [FAILED: callee: generic virtual] Program:M24(S1,ubyte,uint,short[],byte,ushort)
Budget: initialTime=288, finalTime=274, initialBudget=2880, currentBudget=2880
Budget: initialSize=1864, finalSize=1864

*************** Finishing PHASE Morph - Inlining
Trees after Morph - Inlining

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..04C) (return), preds={} succs={}

***** BB01
STMT00000 ( 0x000[E-] ... 0x005 )
               [000003] -A---------                         ▌  ASG       ref   
               [000002] D------N---                         ├──▌  LCL_VAR   ref    V05 tmp1         
               [000001] -----------                         └──▌  ALLOCOBJ  ref   
               [000000] H----------                            └──▌  CNS_INT(h) long   0x7ff93744e858 class

***** BB01
STMT00002 ( 0x005[--] ... ??? )
               [000013] H-CXG------                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000011] ----------- arg0                    ├──▌  CNS_INT   long   0x7ff9372b1818
               [000012] ----------- arg1                    └──▌  CNS_INT   int    5

***** BB01
STMT00003 ( ??? ... ??? )
               [000009] -A--G------                         ▌  ASG       ref   
               [000008] h---G--N---                         ├──▌  IND       ref   
               [000007] I----------                         │  └──▌  CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt]
               [000006] -----------                         └──▌  LCL_VAR   ref    V05 tmp1         

***** BB01
STMT00004 ( 0x00A[E-] ... 0x014 )
               [000025] -ACXG------                         ▌  ASG       struct (copy)
               [000024] D------N---                         ├──▌  LCL_VAR   struct<S0, 24> V00 loc0         
               [000023] --CXG------                         └──▌  FIELD     struct S1:F2
               [000022] --CXG------                            └──▌  COMMA     byref 
               [000021] H-CXG------                               ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000019] ----------- arg0                          │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000020] ----------- arg1                          │  └──▌  CNS_INT   int    5
               [000017] -----------                               └──▌  ADD       byref 
               [000015] #----------                                  ├──▌  IND       ref   
               [000014] I----------                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000016] -----------                                  └──▌  CNS_INT   long   8 Fseq[s_2]

***** BB01
STMT00005 ( 0x015[E-] ... 0x018 )
               [000029] IA---------                         ▌  ASG       struct (init)
               [000027] D------N---                         ├──▌  LCL_VAR   struct<S1, 24> V01 loc1         
               [000028] -----------                         └──▌  CNS_INT   int    0

***** BB01
STMT00006 ( 0x01D[E-] ... 0x02C )
               [000042] -ACXG------                         ▌  ASG       int   
               [000041] D------N---                         ├──▌  LCL_VAR   int    V02 loc2         
               [000040] --CXG------                         └──▌  FIELD     int    S0:F4
               [000039] --CXG------                            └──▌  FIELD_ADDR byref  S1:F2
               [000038] --CXG------                               └──▌  COMMA     byref 
               [000037] H-CXG------                                  ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000035] ----------- arg0                             │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000036] ----------- arg1                             │  └──▌  CNS_INT   int    5
               [000033] -----------                                  └──▌  ADD       byref 
               [000031] #----------                                     ├──▌  IND       ref   
               [000030] I----------                                     │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000032] -----------                                     └──▌  CNS_INT   long   8 Fseq[s_2]

***** BB01
STMT00007 ( 0x02D[E-] ... 0x033 )
               [000047] -ACXG------                         ▌  ASG       ref   
               [000046] D------N---                         ├──▌  LCL_VAR   ref    V03 loc3         
               [000045] --CXG------                         └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC
               [000044] H---------- arg0                       ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class
               [000043] ----------- arg1                       └──▌  CNS_INT   long   1

***** BB01
STMT00009 ( 0x034[E-] ... 0x04B )
               [000060] -A---------                         ▌  ASG       struct (copy)
               [000059] D------N---                         ├──▌  LCL_VAR   struct<S1, 24> V06 tmp2         
               [000048] -----------                         └──▌  LCL_VAR   struct<S1, 24> V01 loc1         

***** BB01
STMT00010 ( ??? ... ??? )
               [000065] --C-G------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort)
               [000067] n---------- arg0                    ├──▌  OBJ       struct<S1, 24>
               [000066] -----------                         │  └──▌  LCL_VAR_ADDR byref  V06 tmp2         
               [000051] ----------- arg1                    ├──▌  FIELD     ubyte  S0:F3
               [000050] -----------                         │  └──▌  LCL_VAR_ADDR byref  V00 loc0         
               [000052] ----------- arg2                    ├──▌  LCL_VAR   int    V02 loc2         
               [000053] ----------- arg3                    ├──▌  LCL_VAR   ref    V03 loc3         
               [000074] --C-------- arg4                    ├──▌  CAST      int <- byte <- int
               [000063] --C--------                         │  └──▌  CAST      int <- byte <- long
               [000056] --C-G------                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong
               [000058] n---------- arg0                    │        ├──▌  OBJ       struct<S0, 24>
               [000057] -----------                         │        │  └──▌  LCL_VAR_ADDR byref  V00 loc0         
               [000072] ----------- arg1                    │        └──▌  CNS_INT   int    0
               [000075] ----------- arg5                    └──▌  CNS_INT   int    1

***** BB01
STMT00011 ( 0x04B[E-] ... ??? )
               [000068] -----------                         ▌  RETURN    void  

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckLoopTable: loop table not valid

*************** Starting PHASE Allocate Objects
disabled, punting

*************** Finishing PHASE Allocate Objects [no changes]

*************** Starting PHASE Morph - Add internal blocks

*************** After fgAddInternal()

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

***************  Exception Handling table is empty

*************** Finishing PHASE Morph - Add internal blocks [no changes]

*************** Starting PHASE Remove empty try

*************** In fgRemoveEmptyTry()
No EH in this method, nothing to remove.

*************** Finishing PHASE Remove empty try [no changes]

*************** Starting PHASE Remove empty finally
No EH in this method, nothing to remove.

*************** Finishing PHASE Remove empty finally [no changes]

*************** Starting PHASE Merge callfinally chains
No EH in this method, nothing to merge.

*************** Finishing PHASE Merge callfinally chains [no changes]

*************** Starting PHASE Clone finally
No EH in this method, no cloning.

*************** Finishing PHASE Clone finally [no changes]

*************** Starting PHASE Compute preds

Renumbering the basic blocks for fgComputePred

*************** Before renumbering the basic blocks

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd                 weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

***************  Exception Handling table is empty

*************** After renumbering the basic blocks
=============== No blocks renumbered!

New BlockSet epoch 2, # of blocks (including unused BB00): 2, bitset array size: 1 (short)

*************** Finishing PHASE Compute preds
Trees after Compute preds

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..04C) (return), preds={} succs={}

***** BB01
STMT00000 ( 0x000[E-] ... 0x005 )
               [000003] -AC--------                         ▌  ASG       ref   
               [000002] D------N---                         ├──▌  LCL_VAR   ref    V05 tmp1         
               [000001] --C--------                         └──▌  CALL help ref    CORINFO_HELP_NEWSFAST
               [000000] H---------- arg0                       └──▌  CNS_INT(h) long   0x7ff93744e858 class

***** BB01
STMT00002 ( 0x005[--] ... ??? )
               [000013] H-CXG------                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000011] ----------- arg0                    ├──▌  CNS_INT   long   0x7ff9372b1818
               [000012] ----------- arg1                    └──▌  CNS_INT   int    5

***** BB01
STMT00003 ( ??? ... ??? )
               [000009] -A--G------                         ▌  ASG       ref   
               [000008] h---G--N---                         ├──▌  IND       ref   
               [000007] I----------                         │  └──▌  CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt]
               [000006] -----------                         └──▌  LCL_VAR   ref    V05 tmp1         

***** BB01
STMT00004 ( 0x00A[E-] ... 0x014 )
               [000025] -ACXG------                         ▌  ASG       struct (copy)
               [000024] D------N---                         ├──▌  LCL_VAR   struct<S0, 24> V00 loc0         
               [000023] --CXG------                         └──▌  FIELD     struct S1:F2
               [000022] --CXG------                            └──▌  COMMA     byref 
               [000021] H-CXG------                               ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000019] ----------- arg0                          │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000020] ----------- arg1                          │  └──▌  CNS_INT   int    5
               [000017] -----------                               └──▌  ADD       byref 
               [000015] #----------                                  ├──▌  IND       ref   
               [000014] I----------                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000016] -----------                                  └──▌  CNS_INT   long   8 Fseq[s_2]

***** BB01
STMT00005 ( 0x015[E-] ... 0x018 )
               [000029] IA---------                         ▌  ASG       struct (init)
               [000027] D------N---                         ├──▌  LCL_VAR   struct<S1, 24> V01 loc1         
               [000028] -----------                         └──▌  CNS_INT   int    0

***** BB01
STMT00006 ( 0x01D[E-] ... 0x02C )
               [000042] -ACXG------                         ▌  ASG       int   
               [000041] D------N---                         ├──▌  LCL_VAR   int    V02 loc2         
               [000040] --CXG------                         └──▌  FIELD     int    S0:F4
               [000039] --CXG------                            └──▌  FIELD_ADDR byref  S1:F2
               [000038] --CXG------                               └──▌  COMMA     byref 
               [000037] H-CXG------                                  ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000035] ----------- arg0                             │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000036] ----------- arg1                             │  └──▌  CNS_INT   int    5
               [000033] -----------                                  └──▌  ADD       byref 
               [000031] #----------                                     ├──▌  IND       ref   
               [000030] I----------                                     │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000032] -----------                                     └──▌  CNS_INT   long   8 Fseq[s_2]

***** BB01
STMT00007 ( 0x02D[E-] ... 0x033 )
               [000047] -ACXG------                         ▌  ASG       ref   
               [000046] D------N---                         ├──▌  LCL_VAR   ref    V03 loc3         
               [000045] --CXG------                         └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC
               [000044] H---------- arg0                       ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class
               [000043] ----------- arg1                       └──▌  CNS_INT   long   1

***** BB01
STMT00009 ( 0x034[E-] ... 0x04B )
               [000060] -A---------                         ▌  ASG       struct (copy)
               [000059] D------N---                         ├──▌  LCL_VAR   struct<S1, 24> V06 tmp2         
               [000048] -----------                         └──▌  LCL_VAR   struct<S1, 24> V01 loc1         

***** BB01
STMT00010 ( ??? ... ??? )
               [000065] --C-G------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort)
               [000067] n---------- arg0                    ├──▌  OBJ       struct<S1, 24>
               [000066] -----------                         │  └──▌  LCL_VAR_ADDR byref  V06 tmp2         
               [000051] ----------- arg1                    ├──▌  FIELD     ubyte  S0:F3
               [000050] -----------                         │  └──▌  LCL_VAR_ADDR byref  V00 loc0         
               [000052] ----------- arg2                    ├──▌  LCL_VAR   int    V02 loc2         
               [000053] ----------- arg3                    ├──▌  LCL_VAR   ref    V03 loc3         
               [000074] --C-------- arg4                    ├──▌  CAST      int <- byte <- int
               [000063] --C--------                         │  └──▌  CAST      int <- byte <- long
               [000056] --C-G------                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong
               [000058] n---------- arg0                    │        ├──▌  OBJ       struct<S0, 24>
               [000057] -----------                         │        │  └──▌  LCL_VAR_ADDR byref  V00 loc0         
               [000072] ----------- arg1                    │        └──▌  CNS_INT   int    0
               [000075] ----------- arg5                    └──▌  CNS_INT   int    1

***** BB01
STMT00011 ( 0x04B[E-] ... ??? )
               [000068] -----------                         ▌  RETURN    void  

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
*************** In fgDebugCheckLoopTable: loop table not valid

*************** Starting PHASE Tail merge

*************** Finishing PHASE Tail merge [no changes]

*************** Starting PHASE Merge throw blocks

*************** In fgTailMergeThrows
Method does not have multiple noreturn calls.

*************** Finishing PHASE Merge throw blocks [no changes]

*************** Starting PHASE Update flow graph early pass

*************** Finishing PHASE Update flow graph early pass [no changes]

*************** Starting PHASE Morph - Promote Structs

lvaTable before fgPromoteStructs
; Initial local variable assignments
;
;  V00 loc0           struct <S0, 24>
;  V01 loc1           struct <S1, 24> ld-addr-op
;  V02 loc2              int 
;  V03 loc3              ref  class-hnd exact
;  V04 OutArgs        lclBlk <na>  "OutgoingArgSpace"
;  V05 tmp1              ref  class-hnd exact "NewObj constructor temp"
;  V06 tmp2           struct <S1, 24> "impAppendStmt"

*************** Finishing PHASE Morph - Promote Structs [no changes]

*************** Starting PHASE Morph - Structs/AddrExp
LocalAddressVisitor visiting statement:
STMT00000 ( 0x000[E-] ... 0x005 )
               [000003] -AC--------                         ▌  ASG       ref   
               [000002] D------N---                         ├──▌  LCL_VAR   ref    V05 tmp1         
               [000001] --C--------                         └──▌  CALL help ref    CORINFO_HELP_NEWSFAST
               [000000] H---------- arg0                       └──▌  CNS_INT(h) long   0x7ff93744e858 class

LocalAddressVisitor visiting statement:
STMT00002 ( 0x005[--] ... ??? )
               [000013] H-CXG------                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000011] ----------- arg0                    ├──▌  CNS_INT   long   0x7ff9372b1818
               [000012] ----------- arg1                    └──▌  CNS_INT   int    5

LocalAddressVisitor visiting statement:
STMT00003 ( ??? ... ??? )
               [000009] -A--G------                         ▌  ASG       ref   
               [000008] h---G--N---                         ├──▌  IND       ref   
               [000007] I----------                         │  └──▌  CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt]
               [000006] -----------                         └──▌  LCL_VAR   ref    V05 tmp1         

LocalAddressVisitor visiting statement:
STMT00004 ( 0x00A[E-] ... 0x014 )
               [000025] -ACXG------                         ▌  ASG       struct (copy)
               [000024] D------N---                         ├──▌  LCL_VAR   struct<S0, 24> V00 loc0         
               [000023] --CXG------                         └──▌  FIELD     struct S1:F2
               [000022] --CXG------                            └──▌  COMMA     byref 
               [000021] H-CXG------                               ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000019] ----------- arg0                          │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000020] ----------- arg1                          │  └──▌  CNS_INT   int    5
               [000017] -----------                               └──▌  ADD       byref 
               [000015] #----------                                  ├──▌  IND       ref   
               [000014] I----------                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000016] -----------                                  └──▌  CNS_INT   long   8 Fseq[s_2]

LocalAddressVisitor visiting statement:
STMT00005 ( 0x015[E-] ... 0x018 )
               [000029] IA---------                         ▌  ASG       struct (init)
               [000027] D------N---                         ├──▌  LCL_VAR   struct<S1, 24> V01 loc1         
               [000028] -----------                         └──▌  CNS_INT   int    0

LocalAddressVisitor visiting statement:
STMT00006 ( 0x01D[E-] ... 0x02C )
               [000042] -ACXG------                         ▌  ASG       int   
               [000041] D------N---                         ├──▌  LCL_VAR   int    V02 loc2         
               [000040] --CXG------                         └──▌  FIELD     int    S0:F4
               [000039] --CXG------                            └──▌  FIELD_ADDR byref  S1:F2
               [000038] --CXG------                               └──▌  COMMA     byref 
               [000037] H-CXG------                                  ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000035] ----------- arg0                             │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000036] ----------- arg1                             │  └──▌  CNS_INT   int    5
               [000033] -----------                                  └──▌  ADD       byref 
               [000031] #----------                                     ├──▌  IND       ref   
               [000030] I----------                                     │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000032] -----------                                     └──▌  CNS_INT   long   8 Fseq[s_2]

LocalAddressVisitor visiting statement:
STMT00007 ( 0x02D[E-] ... 0x033 )
               [000047] -ACXG------                         ▌  ASG       ref   
               [000046] D------N---                         ├──▌  LCL_VAR   ref    V03 loc3         
               [000045] --CXG------                         └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC
               [000044] H---------- arg0                       ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class
               [000043] ----------- arg1                       └──▌  CNS_INT   long   1

LocalAddressVisitor visiting statement:
STMT00009 ( 0x034[E-] ... 0x04B )
               [000060] -A---------                         ▌  ASG       struct (copy)
               [000059] D------N---                         ├──▌  LCL_VAR   struct<S1, 24> V06 tmp2         
               [000048] -----------                         └──▌  LCL_VAR   struct<S1, 24> V01 loc1         

LocalAddressVisitor visiting statement:
STMT00010 ( ??? ... ??? )
               [000065] --C-G------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort)
               [000067] n---------- arg0                    ├──▌  OBJ       struct<S1, 24>
               [000066] -----------                         │  └──▌  LCL_VAR_ADDR byref  V06 tmp2         
               [000051] ----------- arg1                    ├──▌  FIELD     ubyte  S0:F3
               [000050] -----------                         │  └──▌  LCL_VAR_ADDR byref  V00 loc0         
               [000052] ----------- arg2                    ├──▌  LCL_VAR   int    V02 loc2         
               [000053] ----------- arg3                    ├──▌  LCL_VAR   ref    V03 loc3         
               [000074] --C-------- arg4                    ├──▌  CAST      int <- byte <- int
               [000063] --C--------                         │  └──▌  CAST      int <- byte <- long
               [000056] --C-G------                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong
               [000058] n---------- arg0                    │        ├──▌  OBJ       struct<S0, 24>
               [000057] -----------                         │        │  └──▌  LCL_VAR_ADDR byref  V00 loc0         
               [000072] ----------- arg1                    │        └──▌  CNS_INT   int    0
               [000075] ----------- arg5                    └──▌  CNS_INT   int    1

Local V00 should not be enregistered because: was accessed as a local field
LocalAddressVisitor modified statement:
STMT00010 ( ??? ... ??? )
               [000065] --C-G------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort)
               [000067] ----------- arg0                    ├──▌  LCL_VAR   struct<S1, 24> V06 tmp2         
               [000051] ----------- arg1                    ├──▌  LCL_FLD   ubyte  V00 loc0         [+0]
               [000052] ----------- arg2                    ├──▌  LCL_VAR   int    V02 loc2         
               [000053] ----------- arg3                    ├──▌  LCL_VAR   ref    V03 loc3         
               [000074] --C-------- arg4                    ├──▌  CAST      int <- byte <- int
               [000063] --C--------                         │  └──▌  CAST      int <- byte <- long
               [000056] --C-G------                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong
               [000058] ----------- arg0                    │        ├──▌  LCL_VAR   struct<S0, 24> V00 loc0         
               [000072] ----------- arg1                    │        └──▌  CNS_INT   int    0
               [000075] ----------- arg5                    └──▌  CNS_INT   int    1

LocalAddressVisitor visiting statement:
STMT00011 ( 0x04B[E-] ... ??? )
               [000068] -----------                         ▌  RETURN    void  


*************** Finishing PHASE Morph - Structs/AddrExp
Trees after Morph - Structs/AddrExp

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..04C) (return), preds={} succs={}

***** BB01
STMT00000 ( 0x000[E-] ... 0x005 )
               [000003] -AC--------                         ▌  ASG       ref   
               [000002] D------N---                         ├──▌  LCL_VAR   ref    V05 tmp1         
               [000001] --C--------                         └──▌  CALL help ref    CORINFO_HELP_NEWSFAST
               [000000] H---------- arg0                       └──▌  CNS_INT(h) long   0x7ff93744e858 class

***** BB01
STMT00002 ( 0x005[--] ... ??? )
               [000013] H-CXG------                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000011] ----------- arg0                    ├──▌  CNS_INT   long   0x7ff9372b1818
               [000012] ----------- arg1                    └──▌  CNS_INT   int    5

***** BB01
STMT00003 ( ??? ... ??? )
               [000009] -A--G------                         ▌  ASG       ref   
               [000008] h---G--N---                         ├──▌  IND       ref   
               [000007] I----------                         │  └──▌  CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt]
               [000006] -----------                         └──▌  LCL_VAR   ref    V05 tmp1         

***** BB01
STMT00004 ( 0x00A[E-] ... 0x014 )
               [000025] -ACXG------                         ▌  ASG       struct (copy)
               [000024] D------N---                         ├──▌  LCL_VAR   struct<S0, 24> V00 loc0         
               [000023] --CXG------                         └──▌  FIELD     struct S1:F2
               [000022] --CXG------                            └──▌  COMMA     byref 
               [000021] H-CXG------                               ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000019] ----------- arg0                          │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000020] ----------- arg1                          │  └──▌  CNS_INT   int    5
               [000017] -----------                               └──▌  ADD       byref 
               [000015] #----------                                  ├──▌  IND       ref   
               [000014] I----------                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000016] -----------                                  └──▌  CNS_INT   long   8 Fseq[s_2]

***** BB01
STMT00005 ( 0x015[E-] ... 0x018 )
               [000029] IA---------                         ▌  ASG       struct (init)
               [000027] D------N---                         ├──▌  LCL_VAR   struct<S1, 24> V01 loc1         
               [000028] -----------                         └──▌  CNS_INT   int    0

***** BB01
STMT00006 ( 0x01D[E-] ... 0x02C )
               [000042] -ACXG------                         ▌  ASG       int   
               [000041] D------N---                         ├──▌  LCL_VAR   int    V02 loc2         
               [000040] --CXG------                         └──▌  FIELD     int    S0:F4
               [000039] --CXG------                            └──▌  FIELD_ADDR byref  S1:F2
               [000038] --CXG------                               └──▌  COMMA     byref 
               [000037] H-CXG------                                  ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000035] ----------- arg0                             │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000036] ----------- arg1                             │  └──▌  CNS_INT   int    5
               [000033] -----------                                  └──▌  ADD       byref 
               [000031] #----------                                     ├──▌  IND       ref   
               [000030] I----------                                     │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000032] -----------                                     └──▌  CNS_INT   long   8 Fseq[s_2]

***** BB01
STMT00007 ( 0x02D[E-] ... 0x033 )
               [000047] -ACXG------                         ▌  ASG       ref   
               [000046] D------N---                         ├──▌  LCL_VAR   ref    V03 loc3         
               [000045] --CXG------                         └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC
               [000044] H---------- arg0                       ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class
               [000043] ----------- arg1                       └──▌  CNS_INT   long   1

***** BB01
STMT00009 ( 0x034[E-] ... 0x04B )
               [000060] -A---------                         ▌  ASG       struct (copy)
               [000059] D------N---                         ├──▌  LCL_VAR   struct<S1, 24> V06 tmp2         
               [000048] -----------                         └──▌  LCL_VAR   struct<S1, 24> V01 loc1         

***** BB01
STMT00010 ( ??? ... ??? )
               [000065] --C-G------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort)
               [000067] ----------- arg0                    ├──▌  LCL_VAR   struct<S1, 24> V06 tmp2         
               [000051] ----------- arg1                    ├──▌  LCL_FLD   ubyte  V00 loc0         [+0]
               [000052] ----------- arg2                    ├──▌  LCL_VAR   int    V02 loc2         
               [000053] ----------- arg3                    ├──▌  LCL_VAR   ref    V03 loc3         
               [000074] --C-------- arg4                    ├──▌  CAST      int <- byte <- int
               [000063] --C--------                         │  └──▌  CAST      int <- byte <- long
               [000056] --C-G------                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong
               [000058] ----------- arg0                    │        ├──▌  LCL_VAR   struct<S0, 24> V00 loc0         
               [000072] ----------- arg1                    │        └──▌  CNS_INT   int    0
               [000075] ----------- arg5                    └──▌  CNS_INT   int    1

***** BB01
STMT00011 ( 0x04B[E-] ... ??? )
               [000068] -----------                         ▌  RETURN    void  

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
*************** In fgDebugCheckLoopTable: loop table not valid

*************** Starting PHASE Early liveness

Local V00 should not be enregistered because: struct size does not match reg size

Local V01 should not be enregistered because: struct size does not match reg size

Local V06 should not be enregistered because: struct size does not match reg size
Tracked variable (6 out of 7) table:
V00 loc0          [struct]: refCnt =    3, refCntWtd =   0   
V01 loc1          [struct]: refCnt =    2, refCntWtd =   0   
V02 loc2          [   int]: refCnt =    2, refCntWtd =   0   
V03 loc3          [   ref]: refCnt =    2, refCntWtd =   0   
V05 tmp1          [   ref]: refCnt =    2, refCntWtd =   0   
V06 tmp2          [struct]: refCnt =    2, refCntWtd =   0   

*************** In fgPerBlockLocalVarLiveness()
BB01 USE(0)={                       }
     DEF(6)={V00 V01 V02 V03 V05 V06}

** Memory liveness computed, GcHeap states and ByrefExposed states match
*************** In fgInterBlockLocalVarLiveness()

BB liveness after fgLiveVarAnalysis():

BB01 IN (0)={}
     OUT(0)={}


*************** Finishing PHASE Early liveness
Trees after Early liveness

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..04C) (return), preds={} succs={}

***** BB01
STMT00000 ( 0x000[E-] ... 0x005 )
               [000003] -AC--------                         ▌  ASG       ref   
               [000002] D------N---                         ├──▌  LCL_VAR   ref    V05 tmp1         
               [000001] --C--------                         └──▌  CALL help ref    CORINFO_HELP_NEWSFAST
               [000000] H---------- arg0                       └──▌  CNS_INT(h) long   0x7ff93744e858 class

***** BB01
STMT00002 ( 0x005[--] ... ??? )
               [000013] H-CXG------                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000011] ----------- arg0                    ├──▌  CNS_INT   long   0x7ff9372b1818
               [000012] ----------- arg1                    └──▌  CNS_INT   int    5

***** BB01
STMT00003 ( ??? ... ??? )
               [000009] -A--G------                         ▌  ASG       ref   
               [000008] h---G--N---                         ├──▌  IND       ref   
               [000007] I----------                         │  └──▌  CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt]
               [000006] -----------                         └──▌  LCL_VAR   ref    V05 tmp1          (last use)

***** BB01
STMT00004 ( 0x00A[E-] ... 0x014 )
               [000025] -ACXG------                         ▌  ASG       struct (copy)
               [000024] D------N---                         ├──▌  LCL_VAR   struct<S0, 24> V00 loc0         
               [000023] --CXG------                         └──▌  FIELD     struct S1:F2
               [000022] --CXG------                            └──▌  COMMA     byref 
               [000021] H-CXG------                               ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000019] ----------- arg0                          │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000020] ----------- arg1                          │  └──▌  CNS_INT   int    5
               [000017] -----------                               └──▌  ADD       byref 
               [000015] #----------                                  ├──▌  IND       ref   
               [000014] I----------                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000016] -----------                                  └──▌  CNS_INT   long   8 Fseq[s_2]

***** BB01
STMT00005 ( 0x015[E-] ... 0x018 )
               [000029] IA---------                         ▌  ASG       struct (init)
               [000027] D------N---                         ├──▌  LCL_VAR   struct<S1, 24> V01 loc1         
               [000028] -----------                         └──▌  CNS_INT   int    0

***** BB01
STMT00006 ( 0x01D[E-] ... 0x02C )
               [000042] -ACXG------                         ▌  ASG       int   
               [000041] D------N---                         ├──▌  LCL_VAR   int    V02 loc2         
               [000040] --CXG------                         └──▌  FIELD     int    S0:F4
               [000039] --CXG------                            └──▌  FIELD_ADDR byref  S1:F2
               [000038] --CXG------                               └──▌  COMMA     byref 
               [000037] H-CXG------                                  ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000035] ----------- arg0                             │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000036] ----------- arg1                             │  └──▌  CNS_INT   int    5
               [000033] -----------                                  └──▌  ADD       byref 
               [000031] #----------                                     ├──▌  IND       ref   
               [000030] I----------                                     │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000032] -----------                                     └──▌  CNS_INT   long   8 Fseq[s_2]

***** BB01
STMT00007 ( 0x02D[E-] ... 0x033 )
               [000047] -ACXG------                         ▌  ASG       ref   
               [000046] D------N---                         ├──▌  LCL_VAR   ref    V03 loc3         
               [000045] --CXG------                         └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC
               [000044] H---------- arg0                       ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class
               [000043] ----------- arg1                       └──▌  CNS_INT   long   1

***** BB01
STMT00009 ( 0x034[E-] ... 0x04B )
               [000060] -A---------                         ▌  ASG       struct (copy)
               [000059] D------N---                         ├──▌  LCL_VAR   struct<S1, 24> V06 tmp2         
               [000048] -----------                         └──▌  LCL_VAR   struct<S1, 24> V01 loc1          (last use)

***** BB01
STMT00010 ( ??? ... ??? )
               [000065] --C-G------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort)
               [000067] ----------- arg0                    ├──▌  LCL_VAR   struct<S1, 24> V06 tmp2          (last use)
               [000051] ----------- arg1                    ├──▌  LCL_FLD   ubyte  V00 loc0         [+0]
               [000052] ----------- arg2                    ├──▌  LCL_VAR   int    V02 loc2          (last use)
               [000053] ----------- arg3                    ├──▌  LCL_VAR   ref    V03 loc3          (last use)
               [000074] --C-------- arg4                    ├──▌  CAST      int <- byte <- int
               [000063] --C--------                         │  └──▌  CAST      int <- byte <- long
               [000056] --C-G------                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong
               [000058] ----------- arg0                    │        ├──▌  LCL_VAR   struct<S0, 24> V00 loc0          (last use)
               [000072] ----------- arg1                    │        └──▌  CNS_INT   int    0
               [000075] ----------- arg5                    └──▌  CNS_INT   int    1

***** BB01
STMT00011 ( 0x04B[E-] ... ??? )
               [000068] -----------                         ▌  RETURN    void  

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
*************** In fgDebugCheckLoopTable: loop table not valid

*************** Starting PHASE Forward Substitution


===> BB01
    [000003]:  no next stmt use
    [000025]:  no next stmt use
    [000029]:  mismatched types (assignment)
    [000042]:  no next stmt use
    [000047]:  no next stmt use
    [000060]:  [000067] is last use of [000059] (V06)  -- fwd subbing [000048]; new next stmt is
STMT00010 ( ??? ... ??? )
               [000065] --CXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort)
               [000048] ----------- arg0                    ├──▌  LCL_VAR   struct<S1, 24> V01 loc1          (last use)
               [000051] ----------- arg1                    ├──▌  LCL_FLD   ubyte  V00 loc0         [+0]
               [000052] ----------- arg2                    ├──▌  LCL_VAR   int    V02 loc2          (last use)
               [000053] ----------- arg3                    ├──▌  LCL_VAR   ref    V03 loc3          (last use)
               [000074] --CXG------ arg4                    ├──▌  CAST      int <- byte <- int
               [000063] --CXG------                         │  └──▌  CAST      int <- byte <- long
               [000056] --CXG------                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong
               [000058] ----------- arg0                    │        ├──▌  LCL_VAR   struct<S0, 24> V00 loc0          (last use)
               [000072] ----------- arg1                    │        └──▌  CNS_INT   int    0
               [000075] ----------- arg5                    └──▌  CNS_INT   int    1

removing useless STMT00009 ( 0x034[E-] ... 0x04B )
               [000060] -A---------                         ▌  ASG       struct (copy)
               [000059] D------N---                         ├──▌  LCL_VAR   struct<S1, 24> V06 tmp2         
               [000048] -----------                         └──▌  LCL_VAR   struct<S1, 24> V01 loc1          (last use)
 from BB01
    [000047]:  [000053] is last use of [000046] (V03)  -- fwd subbing [000045]; new next stmt is
STMT00010 ( ??? ... ??? )
               [000065] --CXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort)
               [000048] ----------- arg0                    ├──▌  LCL_VAR   struct<S1, 24> V01 loc1          (last use)
               [000051] ----------- arg1                    ├──▌  LCL_FLD   ubyte  V00 loc0         [+0]
               [000052] ----------- arg2                    ├──▌  LCL_VAR   int    V02 loc2          (last use)
               [000045] --CXG------ arg3                    ├──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC
               [000044] H---------- arg0                    │  ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class
               [000043] ----------- arg1                    │  └──▌  CNS_INT   long   1
               [000074] --CXG------ arg4                    ├──▌  CAST      int <- byte <- int
               [000063] --CXG------                         │  └──▌  CAST      int <- byte <- long
               [000056] --CXG------                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong
               [000058] ----------- arg0                    │        ├──▌  LCL_VAR   struct<S0, 24> V00 loc0          (last use)
               [000072] ----------- arg1                    │        └──▌  CNS_INT   int    0
               [000075] ----------- arg5                    └──▌  CNS_INT   int    1

removing useless STMT00007 ( 0x02D[E-] ... 0x033 )
               [000047] -ACXG------                         ▌  ASG       ref   
               [000046] D------N---                         ├──▌  LCL_VAR   ref    V03 loc3         
               [000045] --CXG------                         └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC
               [000044] H---------- arg0                       ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class
               [000043] ----------- arg1                       └──▌  CNS_INT   long   1
 from BB01
    [000042]:  [000052] is last use of [000041] (V02)  -- fwd subbing [000040]; new next stmt is
STMT00010 ( ??? ... ??? )
               [000065] --CXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort)
               [000048] ----------- arg0                    ├──▌  LCL_VAR   struct<S1, 24> V01 loc1          (last use)
               [000051] ----------- arg1                    ├──▌  LCL_FLD   ubyte  V00 loc0         [+0]
               [000040] --CXG------ arg2                    ├──▌  FIELD     int    S0:F4
               [000039] --CXG------                         │  └──▌  FIELD_ADDR byref  S1:F2
               [000038] --CXG------                         │     └──▌  COMMA     byref 
               [000037] H-CXG------                         │        ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000035] ----------- arg0                    │        │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000036] ----------- arg1                    │        │  └──▌  CNS_INT   int    5
               [000033] -----------                         │        └──▌  ADD       byref 
               [000031] #----------                         │           ├──▌  IND       ref   
               [000030] I----------                         │           │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000032] -----------                         │           └──▌  CNS_INT   long   8 Fseq[s_2]
               [000045] --CXG------ arg3                    ├──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC
               [000044] H---------- arg0                    │  ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class
               [000043] ----------- arg1                    │  └──▌  CNS_INT   long   1
               [000074] --CXG------ arg4                    ├──▌  CAST      int <- byte <- int
               [000063] --CXG------                         │  └──▌  CAST      int <- byte <- long
               [000056] --CXG------                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong
               [000058] ----------- arg0                    │        ├──▌  LCL_VAR   struct<S0, 24> V00 loc0          (last use)
               [000072] ----------- arg1                    │        └──▌  CNS_INT   int    0
               [000075] ----------- arg5                    └──▌  CNS_INT   int    1

removing useless STMT00006 ( 0x01D[E-] ... 0x02C )
               [000042] -ACXG------                         ▌  ASG       int   
               [000041] D------N---                         ├──▌  LCL_VAR   int    V02 loc2         
               [000040] --CXG------                         └──▌  FIELD     int    S0:F4
               [000039] --CXG------                            └──▌  FIELD_ADDR byref  S1:F2
               [000038] --CXG------                               └──▌  COMMA     byref 
               [000037] H-CXG------                                  ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000035] ----------- arg0                             │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000036] ----------- arg1                             │  └──▌  CNS_INT   int    5
               [000033] -----------                                  └──▌  ADD       byref 
               [000031] #----------                                     ├──▌  IND       ref   
               [000030] I----------                                     │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000032] -----------                                     └──▌  CNS_INT   long   8 Fseq[s_2]
 from BB01
    [000029]:  mismatched types (assignment)

*************** Finishing PHASE Forward Substitution
Trees after Forward Substitution

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..04C) (return), preds={} succs={}

***** BB01
STMT00000 ( 0x000[E-] ... 0x005 )
               [000003] -AC--------                         ▌  ASG       ref   
               [000002] D------N---                         ├──▌  LCL_VAR   ref    V05 tmp1         
               [000001] --C--------                         └──▌  CALL help ref    CORINFO_HELP_NEWSFAST
               [000000] H---------- arg0                       └──▌  CNS_INT(h) long   0x7ff93744e858 class

***** BB01
STMT00002 ( 0x005[--] ... ??? )
               [000013] H-CXG------                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000011] ----------- arg0                    ├──▌  CNS_INT   long   0x7ff9372b1818
               [000012] ----------- arg1                    └──▌  CNS_INT   int    5

***** BB01
STMT00003 ( ??? ... ??? )
               [000009] -A--G------                         ▌  ASG       ref   
               [000008] h---G--N---                         ├──▌  IND       ref   
               [000007] I----------                         │  └──▌  CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt]
               [000006] -----------                         └──▌  LCL_VAR   ref    V05 tmp1          (last use)

***** BB01
STMT00004 ( 0x00A[E-] ... 0x014 )
               [000025] -ACXG------                         ▌  ASG       struct (copy)
               [000024] D------N---                         ├──▌  LCL_VAR   struct<S0, 24> V00 loc0         
               [000023] --CXG------                         └──▌  FIELD     struct S1:F2
               [000022] --CXG------                            └──▌  COMMA     byref 
               [000021] H-CXG------                               ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000019] ----------- arg0                          │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000020] ----------- arg1                          │  └──▌  CNS_INT   int    5
               [000017] -----------                               └──▌  ADD       byref 
               [000015] #----------                                  ├──▌  IND       ref   
               [000014] I----------                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000016] -----------                                  └──▌  CNS_INT   long   8 Fseq[s_2]

***** BB01
STMT00005 ( 0x015[E-] ... 0x018 )
               [000029] IA---------                         ▌  ASG       struct (init)
               [000027] D------N---                         ├──▌  LCL_VAR   struct<S1, 24> V01 loc1         
               [000028] -----------                         └──▌  CNS_INT   int    0

***** BB01
STMT00010 ( ??? ... ??? )
               [000065] --CXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort)
               [000048] ----------- arg0                    ├──▌  LCL_VAR   struct<S1, 24> V01 loc1          (last use)
               [000051] ----------- arg1                    ├──▌  LCL_FLD   ubyte  V00 loc0         [+0]
               [000040] --CXG------ arg2                    ├──▌  FIELD     int    S0:F4
               [000039] --CXG------                         │  └──▌  FIELD_ADDR byref  S1:F2
               [000038] --CXG------                         │     └──▌  COMMA     byref 
               [000037] H-CXG------                         │        ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000035] ----------- arg0                    │        │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000036] ----------- arg1                    │        │  └──▌  CNS_INT   int    5
               [000033] -----------                         │        └──▌  ADD       byref 
               [000031] #----------                         │           ├──▌  IND       ref   
               [000030] I----------                         │           │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000032] -----------                         │           └──▌  CNS_INT   long   8 Fseq[s_2]
               [000045] --CXG------ arg3                    ├──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC
               [000044] H---------- arg0                    │  ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class
               [000043] ----------- arg1                    │  └──▌  CNS_INT   long   1
               [000074] --CXG------ arg4                    ├──▌  CAST      int <- byte <- int
               [000063] --CXG------                         │  └──▌  CAST      int <- byte <- long
               [000056] --CXG------                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong
               [000058] ----------- arg0                    │        ├──▌  LCL_VAR   struct<S0, 24> V00 loc0          (last use)
               [000072] ----------- arg1                    │        └──▌  CNS_INT   int    0
               [000075] ----------- arg5                    └──▌  CNS_INT   int    1

***** BB01
STMT00011 ( 0x04B[E-] ... ??? )
               [000068] -----------                         ▌  RETURN    void  

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
*************** In fgDebugCheckLoopTable: loop table not valid

*************** Starting PHASE Morph - ByRefs

*************** Finishing PHASE Morph - ByRefs [no changes]

*************** Starting PHASE Morph - Global

*************** In fgMorphBlocks()

Morphing BB01 of 'Program:Main()'

fgMorphTree BB01, STMT00000 (before)
               [000003] -AC--------                         ▌  ASG       ref   
               [000002] D------N---                         ├──▌  LCL_VAR   ref    V05 tmp1         
               [000001] --C--------                         └──▌  CALL help ref    CORINFO_HELP_NEWSFAST
               [000000] H---------- arg0                       └──▌  CNS_INT(h) long   0x7ff93744e858 class
Initializing arg info for 1.CALL:
Args for call [000001] CALL after AddFinalArgsAndDetermineABIInfo:
CallArg[[000000].CNS_INT long (By value), 1 reg: rcx, byteAlignment=8]

Morphing args for 1.CALL:

Sorting the arguments:
Deferred argument ('rcx'):
               [000000] H----+-----                         ▌  CNS_INT(h) long   0x7ff93744e858 class
Moved to late list

Register placement order:    rcx 
Args for [000001].CALL after fgMorphArgs:
CallArg[[000000].CNS_INT long (By value), 1 reg: rcx, byteAlignment=8, isLate, processed]
OutgoingArgsStackSize is 32


fgMorphTree BB01, STMT00002 (before)
               [000013] H-CXG------                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000011] ----------- arg0                    ├──▌  CNS_INT   long   0x7ff9372b1818
               [000012] ----------- arg1                    └──▌  CNS_INT   int    5
Initializing arg info for 13.CALL:
Args for call [000013] CALL after AddFinalArgsAndDetermineABIInfo:
CallArg[[000011].CNS_INT long (By value), 1 reg: rcx, byteAlignment=8]
CallArg[[000012].CNS_INT int (By value), 1 reg: rdx, byteAlignment=8]

Morphing args for 13.CALL:

Sorting the arguments:
Deferred argument ('rcx'):
               [000011] -----+-----                         ▌  CNS_INT   long   0x7ff9372b1818
Moved to late list
Deferred argument ('rdx'):
               [000012] -----+-----                         ▌  CNS_INT   int    5
Moved to late list

Register placement order:    rcx rdx 
Args for [000013].CALL after fgMorphArgs:
CallArg[[000011].CNS_INT long (By value), 1 reg: rcx, byteAlignment=8, isLate, processed]
CallArg[[000012].CNS_INT int (By value), 1 reg: rdx, byteAlignment=8, isLate, processed]
OutgoingArgsStackSize is 32


fgMorphTree BB01, STMT00003 (before)
               [000009] -A--G------                         ▌  ASG       ref   
               [000008] h---G--N---                         ├──▌  IND       ref   
               [000007] I----------                         │  └──▌  CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt]
               [000006] -----------                         └──▌  LCL_VAR   ref    V05 tmp1          (last use)

fgMorphTree BB01, STMT00004 (before)
               [000025] -ACXG------                         ▌  ASG       struct (copy)
               [000024] D------N---                         ├──▌  LCL_VAR   struct<S0, 24> V00 loc0         
               [000023] --CXG------                         └──▌  FIELD     struct S1:F2
               [000022] --CXG------                            └──▌  COMMA     byref 
               [000021] H-CXG------                               ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000019] ----------- arg0                          │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000020] ----------- arg1                          │  └──▌  CNS_INT   int    5
               [000017] -----------                               └──▌  ADD       byref 
               [000015] #----------                                  ├──▌  IND       ref   
               [000014] I----------                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000016] -----------                                  └──▌  CNS_INT   long   8 Fseq[s_2]
Initializing arg info for 21.CALL:
Args for call [000021] CALL after AddFinalArgsAndDetermineABIInfo:
CallArg[[000019].CNS_INT long (By value), 1 reg: rcx, byteAlignment=8]
CallArg[[000020].CNS_INT int (By value), 1 reg: rdx, byteAlignment=8]

Morphing args for 21.CALL:

Sorting the arguments:
Deferred argument ('rcx'):
               [000019] -----+-----                         ▌  CNS_INT   long   0x7ff9372b1818
Moved to late list
Deferred argument ('rdx'):
               [000020] -----+-----                         ▌  CNS_INT   int    5
Moved to late list

Register placement order:    rcx rdx 
Args for [000021].CALL after fgMorphArgs:
CallArg[[000019].CNS_INT long (By value), 1 reg: rcx, byteAlignment=8, isLate, processed]
CallArg[[000020].CNS_INT int (By value), 1 reg: rdx, byteAlignment=8, isLate, processed]
OutgoingArgsStackSize is 32


Final value of Compiler::fgMorphField after morphing:
               [000023] n-CXG------                         ▌  OBJ       struct<S0, 24>
               [000022] --CXG+-----                         └──▌  COMMA     byref 
               [000021] H-CXG+-----                            ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000019] -----+----- arg0 in rcx                │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000020] -----+----- arg1 in rdx                │  └──▌  CNS_INT   int    5
               [000017] -----+-----                            └──▌  ADD       byref 
               [000015] #----+-----                               ├──▌  IND       ref   
               [000014] I----+-----                               │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000016] -----+-----                               └──▌  CNS_INT   long   8 Fseq[s_2]
MorphCopyBlock:
MorphBlock for dst tree, before:
               [000024] D----+-N---                         ▌  LCL_VAR   struct<S0, 24> V00 loc0         
MorphBlock after:
               [000024] D----+-N---                         ▌  LCL_VAR   struct<S0, 24> V00 loc0         
PrepareDst for [000024] have found a local var V00.
MorphBlock for src tree, before:
               [000023] n-CXG+-----                         ▌  OBJ       struct<S0, 24>
               [000022] --CXG+-----                         └──▌  COMMA     byref 
               [000021] H-CXG+-----                            ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000019] -----+----- arg0 in rcx                │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000020] -----+----- arg1 in rdx                │  └──▌  CNS_INT   int    5
               [000017] -----+-----                            └──▌  ADD       byref 
               [000015] #----+-----                               ├──▌  IND       ref   
               [000014] I----+-----                               │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000016] -----+-----                               └──▌  CNS_INT   long   8 Fseq[s_2]
MorphBlock after:
               [000023] n-CXG+-----                         ▌  OBJ       struct<S0, 24>
               [000022] --CXG+-----                         └──▌  COMMA     byref 
               [000021] H-CXG+-----                            ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000019] -----+----- arg0 in rcx                │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000020] -----+----- arg1 in rdx                │  └──▌  CNS_INT   int    5
               [000017] -----+-----                            └──▌  ADD       byref 
               [000015] #----+-----                               ├──▌  IND       ref   
               [000014] I----+-----                               │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000016] -----+-----                               └──▌  CNS_INT   long   8 Fseq[s_2]
block assignment to morph:
               [000025] -ACXG------                         ▌  ASG       struct (copy)
               [000024] D----+-N---                         ├──▌  LCL_VAR   struct<S0, 24> V00 loc0         
               [000023] n-CXG+-----                         └──▌  OBJ       struct<S0, 24>
               [000022] --CXG+-----                            └──▌  COMMA     byref 
               [000021] H-CXG+-----                               ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000019] -----+----- arg0 in rcx                   │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000020] -----+----- arg1 in rdx                   │  └──▌  CNS_INT   int    5
               [000017] -----+-----                               └──▌  ADD       byref 
               [000015] #----+-----                                  ├──▌  IND       ref   
               [000014] I----+-----                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000016] -----+-----                                  └──▌  CNS_INT   long   8 Fseq[s_2]
 with no promoted structs this requires a CopyBlock.
MorphCopyBlock (after):
               [000025] -ACXG------                         ▌  ASG       struct (copy)
               [000024] D----+-N---                         ├──▌  LCL_VAR   struct<S0, 24> V00 loc0         
               [000023] n-CXG+-----                         └──▌  OBJ       struct<S0, 24>
               [000022] --CXG+-----                            └──▌  COMMA     byref 
               [000021] H-CXG+-----                               ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000019] -----+----- arg0 in rcx                   │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000020] -----+----- arg1 in rdx                   │  └──▌  CNS_INT   int    5
               [000017] -----+-----                               └──▌  ADD       byref 
               [000015] #----+-----                                  ├──▌  IND       ref   
               [000014] I----+-----                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000016] -----+-----                                  └──▌  CNS_INT   long   8 Fseq[s_2]

fgMorphTree BB01, STMT00004 (after)
               [000025] -ACXG+-----                         ▌  ASG       struct (copy)
               [000024] D----+-N---                         ├──▌  LCL_VAR   struct<S0, 24> V00 loc0         
               [000023] n-CXG+-----                         └──▌  OBJ       struct<S0, 24>
               [000022] --CXG+-----                            └──▌  COMMA     byref 
               [000021] H-CXG+-----                               ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000019] -----+----- arg0 in rcx                   │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000020] -----+----- arg1 in rdx                   │  └──▌  CNS_INT   int    5
               [000017] -----+-----                               └──▌  ADD       byref 
               [000015] #----+-----                                  ├──▌  IND       ref   
               [000014] I----+-----                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000016] -----+-----                                  └──▌  CNS_INT   long   8 Fseq[s_2]

fgMorphTree BB01, STMT00005 (before)
               [000029] IA---------                         ▌  ASG       struct (init)
               [000027] D------N---                         ├──▌  LCL_VAR   struct<S1, 24> V01 loc1         
               [000028] -----------                         └──▌  CNS_INT   int    0
MorphInitBlock:
MorphBlock for dst tree, before:
               [000027] D----+-N---                         ▌  LCL_VAR   struct<S1, 24> V01 loc1         
MorphBlock after:
               [000027] D----+-N---                         ▌  LCL_VAR   struct<S1, 24> V01 loc1         
PrepareDst for [000027] have found a local var V01.
GenTreeNode creates assertion:
               [000029] IA---------                         ▌  ASG       struct (init)
In BB01 New Local Constant Assertion: V01 == ZeroObj, index = #01
MorphInitBlock (after):
               [000029] IA---------                         ▌  ASG       struct (init)
               [000027] D----+-N---                         ├──▌  LCL_VAR   struct<S1, 24> V01 loc1         
               [000028] -----+-----                         └──▌  CNS_INT   int    0

fgMorphTree BB01, STMT00010 (before)
               [000065] --CXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort)
               [000048] ----------- arg0                    ├──▌  LCL_VAR   struct<S1, 24> V01 loc1          (last use)
               [000051] ----------- arg1                    ├──▌  LCL_FLD   ubyte  V00 loc0         [+0]
               [000040] --CXG------ arg2                    ├──▌  FIELD     int    S0:F4
               [000039] --CXG------                         │  └──▌  FIELD_ADDR byref  S1:F2
               [000038] --CXG------                         │     └──▌  COMMA     byref 
               [000037] H-CXG------                         │        ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000035] ----------- arg0                    │        │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000036] ----------- arg1                    │        │  └──▌  CNS_INT   int    5
               [000033] -----------                         │        └──▌  ADD       byref 
               [000031] #----------                         │           ├──▌  IND       ref   
               [000030] I----------                         │           │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000032] -----------                         │           └──▌  CNS_INT   long   8 Fseq[s_2]
               [000045] --CXG------ arg3                    ├──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC
               [000044] H---------- arg0                    │  ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class
               [000043] ----------- arg1                    │  └──▌  CNS_INT   long   1
               [000074] --CXG------ arg4                    ├──▌  CAST      int <- byte <- int
               [000063] --CXG------                         │  └──▌  CAST      int <- byte <- long
               [000056] --CXG------                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong
               [000058] ----------- arg0                    │        ├──▌  LCL_VAR   struct<S0, 24> V00 loc0          (last use)
               [000072] ----------- arg1                    │        └──▌  CNS_INT   int    0
               [000075] ----------- arg5                    └──▌  CNS_INT   int    1
Initializing arg info for 65.CALL:
Args for call [000065] CALL after AddFinalArgsAndDetermineABIInfo:
CallArg[[000048].LCL_VAR struct (By ref), 1 reg: rcx, byteAlignment=8, isStruct]
CallArg[[000051].LCL_FLD ubyte (By value), 1 reg: rdx, byteAlignment=8]
CallArg[[000040].FIELD int (By value), 1 reg: r8, byteAlignment=8]
CallArg[[000045].CALL ref (By value), 1 reg: r9, byteAlignment=8]
CallArg[[000074].CAST byte (By value), byteSize=8, byteOffset=32, byteAlignment=8]
CallArg[[000075].CNS_INT ushort (By value), byteSize=8, byteOffset=40, byteAlignment=8]

Morphing args for 65.CALL:

Local V01 should not be enregistered because: it is address exposed

The assignment [000048] using V01 removes: Constant Assertion: V01 == ZeroObj
did not need to make outgoing copy for last use of V01
Initializing arg info for 37.CALL:
Args for call [000037] CALL after AddFinalArgsAndDetermineABIInfo:
CallArg[[000035].CNS_INT long (By value), 1 reg: rcx, byteAlignment=8]
CallArg[[000036].CNS_INT int (By value), 1 reg: rdx, byteAlignment=8]

Morphing args for 37.CALL:

Sorting the arguments:
Deferred argument ('rcx'):
               [000035] -----+-----                         ▌  CNS_INT   long   0x7ff9372b1818
Moved to late list
Deferred argument ('rdx'):
               [000036] -----+-----                         ▌  CNS_INT   int    5
Moved to late list

Register placement order:    rcx rdx 
Args for [000037].CALL after fgMorphArgs:
CallArg[[000035].CNS_INT long (By value), 1 reg: rcx, byteAlignment=8, isLate, processed]
CallArg[[000036].CNS_INT int (By value), 1 reg: rdx, byteAlignment=8, isLate, processed]
OutgoingArgsStackSize is 32


Final value of Compiler::fgMorphField after morphing:
               [000038] --CXG+-N---                         ▌  COMMA     byref 
               [000037] H-CXG+-----                         ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000035] -----+----- arg0 in rcx             │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000036] -----+----- arg1 in rdx             │  └──▌  CNS_INT   int    5
               [000033] -----+-----                         └──▌  ADD       byref 
               [000031] #----+-----                            ├──▌  IND       ref   
               [000030] I----+-----                            │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000032] -----+-----                            └──▌  CNS_INT   long   8 Fseq[s_2]

Folding long operator with constant nodes into a constant:
               [000086] -----------                         ▌  ADD       long  
               [000032] -----+-----                         ├──▌  CNS_INT   long   8 Fseq[s_2]
               [000084] -----+-----                         └──▌  CNS_INT   long   4
Bashed to long constant:
               [000086] -----------                         ▌  CNS_INT   long   12 Fseq[s_2, 4]

Final value of Compiler::fgMorphField after morphing:
               [000038] --CXG+-----                         ▌  COMMA     int   
               [000037] H-CXG+-----                         ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000035] -----+----- arg0 in rcx             │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000036] -----+----- arg1 in rdx             │  └──▌  CNS_INT   int    5
               [000087] n---G+-----                         └──▌  IND       int   
               [000033] -----+-----                            └──▌  ADD       byref 
               [000031] #----+-----                               ├──▌  IND       ref   
               [000030] I----+-----                               │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000032] -----+-----                               └──▌  CNS_INT   long   12 Fseq[s_2, 4]
Initializing arg info for 45.CALL:
Args for call [000045] CALL after AddFinalArgsAndDetermineABIInfo:
CallArg[[000044].CNS_INT long (By value), 1 reg: rcx, byteAlignment=8]
CallArg[[000043].CNS_INT long (By value), 1 reg: rdx, byteAlignment=8]

Morphing args for 45.CALL:

Sorting the arguments:
Deferred argument ('rcx'):
               [000044] H----+-----                         ▌  CNS_INT(h) long   0x7ff93744e2d8 class
Moved to late list
Deferred argument ('rdx'):
               [000043] -----+-----                         ▌  CNS_INT   long   1
Moved to late list

Register placement order:    rcx rdx 
Args for [000045].CALL after fgMorphArgs:
CallArg[[000044].CNS_INT long (By value), 1 reg: rcx, byteAlignment=8, isLate, processed]
CallArg[[000043].CNS_INT long (By value), 1 reg: rdx, byteAlignment=8, isLate, processed]
OutgoingArgsStackSize is 32

Initializing arg info for 56.CALL:
Args for call [000056] CALL after AddFinalArgsAndDetermineABIInfo:
CallArg[[000058].LCL_VAR struct (By ref), 1 reg: rcx, byteAlignment=8, isStruct]
CallArg[[000072].CNS_INT ushort (By value), 1 reg: rdx, byteAlignment=8]

Morphing args for 56.CALL:

Local V00 should not be enregistered because: it is address exposed
did not need to make outgoing copy for last use of V00

Sorting the arguments:
Deferred argument ('rcx'):
               [000058] -----+-----                         ▌  LCL_VAR_ADDR long   V00 loc0         
Moved to late list
Deferred argument ('rdx'):
               [000072] -----+-----                         ▌  CNS_INT   int    0
Moved to late list

Register placement order:    rcx rdx 
Args for [000056].CALL after fgMorphArgs:
CallArg[[000058].LCL_VAR_ADDR struct (By ref), 1 reg: rcx, byteAlignment=8, isLate, processed, isStruct]
CallArg[[000072].CNS_INT ushort (By value), 1 reg: rdx, byteAlignment=8, isLate, processed]
OutgoingArgsStackSize is 32


Sorting the arguments:
Argument with 'side effect'...
               [000038] --CXG+-----                         ▌  COMMA     int   
               [000037] H-CXG+-----                         ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000035] -----+----- arg0 in rcx             │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000036] -----+----- arg1 in rdx             │  └──▌  CNS_INT   int    5
               [000087] n---G+-----                         └──▌  IND       int   
               [000033] -----+-----                            └──▌  ADD       byref 
               [000031] #----+-----                               ├──▌  IND       ref   
               [000030] I----+-----                               │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000032] -----+-----                               └──▌  CNS_INT   long   12 Fseq[s_2, 4]

lvaGrabTemp returning 7 (V07 tmp3) called for argument with side effect.

  Evaluate to a temp:
               [000089] -ACXG------                         ▌  ASG       int   
               [000088] D------N---                         ├──▌  LCL_VAR   int    V07 tmp3         
               [000038] --CXG+-----                         └──▌  COMMA     int   
               [000037] H-CXG+-----                            ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000035] -----+----- arg0 in rcx                │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000036] -----+----- arg1 in rdx                │  └──▌  CNS_INT   int    5
               [000087] n---G+-----                            └──▌  IND       int   
               [000033] -----+-----                               └──▌  ADD       byref 
               [000031] #----+-----                                  ├──▌  IND       ref   
               [000030] I----+-----                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000032] -----+-----                                  └──▌  CNS_INT   long   12 Fseq[s_2, 4]
Argument with 'side effect'...
               [000045] --CXG+-----                         ▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC
               [000044] H----+----- arg0 in rcx             ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class
               [000043] -----+----- arg1 in rdx             └──▌  CNS_INT   long   1

lvaGrabTemp returning 8 (V08 tmp4) called for argument with side effect.

  Evaluate to a temp:
               [000092] -ACXG------                         ▌  ASG       ref   
               [000091] D------N---                         ├──▌  LCL_VAR   ref    V08 tmp4         
               [000045] --CXG+-----                         └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC
               [000044] H----+----- arg0 in rcx                ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class
               [000043] -----+----- arg1 in rdx                └──▌  CNS_INT   long   1
Argument with 'side effect'...
               [000063] --CXG+-----                         ▌  CAST      int <- byte <- long
               [000056] --CXG+-----                         └──▌  CALL      long   Program:M23(S0,ushort):ulong
               [000058] -----+----- arg0 in rcx                ├──▌  LCL_VAR_ADDR long   V00 loc0         
               [000072] -----+----- arg1 in rdx                └──▌  CNS_INT   int    0

lvaGrabTemp returning 9 (V09 tmp5) called for argument with side effect.

  Evaluate to a temp:
               [000095] -ACXG------                         ▌  ASG       int   
               [000094] D------N---                         ├──▌  LCL_VAR   int    V09 tmp5         
               [000063] --CXG+-----                         └──▌  CAST      int <- byte <- long
               [000056] --CXG+-----                            └──▌  CALL      long   Program:M23(S0,ushort):ulong
               [000058] -----+----- arg0 in rcx                   ├──▌  LCL_VAR_ADDR long   V00 loc0         
               [000072] -----+----- arg1 in rdx                   └──▌  CNS_INT   int    0
Deferred argument ('rcx'):
               [000048] -----+-----                         ▌  LCL_VAR_ADDR long   V01 loc1         
Moved to late list
Deferred argument ('rdx'):
               [000051] -----+-----                         ▌  LCL_FLD   ubyte (AX) V00 loc0         [+0]
Moved to late list

Register placement order:    r8 r9 rcx rdx 
Args for [000065].CALL after fgMorphArgs:
CallArg[[000048].LCL_VAR_ADDR struct (By ref), 1 reg: rcx, byteAlignment=8, isLate, processed, isStruct]
CallArg[[000051].LCL_FLD ubyte (By value), 1 reg: rdx, byteAlignment=8, isLate, processed]
CallArg[[000090].LCL_VAR int (By value), 1 reg: r8, byteAlignment=8, isLate, tmpNum=V07, isTmp, processed]
CallArg[[000093].LCL_VAR ref (By value), 1 reg: r9, byteAlignment=8, isLate, tmpNum=V08, isTmp, processed]
CallArg[[000096].LCL_VAR byte (By value), byteSize=8, byteOffset=32, byteAlignment=8, isLate, tmpNum=V09, isTmp, processed]
CallArg[[000075].CNS_INT ushort (By value), byteSize=8, byteOffset=40, byteAlignment=8, processed]
OutgoingArgsStackSize is 48


fgMorphTree BB01, STMT00010 (after)
               [000065] --CXG+-----                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort)
               [000089] -ACXG------ arg2 setup              ├──▌  ASG       int   
               [000088] D------N---                         │  ├──▌  LCL_VAR   int    V07 tmp3         
               [000038] --CXG+-----                         │  └──▌  COMMA     int   
               [000037] H-CXG+-----                         │     ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000035] -----+----- arg0 in rcx             │     │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000036] -----+----- arg1 in rdx             │     │  └──▌  CNS_INT   int    5
               [000087] n---G+-----                         │     └──▌  IND       int   
               [000033] -----+-----                         │        └──▌  ADD       byref 
               [000031] #----+-----                         │           ├──▌  IND       ref   
               [000030] I----+-----                         │           │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000032] -----+-----                         │           └──▌  CNS_INT   long   12 Fseq[s_2, 4]
               [000092] -ACXG------ arg3 setup              ├──▌  ASG       ref   
               [000091] D------N---                         │  ├──▌  LCL_VAR   ref    V08 tmp4         
               [000045] --CXG+-----                         │  └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC
               [000044] H----+----- arg0 in rcx             │     ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class
               [000043] -----+----- arg1 in rdx             │     └──▌  CNS_INT   long   1
               [000095] -ACXG------ arg4 setup              ├──▌  ASG       int   
               [000094] D------N---                         │  ├──▌  LCL_VAR   int    V09 tmp5         
               [000063] --CXG+-----                         │  └──▌  CAST      int <- byte <- long
               [000056] --CXG+-----                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong
               [000058] -----+----- arg0 in rcx             │        ├──▌  LCL_VAR_ADDR long   V00 loc0         
               [000072] -----+----- arg1 in rdx             │        └──▌  CNS_INT   int    0
               [000075] -----+----- arg5 out+28             ├──▌  CNS_INT   int    1
               [000090] ----------- arg2 in r8              ├──▌  LCL_VAR   int    V07 tmp3         
               [000093] ----------- arg3 in r9              ├──▌  LCL_VAR   ref    V08 tmp4         
               [000096] ----------- arg4 in out+20          ├──▌  LCL_VAR   int    V09 tmp5         
               [000048] -----+----- arg0 in rcx             ├──▌  LCL_VAR_ADDR long   V01 loc1         
               [000051] -----+----- arg1 in rdx             └──▌  LCL_FLD   ubyte (AX) V00 loc0         [+0]

fgMorphTree BB01, STMT00011 (before)
               [000068] -----------                         ▌  RETURN    void  

*************** In fgMarkDemotedImplicitByRefArgs()

*************** Finishing PHASE Morph - Global
Trees after Morph - Global

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..04C) (return), preds={} succs={}

***** BB01
STMT00000 ( 0x000[E-] ... 0x005 )
               [000003] -AC--+-----                         ▌  ASG       ref   
               [000002] D----+-N---                         ├──▌  LCL_VAR   ref    V05 tmp1         
               [000001] --C--+-----                         └──▌  CALL help ref    CORINFO_HELP_NEWSFAST
               [000000] H----+----- arg0 in rcx                └──▌  CNS_INT(h) long   0x7ff93744e858 class

***** BB01
STMT00002 ( 0x005[--] ... ??? )
               [000013] H-CXG+-----                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000011] -----+----- arg0 in rcx             ├──▌  CNS_INT   long   0x7ff9372b1818
               [000012] -----+----- arg1 in rdx             └──▌  CNS_INT   int    5

***** BB01
STMT00003 ( ??? ... ??? )
               [000009] -A--G+-----                         ▌  ASG       ref   
               [000008] h---G+-N---                         ├──▌  IND       ref   
               [000007] I----+-----                         │  └──▌  CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt]
               [000006] -----+-----                         └──▌  LCL_VAR   ref    V05 tmp1          (last use)

***** BB01
STMT00004 ( 0x00A[E-] ... 0x014 )
               [000025] -ACXG+-----                         ▌  ASG       struct (copy)
               [000024] D----+-N---                         ├──▌  LCL_VAR   struct<S0, 24>(AX) V00 loc0         
               [000023] n-CXG+-----                         └──▌  OBJ       struct<S0, 24>
               [000022] --CXG+-----                            └──▌  COMMA     byref 
               [000021] H-CXG+-----                               ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000019] -----+----- arg0 in rcx                   │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000020] -----+----- arg1 in rdx                   │  └──▌  CNS_INT   int    5
               [000017] -----+-----                               └──▌  ADD       byref 
               [000015] #----+-----                                  ├──▌  IND       ref   
               [000014] I----+-----                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000016] -----+-----                                  └──▌  CNS_INT   long   8 Fseq[s_2]

***** BB01
STMT00005 ( 0x015[E-] ... 0x018 )
               [000029] IA---+-----                         ▌  ASG       struct (init)
               [000027] D----+-N---                         ├──▌  LCL_VAR   struct<S1, 24>(AX) V01 loc1         
               [000028] -----+-----                         └──▌  CNS_INT   int    0

***** BB01
STMT00010 ( ??? ... ??? )
               [000065] --CXG+-----                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort)
               [000089] -ACXG------ arg2 setup              ├──▌  ASG       int   
               [000088] D------N---                         │  ├──▌  LCL_VAR   int    V07 tmp3         
               [000038] --CXG+-----                         │  └──▌  COMMA     int   
               [000037] H-CXG+-----                         │     ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000035] -----+----- arg0 in rcx             │     │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000036] -----+----- arg1 in rdx             │     │  └──▌  CNS_INT   int    5
               [000087] n---G+-----                         │     └──▌  IND       int   
               [000033] -----+-----                         │        └──▌  ADD       byref 
               [000031] #----+-----                         │           ├──▌  IND       ref   
               [000030] I----+-----                         │           │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000032] -----+-----                         │           └──▌  CNS_INT   long   12 Fseq[s_2, 4]
               [000092] -ACXG------ arg3 setup              ├──▌  ASG       ref   
               [000091] D------N---                         │  ├──▌  LCL_VAR   ref    V08 tmp4         
               [000045] --CXG+-----                         │  └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC
               [000044] H----+----- arg0 in rcx             │     ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class
               [000043] -----+----- arg1 in rdx             │     └──▌  CNS_INT   long   1
               [000095] -ACXG------ arg4 setup              ├──▌  ASG       int   
               [000094] D------N---                         │  ├──▌  LCL_VAR   int    V09 tmp5         
               [000063] --CXG+-----                         │  └──▌  CAST      int <- byte <- long
               [000056] --CXG+-----                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong
               [000058] -----+----- arg0 in rcx             │        ├──▌  LCL_VAR_ADDR long   V00 loc0         
               [000072] -----+----- arg1 in rdx             │        └──▌  CNS_INT   int    0
               [000075] -----+----- arg5 out+28             ├──▌  CNS_INT   int    1
               [000090] ----------- arg2 in r8              ├──▌  LCL_VAR   int    V07 tmp3         
               [000093] ----------- arg3 in r9              ├──▌  LCL_VAR   ref    V08 tmp4         
               [000096] ----------- arg4 in out+20          ├──▌  LCL_VAR   int    V09 tmp5         
               [000048] -----+----- arg0 in rcx             ├──▌  LCL_VAR_ADDR long   V01 loc1         
               [000051] -----+----- arg1 in rdx             └──▌  LCL_FLD   ubyte (AX) V00 loc0         [+0]

***** BB01
STMT00011 ( 0x04B[E-] ... ??? )
               [000068] -----+-----                         ▌  RETURN    void  

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
*************** In fgDebugCheckLoopTable: loop table not valid

*************** Starting PHASE GS Cookie
No GS security needed

*************** Finishing PHASE GS Cookie [no changes]

*************** Starting PHASE Compute edge weights (1, false)

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

 -- no profile data, so using default called count
 -- not optimizing or no profile data, so not computing edge weights

*************** Finishing PHASE Compute edge weights (1, false) [no changes]

*************** Starting PHASE Create EH funclets

*************** Finishing PHASE Create EH funclets [no changes]

*************** Starting PHASE Invert loops

*************** Finishing PHASE Invert loops [no changes]

*************** Starting PHASE Optimize control flow

*************** In fgUpdateFlowGraph()
Before updating the flow graph:

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

*************** In fgDebugCheckBBlist

*************** In fgUpdateFlowGraph()
Before updating the flow graph:

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

*************** In fgDebugCheckBBlist

*************** Finishing PHASE Optimize control flow
Trees after Optimize control flow

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..04C) (return), preds={} succs={}

***** BB01
STMT00000 ( 0x000[E-] ... 0x005 )
               [000003] -AC--+-----                         ▌  ASG       ref   
               [000002] D----+-N---                         ├──▌  LCL_VAR   ref    V05 tmp1         
               [000001] --C--+-----                         └──▌  CALL help ref    CORINFO_HELP_NEWSFAST
               [000000] H----+----- arg0 in rcx                └──▌  CNS_INT(h) long   0x7ff93744e858 class

***** BB01
STMT00002 ( 0x005[--] ... ??? )
               [000013] H-CXG+-----                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000011] -----+----- arg0 in rcx             ├──▌  CNS_INT   long   0x7ff9372b1818
               [000012] -----+----- arg1 in rdx             └──▌  CNS_INT   int    5

***** BB01
STMT00003 ( ??? ... ??? )
               [000009] -A--G+-----                         ▌  ASG       ref   
               [000008] h---G+-N---                         ├──▌  IND       ref   
               [000007] I----+-----                         │  └──▌  CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt]
               [000006] -----+-----                         └──▌  LCL_VAR   ref    V05 tmp1          (last use)

***** BB01
STMT00004 ( 0x00A[E-] ... 0x014 )
               [000025] -ACXG+-----                         ▌  ASG       struct (copy)
               [000024] D----+-N---                         ├──▌  LCL_VAR   struct<S0, 24>(AX) V00 loc0         
               [000023] n-CXG+-----                         └──▌  OBJ       struct<S0, 24>
               [000022] --CXG+-----                            └──▌  COMMA     byref 
               [000021] H-CXG+-----                               ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000019] -----+----- arg0 in rcx                   │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000020] -----+----- arg1 in rdx                   │  └──▌  CNS_INT   int    5
               [000017] -----+-----                               └──▌  ADD       byref 
               [000015] #----+-----                                  ├──▌  IND       ref   
               [000014] I----+-----                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000016] -----+-----                                  └──▌  CNS_INT   long   8 Fseq[s_2]

***** BB01
STMT00005 ( 0x015[E-] ... 0x018 )
               [000029] IA---+-----                         ▌  ASG       struct (init)
               [000027] D----+-N---                         ├──▌  LCL_VAR   struct<S1, 24>(AX) V01 loc1         
               [000028] -----+-----                         └──▌  CNS_INT   int    0

***** BB01
STMT00010 ( ??? ... ??? )
               [000065] --CXG+-----                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort)
               [000089] -ACXG------ arg2 setup              ├──▌  ASG       int   
               [000088] D------N---                         │  ├──▌  LCL_VAR   int    V07 tmp3         
               [000038] --CXG+-----                         │  └──▌  COMMA     int   
               [000037] H-CXG+-----                         │     ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000035] -----+----- arg0 in rcx             │     │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000036] -----+----- arg1 in rdx             │     │  └──▌  CNS_INT   int    5
               [000087] n---G+-----                         │     └──▌  IND       int   
               [000033] -----+-----                         │        └──▌  ADD       byref 
               [000031] #----+-----                         │           ├──▌  IND       ref   
               [000030] I----+-----                         │           │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000032] -----+-----                         │           └──▌  CNS_INT   long   12 Fseq[s_2, 4]
               [000092] -ACXG------ arg3 setup              ├──▌  ASG       ref   
               [000091] D------N---                         │  ├──▌  LCL_VAR   ref    V08 tmp4         
               [000045] --CXG+-----                         │  └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC
               [000044] H----+----- arg0 in rcx             │     ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class
               [000043] -----+----- arg1 in rdx             │     └──▌  CNS_INT   long   1
               [000095] -ACXG------ arg4 setup              ├──▌  ASG       int   
               [000094] D------N---                         │  ├──▌  LCL_VAR   int    V09 tmp5         
               [000063] --CXG+-----                         │  └──▌  CAST      int <- byte <- long
               [000056] --CXG+-----                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong
               [000058] -----+----- arg0 in rcx             │        ├──▌  LCL_VAR_ADDR long   V00 loc0         
               [000072] -----+----- arg1 in rdx             │        └──▌  CNS_INT   int    0
               [000075] -----+----- arg5 out+28             ├──▌  CNS_INT   int    1
               [000090] ----------- arg2 in r8              ├──▌  LCL_VAR   int    V07 tmp3         
               [000093] ----------- arg3 in r9              ├──▌  LCL_VAR   ref    V08 tmp4         
               [000096] ----------- arg4 in out+20          ├──▌  LCL_VAR   int    V09 tmp5         
               [000048] -----+----- arg0 in rcx             ├──▌  LCL_VAR_ADDR long   V01 loc1         
               [000051] -----+----- arg1 in rdx             └──▌  LCL_FLD   ubyte (AX) V00 loc0         [+0]

***** BB01
STMT00011 ( 0x04B[E-] ... ??? )
               [000068] -----+-----                         ▌  RETURN    void  

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
*************** In fgDebugCheckLoopTable: loop table not valid

*************** Starting PHASE Post-morph tail merge

*************** Finishing PHASE Post-morph tail merge [no changes]

*************** Starting PHASE Compute blocks reachability
Return blocks: BB01

Renumbering the basic blocks for fgComputeReachability pass #1

*************** Before renumbering the basic blocks

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

***************  Exception Handling table is empty

*************** After renumbering the basic blocks
=============== No blocks renumbered!
Enter blocks: BB01 

After computing reachability sets:
------------------------------------------------
BBnum  Reachable by 
------------------------------------------------
BB01 : BB01 
*************** In fgComputeDoms
*************** In fgDebugCheckBBlist

Dominator computation start blocks (those blocks with no incoming edges):
BB01 
------------------------------------------------
BBnum  Dominated by
------------------------------------------------
BB01:  BB01 

Inside fgBuildDomTree

After computing the Dominance Tree:


After numbering the dominator tree:
BB01: pre=01, post=01

*************** Finishing PHASE Compute blocks reachability [no changes]

*************** Starting PHASE Set block weights

*************** Finishing PHASE Set block weights [no changes]

*************** Starting PHASE Find loops
*************** In optFindLoops()
*************** In optMarkLoopHeads()
0 loop heads marked

*************** Finishing PHASE Find loops
Trees after Find loops

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..04C) (return), preds={} succs={}

***** BB01
STMT00000 ( 0x000[E-] ... 0x005 )
               [000003] -AC--+-----                         ▌  ASG       ref   
               [000002] D----+-N---                         ├──▌  LCL_VAR   ref    V05 tmp1         
               [000001] --C--+-----                         └──▌  CALL help ref    CORINFO_HELP_NEWSFAST
               [000000] H----+----- arg0 in rcx                └──▌  CNS_INT(h) long   0x7ff93744e858 class

***** BB01
STMT00002 ( 0x005[--] ... ??? )
               [000013] H-CXG+-----                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000011] -----+----- arg0 in rcx             ├──▌  CNS_INT   long   0x7ff9372b1818
               [000012] -----+----- arg1 in rdx             └──▌  CNS_INT   int    5

***** BB01
STMT00003 ( ??? ... ??? )
               [000009] -A--G+-----                         ▌  ASG       ref   
               [000008] h---G+-N---                         ├──▌  IND       ref   
               [000007] I----+-----                         │  └──▌  CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt]
               [000006] -----+-----                         └──▌  LCL_VAR   ref    V05 tmp1          (last use)

***** BB01
STMT00004 ( 0x00A[E-] ... 0x014 )
               [000025] -ACXG+-----                         ▌  ASG       struct (copy)
               [000024] D----+-N---                         ├──▌  LCL_VAR   struct<S0, 24>(AX) V00 loc0         
               [000023] n-CXG+-----                         └──▌  OBJ       struct<S0, 24>
               [000022] --CXG+-----                            └──▌  COMMA     byref 
               [000021] H-CXG+-----                               ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000019] -----+----- arg0 in rcx                   │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000020] -----+----- arg1 in rdx                   │  └──▌  CNS_INT   int    5
               [000017] -----+-----                               └──▌  ADD       byref 
               [000015] #----+-----                                  ├──▌  IND       ref   
               [000014] I----+-----                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000016] -----+-----                                  └──▌  CNS_INT   long   8 Fseq[s_2]

***** BB01
STMT00005 ( 0x015[E-] ... 0x018 )
               [000029] IA---+-----                         ▌  ASG       struct (init)
               [000027] D----+-N---                         ├──▌  LCL_VAR   struct<S1, 24>(AX) V01 loc1         
               [000028] -----+-----                         └──▌  CNS_INT   int    0

***** BB01
STMT00010 ( ??? ... ??? )
               [000065] --CXG+-----                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort)
               [000089] -ACXG------ arg2 setup              ├──▌  ASG       int   
               [000088] D------N---                         │  ├──▌  LCL_VAR   int    V07 tmp3         
               [000038] --CXG+-----                         │  └──▌  COMMA     int   
               [000037] H-CXG+-----                         │     ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000035] -----+----- arg0 in rcx             │     │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000036] -----+----- arg1 in rdx             │     │  └──▌  CNS_INT   int    5
               [000087] n---G+-----                         │     └──▌  IND       int   
               [000033] -----+-----                         │        └──▌  ADD       byref 
               [000031] #----+-----                         │           ├──▌  IND       ref   
               [000030] I----+-----                         │           │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000032] -----+-----                         │           └──▌  CNS_INT   long   12 Fseq[s_2, 4]
               [000092] -ACXG------ arg3 setup              ├──▌  ASG       ref   
               [000091] D------N---                         │  ├──▌  LCL_VAR   ref    V08 tmp4         
               [000045] --CXG+-----                         │  └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC
               [000044] H----+----- arg0 in rcx             │     ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class
               [000043] -----+----- arg1 in rdx             │     └──▌  CNS_INT   long   1
               [000095] -ACXG------ arg4 setup              ├──▌  ASG       int   
               [000094] D------N---                         │  ├──▌  LCL_VAR   int    V09 tmp5         
               [000063] --CXG+-----                         │  └──▌  CAST      int <- byte <- long
               [000056] --CXG+-----                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong
               [000058] -----+----- arg0 in rcx             │        ├──▌  LCL_VAR_ADDR long   V00 loc0         
               [000072] -----+----- arg1 in rdx             │        └──▌  CNS_INT   int    0
               [000075] -----+----- arg5 out+28             ├──▌  CNS_INT   int    1
               [000090] ----------- arg2 in r8              ├──▌  LCL_VAR   int    V07 tmp3         
               [000093] ----------- arg3 in r9              ├──▌  LCL_VAR   ref    V08 tmp4         
               [000096] ----------- arg4 in out+20          ├──▌  LCL_VAR   int    V09 tmp5         
               [000048] -----+----- arg0 in rcx             ├──▌  LCL_VAR_ADDR long   V01 loc1         
               [000051] -----+----- arg1 in rdx             └──▌  LCL_FLD   ubyte (AX) V00 loc0         [+0]

***** BB01
STMT00011 ( 0x04B[E-] ... ??? )
               [000068] -----+-----                         ▌  RETURN    void  

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
*************** In fgDebugCheckLoopTable

*************** Starting PHASE Clone loops

*************** In optCloneLoops()
  No loops to clone

*************** Finishing PHASE Clone loops [no changes]

*************** Starting PHASE Unroll loops

*************** Finishing PHASE Unroll loops [no changes]

*************** Starting PHASE Clear loop info

*************** Finishing PHASE Clear loop info [no changes]

*************** Starting PHASE Morph array ops
No multi-dimensional array references in the function

*************** Finishing PHASE Morph array ops [no changes]

*************** Starting PHASE Mark local vars

*************** In lvaMarkLocalVars()
*** lvaComputeRefCounts ***

*** lvaComputeRefCounts -- explicit counts ***

*** marking local variables in block BB01 (weight=1)
STMT00000 ( 0x000[E-] ... 0x005 )
               [000003] -AC--+-----                         ▌  ASG       ref   
               [000002] D----+-N---                         ├──▌  LCL_VAR   ref    V05 tmp1         
               [000001] --C--+-----                         └──▌  CALL help ref    CORINFO_HELP_NEWSFAST
               [000000] H----+----- arg0 in rcx                └──▌  CNS_INT(h) long   0x7ff93744e858 class
New refCnts for V05: refCnt =  1, refCntWtd = 2
Marking EH Var V05 as a register candidate.
STMT00002 ( 0x005[--] ... ??? )
               [000013] H-CXG+-----                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000011] -----+----- arg0 in rcx             ├──▌  CNS_INT   long   0x7ff9372b1818
               [000012] -----+----- arg1 in rdx             └──▌  CNS_INT   int    5
STMT00003 ( ??? ... ??? )
               [000009] -A--G+-----                         ▌  ASG       ref   
               [000008] h---G+-N---                         ├──▌  IND       ref   
               [000007] I----+-----                         │  └──▌  CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt]
               [000006] -----+-----                         └──▌  LCL_VAR   ref    V05 tmp1          (last use)
New refCnts for V05: refCnt =  2, refCntWtd = 4
STMT00004 ( 0x00A[E-] ... 0x014 )
               [000025] -ACXG+-----                         ▌  ASG       struct (copy)
               [000024] D----+-N---                         ├──▌  LCL_VAR   struct<S0, 24>(AX) V00 loc0         
               [000023] n-CXG+-----                         └──▌  OBJ       struct<S0, 24>
               [000022] --CXG+-----                            └──▌  COMMA     byref 
               [000021] H-CXG+-----                               ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000019] -----+----- arg0 in rcx                   │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000020] -----+----- arg1 in rdx                   │  └──▌  CNS_INT   int    5
               [000017] -----+-----                               └──▌  ADD       byref 
               [000015] #----+-----                                  ├──▌  IND       ref   
               [000014] I----+-----                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000016] -----+-----                                  └──▌  CNS_INT   long   8 Fseq[s_2]
New refCnts for V00: refCnt =  1, refCntWtd = 1
STMT00005 ( 0x015[E-] ... 0x018 )
               [000029] IA---+-----                         ▌  ASG       struct (init)
               [000027] D----+-N---                         ├──▌  LCL_VAR   struct<S1, 24>(AX) V01 loc1         
               [000028] -----+-----                         └──▌  CNS_INT   int    0
New refCnts for V01: refCnt =  1, refCntWtd = 1
STMT00010 ( ??? ... ??? )
               [000065] --CXG+-----                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort)
               [000089] -ACXG------ arg2 setup              ├──▌  ASG       int   
               [000088] D------N---                         │  ├──▌  LCL_VAR   int    V07 tmp3         
               [000038] --CXG+-----                         │  └──▌  COMMA     int   
               [000037] H-CXG+-----                         │     ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
               [000035] -----+----- arg0 in rcx             │     │  ├──▌  CNS_INT   long   0x7ff9372b1818
               [000036] -----+----- arg1 in rdx             │     │  └──▌  CNS_INT   int    5
               [000087] n---G+-----                         │     └──▌  IND       int   
               [000033] -----+-----                         │        └──▌  ADD       byref 
               [000031] #----+-----                         │           ├──▌  IND       ref   
               [000030] I----+-----                         │           │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
               [000032] -----+-----                         │           └──▌  CNS_INT   long   12 Fseq[s_2, 4]
               [000092] -ACXG------ arg3 setup              ├──▌  ASG       ref   
               [000091] D------N---                         │  ├──▌  LCL_VAR   ref    V08 tmp4         
               [000045] --CXG+-----                         │  └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC
               [000044] H----+----- arg0 in rcx             │     ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class
               [000043] -----+----- arg1 in rdx             │     └──▌  CNS_INT   long   1
               [000095] -ACXG------ arg4 setup              ├──▌  ASG       int   
               [000094] D------N---                         │  ├──▌  LCL_VAR   int    V09 tmp5         
               [000063] --CXG+-----                         │  └──▌  CAST      int <- byte <- long
               [000056] --CXG+-----                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong
               [000058] -----+----- arg0 in rcx             │        ├──▌  LCL_VAR_ADDR long   V00 loc0         
               [000072] -----+----- arg1 in rdx             │        └──▌  CNS_INT   int    0
               [000075] -----+----- arg5 out+28             ├──▌  CNS_INT   int    1
               [000090] ----------- arg2 in r8              ├──▌  LCL_VAR   int    V07 tmp3         
               [000093] ----------- arg3 in r9              ├──▌  LCL_VAR   ref    V08 tmp4         
               [000096] ----------- arg4 in out+20          ├──▌  LCL_VAR   int    V09 tmp5         
               [000048] -----+----- arg0 in rcx             ├──▌  LCL_VAR_ADDR long   V01 loc1         
               [000051] -----+----- arg1 in rdx             └──▌  LCL_FLD   ubyte (AX) V00 loc0         [+0]
New refCnts for V07: refCnt =  1, refCntWtd = 2
V07 needs explicit zero init. Disqualified as a single-def register candidate.
New refCnts for V08: refCnt =  1, refCntWtd = 2
Marking EH Var V08 as a register candidate.
New refCnts for V09: refCnt =  1, refCntWtd = 2
V09 needs explicit zero init. Disqualified as a single-def register candidate.
New refCnts for V00: refCnt =  2, refCntWtd = 2
New refCnts for V07: refCnt =  2, refCntWtd = 4
New refCnts for V08: refCnt =  2, refCntWtd = 4
New refCnts for V09: refCnt =  2, refCntWtd = 4
New refCnts for V01: refCnt =  2, refCntWtd = 2
New refCnts for V00: refCnt =  3, refCntWtd = 3
STMT00011 ( 0x04B[E-] ... ??? )
               [000068] -----+-----                         ▌  RETURN    void  

*** lvaComputeRefCounts -- implicit counts ***

*************** Finishing PHASE Mark local vars [no changes]

*************** Starting PHASE Opt add copies

*************** In optAddCopies()


*************** Finishing PHASE Opt add copies [no changes]

*************** Starting PHASE Find oper order
*************** In fgFindOperOrder()

*************** Finishing PHASE Find oper order
Trees after Find oper order

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..04C) (return), preds={} succs={}

***** BB01
STMT00000 ( 0x000[E-] ... 0x005 )
     ( 17, 16) [000003] -AC-----R--                         ▌  ASG       ref   
     (  1,  1) [000002] D------N---                         ├──▌  LCL_VAR   ref    V05 tmp1         
     ( 17, 16) [000001] --C--------                         └──▌  CALL help ref    CORINFO_HELP_NEWSFAST
     (  3, 10) [000000] H---------- arg0 in rcx                └──▌  CNS_INT(h) long   0x7ff93744e858 class

***** BB01
STMT00002 ( 0x005[--] ... ??? )
     ( 17, 18) [000013] H-CXG------                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
     (  2, 10) [000011] ----------- arg0 in rcx             ├──▌  CNS_INT   long   0x7ff9372b1818
     (  1,  1) [000012] ----------- arg1 in rdx             └──▌  CNS_INT   int    5

***** BB01
STMT00003 ( ??? ... ??? )
     (  7, 14) [000009] -A--G---R--                         ▌  ASG       ref   
     (  5, 12) [000008] h---G--N---                         ├──▌  IND       ref   
     (  3, 10) [000007] I----------                         │  └──▌  CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt]
     (  1,  1) [000006] -----------                         └──▌  LCL_VAR   ref    V05 tmp1          (last use)

***** BB01
STMT00004 ( 0x00A[E-] ... 0x014 )
     ( 40, 43) [000025] -ACXG---R--                         ▌  ASG       struct (copy)
     (  9,  6) [000024] D------N---                         ├──▌  LCL_VAR   struct<S0, 24>(AX) V00 loc0         
     ( 30, 36) [000023] n-CXG------                         └──▌  OBJ       struct<S0, 24>
     ( 24, 32) [000022] --CXG------                            └──▌  COMMA     byref 
     ( 17, 18) [000021] H-CXG------                               ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
     (  2, 10) [000019] ----------- arg0 in rcx                   │  ├──▌  CNS_INT   long   0x7ff9372b1818
     (  1,  1) [000020] ----------- arg1 in rdx                   │  └──▌  CNS_INT   int    5
     (  7, 14) [000017] -----------                               └──▌  ADD       byref 
     (  5, 12) [000015] #----------                                  ├──▌  IND       ref   
     (  3, 10) [000014] I----------                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
     (  1,  1) [000016] -----------                                  └──▌  CNS_INT   long   8 Fseq[s_2]

***** BB01
STMT00005 ( 0x015[E-] ... 0x018 )
     ( 11,  8) [000029] IA------R--                         ▌  ASG       struct (init)
     (  9,  6) [000027] D------N---                         ├──▌  LCL_VAR   struct<S1, 24>(AX) V01 loc1         
     (  1,  1) [000028] -----------                         └──▌  CNS_INT   int    0

***** BB01
STMT00010 ( ??? ... ??? )
     ( 99, 86) [000065] --CXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort)
     ( 25, 33) [000089] -ACXG---R-- arg2 setup              ├──▌  ASG       int   
     (  1,  1) [000088] D------N---                         │  ├──▌  LCL_VAR   int    V07 tmp3         
     ( 25, 33) [000038] --CXG------                         │  └──▌  COMMA     int   
     ( 17, 18) [000037] H-CXG------                         │     ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
     (  2, 10) [000035] ----------- arg0 in rcx             │     │  ├──▌  CNS_INT   long   0x7ff9372b1818
     (  1,  1) [000036] ----------- arg1 in rdx             │     │  └──▌  CNS_INT   int    5
     (  8, 15) [000087] n---G------                         │     └──▌  IND       int   
     (  6, 13) [000033] -------N---                         │        └──▌  ADD       byref 
     (  5, 12) [000031] #----------                         │           ├──▌  IND       ref   
     (  3, 10) [000030] I----------                         │           │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
     (  1,  1) [000032] -----------                         │           └──▌  CNS_INT   long   12 Fseq[s_2, 4]
     ( 18, 18) [000092] -ACXG---R-- arg3 setup              ├──▌  ASG       ref   
     (  1,  1) [000091] D------N---                         │  ├──▌  LCL_VAR   ref    V08 tmp4         
     ( 18, 18) [000045] --CXG------                         │  └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC
     (  3, 10) [000044] H---------- arg0 in rcx             │     ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class
     (  1,  1) [000043] ----------- arg1 in rdx             │     └──▌  CNS_INT   long   1
     ( 19, 13) [000095] -ACXG---R-- arg4 setup              ├──▌  ASG       int   
     (  1,  1) [000094] D------N---                         │  ├──▌  LCL_VAR   int    V09 tmp5         
     ( 19, 13) [000063] --CXG------                         │  └──▌  CAST      int <- byte <- long
     ( 18, 11) [000056] --CXG------                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong
     (  3,  3) [000058] ----------- arg0 in rcx             │        ├──▌  LCL_VAR_ADDR long   V00 loc0         
     (  1,  1) [000072] ----------- arg1 in rdx             │        └──▌  CNS_INT   int    0
     (  1,  1) [000075] ----------- arg5 out+28             ├──▌  CNS_INT   int    1
     (  1,  1) [000090] ----------- arg2 in r8              ├──▌  LCL_VAR   int    V07 tmp3         
     (  1,  1) [000093] ----------- arg3 in r9              ├──▌  LCL_VAR   ref    V08 tmp4         
     (  1,  1) [000096] ----------- arg4 in out+20          ├──▌  LCL_VAR   int    V09 tmp5         
     (  3,  3) [000048] ----------- arg0 in rcx             ├──▌  LCL_VAR_ADDR long   V01 loc1         
     (  4,  5) [000051] ----------- arg1 in rdx             └──▌  LCL_FLD   ubyte (AX) V00 loc0         [+0]

***** BB01
STMT00011 ( 0x04B[E-] ... ??? )
     (  0,  0) [000068] -----------                         ▌  RETURN    void  

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
*************** In fgDebugCheckLoopTable

*************** Starting PHASE Set block order
*************** In fgSetBlockOrder()
The biggest BB has   29 tree nodes

*************** Finishing PHASE Set block order
Trees after Set block order

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..04C) (return), preds={} succs={}

***** BB01
STMT00000 ( 0x000[E-] ... 0x005 )
N004 ( 17, 16) [000003] -AC-----R--                         ▌  ASG       ref   
N003 (  1,  1) [000002] D------N---                         ├──▌  LCL_VAR   ref    V05 tmp1         
N002 ( 17, 16) [000001] --C--------                         └──▌  CALL help ref    CORINFO_HELP_NEWSFAST
N001 (  3, 10) [000000] H---------- arg0 in rcx                └──▌  CNS_INT(h) long   0x7ff93744e858 class

***** BB01
STMT00002 ( 0x005[--] ... ??? )
N003 ( 17, 18) [000013] H-CXG------                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
N001 (  2, 10) [000011] ----------- arg0 in rcx             ├──▌  CNS_INT   long   0x7ff9372b1818
N002 (  1,  1) [000012] ----------- arg1 in rdx             └──▌  CNS_INT   int    5

***** BB01
STMT00003 ( ??? ... ??? )
N004 (  7, 14) [000009] -A--G---R--                         ▌  ASG       ref   
N003 (  5, 12) [000008] h---G--N---                         ├──▌  IND       ref   
N002 (  3, 10) [000007] I----------                         │  └──▌  CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt]
N001 (  1,  1) [000006] -----------                         └──▌  LCL_VAR   ref    V05 tmp1          (last use)

***** BB01
STMT00004 ( 0x00A[E-] ... 0x014 )
N011 ( 40, 43) [000025] -ACXG---R--                         ▌  ASG       struct (copy)
N010 (  9,  6) [000024] D------N---                         ├──▌  LCL_VAR   struct<S0, 24>(AX) V00 loc0         
N009 ( 30, 36) [000023] n-CXG------                         └──▌  OBJ       struct<S0, 24>
N008 ( 24, 32) [000022] --CXG------                            └──▌  COMMA     byref 
N003 ( 17, 18) [000021] H-CXG------                               ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
N001 (  2, 10) [000019] ----------- arg0 in rcx                   │  ├──▌  CNS_INT   long   0x7ff9372b1818
N002 (  1,  1) [000020] ----------- arg1 in rdx                   │  └──▌  CNS_INT   int    5
N007 (  7, 14) [000017] -----------                               └──▌  ADD       byref 
N005 (  5, 12) [000015] #----------                                  ├──▌  IND       ref   
N004 (  3, 10) [000014] I----------                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
N006 (  1,  1) [000016] -----------                                  └──▌  CNS_INT   long   8 Fseq[s_2]

***** BB01
STMT00005 ( 0x015[E-] ... 0x018 )
N003 ( 11,  8) [000029] IA------R--                         ▌  ASG       struct (init)
N002 (  9,  6) [000027] D------N---                         ├──▌  LCL_VAR   struct<S1, 24>(AX) V01 loc1         
N001 (  1,  1) [000028] -----------                         └──▌  CNS_INT   int    0

***** BB01
STMT00010 ( ??? ... ??? )
N029 ( 99, 86) [000065] --CXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort)
N011 ( 25, 33) [000089] -ACXG---R-- arg2 setup              ├──▌  ASG       int   
N010 (  1,  1) [000088] D------N---                         │  ├──▌  LCL_VAR   int    V07 tmp3         
N009 ( 25, 33) [000038] --CXG------                         │  └──▌  COMMA     int   
N003 ( 17, 18) [000037] H-CXG------                         │     ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
N001 (  2, 10) [000035] ----------- arg0 in rcx             │     │  ├──▌  CNS_INT   long   0x7ff9372b1818
N002 (  1,  1) [000036] ----------- arg1 in rdx             │     │  └──▌  CNS_INT   int    5
N008 (  8, 15) [000087] n---G------                         │     └──▌  IND       int   
N007 (  6, 13) [000033] -------N---                         │        └──▌  ADD       byref 
N005 (  5, 12) [000031] #----------                         │           ├──▌  IND       ref   
N004 (  3, 10) [000030] I----------                         │           │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
N006 (  1,  1) [000032] -----------                         │           └──▌  CNS_INT   long   12 Fseq[s_2, 4]
N016 ( 18, 18) [000092] -ACXG---R-- arg3 setup              ├──▌  ASG       ref   
N015 (  1,  1) [000091] D------N---                         │  ├──▌  LCL_VAR   ref    V08 tmp4         
N014 ( 18, 18) [000045] --CXG------                         │  └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC
N012 (  3, 10) [000044] H---------- arg0 in rcx             │     ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class
N013 (  1,  1) [000043] ----------- arg1 in rdx             │     └──▌  CNS_INT   long   1
N022 ( 19, 13) [000095] -ACXG---R-- arg4 setup              ├──▌  ASG       int   
N021 (  1,  1) [000094] D------N---                         │  ├──▌  LCL_VAR   int    V09 tmp5         
N020 ( 19, 13) [000063] --CXG------                         │  └──▌  CAST      int <- byte <- long
N019 ( 18, 11) [000056] --CXG------                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong
N017 (  3,  3) [000058] ----------- arg0 in rcx             │        ├──▌  LCL_VAR_ADDR long   V00 loc0         
N018 (  1,  1) [000072] ----------- arg1 in rdx             │        └──▌  CNS_INT   int    0
N023 (  1,  1) [000075] ----------- arg5 out+28             ├──▌  CNS_INT   int    1
N024 (  1,  1) [000090] ----------- arg2 in r8              ├──▌  LCL_VAR   int    V07 tmp3         
N025 (  1,  1) [000093] ----------- arg3 in r9              ├──▌  LCL_VAR   ref    V08 tmp4         
N026 (  1,  1) [000096] ----------- arg4 in out+20          ├──▌  LCL_VAR   int    V09 tmp5         
N027 (  3,  3) [000048] ----------- arg0 in rcx             ├──▌  LCL_VAR_ADDR long   V01 loc1         
N028 (  4,  5) [000051] ----------- arg1 in rdx             └──▌  LCL_FLD   ubyte (AX) V00 loc0         [+0]

***** BB01
STMT00011 ( 0x04B[E-] ... ??? )
N001 (  0,  0) [000068] -----------                         ▌  RETURN    void  

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
*************** In fgDebugCheckLoopTable

*************** Starting PHASE Build SSA representation
*************** In SsaBuilder::Build()
[SsaBuilder] Max block count is 2.

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

***************  Exception Handling table is empty
[SsaBuilder] Topologically sorted the graph.
[SsaBuilder::ComputeImmediateDom]

Inside fgBuildDomTree

After computing the Dominance Tree:

*************** In fgLocalVarLiveness()
In fgLocalVarLivenessInit

Local V00 should not be enregistered because: struct size does not match reg size

Local V01 should not be enregistered because: struct size does not match reg size

Local V06 should not be enregistered because: struct size does not match reg size
Tracked variable (4 out of 10) table:
V05 tmp1          [   ref]: refCnt =    2, refCntWtd =   4   
V08 tmp4          [   ref]: refCnt =    2, refCntWtd =   4   
V07 tmp3          [   int]: refCnt =    2, refCntWtd =   4   
V09 tmp5          [   int]: refCnt =    2, refCntWtd =   4   

*************** In fgPerBlockLocalVarLiveness()
BB01 USE(0)={               } + ByrefExposed + GcHeap
     DEF(4)={V05 V08 V07 V09} + ByrefExposed* + GcHeap*

** Memory liveness computed, GcHeap states and ByrefExposed states diverge
*************** In fgInterBlockLocalVarLiveness()

BB liveness after fgLiveVarAnalysis():

BB01 IN (0)={} + ByrefExposed + GcHeap
     OUT(0)={}

*************** In optRemoveRedundantZeroInits()
Marking V00 as having an explicit init

removing useless STMT00005 ( 0x015[E-] ... 0x018 )
N003 ( 11,  8) [000029] IA------R--                         ▌  ASG       struct (init)
N002 (  9,  6) [000027] D------N---                         ├──▌  LCL_VAR   struct<S1, 24>(AX) V01 loc1         
N001 (  1,  1) [000028] -----------                         └──▌  CNS_INT   int    0
 from BB01
Marking V07 as having an explicit init
Marking V09 as having an explicit init
*************** In SsaBuilder::InsertPhiFunctions()
Inserting phi functions:
*************** In SsaBuilder::RenameVariables()
V05.1: defined in BB00 0 uses (local)
V05.2: defined in BB01 1 uses (local)
V07.1: defined in BB00 0 uses (local)
V07.2: defined in BB01 1 uses (local)
V08.1: defined in BB00 0 uses (local)
V08.2: defined in BB01 1 uses (local)
V09.1: defined in BB00 0 uses (local)
V09.2: defined in BB01 1 uses (local)

*************** Finishing PHASE Build SSA representation
Trees after Build SSA representation

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..04C) (return), preds={} succs={}

***** BB01
STMT00000 ( 0x000[E-] ... 0x005 )
N004 ( 17, 16) [000003] -AC-----R--                         ▌  ASG       ref   
N003 (  1,  1) [000002] D------N---                         ├──▌  LCL_VAR   ref    V05 tmp1         d:2
N002 ( 17, 16) [000001] --C--------                         └──▌  CALL help ref    CORINFO_HELP_NEWSFAST
N001 (  3, 10) [000000] H---------- arg0 in rcx                └──▌  CNS_INT(h) long   0x7ff93744e858 class

***** BB01
STMT00002 ( 0x005[--] ... ??? )
N003 ( 17, 18) [000013] H-CXG------                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
N001 (  2, 10) [000011] ----------- arg0 in rcx             ├──▌  CNS_INT   long   0x7ff9372b1818
N002 (  1,  1) [000012] ----------- arg1 in rdx             └──▌  CNS_INT   int    5

***** BB01
STMT00003 ( ??? ... ??? )
N004 (  7, 14) [000009] -A--G---R--                         ▌  ASG       ref   
N003 (  5, 12) [000008] h---G--N---                         ├──▌  IND       ref   
N002 (  3, 10) [000007] I----------                         │  └──▌  CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt]
N001 (  1,  1) [000006] -----------                         └──▌  LCL_VAR   ref    V05 tmp1         u:2 (last use)

***** BB01
STMT00004 ( 0x00A[E-] ... 0x014 )
N011 ( 40, 43) [000025] -ACXG---R--                         ▌  ASG       struct (copy)
N010 (  9,  6) [000024] D------N---                         ├──▌  LCL_VAR   struct<S0, 24>(AX) V00 loc0         
N009 ( 30, 36) [000023] n-CXG------                         └──▌  OBJ       struct<S0, 24>
N008 ( 24, 32) [000022] --CXG------                            └──▌  COMMA     byref 
N003 ( 17, 18) [000021] H-CXG------                               ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
N001 (  2, 10) [000019] ----------- arg0 in rcx                   │  ├──▌  CNS_INT   long   0x7ff9372b1818
N002 (  1,  1) [000020] ----------- arg1 in rdx                   │  └──▌  CNS_INT   int    5
N007 (  7, 14) [000017] -----------                               └──▌  ADD       byref 
N005 (  5, 12) [000015] #----------                                  ├──▌  IND       ref   
N004 (  3, 10) [000014] I----------                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
N006 (  1,  1) [000016] -----------                                  └──▌  CNS_INT   long   8 Fseq[s_2]

***** BB01
STMT00010 ( ??? ... ??? )
N029 ( 99, 86) [000065] --CXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort)
N011 ( 25, 33) [000089] -ACXG---R-- arg2 setup              ├──▌  ASG       int   
N010 (  1,  1) [000088] D------N---                         │  ├──▌  LCL_VAR   int    V07 tmp3         d:2
N009 ( 25, 33) [000038] --CXG------                         │  └──▌  COMMA     int   
N003 ( 17, 18) [000037] H-CXG------                         │     ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
N001 (  2, 10) [000035] ----------- arg0 in rcx             │     │  ├──▌  CNS_INT   long   0x7ff9372b1818
N002 (  1,  1) [000036] ----------- arg1 in rdx             │     │  └──▌  CNS_INT   int    5
N008 (  8, 15) [000087] n---G------                         │     └──▌  IND       int   
N007 (  6, 13) [000033] -------N---                         │        └──▌  ADD       byref 
N005 (  5, 12) [000031] #----------                         │           ├──▌  IND       ref   
N004 (  3, 10) [000030] I----------                         │           │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
N006 (  1,  1) [000032] -----------                         │           └──▌  CNS_INT   long   12 Fseq[s_2, 4]
N016 ( 18, 18) [000092] -ACXG---R-- arg3 setup              ├──▌  ASG       ref   
N015 (  1,  1) [000091] D------N---                         │  ├──▌  LCL_VAR   ref    V08 tmp4         d:2
N014 ( 18, 18) [000045] --CXG------                         │  └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC
N012 (  3, 10) [000044] H---------- arg0 in rcx             │     ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class
N013 (  1,  1) [000043] ----------- arg1 in rdx             │     └──▌  CNS_INT   long   1
N022 ( 19, 13) [000095] -ACXG---R-- arg4 setup              ├──▌  ASG       int   
N021 (  1,  1) [000094] D------N---                         │  ├──▌  LCL_VAR   int    V09 tmp5         d:2
N020 ( 19, 13) [000063] --CXG------                         │  └──▌  CAST      int <- byte <- long
N019 ( 18, 11) [000056] --CXG------                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong
N017 (  3,  3) [000058] ----------- arg0 in rcx             │        ├──▌  LCL_VAR_ADDR long   V00 loc0         
N018 (  1,  1) [000072] ----------- arg1 in rdx             │        └──▌  CNS_INT   int    0
N023 (  1,  1) [000075] ----------- arg5 out+28             ├──▌  CNS_INT   int    1
N024 (  1,  1) [000090] ----------- arg2 in r8              ├──▌  LCL_VAR   int    V07 tmp3         u:2 (last use)
N025 (  1,  1) [000093] ----------- arg3 in r9              ├──▌  LCL_VAR   ref    V08 tmp4         u:2 (last use)
N026 (  1,  1) [000096] ----------- arg4 in out+20          ├──▌  LCL_VAR   int    V09 tmp5         u:2 (last use)
N027 (  3,  3) [000048] ----------- arg0 in rcx             ├──▌  LCL_VAR_ADDR long   V01 loc1         
N028 (  4,  5) [000051] ----------- arg1 in rdx             └──▌  LCL_FLD   ubyte (AX) V00 loc0         [+0]

***** BB01
STMT00011 ( 0x04B[E-] ... ??? )
N001 (  0,  0) [000068] -----------                         ▌  RETURN    void  

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
SSA checks completed successfully
*************** In fgDebugCheckLoopTable

*************** Starting PHASE Early Value Propagation
no arrays or null checks in the method

*************** Finishing PHASE Early Value Propagation [no changes]

*************** Starting PHASE Do value numbering

*************** In fgValueNumber()
Memory Initial Value in BB01 is: $c0
The SSA definition for ByrefExposed (#1) at start of BB01 is $c0 {InitVal($42)}
The SSA definition for GcHeap (#1) at start of BB01 is $c0 {InitVal($42)}

***** BB01, STMT00000(before)
N004 ( 17, 16) [000003] -AC-----R--                         ▌  ASG       ref   
N003 (  1,  1) [000002] D------N---                         ├──▌  LCL_VAR   ref    V05 tmp1         d:2
N002 ( 17, 16) [000001] --C--------                         └──▌  CALL help ref    CORINFO_HELP_NEWSFAST
N001 (  3, 10) [000000] H---------- arg0 in rcx                └──▌  CNS_INT(h) long   0x7ff93744e858 class

N001 [000000]   CNS_INT(h) 0x7ff93744e858 class => $100 {Hnd const: 0x00007FF93744E858}
N002 [000001]   CALL help => $180 {JitNew($100, $140)}
N003 [000002]   LCL_VAR   V05 tmp1         d:2 => $VN.Void
Tree [000003] assigned VN to local var V05/2: $180 {JitNew($100, $140)}
N004 [000003]   ASG       => $VN.Void

***** BB01, STMT00000(after)
N004 ( 17, 16) [000003] -AC-----R--                         ▌  ASG       ref    $VN.Void
N003 (  1,  1) [000002] D------N---                         ├──▌  LCL_VAR   ref    V05 tmp1         d:2 $VN.Void
N002 ( 17, 16) [000001] --C--------                         └──▌  CALL help ref    CORINFO_HELP_NEWSFAST $180
N001 (  3, 10) [000000] H---------- arg0 in rcx                └──▌  CNS_INT(h) long   0x7ff93744e858 class $100

---------

***** BB01, STMT00002(before)
N003 ( 17, 18) [000013] H-CXG------                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
N001 (  2, 10) [000011] ----------- arg0 in rcx             ├──▌  CNS_INT   long   0x7ff9372b1818
N002 (  1,  1) [000012] ----------- arg1 in rdx             └──▌  CNS_INT   int    5

N001 [000011]   CNS_INT   0x7ff9372b1818 => $1c0 {LngCns:  0x7ff9372b1818}
N002 [000012]   CNS_INT   5 => $43 {IntCns 5}
N003 [000013]   CALL help => $241 {norm=$240 {GetsharedNongcstaticBase($1c0, $43)}, exc=$181 {HelperMultipleExc()}}

***** BB01, STMT00002(after)
N003 ( 17, 18) [000013] H-CXG------                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $241
N001 (  2, 10) [000011] ----------- arg0 in rcx             ├──▌  CNS_INT   long   0x7ff9372b1818 $1c0
N002 (  1,  1) [000012] ----------- arg1 in rdx             └──▌  CNS_INT   int    5 $43

---------

***** BB01, STMT00003(before)
N004 (  7, 14) [000009] -A--G---R--                         ▌  ASG       ref   
N003 (  5, 12) [000008] h---G--N---                         ├──▌  IND       ref   
N002 (  3, 10) [000007] I----------                         │  └──▌  CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt]
N001 (  1,  1) [000006] -----------                         └──▌  LCL_VAR   ref    V05 tmp1         u:2 (last use)

N001 [000006]   LCL_VAR   V05 tmp1         u:2 (last use) => $180 {JitNew($100, $140)}
N002 [000007]   CNS_INT(h) 0x1a844001ec8 static Fseq[s_rt] => $101 {Hnd const: 0x000001A844001EC8}
N003 [000008]   IND       => $VN.Void
    VNForHandle(s_rt) is $102, fieldType is ref, size = 8
    VNForMapStore($c0, $102, $180):heap in BB01 returns $280 {$c0[$102 := $180]}
  fgCurMemoryVN[GcHeap] assigned for StoreField at [000009] to VN: $280.
N004 [000009]   ASG       => $VN.Void

***** BB01, STMT00003(after)
N004 (  7, 14) [000009] -A--G---R--                         ▌  ASG       ref    $VN.Void
N003 (  5, 12) [000008] h---G--N---                         ├──▌  IND       ref    $VN.Void
N002 (  3, 10) [000007] I----------                         │  └──▌  CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt] $101
N001 (  1,  1) [000006] -----------                         └──▌  LCL_VAR   ref    V05 tmp1         u:2 (last use) $180

---------

***** BB01, STMT00004(before)
N011 ( 40, 43) [000025] -ACXG---R--                         ▌  ASG       struct (copy)
N010 (  9,  6) [000024] D------N---                         ├──▌  LCL_VAR   struct<S0, 24>(AX) V00 loc0         
N009 ( 30, 36) [000023] n-CXG------                         └──▌  OBJ       struct<S0, 24>
N008 ( 24, 32) [000022] --CXG------                            └──▌  COMMA     byref 
N003 ( 17, 18) [000021] H-CXG------                               ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
N001 (  2, 10) [000019] ----------- arg0 in rcx                   │  ├──▌  CNS_INT   long   0x7ff9372b1818
N002 (  1,  1) [000020] ----------- arg1 in rdx                   │  └──▌  CNS_INT   int    5
N007 (  7, 14) [000017] -----------                               └──▌  ADD       byref 
N005 (  5, 12) [000015] #----------                                  ├──▌  IND       ref   
N004 (  3, 10) [000014] I----------                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
N006 (  1,  1) [000016] -----------                                  └──▌  CNS_INT   long   8 Fseq[s_2]

N001 [000019]   CNS_INT   0x7ff9372b1818 => $1c0 {LngCns:  0x7ff9372b1818}
N002 [000020]   CNS_INT   5 => $43 {IntCns 5}
N003 [000021]   CALL help => $241 {norm=$240 {GetsharedNongcstaticBase($1c0, $43)}, exc=$181 {HelperMultipleExc()}}
N004 [000014]   CNS_INT(h) 0x1a844001eb8 static box ptr => $103 {Hnd const: 0x000001A844001EB8}
     { } is $104
N005 [000015]   IND       => $2c0 {PtrToStatic($103, $104, $1c1)}
N006 [000016]   CNS_INT   8 Fseq[s_2] => $1c2 {LngCns:  8}
     { Fseq[s_2] } is $105
N007 [000017]   ADD       => $300 {PtrToStatic($103, $105, $1c3)}
N008 [000022]   COMMA     => $340 {norm=$300 {PtrToStatic($103, $105, $1c3)}, exc=$181 {HelperMultipleExc()}}
    VNForHandle(s_2) is $106, fieldType is struct, size = 24
      AX2: $106 != $102 ==> select([$280]store($c0, $102, $180), $106) ==> select($c0, $106) remaining budget is 99.
    VNForMapSelect($280, $106):struct returns $380 {$c0[$106]}
N009 [000023]   OBJ       => <l:$382 {norm=$380 {$c0[$106]}, exc=$181 {HelperMultipleExc()}}, c:$381 {norm=$3c0 {MemOpaque:NotInLoop}, exc=$181 {HelperMultipleExc()}}>
N010 [000024]   LCL_VAR   V00 loc0          => $VN.Void
  fgCurMemoryVN[ByrefExposed] assigned for local assign at [000025] to VN: $c2.
N011 [000025]   ASG       => $182 {norm=$VN.Void, exc=$181 {HelperMultipleExc()}}

***** BB01, STMT00004(after)
N011 ( 40, 43) [000025] -ACXG---R--                         ▌  ASG       struct (copy) $182
N010 (  9,  6) [000024] D------N---                         ├──▌  LCL_VAR   struct<S0, 24>(AX) V00 loc0          $VN.Void
N009 ( 30, 36) [000023] n-CXG------                         └──▌  OBJ       struct<S0, 24> <l:$382, c:$381>
N008 ( 24, 32) [000022] --CXG------                            └──▌  COMMA     byref  $340
N003 ( 17, 18) [000021] H-CXG------                               ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $241
N001 (  2, 10) [000019] ----------- arg0 in rcx                   │  ├──▌  CNS_INT   long   0x7ff9372b1818 $1c0
N002 (  1,  1) [000020] ----------- arg1 in rdx                   │  └──▌  CNS_INT   int    5 $43
N007 (  7, 14) [000017] -----------                               └──▌  ADD       byref  $300
N005 (  5, 12) [000015] #----------                                  ├──▌  IND       ref    $2c0
N004 (  3, 10) [000014] I----------                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr $103
N006 (  1,  1) [000016] -----------                                  └──▌  CNS_INT   long   8 Fseq[s_2] $1c2

---------

***** BB01, STMT00010(before)
N029 ( 99, 86) [000065] --CXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort)
N011 ( 25, 33) [000089] -ACXG---R-- arg2 setup              ├──▌  ASG       int   
N010 (  1,  1) [000088] D------N---                         │  ├──▌  LCL_VAR   int    V07 tmp3         d:2
N009 ( 25, 33) [000038] --CXG------                         │  └──▌  COMMA     int   
N003 ( 17, 18) [000037] H-CXG------                         │     ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
N001 (  2, 10) [000035] ----------- arg0 in rcx             │     │  ├──▌  CNS_INT   long   0x7ff9372b1818
N002 (  1,  1) [000036] ----------- arg1 in rdx             │     │  └──▌  CNS_INT   int    5
N008 (  8, 15) [000087] n---G------                         │     └──▌  IND       int   
N007 (  6, 13) [000033] -------N---                         │        └──▌  ADD       byref 
N005 (  5, 12) [000031] #----------                         │           ├──▌  IND       ref   
N004 (  3, 10) [000030] I----------                         │           │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr
N006 (  1,  1) [000032] -----------                         │           └──▌  CNS_INT   long   12 Fseq[s_2, 4]
N016 ( 18, 18) [000092] -ACXG---R-- arg3 setup              ├──▌  ASG       ref   
N015 (  1,  1) [000091] D------N---                         │  ├──▌  LCL_VAR   ref    V08 tmp4         d:2
N014 ( 18, 18) [000045] --CXG------                         │  └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC
N012 (  3, 10) [000044] H---------- arg0 in rcx             │     ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class
N013 (  1,  1) [000043] ----------- arg1 in rdx             │     └──▌  CNS_INT   long   1
N022 ( 19, 13) [000095] -ACXG---R-- arg4 setup              ├──▌  ASG       int   
N021 (  1,  1) [000094] D------N---                         │  ├──▌  LCL_VAR   int    V09 tmp5         d:2
N020 ( 19, 13) [000063] --CXG------                         │  └──▌  CAST      int <- byte <- long
N019 ( 18, 11) [000056] --CXG------                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong
N017 (  3,  3) [000058] ----------- arg0 in rcx             │        ├──▌  LCL_VAR_ADDR long   V00 loc0         
N018 (  1,  1) [000072] ----------- arg1 in rdx             │        └──▌  CNS_INT   int    0
N023 (  1,  1) [000075] ----------- arg5 out+28             ├──▌  CNS_INT   int    1
N024 (  1,  1) [000090] ----------- arg2 in r8              ├──▌  LCL_VAR   int    V07 tmp3         u:2 (last use)
N025 (  1,  1) [000093] ----------- arg3 in r9              ├──▌  LCL_VAR   ref    V08 tmp4         u:2 (last use)
N026 (  1,  1) [000096] ----------- arg4 in out+20          ├──▌  LCL_VAR   int    V09 tmp5         u:2 (last use)
N027 (  3,  3) [000048] ----------- arg0 in rcx             ├──▌  LCL_VAR_ADDR long   V01 loc1         
N028 (  4,  5) [000051] ----------- arg1 in rdx             └──▌  LCL_FLD   ubyte (AX) V00 loc0         [+0]

N001 [000035]   CNS_INT   0x7ff9372b1818 => $1c0 {LngCns:  0x7ff9372b1818}
N002 [000036]   CNS_INT   5 => $43 {IntCns 5}
N003 [000037]   CALL help => $241 {norm=$240 {GetsharedNongcstaticBase($1c0, $43)}, exc=$181 {HelperMultipleExc()}}
N004 [000030]   CNS_INT(h) 0x1a844001eb8 static box ptr => $103 {Hnd const: 0x000001A844001EB8}
     { } is $104
N005 [000031]   IND       => $2c0 {PtrToStatic($103, $104, $1c1)}
N006 [000032]   CNS_INT   12 Fseq[s_2, 4] => $1c4 {LngCns:  12}
     { Fseq[s_2] } is $105
N007 [000033]   ADD       => $301 {PtrToStatic($103, $105, $1c5)}
    VNForHandle(s_2) is $106, fieldType is struct, size = 24
      AX2: $106 != $102 ==> select([$280]store($c0, $102, $180), $106) ==> select($c0, $106) remaining budget is 99.
    VNForMapSelect($280, $106):struct returns $380 {$c0[$106]}
  VNForLoad:
    VNForMapPhysicalSelect($380, [4:7]):int returns $400 {$380[$1c6]}
N008 [000087]   IND       => <l:$400 {$380[$1c6]}, c:$82 {MemOpaque:NotInLoop}>
N009 [000038]   COMMA     => <l:$402 {norm=$400 {$380[$1c6]}, exc=$181 {HelperMultipleExc()}}, c:$401 {norm=$82 {MemOpaque:NotInLoop}, exc=$181 {HelperMultipleExc()}}>
N010 [000088]   LCL_VAR   V07 tmp3         d:2 => $VN.Void
Tree [000089] assigned VN to local var V07/2: <l:$400 {$380[$1c6]}, c:$82 {MemOpaque:NotInLoop}>
N011 [000089]   ASG       => $182 {norm=$VN.Void, exc=$181 {HelperMultipleExc()}}
N012 [000044]   CNS_INT(h) 0x7ff93744e2d8 class => $107 {Hnd const: 0x00007FF93744E2D8}
N013 [000043]   CNS_INT   1 => $1c7 {LngCns:  1}
N014 [000045]   CALL help => $184 {norm=$2c1 {JitNewArr($107, $1c7, $142)}, exc=$183 {NewArrOverflowExc($1c7)}}
N015 [000091]   LCL_VAR   V08 tmp4         d:2 => $VN.Void
Tree [000092] assigned VN to local var V08/2: $2c1 {JitNewArr($107, $1c7, $142)}
N016 [000092]   ASG       => $185 {norm=$VN.Void, exc=$183 {NewArrOverflowExc($1c7)}}
N017 [000058]   LCL_VAR_ADDR V00 loc0          => $341 {PtrToLoc($44, $1c3)}
N018 [000072]   CNS_INT   0 => $44 {IntCns 0}
  fgCurMemoryVN[GcHeap] assigned for CALL at [000056] to VN: $c3.
N019 [000056]   CALL      => $440 {MemOpaque:NotInLoop}
N020 [000063]   CAST      => $403 {$440, int <- byte <- long}
N021 [000094]   LCL_VAR   V09 tmp5         d:2 => $VN.Void
Tree [000095] assigned VN to local var V09/2: $403 {$440, int <- byte <- long}
N022 [000095]   ASG       => $VN.Void
N023 [000075]   CNS_INT   1 => $46 {IntCns 1}
N024 [000090]   LCL_VAR   V07 tmp3         u:2 (last use) => <l:$400 {$380[$1c6]}, c:$82 {MemOpaque:NotInLoop}>
N025 [000093]   LCL_VAR   V08 tmp4         u:2 (last use) => $2c1 {JitNewArr($107, $1c7, $142)}
N026 [000096]   LCL_VAR   V09 tmp5         u:2 (last use) => $403 {$440, int <- byte <- long}
N027 [000048]   LCL_VAR_ADDR V01 loc1          => $342 {PtrToLoc($46, $1c3)}
N028 [000051]   LCL_FLD   V00 loc0         [+0] => <l:$480 {ByrefExposedLoad($47, $341, $c4)}, c:$4c0 {MemOpaque:NotInLoop}>
  fgCurMemoryVN[GcHeap] assigned for CALL at [000065] to VN: $c5.
N029 [000065]   CALL      => $VN.Void

***** BB01, STMT00010(after)
N029 ( 99, 86) [000065] --CXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort) $VN.Void
N011 ( 25, 33) [000089] -ACXG---R-- arg2 setup              ├──▌  ASG       int    $182
N010 (  1,  1) [000088] D------N---                         │  ├──▌  LCL_VAR   int    V07 tmp3         d:2 $VN.Void
N009 ( 25, 33) [000038] --CXG------                         │  └──▌  COMMA     int    <l:$402, c:$401>
N003 ( 17, 18) [000037] H-CXG------                         │     ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $241
N001 (  2, 10) [000035] ----------- arg0 in rcx             │     │  ├──▌  CNS_INT   long   0x7ff9372b1818 $1c0
N002 (  1,  1) [000036] ----------- arg1 in rdx             │     │  └──▌  CNS_INT   int    5 $43
N008 (  8, 15) [000087] n---G------                         │     └──▌  IND       int    <l:$400, c:$82>
N007 (  6, 13) [000033] -------N---                         │        └──▌  ADD       byref  $301
N005 (  5, 12) [000031] #----------                         │           ├──▌  IND       ref    $2c0
N004 (  3, 10) [000030] I----------                         │           │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr $103
N006 (  1,  1) [000032] -----------                         │           └──▌  CNS_INT   long   12 Fseq[s_2, 4] $1c4
N016 ( 18, 18) [000092] -ACXG---R-- arg3 setup              ├──▌  ASG       ref    $185
N015 (  1,  1) [000091] D------N---                         │  ├──▌  LCL_VAR   ref    V08 tmp4         d:2 $VN.Void
N014 ( 18, 18) [000045] --CXG------                         │  └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC $184
N012 (  3, 10) [000044] H---------- arg0 in rcx             │     ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class $107
N013 (  1,  1) [000043] ----------- arg1 in rdx             │     └──▌  CNS_INT   long   1 $1c7
N022 ( 19, 13) [000095] -ACXG---R-- arg4 setup              ├──▌  ASG       int    $VN.Void
N021 (  1,  1) [000094] D------N---                         │  ├──▌  LCL_VAR   int    V09 tmp5         d:2 $VN.Void
N020 ( 19, 13) [000063] --CXG------                         │  └──▌  CAST      int <- byte <- long $403
N019 ( 18, 11) [000056] --CXG------                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong $440
N017 (  3,  3) [000058] ----------- arg0 in rcx             │        ├──▌  LCL_VAR_ADDR long   V00 loc0          $341
N018 (  1,  1) [000072] ----------- arg1 in rdx             │        └──▌  CNS_INT   int    0 $44
N023 (  1,  1) [000075] ----------- arg5 out+28             ├──▌  CNS_INT   int    1 $46
N024 (  1,  1) [000090] ----------- arg2 in r8              ├──▌  LCL_VAR   int    V07 tmp3         u:2 (last use) <l:$400, c:$82>
N025 (  1,  1) [000093] ----------- arg3 in r9              ├──▌  LCL_VAR   ref    V08 tmp4         u:2 (last use) $2c1
N026 (  1,  1) [000096] ----------- arg4 in out+20          ├──▌  LCL_VAR   int    V09 tmp5         u:2 (last use) $403
N027 (  3,  3) [000048] ----------- arg0 in rcx             ├──▌  LCL_VAR_ADDR long   V01 loc1          $342
N028 (  4,  5) [000051] ----------- arg1 in rdx             └──▌  LCL_FLD   ubyte (AX) V00 loc0         [+0] <l:$480, c:$4c0>

---------

***** BB01, STMT00011(before)
N001 (  0,  0) [000068] -----------                         ▌  RETURN    void  

N001 [000068]   RETURN    => $VN.Void

***** BB01, STMT00011(after)
N001 (  0,  0) [000068] -----------                         ▌  RETURN    void   $VN.Void

finish(BB01).

*************** Finishing PHASE Do value numbering
Trees after Do value numbering

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..04C) (return), preds={} succs={}

***** BB01
STMT00000 ( 0x000[E-] ... 0x005 )
N004 ( 17, 16) [000003] -AC-----R--                         ▌  ASG       ref    $VN.Void
N003 (  1,  1) [000002] D------N---                         ├──▌  LCL_VAR   ref    V05 tmp1         d:2 $VN.Void
N002 ( 17, 16) [000001] --C--------                         └──▌  CALL help ref    CORINFO_HELP_NEWSFAST $180
N001 (  3, 10) [000000] H---------- arg0 in rcx                └──▌  CNS_INT(h) long   0x7ff93744e858 class $100

***** BB01
STMT00002 ( 0x005[--] ... ??? )
N003 ( 17, 18) [000013] H-CXG------                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $241
N001 (  2, 10) [000011] ----------- arg0 in rcx             ├──▌  CNS_INT   long   0x7ff9372b1818 $1c0
N002 (  1,  1) [000012] ----------- arg1 in rdx             └──▌  CNS_INT   int    5 $43

***** BB01
STMT00003 ( ??? ... ??? )
N004 (  7, 14) [000009] -A--G---R--                         ▌  ASG       ref    $VN.Void
N003 (  5, 12) [000008] h---G--N---                         ├──▌  IND       ref    $VN.Void
N002 (  3, 10) [000007] I----------                         │  └──▌  CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt] $101
N001 (  1,  1) [000006] -----------                         └──▌  LCL_VAR   ref    V05 tmp1         u:2 (last use) $180

***** BB01
STMT00004 ( 0x00A[E-] ... 0x014 )
N011 ( 40, 43) [000025] -ACXG---R--                         ▌  ASG       struct (copy) $182
N010 (  9,  6) [000024] D------N---                         ├──▌  LCL_VAR   struct<S0, 24>(AX) V00 loc0          $VN.Void
N009 ( 30, 36) [000023] n-CXG------                         └──▌  OBJ       struct<S0, 24> <l:$382, c:$381>
N008 ( 24, 32) [000022] --CXG------                            └──▌  COMMA     byref  $340
N003 ( 17, 18) [000021] H-CXG------                               ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $241
N001 (  2, 10) [000019] ----------- arg0 in rcx                   │  ├──▌  CNS_INT   long   0x7ff9372b1818 $1c0
N002 (  1,  1) [000020] ----------- arg1 in rdx                   │  └──▌  CNS_INT   int    5 $43
N007 (  7, 14) [000017] -----------                               └──▌  ADD       byref  $300
N005 (  5, 12) [000015] #----------                                  ├──▌  IND       ref    $2c0
N004 (  3, 10) [000014] I----------                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr $103
N006 (  1,  1) [000016] -----------                                  └──▌  CNS_INT   long   8 Fseq[s_2] $1c2

***** BB01
STMT00010 ( ??? ... ??? )
N029 ( 99, 86) [000065] --CXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort) $VN.Void
N011 ( 25, 33) [000089] -ACXG---R-- arg2 setup              ├──▌  ASG       int    $182
N010 (  1,  1) [000088] D------N---                         │  ├──▌  LCL_VAR   int    V07 tmp3         d:2 $VN.Void
N009 ( 25, 33) [000038] --CXG------                         │  └──▌  COMMA     int    <l:$402, c:$401>
N003 ( 17, 18) [000037] H-CXG------                         │     ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $241
N001 (  2, 10) [000035] ----------- arg0 in rcx             │     │  ├──▌  CNS_INT   long   0x7ff9372b1818 $1c0
N002 (  1,  1) [000036] ----------- arg1 in rdx             │     │  └──▌  CNS_INT   int    5 $43
N008 (  8, 15) [000087] n---G------                         │     └──▌  IND       int    <l:$400, c:$82>
N007 (  6, 13) [000033] -------N---                         │        └──▌  ADD       byref  $301
N005 (  5, 12) [000031] #----------                         │           ├──▌  IND       ref    $2c0
N004 (  3, 10) [000030] I----------                         │           │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr $103
N006 (  1,  1) [000032] -----------                         │           └──▌  CNS_INT   long   12 Fseq[s_2, 4] $1c4
N016 ( 18, 18) [000092] -ACXG---R-- arg3 setup              ├──▌  ASG       ref    $185
N015 (  1,  1) [000091] D------N---                         │  ├──▌  LCL_VAR   ref    V08 tmp4         d:2 $VN.Void
N014 ( 18, 18) [000045] --CXG------                         │  └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC $184
N012 (  3, 10) [000044] H---------- arg0 in rcx             │     ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class $107
N013 (  1,  1) [000043] ----------- arg1 in rdx             │     └──▌  CNS_INT   long   1 $1c7
N022 ( 19, 13) [000095] -ACXG---R-- arg4 setup              ├──▌  ASG       int    $VN.Void
N021 (  1,  1) [000094] D------N---                         │  ├──▌  LCL_VAR   int    V09 tmp5         d:2 $VN.Void
N020 ( 19, 13) [000063] --CXG------                         │  └──▌  CAST      int <- byte <- long $403
N019 ( 18, 11) [000056] --CXG------                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong $440
N017 (  3,  3) [000058] ----------- arg0 in rcx             │        ├──▌  LCL_VAR_ADDR long   V00 loc0          $341
N018 (  1,  1) [000072] ----------- arg1 in rdx             │        └──▌  CNS_INT   int    0 $44
N023 (  1,  1) [000075] ----------- arg5 out+28             ├──▌  CNS_INT   int    1 $46
N024 (  1,  1) [000090] ----------- arg2 in r8              ├──▌  LCL_VAR   int    V07 tmp3         u:2 (last use) <l:$400, c:$82>
N025 (  1,  1) [000093] ----------- arg3 in r9              ├──▌  LCL_VAR   ref    V08 tmp4         u:2 (last use) $2c1
N026 (  1,  1) [000096] ----------- arg4 in out+20          ├──▌  LCL_VAR   int    V09 tmp5         u:2 (last use) $403
N027 (  3,  3) [000048] ----------- arg0 in rcx             ├──▌  LCL_VAR_ADDR long   V01 loc1          $342
N028 (  4,  5) [000051] ----------- arg1 in rdx             └──▌  LCL_FLD   ubyte (AX) V00 loc0         [+0] <l:$480, c:$4c0>

***** BB01
STMT00011 ( 0x04B[E-] ... ??? )
N001 (  0,  0) [000068] -----------                         ▌  RETURN    void   $VN.Void

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
SSA checks completed successfully
*************** In fgDebugCheckLoopTable

*************** Starting PHASE Hoist loop code

No loops; no hoisting

*************** Finishing PHASE Hoist loop code [no changes]

*************** Starting PHASE VN based copy prop
Copy Assertion for BB01
  curSsaName stack: { }

							Live vars: {} => {V05}
							Live vars: {V05} => {}
							Live vars: {} => {V07}
							Live vars: {V07} => {V07 V08}
							Live vars: {V07 V08} => {V07 V08 V09}
							Live vars: {V07 V08 V09} => {V08 V09}
							Live vars: {V08 V09} => {V09}
							Live vars: {V09} => {}

*************** Finishing PHASE VN based copy prop [no changes]

*************** Starting PHASE Redundant branch opts

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

*************** Finishing PHASE Redundant branch opts [no changes]

*************** Starting PHASE Optimize Valnum CSEs

Candidate CSE #01, key=$240 in BB01, [cost=17, size=18]: 
N003 ( 17, 18) CSE #01 (use)[000021] H-CXG------                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $241
N001 (  2, 10)              [000019] ----------- arg0 in rcx             ├──▌  CNS_INT   long   0x7ff9372b1818 $1c0
N002 (  1,  1)              [000020] ----------- arg1 in rdx             └──▌  CNS_INT   int    5 $43

Candidate CSE #02, key=$2c0 in BB01, [cost= 5, size=12]: 
N005 (  5, 12) CSE #02 (use)[000031] #----------                         ▌  IND       ref    $2c0
N004 (  3, 10)              [000030] I----------                         └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr $103

Blocks that generate CSE def/uses
BB01 cseGen = 0000000000000005 CSE #01, CSE #02
SSA checks completed successfully

Performing DataFlow for ValnumCSE's

After performing DataFlow for ValnumCSE's
BB01
 in: 0000000000000000 
gen: 0000000000000005 CSE #01, CSE #02
out: 0000000000000005 CSE #01, CSE #02

Labeling the CSEs with Use/Def information
BB01 [000013] Def of CSE #01 [weight=1]
BB01 [000021] Use of CSE #01 [weight=1]
BB01 [000015] Def of CSE #02 [weight=1]
BB01 [000037] Use of CSE #01 [weight=1]
BB01 [000031] Use of CSE #02 [weight=1]

************ Trees at start of optValnumCSE_Heuristic()

------------ BB01 [000..04C) (return), preds={} succs={}

***** BB01
STMT00000 ( 0x000[E-] ... 0x005 )
N004 ( 17, 16)              [000003] -AC-----R--                         ▌  ASG       ref    $VN.Void
N003 (  1,  1)              [000002] D------N---                         ├──▌  LCL_VAR   ref    V05 tmp1         d:2 $VN.Void
N002 ( 17, 16)              [000001] --C--------                         └──▌  CALL help ref    CORINFO_HELP_NEWSFAST $180
N001 (  3, 10)              [000000] H---------- arg0 in rcx                └──▌  CNS_INT(h) long   0x7ff93744e858 class $100

***** BB01
STMT00002 ( 0x005[--] ... ??? )
N003 ( 17, 18) CSE #01 (def)[000013] H-CXG------                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $241
N001 (  2, 10)              [000011] ----------- arg0 in rcx             ├──▌  CNS_INT   long   0x7ff9372b1818 $1c0
N002 (  1,  1)              [000012] ----------- arg1 in rdx             └──▌  CNS_INT   int    5 $43

***** BB01
STMT00003 ( ??? ... ??? )
N004 (  7, 14)              [000009] -A--G---R--                         ▌  ASG       ref    $VN.Void
N003 (  5, 12)              [000008] h---G--N---                         ├──▌  IND       ref    $VN.Void
N002 (  3, 10)              [000007] I----------                         │  └──▌  CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt] $101
N001 (  1,  1)              [000006] -----------                         └──▌  LCL_VAR   ref    V05 tmp1         u:2 (last use) $180

***** BB01
STMT00004 ( 0x00A[E-] ... 0x014 )
N011 ( 40, 43)              [000025] -ACXG---R--                         ▌  ASG       struct (copy) $182
N010 (  9,  6)              [000024] D------N---                         ├──▌  LCL_VAR   struct<S0, 24>(AX) V00 loc0          $VN.Void
N009 ( 30, 36)              [000023] n-CXG------                         └──▌  OBJ       struct<S0, 24> <l:$382, c:$381>
N008 ( 24, 32)              [000022] --CXG------                            └──▌  COMMA     byref  $340
N003 ( 17, 18) CSE #01 (use)[000021] H-CXG------                               ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $241
N001 (  2, 10)              [000019] ----------- arg0 in rcx                   │  ├──▌  CNS_INT   long   0x7ff9372b1818 $1c0
N002 (  1,  1)              [000020] ----------- arg1 in rdx                   │  └──▌  CNS_INT   int    5 $43
N007 (  7, 14)              [000017] -----------                               └──▌  ADD       byref  $300
N005 (  5, 12) CSE #02 (def)[000015] #----------                                  ├──▌  IND       ref    $2c0
N004 (  3, 10)              [000014] I----------                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr $103
N006 (  1,  1)              [000016] -----------                                  └──▌  CNS_INT   long   8 Fseq[s_2] $1c2

***** BB01
STMT00010 ( ??? ... ??? )
N029 ( 99, 86)              [000065] --CXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort) $VN.Void
N011 ( 25, 33)              [000089] -ACXG---R-- arg2 setup              ├──▌  ASG       int    $182
N010 (  1,  1)              [000088] D------N---                         │  ├──▌  LCL_VAR   int    V07 tmp3         d:2 $VN.Void
N009 ( 25, 33)              [000038] --CXG------                         │  └──▌  COMMA     int    <l:$402, c:$401>
N003 ( 17, 18) CSE #01 (use)[000037] H-CXG------                         │     ├──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $241
N001 (  2, 10)              [000035] ----------- arg0 in rcx             │     │  ├──▌  CNS_INT   long   0x7ff9372b1818 $1c0
N002 (  1,  1)              [000036] ----------- arg1 in rdx             │     │  └──▌  CNS_INT   int    5 $43
N008 (  8, 15)              [000087] n---G------                         │     └──▌  IND       int    <l:$400, c:$82>
N007 (  6, 13)              [000033] -------N---                         │        └──▌  ADD       byref  $301
N005 (  5, 12) CSE #02 (use)[000031] #----------                         │           ├──▌  IND       ref    $2c0
N004 (  3, 10)              [000030] I----------                         │           │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr $103
N006 (  1,  1)              [000032] -----------                         │           └──▌  CNS_INT   long   12 Fseq[s_2, 4] $1c4
N016 ( 18, 18)              [000092] -ACXG---R-- arg3 setup              ├──▌  ASG       ref    $185
N015 (  1,  1)              [000091] D------N---                         │  ├──▌  LCL_VAR   ref    V08 tmp4         d:2 $VN.Void
N014 ( 18, 18)              [000045] --CXG------                         │  └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC $184
N012 (  3, 10)              [000044] H---------- arg0 in rcx             │     ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class $107
N013 (  1,  1)              [000043] ----------- arg1 in rdx             │     └──▌  CNS_INT   long   1 $1c7
N022 ( 19, 13)              [000095] -ACXG---R-- arg4 setup              ├──▌  ASG       int    $VN.Void
N021 (  1,  1)              [000094] D------N---                         │  ├──▌  LCL_VAR   int    V09 tmp5         d:2 $VN.Void
N020 ( 19, 13)              [000063] --CXG------                         │  └──▌  CAST      int <- byte <- long $403
N019 ( 18, 11)              [000056] --CXG------                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong $440
N017 (  3,  3)              [000058] ----------- arg0 in rcx             │        ├──▌  LCL_VAR_ADDR long   V00 loc0          $341
N018 (  1,  1)              [000072] ----------- arg1 in rdx             │        └──▌  CNS_INT   int    0 $44
N023 (  1,  1)              [000075] ----------- arg5 out+28             ├──▌  CNS_INT   int    1 $46
N024 (  1,  1)              [000090] ----------- arg2 in r8              ├──▌  LCL_VAR   int    V07 tmp3         u:2 (last use) <l:$400, c:$82>
N025 (  1,  1)              [000093] ----------- arg3 in r9              ├──▌  LCL_VAR   ref    V08 tmp4         u:2 (last use) $2c1
N026 (  1,  1)              [000096] ----------- arg4 in out+20          ├──▌  LCL_VAR   int    V09 tmp5         u:2 (last use) $403
N027 (  3,  3)              [000048] ----------- arg0 in rcx             ├──▌  LCL_VAR_ADDR long   V01 loc1          $342
N028 (  4,  5)              [000051] ----------- arg1 in rdx             └──▌  LCL_FLD   ubyte (AX) V00 loc0         [+0] <l:$480, c:$4c0>

***** BB01
STMT00011 ( 0x04B[E-] ... ??? )
N001 (  0,  0)              [000068] -----------                         ▌  RETURN    void   $VN.Void

-------------------------------------------------------------------------------------------------------------------


Aggressive CSE Promotion cutoff is 200.000000
Moderate CSE Promotion cutoff is 100.000000
enregCount is 4
Framesize estimate is 0x0030
We have a small frame

Sorted CSE candidates:
CSE #01, {$240, $181} useCnt=2: [def=100.000000, use=200.000000, cost= 17      ]
        :: N003 ( 17, 18) CSE #01 (def)[000013] H-CXG------                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $241
CSE #02, {$2c0, $2  } useCnt=1: [def=100.000000, use=100.000000, cost=  5      ]
        :: N005 (  5, 12) CSE #02 (def)[000015] #----------                         ▌  IND       ref    $2c0


Considering CSE #01 {$240, $181} [def=100.000000, use=200.000000, cost= 17      ]
CSE Expression : 
N003 ( 17, 18) CSE #01 (def)[000013] H-CXG------                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $241
N001 (  2, 10)              [000011] ----------- arg0 in rcx             ├──▌  CNS_INT   long   0x7ff9372b1818 $1c0
N002 (  1,  1)              [000012] ----------- arg1 in rdx             └──▌  CNS_INT   int    5 $43

Aggressive CSE Promotion (400.000000 >= 200.000000)
cseRefCnt=400.000000, aggressiveRefCnt=200.000000, moderateRefCnt=100.000000
defCnt=100.000000, useCnt=200.000000, cost=17, size=18
def_cost=1, use_cost=1, extra_no_cost=68, extra_yes_cost=0
CSE cost savings check (3468.000000 >= 300.000000) passes

Promoting CSE:

lvaGrabTemp returning 10 (V10 rat0) (a long lifetime temp) called for CSE - aggressive.
CSE #01 is single-def, so associated CSE temp V10 will be in SSA
New refCnts for V10: refCnt =  2, refCntWtd = 2
New refCnts for V10: refCnt =  3, refCntWtd = 3
New refCnts for V10: refCnt =  4, refCntWtd = 4

CSE #01 def at [000013] replaced in BB01 with def of V10
ReMorphing args for 13.CALL:
Args for [000013].CALL after fgMorphArgs:
CallArg[[000011].CNS_INT long (By value), 1 reg: rcx, byteAlignment=8, isLate, processed]
CallArg[[000012].CNS_INT int (By value), 1 reg: rdx, byteAlignment=8, isLate, processed]
OutgoingArgsStackSize is 32

optValnumCSE morphed tree:
N007 ( 18, 19)              [000100] -ACXG------                         ▌  COMMA     long   $241
N005 ( 17, 18) CSE #01 (def)[000098] -ACXG---R--                         ├──▌  ASG       long   $VN.Void
N004 (  1,  1)              [000097] D------N---                         │  ├──▌  LCL_VAR   long   V10 cse0         d:1 $VN.Void
N003 ( 17, 18)              [000013] H-CXG------                         │  └──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $241
N001 (  2, 10)              [000011] ----------- arg0 in rcx             │     ├──▌  CNS_INT   long   0x7ff9372b1818 $1c0
N002 (  1,  1)              [000012] ----------- arg1 in rdx             │     └──▌  CNS_INT   int    5 $43
N006 (  1,  1)              [000099] -----------                         └──▌  LCL_VAR   long   V10 cse0         u:1 $241


Working on the replacement of the CSE #01 use at [000021] in BB01
optValnumCSE morphed tree:
N009 ( 24, 26)              [000025] -A--G---R--                         ▌  ASG       struct (copy) $182
N008 (  9,  6)              [000024] D---G--N---                         ├──▌  LCL_VAR   struct<S0, 24>(AX) V00 loc0          $VN.Void
N007 ( 14, 19)              [000023] n---G------                         └──▌  OBJ       struct<S0, 24> <l:$382, c:$381>
N006 (  8, 15)              [000022] ----G------                            └──▌  COMMA     byref  $340
N001 (  1,  1)              [000101] -----------                               ├──▌  LCL_VAR   long   V10 cse0         u:1 $240
N005 (  7, 14)              [000017] -----------                               └──▌  ADD       byref  $300
N003 (  5, 12) CSE #02 (def)[000015] #----------                                  ├──▌  IND       ref    $2c0
N002 (  3, 10)              [000014] I----------                                  │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr $103
N004 (  1,  1)              [000016] -----------                                  └──▌  CNS_INT   long   8 Fseq[s_2] $1c2


Working on the replacement of the CSE #01 use at [000037] in BB01
ReMorphing args for 65.CALL:
ReMorphing args for 45.CALL:
Args for [000045].CALL after fgMorphArgs:
CallArg[[000044].CNS_INT long (By value), 1 reg: rcx, byteAlignment=8, isLate, processed]
CallArg[[000043].CNS_INT long (By value), 1 reg: rdx, byteAlignment=8, isLate, processed]
OutgoingArgsStackSize is 32

ReMorphing args for 56.CALL:
Args for [000056].CALL after fgMorphArgs:
CallArg[[000058].LCL_VAR_ADDR struct (By ref), 1 reg: rcx, byteAlignment=8, isLate, processed, isStruct]
CallArg[[000072].CNS_INT ushort (By value), 1 reg: rdx, byteAlignment=8, isLate, processed]
OutgoingArgsStackSize is 32

Args for [000065].CALL after fgMorphArgs:
CallArg[[000048].LCL_VAR_ADDR struct (By ref), 1 reg: rcx, byteAlignment=8, isLate, processed, isStruct]
CallArg[[000051].LCL_FLD ubyte (By value), 1 reg: rdx, byteAlignment=8, isLate, processed]
CallArg[[000090].LCL_VAR int (By value), 1 reg: r8, byteAlignment=8, isLate, tmpNum=V07, isTmp, processed]
CallArg[[000093].LCL_VAR ref (By value), 1 reg: r9, byteAlignment=8, isLate, tmpNum=V08, isTmp, processed]
CallArg[[000096].LCL_VAR byte (By value), byteSize=8, byteOffset=32, byteAlignment=8, isLate, tmpNum=V09, isTmp, processed]
CallArg[[000075].CNS_INT ushort (By value), byteSize=8, byteOffset=40, byteAlignment=8, processed]
OutgoingArgsStackSize is 48

optValnumCSE morphed tree:
N027 ( 83, 69)              [000065] -ACXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort) $VN.Void
N009 (  9, 16)              [000089] -A--G---R-- arg2 setup              ├──▌  ASG       int    $182
N008 (  1,  1)              [000088] D------N---                         │  ├──▌  LCL_VAR   int    V07 tmp3         d:2 $VN.Void
N007 (  9, 16)              [000038] ----G------                         │  └──▌  COMMA     int    <l:$402, c:$401>
N001 (  1,  1)              [000102] -----------                         │     ├──▌  LCL_VAR   long   V10 cse0         u:1 $240
N006 (  8, 15)              [000087] n---G------                         │     └──▌  IND       int    <l:$400, c:$82>
N005 (  6, 13)              [000033] -------N---                         │        └──▌  ADD       byref  $301
N003 (  5, 12) CSE #02 (use)[000031] #----------                         │           ├──▌  IND       ref    $2c0
N002 (  3, 10)              [000030] I----------                         │           │  └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr $103
N004 (  1,  1)              [000032] -----------                         │           └──▌  CNS_INT   long   12 Fseq[s_2, 4] $1c4
N014 ( 18, 18)              [000092] -ACXG---R-- arg3 setup              ├──▌  ASG       ref    $185
N013 (  1,  1)              [000091] D------N---                         │  ├──▌  LCL_VAR   ref    V08 tmp4         d:2 $VN.Void
N012 ( 18, 18)              [000045] --CXG------                         │  └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC $184
N010 (  3, 10)              [000044] H---------- arg0 in rcx             │     ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class $107
N011 (  1,  1)              [000043] ----------- arg1 in rdx             │     └──▌  CNS_INT   long   1 $1c7
N020 ( 19, 13)              [000095] -ACXG---R-- arg4 setup              ├──▌  ASG       int    $VN.Void
N019 (  1,  1)              [000094] D------N---                         │  ├──▌  LCL_VAR   int    V09 tmp5         d:2 $VN.Void
N018 ( 19, 13)              [000063] --CXG------                         │  └──▌  CAST      int <- byte <- long $403
N017 ( 18, 11)              [000056] --CXG------                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong $440
N015 (  3,  3)              [000058] ----------- arg0 in rcx             │        ├──▌  LCL_VAR_ADDR long   V00 loc0          $341
N016 (  1,  1)              [000072] ----------- arg1 in rdx             │        └──▌  CNS_INT   int    0 $44
N021 (  1,  1)              [000075] ----------- arg5 out+28             ├──▌  CNS_INT   int    1 $46
N022 (  1,  1)              [000090] ----------- arg2 in r8              ├──▌  LCL_VAR   int    V07 tmp3         u:2 (last use) <l:$400, c:$82>
N023 (  1,  1)              [000093] ----------- arg3 in r9              ├──▌  LCL_VAR   ref    V08 tmp4         u:2 (last use) $2c1
N024 (  1,  1)              [000096] ----------- arg4 in out+20          ├──▌  LCL_VAR   int    V09 tmp5         u:2 (last use) $403
N025 (  3,  3)              [000048] ----------- arg0 in rcx             ├──▌  LCL_VAR_ADDR long   V01 loc1          $342
N026 (  4,  5)              [000051] ----G------ arg1 in rdx             └──▌  LCL_FLD   ubyte (AX) V00 loc0         [+0] <l:$480, c:$4c0>


Considering CSE #02 {$2c0, $2  } [def=100.000000, use=100.000000, cost=  5      ]
CSE Expression : 
N003 (  5, 12) CSE #02 (def)[000015] #----------                         ▌  IND       ref    $2c0
N002 (  3, 10)              [000014] I----------                         └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr $103

Aggressive CSE Promotion (300.000000 >= 200.000000)
cseRefCnt=300.000000, aggressiveRefCnt=200.000000, moderateRefCnt=100.000000
defCnt=100.000000, useCnt=100.000000, cost=5, size=12
def_cost=1, use_cost=1, extra_no_cost=22, extra_yes_cost=0
CSE cost savings check (522.000000 >= 200.000000) passes

Promoting CSE:

lvaGrabTemp returning 11 (V11 rat0) (a long lifetime temp) called for CSE - aggressive.
CSE #02 is single-def, so associated CSE temp V11 will be in SSA
New refCnts for V11: refCnt =  2, refCntWtd = 2
New refCnts for V11: refCnt =  3, refCntWtd = 3

CSE #02 def at [000015] replaced in BB01 with def of V11
optValnumCSE morphed tree:
N013 ( 25, 27)              [000025] -A--G---R--                         ▌  ASG       struct (copy) $182
N012 (  9,  6)              [000024] D---G--N---                         ├──▌  LCL_VAR   struct<S0, 24>(AX) V00 loc0          $VN.Void
N011 ( 15, 20)              [000023] nA--G------                         └──▌  OBJ       struct<S0, 24> <l:$382, c:$381>
N010 (  9, 16)              [000022] -A--G------                            └──▌  COMMA     byref  $340
N001 (  1,  1)              [000101] -----------                               ├──▌  LCL_VAR   long   V10 cse0         u:1 $240
N009 (  8, 15)              [000017] -A---------                               └──▌  ADD       byref  $300
N007 (  6, 13)              [000106] -A---------                                  ├──▌  COMMA     ref    $2c0
N005 (  5, 12) CSE #02 (def)[000104] -A------R--                                  │  ├──▌  ASG       ref    $VN.Void
N004 (  1,  1)              [000103] D------N---                                  │  │  ├──▌  LCL_VAR   ref    V11 cse1         d:1 $VN.Void
N003 (  5, 12)              [000015] #----------                                  │  │  └──▌  IND       ref    $2c0
N002 (  3, 10)              [000014] I----------                                  │  │     └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr $103
N006 (  1,  1)              [000105] -----------                                  │  └──▌  LCL_VAR   ref    V11 cse1         u:1 $2c0
N008 (  1,  1)              [000016] -----------                                  └──▌  CNS_INT   long   8 Fseq[s_2] $1c2


Working on the replacement of the CSE #02 use at [000031] in BB01
ReMorphing args for 65.CALL:
ReMorphing args for 45.CALL:
Args for [000045].CALL after fgMorphArgs:
CallArg[[000044].CNS_INT long (By value), 1 reg: rcx, byteAlignment=8, isLate, processed]
CallArg[[000043].CNS_INT long (By value), 1 reg: rdx, byteAlignment=8, isLate, processed]
OutgoingArgsStackSize is 32

ReMorphing args for 56.CALL:
Args for [000056].CALL after fgMorphArgs:
CallArg[[000058].LCL_VAR_ADDR struct (By ref), 1 reg: rcx, byteAlignment=8, isLate, processed, isStruct]
CallArg[[000072].CNS_INT ushort (By value), 1 reg: rdx, byteAlignment=8, isLate, processed]
OutgoingArgsStackSize is 32

Args for [000065].CALL after fgMorphArgs:
CallArg[[000048].LCL_VAR_ADDR struct (By ref), 1 reg: rcx, byteAlignment=8, isLate, processed, isStruct]
CallArg[[000051].LCL_FLD ubyte (By value), 1 reg: rdx, byteAlignment=8, isLate, processed]
CallArg[[000090].LCL_VAR int (By value), 1 reg: r8, byteAlignment=8, isLate, tmpNum=V07, isTmp, processed]
CallArg[[000093].LCL_VAR ref (By value), 1 reg: r9, byteAlignment=8, isLate, tmpNum=V08, isTmp, processed]
CallArg[[000096].LCL_VAR byte (By value), byteSize=8, byteOffset=32, byteAlignment=8, isLate, tmpNum=V09, isTmp, processed]
CallArg[[000075].CNS_INT ushort (By value), byteSize=8, byteOffset=40, byteAlignment=8, processed]
OutgoingArgsStackSize is 48

optValnumCSE morphed tree:
N026 ( 79, 58)              [000065] -ACXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort) $VN.Void
N008 (  5,  5)              [000089] -A--G---R-- arg2 setup              ├──▌  ASG       int    $182
N007 (  1,  1)              [000088] D------N---                         │  ├──▌  LCL_VAR   int    V07 tmp3         d:2 $VN.Void
N006 (  5,  5)              [000038] ----G------                         │  └──▌  COMMA     int    <l:$402, c:$401>
N001 (  1,  1)              [000102] -----------                         │     ├──▌  LCL_VAR   long   V10 cse0         u:1 $240
N005 (  4,  4)              [000087] n---G------                         │     └──▌  IND       int    <l:$400, c:$82>
N004 (  2,  2)              [000033] -------N---                         │        └──▌  ADD       byref  $301
N002 (  1,  1)              [000107] -----------                         │           ├──▌  LCL_VAR   ref    V11 cse1         u:1 $2c0
N003 (  1,  1)              [000032] -----------                         │           └──▌  CNS_INT   long   12 Fseq[s_2, 4] $1c4
N013 ( 18, 18)              [000092] -ACXG---R-- arg3 setup              ├──▌  ASG       ref    $185
N012 (  1,  1)              [000091] D------N---                         │  ├──▌  LCL_VAR   ref    V08 tmp4         d:2 $VN.Void
N011 ( 18, 18)              [000045] --CXG------                         │  └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC $184
N009 (  3, 10)              [000044] H---------- arg0 in rcx             │     ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class $107
N010 (  1,  1)              [000043] ----------- arg1 in rdx             │     └──▌  CNS_INT   long   1 $1c7
N019 ( 19, 13)              [000095] -ACXG---R-- arg4 setup              ├──▌  ASG       int    $VN.Void
N018 (  1,  1)              [000094] D------N---                         │  ├──▌  LCL_VAR   int    V09 tmp5         d:2 $VN.Void
N017 ( 19, 13)              [000063] --CXG------                         │  └──▌  CAST      int <- byte <- long $403
N016 ( 18, 11)              [000056] --CXG------                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong $440
N014 (  3,  3)              [000058] ----------- arg0 in rcx             │        ├──▌  LCL_VAR_ADDR long   V00 loc0          $341
N015 (  1,  1)              [000072] ----------- arg1 in rdx             │        └──▌  CNS_INT   int    0 $44
N020 (  1,  1)              [000075] ----------- arg5 out+28             ├──▌  CNS_INT   int    1 $46
N021 (  1,  1)              [000090] ----------- arg2 in r8              ├──▌  LCL_VAR   int    V07 tmp3         u:2 (last use) <l:$400, c:$82>
N022 (  1,  1)              [000093] ----------- arg3 in r9              ├──▌  LCL_VAR   ref    V08 tmp4         u:2 (last use) $2c1
N023 (  1,  1)              [000096] ----------- arg4 in out+20          ├──▌  LCL_VAR   int    V09 tmp5         u:2 (last use) $403
N024 (  3,  3)              [000048] ----------- arg0 in rcx             ├──▌  LCL_VAR_ADDR long   V01 loc1          $342
N025 (  4,  5)              [000051] ----G------ arg1 in rdx             └──▌  LCL_FLD   ubyte (AX) V00 loc0         [+0] <l:$480, c:$4c0>


*************** Finishing PHASE Optimize Valnum CSEs
Trees after Optimize Valnum CSEs

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..04C) (return), preds={} succs={}

***** BB01
STMT00000 ( 0x000[E-] ... 0x005 )
N004 ( 17, 16) [000003] -AC-----R--                         ▌  ASG       ref    $VN.Void
N003 (  1,  1) [000002] D------N---                         ├──▌  LCL_VAR   ref    V05 tmp1         d:2 $VN.Void
N002 ( 17, 16) [000001] --C--------                         └──▌  CALL help ref    CORINFO_HELP_NEWSFAST $180
N001 (  3, 10) [000000] H---------- arg0 in rcx                └──▌  CNS_INT(h) long   0x7ff93744e858 class $100

***** BB01
STMT00002 ( 0x005[--] ... ??? )
N007 ( 18, 19) [000100] -ACXG------                         ▌  COMMA     long   $241
N005 ( 17, 18) [000098] -ACXG---R--                         ├──▌  ASG       long   $VN.Void
N004 (  1,  1) [000097] D------N---                         │  ├──▌  LCL_VAR   long   V10 cse0         d:1 $VN.Void
N003 ( 17, 18) [000013] H-CXG------                         │  └──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $241
N001 (  2, 10) [000011] ----------- arg0 in rcx             │     ├──▌  CNS_INT   long   0x7ff9372b1818 $1c0
N002 (  1,  1) [000012] ----------- arg1 in rdx             │     └──▌  CNS_INT   int    5 $43
N006 (  1,  1) [000099] -----------                         └──▌  LCL_VAR   long   V10 cse0         u:1 $241

***** BB01
STMT00003 ( ??? ... ??? )
N004 (  7, 14) [000009] -A--G---R--                         ▌  ASG       ref    $VN.Void
N003 (  5, 12) [000008] h---G--N---                         ├──▌  IND       ref    $VN.Void
N002 (  3, 10) [000007] I----------                         │  └──▌  CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt] $101
N001 (  1,  1) [000006] -----------                         └──▌  LCL_VAR   ref    V05 tmp1         u:2 (last use) $180

***** BB01
STMT00004 ( 0x00A[E-] ... 0x014 )
N013 ( 25, 27) [000025] -A--G---R--                         ▌  ASG       struct (copy) $182
N012 (  9,  6) [000024] D---G--N---                         ├──▌  LCL_VAR   struct<S0, 24>(AX) V00 loc0          $VN.Void
N011 ( 15, 20) [000023] nA--G------                         └──▌  OBJ       struct<S0, 24> <l:$382, c:$381>
N010 (  9, 16) [000022] -A--G------                            └──▌  COMMA     byref  $340
N001 (  1,  1) [000101] -----------                               ├──▌  LCL_VAR   long   V10 cse0         u:1 $240
N009 (  8, 15) [000017] -A---------                               └──▌  ADD       byref  $300
N007 (  6, 13) [000106] -A---------                                  ├──▌  COMMA     ref    $2c0
N005 (  5, 12) [000104] -A------R--                                  │  ├──▌  ASG       ref    $VN.Void
N004 (  1,  1) [000103] D------N---                                  │  │  ├──▌  LCL_VAR   ref    V11 cse1         d:1 $VN.Void
N003 (  5, 12) [000015] #----------                                  │  │  └──▌  IND       ref    $2c0
N002 (  3, 10) [000014] I----------                                  │  │     └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr $103
N006 (  1,  1) [000105] -----------                                  │  └──▌  LCL_VAR   ref    V11 cse1         u:1 $2c0
N008 (  1,  1) [000016] -----------                                  └──▌  CNS_INT   long   8 Fseq[s_2] $1c2

***** BB01
STMT00010 ( ??? ... ??? )
N026 ( 79, 58) [000065] -ACXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort) $VN.Void
N008 (  5,  5) [000089] -A--G---R-- arg2 setup              ├──▌  ASG       int    $182
N007 (  1,  1) [000088] D------N---                         │  ├──▌  LCL_VAR   int    V07 tmp3         d:2 $VN.Void
N006 (  5,  5) [000038] ----G------                         │  └──▌  COMMA     int    <l:$402, c:$401>
N001 (  1,  1) [000102] -----------                         │     ├──▌  LCL_VAR   long   V10 cse0         u:1 $240
N005 (  4,  4) [000087] n---G------                         │     └──▌  IND       int    <l:$400, c:$82>
N004 (  2,  2) [000033] -------N---                         │        └──▌  ADD       byref  $301
N002 (  1,  1) [000107] -----------                         │           ├──▌  LCL_VAR   ref    V11 cse1         u:1 $2c0
N003 (  1,  1) [000032] -----------                         │           └──▌  CNS_INT   long   12 Fseq[s_2, 4] $1c4
N013 ( 18, 18) [000092] -ACXG---R-- arg3 setup              ├──▌  ASG       ref    $185
N012 (  1,  1) [000091] D------N---                         │  ├──▌  LCL_VAR   ref    V08 tmp4         d:2 $VN.Void
N011 ( 18, 18) [000045] --CXG------                         │  └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC $184
N009 (  3, 10) [000044] H---------- arg0 in rcx             │     ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class $107
N010 (  1,  1) [000043] ----------- arg1 in rdx             │     └──▌  CNS_INT   long   1 $1c7
N019 ( 19, 13) [000095] -ACXG---R-- arg4 setup              ├──▌  ASG       int    $VN.Void
N018 (  1,  1) [000094] D------N---                         │  ├──▌  LCL_VAR   int    V09 tmp5         d:2 $VN.Void
N017 ( 19, 13) [000063] --CXG------                         │  └──▌  CAST      int <- byte <- long $403
N016 ( 18, 11) [000056] --CXG------                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong $440
N014 (  3,  3) [000058] ----------- arg0 in rcx             │        ├──▌  LCL_VAR_ADDR long   V00 loc0          $341
N015 (  1,  1) [000072] ----------- arg1 in rdx             │        └──▌  CNS_INT   int    0 $44
N020 (  1,  1) [000075] ----------- arg5 out+28             ├──▌  CNS_INT   int    1 $46
N021 (  1,  1) [000090] ----------- arg2 in r8              ├──▌  LCL_VAR   int    V07 tmp3         u:2 (last use) <l:$400, c:$82>
N022 (  1,  1) [000093] ----------- arg3 in r9              ├──▌  LCL_VAR   ref    V08 tmp4         u:2 (last use) $2c1
N023 (  1,  1) [000096] ----------- arg4 in out+20          ├──▌  LCL_VAR   int    V09 tmp5         u:2 (last use) $403
N024 (  3,  3) [000048] ----------- arg0 in rcx             ├──▌  LCL_VAR_ADDR long   V01 loc1          $342
N025 (  4,  5) [000051] ----G------ arg1 in rdx             └──▌  LCL_FLD   ubyte (AX) V00 loc0         [+0] <l:$480, c:$4c0>

***** BB01
STMT00011 ( 0x04B[E-] ... ??? )
N001 (  0,  0) [000068] -----------                         ▌  RETURN    void   $VN.Void

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
SSA checks completed successfully
*************** In fgDebugCheckLoopTable
Disabling SSA checking before assertion prop

*************** Starting PHASE Assertion prop
GenTreeNode creates assertion:
N011 ( 15, 20) [000023] nA--G------                         ▌  OBJ       struct<S0, 24> <l:$382, c:$381>
In BB01 New Global Constant Assertion: ($2c0,$0) V11.01 != null, index = #01

BB01 valueGen = #01

BB01:
 in   = #NA
 out  = #01

Propagating #NA for BB01, stmt STMT00000, tree [000000], tree -> #NA
Propagating #NA for BB01, stmt STMT00000, tree [000001], tree -> #NA
Propagating #NA for BB01, stmt STMT00000, tree [000002], tree -> #NA
Propagating #NA for BB01, stmt STMT00000, tree [000003], tree -> #NA
Propagating #NA for BB01, stmt STMT00002, tree [000011], tree -> #NA
Propagating #NA for BB01, stmt STMT00002, tree [000012], tree -> #NA
Propagating #NA for BB01, stmt STMT00002, tree [000013], tree -> #NA
Propagating #NA for BB01, stmt STMT00002, tree [000097], tree -> #NA
Propagating #NA for BB01, stmt STMT00002, tree [000098], tree -> #NA
Propagating #NA for BB01, stmt STMT00002, tree [000099], tree -> #NA
Propagating #NA for BB01, stmt STMT00002, tree [000100], tree -> #NA
Propagating #NA for BB01, stmt STMT00003, tree [000006], tree -> #NA
Propagating #NA for BB01, stmt STMT00003, tree [000007], tree -> #NA
Propagating #NA for BB01, stmt STMT00003, tree [000008], tree -> #NA
Propagating #NA for BB01, stmt STMT00003, tree [000009], tree -> #NA
Propagating #NA for BB01, stmt STMT00004, tree [000101], tree -> #NA
Propagating #NA for BB01, stmt STMT00004, tree [000014], tree -> #NA
Propagating #NA for BB01, stmt STMT00004, tree [000015], tree -> #NA
Propagating #NA for BB01, stmt STMT00004, tree [000103], tree -> #NA
Propagating #NA for BB01, stmt STMT00004, tree [000104], tree -> #NA
Propagating #NA for BB01, stmt STMT00004, tree [000105], tree -> #NA
Propagating #NA for BB01, stmt STMT00004, tree [000106], tree -> #NA
Propagating #NA for BB01, stmt STMT00004, tree [000016], tree -> #NA
Propagating #NA for BB01, stmt STMT00004, tree [000017], tree -> #NA
Propagating #NA for BB01, stmt STMT00004, tree [000022], tree -> #NA
Propagating #NA for BB01, stmt STMT00004, tree [000023], tree -> #01
Propagating #01 for BB01, stmt STMT00004, tree [000024], tree -> #NA
Propagating #01 for BB01, stmt STMT00004, tree [000025], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000102], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000107], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000032], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000033], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000087], tree -> #01
Propagating #01 for BB01, stmt STMT00010, tree [000038], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000088], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000089], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000044], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000043], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000045], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000091], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000092], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000058], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000072], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000056], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000063], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000094], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000095], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000075], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000090], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000093], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000096], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000048], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000051], tree -> #NA
Propagating #01 for BB01, stmt STMT00010, tree [000065], tree -> #NA
Propagating #01 for BB01, stmt STMT00011, tree [000068], tree -> #NA

*************** Finishing PHASE Assertion prop [no changes]

*************** Starting PHASE Optimize index checks

*************** Finishing PHASE Optimize index checks [no changes]

*************** Starting PHASE VN-based dead store removal
Considering [000003] for removal...
 -- no; first explicit def of a non-STRUCT local
Considering [000089] for removal...
 -- no; 'explicit init'
Considering [000092] for removal...
 -- no; first explicit def of a non-STRUCT local
Considering [000095] for removal...
 -- no; 'explicit init'

*************** Finishing PHASE VN-based dead store removal [no changes]

*************** Starting PHASE Insert GC Polls

*************** Finishing PHASE Insert GC Polls [no changes]

*************** Starting PHASE Optimize bools
*************** In optOptimizeBools()

optimized 0 BBJ_COND cases, 0 BBJ_RETURN cases in 1 passes

*************** Finishing PHASE Optimize bools [no changes]

*************** Starting PHASE If conversion

*************** Finishing PHASE If conversion [no changes]

*************** Starting PHASE Optimize layout

*************** In fgUpdateFlowGraph()
Before updating the flow graph:

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

*************** In fgDebugCheckBBlist

*************** In fgUpdateFlowGraph()
Before updating the flow graph:

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

*************** In fgDebugCheckBBlist

*************** Finishing PHASE Optimize layout
Trees after Optimize layout

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..04C) (return), preds={} succs={}

***** BB01
STMT00000 ( 0x000[E-] ... 0x005 )
N004 ( 17, 16) [000003] -AC-----R--                         ▌  ASG       ref    $VN.Void
N003 (  1,  1) [000002] D------N---                         ├──▌  LCL_VAR   ref    V05 tmp1         d:2 $VN.Void
N002 ( 17, 16) [000001] --C--------                         └──▌  CALL help ref    CORINFO_HELP_NEWSFAST $180
N001 (  3, 10) [000000] H---------- arg0 in rcx                └──▌  CNS_INT(h) long   0x7ff93744e858 class $100

***** BB01
STMT00002 ( 0x005[--] ... ??? )
N007 ( 18, 19) [000100] -ACXG------                         ▌  COMMA     long   $241
N005 ( 17, 18) [000098] -ACXG---R--                         ├──▌  ASG       long   $VN.Void
N004 (  1,  1) [000097] D------N---                         │  ├──▌  LCL_VAR   long   V10 cse0         d:1 $VN.Void
N003 ( 17, 18) [000013] H-CXG------                         │  └──▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $241
N001 (  2, 10) [000011] ----------- arg0 in rcx             │     ├──▌  CNS_INT   long   0x7ff9372b1818 $1c0
N002 (  1,  1) [000012] ----------- arg1 in rdx             │     └──▌  CNS_INT   int    5 $43
N006 (  1,  1) [000099] -----------                         └──▌  LCL_VAR   long   V10 cse0         u:1 $241

***** BB01
STMT00003 ( ??? ... ??? )
N004 (  7, 14) [000009] -A--G---R--                         ▌  ASG       ref    $VN.Void
N003 (  5, 12) [000008] h---G--N---                         ├──▌  IND       ref    $VN.Void
N002 (  3, 10) [000007] I----------                         │  └──▌  CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt] $101
N001 (  1,  1) [000006] -----------                         └──▌  LCL_VAR   ref    V05 tmp1         u:2 (last use) $180

***** BB01
STMT00004 ( 0x00A[E-] ... 0x014 )
N013 ( 25, 27) [000025] -A--G---R--                         ▌  ASG       struct (copy) $182
N012 (  9,  6) [000024] D---G--N---                         ├──▌  LCL_VAR   struct<S0, 24>(AX) V00 loc0          $VN.Void
N011 ( 15, 20) [000023] nA--G------                         └──▌  OBJ       struct<S0, 24> <l:$382, c:$381>
N010 (  9, 16) [000022] -A--G------                            └──▌  COMMA     byref  $340
N001 (  1,  1) [000101] -----------                               ├──▌  LCL_VAR   long   V10 cse0         u:1 $240
N009 (  8, 15) [000017] -A---------                               └──▌  ADD       byref  $300
N007 (  6, 13) [000106] -A---------                                  ├──▌  COMMA     ref    $2c0
N005 (  5, 12) [000104] -A------R--                                  │  ├──▌  ASG       ref    $VN.Void
N004 (  1,  1) [000103] D------N---                                  │  │  ├──▌  LCL_VAR   ref    V11 cse1         d:1 $VN.Void
N003 (  5, 12) [000015] #----------                                  │  │  └──▌  IND       ref    $2c0
N002 (  3, 10) [000014] I----------                                  │  │     └──▌  CNS_INT(h) long   0x1a844001eb8 static box ptr $103
N006 (  1,  1) [000105] -----------                                  │  └──▌  LCL_VAR   ref    V11 cse1         u:1 $2c0
N008 (  1,  1) [000016] -----------                                  └──▌  CNS_INT   long   8 Fseq[s_2] $1c2

***** BB01
STMT00010 ( ??? ... ??? )
N026 ( 79, 58) [000065] -ACXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort) $VN.Void
N008 (  5,  5) [000089] -A--G---R-- arg2 setup              ├──▌  ASG       int    $182
N007 (  1,  1) [000088] D------N---                         │  ├──▌  LCL_VAR   int    V07 tmp3         d:2 $VN.Void
N006 (  5,  5) [000038] ----G------                         │  └──▌  COMMA     int    <l:$402, c:$401>
N001 (  1,  1) [000102] -----------                         │     ├──▌  LCL_VAR   long   V10 cse0         u:1 $240
N005 (  4,  4) [000087] n---G------                         │     └──▌  IND       int    <l:$400, c:$82>
N004 (  2,  2) [000033] -------N---                         │        └──▌  ADD       byref  $301
N002 (  1,  1) [000107] -----------                         │           ├──▌  LCL_VAR   ref    V11 cse1         u:1 $2c0
N003 (  1,  1) [000032] -----------                         │           └──▌  CNS_INT   long   12 Fseq[s_2, 4] $1c4
N013 ( 18, 18) [000092] -ACXG---R-- arg3 setup              ├──▌  ASG       ref    $185
N012 (  1,  1) [000091] D------N---                         │  ├──▌  LCL_VAR   ref    V08 tmp4         d:2 $VN.Void
N011 ( 18, 18) [000045] --CXG------                         │  └──▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC $184
N009 (  3, 10) [000044] H---------- arg0 in rcx             │     ├──▌  CNS_INT(h) long   0x7ff93744e2d8 class $107
N010 (  1,  1) [000043] ----------- arg1 in rdx             │     └──▌  CNS_INT   long   1 $1c7
N019 ( 19, 13) [000095] -ACXG---R-- arg4 setup              ├──▌  ASG       int    $VN.Void
N018 (  1,  1) [000094] D------N---                         │  ├──▌  LCL_VAR   int    V09 tmp5         d:2 $VN.Void
N017 ( 19, 13) [000063] --CXG------                         │  └──▌  CAST      int <- byte <- long $403
N016 ( 18, 11) [000056] --CXG------                         │     └──▌  CALL      long   Program:M23(S0,ushort):ulong $440
N014 (  3,  3) [000058] ----------- arg0 in rcx             │        ├──▌  LCL_VAR_ADDR long   V00 loc0          $341
N015 (  1,  1) [000072] ----------- arg1 in rdx             │        └──▌  CNS_INT   int    0 $44
N020 (  1,  1) [000075] ----------- arg5 out+28             ├──▌  CNS_INT   int    1 $46
N021 (  1,  1) [000090] ----------- arg2 in r8              ├──▌  LCL_VAR   int    V07 tmp3         u:2 (last use) <l:$400, c:$82>
N022 (  1,  1) [000093] ----------- arg3 in r9              ├──▌  LCL_VAR   ref    V08 tmp4         u:2 (last use) $2c1
N023 (  1,  1) [000096] ----------- arg4 in out+20          ├──▌  LCL_VAR   int    V09 tmp5         u:2 (last use) $403
N024 (  3,  3) [000048] ----------- arg0 in rcx             ├──▌  LCL_VAR_ADDR long   V01 loc1          $342
N025 (  4,  5) [000051] ----G------ arg1 in rdx             └──▌  LCL_FLD   ubyte (AX) V00 loc0         [+0] <l:$480, c:$4c0>

***** BB01
STMT00011 ( 0x04B[E-] ... ??? )
N001 (  0,  0) [000068] -----------                         ▌  RETURN    void   $VN.Void

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
*************** In fgDebugCheckLoopTable: loop table not valid

*************** Starting PHASE Determine first cold block
No procedure splitting will be done for this method

*************** Finishing PHASE Determine first cold block [no changes]

*************** Starting PHASE Rationalize IR
rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N004 ( 17, 16) [000003] DAC--------                         ▌  STORE_LCL_VAR ref    V05 tmp1         d:2

rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N005 ( 17, 18) [000098] DACXG------                         ▌  STORE_LCL_VAR long   V10 cse0         d:1

rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N005 (  5, 12) [000104] DA---------                         ▌  STORE_LCL_VAR ref    V11 cse1         d:1

rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N013 ( 25, 27) [000025] DA--G------                         ▌  STORE_LCL_VAR struct<S0, 24>(AX) V00 loc0         

rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N008 (  5,  5) [000089] DA--G------                         ▌  STORE_LCL_VAR int    V07 tmp3         d:2

rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N013 ( 18, 18) [000092] DACXG------                         ▌  STORE_LCL_VAR ref    V08 tmp4         d:2

rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N019 ( 19, 13) [000095] DACXG------                         ▌  STORE_LCL_VAR int    V09 tmp5         d:2


*************** Finishing PHASE Rationalize IR
Trees after Rationalize IR

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj LIR 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..04C) (return), preds={} succs={}
               [000108] -----------                            IL_OFFSET void   INLRT @ 0x000[E-]
N001 (  3, 10) [000000] H----------                    t0 =    CNS_INT(h) long   0x7ff93744e858 class $100
                                                            ┌──▌  t0     long   arg0 in rcx
N002 ( 17, 16) [000001] --C--------                    t1 = ▌  CALL help ref    CORINFO_HELP_NEWSFAST $180
                                                            ┌──▌  t1     ref    
N004 ( 17, 16) [000003] DA---------                         ▌  STORE_LCL_VAR ref    V05 tmp1         d:2
               [000109] -----------                            IL_OFFSET void   INLRT @ 0x005[--]
N001 (  2, 10) [000011] -----------                   t11 =    CNS_INT   long   0x7ff9372b1818 $1c0
N002 (  1,  1) [000012] -----------                   t12 =    CNS_INT   int    5 $43
                                                            ┌──▌  t11    long   arg0 in rcx
                                                            ├──▌  t12    int    arg1 in rdx
N003 ( 17, 18) [000013] H-CXG------                   t13 = ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $241
                                                            ┌──▌  t13    long   
N005 ( 17, 18) [000098] DA-XG------                         ▌  STORE_LCL_VAR long   V10 cse0         d:1
N001 (  1,  1) [000006] -----------                    t6 =    LCL_VAR   ref    V05 tmp1         u:2 (last use) $180
N002 (  3, 10) [000007] I----------                    t7 =    CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt] $101
                                                            ┌──▌  t7     long   
                                                            ├──▌  t6     ref    
               [000110] -A--G------                         ▌  STOREIND  ref   
               [000111] -----------                            IL_OFFSET void   INLRT @ 0x00A[E-]
N002 (  3, 10) [000014] I----------                   t14 =    CNS_INT(h) long   0x1a844001eb8 static box ptr $103
                                                            ┌──▌  t14    long   
N003 (  5, 12) [000015] #----------                   t15 = ▌  IND       ref    $2c0
                                                            ┌──▌  t15    ref    
N005 (  5, 12) [000104] DA---------                         ▌  STORE_LCL_VAR ref    V11 cse1         d:1
N006 (  1,  1) [000105] -----------                  t105 =    LCL_VAR   ref    V11 cse1         u:1 $2c0
N008 (  1,  1) [000016] -----------                   t16 =    CNS_INT   long   8 Fseq[s_2] $1c2
                                                            ┌──▌  t105   ref    
                                                            ├──▌  t16    long   
N009 (  8, 15) [000017] -----------                   t17 = ▌  ADD       byref  $300
                                                            ┌──▌  t17    byref  
N011 ( 15, 20) [000023] n---G------                   t23 = ▌  OBJ       struct<S0, 24> <l:$382, c:$381>
                                                            ┌──▌  t23    struct 
N013 ( 25, 27) [000025] DA--G------                         ▌  STORE_LCL_VAR struct<S0, 24>(AX) V00 loc0         
N002 (  1,  1) [000107] -----------                  t107 =    LCL_VAR   ref    V11 cse1         u:1 $2c0
N003 (  1,  1) [000032] -----------                   t32 =    CNS_INT   long   12 Fseq[s_2, 4] $1c4
                                                            ┌──▌  t107   ref    
                                                            ├──▌  t32    long   
N004 (  2,  2) [000033] -------N---                   t33 = ▌  ADD       byref  $301
                                                            ┌──▌  t33    byref  
N005 (  4,  4) [000087] n---G------                   t87 = ▌  IND       int    <l:$400, c:$82>
                                                            ┌──▌  t87    int    
N008 (  5,  5) [000089] DA--G------                         ▌  STORE_LCL_VAR int    V07 tmp3         d:2
N009 (  3, 10) [000044] H----------                   t44 =    CNS_INT(h) long   0x7ff93744e2d8 class $107
N010 (  1,  1) [000043] -----------                   t43 =    CNS_INT   long   1 $1c7
                                                            ┌──▌  t44    long   arg0 in rcx
                                                            ├──▌  t43    long   arg1 in rdx
N011 ( 18, 18) [000045] --CXG------                   t45 = ▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC $184
                                                            ┌──▌  t45    ref    
N013 ( 18, 18) [000092] DA-XG------                         ▌  STORE_LCL_VAR ref    V08 tmp4         d:2
N014 (  3,  3) [000058] -----------                   t58 =    LCL_VAR_ADDR long   V00 loc0          $341
N015 (  1,  1) [000072] -----------                   t72 =    CNS_INT   int    0 $44
                                                            ┌──▌  t58    long   arg0 in rcx
                                                            ├──▌  t72    int    arg1 in rdx
N016 ( 18, 11) [000056] --CXG------                   t56 = ▌  CALL      long   Program:M23(S0,ushort):ulong $440
                                                            ┌──▌  t56    long   
N017 ( 19, 13) [000063] ---XG------                   t63 = ▌  CAST      int <- byte <- long $403
                                                            ┌──▌  t63    int    
N019 ( 19, 13) [000095] DA-XG------                         ▌  STORE_LCL_VAR int    V09 tmp5         d:2
N020 (  1,  1) [000075] -----------                   t75 =    CNS_INT   int    1 $46
N021 (  1,  1) [000090] -----------                   t90 =    LCL_VAR   int    V07 tmp3         u:2 (last use) <l:$400, c:$82>
N022 (  1,  1) [000093] -----------                   t93 =    LCL_VAR   ref    V08 tmp4         u:2 (last use) $2c1
N023 (  1,  1) [000096] -----------                   t96 =    LCL_VAR   int    V09 tmp5         u:2 (last use) $403
N024 (  3,  3) [000048] -----------                   t48 =    LCL_VAR_ADDR long   V01 loc1          $342
N025 (  4,  5) [000051] -----------                   t51 =    LCL_FLD   ubyte (AX) V00 loc0         [+0] <l:$480, c:$4c0>
                                                            ┌──▌  t75    int    arg5 out+28
                                                            ├──▌  t90    int    arg2 in r8
                                                            ├──▌  t93    ref    arg3 in r9
                                                            ├──▌  t96    int    arg4 in out+20
                                                            ├──▌  t48    long   arg0 in rcx
                                                            ├──▌  t51    ubyte  arg1 in rdx
N026 ( 79, 58) [000065] --CXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort) $VN.Void
               [000112] -----------                            IL_OFFSET void   INLRT @ 0x04B[E-]
N001 (  0,  0) [000068] -----------                            RETURN    void   $VN.Void

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
*************** In fgDebugCheckLoopTable: loop table not valid

*************** Starting PHASE Do 'simple' lowering
Bumping outgoingArgSpaceSize from 0 to 32 for call [000001]
outgoingArgSpaceSize 32 sufficient for call [000013], which needs 32
outgoingArgSpaceSize 32 sufficient for call [000045], which needs 32
outgoingArgSpaceSize 32 sufficient for call [000056], which needs 32
Bumping outgoingArgSpaceSize from 32 to 48 for call [000065]

*************** Finishing PHASE Do 'simple' lowering [no changes]

*************** Starting PHASE Lowering nodeinfo
lowering call (before):
N001 (  3, 10) [000000] H----------                    t0 =    CNS_INT(h) long   0x7ff93744e858 class $100
                                                            ┌──▌  t0     long   arg0 in rcx
N002 ( 17, 16) [000001] --C--------                    t1 = ▌  CALL help ref    CORINFO_HELP_NEWSFAST $180

args:
======

late:
======
lowering arg : N001 (  3, 10) [000000] H----------                         ▌  CNS_INT(h) long   0x7ff93744e858 class $100
new node is :                [000113] -----------                         ▌  PUTARG_REG long   REG rcx

lowering call (after):
N001 (  3, 10) [000000] H----------                    t0 =    CNS_INT(h) long   0x7ff93744e858 class $100
                                                            ┌──▌  t0     long   
               [000113] -----------                  t113 = ▌  PUTARG_REG long   REG rcx
                                                            ┌──▌  t113   long   arg0 in rcx
N002 ( 17, 16) [000001] --C--------                    t1 = ▌  CALL help ref    CORINFO_HELP_NEWSFAST $180

lowering store lcl var/field (before):
N001 (  3, 10) [000000] H----------                    t0 =    CNS_INT(h) long   0x7ff93744e858 class $100
                                                            ┌──▌  t0     long   
               [000113] -----------                  t113 = ▌  PUTARG_REG long   REG rcx
                                                            ┌──▌  t113   long   arg0 in rcx
N002 ( 17, 16) [000001] --C--------                    t1 = ▌  CALL help ref    CORINFO_HELP_NEWSFAST $180
                                                            ┌──▌  t1     ref    
N004 ( 17, 16) [000003] DA---------                         ▌  STORE_LCL_VAR ref    V05 tmp1         d:2

lowering store lcl var/field (after):
N001 (  3, 10) [000000] H----------                    t0 =    CNS_INT(h) long   0x7ff93744e858 class $100
                                                            ┌──▌  t0     long   
               [000113] -----------                  t113 = ▌  PUTARG_REG long   REG rcx
                                                            ┌──▌  t113   long   arg0 in rcx
N002 ( 17, 16) [000001] --C--------                    t1 = ▌  CALL help ref    CORINFO_HELP_NEWSFAST $180
                                                            ┌──▌  t1     ref    
N004 ( 17, 16) [000003] DA---------                         ▌  STORE_LCL_VAR ref    V05 tmp1         d:2

lowering call (before):
N001 (  2, 10) [000011] -----------                   t11 =    CNS_INT   long   0x7ff9372b1818 $1c0
N002 (  1,  1) [000012] -----------                   t12 =    CNS_INT   int    5 $43
                                                            ┌──▌  t11    long   arg0 in rcx
                                                            ├──▌  t12    int    arg1 in rdx
N003 ( 17, 18) [000013] H-CXG------                   t13 = ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $241

args:
======

late:
======
lowering arg : N001 (  2, 10) [000011] -----------                         ▌  CNS_INT   long   0x7ff9372b1818 $1c0
new node is :                [000114] -----------                         ▌  PUTARG_REG long   REG rcx

lowering arg : N002 (  1,  1) [000012] -----------                         ▌  CNS_INT   int    5 $43
new node is :                [000115] -----------                         ▌  PUTARG_REG int    REG rdx

lowering call (after):
N001 (  2, 10) [000011] -----------                   t11 =    CNS_INT   long   0x7ff9372b1818 $1c0
                                                            ┌──▌  t11    long   
               [000114] -----------                  t114 = ▌  PUTARG_REG long   REG rcx
N002 (  1,  1) [000012] -----------                   t12 =    CNS_INT   int    5 $43
                                                            ┌──▌  t12    int    
               [000115] -----------                  t115 = ▌  PUTARG_REG int    REG rdx
                                                            ┌──▌  t114   long   arg0 in rcx
                                                            ├──▌  t115   int    arg1 in rdx
N003 ( 17, 18) [000013] H-CXG------                   t13 = ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $241

lowering store lcl var/field (before):
N001 (  2, 10) [000011] -----------                   t11 =    CNS_INT   long   0x7ff9372b1818 $1c0
                                                            ┌──▌  t11    long   
               [000114] -----------                  t114 = ▌  PUTARG_REG long   REG rcx
N002 (  1,  1) [000012] -----------                   t12 =    CNS_INT   int    5 $43
                                                            ┌──▌  t12    int    
               [000115] -----------                  t115 = ▌  PUTARG_REG int    REG rdx
                                                            ┌──▌  t114   long   arg0 in rcx
                                                            ├──▌  t115   int    arg1 in rdx
N003 ( 17, 18) [000013] H-CXG------                   t13 = ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $241
                                                            ┌──▌  t13    long   
N005 ( 17, 18) [000098] DA-XG------                         ▌  STORE_LCL_VAR long   V10 cse0         d:1

lowering store lcl var/field (after):
N001 (  2, 10) [000011] -----------                   t11 =    CNS_INT   long   0x7ff9372b1818 $1c0
                                                            ┌──▌  t11    long   
               [000114] -----------                  t114 = ▌  PUTARG_REG long   REG rcx
N002 (  1,  1) [000012] -----------                   t12 =    CNS_INT   int    5 $43
                                                            ┌──▌  t12    int    
               [000115] -----------                  t115 = ▌  PUTARG_REG int    REG rdx
                                                            ┌──▌  t114   long   arg0 in rcx
                                                            ├──▌  t115   int    arg1 in rdx
N003 ( 17, 18) [000013] H-CXG------                   t13 = ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $241
                                                            ┌──▌  t13    long   
N005 ( 17, 18) [000098] DA-XG------                         ▌  STORE_LCL_VAR long   V10 cse0         d:1

lowering store lcl var/field (before):
N002 (  3, 10) [000014] I----------                   t14 =    CNS_INT(h) long   0x1a844001eb8 static box ptr $103
                                                            ┌──▌  t14    long   
N003 (  5, 12) [000015] #----------                   t15 = ▌  IND       ref    $2c0
                                                            ┌──▌  t15    ref    
N005 (  5, 12) [000104] DA---------                         ▌  STORE_LCL_VAR ref    V11 cse1         d:1

lowering store lcl var/field (after):
N002 (  3, 10) [000014] I----------                   t14 =    CNS_INT(h) long   0x1a844001eb8 static box ptr $103
                                                            ┌──▌  t14    long   
N003 (  5, 12) [000015] #----------                   t15 = ▌  IND       ref    $2c0
                                                            ┌──▌  t15    ref    
N005 (  5, 12) [000104] DA---------                         ▌  STORE_LCL_VAR ref    V11 cse1         d:1

lowering store lcl var/field (before):
N006 (  1,  1) [000105] -----------                  t105 =    LCL_VAR   ref    V11 cse1         u:1 $2c0
N008 (  1,  1) [000016] -c---------                   t16 =    CNS_INT   long   8 Fseq[s_2] $1c2
                                                            ┌──▌  t105   ref    
                                                            ├──▌  t16    long   
N009 (  8, 15) [000017] -----------                   t17 = ▌  ADD       byref  $300
                                                            ┌──▌  t17    byref  
N011 ( 15, 20) [000023] n---G------                   t23 = ▌  OBJ       struct<S0, 24> <l:$382, c:$381>
                                                            ┌──▌  t23    struct 
N013 ( 25, 27) [000025] DA--G------                         ▌  STORE_LCL_VAR struct<S0, 24>(AX) V00 loc0         


Local V00 should not be enregistered because: written/read in a block op
Addressing mode:
  Base
    N006 (  1,  1) [000105] -----------                         ▌  LCL_VAR   ref    V11 cse1         u:1 $2c0
  + 8
Removing unused node:
  N008 (  1,  1) [000016] -c---------                         ▌  CNS_INT   long   8 Fseq[s_2] $1c2
New addressing mode node:
  N009 (  8, 15) [000017] -----------                         ▌  LEA(b+8)  byref 

lowering store lcl var/field (after):
N006 (  1,  1) [000105] -----------                  t105 =    LCL_VAR   ref    V11 cse1         u:1 $2c0
                                                            ┌──▌  t105   ref    
N009 (  8, 15) [000017] -c---------                   t17 = ▌  LEA(b+8)  byref 
                                                            ┌──▌  t17    byref  
N011 ( 15, 20) [000023] nc--G------                   t23 = ▌  IND       struct
               [000116] Dc---------                  t116 =    LCL_FLD_ADDR byref  V00 loc0         [+0]
                                                            ┌──▌  t116   byref  
                                                            ├──▌  t23    struct 
N013 ( 25, 27) [000025] sA---------                         ▌  STORE_BLK struct<S0, 24> (copy) (Unroll)

Addressing mode:
  Base
    N002 (  1,  1) [000107] -----------                         ▌  LCL_VAR   ref    V11 cse1         u:1 $2c0
  + 12
Removing unused node:
  N003 (  1,  1) [000032] -c---------                         ▌  CNS_INT   long   12 Fseq[s_2, 4] $1c4
New addressing mode node:
  N004 (  2,  2) [000033] -----------                         ▌  LEA(b+12) byref 

lowering store lcl var/field (before):
N002 (  1,  1) [000107] -----------                  t107 =    LCL_VAR   ref    V11 cse1         u:1 $2c0
                                                            ┌──▌  t107   ref    
N004 (  2,  2) [000033] -c---------                   t33 = ▌  LEA(b+12) byref 
                                                            ┌──▌  t33    byref  
N005 (  4,  4) [000087] n---G------                   t87 = ▌  IND       int    <l:$400, c:$82>
                                                            ┌──▌  t87    int    
N008 (  5,  5) [000089] DA--G------                         ▌  STORE_LCL_VAR int    V07 tmp3         d:2

lowering store lcl var/field (after):
N002 (  1,  1) [000107] -----------                  t107 =    LCL_VAR   ref    V11 cse1         u:1 $2c0
                                                            ┌──▌  t107   ref    
N004 (  2,  2) [000033] -c---------                   t33 = ▌  LEA(b+12) byref 
                                                            ┌──▌  t33    byref  
N005 (  4,  4) [000087] n---G------                   t87 = ▌  IND       int    <l:$400, c:$82>
                                                            ┌──▌  t87    int    
N008 (  5,  5) [000089] DA--G------                         ▌  STORE_LCL_VAR int    V07 tmp3         d:2

lowering call (before):
N009 (  3, 10) [000044] H----------                   t44 =    CNS_INT(h) long   0x7ff93744e2d8 class $107
N010 (  1,  1) [000043] -----------                   t43 =    CNS_INT   long   1 $1c7
                                                            ┌──▌  t44    long   arg0 in rcx
                                                            ├──▌  t43    long   arg1 in rdx
N011 ( 18, 18) [000045] --CXG------                   t45 = ▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC $184

args:
======

late:
======
lowering arg : N009 (  3, 10) [000044] H----------                         ▌  CNS_INT(h) long   0x7ff93744e2d8 class $107
new node is :                [000117] -----------                         ▌  PUTARG_REG long   REG rcx

lowering arg : N010 (  1,  1) [000043] -----------                         ▌  CNS_INT   long   1 $1c7
new node is :                [000118] -----------                         ▌  PUTARG_REG long   REG rdx

lowering call (after):
N009 (  3, 10) [000044] H----------                   t44 =    CNS_INT(h) long   0x7ff93744e2d8 class $107
                                                            ┌──▌  t44    long   
               [000117] -----------                  t117 = ▌  PUTARG_REG long   REG rcx
N010 (  1,  1) [000043] -----------                   t43 =    CNS_INT   long   1 $1c7
                                                            ┌──▌  t43    long   
               [000118] -----------                  t118 = ▌  PUTARG_REG long   REG rdx
                                                            ┌──▌  t117   long   arg0 in rcx
                                                            ├──▌  t118   long   arg1 in rdx
N011 ( 18, 18) [000045] --CXG------                   t45 = ▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC $184

lowering store lcl var/field (before):
N009 (  3, 10) [000044] H----------                   t44 =    CNS_INT(h) long   0x7ff93744e2d8 class $107
                                                            ┌──▌  t44    long   
               [000117] -----------                  t117 = ▌  PUTARG_REG long   REG rcx
N010 (  1,  1) [000043] -----------                   t43 =    CNS_INT   long   1 $1c7
                                                            ┌──▌  t43    long   
               [000118] -----------                  t118 = ▌  PUTARG_REG long   REG rdx
                                                            ┌──▌  t117   long   arg0 in rcx
                                                            ├──▌  t118   long   arg1 in rdx
N011 ( 18, 18) [000045] --CXG------                   t45 = ▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC $184
                                                            ┌──▌  t45    ref    
N013 ( 18, 18) [000092] DA-XG------                         ▌  STORE_LCL_VAR ref    V08 tmp4         d:2

lowering store lcl var/field (after):
N009 (  3, 10) [000044] H----------                   t44 =    CNS_INT(h) long   0x7ff93744e2d8 class $107
                                                            ┌──▌  t44    long   
               [000117] -----------                  t117 = ▌  PUTARG_REG long   REG rcx
N010 (  1,  1) [000043] -----------                   t43 =    CNS_INT   long   1 $1c7
                                                            ┌──▌  t43    long   
               [000118] -----------                  t118 = ▌  PUTARG_REG long   REG rdx
                                                            ┌──▌  t117   long   arg0 in rcx
                                                            ├──▌  t118   long   arg1 in rdx
N011 ( 18, 18) [000045] --CXG------                   t45 = ▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC $184
                                                            ┌──▌  t45    ref    
N013 ( 18, 18) [000092] DA-XG------                         ▌  STORE_LCL_VAR ref    V08 tmp4         d:2

lowering call (before):
N014 (  3,  3) [000058] -----------                   t58 =    LCL_VAR_ADDR long   V00 loc0          $341
N015 (  1,  1) [000072] -----------                   t72 =    CNS_INT   int    0 $44
                                                            ┌──▌  t58    long   arg0 in rcx
                                                            ├──▌  t72    int    arg1 in rdx
N016 ( 18, 11) [000056] --CXG------                   t56 = ▌  CALL      long   Program:M23(S0,ushort):ulong $440

args:
======

late:
======
lowering arg : N014 (  3,  3) [000058] -----------                         ▌  LCL_VAR_ADDR long   V00 loc0          $341
new node is :                [000119] -----------                         ▌  PUTARG_REG long   REG rcx

lowering arg : N015 (  1,  1) [000072] -----------                         ▌  CNS_INT   int    0 $44
new node is :                [000120] -----------                         ▌  PUTARG_REG int    REG rdx

results of lowering call:
N001 (  3, 10) [000121] H----------                  t121 =    CNS_INT(h) long   0x7ff93727bac8 ftn
                                                            ┌──▌  t121   long   
N002 (  5, 12) [000122] -----------                  t122 = ▌  IND       long  
lowering call (after):
N014 (  3,  3) [000058] -----------                   t58 =    LCL_VAR_ADDR long   V00 loc0          $341
                                                            ┌──▌  t58    long   
               [000119] -----------                  t119 = ▌  PUTARG_REG long   REG rcx
N015 (  1,  1) [000072] -----------                   t72 =    CNS_INT   int    0 $44
                                                            ┌──▌  t72    int    
               [000120] -----------                  t120 = ▌  PUTARG_REG int    REG rdx
N001 (  3, 10) [000121] Hc---------                  t121 =    CNS_INT(h) long   0x7ff93727bac8 ftn
                                                            ┌──▌  t121   long   
N002 (  5, 12) [000122] -c---------                  t122 = ▌  IND       long   REG NA
                                                            ┌──▌  t119   long   arg0 in rcx
                                                            ├──▌  t120   int    arg1 in rdx
                                                            ├──▌  t122   long   control expr
N016 ( 18, 11) [000056] --CXG------                   t56 = ▌  CALL      long   Program:M23(S0,ushort):ulong $440

lowering store lcl var/field (before):
N014 (  3,  3) [000058] -----------                   t58 =    LCL_VAR_ADDR long   V00 loc0          $341
                                                            ┌──▌  t58    long   
               [000119] -----------                  t119 = ▌  PUTARG_REG long   REG rcx
N015 (  1,  1) [000072] -----------                   t72 =    CNS_INT   int    0 $44
                                                            ┌──▌  t72    int    
               [000120] -----------                  t120 = ▌  PUTARG_REG int    REG rdx
N001 (  3, 10) [000121] Hc---------                  t121 =    CNS_INT(h) long   0x7ff93727bac8 ftn
                                                            ┌──▌  t121   long   
N002 (  5, 12) [000122] -c---------                  t122 = ▌  IND       long   REG NA
                                                            ┌──▌  t119   long   arg0 in rcx
                                                            ├──▌  t120   int    arg1 in rdx
                                                            ├──▌  t122   long   control expr
N016 ( 18, 11) [000056] --CXG------                   t56 = ▌  CALL      long   Program:M23(S0,ushort):ulong $440
                                                            ┌──▌  t56    long   
N017 ( 19, 13) [000063] ---XG------                   t63 = ▌  CAST      int <- byte <- long $403
                                                            ┌──▌  t63    int    
N019 ( 19, 13) [000095] DA-XG------                         ▌  STORE_LCL_VAR int    V09 tmp5         d:2

lowering store lcl var/field (after):
N014 (  3,  3) [000058] -----------                   t58 =    LCL_VAR_ADDR long   V00 loc0          $341
                                                            ┌──▌  t58    long   
               [000119] -----------                  t119 = ▌  PUTARG_REG long   REG rcx
N015 (  1,  1) [000072] -----------                   t72 =    CNS_INT   int    0 $44
                                                            ┌──▌  t72    int    
               [000120] -----------                  t120 = ▌  PUTARG_REG int    REG rdx
N001 (  3, 10) [000121] Hc---------                  t121 =    CNS_INT(h) long   0x7ff93727bac8 ftn
                                                            ┌──▌  t121   long   
N002 (  5, 12) [000122] -c---------                  t122 = ▌  IND       long   REG NA
                                                            ┌──▌  t119   long   arg0 in rcx
                                                            ├──▌  t120   int    arg1 in rdx
                                                            ├──▌  t122   long   control expr
N016 ( 18, 11) [000056] --CXG------                   t56 = ▌  CALL      long   Program:M23(S0,ushort):ulong $440
                                                            ┌──▌  t56    long   
N017 ( 19, 13) [000063] ---XG------                   t63 = ▌  CAST      int <- byte <- long $403
                                                            ┌──▌  t63    int    
N019 ( 19, 13) [000095] DA-XG------                         ▌  STORE_LCL_VAR int    V09 tmp5         d:2

lowering call (before):
N020 (  1,  1) [000075] -----------                   t75 =    CNS_INT   int    1 $46
N021 (  1,  1) [000090] -----------                   t90 =    LCL_VAR   int    V07 tmp3         u:2 (last use) <l:$400, c:$82>
N022 (  1,  1) [000093] -----------                   t93 =    LCL_VAR   ref    V08 tmp4         u:2 (last use) $2c1
N023 (  1,  1) [000096] -----------                   t96 =    LCL_VAR   int    V09 tmp5         u:2 (last use) $403
N024 (  3,  3) [000048] -----------                   t48 =    LCL_VAR_ADDR long   V01 loc1          $342
N025 (  4,  5) [000051] -----------                   t51 =    LCL_FLD   ubyte (AX) V00 loc0         [+0] <l:$480, c:$4c0>
                                                            ┌──▌  t75    int    arg5 out+28
                                                            ├──▌  t90    int    arg2 in r8
                                                            ├──▌  t93    ref    arg3 in r9
                                                            ├──▌  t96    int    arg4 in out+20
                                                            ├──▌  t48    long   arg0 in rcx
                                                            ├──▌  t51    ubyte  arg1 in rdx
N026 ( 79, 58) [000065] --CXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort) $VN.Void

args:
======
lowering arg : N020 (  1,  1) [000075] -----------                         ▌  CNS_INT   int    1 $46
new node is :                [000123] -----------                         ▌  PUTARG_STK [+0x28] void  


late:
======
lowering arg : N021 (  1,  1) [000090] -----------                         ▌  LCL_VAR   int    V07 tmp3         u:2 (last use) <l:$400, c:$82>
new node is :                [000124] -----------                         ▌  PUTARG_REG int    REG r8

lowering arg : N022 (  1,  1) [000093] -----------                         ▌  LCL_VAR   ref    V08 tmp4         u:2 (last use) $2c1
new node is :                [000125] -----------                         ▌  PUTARG_REG ref    REG r9

lowering arg : N023 (  1,  1) [000096] -----------                         ▌  LCL_VAR   int    V09 tmp5         u:2 (last use) $403
new node is :                [000126] -----------                         ▌  PUTARG_STK [+0x20] void  

lowering arg : N024 (  3,  3) [000048] -----------                         ▌  LCL_VAR_ADDR long   V01 loc1          $342
new node is :                [000127] -----------                         ▌  PUTARG_REG long   REG rcx

lowering arg : N025 (  4,  5) [000051] -----------                         ▌  LCL_FLD   ubyte (AX) V00 loc0         [+0] <l:$480, c:$4c0>
new node is :                [000128] -----------                         ▌  PUTARG_REG int    REG rdx

results of lowering call:
N001 (  3, 10) [000129] H----------                  t129 =    CNS_INT(h) long   0x7ff93727bae0 ftn
                                                            ┌──▌  t129   long   
N002 (  5, 12) [000130] -----------                  t130 = ▌  IND       long  
lowering call (after):
N020 (  1,  1) [000075] -c---------                   t75 =    CNS_INT   int    1 $46
                                                            ┌──▌  t75    int    
               [000123] -----------                         ▌  PUTARG_STK [+0x28] void  
N021 (  1,  1) [000090] -----------                   t90 =    LCL_VAR   int    V07 tmp3         u:2 (last use) <l:$400, c:$82>
                                                            ┌──▌  t90    int    
               [000124] -----------                  t124 = ▌  PUTARG_REG int    REG r8
N022 (  1,  1) [000093] -----------                   t93 =    LCL_VAR   ref    V08 tmp4         u:2 (last use) $2c1
                                                            ┌──▌  t93    ref    
               [000125] -----------                  t125 = ▌  PUTARG_REG ref    REG r9
N023 (  1,  1) [000096] -----------                   t96 =    LCL_VAR   int    V09 tmp5         u:2 (last use) $403
                                                            ┌──▌  t96    int    
               [000126] -----------                         ▌  PUTARG_STK [+0x20] void  
N024 (  3,  3) [000048] -----------                   t48 =    LCL_VAR_ADDR long   V01 loc1          $342
                                                            ┌──▌  t48    long   
               [000127] -----------                  t127 = ▌  PUTARG_REG long   REG rcx
N025 (  4,  5) [000051] -----------                   t51 =    LCL_FLD   ubyte (AX) V00 loc0         [+0] <l:$480, c:$4c0>
                                                            ┌──▌  t51    ubyte  
               [000128] -----------                  t128 = ▌  PUTARG_REG int    REG rdx
N001 (  3, 10) [000129] Hc---------                  t129 =    CNS_INT(h) long   0x7ff93727bae0 ftn
                                                            ┌──▌  t129   long   
N002 (  5, 12) [000130] -c---------                  t130 = ▌  IND       long   REG NA
                                                            ┌──▌  t124   int    arg2 in r8
                                                            ├──▌  t125   ref    arg3 in r9
                                                            ├──▌  t127   long   arg0 in rcx
                                                            ├──▌  t128   int    arg1 in rdx
                                                            ├──▌  t130   long   control expr
N026 ( 79, 58) [000065] --CXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort) $VN.Void

lowering GT_RETURN
N001 (  0,  0) [000068] -----------                         ▌  RETURN    void   $VN.Void
============Lower has completed modifying nodes.

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj LIR 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..04C) (return), preds={} succs={}
               [000108] -----------                            IL_OFFSET void   INLRT @ 0x000[E-]
N001 (  3, 10) [000000] H----------                    t0 =    CNS_INT(h) long   0x7ff93744e858 class $100
                                                            ┌──▌  t0     long   
               [000113] -----------                  t113 = ▌  PUTARG_REG long   REG rcx
                                                            ┌──▌  t113   long   arg0 in rcx
N002 ( 17, 16) [000001] --C--------                    t1 = ▌  CALL help ref    CORINFO_HELP_NEWSFAST $180
                                                            ┌──▌  t1     ref    
N004 ( 17, 16) [000003] DA---------                         ▌  STORE_LCL_VAR ref    V05 tmp1         d:2
               [000109] -----------                            IL_OFFSET void   INLRT @ 0x005[--]
N001 (  2, 10) [000011] -----------                   t11 =    CNS_INT   long   0x7ff9372b1818 $1c0
                                                            ┌──▌  t11    long   
               [000114] -----------                  t114 = ▌  PUTARG_REG long   REG rcx
N002 (  1,  1) [000012] -----------                   t12 =    CNS_INT   int    5 $43
                                                            ┌──▌  t12    int    
               [000115] -----------                  t115 = ▌  PUTARG_REG int    REG rdx
                                                            ┌──▌  t114   long   arg0 in rcx
                                                            ├──▌  t115   int    arg1 in rdx
N003 ( 17, 18) [000013] H-CXG------                   t13 = ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $241
                                                            ┌──▌  t13    long   
N005 ( 17, 18) [000098] DA-XG------                         ▌  STORE_LCL_VAR long   V10 cse0         d:1
N001 (  1,  1) [000006] -----------                    t6 =    LCL_VAR   ref    V05 tmp1         u:2 (last use) $180
N002 (  3, 10) [000007] I----------                    t7 =    CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt] $101
                                                            ┌──▌  t7     long   
                                                            ├──▌  t6     ref    
               [000110] -A--G------                         ▌  STOREIND  ref   
               [000111] -----------                            IL_OFFSET void   INLRT @ 0x00A[E-]
N002 (  3, 10) [000014] I----------                   t14 =    CNS_INT(h) long   0x1a844001eb8 static box ptr $103
                                                            ┌──▌  t14    long   
N003 (  5, 12) [000015] #----------                   t15 = ▌  IND       ref    $2c0
                                                            ┌──▌  t15    ref    
N005 (  5, 12) [000104] DA---------                         ▌  STORE_LCL_VAR ref    V11 cse1         d:1
N006 (  1,  1) [000105] -----------                  t105 =    LCL_VAR   ref    V11 cse1         u:1 $2c0
                                                            ┌──▌  t105   ref    
N009 (  8, 15) [000017] -c---------                   t17 = ▌  LEA(b+8)  byref 
                                                            ┌──▌  t17    byref  
N011 ( 15, 20) [000023] nc--G------                   t23 = ▌  IND       struct
               [000116] Dc---------                  t116 =    LCL_FLD_ADDR byref  V00 loc0         [+0]
                                                            ┌──▌  t116   byref  
                                                            ├──▌  t23    struct 
N013 ( 25, 27) [000025] sA---------                         ▌  STORE_BLK struct<S0, 24> (copy) (Unroll)
N002 (  1,  1) [000107] -----------                  t107 =    LCL_VAR   ref    V11 cse1         u:1 $2c0
                                                            ┌──▌  t107   ref    
N004 (  2,  2) [000033] -c---------                   t33 = ▌  LEA(b+12) byref 
                                                            ┌──▌  t33    byref  
N005 (  4,  4) [000087] n---G------                   t87 = ▌  IND       int    <l:$400, c:$82>
                                                            ┌──▌  t87    int    
N008 (  5,  5) [000089] DA--G------                         ▌  STORE_LCL_VAR int    V07 tmp3         d:2
N009 (  3, 10) [000044] H----------                   t44 =    CNS_INT(h) long   0x7ff93744e2d8 class $107
                                                            ┌──▌  t44    long   
               [000117] -----------                  t117 = ▌  PUTARG_REG long   REG rcx
N010 (  1,  1) [000043] -----------                   t43 =    CNS_INT   long   1 $1c7
                                                            ┌──▌  t43    long   
               [000118] -----------                  t118 = ▌  PUTARG_REG long   REG rdx
                                                            ┌──▌  t117   long   arg0 in rcx
                                                            ├──▌  t118   long   arg1 in rdx
N011 ( 18, 18) [000045] --CXG------                   t45 = ▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC $184
                                                            ┌──▌  t45    ref    
N013 ( 18, 18) [000092] DA-XG------                         ▌  STORE_LCL_VAR ref    V08 tmp4         d:2
N014 (  3,  3) [000058] -----------                   t58 =    LCL_VAR_ADDR long   V00 loc0          $341
                                                            ┌──▌  t58    long   
               [000119] -----------                  t119 = ▌  PUTARG_REG long   REG rcx
N015 (  1,  1) [000072] -----------                   t72 =    CNS_INT   int    0 $44
                                                            ┌──▌  t72    int    
               [000120] -----------                  t120 = ▌  PUTARG_REG int    REG rdx
N001 (  3, 10) [000121] Hc---------                  t121 =    CNS_INT(h) long   0x7ff93727bac8 ftn
                                                            ┌──▌  t121   long   
N002 (  5, 12) [000122] -c---------                  t122 = ▌  IND       long   REG NA
                                                            ┌──▌  t119   long   arg0 in rcx
                                                            ├──▌  t120   int    arg1 in rdx
                                                            ├──▌  t122   long   control expr
N016 ( 18, 11) [000056] --CXG------                   t56 = ▌  CALL      long   Program:M23(S0,ushort):ulong $440
                                                            ┌──▌  t56    long   
N017 ( 19, 13) [000063] ---XG------                   t63 = ▌  CAST      int <- byte <- long $403
                                                            ┌──▌  t63    int    
N019 ( 19, 13) [000095] DA-XG------                         ▌  STORE_LCL_VAR int    V09 tmp5         d:2
N020 (  1,  1) [000075] -c---------                   t75 =    CNS_INT   int    1 $46
                                                            ┌──▌  t75    int    
               [000123] -----------                         ▌  PUTARG_STK [+0x28] void  
N021 (  1,  1) [000090] -----------                   t90 =    LCL_VAR   int    V07 tmp3         u:2 (last use) <l:$400, c:$82>
                                                            ┌──▌  t90    int    
               [000124] -----------                  t124 = ▌  PUTARG_REG int    REG r8
N022 (  1,  1) [000093] -----------                   t93 =    LCL_VAR   ref    V08 tmp4         u:2 (last use) $2c1
                                                            ┌──▌  t93    ref    
               [000125] -----------                  t125 = ▌  PUTARG_REG ref    REG r9
N023 (  1,  1) [000096] -----------                   t96 =    LCL_VAR   int    V09 tmp5         u:2 (last use) $403
                                                            ┌──▌  t96    int    
               [000126] -----------                         ▌  PUTARG_STK [+0x20] void  
N024 (  3,  3) [000048] -----------                   t48 =    LCL_VAR_ADDR long   V01 loc1          $342
                                                            ┌──▌  t48    long   
               [000127] -----------                  t127 = ▌  PUTARG_REG long   REG rcx
N025 (  4,  5) [000051] -----------                   t51 =    LCL_FLD   ubyte (AX) V00 loc0         [+0] <l:$480, c:$4c0>
                                                            ┌──▌  t51    ubyte  
               [000128] -----------                  t128 = ▌  PUTARG_REG int    REG rdx
N001 (  3, 10) [000129] Hc---------                  t129 =    CNS_INT(h) long   0x7ff93727bae0 ftn
                                                            ┌──▌  t129   long   
N002 (  5, 12) [000130] -c---------                  t130 = ▌  IND       long   REG NA
                                                            ┌──▌  t124   int    arg2 in r8
                                                            ├──▌  t125   ref    arg3 in r9
                                                            ├──▌  t127   long   arg0 in rcx
                                                            ├──▌  t128   int    arg1 in rdx
                                                            ├──▌  t130   long   control expr
N026 ( 79, 58) [000065] --CXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort) $VN.Void
               [000112] -----------                            IL_OFFSET void   INLRT @ 0x04B[E-]
N001 (  0,  0) [000068] -----------                            RETURN    void   $VN.Void

-------------------------------------------------------------------------------------------------------------------

*** lvaComputeRefCounts ***

*** lvaComputeRefCounts -- explicit counts ***
New refCnts for V05: refCnt =  1, refCntWtd = 2
New refCnts for V10: refCnt =  1, refCntWtd = 1
New refCnts for V05: refCnt =  2, refCntWtd = 4
New refCnts for V11: refCnt =  1, refCntWtd = 1
New refCnts for V11: refCnt =  2, refCntWtd = 2
New refCnts for V00: refCnt =  1, refCntWtd = 1
New refCnts for V11: refCnt =  3, refCntWtd = 3
New refCnts for V07: refCnt =  1, refCntWtd = 2
New refCnts for V08: refCnt =  1, refCntWtd = 2
New refCnts for V00: refCnt =  2, refCntWtd = 2
New refCnts for V09: refCnt =  1, refCntWtd = 2
New refCnts for V07: refCnt =  2, refCntWtd = 4
New refCnts for V08: refCnt =  2, refCntWtd = 4
New refCnts for V09: refCnt =  2, refCntWtd = 4
New refCnts for V01: refCnt =  1, refCntWtd = 1
New refCnts for V00: refCnt =  3, refCntWtd = 3

*** lvaComputeRefCounts -- implicit counts ***
*************** In fgLocalVarLiveness()
; Initial local variable assignments
;
;  V00 loc0           struct <S0, 24> do-not-enreg[XSF] addr-exposed
;  V01 loc1           struct <S1, 24> do-not-enreg[XS] addr-exposed ld-addr-op
;  V02 loc2              int 
;  V03 loc3              ref  class-hnd exact
;  V04 OutArgs        lclBlk <48>  "OutgoingArgSpace"
;  V05 tmp1              ref  class-hnd exact single-def "NewObj constructor temp"
;  V06 tmp2           struct <S1, 24> do-not-enreg[S] "impAppendStmt"
;  V07 tmp3              int  "argument with side effect"
;  V08 tmp4              ref  single-def "argument with side effect"
;  V09 tmp5              int  "argument with side effect"
;  V10 cse0             long  "CSE - aggressive"
;  V11 cse1              ref  "CSE - aggressive"
In fgLocalVarLivenessInit

Local V00 should not be enregistered because: struct size does not match reg size

Local V01 should not be enregistered because: struct size does not match reg size

Local V06 should not be enregistered because: struct size does not match reg size
Tracked variable (6 out of 12) table:
V05 tmp1          [   ref]: refCnt =    2, refCntWtd =   4   
V08 tmp4          [   ref]: refCnt =    2, refCntWtd =   4   
V07 tmp3          [   int]: refCnt =    2, refCntWtd =   4   
V09 tmp5          [   int]: refCnt =    2, refCntWtd =   4   
V11 cse1          [   ref]: refCnt =    3, refCntWtd =   3   
V10 cse0          [  long]: refCnt =    1, refCntWtd =   1   

*************** In fgPerBlockLocalVarLiveness()
BB01 USE(0)={                       } + ByrefExposed + GcHeap
     DEF(6)={V05 V08 V07 V09 V11 V10} + ByrefExposed* + GcHeap*

** Memory liveness computed, GcHeap states and ByrefExposed states diverge
*************** In fgInterBlockLocalVarLiveness()

BB liveness after fgLiveVarAnalysis():

BB01 IN (0)={} + ByrefExposed + GcHeap
     OUT(0)={}

Removing dead local store:
N005 ( 17, 18) [000098] DA-XG------                         ▌  STORE_LCL_VAR long   V10 cse0         d:1 (last use)

*************** In fgUpdateFlowGraph()
Before updating the flow graph:

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj LIR 
-----------------------------------------------------------------------------------------------------------------------------------------

*************** In fgDebugCheckBBlist

*************** In fgRemoveDeadBlocks()
Removing unreachable blocks for fgRemoveDeadBlocks iteration #1
*************** In fgDebugCheckBBlist

*** lvaComputeRefCounts ***

*** lvaComputeRefCounts -- explicit counts ***
New refCnts for V05: refCnt =  1, refCntWtd = 2
New refCnts for V05: refCnt =  2, refCntWtd = 4
New refCnts for V11: refCnt =  1, refCntWtd = 1
New refCnts for V11: refCnt =  2, refCntWtd = 2
New refCnts for V00: refCnt =  1, refCntWtd = 1
New refCnts for V11: refCnt =  3, refCntWtd = 3
New refCnts for V07: refCnt =  1, refCntWtd = 2
New refCnts for V08: refCnt =  1, refCntWtd = 2
New refCnts for V00: refCnt =  2, refCntWtd = 2
New refCnts for V09: refCnt =  1, refCntWtd = 2
New refCnts for V07: refCnt =  2, refCntWtd = 4
New refCnts for V08: refCnt =  2, refCntWtd = 4
New refCnts for V09: refCnt =  2, refCntWtd = 4
New refCnts for V01: refCnt =  1, refCntWtd = 1
New refCnts for V00: refCnt =  3, refCntWtd = 3

*** lvaComputeRefCounts -- implicit counts ***

*************** Finishing PHASE Lowering nodeinfo
Trees after Lowering nodeinfo

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj LIR 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..04C) (return), preds={} succs={}
               [000108] -----------                            IL_OFFSET void   INLRT @ 0x000[E-]
N001 (  3, 10) [000000] H----------                    t0 =    CNS_INT(h) long   0x7ff93744e858 class $100
                                                            ┌──▌  t0     long   
               [000113] -----------                  t113 = ▌  PUTARG_REG long   REG rcx
                                                            ┌──▌  t113   long   arg0 in rcx
N002 ( 17, 16) [000001] --C--------                    t1 = ▌  CALL help ref    CORINFO_HELP_NEWSFAST $180
                                                            ┌──▌  t1     ref    
N004 ( 17, 16) [000003] DA---------                         ▌  STORE_LCL_VAR ref    V05 tmp1         d:2
               [000109] -----------                            IL_OFFSET void   INLRT @ 0x005[--]
N001 (  2, 10) [000011] -----------                   t11 =    CNS_INT   long   0x7ff9372b1818 $1c0
                                                            ┌──▌  t11    long   
               [000114] -----------                  t114 = ▌  PUTARG_REG long   REG rcx
N002 (  1,  1) [000012] -----------                   t12 =    CNS_INT   int    5 $43
                                                            ┌──▌  t12    int    
               [000115] -----------                  t115 = ▌  PUTARG_REG int    REG rdx
                                                            ┌──▌  t114   long   arg0 in rcx
                                                            ├──▌  t115   int    arg1 in rdx
N003 ( 17, 18) [000013] H-CXG------                   t13 = ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE $241
N001 (  1,  1) [000006] -----------                    t6 =    LCL_VAR   ref    V05 tmp1         u:2 (last use) $180
N002 (  3, 10) [000007] I----------                    t7 =    CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt] $101
                                                            ┌──▌  t7     long   
                                                            ├──▌  t6     ref    
               [000110] -A--G------                         ▌  STOREIND  ref   
               [000111] -----------                            IL_OFFSET void   INLRT @ 0x00A[E-]
N002 (  3, 10) [000014] I----------                   t14 =    CNS_INT(h) long   0x1a844001eb8 static box ptr $103
                                                            ┌──▌  t14    long   
N003 (  5, 12) [000015] #----------                   t15 = ▌  IND       ref    $2c0
                                                            ┌──▌  t15    ref    
N005 (  5, 12) [000104] DA---------                         ▌  STORE_LCL_VAR ref    V11 cse1         d:1
N006 (  1,  1) [000105] -----------                  t105 =    LCL_VAR   ref    V11 cse1         u:1 $2c0
                                                            ┌──▌  t105   ref    
N009 (  8, 15) [000017] -c---------                   t17 = ▌  LEA(b+8)  byref 
                                                            ┌──▌  t17    byref  
N011 ( 15, 20) [000023] nc--G------                   t23 = ▌  IND       struct
               [000116] Dc---------                  t116 =    LCL_FLD_ADDR byref  V00 loc0         [+0]
                                                            ┌──▌  t116   byref  
                                                            ├──▌  t23    struct 
N013 ( 25, 27) [000025] sA---------                         ▌  STORE_BLK struct<S0, 24> (copy) (Unroll)
N002 (  1,  1) [000107] -----------                  t107 =    LCL_VAR   ref    V11 cse1         u:1 (last use) $2c0
                                                            ┌──▌  t107   ref    
N004 (  2,  2) [000033] -c---------                   t33 = ▌  LEA(b+12) byref 
                                                            ┌──▌  t33    byref  
N005 (  4,  4) [000087] n---G------                   t87 = ▌  IND       int    <l:$400, c:$82>
                                                            ┌──▌  t87    int    
N008 (  5,  5) [000089] DA--G------                         ▌  STORE_LCL_VAR int    V07 tmp3         d:2
N009 (  3, 10) [000044] H----------                   t44 =    CNS_INT(h) long   0x7ff93744e2d8 class $107
                                                            ┌──▌  t44    long   
               [000117] -----------                  t117 = ▌  PUTARG_REG long   REG rcx
N010 (  1,  1) [000043] -----------                   t43 =    CNS_INT   long   1 $1c7
                                                            ┌──▌  t43    long   
               [000118] -----------                  t118 = ▌  PUTARG_REG long   REG rdx
                                                            ┌──▌  t117   long   arg0 in rcx
                                                            ├──▌  t118   long   arg1 in rdx
N011 ( 18, 18) [000045] --CXG------                   t45 = ▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC $184
                                                            ┌──▌  t45    ref    
N013 ( 18, 18) [000092] DA-XG------                         ▌  STORE_LCL_VAR ref    V08 tmp4         d:2
N014 (  3,  3) [000058] -----------                   t58 =    LCL_VAR_ADDR long   V00 loc0          $341
                                                            ┌──▌  t58    long   
               [000119] -----------                  t119 = ▌  PUTARG_REG long   REG rcx
N015 (  1,  1) [000072] -----------                   t72 =    CNS_INT   int    0 $44
                                                            ┌──▌  t72    int    
               [000120] -----------                  t120 = ▌  PUTARG_REG int    REG rdx
N001 (  3, 10) [000121] Hc---------                  t121 =    CNS_INT(h) long   0x7ff93727bac8 ftn
                                                            ┌──▌  t121   long   
N002 (  5, 12) [000122] -c---------                  t122 = ▌  IND       long   REG NA
                                                            ┌──▌  t119   long   arg0 in rcx
                                                            ├──▌  t120   int    arg1 in rdx
                                                            ├──▌  t122   long   control expr
N016 ( 18, 11) [000056] --CXG------                   t56 = ▌  CALL      long   Program:M23(S0,ushort):ulong $440
                                                            ┌──▌  t56    long   
N017 ( 19, 13) [000063] ---XG------                   t63 = ▌  CAST      int <- byte <- long $403
                                                            ┌──▌  t63    int    
N019 ( 19, 13) [000095] DA-XG------                         ▌  STORE_LCL_VAR int    V09 tmp5         d:2
N020 (  1,  1) [000075] -c---------                   t75 =    CNS_INT   int    1 $46
                                                            ┌──▌  t75    int    
               [000123] -----------                         ▌  PUTARG_STK [+0x28] void  
N021 (  1,  1) [000090] -----------                   t90 =    LCL_VAR   int    V07 tmp3         u:2 (last use) <l:$400, c:$82>
                                                            ┌──▌  t90    int    
               [000124] -----------                  t124 = ▌  PUTARG_REG int    REG r8
N022 (  1,  1) [000093] -----------                   t93 =    LCL_VAR   ref    V08 tmp4         u:2 (last use) $2c1
                                                            ┌──▌  t93    ref    
               [000125] -----------                  t125 = ▌  PUTARG_REG ref    REG r9
N023 (  1,  1) [000096] -----------                   t96 =    LCL_VAR   int    V09 tmp5         u:2 (last use) $403
                                                            ┌──▌  t96    int    
               [000126] -----------                         ▌  PUTARG_STK [+0x20] void  
N024 (  3,  3) [000048] -----------                   t48 =    LCL_VAR_ADDR long   V01 loc1          $342
                                                            ┌──▌  t48    long   
               [000127] -----------                  t127 = ▌  PUTARG_REG long   REG rcx
N025 (  4,  5) [000051] -----------                   t51 =    LCL_FLD   ubyte (AX) V00 loc0         [+0] <l:$480, c:$4c0>
                                                            ┌──▌  t51    ubyte  
               [000128] -----------                  t128 = ▌  PUTARG_REG int    REG rdx
N001 (  3, 10) [000129] Hc---------                  t129 =    CNS_INT(h) long   0x7ff93727bae0 ftn
                                                            ┌──▌  t129   long   
N002 (  5, 12) [000130] -c---------                  t130 = ▌  IND       long   REG NA
                                                            ┌──▌  t124   int    arg2 in r8
                                                            ├──▌  t125   ref    arg3 in r9
                                                            ├──▌  t127   long   arg0 in rcx
                                                            ├──▌  t128   int    arg1 in rdx
                                                            ├──▌  t130   long   control expr
N026 ( 79, 58) [000065] --CXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort) $VN.Void
               [000112] -----------                            IL_OFFSET void   INLRT @ 0x04B[E-]
N001 (  0,  0) [000068] -----------                            RETURN    void   $VN.Void

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
*************** In fgDebugCheckLoopTable: loop table not valid

*************** Starting PHASE Calculate stack level slots

*************** Finishing PHASE Calculate stack level slots [no changes]

*************** Starting PHASE Linear scan register alloc
Clearing modified regs.

buildIntervals ========

-----------------
LIVENESS:
-----------------
BB01
use: {}
def: {V05 V07 V08 V09 V10 V11}
 in: {}
out: {}
Interval  0: ref RefPositions {} physReg:NA Preferences=[allInt]
  Interval  0: (V05) ref RefPositions {} physReg:NA Preferences=[allInt]
Interval  1: int RefPositions {} physReg:NA Preferences=[allInt]
  Interval  1: (V07) int RefPositions {} physReg:NA Preferences=[allInt]
Interval  2: ref RefPositions {} physReg:NA Preferences=[allInt]
  Interval  2: (V08) ref RefPositions {} physReg:NA Preferences=[allInt]
Interval  3: int RefPositions {} physReg:NA Preferences=[allInt]
  Interval  3: (V09) int RefPositions {} physReg:NA Preferences=[allInt]
Interval  4: ref RefPositions {} physReg:NA Preferences=[allInt]
  Interval  4: (V11) ref RefPositions {} physReg:NA Preferences=[allInt]

FP callee save candidate vars: None

floatVarCount = 0; hasLoops = false, singleExit = true
TUPLE STYLE DUMP BEFORE LSRA
Start LSRA Block Sequence: 
Current block: BB01
Final LSRA Block Sequence:
BB01 (  1   )

BB01 [000..04C) (return), preds={} succs={}
=====
  N000.                    IL_OFFSET INLRT @ 0x000[E-]
  N001. t0              =  CNS_INT(h) 0x7ff93744e858 class
  N000. t113            =  PUTARG_REG; t0
  N002. t1              =  CALL help; t113
  N004.                    V05(t3); t1
  N000.                    IL_OFFSET INLRT @ 0x005[--]
  N001. t11             =  CNS_INT   0x7ff9372b1818
  N000. t114            =  PUTARG_REG; t11
  N002. t12             =  CNS_INT   5
  N000. t115            =  PUTARG_REG; t12
  N003.                    CALL help; t114,t115
  N001.                    V05(t6*)
  N002. t7              =  CNS_INT(h) 0x1a844001ec8 static Fseq[s_rt]
  N000.                    STOREIND ; t7,t6*
  N000.                    IL_OFFSET INLRT @ 0x00A[E-]
  N002. t14             =  CNS_INT(h) 0x1a844001eb8 static box ptr
  N003. t15             =  IND      ; t14
  N005.                    V11(t104); t15
  N006.                    V11(t105)
  N009. t17             =  LEA(b+8) ; t105
  N011. t23             =  IND      ; t17
  N000.                    LCL_FLD_ADDR V00 loc0         [+0]
  N013.                    STORE_BLK; t23
  N002.                    V11(t107*)
  N004. t33             =  LEA(b+12); t107*
  N005. t87             =  IND      ; t33
  N008.                    V07(t89); t87
  N009. t44             =  CNS_INT(h) 0x7ff93744e2d8 class
  N000. t117            =  PUTARG_REG; t44
  N010. t43             =  CNS_INT   1
  N000. t118            =  PUTARG_REG; t43
  N011. t45             =  CALL help; t117,t118
  N013.                    V08(t92); t45
  N014. t58             =  LCL_VAR_ADDR V00 loc0         
  N000. t119            =  PUTARG_REG; t58
  N015. t72             =  CNS_INT   0
  N000. t120            =  PUTARG_REG; t72
  N001.                    CNS_INT(h) 0x7ff93727bac8 ftn
  N002.                    IND      
  N016. t56             =  CALL     ; t119,t120
  N017. t63             =  CAST     ; t56
  N019.                    V09(t95); t63
  N020.                    CNS_INT   1
  N000.                    PUTARG_STK [+0x28]
  N021.                    V07(t90*)
  N000. t124            =  PUTARG_REG; t90*
  N022.                    V08(t93*)
  N000. t125            =  PUTARG_REG; t93*
  N023.                    V09(t96*)
  N000.                    PUTARG_STK [+0x20]; t96*
  N024. t48             =  LCL_VAR_ADDR V01 loc1         
  N000. t127            =  PUTARG_REG; t48
  N025. t51             =  V00 MEM
  N000. t128            =  PUTARG_REG; t51
  N001.                    CNS_INT(h) 0x7ff93727bae0 ftn
  N002.                    IND      
  N026.                    CALL     ; t124,t125,t127,t128
  N000.                    IL_OFFSET INLRT @ 0x04B[E-]
  N001.                    RETURN   




buildIntervals second part ========

NEW BLOCK BB01
<RefPosition #0   @1   RefTypeBB BB01 regmask=[] minReg=1 wt=100.00>

DefList: {  }
N003 (???,???) [000108] -----------                         ▌  IL_OFFSET void   INLRT @ 0x000[E-] REG NA

DefList: {  }
N005 (  3, 10) [000000] H----------                         ▌  CNS_INT(h) long   0x7ff93744e858 class REG NA $100
Interval  5: long RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #1   @6   RefTypeDef <Ivl:5> CNS_INT BB01 regmask=[allInt] minReg=1 wt=400.00>

DefList: { N005.t0. CNS_INT }
N007 (???,???) [000113] -----------                         ▌  PUTARG_REG long   REG rcx
<RefPosition #2   @7   RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #3   @7   RefTypeUse <Ivl:5> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
Interval  6: long RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #4   @8   RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #5   @8   RefTypeDef <Ivl:6> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed wt=400.00>

DefList: { N007.t113. PUTARG_REG }
N009 ( 17, 16) [000001] --C--------                         ▌  CALL help ref    CORINFO_HELP_NEWSFAST REG NA $180
<RefPosition #6   @9   RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #7   @9   RefTypeUse <Ivl:6> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #8   @10  RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 wt=100.00>
<RefPosition #9   @10  RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #10  @10  RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #11  @10  RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 wt=100.00>
<RefPosition #12  @10  RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 wt=100.00>
<RefPosition #13  @10  RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 wt=100.00>
<RefPosition #14  @10  RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 wt=100.00>
Interval  7: ref RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #15  @10  RefTypeFixedReg <Reg:rax> BB01 regmask=[rax] minReg=1 wt=100.00>
<RefPosition #16  @10  RefTypeDef <Ivl:7> CALL BB01 regmask=[rax] minReg=1 fixed wt=400.00>

DefList: { N009.t1. CALL }
N011 ( 17, 16) [000003] DA---------                         ▌  STORE_LCL_VAR ref    V05 tmp1         d:2 NA REG NA
<RefPosition #17  @11  RefTypeUse <Ivl:7> BB01 regmask=[allInt] minReg=1 last wt=100.00>
Assigning related <V05/L0> to <I7>
<RefPosition #18  @12  RefTypeDef <Ivl:0 V05> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=400.00>

DefList: {  }
N013 (???,???) [000109] -----------                         ▌  IL_OFFSET void   INLRT @ 0x005[--] REG NA

DefList: {  }
N015 (  2, 10) [000011] -----------                         ▌  CNS_INT   long   0x7ff9372b1818 REG NA $1c0
Interval  8: long RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #19  @16  RefTypeDef <Ivl:8> CNS_INT BB01 regmask=[allInt] minReg=1 wt=400.00>

DefList: { N015.t11. CNS_INT }
N017 (???,???) [000114] -----------                         ▌  PUTARG_REG long   REG rcx
<RefPosition #20  @17  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #21  @17  RefTypeUse <Ivl:8> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
Interval  9: long RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #22  @18  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #23  @18  RefTypeDef <Ivl:9> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed wt=400.00>

DefList: { N017.t114. PUTARG_REG }
N019 (  1,  1) [000012] -----------                         ▌  CNS_INT   int    5 REG NA $43
Interval 10: int RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #24  @20  RefTypeDef <Ivl:10> CNS_INT BB01 regmask=[allInt] minReg=1 wt=400.00>

DefList: { N017.t114. PUTARG_REG; N019.t12. CNS_INT }
N021 (???,???) [000115] -----------                         ▌  PUTARG_REG int    REG rdx
<RefPosition #25  @21  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #26  @21  RefTypeUse <Ivl:10> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
Interval 11: int RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #27  @22  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #28  @22  RefTypeDef <Ivl:11> PUTARG_REG BB01 regmask=[rdx] minReg=1 fixed wt=400.00>

DefList: { N017.t114. PUTARG_REG; N021.t115. PUTARG_REG }
N023 ( 17, 18) [000013] H-CXG------                         ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE REG NA $241
<RefPosition #29  @23  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #30  @23  RefTypeUse <Ivl:9> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #31  @23  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #32  @23  RefTypeUse <Ivl:11> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #33  @24  RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 wt=100.00>
<RefPosition #34  @24  RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #35  @24  RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #36  @24  RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 wt=100.00>
<RefPosition #37  @24  RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 wt=100.00>
<RefPosition #38  @24  RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 wt=100.00>
<RefPosition #39  @24  RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 wt=100.00>
Interval 12: long RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #40  @24  RefTypeFixedReg <Reg:rax> BB01 regmask=[rax] minReg=1 wt=100.00>
<RefPosition #41  @24  RefTypeDef <Ivl:12> CALL BB01 regmask=[rax] minReg=1 fixed wt=400.00>

DefList: {  }
N025 (  1,  1) [000006] -----------                         ▌  LCL_VAR   ref    V05 tmp1         u:2 NA (last use) REG NA $180

DefList: {  }
N027 (  3, 10) [000007] I----------                         ▌  CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt] REG NA $101
Interval 13: long RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #42  @28  RefTypeDef <Ivl:13> CNS_INT BB01 regmask=[allInt] minReg=1 wt=400.00>

DefList: { N027.t7. CNS_INT }
N029 (???,???) [000110] -A--G------                         ▌  STOREIND  ref    REG NA
<RefPosition #43  @29  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #44  @29  RefTypeUse <Ivl:13> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #45  @29  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #46  @29  RefTypeUse <Ivl:0 V05> LCL_VAR BB01 regmask=[rdx] minReg=1 last fixed wt=400.00>
<RefPosition #47  @30  RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 wt=100.00>
<RefPosition #48  @30  RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #49  @30  RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #50  @30  RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 wt=100.00>
<RefPosition #51  @30  RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 wt=100.00>
<RefPosition #52  @30  RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 wt=100.00>
<RefPosition #53  @30  RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 wt=100.00>
<RefPosition #54  @30  RefTypeKill <Reg:mm0> BB01 regmask=[mm0] minReg=1 wt=100.00>
<RefPosition #55  @30  RefTypeKill <Reg:mm1> BB01 regmask=[mm1] minReg=1 wt=100.00>
<RefPosition #56  @30  RefTypeKill <Reg:mm2> BB01 regmask=[mm2] minReg=1 wt=100.00>
<RefPosition #57  @30  RefTypeKill <Reg:mm3> BB01 regmask=[mm3] minReg=1 wt=100.00>
<RefPosition #58  @30  RefTypeKill <Reg:mm4> BB01 regmask=[mm4] minReg=1 wt=100.00>
<RefPosition #59  @30  RefTypeKill <Reg:mm5> BB01 regmask=[mm5] minReg=1 wt=100.00>

DefList: {  }
N031 (???,???) [000111] -----------                         ▌  IL_OFFSET void   INLRT @ 0x00A[E-] REG NA

DefList: {  }
N033 (  3, 10) [000014] I----------                         ▌  CNS_INT(h) long   0x1a844001eb8 static box ptr REG NA $103
Interval 14: long RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #60  @34  RefTypeDef <Ivl:14> CNS_INT BB01 regmask=[allInt] minReg=1 wt=400.00>

DefList: { N033.t14. CNS_INT }
N035 (  5, 12) [000015] #----------                         ▌  IND       ref    REG NA $2c0
<RefPosition #61  @35  RefTypeUse <Ivl:14> BB01 regmask=[allInt] minReg=1 last wt=100.00>
Interval 15: ref RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #62  @36  RefTypeDef <Ivl:15> IND BB01 regmask=[allInt] minReg=1 wt=400.00>

DefList: { N035.t15. IND }
N037 (  5, 12) [000104] DA---------                         ▌  STORE_LCL_VAR ref    V11 cse1         d:1 NA REG NA
<RefPosition #63  @37  RefTypeUse <Ivl:15> BB01 regmask=[allInt] minReg=1 last wt=100.00>
Assigning related <V11/L4> to <I15>
<RefPosition #64  @38  RefTypeDef <Ivl:4 V11> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=300.00>

DefList: {  }
N039 (  1,  1) [000105] -----------                         ▌  LCL_VAR   ref    V11 cse1         u:1 NA REG NA $2c0

DefList: {  }
N041 (  8, 15) [000017] -c---------                         ▌  LEA(b+8)  byref  REG NA
Contained
DefList: {  }
N043 ( 15, 20) [000023] nc--G------                         ▌  IND       struct REG NA
Contained
DefList: {  }
N045 (???,???) [000116] Dc---------                         ▌  LCL_FLD_ADDR byref  V00 loc0         [+0] NA REG NA
Contained
DefList: {  }
N047 ( 25, 27) [000025] sA---------                         ▌  STORE_BLK struct<S0, 24> (copy) (Unroll) REG NA
Interval 16: int RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #65  @47  RefTypeDef <Ivl:16 internal> STORE_BLK BB01 regmask=[allInt] minReg=1 wt=400.00>
Interval 17: float RefPositions {} physReg:NA Preferences=[allFloat]
<RefPosition #66  @47  RefTypeDef <Ivl:17 internal> STORE_BLK BB01 regmask=[mm0-mm5] minReg=1 wt=400.00>
<RefPosition #67  @47  RefTypeUse <Ivl:4 V11> LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=300.00>
<RefPosition #68  @47  RefTypeUse <Ivl:16 internal> STORE_BLK BB01 regmask=[allInt] minReg=1 last wt=400.00>
<RefPosition #69  @47  RefTypeUse <Ivl:17 internal> STORE_BLK BB01 regmask=[mm0-mm5] minReg=1 last wt=400.00>

DefList: {  }
N049 (  1,  1) [000107] -----------                         ▌  LCL_VAR   ref    V11 cse1         u:1 NA (last use) REG NA $2c0

DefList: {  }
N051 (  2,  2) [000033] -c---------                         ▌  LEA(b+12) byref  REG NA
Contained
DefList: {  }
N053 (  4,  4) [000087] n---G------                         ▌  IND       int    REG NA <l:$400, c:$82>
<RefPosition #70  @53  RefTypeUse <Ivl:4 V11> LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=300.00>
Interval 18: int RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #71  @54  RefTypeDef <Ivl:18> IND BB01 regmask=[allInt] minReg=1 wt=400.00>

DefList: { N053.t87. IND }
N055 (  5,  5) [000089] DA--G------                         ▌  STORE_LCL_VAR int    V07 tmp3         d:2 NA REG NA
<RefPosition #72  @55  RefTypeUse <Ivl:18> BB01 regmask=[allInt] minReg=1 last wt=100.00>
Assigning related <V07/L1> to <I18>
<RefPosition #73  @56  RefTypeDef <Ivl:1 V07> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=400.00>

DefList: {  }
N057 (  3, 10) [000044] H----------                         ▌  CNS_INT(h) long   0x7ff93744e2d8 class REG NA $107
Interval 19: long RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #74  @58  RefTypeDef <Ivl:19> CNS_INT BB01 regmask=[allInt] minReg=1 wt=400.00>

DefList: { N057.t44. CNS_INT }
N059 (???,???) [000117] -----------                         ▌  PUTARG_REG long   REG rcx
<RefPosition #75  @59  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #76  @59  RefTypeUse <Ivl:19> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
Interval 20: long RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #77  @60  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #78  @60  RefTypeDef <Ivl:20> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed wt=400.00>

DefList: { N059.t117. PUTARG_REG }
N061 (  1,  1) [000043] -----------                         ▌  CNS_INT   long   1 REG NA $1c7
Interval 21: long RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #79  @62  RefTypeDef <Ivl:21> CNS_INT BB01 regmask=[allInt] minReg=1 wt=400.00>

DefList: { N059.t117. PUTARG_REG; N061.t43. CNS_INT }
N063 (???,???) [000118] -----------                         ▌  PUTARG_REG long   REG rdx
<RefPosition #80  @63  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #81  @63  RefTypeUse <Ivl:21> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
Interval 22: long RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #82  @64  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #83  @64  RefTypeDef <Ivl:22> PUTARG_REG BB01 regmask=[rdx] minReg=1 fixed wt=400.00>

DefList: { N059.t117. PUTARG_REG; N063.t118. PUTARG_REG }
N065 ( 18, 18) [000045] --CXG------                         ▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC REG NA $184
<RefPosition #84  @65  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #85  @65  RefTypeUse <Ivl:20> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #86  @65  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #87  @65  RefTypeUse <Ivl:22> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #88  @66  RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 wt=100.00>
<RefPosition #89  @66  RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #90  @66  RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #91  @66  RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 wt=100.00>
<RefPosition #92  @66  RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 wt=100.00>
<RefPosition #93  @66  RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 wt=100.00>
<RefPosition #94  @66  RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 wt=100.00>
Interval 23: ref RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #95  @66  RefTypeFixedReg <Reg:rax> BB01 regmask=[rax] minReg=1 wt=100.00>
<RefPosition #96  @66  RefTypeDef <Ivl:23> CALL BB01 regmask=[rax] minReg=1 fixed wt=400.00>

DefList: { N065.t45. CALL }
N067 ( 18, 18) [000092] DA-XG------                         ▌  STORE_LCL_VAR ref    V08 tmp4         d:2 NA REG NA
<RefPosition #97  @67  RefTypeUse <Ivl:23> BB01 regmask=[allInt] minReg=1 last wt=100.00>
Assigning related <V08/L2> to <I23>
<RefPosition #98  @68  RefTypeDef <Ivl:2 V08> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=400.00>

DefList: {  }
N069 (  3,  3) [000058] -----------                         ▌  LCL_VAR_ADDR long   V00 loc0          NA REG NA $341
Interval 24: long RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #99  @70  RefTypeDef <Ivl:24> LCL_VAR_ADDR BB01 regmask=[allInt] minReg=1 wt=400.00>

DefList: { N069.t58. LCL_VAR_ADDR }
N071 (???,???) [000119] -----------                         ▌  PUTARG_REG long   REG rcx
<RefPosition #100 @71  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #101 @71  RefTypeUse <Ivl:24> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
Interval 25: long RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #102 @72  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #103 @72  RefTypeDef <Ivl:25> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed wt=400.00>

DefList: { N071.t119. PUTARG_REG }
N073 (  1,  1) [000072] -----------                         ▌  CNS_INT   int    0 REG NA $44
Interval 26: int RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #104 @74  RefTypeDef <Ivl:26> CNS_INT BB01 regmask=[allInt] minReg=1 wt=400.00>

DefList: { N071.t119. PUTARG_REG; N073.t72. CNS_INT }
N075 (???,???) [000120] -----------                         ▌  PUTARG_REG int    REG rdx
<RefPosition #105 @75  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #106 @75  RefTypeUse <Ivl:26> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
Interval 27: int RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #107 @76  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #108 @76  RefTypeDef <Ivl:27> PUTARG_REG BB01 regmask=[rdx] minReg=1 fixed wt=400.00>

DefList: { N071.t119. PUTARG_REG; N075.t120. PUTARG_REG }
N077 (  3, 10) [000121] Hc---------                         ▌  CNS_INT(h) long   0x7ff93727bac8 ftn REG NA
Contained
DefList: { N071.t119. PUTARG_REG; N075.t120. PUTARG_REG }
N079 (  5, 12) [000122] -c---------                         ▌  IND       long   REG NA
Contained
DefList: { N071.t119. PUTARG_REG; N075.t120. PUTARG_REG }
N081 ( 18, 11) [000056] --CXG------                         ▌  CALL      long   Program:M23(S0,ushort):ulong REG NA $440
<RefPosition #109 @81  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #110 @81  RefTypeUse <Ivl:25> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #111 @81  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #112 @81  RefTypeUse <Ivl:27> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #113 @82  RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 wt=100.00>
<RefPosition #114 @82  RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #115 @82  RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #116 @82  RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 wt=100.00>
<RefPosition #117 @82  RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 wt=100.00>
<RefPosition #118 @82  RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 wt=100.00>
<RefPosition #119 @82  RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 wt=100.00>
Interval 28: long RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #120 @82  RefTypeFixedReg <Reg:rax> BB01 regmask=[rax] minReg=1 wt=100.00>
<RefPosition #121 @82  RefTypeDef <Ivl:28> CALL BB01 regmask=[rax] minReg=1 fixed wt=400.00>

DefList: { N081.t56. CALL }
N083 ( 19, 13) [000063] ---XG------                         ▌  CAST      int <- byte <- long REG NA $403
<RefPosition #122 @83  RefTypeUse <Ivl:28> BB01 regmask=[allInt] minReg=1 last wt=100.00>
Interval 29: int RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #123 @84  RefTypeDef <Ivl:29> CAST BB01 regmask=[allInt] minReg=1 wt=400.00>
Assigning related <I29> to <I28>

DefList: { N083.t63. CAST }
N085 ( 19, 13) [000095] DA-XG------                         ▌  STORE_LCL_VAR int    V09 tmp5         d:2 NA REG NA
<RefPosition #124 @85  RefTypeUse <Ivl:29> BB01 regmask=[allInt] minReg=1 last wt=100.00>
Assigning related <V09/L3> to <I29>
<RefPosition #125 @86  RefTypeDef <Ivl:3 V09> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=400.00>

DefList: {  }
N087 (  1,  1) [000075] -c---------                         ▌  CNS_INT   int    1 REG NA $46
Contained
DefList: {  }
N089 (???,???) [000123] -----------                         ▌  PUTARG_STK [+0x28] void   REG NA

DefList: {  }
N091 (  1,  1) [000090] -----------                         ▌  LCL_VAR   int    V07 tmp3         u:2 NA (last use) REG NA <l:$400, c:$82>

DefList: {  }
N093 (???,???) [000124] -----------                         ▌  PUTARG_REG int    REG r8
<RefPosition #126 @93  RefTypeFixedReg <Reg:r8 > BB01 regmask=[r8] minReg=1 wt=100.00>
<RefPosition #127 @93  RefTypeUse <Ivl:1 V07> LCL_VAR BB01 regmask=[r8] minReg=1 last fixed wt=400.00>
Interval 30: int RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #128 @94  RefTypeFixedReg <Reg:r8 > BB01 regmask=[r8] minReg=1 wt=100.00>
<RefPosition #129 @94  RefTypeDef <Ivl:30> PUTARG_REG BB01 regmask=[r8] minReg=1 fixed wt=400.00>

DefList: { N093.t124. PUTARG_REG }
N095 (  1,  1) [000093] -----------                         ▌  LCL_VAR   ref    V08 tmp4         u:2 NA (last use) REG NA $2c1

DefList: { N093.t124. PUTARG_REG }
N097 (???,???) [000125] -----------                         ▌  PUTARG_REG ref    REG r9
Last use of V08 between PUTARG and CALL. Removing occupied arg regs from preferences: [r8]
<RefPosition #130 @97  RefTypeFixedReg <Reg:r9 > BB01 regmask=[r9] minReg=1 wt=100.00>
<RefPosition #131 @97  RefTypeUse <Ivl:2 V08> LCL_VAR BB01 regmask=[r9] minReg=1 last fixed wt=400.00>
Interval 31: ref RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #132 @98  RefTypeFixedReg <Reg:r9 > BB01 regmask=[r9] minReg=1 wt=100.00>
<RefPosition #133 @98  RefTypeDef <Ivl:31> PUTARG_REG BB01 regmask=[r9] minReg=1 fixed wt=400.00>

DefList: { N093.t124. PUTARG_REG; N097.t125. PUTARG_REG }
N099 (  1,  1) [000096] -----------                         ▌  LCL_VAR   int    V09 tmp5         u:2 NA (last use) REG NA $403

DefList: { N093.t124. PUTARG_REG; N097.t125. PUTARG_REG }
N101 (???,???) [000126] -----------                         ▌  PUTARG_STK [+0x20] void   REG NA
Last use of V09 between PUTARG and CALL. Removing occupied arg regs from preferences: [r8-r9]
<RefPosition #134 @101 RefTypeUse <Ivl:3 V09> LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=400.00>

DefList: { N093.t124. PUTARG_REG; N097.t125. PUTARG_REG }
N103 (  3,  3) [000048] -----------                         ▌  LCL_VAR_ADDR long   V01 loc1          NA REG NA $342
Interval 32: long RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #135 @104 RefTypeDef <Ivl:32> LCL_VAR_ADDR BB01 regmask=[allInt] minReg=1 wt=400.00>

DefList: { N093.t124. PUTARG_REG; N097.t125. PUTARG_REG; N103.t48. LCL_VAR_ADDR }
N105 (???,???) [000127] -----------                         ▌  PUTARG_REG long   REG rcx
<RefPosition #136 @105 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #137 @105 RefTypeUse <Ivl:32> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
Interval 33: long RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #138 @106 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #139 @106 RefTypeDef <Ivl:33> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed wt=400.00>

DefList: { N093.t124. PUTARG_REG; N097.t125. PUTARG_REG; N105.t127. PUTARG_REG }
N107 (  4,  5) [000051] -----------                         ▌  LCL_FLD   ubyte (AX) V00 loc0         [+0] NA REG NA <l:$480, c:$4c0>
Interval 34: ubyte RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #140 @108 RefTypeDef <Ivl:34> LCL_FLD BB01 regmask=[allInt] minReg=1 wt=400.00>

DefList: { N093.t124. PUTARG_REG; N097.t125. PUTARG_REG; N105.t127. PUTARG_REG; N107.t51. LCL_FLD }
N109 (???,???) [000128] -----------                         ▌  PUTARG_REG int    REG rdx
<RefPosition #141 @109 RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #142 @109 RefTypeUse <Ivl:34> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
Interval 35: int RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #143 @110 RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #144 @110 RefTypeDef <Ivl:35> PUTARG_REG BB01 regmask=[rdx] minReg=1 fixed wt=400.00>

DefList: { N093.t124. PUTARG_REG; N097.t125. PUTARG_REG; N105.t127. PUTARG_REG; N109.t128. PUTARG_REG }
N111 (  3, 10) [000129] Hc---------                         ▌  CNS_INT(h) long   0x7ff93727bae0 ftn REG NA
Contained
DefList: { N093.t124. PUTARG_REG; N097.t125. PUTARG_REG; N105.t127. PUTARG_REG; N109.t128. PUTARG_REG }
N113 (  5, 12) [000130] -c---------                         ▌  IND       long   REG NA
Contained
DefList: { N093.t124. PUTARG_REG; N097.t125. PUTARG_REG; N105.t127. PUTARG_REG; N109.t128. PUTARG_REG }
N115 ( 79, 58) [000065] --CXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort) REG NA $VN.Void
<RefPosition #145 @115 RefTypeFixedReg <Reg:r8 > BB01 regmask=[r8] minReg=1 wt=100.00>
<RefPosition #146 @115 RefTypeUse <Ivl:30> BB01 regmask=[r8] minReg=1 last fixed wt=100.00>
<RefPosition #147 @115 RefTypeFixedReg <Reg:r9 > BB01 regmask=[r9] minReg=1 wt=100.00>
<RefPosition #148 @115 RefTypeUse <Ivl:31> BB01 regmask=[r9] minReg=1 last fixed wt=100.00>
<RefPosition #149 @115 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #150 @115 RefTypeUse <Ivl:33> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #151 @115 RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #152 @115 RefTypeUse <Ivl:35> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #153 @116 RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 wt=100.00>
<RefPosition #154 @116 RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #155 @116 RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #156 @116 RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 wt=100.00>
<RefPosition #157 @116 RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 wt=100.00>
<RefPosition #158 @116 RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 wt=100.00>
<RefPosition #159 @116 RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 wt=100.00>

DefList: {  }
N117 (???,???) [000112] -----------                         ▌  IL_OFFSET void   INLRT @ 0x04B[E-] REG NA

DefList: {  }
N119 (  0,  0) [000068] -----------                         ▌  RETURN    void   REG NA $VN.Void



CHECKING LAST USES for BB01, liveout={}
==============================
use: {}
def: {V05 V07 V08 V09 V10 V11}

Linear scan intervals BEFORE VALIDATING INTERVALS:
Interval  0: (V05) ref RefPositions {#18@12 #46@29} physReg:NA Preferences=[rbx rbp rsi rdi r12-r15]
Interval  1: (V07) int RefPositions {#73@56 #127@93} physReg:NA Preferences=[rbx rbp rsi rdi r12-r15]
Interval  2: (V08) ref RefPositions {#98@68 #131@97} physReg:NA Preferences=[rbx rbp rsi rdi r12-r15]
Interval  3: (V09) int RefPositions {#125@86 #134@101} physReg:NA Preferences=[rax rcx rdx rbx rbp rsi rdi r10-r15]
Interval  4: (V11) ref RefPositions {#64@38 #67@47 #70@53} physReg:NA Preferences=[allInt]
Interval  5: long (constant) RefPositions {#1@6 #3@7} physReg:NA Preferences=[rcx]
Interval  6: long RefPositions {#5@8 #7@9} physReg:NA Preferences=[rcx]
Interval  7: ref RefPositions {#16@10 #17@11} physReg:NA Preferences=[rax] RelatedInterval <V05/L0>
Interval  8: long (constant) RefPositions {#19@16 #21@17} physReg:NA Preferences=[rcx]
Interval  9: long RefPositions {#23@18 #30@23} physReg:NA Preferences=[rcx]
Interval 10: int (constant) RefPositions {#24@20 #26@21} physReg:NA Preferences=[rdx]
Interval 11: int RefPositions {#28@22 #32@23} physReg:NA Preferences=[rdx]
Interval 12: long RefPositions {#41@24} physReg:NA Preferences=[rax]
Interval 13: long (constant) RefPositions {#42@28 #44@29} physReg:NA Preferences=[rcx]
Interval 14: long (constant) RefPositions {#60@34 #61@35} physReg:NA Preferences=[allInt]
Interval 15: ref RefPositions {#62@36 #63@37} physReg:NA Preferences=[allInt] RelatedInterval <V11/L4>
Interval 16: int (INTERNAL) RefPositions {#65@47 #68@47} physReg:NA Preferences=[allInt]
Interval 17: float (INTERNAL) RefPositions {#66@47 #69@47} physReg:NA Preferences=[mm0-mm5]
Interval 18: int RefPositions {#71@54 #72@55} physReg:NA Preferences=[allInt] RelatedInterval <V07/L1>
Interval 19: long (constant) RefPositions {#74@58 #76@59} physReg:NA Preferences=[rcx]
Interval 20: long RefPositions {#78@60 #85@65} physReg:NA Preferences=[rcx]
Interval 21: long (constant) RefPositions {#79@62 #81@63} physReg:NA Preferences=[rdx]
Interval 22: long RefPositions {#83@64 #87@65} physReg:NA Preferences=[rdx]
Interval 23: ref RefPositions {#96@66 #97@67} physReg:NA Preferences=[rax] RelatedInterval <V08/L2>
Interval 24: long RefPositions {#99@70 #101@71} physReg:NA Preferences=[rcx]
Interval 25: long RefPositions {#103@72 #110@81} physReg:NA Preferences=[rcx]
Interval 26: int (constant) RefPositions {#104@74 #106@75} physReg:NA Preferences=[rdx]
Interval 27: int RefPositions {#108@76 #112@81} physReg:NA Preferences=[rdx]
Interval 28: long RefPositions {#121@82 #122@83} physReg:NA Preferences=[rax] RelatedInterval <I29>
Interval 29: int RefPositions {#123@84 #124@85} physReg:NA Preferences=[allInt] RelatedInterval <V09/L3>
Interval 30: int RefPositions {#129@94 #146@115} physReg:NA Preferences=[r8]
Interval 31: ref RefPositions {#133@98 #148@115} physReg:NA Preferences=[r9]
Interval 32: long RefPositions {#135@104 #137@105} physReg:NA Preferences=[rcx]
Interval 33: long RefPositions {#139@106 #150@115} physReg:NA Preferences=[rcx]
Interval 34: ubyte RefPositions {#140@108 #142@109} physReg:NA Preferences=[rdx]
Interval 35: int RefPositions {#144@110 #152@115} physReg:NA Preferences=[rdx]

------------
REFPOSITIONS BEFORE VALIDATING INTERVALS: 
------------
<RefPosition #0   @1   RefTypeBB BB01 regmask=[] minReg=1 wt=100.00>
<RefPosition #1   @6   RefTypeDef <Ivl:5> CNS_INT BB01 regmask=[rcx] minReg=1 wt=400.00>
<RefPosition #2   @7   RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #3   @7   RefTypeUse <Ivl:5> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #4   @8   RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #5   @8   RefTypeDef <Ivl:6> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed wt=400.00>
<RefPosition #6   @9   RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #7   @9   RefTypeUse <Ivl:6> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #8   @10  RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 last wt=100.00>
<RefPosition #9   @10  RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 last wt=100.00>
<RefPosition #10  @10  RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 last wt=100.00>
<RefPosition #11  @10  RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last wt=100.00>
<RefPosition #12  @10  RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last wt=100.00>
<RefPosition #13  @10  RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 last wt=100.00>
<RefPosition #14  @10  RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 last wt=100.00>
<RefPosition #15  @10  RefTypeFixedReg <Reg:rax> BB01 regmask=[rax] minReg=1 wt=100.00>
<RefPosition #16  @10  RefTypeDef <Ivl:7> CALL BB01 regmask=[rax] minReg=1 fixed wt=400.00>
<RefPosition #17  @11  RefTypeUse <Ivl:7> BB01 regmask=[allInt] minReg=1 last wt=100.00>
<RefPosition #18  @12  RefTypeDef <Ivl:0 V05> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #19  @16  RefTypeDef <Ivl:8> CNS_INT BB01 regmask=[rcx] minReg=1 wt=400.00>
<RefPosition #20  @17  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #21  @17  RefTypeUse <Ivl:8> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #22  @18  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #23  @18  RefTypeDef <Ivl:9> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed wt=400.00>
<RefPosition #24  @20  RefTypeDef <Ivl:10> CNS_INT BB01 regmask=[rdx] minReg=1 wt=400.00>
<RefPosition #25  @21  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #26  @21  RefTypeUse <Ivl:10> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #27  @22  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #28  @22  RefTypeDef <Ivl:11> PUTARG_REG BB01 regmask=[rdx] minReg=1 fixed wt=400.00>
<RefPosition #29  @23  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #30  @23  RefTypeUse <Ivl:9> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #31  @23  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #32  @23  RefTypeUse <Ivl:11> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #33  @24  RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 last wt=100.00>
<RefPosition #34  @24  RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 last wt=100.00>
<RefPosition #35  @24  RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 last wt=100.00>
<RefPosition #36  @24  RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last wt=100.00>
<RefPosition #37  @24  RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last wt=100.00>
<RefPosition #38  @24  RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 last wt=100.00>
<RefPosition #39  @24  RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 last wt=100.00>
<RefPosition #40  @24  RefTypeFixedReg <Reg:rax> BB01 regmask=[rax] minReg=1 wt=100.00>
<RefPosition #41  @24  RefTypeDef <Ivl:12> CALL BB01 regmask=[rax] minReg=1 last fixed local wt=400.00>
<RefPosition #42  @28  RefTypeDef <Ivl:13> CNS_INT BB01 regmask=[rcx] minReg=1 wt=400.00>
<RefPosition #43  @29  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #44  @29  RefTypeUse <Ivl:13> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #45  @29  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #46  @29  RefTypeUse <Ivl:0 V05> LCL_VAR BB01 regmask=[rdx] minReg=1 last fixed wt=400.00>
<RefPosition #47  @30  RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 last wt=100.00>
<RefPosition #48  @30  RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 last wt=100.00>
<RefPosition #49  @30  RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 last wt=100.00>
<RefPosition #50  @30  RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last wt=100.00>
<RefPosition #51  @30  RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last wt=100.00>
<RefPosition #52  @30  RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 last wt=100.00>
<RefPosition #53  @30  RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 last wt=100.00>
<RefPosition #54  @30  RefTypeKill <Reg:mm0> BB01 regmask=[mm0] minReg=1 last wt=100.00>
<RefPosition #55  @30  RefTypeKill <Reg:mm1> BB01 regmask=[mm1] minReg=1 last wt=100.00>
<RefPosition #56  @30  RefTypeKill <Reg:mm2> BB01 regmask=[mm2] minReg=1 last wt=100.00>
<RefPosition #57  @30  RefTypeKill <Reg:mm3> BB01 regmask=[mm3] minReg=1 last wt=100.00>
<RefPosition #58  @30  RefTypeKill <Reg:mm4> BB01 regmask=[mm4] minReg=1 last wt=100.00>
<RefPosition #59  @30  RefTypeKill <Reg:mm5> BB01 regmask=[mm5] minReg=1 last wt=100.00>
<RefPosition #60  @34  RefTypeDef <Ivl:14> CNS_INT BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #61  @35  RefTypeUse <Ivl:14> BB01 regmask=[allInt] minReg=1 last wt=100.00>
<RefPosition #62  @36  RefTypeDef <Ivl:15> IND BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #63  @37  RefTypeUse <Ivl:15> BB01 regmask=[allInt] minReg=1 last wt=100.00>
<RefPosition #64  @38  RefTypeDef <Ivl:4 V11> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=300.00>
<RefPosition #65  @47  RefTypeDef <Ivl:16 internal> STORE_BLK BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #66  @47  RefTypeDef <Ivl:17 internal> STORE_BLK BB01 regmask=[mm0-mm5] minReg=1 wt=400.00>
<RefPosition #67  @47  RefTypeUse <Ivl:4 V11> LCL_VAR BB01 regmask=[allInt] minReg=1 wt=300.00>
<RefPosition #68  @47  RefTypeUse <Ivl:16 internal> STORE_BLK BB01 regmask=[allInt] minReg=1 last wt=400.00>
<RefPosition #69  @47  RefTypeUse <Ivl:17 internal> STORE_BLK BB01 regmask=[mm0-mm5] minReg=1 last wt=400.00>
<RefPosition #70  @53  RefTypeUse <Ivl:4 V11> LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=300.00>
<RefPosition #71  @54  RefTypeDef <Ivl:18> IND BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #72  @55  RefTypeUse <Ivl:18> BB01 regmask=[allInt] minReg=1 last wt=100.00>
<RefPosition #73  @56  RefTypeDef <Ivl:1 V07> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #74  @58  RefTypeDef <Ivl:19> CNS_INT BB01 regmask=[rcx] minReg=1 wt=400.00>
<RefPosition #75  @59  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #76  @59  RefTypeUse <Ivl:19> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #77  @60  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #78  @60  RefTypeDef <Ivl:20> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed wt=400.00>
<RefPosition #79  @62  RefTypeDef <Ivl:21> CNS_INT BB01 regmask=[rdx] minReg=1 wt=400.00>
<RefPosition #80  @63  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #81  @63  RefTypeUse <Ivl:21> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #82  @64  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #83  @64  RefTypeDef <Ivl:22> PUTARG_REG BB01 regmask=[rdx] minReg=1 fixed wt=400.00>
<RefPosition #84  @65  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #85  @65  RefTypeUse <Ivl:20> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #86  @65  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #87  @65  RefTypeUse <Ivl:22> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #88  @66  RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 last wt=100.00>
<RefPosition #89  @66  RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 last wt=100.00>
<RefPosition #90  @66  RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 last wt=100.00>
<RefPosition #91  @66  RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last wt=100.00>
<RefPosition #92  @66  RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last wt=100.00>
<RefPosition #93  @66  RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 last wt=100.00>
<RefPosition #94  @66  RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 last wt=100.00>
<RefPosition #95  @66  RefTypeFixedReg <Reg:rax> BB01 regmask=[rax] minReg=1 wt=100.00>
<RefPosition #96  @66  RefTypeDef <Ivl:23> CALL BB01 regmask=[rax] minReg=1 fixed wt=400.00>
<RefPosition #97  @67  RefTypeUse <Ivl:23> BB01 regmask=[allInt] minReg=1 last wt=100.00>
<RefPosition #98  @68  RefTypeDef <Ivl:2 V08> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #99  @70  RefTypeDef <Ivl:24> LCL_VAR_ADDR BB01 regmask=[rcx] minReg=1 wt=400.00>
<RefPosition #100 @71  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #101 @71  RefTypeUse <Ivl:24> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #102 @72  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #103 @72  RefTypeDef <Ivl:25> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed wt=400.00>
<RefPosition #104 @74  RefTypeDef <Ivl:26> CNS_INT BB01 regmask=[rdx] minReg=1 wt=400.00>
<RefPosition #105 @75  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #106 @75  RefTypeUse <Ivl:26> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #107 @76  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #108 @76  RefTypeDef <Ivl:27> PUTARG_REG BB01 regmask=[rdx] minReg=1 fixed wt=400.00>
<RefPosition #109 @81  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #110 @81  RefTypeUse <Ivl:25> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #111 @81  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #112 @81  RefTypeUse <Ivl:27> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #113 @82  RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 last wt=100.00>
<RefPosition #114 @82  RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 last wt=100.00>
<RefPosition #115 @82  RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 last wt=100.00>
<RefPosition #116 @82  RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last wt=100.00>
<RefPosition #117 @82  RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last wt=100.00>
<RefPosition #118 @82  RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 last wt=100.00>
<RefPosition #119 @82  RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 last wt=100.00>
<RefPosition #120 @82  RefTypeFixedReg <Reg:rax> BB01 regmask=[rax] minReg=1 wt=100.00>
<RefPosition #121 @82  RefTypeDef <Ivl:28> CALL BB01 regmask=[rax] minReg=1 fixed wt=400.00>
<RefPosition #122 @83  RefTypeUse <Ivl:28> BB01 regmask=[allInt] minReg=1 last regOptional wt=100.00>
<RefPosition #123 @84  RefTypeDef <Ivl:29> CAST BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #124 @85  RefTypeUse <Ivl:29> BB01 regmask=[allInt] minReg=1 last wt=100.00>
<RefPosition #125 @86  RefTypeDef <Ivl:3 V09> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #126 @93  RefTypeFixedReg <Reg:r8 > BB01 regmask=[r8] minReg=1 wt=100.00>
<RefPosition #127 @93  RefTypeUse <Ivl:1 V07> LCL_VAR BB01 regmask=[r8] minReg=1 last fixed wt=400.00>
<RefPosition #128 @94  RefTypeFixedReg <Reg:r8 > BB01 regmask=[r8] minReg=1 wt=100.00>
<RefPosition #129 @94  RefTypeDef <Ivl:30> PUTARG_REG BB01 regmask=[r8] minReg=1 fixed wt=400.00>
<RefPosition #130 @97  RefTypeFixedReg <Reg:r9 > BB01 regmask=[r9] minReg=1 wt=100.00>
<RefPosition #131 @97  RefTypeUse <Ivl:2 V08> LCL_VAR BB01 regmask=[r9] minReg=1 last fixed wt=400.00>
<RefPosition #132 @98  RefTypeFixedReg <Reg:r9 > BB01 regmask=[r9] minReg=1 wt=100.00>
<RefPosition #133 @98  RefTypeDef <Ivl:31> PUTARG_REG BB01 regmask=[r9] minReg=1 fixed wt=400.00>
<RefPosition #134 @101 RefTypeUse <Ivl:3 V09> LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=400.00>
<RefPosition #135 @104 RefTypeDef <Ivl:32> LCL_VAR_ADDR BB01 regmask=[rcx] minReg=1 wt=400.00>
<RefPosition #136 @105 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #137 @105 RefTypeUse <Ivl:32> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #138 @106 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #139 @106 RefTypeDef <Ivl:33> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed wt=400.00>
<RefPosition #140 @108 RefTypeDef <Ivl:34> LCL_FLD BB01 regmask=[rdx] minReg=1 wt=400.00>
<RefPosition #141 @109 RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #142 @109 RefTypeUse <Ivl:34> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #143 @110 RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #144 @110 RefTypeDef <Ivl:35> PUTARG_REG BB01 regmask=[rdx] minReg=1 fixed wt=400.00>
<RefPosition #145 @115 RefTypeFixedReg <Reg:r8 > BB01 regmask=[r8] minReg=1 wt=100.00>
<RefPosition #146 @115 RefTypeUse <Ivl:30> BB01 regmask=[r8] minReg=1 last fixed wt=100.00>
<RefPosition #147 @115 RefTypeFixedReg <Reg:r9 > BB01 regmask=[r9] minReg=1 wt=100.00>
<RefPosition #148 @115 RefTypeUse <Ivl:31> BB01 regmask=[r9] minReg=1 last fixed wt=100.00>
<RefPosition #149 @115 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #150 @115 RefTypeUse <Ivl:33> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #151 @115 RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #152 @115 RefTypeUse <Ivl:35> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #153 @116 RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 last wt=100.00>
<RefPosition #154 @116 RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 last wt=100.00>
<RefPosition #155 @116 RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 last wt=100.00>
<RefPosition #156 @116 RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last wt=100.00>
<RefPosition #157 @116 RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last wt=100.00>
<RefPosition #158 @116 RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 last wt=100.00>
<RefPosition #159 @116 RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 last wt=100.00>

------------
REFPOSITIONS DURING VALIDATE INTERVALS (RefPositions per interval)
------------

-----------------
<RefPosition #18  @12  RefTypeDef <Ivl:0 V05> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #46  @29  RefTypeUse <Ivl:0 V05> LCL_VAR BB01 regmask=[rdx] minReg=1 last fixed wt=400.00>
-----------------
<RefPosition #98  @68  RefTypeDef <Ivl:2 V08> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #131 @97  RefTypeUse <Ivl:2 V08> LCL_VAR BB01 regmask=[r9] minReg=1 last fixed wt=400.00>
-----------------
<RefPosition #73  @56  RefTypeDef <Ivl:1 V07> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #127 @93  RefTypeUse <Ivl:1 V07> LCL_VAR BB01 regmask=[r8] minReg=1 last fixed wt=400.00>
-----------------
<RefPosition #125 @86  RefTypeDef <Ivl:3 V09> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #134 @101 RefTypeUse <Ivl:3 V09> LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=400.00>
-----------------
<RefPosition #64  @38  RefTypeDef <Ivl:4 V11> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=300.00>
<RefPosition #67  @47  RefTypeUse <Ivl:4 V11> LCL_VAR BB01 regmask=[allInt] minReg=1 wt=300.00>
<RefPosition #70  @53  RefTypeUse <Ivl:4 V11> LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=300.00>
TUPLE STYLE DUMP WITH REF POSITIONS
Incoming Parameters: 
BB01 [000..04C) (return), preds={} succs={}
=====
  N003.                    IL_OFFSET INLRT @ 0x000[E-]
  N005.                    CNS_INT(h) 0x7ff93744e858 class
        Def:<I5>(#1)
  N007.                    PUTARG_REG
                               Use:<I5>(#3) Fixed:rcx(#2) *
        Def:<I6>(#5) rcx
  N009.                    CALL help
                               Use:<I6>(#7) Fixed:rcx(#6) *
        Kill: rax rcx rdx r8 r9 r10 r11 
        Def:<I7>(#16) rax Pref:<V05/L0>
  N011.                    V05(L0)
                               Use:<I7>(#17) *
        Def:<V05/L0>(#18)
  N013.                    IL_OFFSET INLRT @ 0x005[--]
  N015.                    CNS_INT   0x7ff9372b1818
        Def:<I8>(#19)
  N017.                    PUTARG_REG
                               Use:<I8>(#21) Fixed:rcx(#20) *
        Def:<I9>(#23) rcx
  N019.                    CNS_INT   5
        Def:<I10>(#24)
  N021.                    PUTARG_REG
                               Use:<I10>(#26) Fixed:rdx(#25) *
        Def:<I11>(#28) rdx
  N023.                    CALL help
                               Use:<I9>(#30) Fixed:rcx(#29) *
                               Use:<I11>(#32) Fixed:rdx(#31) *
        Kill: rax rcx rdx r8 r9 r10 r11 
        Def:<I12>(#41) rax LocalDefUse *
  N025.                    V05(L0)
  N027.                    CNS_INT(h) 0x1a844001ec8 static Fseq[s_rt]
        Def:<I13>(#42)
  N029.                    STOREIND 
                               Use:<I13>(#44) Fixed:rcx(#43) *
                               Use:<V05/L0>(#46) Fixed:rdx(#45) *
        Kill: rax rcx rdx r8 r9 r10 r11 mm0 mm1 mm2 mm3 mm4 mm5 
  N031.                    IL_OFFSET INLRT @ 0x00A[E-]
  N033.                    CNS_INT(h) 0x1a844001eb8 static box ptr
        Def:<I14>(#60)
  N035.                    IND      
                               Use:<I14>(#61) *
        Def:<I15>(#62) Pref:<V11/L4>
  N037.                    V11(L4)
                               Use:<I15>(#63) *
        Def:<V11/L4>(#64)
  N039.                    V11(L4)
  N041.                    LEA(b+8) 
  N043.                    IND      
  N045.                    LCL_FLD_ADDR V00 loc0         [+0] NA
  N047.                    STORE_BLK
        Def:<T16>(#65)
        Def:<T17>(#66)
                               Use:<V11/L4>(#67)
                               Use:<T16>(#68) *
                               Use:<T17>(#69) *
  N049.                    V11(L4)
  N051.                    LEA(b+12)
  N053.                    IND      
                               Use:<V11/L4>(#70) *
        Def:<I18>(#71) Pref:<V07/L1>
  N055.                    V07(L1)
                               Use:<I18>(#72) *
        Def:<V07/L1>(#73)
  N057.                    CNS_INT(h) 0x7ff93744e2d8 class
        Def:<I19>(#74)
  N059.                    PUTARG_REG
                               Use:<I19>(#76) Fixed:rcx(#75) *
        Def:<I20>(#78) rcx
  N061.                    CNS_INT   1
        Def:<I21>(#79)
  N063.                    PUTARG_REG
                               Use:<I21>(#81) Fixed:rdx(#80) *
        Def:<I22>(#83) rdx
  N065.                    CALL help
                               Use:<I20>(#85) Fixed:rcx(#84) *
                               Use:<I22>(#87) Fixed:rdx(#86) *
        Kill: rax rcx rdx r8 r9 r10 r11 
        Def:<I23>(#96) rax Pref:<V08/L2>
  N067.                    V08(L2)
                               Use:<I23>(#97) *
        Def:<V08/L2>(#98)
  N069.                    LCL_VAR_ADDR V00 loc0          NA
        Def:<I24>(#99)
  N071.                    PUTARG_REG
                               Use:<I24>(#101) Fixed:rcx(#100) *
        Def:<I25>(#103) rcx
  N073.                    CNS_INT   0
        Def:<I26>(#104)
  N075.                    PUTARG_REG
                               Use:<I26>(#106) Fixed:rdx(#105) *
        Def:<I27>(#108) rdx
  N077.                    CNS_INT(h) 0x7ff93727bac8 ftn
  N079.                    IND      
  N081.                    CALL     
                               Use:<I25>(#110) Fixed:rcx(#109) *
                               Use:<I27>(#112) Fixed:rdx(#111) *
        Kill: rax rcx rdx r8 r9 r10 r11 
        Def:<I28>(#121) rax Pref:<I29>
  N083.                    CAST     
                               Use:<I28>(#122) *
        Def:<I29>(#123) Pref:<V09/L3>
  N085.                    V09(L3)
                               Use:<I29>(#124) *
        Def:<V09/L3>(#125)
  N087.                    CNS_INT   1
  N089.                    PUTARG_STK [+0x28]
  N091.                    V07(L1)
  N093.                    PUTARG_REG
                               Use:<V07/L1>(#127) Fixed:r8(#126) *
        Def:<I30>(#129) r8
  N095.                    V08(L2)
  N097.                    PUTARG_REG
                               Use:<V08/L2>(#131) Fixed:r9(#130) *
        Def:<I31>(#133) r9
  N099.                    V09(L3)
  N101.                    PUTARG_STK [+0x20]
                               Use:<V09/L3>(#134) *
  N103.                    LCL_VAR_ADDR V01 loc1          NA
        Def:<I32>(#135)
  N105.                    PUTARG_REG
                               Use:<I32>(#137) Fixed:rcx(#136) *
        Def:<I33>(#139) rcx
  N107.                    V00 MEM
        Def:<I34>(#140)
  N109.                    PUTARG_REG
                               Use:<I34>(#142) Fixed:rdx(#141) *
        Def:<I35>(#144) rdx
  N111.                    CNS_INT(h) 0x7ff93727bae0 ftn
  N113.                    IND      
  N115.                    CALL     
                               Use:<I30>(#146) Fixed:r8(#145) *
                               Use:<I31>(#148) Fixed:r9(#147) *
                               Use:<I33>(#150) Fixed:rcx(#149) *
                               Use:<I35>(#152) Fixed:rdx(#151) *
        Kill: rax rcx rdx r8 r9 r10 r11 
  N117.                    IL_OFFSET INLRT @ 0x04B[E-]
  N119.                    RETURN   




Linear scan intervals after buildIntervals:
Interval  0: (V05) ref RefPositions {#18@12 #46@29} physReg:NA Preferences=[rbx rbp rsi rdi r12-r15]
Interval  1: (V07) int RefPositions {#73@56 #127@93} physReg:NA Preferences=[rbx rbp rsi rdi r12-r15]
Interval  2: (V08) ref RefPositions {#98@68 #131@97} physReg:NA Preferences=[rbx rbp rsi rdi r12-r15]
Interval  3: (V09) int RefPositions {#125@86 #134@101} physReg:NA Preferences=[rax rcx rdx rbx rbp rsi rdi r10-r15]
Interval  4: (V11) ref RefPositions {#64@38 #67@47 #70@53} physReg:NA Preferences=[allInt]
Interval  5: long (constant) RefPositions {#1@6 #3@7} physReg:NA Preferences=[rcx]
Interval  6: long RefPositions {#5@8 #7@9} physReg:NA Preferences=[rcx]
Interval  7: ref RefPositions {#16@10 #17@11} physReg:NA Preferences=[rax] RelatedInterval <V05/L0>
Interval  8: long (constant) RefPositions {#19@16 #21@17} physReg:NA Preferences=[rcx]
Interval  9: long RefPositions {#23@18 #30@23} physReg:NA Preferences=[rcx]
Interval 10: int (constant) RefPositions {#24@20 #26@21} physReg:NA Preferences=[rdx]
Interval 11: int RefPositions {#28@22 #32@23} physReg:NA Preferences=[rdx]
Interval 12: long RefPositions {#41@24} physReg:NA Preferences=[rax]
Interval 13: long (constant) RefPositions {#42@28 #44@29} physReg:NA Preferences=[rcx]
Interval 14: long (constant) RefPositions {#60@34 #61@35} physReg:NA Preferences=[allInt]
Interval 15: ref RefPositions {#62@36 #63@37} physReg:NA Preferences=[allInt] RelatedInterval <V11/L4>
Interval 16: int (INTERNAL) RefPositions {#65@47 #68@47} physReg:NA Preferences=[allInt]
Interval 17: float (INTERNAL) RefPositions {#66@47 #69@47} physReg:NA Preferences=[mm0-mm5]
Interval 18: int RefPositions {#71@54 #72@55} physReg:NA Preferences=[allInt] RelatedInterval <V07/L1>
Interval 19: long (constant) RefPositions {#74@58 #76@59} physReg:NA Preferences=[rcx]
Interval 20: long RefPositions {#78@60 #85@65} physReg:NA Preferences=[rcx]
Interval 21: long (constant) RefPositions {#79@62 #81@63} physReg:NA Preferences=[rdx]
Interval 22: long RefPositions {#83@64 #87@65} physReg:NA Preferences=[rdx]
Interval 23: ref RefPositions {#96@66 #97@67} physReg:NA Preferences=[rax] RelatedInterval <V08/L2>
Interval 24: long RefPositions {#99@70 #101@71} physReg:NA Preferences=[rcx]
Interval 25: long RefPositions {#103@72 #110@81} physReg:NA Preferences=[rcx]
Interval 26: int (constant) RefPositions {#104@74 #106@75} physReg:NA Preferences=[rdx]
Interval 27: int RefPositions {#108@76 #112@81} physReg:NA Preferences=[rdx]
Interval 28: long RefPositions {#121@82 #122@83} physReg:NA Preferences=[rax] RelatedInterval <I29>
Interval 29: int RefPositions {#123@84 #124@85} physReg:NA Preferences=[allInt] RelatedInterval <V09/L3>
Interval 30: int RefPositions {#129@94 #146@115} physReg:NA Preferences=[r8]
Interval 31: ref RefPositions {#133@98 #148@115} physReg:NA Preferences=[r9]
Interval 32: long RefPositions {#135@104 #137@105} physReg:NA Preferences=[rcx]
Interval 33: long RefPositions {#139@106 #150@115} physReg:NA Preferences=[rcx]
Interval 34: ubyte RefPositions {#140@108 #142@109} physReg:NA Preferences=[rdx]
Interval 35: int RefPositions {#144@110 #152@115} physReg:NA Preferences=[rdx]

*************** In LinearScan::allocateRegisters()

Linear scan intervals before allocateRegisters:
Interval  0: (V05) ref RefPositions {#18@12 #46@29} physReg:NA Preferences=[rbx rbp rsi rdi r12-r15]
Interval  1: (V07) int RefPositions {#73@56 #127@93} physReg:NA Preferences=[rbx rbp rsi rdi r12-r15]
Interval  2: (V08) ref RefPositions {#98@68 #131@97} physReg:NA Preferences=[rbx rbp rsi rdi r12-r15]
Interval  3: (V09) int RefPositions {#125@86 #134@101} physReg:NA Preferences=[rax rcx rdx rbx rbp rsi rdi r10-r15]
Interval  4: (V11) ref RefPositions {#64@38 #67@47 #70@53} physReg:NA Preferences=[allInt]
Interval  5: long (constant) RefPositions {#1@6 #3@7} physReg:NA Preferences=[rcx]
Interval  6: long RefPositions {#5@8 #7@9} physReg:NA Preferences=[rcx]
Interval  7: ref RefPositions {#16@10 #17@11} physReg:NA Preferences=[rax] RelatedInterval <V05/L0>
Interval  8: long (constant) RefPositions {#19@16 #21@17} physReg:NA Preferences=[rcx]
Interval  9: long RefPositions {#23@18 #30@23} physReg:NA Preferences=[rcx]
Interval 10: int (constant) RefPositions {#24@20 #26@21} physReg:NA Preferences=[rdx]
Interval 11: int RefPositions {#28@22 #32@23} physReg:NA Preferences=[rdx]
Interval 12: long RefPositions {#41@24} physReg:NA Preferences=[rax]
Interval 13: long (constant) RefPositions {#42@28 #44@29} physReg:NA Preferences=[rcx]
Interval 14: long (constant) RefPositions {#60@34 #61@35} physReg:NA Preferences=[allInt]
Interval 15: ref RefPositions {#62@36 #63@37} physReg:NA Preferences=[allInt] RelatedInterval <V11/L4>
Interval 16: int (INTERNAL) RefPositions {#65@47 #68@47} physReg:NA Preferences=[allInt]
Interval 17: float (INTERNAL) RefPositions {#66@47 #69@47} physReg:NA Preferences=[mm0-mm5]
Interval 18: int RefPositions {#71@54 #72@55} physReg:NA Preferences=[allInt] RelatedInterval <V07/L1>
Interval 19: long (constant) RefPositions {#74@58 #76@59} physReg:NA Preferences=[rcx]
Interval 20: long RefPositions {#78@60 #85@65} physReg:NA Preferences=[rcx]
Interval 21: long (constant) RefPositions {#79@62 #81@63} physReg:NA Preferences=[rdx]
Interval 22: long RefPositions {#83@64 #87@65} physReg:NA Preferences=[rdx]
Interval 23: ref RefPositions {#96@66 #97@67} physReg:NA Preferences=[rax] RelatedInterval <V08/L2>
Interval 24: long RefPositions {#99@70 #101@71} physReg:NA Preferences=[rcx]
Interval 25: long RefPositions {#103@72 #110@81} physReg:NA Preferences=[rcx]
Interval 26: int (constant) RefPositions {#104@74 #106@75} physReg:NA Preferences=[rdx]
Interval 27: int RefPositions {#108@76 #112@81} physReg:NA Preferences=[rdx]
Interval 28: long RefPositions {#121@82 #122@83} physReg:NA Preferences=[rax] RelatedInterval <I29>
Interval 29: int RefPositions {#123@84 #124@85} physReg:NA Preferences=[allInt] RelatedInterval <V09/L3>
Interval 30: int RefPositions {#129@94 #146@115} physReg:NA Preferences=[r8]
Interval 31: ref RefPositions {#133@98 #148@115} physReg:NA Preferences=[r9]
Interval 32: long RefPositions {#135@104 #137@105} physReg:NA Preferences=[rcx]
Interval 33: long RefPositions {#139@106 #150@115} physReg:NA Preferences=[rcx]
Interval 34: ubyte RefPositions {#140@108 #142@109} physReg:NA Preferences=[rdx]
Interval 35: int RefPositions {#144@110 #152@115} physReg:NA Preferences=[rdx]

------------
REFPOSITIONS BEFORE ALLOCATION: 
------------
<RefPosition #0   @1   RefTypeBB BB01 regmask=[] minReg=1 wt=100.00>
<RefPosition #1   @6   RefTypeDef <Ivl:5> CNS_INT BB01 regmask=[rcx] minReg=1 wt=400.00>
<RefPosition #2   @7   RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #3   @7   RefTypeUse <Ivl:5> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #4   @8   RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #5   @8   RefTypeDef <Ivl:6> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed wt=400.00>
<RefPosition #6   @9   RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #7   @9   RefTypeUse <Ivl:6> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #8   @10  RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 last wt=100.00>
<RefPosition #9   @10  RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 last wt=100.00>
<RefPosition #10  @10  RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 last wt=100.00>
<RefPosition #11  @10  RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last wt=100.00>
<RefPosition #12  @10  RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last wt=100.00>
<RefPosition #13  @10  RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 last wt=100.00>
<RefPosition #14  @10  RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 last wt=100.00>
<RefPosition #15  @10  RefTypeFixedReg <Reg:rax> BB01 regmask=[rax] minReg=1 wt=100.00>
<RefPosition #16  @10  RefTypeDef <Ivl:7> CALL BB01 regmask=[rax] minReg=1 fixed wt=400.00>
<RefPosition #17  @11  RefTypeUse <Ivl:7> BB01 regmask=[allInt] minReg=1 last wt=100.00>
<RefPosition #18  @12  RefTypeDef <Ivl:0 V05> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #19  @16  RefTypeDef <Ivl:8> CNS_INT BB01 regmask=[rcx] minReg=1 wt=400.00>
<RefPosition #20  @17  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #21  @17  RefTypeUse <Ivl:8> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #22  @18  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #23  @18  RefTypeDef <Ivl:9> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed wt=400.00>
<RefPosition #24  @20  RefTypeDef <Ivl:10> CNS_INT BB01 regmask=[rdx] minReg=1 wt=400.00>
<RefPosition #25  @21  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #26  @21  RefTypeUse <Ivl:10> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #27  @22  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #28  @22  RefTypeDef <Ivl:11> PUTARG_REG BB01 regmask=[rdx] minReg=1 fixed wt=400.00>
<RefPosition #29  @23  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #30  @23  RefTypeUse <Ivl:9> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #31  @23  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #32  @23  RefTypeUse <Ivl:11> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #33  @24  RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 last wt=100.00>
<RefPosition #34  @24  RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 last wt=100.00>
<RefPosition #35  @24  RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 last wt=100.00>
<RefPosition #36  @24  RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last wt=100.00>
<RefPosition #37  @24  RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last wt=100.00>
<RefPosition #38  @24  RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 last wt=100.00>
<RefPosition #39  @24  RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 last wt=100.00>
<RefPosition #40  @24  RefTypeFixedReg <Reg:rax> BB01 regmask=[rax] minReg=1 wt=100.00>
<RefPosition #41  @24  RefTypeDef <Ivl:12> CALL BB01 regmask=[rax] minReg=1 last fixed local wt=400.00>
<RefPosition #42  @28  RefTypeDef <Ivl:13> CNS_INT BB01 regmask=[rcx] minReg=1 wt=400.00>
<RefPosition #43  @29  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #44  @29  RefTypeUse <Ivl:13> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #45  @29  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #46  @29  RefTypeUse <Ivl:0 V05> LCL_VAR BB01 regmask=[rdx] minReg=1 last fixed wt=400.00>
<RefPosition #47  @30  RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 last wt=100.00>
<RefPosition #48  @30  RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 last wt=100.00>
<RefPosition #49  @30  RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 last wt=100.00>
<RefPosition #50  @30  RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last wt=100.00>
<RefPosition #51  @30  RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last wt=100.00>
<RefPosition #52  @30  RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 last wt=100.00>
<RefPosition #53  @30  RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 last wt=100.00>
<RefPosition #54  @30  RefTypeKill <Reg:mm0> BB01 regmask=[mm0] minReg=1 last wt=100.00>
<RefPosition #55  @30  RefTypeKill <Reg:mm1> BB01 regmask=[mm1] minReg=1 last wt=100.00>
<RefPosition #56  @30  RefTypeKill <Reg:mm2> BB01 regmask=[mm2] minReg=1 last wt=100.00>
<RefPosition #57  @30  RefTypeKill <Reg:mm3> BB01 regmask=[mm3] minReg=1 last wt=100.00>
<RefPosition #58  @30  RefTypeKill <Reg:mm4> BB01 regmask=[mm4] minReg=1 last wt=100.00>
<RefPosition #59  @30  RefTypeKill <Reg:mm5> BB01 regmask=[mm5] minReg=1 last wt=100.00>
<RefPosition #60  @34  RefTypeDef <Ivl:14> CNS_INT BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #61  @35  RefTypeUse <Ivl:14> BB01 regmask=[allInt] minReg=1 last wt=100.00>
<RefPosition #62  @36  RefTypeDef <Ivl:15> IND BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #63  @37  RefTypeUse <Ivl:15> BB01 regmask=[allInt] minReg=1 last wt=100.00>
<RefPosition #64  @38  RefTypeDef <Ivl:4 V11> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=300.00>
<RefPosition #65  @47  RefTypeDef <Ivl:16 internal> STORE_BLK BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #66  @47  RefTypeDef <Ivl:17 internal> STORE_BLK BB01 regmask=[mm0-mm5] minReg=1 wt=400.00>
<RefPosition #67  @47  RefTypeUse <Ivl:4 V11> LCL_VAR BB01 regmask=[allInt] minReg=1 wt=300.00>
<RefPosition #68  @47  RefTypeUse <Ivl:16 internal> STORE_BLK BB01 regmask=[allInt] minReg=1 last wt=400.00>
<RefPosition #69  @47  RefTypeUse <Ivl:17 internal> STORE_BLK BB01 regmask=[mm0-mm5] minReg=1 last wt=400.00>
<RefPosition #70  @53  RefTypeUse <Ivl:4 V11> LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=300.00>
<RefPosition #71  @54  RefTypeDef <Ivl:18> IND BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #72  @55  RefTypeUse <Ivl:18> BB01 regmask=[allInt] minReg=1 last wt=100.00>
<RefPosition #73  @56  RefTypeDef <Ivl:1 V07> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #74  @58  RefTypeDef <Ivl:19> CNS_INT BB01 regmask=[rcx] minReg=1 wt=400.00>
<RefPosition #75  @59  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #76  @59  RefTypeUse <Ivl:19> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #77  @60  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #78  @60  RefTypeDef <Ivl:20> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed wt=400.00>
<RefPosition #79  @62  RefTypeDef <Ivl:21> CNS_INT BB01 regmask=[rdx] minReg=1 wt=400.00>
<RefPosition #80  @63  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #81  @63  RefTypeUse <Ivl:21> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #82  @64  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #83  @64  RefTypeDef <Ivl:22> PUTARG_REG BB01 regmask=[rdx] minReg=1 fixed wt=400.00>
<RefPosition #84  @65  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #85  @65  RefTypeUse <Ivl:20> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #86  @65  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #87  @65  RefTypeUse <Ivl:22> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #88  @66  RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 last wt=100.00>
<RefPosition #89  @66  RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 last wt=100.00>
<RefPosition #90  @66  RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 last wt=100.00>
<RefPosition #91  @66  RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last wt=100.00>
<RefPosition #92  @66  RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last wt=100.00>
<RefPosition #93  @66  RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 last wt=100.00>
<RefPosition #94  @66  RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 last wt=100.00>
<RefPosition #95  @66  RefTypeFixedReg <Reg:rax> BB01 regmask=[rax] minReg=1 wt=100.00>
<RefPosition #96  @66  RefTypeDef <Ivl:23> CALL BB01 regmask=[rax] minReg=1 fixed wt=400.00>
<RefPosition #97  @67  RefTypeUse <Ivl:23> BB01 regmask=[allInt] minReg=1 last wt=100.00>
<RefPosition #98  @68  RefTypeDef <Ivl:2 V08> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #99  @70  RefTypeDef <Ivl:24> LCL_VAR_ADDR BB01 regmask=[rcx] minReg=1 wt=400.00>
<RefPosition #100 @71  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #101 @71  RefTypeUse <Ivl:24> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #102 @72  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #103 @72  RefTypeDef <Ivl:25> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed wt=400.00>
<RefPosition #104 @74  RefTypeDef <Ivl:26> CNS_INT BB01 regmask=[rdx] minReg=1 wt=400.00>
<RefPosition #105 @75  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #106 @75  RefTypeUse <Ivl:26> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #107 @76  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #108 @76  RefTypeDef <Ivl:27> PUTARG_REG BB01 regmask=[rdx] minReg=1 fixed wt=400.00>
<RefPosition #109 @81  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #110 @81  RefTypeUse <Ivl:25> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #111 @81  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #112 @81  RefTypeUse <Ivl:27> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #113 @82  RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 last wt=100.00>
<RefPosition #114 @82  RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 last wt=100.00>
<RefPosition #115 @82  RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 last wt=100.00>
<RefPosition #116 @82  RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last wt=100.00>
<RefPosition #117 @82  RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last wt=100.00>
<RefPosition #118 @82  RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 last wt=100.00>
<RefPosition #119 @82  RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 last wt=100.00>
<RefPosition #120 @82  RefTypeFixedReg <Reg:rax> BB01 regmask=[rax] minReg=1 wt=100.00>
<RefPosition #121 @82  RefTypeDef <Ivl:28> CALL BB01 regmask=[rax] minReg=1 fixed wt=400.00>
<RefPosition #122 @83  RefTypeUse <Ivl:28> BB01 regmask=[allInt] minReg=1 last regOptional wt=100.00>
<RefPosition #123 @84  RefTypeDef <Ivl:29> CAST BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #124 @85  RefTypeUse <Ivl:29> BB01 regmask=[allInt] minReg=1 last wt=100.00>
<RefPosition #125 @86  RefTypeDef <Ivl:3 V09> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #126 @93  RefTypeFixedReg <Reg:r8 > BB01 regmask=[r8] minReg=1 wt=100.00>
<RefPosition #127 @93  RefTypeUse <Ivl:1 V07> LCL_VAR BB01 regmask=[r8] minReg=1 last fixed wt=400.00>
<RefPosition #128 @94  RefTypeFixedReg <Reg:r8 > BB01 regmask=[r8] minReg=1 wt=100.00>
<RefPosition #129 @94  RefTypeDef <Ivl:30> PUTARG_REG BB01 regmask=[r8] minReg=1 fixed wt=400.00>
<RefPosition #130 @97  RefTypeFixedReg <Reg:r9 > BB01 regmask=[r9] minReg=1 wt=100.00>
<RefPosition #131 @97  RefTypeUse <Ivl:2 V08> LCL_VAR BB01 regmask=[r9] minReg=1 last fixed wt=400.00>
<RefPosition #132 @98  RefTypeFixedReg <Reg:r9 > BB01 regmask=[r9] minReg=1 wt=100.00>
<RefPosition #133 @98  RefTypeDef <Ivl:31> PUTARG_REG BB01 regmask=[r9] minReg=1 fixed wt=400.00>
<RefPosition #134 @101 RefTypeUse <Ivl:3 V09> LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=400.00>
<RefPosition #135 @104 RefTypeDef <Ivl:32> LCL_VAR_ADDR BB01 regmask=[rcx] minReg=1 wt=400.00>
<RefPosition #136 @105 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #137 @105 RefTypeUse <Ivl:32> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #138 @106 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #139 @106 RefTypeDef <Ivl:33> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed wt=400.00>
<RefPosition #140 @108 RefTypeDef <Ivl:34> LCL_FLD BB01 regmask=[rdx] minReg=1 wt=400.00>
<RefPosition #141 @109 RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #142 @109 RefTypeUse <Ivl:34> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #143 @110 RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #144 @110 RefTypeDef <Ivl:35> PUTARG_REG BB01 regmask=[rdx] minReg=1 fixed wt=400.00>
<RefPosition #145 @115 RefTypeFixedReg <Reg:r8 > BB01 regmask=[r8] minReg=1 wt=100.00>
<RefPosition #146 @115 RefTypeUse <Ivl:30> BB01 regmask=[r8] minReg=1 last fixed wt=100.00>
<RefPosition #147 @115 RefTypeFixedReg <Reg:r9 > BB01 regmask=[r9] minReg=1 wt=100.00>
<RefPosition #148 @115 RefTypeUse <Ivl:31> BB01 regmask=[r9] minReg=1 last fixed wt=100.00>
<RefPosition #149 @115 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #150 @115 RefTypeUse <Ivl:33> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #151 @115 RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #152 @115 RefTypeUse <Ivl:35> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #153 @116 RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 last wt=100.00>
<RefPosition #154 @116 RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 last wt=100.00>
<RefPosition #155 @116 RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 last wt=100.00>
<RefPosition #156 @116 RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last wt=100.00>
<RefPosition #157 @116 RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last wt=100.00>
<RefPosition #158 @116 RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 last wt=100.00>
<RefPosition #159 @116 RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 last wt=100.00>

VAR REFPOSITIONS BEFORE ALLOCATION
--- V00
--- V01
--- V02
--- V03
--- V04
--- V05  (Interval 0)
<RefPosition #18  @12  RefTypeDef <Ivl:0 V05> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #46  @29  RefTypeUse <Ivl:0 V05> LCL_VAR BB01 regmask=[rdx] minReg=1 last fixed wt=400.00>
--- V06
--- V07  (Interval 1)
<RefPosition #73  @56  RefTypeDef <Ivl:1 V07> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #127 @93  RefTypeUse <Ivl:1 V07> LCL_VAR BB01 regmask=[r8] minReg=1 last fixed wt=400.00>
--- V08  (Interval 2)
<RefPosition #98  @68  RefTypeDef <Ivl:2 V08> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #131 @97  RefTypeUse <Ivl:2 V08> LCL_VAR BB01 regmask=[r9] minReg=1 last fixed wt=400.00>
--- V09  (Interval 3)
<RefPosition #125 @86  RefTypeDef <Ivl:3 V09> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00>
<RefPosition #134 @101 RefTypeUse <Ivl:3 V09> LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=400.00>
--- V10
--- V11  (Interval 4)
<RefPosition #64  @38  RefTypeDef <Ivl:4 V11> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=300.00>
<RefPosition #67  @47  RefTypeUse <Ivl:4 V11> LCL_VAR BB01 regmask=[allInt] minReg=1 wt=300.00>
<RefPosition #70  @53  RefTypeUse <Ivl:4 V11> LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=300.00>



Allocating Registers
--------------------
The following table has one or more rows for each RefPosition that is handled during allocation.
The columns are: (1) Loc: LSRA location, (2) RP#: RefPosition number, (3) Name, (4) Type (e.g. Def, Use,
Fixd, Parm, DDef (Dummy Def), ExpU (Exposed Use), Kill) followed by a '*' if it is a last use, and a 'D'
if it is delayRegFree, (5) Action taken during allocation. Some actions include (a) Alloc a new register,
(b) Keep an existing register, (c) Spill a register, (d) ReLod (Reload) a register. If an ALL-CAPS name
such as COVRS is displayed, it is a score name from lsra_score.h, with a trailing '(A)' indicating alloc,
'(C)' indicating copy, and '(R)' indicating re-use. See dumpLsraAllocationEvent() for details.
The subsequent columns show the Interval occupying each register, if any, followed by 'a' if it is
active, 'p' if it is a large vector that has been partially spilled, and 'i' if it is inactive.
Columns are only printed up to the last modified register, which may increase during allocation,
in which case additional columns will appear. Registers which are not marked modified have ---- in
their column.

────────────────────────────────────────────┼────┼────┼────┼────┼────┼────┼────┼────┼────┤
TreeID   Loc RP#  Name Type  Action    Reg  │rax │rcx │rdx │rbx │rbp │rsi │rdi │r8  │r9  │
────────────────────────────────────────────┼────┼────┼────┼────┼────┼────┼────┼────┼────┤
                                            │    │    │    │    │    │    │    │    │    │
           1.#0   BB1 PredBB0               │    │    │    │    │    │    │    │    │    │
[000000]   6.#1   C5   Def    Alloc    rcx  │    │C5 a│    │    │    │    │    │    │    │
[000113]   7.#2   rcx  Fixd   Keep     rcx  │    │C5 a│    │    │    │    │    │    │    │
           7.#3   C5   Use *  Keep     rcx  │    │C5 a│    │    │    │    │    │    │    │
           8.#4   rcx  Fixd   Keep     rcx  │    │    │    │    │    │    │    │    │    │
           8.#5   I6   Def    Alloc    rcx  │    │I6 a│    │    │    │    │    │    │    │
[000001]   9.#6   rcx  Fixd   Keep     rcx  │    │I6 a│    │    │    │    │    │    │    │
           9.#7   I6   Use *  Keep     rcx  │    │I6 a│    │    │    │    │    │    │    │
          10.#8   rax  Kill   Keep     rax  │    │    │    │    │    │    │    │    │    │
          10.#9   rcx  Kill   Keep     rcx  │    │    │    │    │    │    │    │    │    │
          10.#10  rdx  Kill   Keep     rdx  │    │    │    │    │    │    │    │    │    │
          10.#11  r8   Kill   Keep     r8   │    │    │    │    │    │    │    │    │    │
          10.#12  r9   Kill   Keep     r9   │    │    │    │    │    │    │    │    │    │
          10.#13  r10  Kill   Keep     r10  │    │    │    │    │    │    │    │    │    │
          10.#14  r11  Kill   Keep     r11  │    │    │    │    │    │    │    │    │    │
          10.#15  rax  Fixd   Keep     rax  │    │    │    │    │    │    │    │    │    │
          10.#16  I7   Def    Alloc    rax  │I7 a│    │    │    │    │    │    │    │    │
[000003]  11.#17  I7   Use *  Keep     rax  │I7 a│    │    │    │    │    │    │    │    │
          12.#18  V5   Def    ORDER(A) rsi  │    │    │    │    │    │V5 a│    │    │    │
[000011]  16.#19  C8   Def    Alloc    rcx  │    │C8 a│    │    │    │V5 a│    │    │    │
[000114]  17.#20  rcx  Fixd   Keep     rcx  │    │C8 a│    │    │    │V5 a│    │    │    │
          17.#21  C8   Use *  Keep     rcx  │    │C8 a│    │    │    │V5 a│    │    │    │
          18.#22  rcx  Fixd   Keep     rcx  │    │    │    │    │    │V5 a│    │    │    │
          18.#23  I9   Def    Alloc    rcx  │    │I9 a│    │    │    │V5 a│    │    │    │
[000012]  20.#24  C10  Def    Alloc    rdx  │    │I9 a│C10a│    │    │V5 a│    │    │    │
[000115]  21.#25  rdx  Fixd   Keep     rdx  │    │I9 a│C10a│    │    │V5 a│    │    │    │
          21.#26  C10  Use *  Keep     rdx  │    │I9 a│C10a│    │    │V5 a│    │    │    │
          22.#27  rdx  Fixd   Keep     rdx  │    │I9 a│    │    │    │V5 a│    │    │    │
          22.#28  I11  Def    Alloc    rdx  │    │I9 a│I11a│    │    │V5 a│    │    │    │
[000013]  23.#29  rcx  Fixd   Keep     rcx  │    │I9 a│I11a│    │    │V5 a│    │    │    │
          23.#30  I9   Use *  Keep     rcx  │    │I9 a│I11a│    │    │V5 a│    │    │    │
          23.#31  rdx  Fixd   Keep     rdx  │    │I9 a│I11a│    │    │V5 a│    │    │    │
          23.#32  I11  Use *  Keep     rdx  │    │I9 a│I11a│    │    │V5 a│    │    │    │
          24.#33  rax  Kill   Keep     rax  │    │    │    │    │    │V5 a│    │    │    │
          24.#34  rcx  Kill   Keep     rcx  │    │    │    │    │    │V5 a│    │    │    │
          24.#35  rdx  Kill   Keep     rdx  │    │    │    │    │    │V5 a│    │    │    │
          24.#36  r8   Kill   Keep     r8   │    │    │    │    │    │V5 a│    │    │    │
          24.#37  r9   Kill   Keep     r9   │    │    │    │    │    │V5 a│    │    │    │
          24.#38  r10  Kill   Keep     r10  │    │    │    │    │    │V5 a│    │    │    │
          24.#39  r11  Kill   Keep     r11  │    │    │    │    │    │V5 a│    │    │    │
          24.#40  rax  Fixd   Keep     rax  │    │    │    │    │    │V5 a│    │    │    │
          24.#41  I12  Def *  Alloc    rax  │I12a│    │    │    │    │V5 a│    │    │    │
[000007]  28.#42  C13  Def    Alloc    rcx  │    │C13a│    │    │    │V5 a│    │    │    │
[000110]  29.#43  rcx  Fixd   Keep     rcx  │    │C13a│    │    │    │V5 a│    │    │    │
          29.#44  C13  Use *  Keep     rcx  │    │C13a│    │    │    │V5 a│    │    │    │
          29.#45  rdx  Fixd   Keep     rdx  │    │C13a│    │    │    │V5 a│    │    │    │
          29.#46  V5   Use *  Copy     rdx  │    │C13a│V5 a│    │    │V5 a│    │    │    │
          30.#47  rax  Kill   Keep     rax  │    │C13i│    │    │    │    │    │    │    │
          30.#48  rcx  Kill   Keep     rcx  │    │    │    │    │    │    │    │    │    │
          30.#49  rdx  Kill   Keep     rdx  │    │    │    │    │    │    │    │    │    │
          30.#50  r8   Kill   Keep     r8   │    │    │    │    │    │    │    │    │    │
          30.#51  r9   Kill   Keep     r9   │    │    │    │    │    │    │    │    │    │
          30.#52  r10  Kill   Keep     r10  │    │    │    │    │    │    │    │    │    │
          30.#53  r11  Kill   Keep     r11  │    │    │    │    │    │    │    │    │    │
          30.#54  mm0  Kill   Keep     mm0  │    │    │    │    │    │    │    │    │    │
          30.#55  mm1  Kill   Keep     mm1  │    │    │    │    │    │    │    │    │    │
          30.#56  mm2  Kill   Keep     mm2  │    │    │    │    │    │    │    │    │    │
          30.#57  mm3  Kill   Keep     mm3  │    │    │    │    │    │    │    │    │    │
          30.#58  mm4  Kill   Keep     mm4  │    │    │    │    │    │    │    │    │    │
          30.#59  mm5  Kill   Keep     mm5  │    │    │    │    │    │    │    │    │    │
────────────────────────────────────────────┼────┼────┼────┼────┼────┼────┼────┼────┼────┤
TreeID   Loc RP#  Name Type  Action    Reg  │rax │rcx │rdx │rbx │rbp │rsi │rdi │r8  │r9  │
────────────────────────────────────────────┼────┼────┼────┼────┼────┼────┼────┼────┼────┤
[000014]  34.#60  C14  Def    BSFIT(A) rcx  │    │C14a│    │    │    │    │    │    │    │
[000015]  35.#61  C14  Use *  Keep     rcx  │    │C14a│    │    │    │    │    │    │    │
          36.#62  I15  Def    BSFIT(A) rcx  │    │I15a│    │    │    │    │    │    │    │
[000104]  37.#63  I15  Use *  Keep     rcx  │    │I15a│    │    │    │    │    │    │    │
          38.#64  V11  Def    COVRS(A) rcx  │    │V11a│    │    │    │    │    │    │    │
[000025]  47.#65  I16  Def    BSFIT(A) rdx  │    │V11a│I16a│    │    │    │    │    │    │
          47.#66  I17  Def    ORDER(A) mm0  │    │V11a│I16a│    │    │    │    │    │    │
          47.#67  V11  Use    Keep     rcx  │    │V11a│I16a│    │    │    │    │    │    │
          47.#68  I16  Use *  Keep     rdx  │    │V11a│I16a│    │    │    │    │    │    │
          47.#69  I17  Use *  Keep     mm0  │    │V11a│I16a│    │    │    │    │    │    │
[000087]  53.#70  V11  Use *  Keep     rcx  │    │V11a│    │    │    │    │    │    │    │
          54.#71  I18  Def    ORDER(A) rsi  │    │    │    │    │    │I18a│    │    │    │
[000089]  55.#72  I18  Use *  Keep     rsi  │    │    │    │    │    │I18a│    │    │    │
          56.#73  V7   Def    COVRS(A) rsi  │    │    │    │    │    │V7 a│    │    │    │
[000044]  58.#74  C19  Def    Alloc    rcx  │    │C19a│    │    │    │V7 a│    │    │    │
[000117]  59.#75  rcx  Fixd   Keep     rcx  │    │C19a│    │    │    │V7 a│    │    │    │
          59.#76  C19  Use *  Keep     rcx  │    │C19a│    │    │    │V7 a│    │    │    │
          60.#77  rcx  Fixd   Keep     rcx  │    │    │    │    │    │V7 a│    │    │    │
          60.#78  I20  Def    Alloc    rcx  │    │I20a│    │    │    │V7 a│    │    │    │
[000043]  62.#79  C21  Def    Alloc    rdx  │    │I20a│C21a│    │    │V7 a│    │    │    │
[000118]  63.#80  rdx  Fixd   Keep     rdx  │    │I20a│C21a│    │    │V7 a│    │    │    │
          63.#81  C21  Use *  Keep     rdx  │    │I20a│C21a│    │    │V7 a│    │    │    │
          64.#82  rdx  Fixd   Keep     rdx  │    │I20a│    │    │    │V7 a│    │    │    │
          64.#83  I22  Def    Alloc    rdx  │    │I20a│I22a│    │    │V7 a│    │    │    │
[000045]  65.#84  rcx  Fixd   Keep     rcx  │    │I20a│I22a│    │    │V7 a│    │    │    │
          65.#85  I20  Use *  Keep     rcx  │    │I20a│I22a│    │    │V7 a│    │    │    │
          65.#86  rdx  Fixd   Keep     rdx  │    │I20a│I22a│    │    │V7 a│    │    │    │
          65.#87  I22  Use *  Keep     rdx  │    │I20a│I22a│    │    │V7 a│    │    │    │
          66.#88  rax  Kill   Keep     rax  │    │    │    │    │    │V7 a│    │    │    │
          66.#89  rcx  Kill   Keep     rcx  │    │    │    │    │    │V7 a│    │    │    │
          66.#90  rdx  Kill   Keep     rdx  │    │    │    │    │    │V7 a│    │    │    │
          66.#91  r8   Kill   Keep     r8   │    │    │    │    │    │V7 a│    │    │    │
          66.#92  r9   Kill   Keep     r9   │    │    │    │    │    │V7 a│    │    │    │
          66.#93  r10  Kill   Keep     r10  │    │    │    │    │    │V7 a│    │    │    │
          66.#94  r11  Kill   Keep     r11  │    │    │    │    │    │V7 a│    │    │    │
          66.#95  rax  Fixd   Keep     rax  │    │    │    │    │    │V7 a│    │    │    │
          66.#96  I23  Def    Alloc    rax  │I23a│    │    │    │    │V7 a│    │    │    │
[000092]  67.#97  I23  Use *  Keep     rax  │I23a│    │    │    │    │V7 a│    │    │    │
          68.#98  V8   Def    ORDER(A) rdi  │    │    │    │    │    │V7 a│V8 a│    │    │
[000058]  70.#99  I24  Def    Alloc    rcx  │    │I24a│    │    │    │V7 a│V8 a│    │    │
[000119]  71.#100 rcx  Fixd   Keep     rcx  │    │I24a│    │    │    │V7 a│V8 a│    │    │
          71.#101 I24  Use *  Keep     rcx  │    │I24a│    │    │    │V7 a│V8 a│    │    │
          72.#102 rcx  Fixd   Keep     rcx  │    │    │    │    │    │V7 a│V8 a│    │    │
          72.#103 I25  Def    Alloc    rcx  │    │I25a│    │    │    │V7 a│V8 a│    │    │
[000072]  74.#104 C26  Def    Alloc    rdx  │    │I25a│C26a│    │    │V7 a│V8 a│    │    │
[000120]  75.#105 rdx  Fixd   Keep     rdx  │    │I25a│C26a│    │    │V7 a│V8 a│    │    │
          75.#106 C26  Use *  Keep     rdx  │    │I25a│C26a│    │    │V7 a│V8 a│    │    │
          76.#107 rdx  Fixd   Keep     rdx  │    │I25a│    │    │    │V7 a│V8 a│    │    │
          76.#108 I27  Def    Alloc    rdx  │    │I25a│I27a│    │    │V7 a│V8 a│    │    │
[000056]  81.#109 rcx  Fixd   Keep     rcx  │    │I25a│I27a│    │    │V7 a│V8 a│    │    │
          81.#110 I25  Use *  Keep     rcx  │    │I25a│I27a│    │    │V7 a│V8 a│    │    │
          81.#111 rdx  Fixd   Keep     rdx  │    │I25a│I27a│    │    │V7 a│V8 a│    │    │
────────────────────────────────────────────┼────┼────┼────┼────┼────┼────┼────┼────┼────┤
TreeID   Loc RP#  Name Type  Action    Reg  │rax │rcx │rdx │rbx │rbp │rsi │rdi │r8  │r9  │
────────────────────────────────────────────┼────┼────┼────┼────┼────┼────┼────┼────┼────┤
          81.#112 I27  Use *  Keep     rdx  │    │I25a│I27a│    │    │V7 a│V8 a│    │    │
          82.#113 rax  Kill   Keep     rax  │    │    │    │    │    │V7 a│V8 a│    │    │
          82.#114 rcx  Kill   Keep     rcx  │    │    │    │    │    │V7 a│V8 a│    │    │
          82.#115 rdx  Kill   Keep     rdx  │    │    │    │    │    │V7 a│V8 a│    │    │
          82.#116 r8   Kill   Keep     r8   │    │    │    │    │    │V7 a│V8 a│    │    │
          82.#117 r9   Kill   Keep     r9   │    │    │    │    │    │V7 a│V8 a│    │    │
          82.#118 r10  Kill   Keep     r10  │    │    │    │    │    │V7 a│V8 a│    │    │
          82.#119 r11  Kill   Keep     r11  │    │    │    │    │    │V7 a│V8 a│    │    │
          82.#120 rax  Fixd   Keep     rax  │    │    │    │    │    │V7 a│V8 a│    │    │
          82.#121 I28  Def    Alloc    rax  │I28a│    │    │    │    │V7 a│V8 a│    │    │
[000063]  83.#122 I28  Use *  Keep     rax  │I28a│    │    │    │    │V7 a│V8 a│    │    │
          84.#123 I29  Def    COVRS(A) rax  │I29a│    │    │    │    │V7 a│V8 a│    │    │
[000095]  85.#124 I29  Use *  Keep     rax  │I29a│    │    │    │    │V7 a│V8 a│    │    │
          86.#125 V9   Def    COVRS(A) rax  │V9 a│    │    │    │    │V7 a│V8 a│    │    │
[000124]  93.#126 r8   Fixd   Keep     r8   │V9 a│    │    │    │    │V7 a│V8 a│    │    │
          93.#127 V7   Use *  Copy     r8   │V9 a│    │    │    │    │V7 a│V8 a│V7 a│    │
          94.#128 r8   Fixd   Keep     r8   │V9 a│    │    │    │    │    │V8 a│    │    │
          94.#129 I30  Def    Alloc    r8   │V9 a│    │    │    │    │    │V8 a│I30a│    │
[000125]  97.#130 r9   Fixd   Keep     r9   │V9 a│    │    │    │    │    │V8 a│I30a│    │
          97.#131 V8   Use *  Copy     r9   │V9 a│    │    │    │    │    │V8 a│I30a│V8 a│
          98.#132 r9   Fixd   Keep     r9   │V9 a│    │    │    │    │    │    │I30a│    │
          98.#133 I31  Def    Alloc    r9   │V9 a│    │    │    │    │    │    │I30a│I31a│
[000126] 101.#134 V9   Use *  Keep     rax  │V9 a│    │    │    │    │    │    │I30a│I31a│
[000048] 104.#135 I32  Def    Alloc    rcx  │    │I32a│    │    │    │    │    │I30a│I31a│
[000127] 105.#136 rcx  Fixd   Keep     rcx  │    │I32a│    │    │    │    │    │I30a│I31a│
         105.#137 I32  Use *  Keep     rcx  │    │I32a│    │    │    │    │    │I30a│I31a│
         106.#138 rcx  Fixd   Keep     rcx  │    │    │    │    │    │    │    │I30a│I31a│
         106.#139 I33  Def    Alloc    rcx  │    │I33a│    │    │    │    │    │I30a│I31a│
[000051] 108.#140 I34  Def    Alloc    rdx  │    │I33a│I34a│    │    │    │    │I30a│I31a│
[000128] 109.#141 rdx  Fixd   Keep     rdx  │    │I33a│I34a│    │    │    │    │I30a│I31a│
         109.#142 I34  Use *  Keep     rdx  │    │I33a│I34a│    │    │    │    │I30a│I31a│
         110.#143 rdx  Fixd   Keep     rdx  │    │I33a│    │    │    │    │    │I30a│I31a│
         110.#144 I35  Def    Alloc    rdx  │    │I33a│I35a│    │    │    │    │I30a│I31a│
[000065] 115.#145 r8   Fixd   Keep     r8   │    │I33a│I35a│    │    │    │    │I30a│I31a│
         115.#146 I30  Use *  Keep     r8   │    │I33a│I35a│    │    │    │    │I30a│I31a│
         115.#147 r9   Fixd   Keep     r9   │    │I33a│I35a│    │    │    │    │I30a│I31a│
         115.#148 I31  Use *  Keep     r9   │    │I33a│I35a│    │    │    │    │I30a│I31a│
         115.#149 rcx  Fixd   Keep     rcx  │    │I33a│I35a│    │    │    │    │I30a│I31a│
         115.#150 I33  Use *  Keep     rcx  │    │I33a│I35a│    │    │    │    │I30a│I31a│
         115.#151 rdx  Fixd   Keep     rdx  │    │I33a│I35a│    │    │    │    │I30a│I31a│
         115.#152 I35  Use *  Keep     rdx  │    │I33a│I35a│    │    │    │    │I30a│I31a│
         116.#153 rax  Kill   Keep     rax  │    │    │    │    │    │    │    │    │    │
         116.#154 rcx  Kill   Keep     rcx  │    │    │    │    │    │    │    │    │    │
         116.#155 rdx  Kill   Keep     rdx  │    │    │    │    │    │    │    │    │    │
         116.#156 r8   Kill   Keep     r8   │    │    │    │    │    │    │    │    │    │
         116.#157 r9   Kill   Keep     r9   │    │    │    │    │    │    │    │    │    │
         116.#158 r10  Kill   Keep     r10  │    │    │    │    │    │    │    │    │    │
         116.#159 r11  Kill   Keep     r11  │    │    │    │    │    │    │    │    │    │

------------
REFPOSITIONS AFTER ALLOCATION: 
------------
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<RefPosition #11  @10  RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last wt=100.00>
<RefPosition #12  @10  RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last wt=100.00>
<RefPosition #13  @10  RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 last wt=100.00>
<RefPosition #14  @10  RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 last wt=100.00>
<RefPosition #15  @10  RefTypeFixedReg <Reg:rax> BB01 regmask=[rax] minReg=1 wt=100.00>
<RefPosition #16  @10  RefTypeDef <Ivl:7> CALL BB01 regmask=[rax] minReg=1 fixed wt=400.00>
<RefPosition #17  @11  RefTypeUse <Ivl:7> BB01 regmask=[rax] minReg=1 last wt=100.00>
<RefPosition #18  @12  RefTypeDef <Ivl:0 V05> STORE_LCL_VAR BB01 regmask=[rsi] minReg=1 wt=400.00>
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<RefPosition #20  @17  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #21  @17  RefTypeUse <Ivl:8> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #22  @18  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #23  @18  RefTypeDef <Ivl:9> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed wt=400.00>
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<RefPosition #25  @21  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #26  @21  RefTypeUse <Ivl:10> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #27  @22  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
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<RefPosition #29  @23  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #30  @23  RefTypeUse <Ivl:9> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #31  @23  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #32  @23  RefTypeUse <Ivl:11> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #33  @24  RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 last wt=100.00>
<RefPosition #34  @24  RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 last wt=100.00>
<RefPosition #35  @24  RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 last wt=100.00>
<RefPosition #36  @24  RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last wt=100.00>
<RefPosition #37  @24  RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last wt=100.00>
<RefPosition #38  @24  RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 last wt=100.00>
<RefPosition #39  @24  RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 last wt=100.00>
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<RefPosition #41  @24  RefTypeDef <Ivl:12> CALL BB01 regmask=[rax] minReg=1 last fixed local wt=400.00>
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<RefPosition #44  @29  RefTypeUse <Ivl:13> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #45  @29  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #46  @29  RefTypeUse <Ivl:0 V05> LCL_VAR BB01 regmask=[rdx] minReg=1 last copy fixed wt=400.00>
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<RefPosition #48  @30  RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 last wt=100.00>
<RefPosition #49  @30  RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 last wt=100.00>
<RefPosition #50  @30  RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last wt=100.00>
<RefPosition #51  @30  RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last wt=100.00>
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<RefPosition #54  @30  RefTypeKill <Reg:mm0> BB01 regmask=[mm0] minReg=1 last wt=100.00>
<RefPosition #55  @30  RefTypeKill <Reg:mm1> BB01 regmask=[mm1] minReg=1 last wt=100.00>
<RefPosition #56  @30  RefTypeKill <Reg:mm2> BB01 regmask=[mm2] minReg=1 last wt=100.00>
<RefPosition #57  @30  RefTypeKill <Reg:mm3> BB01 regmask=[mm3] minReg=1 last wt=100.00>
<RefPosition #58  @30  RefTypeKill <Reg:mm4> BB01 regmask=[mm4] minReg=1 last wt=100.00>
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<RefPosition #61  @35  RefTypeUse <Ivl:14> BB01 regmask=[rcx] minReg=1 last wt=100.00>
<RefPosition #62  @36  RefTypeDef <Ivl:15> IND BB01 regmask=[rcx] minReg=1 wt=400.00>
<RefPosition #63  @37  RefTypeUse <Ivl:15> BB01 regmask=[rcx] minReg=1 last wt=100.00>
<RefPosition #64  @38  RefTypeDef <Ivl:4 V11> STORE_LCL_VAR BB01 regmask=[rcx] minReg=1 wt=300.00>
<RefPosition #65  @47  RefTypeDef <Ivl:16 internal> STORE_BLK BB01 regmask=[rdx] minReg=1 wt=400.00>
<RefPosition #66  @47  RefTypeDef <Ivl:17 internal> STORE_BLK BB01 regmask=[mm0] minReg=1 wt=400.00>
<RefPosition #67  @47  RefTypeUse <Ivl:4 V11> LCL_VAR BB01 regmask=[rcx] minReg=1 wt=300.00>
<RefPosition #68  @47  RefTypeUse <Ivl:16 internal> STORE_BLK BB01 regmask=[rdx] minReg=1 last wt=400.00>
<RefPosition #69  @47  RefTypeUse <Ivl:17 internal> STORE_BLK BB01 regmask=[mm0] minReg=1 last wt=400.00>
<RefPosition #70  @53  RefTypeUse <Ivl:4 V11> LCL_VAR BB01 regmask=[rcx] minReg=1 last wt=300.00>
<RefPosition #71  @54  RefTypeDef <Ivl:18> IND BB01 regmask=[rsi] minReg=1 wt=400.00>
<RefPosition #72  @55  RefTypeUse <Ivl:18> BB01 regmask=[rsi] minReg=1 last wt=100.00>
<RefPosition #73  @56  RefTypeDef <Ivl:1 V07> STORE_LCL_VAR BB01 regmask=[rsi] minReg=1 wt=400.00>
<RefPosition #74  @58  RefTypeDef <Ivl:19> CNS_INT BB01 regmask=[rcx] minReg=1 wt=400.00>
<RefPosition #75  @59  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #76  @59  RefTypeUse <Ivl:19> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #77  @60  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #78  @60  RefTypeDef <Ivl:20> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed wt=400.00>
<RefPosition #79  @62  RefTypeDef <Ivl:21> CNS_INT BB01 regmask=[rdx] minReg=1 wt=400.00>
<RefPosition #80  @63  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #81  @63  RefTypeUse <Ivl:21> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #82  @64  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #83  @64  RefTypeDef <Ivl:22> PUTARG_REG BB01 regmask=[rdx] minReg=1 fixed wt=400.00>
<RefPosition #84  @65  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #85  @65  RefTypeUse <Ivl:20> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #86  @65  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #87  @65  RefTypeUse <Ivl:22> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #88  @66  RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 last wt=100.00>
<RefPosition #89  @66  RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 last wt=100.00>
<RefPosition #90  @66  RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 last wt=100.00>
<RefPosition #91  @66  RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last wt=100.00>
<RefPosition #92  @66  RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last wt=100.00>
<RefPosition #93  @66  RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 last wt=100.00>
<RefPosition #94  @66  RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 last wt=100.00>
<RefPosition #95  @66  RefTypeFixedReg <Reg:rax> BB01 regmask=[rax] minReg=1 wt=100.00>
<RefPosition #96  @66  RefTypeDef <Ivl:23> CALL BB01 regmask=[rax] minReg=1 fixed wt=400.00>
<RefPosition #97  @67  RefTypeUse <Ivl:23> BB01 regmask=[rax] minReg=1 last wt=100.00>
<RefPosition #98  @68  RefTypeDef <Ivl:2 V08> STORE_LCL_VAR BB01 regmask=[rdi] minReg=1 wt=400.00>
<RefPosition #99  @70  RefTypeDef <Ivl:24> LCL_VAR_ADDR BB01 regmask=[rcx] minReg=1 wt=400.00>
<RefPosition #100 @71  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #101 @71  RefTypeUse <Ivl:24> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #102 @72  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #103 @72  RefTypeDef <Ivl:25> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed wt=400.00>
<RefPosition #104 @74  RefTypeDef <Ivl:26> CNS_INT BB01 regmask=[rdx] minReg=1 wt=400.00>
<RefPosition #105 @75  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #106 @75  RefTypeUse <Ivl:26> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #107 @76  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #108 @76  RefTypeDef <Ivl:27> PUTARG_REG BB01 regmask=[rdx] minReg=1 fixed wt=400.00>
<RefPosition #109 @81  RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #110 @81  RefTypeUse <Ivl:25> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #111 @81  RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #112 @81  RefTypeUse <Ivl:27> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #113 @82  RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 last wt=100.00>
<RefPosition #114 @82  RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 last wt=100.00>
<RefPosition #115 @82  RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 last wt=100.00>
<RefPosition #116 @82  RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last wt=100.00>
<RefPosition #117 @82  RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last wt=100.00>
<RefPosition #118 @82  RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 last wt=100.00>
<RefPosition #119 @82  RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 last wt=100.00>
<RefPosition #120 @82  RefTypeFixedReg <Reg:rax> BB01 regmask=[rax] minReg=1 wt=100.00>
<RefPosition #121 @82  RefTypeDef <Ivl:28> CALL BB01 regmask=[rax] minReg=1 fixed wt=400.00>
<RefPosition #122 @83  RefTypeUse <Ivl:28> BB01 regmask=[rax] minReg=1 last regOptional wt=100.00>
<RefPosition #123 @84  RefTypeDef <Ivl:29> CAST BB01 regmask=[rax] minReg=1 wt=400.00>
<RefPosition #124 @85  RefTypeUse <Ivl:29> BB01 regmask=[rax] minReg=1 last wt=100.00>
<RefPosition #125 @86  RefTypeDef <Ivl:3 V09> STORE_LCL_VAR BB01 regmask=[rax] minReg=1 wt=400.00>
<RefPosition #126 @93  RefTypeFixedReg <Reg:r8 > BB01 regmask=[r8] minReg=1 wt=100.00>
<RefPosition #127 @93  RefTypeUse <Ivl:1 V07> LCL_VAR BB01 regmask=[r8] minReg=1 last copy fixed wt=400.00>
<RefPosition #128 @94  RefTypeFixedReg <Reg:r8 > BB01 regmask=[r8] minReg=1 wt=100.00>
<RefPosition #129 @94  RefTypeDef <Ivl:30> PUTARG_REG BB01 regmask=[r8] minReg=1 fixed wt=400.00>
<RefPosition #130 @97  RefTypeFixedReg <Reg:r9 > BB01 regmask=[r9] minReg=1 wt=100.00>
<RefPosition #131 @97  RefTypeUse <Ivl:2 V08> LCL_VAR BB01 regmask=[r9] minReg=1 last copy fixed wt=400.00>
<RefPosition #132 @98  RefTypeFixedReg <Reg:r9 > BB01 regmask=[r9] minReg=1 wt=100.00>
<RefPosition #133 @98  RefTypeDef <Ivl:31> PUTARG_REG BB01 regmask=[r9] minReg=1 fixed wt=400.00>
<RefPosition #134 @101 RefTypeUse <Ivl:3 V09> LCL_VAR BB01 regmask=[rax] minReg=1 last wt=400.00>
<RefPosition #135 @104 RefTypeDef <Ivl:32> LCL_VAR_ADDR BB01 regmask=[rcx] minReg=1 wt=400.00>
<RefPosition #136 @105 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #137 @105 RefTypeUse <Ivl:32> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #138 @106 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #139 @106 RefTypeDef <Ivl:33> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed wt=400.00>
<RefPosition #140 @108 RefTypeDef <Ivl:34> LCL_FLD BB01 regmask=[rdx] minReg=1 wt=400.00>
<RefPosition #141 @109 RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #142 @109 RefTypeUse <Ivl:34> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #143 @110 RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #144 @110 RefTypeDef <Ivl:35> PUTARG_REG BB01 regmask=[rdx] minReg=1 fixed wt=400.00>
<RefPosition #145 @115 RefTypeFixedReg <Reg:r8 > BB01 regmask=[r8] minReg=1 wt=100.00>
<RefPosition #146 @115 RefTypeUse <Ivl:30> BB01 regmask=[r8] minReg=1 last fixed wt=100.00>
<RefPosition #147 @115 RefTypeFixedReg <Reg:r9 > BB01 regmask=[r9] minReg=1 wt=100.00>
<RefPosition #148 @115 RefTypeUse <Ivl:31> BB01 regmask=[r9] minReg=1 last fixed wt=100.00>
<RefPosition #149 @115 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1 wt=100.00>
<RefPosition #150 @115 RefTypeUse <Ivl:33> BB01 regmask=[rcx] minReg=1 last fixed wt=100.00>
<RefPosition #151 @115 RefTypeFixedReg <Reg:rdx> BB01 regmask=[rdx] minReg=1 wt=100.00>
<RefPosition #152 @115 RefTypeUse <Ivl:35> BB01 regmask=[rdx] minReg=1 last fixed wt=100.00>
<RefPosition #153 @116 RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 last wt=100.00>
<RefPosition #154 @116 RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 last wt=100.00>
<RefPosition #155 @116 RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 last wt=100.00>
<RefPosition #156 @116 RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last wt=100.00>
<RefPosition #157 @116 RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last wt=100.00>
<RefPosition #158 @116 RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 last wt=100.00>
<RefPosition #159 @116 RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 last wt=100.00>

VAR REFPOSITIONS AFTER ALLOCATION
--- V00
--- V01
--- V02
--- V03
--- V04
--- V05  (Interval 0)
<RefPosition #18  @12  RefTypeDef <Ivl:0 V05> STORE_LCL_VAR BB01 regmask=[rsi] minReg=1 wt=400.00>
<RefPosition #46  @29  RefTypeUse <Ivl:0 V05> LCL_VAR BB01 regmask=[rdx] minReg=1 last copy fixed wt=400.00>
--- V06
--- V07  (Interval 1)
<RefPosition #73  @56  RefTypeDef <Ivl:1 V07> STORE_LCL_VAR BB01 regmask=[rsi] minReg=1 wt=400.00>
<RefPosition #127 @93  RefTypeUse <Ivl:1 V07> LCL_VAR BB01 regmask=[r8] minReg=1 last copy fixed wt=400.00>
--- V08  (Interval 2)
<RefPosition #98  @68  RefTypeDef <Ivl:2 V08> STORE_LCL_VAR BB01 regmask=[rdi] minReg=1 wt=400.00>
<RefPosition #131 @97  RefTypeUse <Ivl:2 V08> LCL_VAR BB01 regmask=[r9] minReg=1 last copy fixed wt=400.00>
--- V09  (Interval 3)
<RefPosition #125 @86  RefTypeDef <Ivl:3 V09> STORE_LCL_VAR BB01 regmask=[rax] minReg=1 wt=400.00>
<RefPosition #134 @101 RefTypeUse <Ivl:3 V09> LCL_VAR BB01 regmask=[rax] minReg=1 last wt=400.00>
--- V10
--- V11  (Interval 4)
<RefPosition #64  @38  RefTypeDef <Ivl:4 V11> STORE_LCL_VAR BB01 regmask=[rcx] minReg=1 wt=300.00>
<RefPosition #67  @47  RefTypeUse <Ivl:4 V11> LCL_VAR BB01 regmask=[rcx] minReg=1 wt=300.00>
<RefPosition #70  @53  RefTypeUse <Ivl:4 V11> LCL_VAR BB01 regmask=[rcx] minReg=1 last wt=300.00>

Active intervals at end of allocation:

-----------------------
RESOLVING BB BOUNDARIES
-----------------------
Resolution Candidates: {}
Has No Critical Edges

Prior to Resolution

BB01
use: {}
def: {V05 V07 V08 V09 V10 V11}
 in: {}
out: {}
Var=Reg beg of BB01: none
Var=Reg end of BB01: none


RESOLVING EDGES
Trees after linear scan register allocator (LSRA)

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj LIR 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..04C) (return), preds={} succs={}
N003 (???,???) [000108] -----------                            IL_OFFSET void   INLRT @ 0x000[E-] REG NA
N005 (  3, 10) [000000] H----------                    t0 =    CNS_INT(h) long   0x7ff93744e858 class REG rcx $100
                                                            ┌──▌  t0     long   
N007 (???,???) [000113] -----------                  t113 = ▌  PUTARG_REG long   REG rcx
                                                            ┌──▌  t113   long   arg0 in rcx
N009 ( 17, 16) [000001] --C--------                    t1 = ▌  CALL help ref    CORINFO_HELP_NEWSFAST REG rax $180
                                                            ┌──▌  t1     ref    
N011 ( 17, 16) [000003] DA---------                         ▌  STORE_LCL_VAR ref    V05 tmp1         d:2 rsi REG rsi
N013 (???,???) [000109] -----------                            IL_OFFSET void   INLRT @ 0x005[--] REG NA
N015 (  2, 10) [000011] -----------                   t11 =    CNS_INT   long   0x7ff9372b1818 REG rcx $1c0
                                                            ┌──▌  t11    long   
N017 (???,???) [000114] -----------                  t114 = ▌  PUTARG_REG long   REG rcx
N019 (  1,  1) [000012] -----------                   t12 =    CNS_INT   int    5 REG rdx $43
                                                            ┌──▌  t12    int    
N021 (???,???) [000115] -----------                  t115 = ▌  PUTARG_REG int    REG rdx
                                                            ┌──▌  t114   long   arg0 in rcx
                                                            ├──▌  t115   int    arg1 in rdx
N023 ( 17, 18) [000013] H-CXG------                   t13 = ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE REG rax $241
N025 (  1,  1) [000006] -----------                    t6 =    LCL_VAR   ref    V05 tmp1         u:2 rsi (last use) REG rsi $180
N027 (  3, 10) [000007] I----------                    t7 =    CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt] REG rcx $101
                                                            ┌──▌  t7     long   
                                                            ├──▌  t6     ref    
N029 (???,???) [000110] -A--G------                         ▌  STOREIND  ref    REG NA
N031 (???,???) [000111] -----------                            IL_OFFSET void   INLRT @ 0x00A[E-] REG NA
N033 (  3, 10) [000014] I----------                   t14 =    CNS_INT(h) long   0x1a844001eb8 static box ptr REG rcx $103
                                                            ┌──▌  t14    long   
N035 (  5, 12) [000015] #----------                   t15 = ▌  IND       ref    REG rcx $2c0
                                                            ┌──▌  t15    ref    
N037 (  5, 12) [000104] DA---------                         ▌  STORE_LCL_VAR ref    V11 cse1         d:1 rcx REG rcx
N039 (  1,  1) [000105] -----------                  t105 =    LCL_VAR   ref    V11 cse1         u:1 rcx REG rcx $2c0
                                                            ┌──▌  t105   ref    
N041 (  8, 15) [000017] -c---------                   t17 = ▌  LEA(b+8)  byref  REG NA
                                                            ┌──▌  t17    byref  
N043 ( 15, 20) [000023] nc--G------                   t23 = ▌  IND       struct REG NA
N045 (???,???) [000116] Dc---------                  t116 =    LCL_FLD_ADDR byref  V00 loc0         [+0] NA REG NA
                                                            ┌──▌  t116   byref  
                                                            ├──▌  t23    struct 
N047 ( 25, 27) [000025] sA---------                         ▌  STORE_BLK struct<S0, 24> (copy) (Unroll) REG NA
N049 (  1,  1) [000107] -----------                  t107 =    LCL_VAR   ref    V11 cse1         u:1 rcx (last use) REG rcx $2c0
                                                            ┌──▌  t107   ref    
N051 (  2,  2) [000033] -c---------                   t33 = ▌  LEA(b+12) byref  REG NA
                                                            ┌──▌  t33    byref  
N053 (  4,  4) [000087] n---G------                   t87 = ▌  IND       int    REG rsi <l:$400, c:$82>
                                                            ┌──▌  t87    int    
N055 (  5,  5) [000089] DA--G------                         ▌  STORE_LCL_VAR int    V07 tmp3         d:2 rsi REG rsi
N057 (  3, 10) [000044] H----------                   t44 =    CNS_INT(h) long   0x7ff93744e2d8 class REG rcx $107
                                                            ┌──▌  t44    long   
N059 (???,???) [000117] -----------                  t117 = ▌  PUTARG_REG long   REG rcx
N061 (  1,  1) [000043] -----------                   t43 =    CNS_INT   long   1 REG rdx $1c7
                                                            ┌──▌  t43    long   
N063 (???,???) [000118] -----------                  t118 = ▌  PUTARG_REG long   REG rdx
                                                            ┌──▌  t117   long   arg0 in rcx
                                                            ├──▌  t118   long   arg1 in rdx
N065 ( 18, 18) [000045] --CXG------                   t45 = ▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC REG rax $184
                                                            ┌──▌  t45    ref    
N067 ( 18, 18) [000092] DA-XG------                         ▌  STORE_LCL_VAR ref    V08 tmp4         d:2 rdi REG rdi
N069 (  3,  3) [000058] -----------                   t58 =    LCL_VAR_ADDR long   V00 loc0          rcx REG rcx $341
                                                            ┌──▌  t58    long   
N071 (???,???) [000119] -----------                  t119 = ▌  PUTARG_REG long   REG rcx
N073 (  1,  1) [000072] -----------                   t72 =    CNS_INT   int    0 REG rdx $44
                                                            ┌──▌  t72    int    
N075 (???,???) [000120] -----------                  t120 = ▌  PUTARG_REG int    REG rdx
N077 (  3, 10) [000121] Hc---------                  t121 =    CNS_INT(h) long   0x7ff93727bac8 ftn REG NA
                                                            ┌──▌  t121   long   
N079 (  5, 12) [000122] -c---------                  t122 = ▌  IND       long   REG NA
                                                            ┌──▌  t119   long   arg0 in rcx
                                                            ├──▌  t120   int    arg1 in rdx
                                                            ├──▌  t122   long   control expr
N081 ( 18, 11) [000056] --CXG------                   t56 = ▌  CALL      long   Program:M23(S0,ushort):ulong REG rax $440
                                                            ┌──▌  t56    long   
N083 ( 19, 13) [000063] ---XG------                   t63 = ▌  CAST      int <- byte <- long REG rax $403
                                                            ┌──▌  t63    int    
N085 ( 19, 13) [000095] DA-XG------                         ▌  STORE_LCL_VAR int    V09 tmp5         d:2 rax REG rax
N087 (  1,  1) [000075] -c---------                   t75 =    CNS_INT   int    1 REG NA $46
                                                            ┌──▌  t75    int    
N089 (???,???) [000123] -----------                         ▌  PUTARG_STK [+0x28] void   REG NA
N091 (  1,  1) [000090] -----------                   t90 =    LCL_VAR   int    V07 tmp3         u:2 rsi (last use) REG rsi <l:$400, c:$82>
                                                            ┌──▌  t90    int    
N093 (???,???) [000124] -----------                  t124 = ▌  PUTARG_REG int    REG r8
N095 (  1,  1) [000093] -----------                   t93 =    LCL_VAR   ref    V08 tmp4         u:2 rdi (last use) REG rdi $2c1
                                                            ┌──▌  t93    ref    
N097 (???,???) [000125] -----------                  t125 = ▌  PUTARG_REG ref    REG r9
N099 (  1,  1) [000096] -----------                   t96 =    LCL_VAR   int    V09 tmp5         u:2 rax (last use) REG rax $403
                                                            ┌──▌  t96    int    
N101 (???,???) [000126] -----------                         ▌  PUTARG_STK [+0x20] void   REG NA
N103 (  3,  3) [000048] -----------                   t48 =    LCL_VAR_ADDR long   V01 loc1          rcx REG rcx $342
                                                            ┌──▌  t48    long   
N105 (???,???) [000127] -----------                  t127 = ▌  PUTARG_REG long   REG rcx
N107 (  4,  5) [000051] -----------                   t51 =    LCL_FLD   ubyte (AX) V00 loc0         [+0] rdx REG rdx <l:$480, c:$4c0>
                                                            ┌──▌  t51    ubyte  
N109 (???,???) [000128] -----------                  t128 = ▌  PUTARG_REG int    REG rdx
N111 (  3, 10) [000129] Hc---------                  t129 =    CNS_INT(h) long   0x7ff93727bae0 ftn REG NA
                                                            ┌──▌  t129   long   
N113 (  5, 12) [000130] -c---------                  t130 = ▌  IND       long   REG NA
                                                            ┌──▌  t124   int    arg2 in r8
                                                            ├──▌  t125   ref    arg3 in r9
                                                            ├──▌  t127   long   arg0 in rcx
                                                            ├──▌  t128   int    arg1 in rdx
                                                            ├──▌  t130   long   control expr
N115 ( 79, 58) [000065] --CXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort) REG NA $VN.Void
N117 (???,???) [000112] -----------                            IL_OFFSET void   INLRT @ 0x04B[E-] REG NA
N119 (  0,  0) [000068] -----------                            RETURN    void   REG NA $VN.Void

-------------------------------------------------------------------------------------------------------------------

Final allocation
────────────────────────────────────────────┼────┼────┼────┼────┼────┼────┼────┼────┼────┤
TreeID   Loc RP#  Name Type  Action    Reg  │rax │rcx │rdx │rbx │rbp │rsi │rdi │r8  │r9  │
────────────────────────────────────────────┼────┼────┼────┼────┼────┼────┼────┼────┼────┤
           1.#0   BB1 PredBB0               │    │    │    │    │    │    │    │    │    │
[000000]   6.#1   C5   Def    Alloc    rcx  │    │C5 a│    │    │    │    │    │    │    │
[000113]   7.#2   rcx  Fixd   Keep     rcx  │    │C5 a│    │    │    │    │    │    │    │
           7.#3   C5   Use *  Keep     rcx  │    │C5 i│    │    │    │    │    │    │    │
           8.#4   rcx  Fixd   Keep     rcx  │    │    │    │    │    │    │    │    │    │
           8.#5   I6   Def    Alloc    rcx  │    │I6 a│    │    │    │    │    │    │    │
[000001]   9.#6   rcx  Fixd   Keep     rcx  │    │I6 a│    │    │    │    │    │    │    │
           9.#7   I6   Use *  Keep     rcx  │    │I6 i│    │    │    │    │    │    │    │
          10.#8   rax  Kill   Keep     rax  │    │    │    │    │    │    │    │    │    │
          10.#9   rcx  Kill   Keep     rcx  │    │    │    │    │    │    │    │    │    │
          10.#10  rdx  Kill   Keep     rdx  │    │    │    │    │    │    │    │    │    │
          10.#11  r8   Kill   Keep     r8   │    │    │    │    │    │    │    │    │    │
          10.#12  r9   Kill   Keep     r9   │    │    │    │    │    │    │    │    │    │
          10.#13  r10  Kill   Keep     r10  │    │    │    │    │    │    │    │    │    │
          10.#14  r11  Kill   Keep     r11  │    │    │    │    │    │    │    │    │    │
          10.#15  rax  Fixd   Keep     rax  │    │    │    │    │    │    │    │    │    │
          10.#16  I7   Def    Alloc    rax  │I7 a│    │    │    │    │    │    │    │    │
[000003]  11.#17  I7   Use *  Keep     rax  │I7 i│    │    │    │    │    │    │    │    │
          12.#18  V5   Def    Alloc    rsi  │    │    │    │    │    │V5 a│    │    │    │
[000011]  16.#19  C8   Def    Alloc    rcx  │    │C8 a│    │    │    │V5 a│    │    │    │
[000114]  17.#20  rcx  Fixd   Keep     rcx  │    │C8 a│    │    │    │V5 a│    │    │    │
          17.#21  C8   Use *  Keep     rcx  │    │C8 i│    │    │    │V5 a│    │    │    │
          18.#22  rcx  Fixd   Keep     rcx  │    │    │    │    │    │V5 a│    │    │    │
          18.#23  I9   Def    Alloc    rcx  │    │I9 a│    │    │    │V5 a│    │    │    │
[000012]  20.#24  C10  Def    Alloc    rdx  │    │I9 a│C10a│    │    │V5 a│    │    │    │
[000115]  21.#25  rdx  Fixd   Keep     rdx  │    │I9 a│C10a│    │    │V5 a│    │    │    │
          21.#26  C10  Use *  Keep     rdx  │    │I9 a│C10i│    │    │V5 a│    │    │    │
          22.#27  rdx  Fixd   Keep     rdx  │    │I9 a│    │    │    │V5 a│    │    │    │
          22.#28  I11  Def    Alloc    rdx  │    │I9 a│I11a│    │    │V5 a│    │    │    │
[000013]  23.#29  rcx  Fixd   Keep     rcx  │    │I9 a│I11a│    │    │V5 a│    │    │    │
          23.#30  I9   Use *  Keep     rcx  │    │I9 i│I11a│    │    │V5 a│    │    │    │
          23.#31  rdx  Fixd   Keep     rdx  │    │    │I11a│    │    │V5 a│    │    │    │
          23.#32  I11  Use *  Keep     rdx  │    │    │I11i│    │    │V5 a│    │    │    │
          24.#33  rax  Kill   Keep     rax  │    │    │    │    │    │V5 a│    │    │    │
          24.#34  rcx  Kill   Keep     rcx  │    │    │    │    │    │V5 a│    │    │    │
          24.#35  rdx  Kill   Keep     rdx  │    │    │    │    │    │V5 a│    │    │    │
          24.#36  r8   Kill   Keep     r8   │    │    │    │    │    │V5 a│    │    │    │
          24.#37  r9   Kill   Keep     r9   │    │    │    │    │    │V5 a│    │    │    │
          24.#38  r10  Kill   Keep     r10  │    │    │    │    │    │V5 a│    │    │    │
          24.#39  r11  Kill   Keep     r11  │    │    │    │    │    │V5 a│    │    │    │
          24.#40  rax  Fixd   Keep     rax  │    │    │    │    │    │V5 a│    │    │    │
          24.#41  I12  Def *  Alloc    rax  │I12i│    │    │    │    │V5 a│    │    │    │
[000007]  28.#42  C13  Def    Alloc    rcx  │    │C13a│    │    │    │V5 a│    │    │    │
[000110]  29.#43  rcx  Fixd   Keep     rcx  │    │C13a│    │    │    │V5 a│    │    │    │
          29.#44  C13  Use *  Keep     rcx  │    │C13i│    │    │    │V5 a│    │    │    │
          29.#45  rdx  Fixd   Keep     rdx  │    │    │    │    │    │V5 a│    │    │    │
          29.#46  V5   Use *  Copy     rdx  │    │    │V5 i│    │    │V5 i│    │    │    │
          30.#47  rax  Kill   Keep     rax  │    │    │    │    │    │    │    │    │    │
          30.#48  rcx  Kill   Keep     rcx  │    │    │    │    │    │    │    │    │    │
          30.#49  rdx  Kill   Keep     rdx  │    │    │    │    │    │    │    │    │    │
          30.#50  r8   Kill   Keep     r8   │    │    │    │    │    │    │    │    │    │
          30.#51  r9   Kill   Keep     r9   │    │    │    │    │    │    │    │    │    │
          30.#52  r10  Kill   Keep     r10  │    │    │    │    │    │    │    │    │    │
          30.#53  r11  Kill   Keep     r11  │    │    │    │    │    │    │    │    │    │
          30.#54  mm0  Kill   Keep     mm0  │    │    │    │    │    │    │    │    │    │
          30.#55  mm1  Kill   Keep     mm1  │    │    │    │    │    │    │    │    │    │
          30.#56  mm2  Kill   Keep     mm2  │    │    │    │    │    │    │    │    │    │
          30.#57  mm3  Kill   Keep     mm3  │    │    │    │    │    │    │    │    │    │
          30.#58  mm4  Kill   Keep     mm4  │    │    │    │    │    │    │    │    │    │
          30.#59  mm5  Kill   Keep     mm5  │    │    │    │    │    │    │    │    │    │
[000014]  34.#60  C14  Def    Alloc    rcx  │    │C14a│    │    │    │    │    │    │    │
[000015]  35.#61  C14  Use *  Keep     rcx  │    │C14i│    │    │    │    │    │    │    │
          36.#62  I15  Def    Alloc    rcx  │    │I15a│    │    │    │    │    │    │    │
[000104]  37.#63  I15  Use *  Keep     rcx  │    │I15i│    │    │    │    │    │    │    │
          38.#64  V11  Def    Alloc    rcx  │    │V11a│    │    │    │    │    │    │    │
[000025]  47.#65  I16  Def    Alloc    rdx  │    │V11a│I16a│    │    │    │    │    │    │
          47.#66  I17  Def    Alloc    mm0  │    │V11a│I16a│    │    │    │    │    │    │
          47.#67  V11  Use    Keep     rcx  │    │V11a│I16a│    │    │    │    │    │    │
          47.#68  I16  Use *  Keep     rdx  │    │V11a│I16i│    │    │    │    │    │    │
          47.#69  I17  Use *  Keep     mm0  │    │V11a│    │    │    │    │    │    │    │
[000087]  53.#70  V11  Use *  Keep     rcx  │    │V11i│    │    │    │    │    │    │    │
          54.#71  I18  Def    Alloc    rsi  │    │    │    │    │    │I18a│    │    │    │
[000089]  55.#72  I18  Use *  Keep     rsi  │    │    │    │    │    │I18i│    │    │    │
          56.#73  V7   Def    Alloc    rsi  │    │    │    │    │    │V7 a│    │    │    │
[000044]  58.#74  C19  Def    Alloc    rcx  │    │C19a│    │    │    │V7 a│    │    │    │
[000117]  59.#75  rcx  Fixd   Keep     rcx  │    │C19a│    │    │    │V7 a│    │    │    │
          59.#76  C19  Use *  Keep     rcx  │    │C19i│    │    │    │V7 a│    │    │    │
          60.#77  rcx  Fixd   Keep     rcx  │    │    │    │    │    │V7 a│    │    │    │
          60.#78  I20  Def    Alloc    rcx  │    │I20a│    │    │    │V7 a│    │    │    │
[000043]  62.#79  C21  Def    Alloc    rdx  │    │I20a│C21a│    │    │V7 a│    │    │    │
[000118]  63.#80  rdx  Fixd   Keep     rdx  │    │I20a│C21a│    │    │V7 a│    │    │    │
          63.#81  C21  Use *  Keep     rdx  │    │I20a│C21i│    │    │V7 a│    │    │    │
          64.#82  rdx  Fixd   Keep     rdx  │    │I20a│    │    │    │V7 a│    │    │    │
          64.#83  I22  Def    Alloc    rdx  │    │I20a│I22a│    │    │V7 a│    │    │    │
[000045]  65.#84  rcx  Fixd   Keep     rcx  │    │I20a│I22a│    │    │V7 a│    │    │    │
          65.#85  I20  Use *  Keep     rcx  │    │I20i│I22a│    │    │V7 a│    │    │    │
          65.#86  rdx  Fixd   Keep     rdx  │    │    │I22a│    │    │V7 a│    │    │    │
          65.#87  I22  Use *  Keep     rdx  │    │    │I22i│    │    │V7 a│    │    │    │
          66.#88  rax  Kill   Keep     rax  │    │    │    │    │    │V7 a│    │    │    │
          66.#89  rcx  Kill   Keep     rcx  │    │    │    │    │    │V7 a│    │    │    │
          66.#90  rdx  Kill   Keep     rdx  │    │    │    │    │    │V7 a│    │    │    │
          66.#91  r8   Kill   Keep     r8   │    │    │    │    │    │V7 a│    │    │    │
          66.#92  r9   Kill   Keep     r9   │    │    │    │    │    │V7 a│    │    │    │
          66.#93  r10  Kill   Keep     r10  │    │    │    │    │    │V7 a│    │    │    │
          66.#94  r11  Kill   Keep     r11  │    │    │    │    │    │V7 a│    │    │    │
          66.#95  rax  Fixd   Keep     rax  │    │    │    │    │    │V7 a│    │    │    │
          66.#96  I23  Def    Alloc    rax  │I23a│    │    │    │    │V7 a│    │    │    │
[000092]  67.#97  I23  Use *  Keep     rax  │I23i│    │    │    │    │V7 a│    │    │    │
          68.#98  V8   Def    Alloc    rdi  │    │    │    │    │    │V7 a│V8 a│    │    │
[000058]  70.#99  I24  Def    Alloc    rcx  │    │I24a│    │    │    │V7 a│V8 a│    │    │
[000119]  71.#100 rcx  Fixd   Keep     rcx  │    │I24a│    │    │    │V7 a│V8 a│    │    │
          71.#101 I24  Use *  Keep     rcx  │    │I24i│    │    │    │V7 a│V8 a│    │    │
          72.#102 rcx  Fixd   Keep     rcx  │    │    │    │    │    │V7 a│V8 a│    │    │
          72.#103 I25  Def    Alloc    rcx  │    │I25a│    │    │    │V7 a│V8 a│    │    │
[000072]  74.#104 C26  Def    Alloc    rdx  │    │I25a│C26a│    │    │V7 a│V8 a│    │    │
[000120]  75.#105 rdx  Fixd   Keep     rdx  │    │I25a│C26a│    │    │V7 a│V8 a│    │    │
          75.#106 C26  Use *  Keep     rdx  │    │I25a│C26i│    │    │V7 a│V8 a│    │    │
          76.#107 rdx  Fixd   Keep     rdx  │    │I25a│    │    │    │V7 a│V8 a│    │    │
          76.#108 I27  Def    Alloc    rdx  │    │I25a│I27a│    │    │V7 a│V8 a│    │    │
[000056]  81.#109 rcx  Fixd   Keep     rcx  │    │I25a│I27a│    │    │V7 a│V8 a│    │    │
          81.#110 I25  Use *  Keep     rcx  │    │I25i│I27a│    │    │V7 a│V8 a│    │    │
          81.#111 rdx  Fixd   Keep     rdx  │    │    │I27a│    │    │V7 a│V8 a│    │    │
          81.#112 I27  Use *  Keep     rdx  │    │    │I27i│    │    │V7 a│V8 a│    │    │
          82.#113 rax  Kill   Keep     rax  │    │    │    │    │    │V7 a│V8 a│    │    │
          82.#114 rcx  Kill   Keep     rcx  │    │    │    │    │    │V7 a│V8 a│    │    │
          82.#115 rdx  Kill   Keep     rdx  │    │    │    │    │    │V7 a│V8 a│    │    │
          82.#116 r8   Kill   Keep     r8   │    │    │    │    │    │V7 a│V8 a│    │    │
          82.#117 r9   Kill   Keep     r9   │    │    │    │    │    │V7 a│V8 a│    │    │
          82.#118 r10  Kill   Keep     r10  │    │    │    │    │    │V7 a│V8 a│    │    │
          82.#119 r11  Kill   Keep     r11  │    │    │    │    │    │V7 a│V8 a│    │    │
          82.#120 rax  Fixd   Keep     rax  │    │    │    │    │    │V7 a│V8 a│    │    │
          82.#121 I28  Def    Alloc    rax  │I28a│    │    │    │    │V7 a│V8 a│    │    │
[000063]  83.#122 I28  Use *  Keep     rax  │I28i│    │    │    │    │V7 a│V8 a│    │    │
          84.#123 I29  Def    Alloc    rax  │I29a│    │    │    │    │V7 a│V8 a│    │    │
[000095]  85.#124 I29  Use *  Keep     rax  │I29i│    │    │    │    │V7 a│V8 a│    │    │
          86.#125 V9   Def    Alloc    rax  │V9 a│    │    │    │    │V7 a│V8 a│    │    │
[000124]  93.#126 r8   Fixd   Keep     r8   │V9 a│    │    │    │    │V7 a│V8 a│    │    │
────────────────────────────────────────────┼────┼────┼────┼────┼────┼────┼────┼────┼────┤
TreeID   Loc RP#  Name Type  Action    Reg  │rax │rcx │rdx │rbx │rbp │rsi │rdi │r8  │r9  │
────────────────────────────────────────────┼────┼────┼────┼────┼────┼────┼────┼────┼────┤
          93.#127 V7   Use *  Copy     r8   │V9 a│    │    │    │    │V7 i│V8 a│V7 i│    │
          94.#128 r8   Fixd   Keep     r8   │V9 a│    │    │    │    │    │V8 a│    │    │
          94.#129 I30  Def    Alloc    r8   │V9 a│    │    │    │    │    │V8 a│I30a│    │
[000125]  97.#130 r9   Fixd   Keep     r9   │V9 a│    │    │    │    │    │V8 a│I30a│    │
          97.#131 V8   Use *  Copy     r9   │V9 a│    │    │    │    │    │V8 i│I30a│V8 i│
          98.#132 r9   Fixd   Keep     r9   │V9 a│    │    │    │    │    │    │I30a│    │
          98.#133 I31  Def    Alloc    r9   │V9 a│    │    │    │    │    │    │I30a│I31a│
[000126] 101.#134 V9   Use *  Keep     rax  │V9 i│    │    │    │    │    │    │I30a│I31a│
[000048] 104.#135 I32  Def    Alloc    rcx  │    │I32a│    │    │    │    │    │I30a│I31a│
[000127] 105.#136 rcx  Fixd   Keep     rcx  │    │I32a│    │    │    │    │    │I30a│I31a│
         105.#137 I32  Use *  Keep     rcx  │    │I32i│    │    │    │    │    │I30a│I31a│
         106.#138 rcx  Fixd   Keep     rcx  │    │    │    │    │    │    │    │I30a│I31a│
         106.#139 I33  Def    Alloc    rcx  │    │I33a│    │    │    │    │    │I30a│I31a│
[000051] 108.#140 I34  Def    Alloc    rdx  │    │I33a│I34a│    │    │    │    │I30a│I31a│
[000128] 109.#141 rdx  Fixd   Keep     rdx  │    │I33a│I34a│    │    │    │    │I30a│I31a│
         109.#142 I34  Use *  Keep     rdx  │    │I33a│I34i│    │    │    │    │I30a│I31a│
         110.#143 rdx  Fixd   Keep     rdx  │    │I33a│    │    │    │    │    │I30a│I31a│
         110.#144 I35  Def    Alloc    rdx  │    │I33a│I35a│    │    │    │    │I30a│I31a│
[000065] 115.#145 r8   Fixd   Keep     r8   │    │I33a│I35a│    │    │    │    │I30a│I31a│
         115.#146 I30  Use *  Keep     r8   │    │I33a│I35a│    │    │    │    │I30i│I31a│
         115.#147 r9   Fixd   Keep     r9   │    │I33a│I35a│    │    │    │    │    │I31a│
         115.#148 I31  Use *  Keep     r9   │    │I33a│I35a│    │    │    │    │    │I31i│
         115.#149 rcx  Fixd   Keep     rcx  │    │I33a│I35a│    │    │    │    │    │    │
         115.#150 I33  Use *  Keep     rcx  │    │I33i│I35a│    │    │    │    │    │    │
         115.#151 rdx  Fixd   Keep     rdx  │    │    │I35a│    │    │    │    │    │    │
         115.#152 I35  Use *  Keep     rdx  │    │    │I35i│    │    │    │    │    │    │
         116.#153 rax  Kill   Keep     rax  │    │    │    │    │    │    │    │    │    │
         116.#154 rcx  Kill   Keep     rcx  │    │    │    │    │    │    │    │    │    │
         116.#155 rdx  Kill   Keep     rdx  │    │    │    │    │    │    │    │    │    │
         116.#156 r8   Kill   Keep     r8   │    │    │    │    │    │    │    │    │    │
         116.#157 r9   Kill   Keep     r9   │    │    │    │    │    │    │    │    │    │
         116.#158 r10  Kill   Keep     r10  │    │    │    │    │    │    │    │    │    │
         116.#159 r11  Kill   Keep     r11  │    │    │    │    │    │    │    │    │    │

Recording the maximum number of concurrent spills:

----------
LSRA Stats
----------
Register selection order: ABCDEFGHIJKLMNOPQ
Total Tracked Vars:  6
Total Reg Cand Vars: 5
Total number of Intervals: 35
Total number of RefPositions: 159
Total Number of spill temps created: 0
..........
BB01 [  100.00]: COVERS = 4, BEST_FIT = 3, REG_ORDER = 4
..........
Total SpillCount : 0   Weighted: 0.000000
Total CopyReg : 0   Weighted: 0.000000
Total ResolutionMovs : 0   Weighted: 0.000000
Total SplitEdges : 0   Weighted: 0.000000
..........
Total COVERS [# 4] : 4   Weighted: 400.000000
Total BEST_FIT [#11] : 3   Weighted: 300.000000
Total REG_ORDER [#13] : 4   Weighted: 400.000000

TUPLE STYLE DUMP WITH REGISTER ASSIGNMENTS
Incoming Parameters: 
BB01 [000..04C) (return), preds={} succs={}
=====
  N003.                    IL_OFFSET INLRT @ 0x000[E-]
  N005. rcx             =  CNS_INT(h) 0x7ff93744e858 class
  N007. rcx             =  PUTARG_REG; rcx
  N009. rax             =  CALL help; rcx
* N011.                    V05(rsi); rax
  N013.                    IL_OFFSET INLRT @ 0x005[--]
  N015. rcx             =  CNS_INT   0x7ff9372b1818
  N017. rcx             =  PUTARG_REG; rcx
  N019. rdx             =  CNS_INT   5
  N021. rdx             =  PUTARG_REG; rdx
* N023. rax             =  CALL help; rcx,rdx
  N025.                    V05(rsi*)
  N027. rcx             =  CNS_INT(h) 0x1a844001ec8 static Fseq[s_rt]
  N029.                    STOREIND ; rcx,rsi*
  N031.                    IL_OFFSET INLRT @ 0x00A[E-]
  N033. rcx             =  CNS_INT(h) 0x1a844001eb8 static box ptr
  N035. rcx             =  IND      ; rcx
* N037.                    V11(rcx); rcx
  N039.                    V11(rcx)
  N041. STK             =  LEA(b+8) ; rcx
  N043. STK             =  IND      ; STK
  N045.                    LCL_FLD_ADDR V00 loc0         [+0] NA
  N047.                    STORE_BLK; STK
  N049.                    V11(rcx*)
  N051. STK             =  LEA(b+12); rcx*
  N053. rsi             =  IND      ; STK
* N055.                    V07(rsi); rsi
  N057. rcx             =  CNS_INT(h) 0x7ff93744e2d8 class
  N059. rcx             =  PUTARG_REG; rcx
  N061. rdx             =  CNS_INT   1
  N063. rdx             =  PUTARG_REG; rdx
  N065. rax             =  CALL help; rcx,rdx
* N067.                    V08(rdi); rax
  N069. rcx             =  LCL_VAR_ADDR V00 loc0          rcx
  N071. rcx             =  PUTARG_REG; rcx
  N073. rdx             =  CNS_INT   0
  N075. rdx             =  PUTARG_REG; rdx
  N077.                    CNS_INT(h) 0x7ff93727bac8 ftn
  N079.                    IND      
  N081. rax             =  CALL     ; rcx,rdx
  N083. rax             =  CAST     ; rax
* N085.                    V09(rax); rax
  N087.                    CNS_INT   1
  N089.                    PUTARG_STK [+0x28]
  N091.                    V07(rsi*)
  N093. r8              =  PUTARG_REG; rsi*
  N095.                    V08(rdi*)
  N097. r9              =  PUTARG_REG; rdi*
  N099.                    V09(rax*)
  N101.                    PUTARG_STK [+0x20]; rax*
  N103. rcx             =  LCL_VAR_ADDR V01 loc1          rcx
  N105. rcx             =  PUTARG_REG; rcx
  N107. rdx             =  V00 MEM
  N109. rdx             =  PUTARG_REG; rdx
  N111.                    CNS_INT(h) 0x7ff93727bae0 ftn
  N113.                    IND      
  N115.                    CALL     ; r8,r9,rcx,rdx
  N117.                    IL_OFFSET INLRT @ 0x04B[E-]
  N119.                    RETURN   
Var=Reg end of BB01: none




*************** Finishing PHASE Linear scan register alloc
Trees after Linear scan register alloc

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj LIR 
-----------------------------------------------------------------------------------------------------------------------------------------

------------ BB01 [000..04C) (return), preds={} succs={}
N003 (???,???) [000108] -----------                            IL_OFFSET void   INLRT @ 0x000[E-] REG NA
N005 (  3, 10) [000000] H----------                    t0 =    CNS_INT(h) long   0x7ff93744e858 class REG rcx $100
                                                            ┌──▌  t0     long   
N007 (???,???) [000113] -----------                  t113 = ▌  PUTARG_REG long   REG rcx
                                                            ┌──▌  t113   long   arg0 in rcx
N009 ( 17, 16) [000001] --C--------                    t1 = ▌  CALL help ref    CORINFO_HELP_NEWSFAST REG rax $180
                                                            ┌──▌  t1     ref    
N011 ( 17, 16) [000003] DA---------                         ▌  STORE_LCL_VAR ref    V05 tmp1         d:2 rsi REG rsi
N013 (???,???) [000109] -----------                            IL_OFFSET void   INLRT @ 0x005[--] REG NA
N015 (  2, 10) [000011] -----------                   t11 =    CNS_INT   long   0x7ff9372b1818 REG rcx $1c0
                                                            ┌──▌  t11    long   
N017 (???,???) [000114] -----------                  t114 = ▌  PUTARG_REG long   REG rcx
N019 (  1,  1) [000012] -----------                   t12 =    CNS_INT   int    5 REG rdx $43
                                                            ┌──▌  t12    int    
N021 (???,???) [000115] -----------                  t115 = ▌  PUTARG_REG int    REG rdx
                                                            ┌──▌  t114   long   arg0 in rcx
                                                            ├──▌  t115   int    arg1 in rdx
N023 ( 17, 18) [000013] H-CXG------                   t13 = ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE REG rax $241
N025 (  1,  1) [000006] -----------                    t6 =    LCL_VAR   ref    V05 tmp1         u:2 rsi (last use) REG rsi $180
N027 (  3, 10) [000007] I----------                    t7 =    CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt] REG rcx $101
                                                            ┌──▌  t7     long   
                                                            ├──▌  t6     ref    
N029 (???,???) [000110] -A--G------                         ▌  STOREIND  ref    REG NA
N031 (???,???) [000111] -----------                            IL_OFFSET void   INLRT @ 0x00A[E-] REG NA
N033 (  3, 10) [000014] I----------                   t14 =    CNS_INT(h) long   0x1a844001eb8 static box ptr REG rcx $103
                                                            ┌──▌  t14    long   
N035 (  5, 12) [000015] #----------                   t15 = ▌  IND       ref    REG rcx $2c0
                                                            ┌──▌  t15    ref    
N037 (  5, 12) [000104] DA---------                         ▌  STORE_LCL_VAR ref    V11 cse1         d:1 rcx REG rcx
N039 (  1,  1) [000105] -----------                  t105 =    LCL_VAR   ref    V11 cse1         u:1 rcx REG rcx $2c0
                                                            ┌──▌  t105   ref    
N041 (  8, 15) [000017] -c---------                   t17 = ▌  LEA(b+8)  byref  REG NA
                                                            ┌──▌  t17    byref  
N043 ( 15, 20) [000023] nc--G------                   t23 = ▌  IND       struct REG NA
N045 (???,???) [000116] Dc---------                  t116 =    LCL_FLD_ADDR byref  V00 loc0         [+0] NA REG NA
                                                            ┌──▌  t116   byref  
                                                            ├──▌  t23    struct 
N047 ( 25, 27) [000025] sA---------                         ▌  STORE_BLK struct<S0, 24> (copy) (Unroll) REG NA
N049 (  1,  1) [000107] -----------                  t107 =    LCL_VAR   ref    V11 cse1         u:1 rcx (last use) REG rcx $2c0
                                                            ┌──▌  t107   ref    
N051 (  2,  2) [000033] -c---------                   t33 = ▌  LEA(b+12) byref  REG NA
                                                            ┌──▌  t33    byref  
N053 (  4,  4) [000087] n---G------                   t87 = ▌  IND       int    REG rsi <l:$400, c:$82>
                                                            ┌──▌  t87    int    
N055 (  5,  5) [000089] DA--G------                         ▌  STORE_LCL_VAR int    V07 tmp3         d:2 rsi REG rsi
N057 (  3, 10) [000044] H----------                   t44 =    CNS_INT(h) long   0x7ff93744e2d8 class REG rcx $107
                                                            ┌──▌  t44    long   
N059 (???,???) [000117] -----------                  t117 = ▌  PUTARG_REG long   REG rcx
N061 (  1,  1) [000043] -----------                   t43 =    CNS_INT   long   1 REG rdx $1c7
                                                            ┌──▌  t43    long   
N063 (???,???) [000118] -----------                  t118 = ▌  PUTARG_REG long   REG rdx
                                                            ┌──▌  t117   long   arg0 in rcx
                                                            ├──▌  t118   long   arg1 in rdx
N065 ( 18, 18) [000045] --CXG------                   t45 = ▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC REG rax $184
                                                            ┌──▌  t45    ref    
N067 ( 18, 18) [000092] DA-XG------                         ▌  STORE_LCL_VAR ref    V08 tmp4         d:2 rdi REG rdi
N069 (  3,  3) [000058] -----------                   t58 =    LCL_VAR_ADDR long   V00 loc0          rcx REG rcx $341
                                                            ┌──▌  t58    long   
N071 (???,???) [000119] -----------                  t119 = ▌  PUTARG_REG long   REG rcx
N073 (  1,  1) [000072] -----------                   t72 =    CNS_INT   int    0 REG rdx $44
                                                            ┌──▌  t72    int    
N075 (???,???) [000120] -----------                  t120 = ▌  PUTARG_REG int    REG rdx
N077 (  3, 10) [000121] Hc---------                  t121 =    CNS_INT(h) long   0x7ff93727bac8 ftn REG NA
                                                            ┌──▌  t121   long   
N079 (  5, 12) [000122] -c---------                  t122 = ▌  IND       long   REG NA
                                                            ┌──▌  t119   long   arg0 in rcx
                                                            ├──▌  t120   int    arg1 in rdx
                                                            ├──▌  t122   long   control expr
N081 ( 18, 11) [000056] --CXG------                   t56 = ▌  CALL      long   Program:M23(S0,ushort):ulong REG rax $440
                                                            ┌──▌  t56    long   
N083 ( 19, 13) [000063] ---XG------                   t63 = ▌  CAST      int <- byte <- long REG rax $403
                                                            ┌──▌  t63    int    
N085 ( 19, 13) [000095] DA-XG------                         ▌  STORE_LCL_VAR int    V09 tmp5         d:2 rax REG rax
N087 (  1,  1) [000075] -c---------                   t75 =    CNS_INT   int    1 REG NA $46
                                                            ┌──▌  t75    int    
N089 (???,???) [000123] -----------                         ▌  PUTARG_STK [+0x28] void   REG NA
N091 (  1,  1) [000090] -----------                   t90 =    LCL_VAR   int    V07 tmp3         u:2 rsi (last use) REG rsi <l:$400, c:$82>
                                                            ┌──▌  t90    int    
N093 (???,???) [000124] -----------                  t124 = ▌  PUTARG_REG int    REG r8
N095 (  1,  1) [000093] -----------                   t93 =    LCL_VAR   ref    V08 tmp4         u:2 rdi (last use) REG rdi $2c1
                                                            ┌──▌  t93    ref    
N097 (???,???) [000125] -----------                  t125 = ▌  PUTARG_REG ref    REG r9
N099 (  1,  1) [000096] -----------                   t96 =    LCL_VAR   int    V09 tmp5         u:2 rax (last use) REG rax $403
                                                            ┌──▌  t96    int    
N101 (???,???) [000126] -----------                         ▌  PUTARG_STK [+0x20] void   REG NA
N103 (  3,  3) [000048] -----------                   t48 =    LCL_VAR_ADDR long   V01 loc1          rcx REG rcx $342
                                                            ┌──▌  t48    long   
N105 (???,???) [000127] -----------                  t127 = ▌  PUTARG_REG long   REG rcx
N107 (  4,  5) [000051] -----------                   t51 =    LCL_FLD   ubyte (AX) V00 loc0         [+0] rdx REG rdx <l:$480, c:$4c0>
                                                            ┌──▌  t51    ubyte  
N109 (???,???) [000128] -----------                  t128 = ▌  PUTARG_REG int    REG rdx
N111 (  3, 10) [000129] Hc---------                  t129 =    CNS_INT(h) long   0x7ff93727bae0 ftn REG NA
                                                            ┌──▌  t129   long   
N113 (  5, 12) [000130] -c---------                  t130 = ▌  IND       long   REG NA
                                                            ┌──▌  t124   int    arg2 in r8
                                                            ├──▌  t125   ref    arg3 in r9
                                                            ├──▌  t127   long   arg0 in rcx
                                                            ├──▌  t128   int    arg1 in rdx
                                                            ├──▌  t130   long   control expr
N115 ( 79, 58) [000065] --CXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort) REG NA $VN.Void
N117 (???,???) [000112] -----------                            IL_OFFSET void   INLRT @ 0x04B[E-] REG NA
N119 (  0,  0) [000068] -----------                            RETURN    void   REG NA $VN.Void

-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
*************** In fgDebugCheckLoopTable: loop table not valid

*************** Starting PHASE Place 'align' instructions

*************** Finishing PHASE Place 'align' instructions [no changes]
*************** In genGenerateCode()

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i hascall gcsafe newobj LIR 
-----------------------------------------------------------------------------------------------------------------------------------------

*************** Starting PHASE Generate code
*************** In fgDebugCheckBBlist
Finalizing stack frame
Recording Var Locations at start of BB01
  <none>

must init V01 because compInitMem is set and it is not a temp
Modified regs: [rax rcx rdx rsi rdi r8-r11 mm0-mm5]
Callee-saved registers pushed: 2 [rsi rdi]
*************** In lvaAssignFrameOffsets(FINAL_FRAME_LAYOUT)
Assign V00 loc0, size=24, stkOffs=-0x30
Assign V01 loc1, size=24, stkOffs=-0x48
Assign V04 OutArgs, size=48, stkOffs=-0x78
--- delta bump 8 for RA
--- delta bump 120 for RSP frame
--- virtual stack offset to actual stack offset delta is 128
-- V00 was -48, now 80
-- V01 was -72, now 56
-- V04 was -120, now 8
; Final local variable assignments
;
;  V00 loc0         [V00    ] (  3,  3   )  struct (24) [rsp+50H]   do-not-enreg[XSF] addr-exposed
;  V01 loc1         [V01    ] (  1,  1   )  struct (24) [rsp+38H]   do-not-enreg[XS] must-init addr-exposed ld-addr-op
;* V02 loc2         [V02    ] (  0,  0   )     int  ->  zero-ref   
;* V03 loc3         [V03    ] (  0,  0   )     ref  ->  zero-ref    class-hnd exact
;  V04 OutArgs      [V04    ] (  1,  1   )  lclBlk (48) [rsp+00H]   "OutgoingArgSpace"
;  V05 tmp1         [V05,T00] (  2,  4   )     ref  ->  rsi         class-hnd exact single-def "NewObj constructor temp"
;* V06 tmp2         [V06    ] (  0,  0   )  struct (24) zero-ref    do-not-enreg[S] "impAppendStmt"
;  V07 tmp3         [V07,T02] (  2,  4   )     int  ->  rsi         "argument with side effect"
;  V08 tmp4         [V08,T01] (  2,  4   )     ref  ->  rdi         single-def "argument with side effect"
;  V09 tmp5         [V09,T03] (  2,  4   )     int  ->  rax         "argument with side effect"
;* V10 cse0         [V10,T05] (  0,  0   )    long  ->  zero-ref    "CSE - aggressive"
;  V11 cse1         [V11,T04] (  3,  3   )     ref  ->  rcx         "CSE - aggressive"
;
; Lcl frame size = 104
Created:
      G_M27646_IG02:        ; func=00, offs=000000H, size=0000H, bbWeight=1, gcrefRegs=00000000 {}
Mark labels for codegen
  BB01 : first block
*************** After genMarkLabelsForCodegen()

-----------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds           weight    lp [IL range]     [jump]      [EH region]         [flags]
-----------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000]  1                             1       [000..04C)        (return)                     i label hascall gcsafe newobj LIR 
-----------------------------------------------------------------------------------------------------------------------------------------
Setting stack level from -572662307 to 0

=============== Generating BB01 [000..04C) (return), preds={} succs={} flags=0x00000002.20490020: i label hascall gcsafe newobj LIR 
BB01 IN (0)={} + ByrefExposed + GcHeap
     OUT(0)={}

Recording Var Locations at start of BB01
  <none>

Liveness not changing: 0000000000000000 {}
							Live regs: (unchanged) 00000000 {}
							GC regs: (unchanged) 00000000 {}
							Byref regs: (unchanged) 00000000 {}

      L_M27646_BB01:
Label: G_M27646_IG02, GCvars=0000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000000 {}

Scope info: begin block BB01, IL range [000..04C)
Added IP mapping: 0x0000 STACK_EMPTY (G_M27646_IG02,ins#0,ofs#0) label
Generating: N003 (???,???) [000108] -----------                            IL_OFFSET void   INLRT @ 0x000[E-] REG NA
Generating: N005 (  3, 10) [000000] H----------                    t0 =    CNS_INT(h) long   0x7ff93744e858 class REG rcx $100
Mapped BB01 to G_M27646_IG02
IN0001:        mov      rcx, 0x7FF93744E858      ; Runtime
                                                                        ┌──▌  t0     long   
Generating: N007 (???,???) [000113] -----------                  t113 = ▌  PUTARG_REG long   REG rcx
                                                                        ┌──▌  t113   long   arg0 in rcx
Generating: N009 ( 17, 16) [000001] --C--------                    t1 = ▌  CALL help ref    CORINFO_HELP_NEWSFAST REG rax $180
							Call: GCvars=0000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000000 {}
IN0002:        call     CORINFO_HELP_NEWSFAST
							GC regs: 00000000 {} => 00000001 {rax}
                                                                        ┌──▌  t1     ref    
Generating: N011 ( 17, 16) [000003] DA---------                         ▌  STORE_LCL_VAR ref    V05 tmp1         d:2 rsi REG rsi
							GC regs: 00000001 {rax} => 00000000 {}
IN0003:        mov      rsi, rax
							V05 in reg rsi is becoming live  [000003]
							Live regs: 00000000 {} => 00000040 {rsi}
							Live vars: {} => {V05}
							GC regs: 00000000 {} => 00000040 {rsi}
Added IP mapping: 0x0005 (G_M27646_IG02,ins#3,ofs#18)
Generating: N013 (???,???) [000109] -----------                            IL_OFFSET void   INLRT @ 0x005[--] REG NA
Generating: N015 (  2, 10) [000011] -----------                   t11 =    CNS_INT   long   0x7ff9372b1818 REG rcx $1c0
IN0004:        mov      rcx, 0x7FF9372B1818
                                                                        ┌──▌  t11    long   
Generating: N017 (???,???) [000114] -----------                  t114 = ▌  PUTARG_REG long   REG rcx
Generating: N019 (  1,  1) [000012] -----------                   t12 =    CNS_INT   int    5 REG rdx $43
IN0005:        mov      edx, 5
                                                                        ┌──▌  t12    int    
Generating: N021 (???,???) [000115] -----------                  t115 = ▌  PUTARG_REG int    REG rdx
                                                                        ┌──▌  t114   long   arg0 in rcx
                                                                        ├──▌  t115   int    arg1 in rdx
Generating: N023 ( 17, 18) [000013] H-CXG------                   t13 = ▌  CALL help long   CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE REG rax $241
							Call: GCvars=0000000000000000 {}, gcrefRegs=00000040 {rsi}, byrefRegs=00000000 {}
IN0006:        call     CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
Generating: N025 (  1,  1) [000006] -----------                    t6 =    LCL_VAR   ref    V05 tmp1         u:2 rsi (last use) REG rsi $180
Generating: N027 (  3, 10) [000007] I----------                    t7 =    CNS_INT(h) long   0x1a844001ec8 static Fseq[s_rt] REG rcx $101
IN0007:        mov      rcx, 0x1A844001EC8      ; data for Program:s_rt
                                                                        ┌──▌  t7     long   
                                                                        ├──▌  t6     ref    
Generating: N029 (???,???) [000110] -A--G------                         ▌  STOREIND  ref    REG NA
							V05 in reg rsi is becoming dead  [000006]
							Live regs: 00000040 {rsi} => 00000000 {}
							Live vars: {V05} => {}
							GC regs: 00000040 {rsi} => 00000000 {}
IN0008:        mov      rdx, rsi
NoGC Call: savedSet=0000F0E8 {rbx rbp rsi rdi r12 r13 r14 r15}
							Call: GCvars=0000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000000 {}
IN0009:        call     CORINFO_HELP_ASSIGN_REF
Added IP mapping: 0x000A STACK_EMPTY (G_M27646_IG02,ins#9,ofs#56)
Generating: N031 (???,???) [000111] -----------                            IL_OFFSET void   INLRT @ 0x00A[E-] REG NA
Generating: N033 (  3, 10) [000014] I----------                   t14 =    CNS_INT(h) long   0x1a844001eb8 static box ptr REG rcx $103
IN000a:        mov      rcx, 0x1A844001EB8      ; box for Program:s_2
                                                                        ┌──▌  t14    long   
Generating: N035 (  5, 12) [000015] #----------                   t15 = ▌  IND       ref    REG rcx $2c0
IN000b:        mov      rcx, gword ptr [rcx]
							GC regs: 00000000 {} => 00000002 {rcx}
                                                                        ┌──▌  t15    ref    
Generating: N037 (  5, 12) [000104] DA---------                         ▌  STORE_LCL_VAR ref    V11 cse1         d:1 rcx REG rcx
							GC regs: 00000002 {rcx} => 00000000 {}
							V11 in reg rcx is becoming live  [000104]
							Live regs: 00000000 {} => 00000002 {rcx}
							Live vars: {} => {V11}
							GC regs: 00000000 {} => 00000002 {rcx}
Generating: N039 (  1,  1) [000105] -----------                  t105 =    LCL_VAR   ref    V11 cse1         u:1 rcx REG rcx $2c0
                                                                        ┌──▌  t105   ref    
Generating: N041 (  8, 15) [000017] -c---------                   t17 = ▌  LEA(b+8)  byref  REG NA
                                                                        ┌──▌  t17    byref  
Generating: N043 ( 15, 20) [000023] nc--G------                   t23 = ▌  IND       struct REG NA
Generating: N045 (???,???) [000116] Dc---------                  t116 =    LCL_FLD_ADDR byref  V00 loc0         [+0] NA REG NA
                                                                        ┌──▌  t116   byref  
                                                                        ├──▌  t23    struct 
Generating: N047 ( 25, 27) [000025] sA---------                         ▌  STORE_BLK struct<S0, 24> (copy) (Unroll) REG NA
IN000c:        vmovdqu  xmm0, xmmword ptr [rcx+08H]
IN000d:        vmovdqu  xmmword ptr [V00 rsp+50H], xmm0
IN000e:        mov      rdx, qword ptr [rcx+18H]
IN000f:        mov      qword ptr [V00+0x10 rsp+60H], rdx
Generating: N049 (  1,  1) [000107] -----------                  t107 =    LCL_VAR   ref    V11 cse1         u:1 rcx (last use) REG rcx $2c0
                                                                        ┌──▌  t107   ref    
Generating: N051 (  2,  2) [000033] -c---------                   t33 = ▌  LEA(b+12) byref  REG NA
                                                                        ┌──▌  t33    byref  
Generating: N053 (  4,  4) [000087] n---G------                   t87 = ▌  IND       int    REG rsi <l:$400, c:$82>
							V11 in reg rcx is becoming dead  [000107]
							Live regs: 00000002 {rcx} => 00000000 {}
							Live vars: {V11} => {}
							GC regs: 00000002 {rcx} => 00000000 {}
IN0010:        mov      esi, dword ptr [rcx+0CH]
                                                                        ┌──▌  t87    int    
Generating: N055 (  5,  5) [000089] DA--G------                         ▌  STORE_LCL_VAR int    V07 tmp3         d:2 rsi REG rsi
							V07 in reg rsi is becoming live  [000089]
							Live regs: 00000000 {} => 00000040 {rsi}
							Live vars: {} => {V07}
Generating: N057 (  3, 10) [000044] H----------                   t44 =    CNS_INT(h) long   0x7ff93744e2d8 class REG rcx $107
IN0011:        mov      rcx, 0x7FF93744E2D8      ; short[]
                                                                        ┌──▌  t44    long   
Generating: N059 (???,???) [000117] -----------                  t117 = ▌  PUTARG_REG long   REG rcx
Generating: N061 (  1,  1) [000043] -----------                   t43 =    CNS_INT   long   1 REG rdx $1c7
IN0012:        mov      edx, 1
                                                                        ┌──▌  t43    long   
Generating: N063 (???,???) [000118] -----------                  t118 = ▌  PUTARG_REG long   REG rdx
                                                                        ┌──▌  t117   long   arg0 in rcx
                                                                        ├──▌  t118   long   arg1 in rdx
Generating: N065 ( 18, 18) [000045] --CXG------                   t45 = ▌  CALL help ref    CORINFO_HELP_NEWARR_1_VC REG rax $184
							Call: GCvars=0000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000000 {}
IN0013:        call     CORINFO_HELP_NEWARR_1_VC
							GC regs: 00000000 {} => 00000001 {rax}
                                                                        ┌──▌  t45    ref    
Generating: N067 ( 18, 18) [000092] DA-XG------                         ▌  STORE_LCL_VAR ref    V08 tmp4         d:2 rdi REG rdi
							GC regs: 00000001 {rax} => 00000000 {}
IN0014:        mov      rdi, rax
							V08 in reg rdi is becoming live  [000092]
							Live regs: 00000040 {rsi} => 000000C0 {rsi rdi}
							Live vars: {V07} => {V07 V08}
							GC regs: 00000000 {} => 00000080 {rdi}
Generating: N069 (  3,  3) [000058] -----------                   t58 =    LCL_VAR_ADDR long   V00 loc0          rcx REG rcx $341
IN0015:        lea      rcx, [V00 rsp+50H]
                                                                        ┌──▌  t58    long   
Generating: N071 (???,???) [000119] -----------                  t119 = ▌  PUTARG_REG long   REG rcx
Generating: N073 (  1,  1) [000072] -----------                   t72 =    CNS_INT   int    0 REG rdx $44
IN0016:        xor      edx, edx
                                                                        ┌──▌  t72    int    
Generating: N075 (???,???) [000120] -----------                  t120 = ▌  PUTARG_REG int    REG rdx
Generating: N077 (  3, 10) [000121] Hc---------                  t121 =    CNS_INT(h) long   0x7ff93727bac8 ftn REG NA
                                                                        ┌──▌  t121   long   
Generating: N079 (  5, 12) [000122] -c---------                  t122 = ▌  IND       long   REG NA
                                                                        ┌──▌  t119   long   arg0 in rcx
                                                                        ├──▌  t120   int    arg1 in rdx
                                                                        ├──▌  t122   long   control expr
Generating: N081 ( 18, 11) [000056] --CXG------                   t56 = ▌  CALL      long   Program:M23(S0,ushort):ulong REG rax $440
							Call: GCvars=0000000000000000 {}, gcrefRegs=00000080 {rdi}, byrefRegs=00000000 {}
IN0017:        call     [Program:M23(S0,ushort):ulong]
                                                                        ┌──▌  t56    long   
Generating: N083 ( 19, 13) [000063] ---XG------                   t63 = ▌  CAST      int <- byte <- long REG rax $403
IN0018:        movsx    rax, al
                                                                        ┌──▌  t63    int    
Generating: N085 ( 19, 13) [000095] DA-XG------                         ▌  STORE_LCL_VAR int    V09 tmp5         d:2 rax REG rax
							V09 in reg rax is becoming live  [000095]
							Live regs: 000000C0 {rsi rdi} => 000000C1 {rax rsi rdi}
							Live vars: {V07 V08} => {V07 V08 V09}
Generating: N087 (  1,  1) [000075] -c---------                   t75 =    CNS_INT   int    1 REG NA $46
                                                                        ┌──▌  t75    int    
Generating: N089 (???,???) [000123] -----------                         ▌  PUTARG_STK [+0x28] void   REG NA
IN0019:        mov      dword ptr [V04+0x28 rsp+28H], 1
Generating: N091 (  1,  1) [000090] -----------                   t90 =    LCL_VAR   int    V07 tmp3         u:2 rsi (last use) REG rsi <l:$400, c:$82>
                                                                        ┌──▌  t90    int    
Generating: N093 (???,???) [000124] -----------                  t124 = ▌  PUTARG_REG int    REG r8
							V07 in reg rsi is becoming dead  [000090]
							Live regs: 000000C1 {rax rsi rdi} => 00000081 {rax rdi}
							Live vars: {V07 V08 V09} => {V08 V09}
IN001a:        mov      r8d, esi
Generating: N095 (  1,  1) [000093] -----------                   t93 =    LCL_VAR   ref    V08 tmp4         u:2 rdi (last use) REG rdi $2c1
                                                                        ┌──▌  t93    ref    
Generating: N097 (???,???) [000125] -----------                  t125 = ▌  PUTARG_REG ref    REG r9
							V08 in reg rdi is becoming dead  [000093]
							Live regs: 00000081 {rax rdi} => 00000001 {rax}
							Live vars: {V08 V09} => {V09}
							GC regs: 00000080 {rdi} => 00000000 {}
IN001b:        mov      r9, rdi
							GC regs: 00000000 {} => 00000200 {r9}
Generating: N099 (  1,  1) [000096] -----------                   t96 =    LCL_VAR   int    V09 tmp5         u:2 rax (last use) REG rax $403
                                                                        ┌──▌  t96    int    
Generating: N101 (???,???) [000126] -----------                         ▌  PUTARG_STK [+0x20] void   REG NA
							V09 in reg rax is becoming dead  [000096]
							Live regs: 00000001 {rax} => 00000000 {}
							Live vars: {V09} => {}
IN001c:        mov      dword ptr [V04+0x20 rsp+20H], eax
Generating: N103 (  3,  3) [000048] -----------                   t48 =    LCL_VAR_ADDR long   V01 loc1          rcx REG rcx $342
IN001d:        lea      rcx, [V01 rsp+38H]
                                                                        ┌──▌  t48    long   
Generating: N105 (???,???) [000127] -----------                  t127 = ▌  PUTARG_REG long   REG rcx
Generating: N107 (  4,  5) [000051] -----------                   t51 =    LCL_FLD   ubyte (AX) V00 loc0         [+0] rdx REG rdx <l:$480, c:$4c0>
IN001e:        movzx    rdx, byte  ptr [V00 rsp+50H]
                                                                        ┌──▌  t51    ubyte  
Generating: N109 (???,???) [000128] -----------                  t128 = ▌  PUTARG_REG int    REG rdx
Generating: N111 (  3, 10) [000129] Hc---------                  t129 =    CNS_INT(h) long   0x7ff93727bae0 ftn REG NA
                                                                        ┌──▌  t129   long   
Generating: N113 (  5, 12) [000130] -c---------                  t130 = ▌  IND       long   REG NA
                                                                        ┌──▌  t124   int    arg2 in r8
                                                                        ├──▌  t125   ref    arg3 in r9
                                                                        ├──▌  t127   long   arg0 in rcx
                                                                        ├──▌  t128   int    arg1 in rdx
                                                                        ├──▌  t130   long   control expr
Generating: N115 ( 79, 58) [000065] --CXG------                         ▌  CALL      void   Program:M24(S1,ubyte,uint,short[],byte,ushort) REG NA $VN.Void
							GC regs: 00000200 {r9} => 00000000 {}
							Call: GCvars=0000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000000 {}
IN001f:        call     [Program:M24(S1,ubyte,uint,short[],byte,ushort)]
Added IP mapping: 0x004B STACK_EMPTY (G_M27646_IG02,ins#31,ofs#166)
Generating: N117 (???,???) [000112] -----------                            IL_OFFSET void   INLRT @ 0x04B[E-] REG NA
Generating: N119 (  0,  0) [000068] -----------                            RETURN    void   REG NA $VN.Void
Added IP mapping: EPILOG (G_M27646_IG02,ins#31,ofs#166) label
Reserving epilog IG for block BB01
IN0020:        nop      
Saved:
      G_M27646_IG02:        ; func=00, offs=000000H, size=00A7H, bbWeight=1, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, BB01 [0000], byref
Created:
      G_M27646_IG03:        ; func=00, offs=0000A7H, size=0000H, bbWeight=1, gcrefRegs=00000000 {}
*************** After placeholder IG creation
G_M27646_IG01:        ; func=00, offs=000000H, size=0000H, bbWeight=1, gcrefRegs=00000000 {} <-- Prolog IG
G_M27646_IG02:        ; offs=000000H, size=00A7H, bbWeight=1, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, BB01 [0000], byref
G_M27646_IG03:        ; epilog placeholder, next placeholder=<END>, BB01 [0000], epilog, extend <-- First placeholder <-- Last placeholder
                      ;   PrevGCVars=0000000000000000 {}, PrevGCrefRegs=00000000 {}, PrevByrefRegs=00000000 {}
                      ;   InitGCVars=0000000000000000 {}, InitGCrefRegs=00000000 {}, InitByrefRegs=00000000 {}

Variable Live Range History Dump for BB01
..None..
Liveness not changing: 0000000000000000 {}

# compCycleEstimate =    146, compSizeEstimate =   134 Program:Main()
; Final local variable assignments
;
;  V00 loc0         [V00    ] (  3,  3   )  struct (24) [rsp+50H]   do-not-enreg[XSF] addr-exposed
;  V01 loc1         [V01    ] (  1,  1   )  struct (24) [rsp+38H]   do-not-enreg[XS] must-init addr-exposed ld-addr-op
;* V02 loc2         [V02    ] (  0,  0   )     int  ->  zero-ref   
;* V03 loc3         [V03    ] (  0,  0   )     ref  ->  zero-ref    class-hnd exact
;  V04 OutArgs      [V04    ] (  1,  1   )  lclBlk (48) [rsp+00H]   "OutgoingArgSpace"
;  V05 tmp1         [V05,T00] (  2,  4   )     ref  ->  rsi         class-hnd exact single-def "NewObj constructor temp"
;* V06 tmp2         [V06    ] (  0,  0   )  struct (24) zero-ref    do-not-enreg[S] "impAppendStmt"
;  V07 tmp3         [V07,T02] (  2,  4   )     int  ->  rsi         "argument with side effect"
;  V08 tmp4         [V08,T01] (  2,  4   )     ref  ->  rdi         single-def "argument with side effect"
;  V09 tmp5         [V09,T03] (  2,  4   )     int  ->  rax         "argument with side effect"
;* V10 cse0         [V10,T05] (  0,  0   )    long  ->  zero-ref    "CSE - aggressive"
;  V11 cse1         [V11,T04] (  3,  3   )     ref  ->  rcx         "CSE - aggressive"
;
; Lcl frame size = 104
*************** Before prolog / epilog generation
G_M27646_IG01:        ; func=00, offs=000000H, size=0000H, bbWeight=1, gcrefRegs=00000000 {} <-- Prolog IG
G_M27646_IG02:        ; offs=000000H, size=00A7H, bbWeight=1, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, BB01 [0000], byref
G_M27646_IG03:        ; epilog placeholder, next placeholder=<END>, BB01 [0000], epilog, extend <-- First placeholder <-- Last placeholder
                      ;   PrevGCVars=0000000000000000 {}, PrevGCrefRegs=00000000 {}, PrevByrefRegs=00000000 {}
                      ;   InitGCVars=0000000000000000 {}, InitGCrefRegs=00000000 {}, InitByrefRegs=00000000 {}
Recording Var Locations at start of BB01
  <none>

*************** In genFnProlog()
Added IP mapping to front: PROLOG (G_M27646_IG01,ins#0,ofs#0) label

__prolog:
Found 6 lvMustInit int-sized stack slots, frame offsets -56 through -80
IN0021:        push     rdi
IN0022:        push     rsi
IN0023:        sub      rsp, 104
IN0024:        vzeroupper 
Notify VM instruction set (AVX2) must be supported.
IN0025:        vxorps   xmm4, xmm4
IN0026:        vmovdqu  xmmword ptr [rsp+38H], xmm4
IN0027:        xor      rax, rax
IN0028:        mov      qword ptr [rsp+48H], rax
*************** In genEnregisterIncomingStackArgs()

Saved:
      G_M27646_IG01:        ; func=00, offs=000000H, size=001AH, bbWeight=1, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc
*************** In genFnEpilog()

__epilog:
gcVarPtrSetCur=0000000000000000 {}, gcRegGCrefSetCur=00000000 {}, gcRegByrefSetCur=00000000 {}
IN0029:        add      rsp, 104
IN002a:        pop      rsi
IN002b:        pop      rdi
IN002c:        ret      
Saved:
      G_M27646_IG03:        ; func=00, offs=0000A7H, size=0007H, bbWeight=1, epilog, nogc, extend
0 prologs, 1 epilogs, 0 funclet prologs, 0 funclet epilogs
*************** After prolog / epilog generation
G_M27646_IG01:        ; func=00, offs=000000H, size=001AH, bbWeight=1, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG
G_M27646_IG02:        ; offs=00001AH, size=00A7H, bbWeight=1, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, BB01 [0000], byref
G_M27646_IG03:        ; offs=0000C1H, size=0007H, bbWeight=1, epilog, nogc, extend
*************** In emitJumpDistBind()
Emitter Jump List:
  total jump count: 0

*************** Finishing PHASE Generate code

*************** Starting PHASE Emit code

Hot  code size = 0xC8 bytes
Cold code size = 0x0 bytes
reserveUnwindInfo(isFunclet=false, isColdCode=false, unwindSize=0xa)
*************** In emitEndCodeGen()
Converting emitMaxStackDepth from bytes (0) to elements (0)

***************************************************************************
Instructions as they come out of the scheduler


G_M27646_IG01:        ; func=00, offs=000000H, size=001AH, bbWeight=1, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG
IN0021: 000000 57                   push     rdi
IN0022: 000001 56                   push     rsi
IN0023: 000002 4883EC68             sub      rsp, 104
IN0024: 000006 C5F877               vzeroupper 
IN0025: 000009 C5D857E4             vxorps   xmm4, xmm4
IN0026: 00000D C5FA7F642438         vmovdqu  xmmword ptr [rsp+38H], xmm4
IN0027: 000013 33C0                 xor      eax, eax
IN0028: 000015 4889442448           mov      qword ptr [rsp+48H], rax
						;; size=26 bbWeight=1 PerfScore 6.83
G_M27646_IG02:        ; func=00, offs=00001AH, size=00A7H, bbWeight=1, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, BB01 [0000], byref
IN0001: 00001A 48B958E84437F97F0000 mov      rcx, 0x7FF93744E858      ; Runtime
recordRelocation: 00007FF9370C1985 (rw: 000001E8D8AF202D) => 00007FF996955350, type 16 (IMAGE_REL_BASED_REL32), delta 0
IN0002: 000024 E8C739895F           call     CORINFO_HELP_NEWSFAST
                            ; gcrRegs +[rax]
                            ; gcr arg pop 0
IN0003: 000029 488BF0               mov      rsi, rax
                            ; gcrRegs +[rsi]
IN0004: 00002C 48B918182B37F97F0000 mov      rcx, 0x7FF9372B1818
IN0005: 000036 BA05000000           mov      edx, 5
recordRelocation: 00007FF9370C199C (rw: 000001E8D8AF2044) => 00007FF996955520, type 16 (IMAGE_REL_BASED_REL32), delta 0
IN0006: 00003B E8803B895F           call     CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
                            ; gcrRegs -[rax]
                            ; gcr arg pop 0
IN0007: 000040 48B9C81E0044A8010000 mov      rcx, 0x1A844001EC8      ; data for Program:s_rt
IN0008: 00004A 488BD6               mov      rdx, rsi
                            ; gcrRegs +[rdx]
recordRelocation: 00007FF9370C19AE (rw: 000001E8D8AF2056) => 00007FF936DE0010, type 16 (IMAGE_REL_BASED_REL32), delta 0
IN0009: 00004D E85EE6D1FF           call     CORINFO_HELP_ASSIGN_REF
                            ; gcrRegs -[rdx rsi]
IN000a: 000052 48B9B81E0044A8010000 mov      rcx, 0x1A844001EB8      ; box for Program:s_2
IN000b: 00005C 488B09               mov      rcx, gword ptr [rcx]
                            ; gcrRegs +[rcx]
IN000c: 00005F C5FA6F4108           vmovdqu  xmm0, xmmword ptr [rcx+08H]
IN000d: 000064 C5FA7F442450         vmovdqu  xmmword ptr [rsp+50H], xmm0
IN000e: 00006A 488B5118             mov      rdx, qword ptr [rcx+18H]
IN000f: 00006E 4889542460           mov      qword ptr [rsp+60H], rdx
IN0010: 000073 8B710C               mov      esi, dword ptr [rcx+0CH]
IN0011: 000076 48B9D8E24437F97F0000 mov      rcx, 0x7FF93744E2D8      ; short[]
                            ; gcrRegs -[rcx]
IN0012: 000080 BA01000000           mov      edx, 1
recordRelocation: 00007FF9370C19E6 (rw: 000001E8D8AF208E) => 00007FF996955470, type 16 (IMAGE_REL_BASED_REL32), delta 0
IN0013: 000085 E8863A895F           call     CORINFO_HELP_NEWARR_1_VC
                            ; gcrRegs +[rax]
                            ; gcr arg pop 0
IN0014: 00008A 488BF8               mov      rdi, rax
                            ; gcrRegs +[rdi]
IN0015: 00008D 488D4C2450           lea      rcx, [rsp+50H]
IN0016: 000092 33D2                 xor      edx, edx
recordRelocation: 00007FF9370C19F6 (rw: 000001E8D8AF209E) => 00007FF93727BAC8, type 16 (IMAGE_REL_BASED_DISP32), delta 0
IN0017: 000094 FF15CEA01B00         call     [Program:M23(S0,ushort):ulong]
                            ; gcrRegs -[rax]
                            ; gcr arg pop 0
IN0018: 00009A 480FBEC0             movsx    rax, al
IN0019: 00009E C744242801000000     mov      dword ptr [rsp+28H], 1
IN001a: 0000A6 448BC6               mov      r8d, esi
IN001b: 0000A9 4C8BCF               mov      r9, rdi
                            ; gcrRegs +[r9]
IN001c: 0000AC 89442420             mov      dword ptr [rsp+20H], eax
IN001d: 0000B0 488D4C2438           lea      rcx, [rsp+38H]
IN001e: 0000B5 0FB6542450           movzx    rdx, byte  ptr [rsp+50H]
recordRelocation: 00007FF9370C1A1C (rw: 000001E8D8AF20C4) => 00007FF93727BAE0, type 16 (IMAGE_REL_BASED_DISP32), delta 0
IN001f: 0000BA FF15C0A01B00         call     [Program:M24(S1,ubyte,uint,short[],byte,ushort)]
                            ; gcrRegs -[rdi r9]
                            ; gcr arg pop 0
IN0020: 0000C0 90                   nop      
						;; size=167 bbWeight=1 PerfScore 29.75
G_M27646_IG03:        ; func=00, offs=0000C1H, size=0007H, bbWeight=1, epilog, nogc, extend
IN0029: 0000C1 4883C468             add      rsp, 104
IN002a: 0000C5 5E                   pop      rsi
IN002b: 0000C6 5F                   pop      rdi
IN002c: 0000C7 C3                   ret      
						;; size=7 bbWeight=1 PerfScore 2.25Allocated method code size =  200 , actual size =  200, unused size =    0

; Total bytes of code 200, prolog size 26, PerfScore 58.83, instruction count 44, allocated bytes for code 200 (MethodHash=cb019401) for method Program:Main()
; ============================================================

*************** After end code gen, before unwindEmit()
G_M27646_IG01:        ; func=00, offs=000000H, size=001AH, bbWeight=1, PerfScore 6.83, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG

IN0021: 000000 push     rdi
IN0022: 000001 push     rsi
IN0023: 000002 sub      rsp, 104
IN0024: 000006 vzeroupper 
IN0025: 000009 vxorps   xmm4, xmm4
IN0026: 00000D vmovdqu  xmmword ptr [rsp+38H], xmm4
IN0027: 000013 xor      eax, eax
IN0028: 000015 mov      qword ptr [rsp+48H], rax

G_M27646_IG02:        ; offs=00001AH, size=00A7H, bbWeight=1, PerfScore 29.75, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, BB01 [0000], byref

IN0001: 00001A mov      rcx, 0x7FF93744E858      ; Runtime
IN0002: 000024 call     CORINFO_HELP_NEWSFAST
IN0003: 000029 mov      rsi, rax
IN0004: 00002C mov      rcx, 0x7FF9372B1818
IN0005: 000036 mov      edx, 5
IN0006: 00003B call     CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE
IN0007: 000040 mov      rcx, 0x1A844001EC8      ; data for Program:s_rt
IN0008: 00004A mov      rdx, rsi
IN0009: 00004D call     CORINFO_HELP_ASSIGN_REF
IN000a: 000052 mov      rcx, 0x1A844001EB8      ; box for Program:s_2
IN000b: 00005C mov      rcx, gword ptr [rcx]
IN000c: 00005F vmovdqu  xmm0, xmmword ptr [rcx+08H]
IN000d: 000064 vmovdqu  xmmword ptr [V00 rsp+50H], xmm0
IN000e: 00006A mov      rdx, qword ptr [rcx+18H]
IN000f: 00006E mov      qword ptr [V00+0x10 rsp+60H], rdx
IN0010: 000073 mov      esi, dword ptr [rcx+0CH]
IN0011: 000076 mov      rcx, 0x7FF93744E2D8      ; short[]
IN0012: 000080 mov      edx, 1
IN0013: 000085 call     CORINFO_HELP_NEWARR_1_VC
IN0014: 00008A mov      rdi, rax
IN0015: 00008D lea      rcx, [V00 rsp+50H]
IN0016: 000092 xor      edx, edx
IN0017: 000094 call     [Program:M23(S0,ushort):ulong]
IN0018: 00009A movsx    rax, al
IN0019: 00009E mov      dword ptr [V04+0x28 rsp+28H], 1
IN001a: 0000A6 mov      r8d, esi
IN001b: 0000A9 mov      r9, rdi
IN001c: 0000AC mov      dword ptr [V04+0x20 rsp+20H], eax
IN001d: 0000B0 lea      rcx, [V01 rsp+38H]
IN001e: 0000B5 movzx    rdx, byte  ptr [V00 rsp+50H]
IN001f: 0000BA call     [Program:M24(S1,ubyte,uint,short[],byte,ushort)]
IN0020: 0000C0 nop      

G_M27646_IG03:        ; offs=0000C1H, size=0007H, bbWeight=1, PerfScore 2.25, epilog, nogc, extend

IN0029: 0000C1 add      rsp, 104
IN002a: 0000C5 pop      rsi
IN002b: 0000C6 pop      rdi
IN002c: 0000C7 ret      


*************** Finishing PHASE Emit code

*************** Starting PHASE Emit GC+EH tables
Unwind Info:
  >> Start offset   : 0x000000 (not in unwind data)
  >>   End offset   : 0x0000c8 (not in unwind data)
  Version           : 1
  Flags             : 0x00
  SizeOfProlog      : 0x06
  CountOfUnwindCodes: 3
  FrameRegister     : none (0)
  FrameOffset       : N/A (no FrameRegister) (Value=0)
  UnwindCodes       :
    CodeOffset: 0x06 UnwindOp: UWOP_ALLOC_SMALL (2)     OpInfo: 12 * 8 + 8 = 104 = 0x68
    CodeOffset: 0x02 UnwindOp: UWOP_PUSH_NONVOL (0)     OpInfo: rsi (6)
    CodeOffset: 0x01 UnwindOp: UWOP_PUSH_NONVOL (0)     OpInfo: rdi (7)
allocUnwindInfo(pHotCode=0x00007FF9370C1960, pColdCode=0x0000000000000000, startOffset=0x0, endOffset=0xc8, unwindSize=0xa, pUnwindBlock=0x000001E8D8B8968E, funKind=0 (main function))
*************** In genIPmappingGen()
IP mapping count : 6
IL offs PROLOG : 0x00000000 ( STACK_EMPTY )
IL offs 0x0000 : 0x0000001A ( STACK_EMPTY )
IL offs 0x0005 : 0x0000002C
IL offs 0x000A : 0x00000052 ( STACK_EMPTY )
IL offs 0x004B : 0x000000C0 ( STACK_EMPTY )
IL offs EPILOG : 0x000000C0 ( STACK_EMPTY )

*************** In genSetScopeInfo()
VarLocInfo count is 0
; Variable debug info: 0 live ranges, 0 vars for method Program:Main()
*************** In gcInfoBlockHdrSave()
Set code length to 200.
Set ReturnKind to Scalar.
Set Outgoing stack arg area size to 48.
Register slot id for reg rsi = 0.
Register slot id for reg rdi = 1.
Set state of slot 0 at instr offset 0x3b to Live.
Set state of slot 0 at instr offset 0x40 to Dead.
Set state of slot 1 at instr offset 0x94 to Live.
Set state of slot 1 at instr offset 0x9a to Dead.
Defining 5 call sites:
    Offset 0x24, size 5.
    Offset 0x3b, size 5.
    Offset 0x85, size 5.
    Offset 0x94, size 6.
    Offset 0xba, size 6.

*************** Finishing PHASE Emit GC+EH tables
Method code size: 200

Allocations for Program:Main() (MethodHash=cb019401)
count:       1360, size:     129121, max =       3456
allocateMemory:     196608, nraUsed:     134336

Alloc'd bytes by kind:
                  kind |       size |     pct
  ---------------------+------------+--------
         AssertionProp |       6652 |   5.15%
               ASTNode |      17160 |  13.29%
              InstDesc |       4944 |   3.83%
              ImpStack |        384 |   0.30%
            BasicBlock |       1720 |   1.33%
              CallArgs |       1800 |   1.39%
              FlowList |          0 |   0.00%
     TreeStatementList |        160 |   0.12%
               SiScope |          0 |   0.00%
       DominatorMemory |         96 |   0.07%
                  LSRA |       4992 |   3.87%
         LSRA_Interval |       2880 |   2.23%
      LSRA_RefPosition |      11520 |   8.92%
          Reachability |         40 |   0.03%
                   SSA |        704 |   0.55%
           ValueNumber |      19218 |  14.88%
              LvaTable |       2036 |   1.58%
            UnwindInfo |          0 |   0.00%
                hashBv |         40 |   0.03%
                bitset |        688 |   0.53%
          FixedBitVect |        104 |   0.08%
               Generic |       2210 |   1.71%
   LocalAddressVisitor |        384 |   0.30%
         FieldSeqStore |        176 |   0.14%
          MemorySsaMap |         80 |   0.06%
          MemoryPhiArg |          0 |   0.00%
                   CSE |       2408 |   1.86%
                    GC |       2933 |   2.27%
       CorTailCallInfo |          0 |   0.00%
              Inlining |       4624 |   3.58%
            ArrayStack |          0 |   0.00%
             DebugInfo |        448 |   0.35%
             DebugOnly |      37844 |  29.31%
               Codegen |        848 |   0.66%
               LoopOpt |          0 |   0.00%
             LoopClone |          0 |   0.00%
             LoopHoist |          0 |   0.00%
               Unknown |        204 |   0.16%
            RangeCheck |          0 |   0.00%
              CopyProp |        776 |   0.60%
           SideEffects |          0 |   0.00%
       ObjectAllocator |          0 |   0.00%
    VariableLiveRanges |        616 |   0.48%
           ClassLayout |        128 |   0.10%
       TailMergeThrows |          0 |   0.00%
             EarlyProp |          0 |   0.00%
              ZeroInit |        304 |   0.24%
                   Pgo |          0 |   0.00%

****** DONE compiling Program:Main()
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