; Assembly listing for method System.Collections.BitArray:CopyTo(System.Array,int):this ; Emitting BLENDED_CODE for generic ARM64 CPU - Unix ; optimized code ; fp based frame ; fully interruptible ; Final local variable assignments ; ; V00 this [V00,T01] ( 18, 22 ) ref -> x19 this class-hnd ; V01 arg1 [V01,T16] ( 10, 8 ) ref -> x21 class-hnd ; V02 arg2 [V02,T10] ( 16, 10.25) int -> x20 ; V03 loc0 [V03,T36] ( 6, 4 ) ref -> x22 class-hnd ; V04 loc1 [V04,T63] ( 3, 1.50) int -> x25 ld-addr-op ; V05 loc2 [V05,T40] ( 6, 3 ) int -> x21 ; V06 loc3 [V06,T61] ( 4, 1.75) ref -> x0 class-hnd ; V07 loc4 [V07,T41] ( 6, 3 ) int -> x22 ; V08 loc5 [V08,T54] ( 4, 2 ) int -> x21 ;* V09 loc6 [V09 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op ; V10 loc7 [V10,T19] ( 11, 9 ) int -> x26 ; V11 loc8 [V11,T50] ( 5, 2.50) int -> x22 ld-addr-op ; V12 loc9 [V12,T05] ( 6, 20.50) int -> x24 ; V13 loc10 [V13,T29] ( 6, 6 ) ref -> x23 class-hnd ; V14 loc11 [V14,T00] ( 13, 35 ) int -> x21 ;* V15 loc12 [V15 ] ( 0, 0 ) struct (32) zero-ref do-not-enreg[S] ;* V16 loc13 [V16 ] ( 0, 0 ) struct (32) zero-ref do-not-enreg[S] ;* V17 loc14 [V17 ] ( 0, 0 ) struct (32) zero-ref do-not-enreg[S] ;* V18 loc15 [V18 ] ( 0, 0 ) long -> zero-ref ;* V19 loc16 [V19 ] ( 0, 0 ) byref -> zero-ref pinned ;* V20 loc17 [V20 ] ( 0, 0 ) int -> zero-ref ;* V21 loc18 [V21 ] ( 0, 0 ) struct (32) zero-ref do-not-enreg[S] ;* V22 loc19 [V22 ] ( 0, 0 ) struct (32) zero-ref do-not-enreg[S] ;* V23 loc20 [V23 ] ( 0, 0 ) struct (32) zero-ref do-not-enreg[S] ;* V24 loc21 [V24 ] ( 0, 0 ) struct (32) zero-ref do-not-enreg[S] ;* V25 loc22 [V25 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ;* V26 loc23 [V26 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ;* V27 loc24 [V27 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ;* V28 loc25 [V28 ] ( 0, 0 ) long -> zero-ref ;* V29 loc26 [V29 ] ( 0, 0 ) byref -> zero-ref pinned ;* V30 loc27 [V30 ] ( 0, 0 ) int -> zero-ref ;* V31 loc28 [V31 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ;* V32 loc29 [V32 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ;* V33 loc30 [V33 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ;* V34 loc31 [V34 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ;* V35 loc32 [V35 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ;* V36 loc33 [V36 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ;* V37 loc34 [V37 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ; V38 loc35 [V38,T75] ( 3, 8.50) simd16 -> d8 HFA(simd16) ; V39 loc36 [V39,T34] ( 2, 4.50) long -> x27 ; V40 loc37 [V40 ] ( 3, 1.50) byref -> [fp+0x10] must-init pinned ; V41 loc38 [V41,T24] ( 2, 8 ) int -> x0 ; V42 loc39 [V42,T74] ( 11, 44 ) simd16 -> d9 HFA(simd16) ; V43 loc40 [V43,T76] ( 2, 8 ) simd16 -> d10 HFA(simd16) ; V44 loc41 [V44,T77] ( 2, 8 ) simd16 -> d16 HFA(simd16) ; V45 loc42 [V45,T78] ( 2, 8 ) simd16 -> d16 HFA(simd16) ; V46 loc43 [V46,T79] ( 2, 8 ) simd16 -> d16 HFA(simd16) ; V47 loc44 [V47,T80] ( 2, 8 ) simd16 -> d16 HFA(simd16) ; V48 loc45 [V48,T81] ( 2, 8 ) simd16 -> d16 HFA(simd16) ;* V49 loc46 [V49 ] ( 0, 0 ) int -> zero-ref ; V50 loc47 [V50,T37] ( 2, 4 ) int -> x1 ld-addr-op ;# V51 OutArgs [V51 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; V52 tmp1 [V52,T82] ( 3, 0 ) ref -> x19 class-hnd exact "NewObj constructor temp" ; V53 tmp2 [V53,T25] ( 2, 8 ) int -> x0 "Strict ordering of exceptions for Array store" ; V54 tmp3 [V54,T83] ( 3, 0 ) ref -> x19 class-hnd exact "NewObj constructor temp" ; V55 tmp4 [V55,T84] ( 3, 0 ) ref -> x19 class-hnd exact "NewObj constructor temp" ; V56 tmp5 [V56,T56] ( 2, 2 ) int -> x1 "Strict ordering of exceptions for Array store" ; V57 tmp6 [V57,T85] ( 3, 0 ) ref -> x19 class-hnd exact "NewObj constructor temp" ; V58 tmp7 [V58,T86] ( 3, 0 ) ref -> x19 class-hnd exact "Single-def Box Helper" ; V59 tmp8 [V59,T87] ( 3, 0 ) ref -> x20 class-hnd exact "NewObj constructor temp" ; V60 tmp9 [V60,T88] ( 3, 0 ) ref -> x19 class-hnd exact "NewObj constructor temp" ; V61 tmp10 [V61,T64] ( 2, 1 ) int -> x2 "Inline return value spill temp" ; V62 tmp11 [V62,T51] ( 3, 2.50) int -> x2 "Inline stloc first use temp" ; V63 tmp12 [V63,T57] ( 2, 2 ) int -> x2 "Inline stloc first use temp" ; V64 tmp13 [V64,T30] ( 3, 6 ) byref -> x22 "Inlining Arg" ; V65 tmp14 [V65,T38] ( 2, 4 ) bool -> x0 "Inlining Arg" ; V66 tmp15 [V66,T52] ( 2, 2.50) ref -> x2 class-hnd "Inlining Arg" ; V67 tmp16 [V67,T53] ( 2, 2.50) ref -> x1 class-hnd "Inlining Arg" ; V68 tmp17 [V68,T58] ( 2, 2 ) int -> x4 "Inlining Arg" ;* V69 tmp18 [V69 ] ( 0, 0 ) int -> zero-ref "Inline stloc first use temp" ; V70 tmp19 [V70,T59] ( 2, 2 ) int -> x1 "Inlining Arg" ;* V71 tmp20 [V71 ] ( 0, 0 ) struct (16) zero-ref "Inline return value spill temp" ;* V72 tmp21 [V72 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp" ;* V73 tmp22 [V73 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inline ldloca(s) first use temp" ; V74 tmp23 [V74,T55] ( 2, 2 ) byref -> x24 "Inlining Arg" ; V75 tmp24 [V75,T48] ( 3, 3 ) int -> x25 "Inlining Arg" ;* V76 tmp25 [V76 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V77 tmp26 [V77 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp" ;* V78 tmp27 [V78 ] ( 0, 0 ) bool -> zero-ref "Inlining Arg" ;* V79 tmp28 [V79 ] ( 0, 0 ) bool -> zero-ref "Inlining Arg" ; V80 tmp29 [V80,T65] ( 2, 1.50) ref -> x0 class-hnd "Inlining Arg" ; V81 tmp30 [V81,T66] ( 2, 1.50) ref -> x1 class-hnd "Inlining Arg" ; V82 tmp31 [V82,T71] ( 2, 1 ) int -> x26 "Inline stloc first use temp" ;* V83 tmp32 [V83 ] ( 0, 0 ) struct (16) zero-ref "Inlining Arg" ; V84 tmp33 [V84,T08] ( 2, 16 ) int -> x1 ld-addr-op "Inlining Arg" ;* V85 tmp34 [V85 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg" ;* V86 tmp35 [V86 ] ( 0, 0 ) int -> zero-ref "impAppendStmt" ;* V87 tmp36 [V87 ] ( 0, 0 ) struct (16) zero-ref ld-addr-op "Inlining Arg" ;* V88 tmp37 [V88 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V89 tmp38 [V89 ] ( 0, 0 ) int -> zero-ref "Inlining Arg" ;* V90 tmp39 [V90 ] ( 0, 0 ) struct (16) zero-ref "NewObj constructor temp" ; V91 tmp40 [V91,T07] ( 2, 16 ) byref -> x20 "Inlining Arg" ; V92 tmp41 [V92,T04] ( 3, 24 ) int -> x25 "Inlining Arg" ;* V93 tmp42 [V93 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V94 tmp43 [V94 ] ( 0, 0 ) struct ( 8) zero-ref "NewObj constructor temp" ;* V95 tmp44 [V95 ] ( 0, 0 ) bool -> zero-ref "Inlining Arg" ;* V96 tmp45 [V96 ] ( 0, 0 ) bool -> zero-ref "Inlining Arg" ; V97 tmp46 [V97,T17] ( 2, 10 ) ref -> x0 class-hnd "Inlining Arg" ; V98 tmp47 [V98,T18] ( 2, 10 ) ref -> x1 class-hnd "Inlining Arg" ; V99 tmp48 [V99,T31] ( 3, 6 ) int -> x0 "Inline stloc first use temp" ; V100 tmp49 [V100,T09] ( 8, 14.50) byref -> x20 V09._pointer(offs=0x00) P-INDEP "field V09._pointer (fldOffset=0x0)" ; V101 tmp50 [V101,T06] ( 9, 18.50) int -> x25 V09._length(offs=0x08) P-INDEP "field V09._length (fldOffset=0x8)" ; V102 tmp51 [V102,T68] ( 2, 1 ) byref -> x20 V71._pointer(offs=0x00) P-INDEP "field V71._pointer (fldOffset=0x0)" ; V103 tmp52 [V103,T72] ( 2, 1 ) int -> x25 V71._length(offs=0x08) P-INDEP "field V71._length (fldOffset=0x8)" ; V104 tmp53 [V104,T69] ( 2, 1 ) byref -> x20 V72._pointer(offs=0x00) P-INDEP "field V72._pointer (fldOffset=0x0)" ; V105 tmp54 [V105,T73] ( 2, 1 ) int -> x25 V72._length(offs=0x08) P-INDEP "field V72._length (fldOffset=0x8)" ;* V106 tmp55 [V106 ] ( 0, 0 ) byref -> zero-ref V73._pointer(offs=0x00) P-INDEP "field V73._pointer (fldOffset=0x0)" ;* V107 tmp56 [V107 ] ( 0, 0 ) int -> zero-ref V73._length(offs=0x08) P-INDEP "field V73._length (fldOffset=0x8)" ; V108 tmp57 [V108,T70] ( 2, 1 ) byref -> x20 V77._value(offs=0x00) P-INDEP "field V77._value (fldOffset=0x0)" ; V109 tmp58 [V109,T20] ( 2, 8 ) byref -> x0 V83._pointer(offs=0x00) P-INDEP "field V83._pointer (fldOffset=0x0)" ;* V110 tmp59 [V110 ] ( 0, 0 ) int -> zero-ref V83._length(offs=0x08) P-INDEP "field V83._length (fldOffset=0x8)" ; V111 tmp60 [V111,T21] ( 2, 8 ) byref -> x0 V85._pointer(offs=0x00) P-INDEP "field V85._pointer (fldOffset=0x0)" ;* V112 tmp61 [V112 ] ( 0, 0 ) int -> zero-ref V85._length(offs=0x08) P-INDEP "field V85._length (fldOffset=0x8)" ;* V113 tmp62 [V113 ] ( 0, 0 ) byref -> zero-ref V87._pointer(offs=0x00) P-INDEP "field V87._pointer (fldOffset=0x0)" ;* V114 tmp63 [V114 ] ( 0, 0 ) int -> zero-ref V87._length(offs=0x08) P-INDEP "field V87._length (fldOffset=0x8)" ; V115 tmp64 [V115,T22] ( 2, 8 ) byref -> x20 V90._pointer(offs=0x00) P-INDEP "field V90._pointer (fldOffset=0x0)" ; V116 tmp65 [V116,T26] ( 2, 8 ) int -> x25 V90._length(offs=0x08) P-INDEP "field V90._length (fldOffset=0x8)" ; V117 tmp66 [V117,T23] ( 2, 8 ) byref -> x20 V94._value(offs=0x00) P-INDEP "field V94._value (fldOffset=0x0)" ; V118 tmp67 [V118,T89] ( 2, 0 ) ref -> x1 "argument with side effect" ; V119 tmp68 [V119,T90] ( 2, 0 ) ref -> x0 "argument with side effect" ; V120 tmp69 [V120,T91] ( 2, 0 ) ref -> x21 "argument with side effect" ; V121 tmp70 [V121,T92] ( 2, 0 ) ref -> x3 "argument with side effect" ; V122 tmp71 [V122,T93] ( 2, 0 ) ref -> x0 "argument with side effect" ; V123 tmp72 [V123,T94] ( 2, 0 ) ref -> x20 "argument with side effect" ; V124 tmp73 [V124,T95] ( 2, 0 ) ref -> x2 "argument with side effect" ; V125 tmp74 [V125,T42] ( 3, 3 ) ref -> x1 "arr expr" ; V126 tmp75 [V126,T96] ( 2, 0 ) ref -> x0 "argument with side effect" ; V127 tmp76 [V127,T97] ( 2, 0 ) ref -> x1 "argument with side effect" ; V128 tmp77 [V128,T02] ( 3, 24 ) ref -> x1 "arr expr" ; V129 tmp78 [V129,T43] ( 3, 3 ) ref -> x0 "arr expr" ; V130 tmp79 [V130,T44] ( 3, 3 ) ref -> x0 "arr expr" ; V131 tmp80 [V131,T45] ( 3, 3 ) ref -> x0 "arr expr" ; V132 tmp81 [V132,T46] ( 3, 3 ) ref -> x0 "arr expr" ; V133 tmp82 [V133,T98] ( 2, 0 ) ref -> x0 "argument with side effect" ; V134 tmp83 [V134,T99] ( 2, 0 ) ref -> x1 "argument with side effect" ; V135 tmp84 [V135,T60] ( 2, 2 ) long -> x27 "Cast away GC" ; V136 tmp85 [V136,T03] ( 3, 24 ) ref -> x0 "arr expr" ; V137 tmp86 [V137,T11] ( 3, 12 ) ref -> x2 "arr expr" ; V138 tmp87 [V138,T100] ( 2, 0 ) ref -> x0 "argument with side effect" ; V139 tmp88 [V139,T101] ( 2, 0 ) ref -> x20 "argument with side effect" ; V140 tmp89 [V140,T102] ( 2, 0 ) ref -> x2 "argument with side effect" ; V141 cse0 [V141,T13] ( 3, 12 ) int -> x1 "CSE - moderate" ;* V142 cse1 [V142,T39] ( 0, 0 ) long -> zero-ref "CSE - moderate" ; V143 cse2 [V143,T12] ( 3, 12 ) ref -> x1 "CSE - moderate" ; V144 cse3 [V144,T47] ( 3, 3 ) ref -> x1 "CSE - moderate" ; V145 cse4 [V145,T62] ( 3, 1.50) ref -> x1 "CSE - conservative" ; V146 cse5 [V146,T27] ( 7, 7 ) ref -> x26 "CSE - moderate" ; V147 cse6 [V147,T14] ( 3, 12 ) long -> x1 "CSE - moderate" ; V148 cse7 [V148,T33] ( 10, 5 ) int -> x24 "CSE - moderate" ; V149 cse8 [V149,T28] ( 4, 6.50) long -> x23 "CSE - moderate" ; V150 cse9 [V150,T35] ( 2, 4.50) long -> x24 "CSE - moderate" ; V151 cse10 [V151,T15] ( 3, 12 ) long -> x0 "CSE - moderate" ; V152 cse11 [V152,T32] ( 3, 6 ) int -> x1 "CSE - moderate" ; V153 cse12 [V153,T67] ( 3, 1 ) int -> x1 "CSE - conservative" ; V154 rat0 [V154,T49] ( 3, 3 ) int -> x22 "ReplaceWithLclVar is creating a new local variable" ; ; Lcl frame size = 8 G_M40488_IG01: stp fp, lr, [sp,#-144]! stp d8, d9, [sp,#24] stp d10, d11, [sp,#40] stp d12, d13, [sp,#56] stp x19, x20, [sp,#72] stp x21, x22, [sp,#88] stp x23, x24, [sp,#104] stp x25, x26, [sp,#120] str x27, [sp,#136] mov fp, sp str xzr, [fp,#16] // [V40 loc37] mov x19, x0 mov x21, x1 mov w20, w2 ;; bbWeight=1 PerfScore 12.00 G_M40488_IG02: cbz x21, G_M40488_IG36 ;; bbWeight=1 PerfScore 1.00 G_M40488_IG03: cmp w20, #0 blt G_M40488_IG37 ;; bbWeight=1 PerfScore 1.50 G_M40488_IG04: ldr x22, [x21] ldr w0, [x22] tst w0, #0xd1ffab1e cset x0, ne movz x23, #0xd1ffab1e movk x23, #0xd1ffab1e LSL #16 movk x23, #0xd1ffab1e LSL #32 ldr x1, [x23] mov x2, x1 cbnz w0, G_M40488_IG06 ;; bbWeight=1 PerfScore 13.00 G_M40488_IG05: mov x0, x2 bl System.Diagnostics.Debug:Fail(System.String,System.String) ;; bbWeight=0.25 PerfScore 0.38 G_M40488_IG06: ldr w1, [x22,#4] sub w1, w1, #24 lsr w2, w1, #3 cbnz w2, G_M40488_IG09 ;; bbWeight=1 PerfScore 5.50 G_M40488_IG07: mov x1, x21 movz x0, #0xd1ffab1e movk x0, #0xd1ffab1e LSL #16 movk x0, #0xd1ffab1e LSL #32 bl CORINFO_HELP_ISINSTANCEOFARRAY mov x22, x0 cbz x22, G_M40488_IG11 ;; bbWeight=1 PerfScore 4.50 G_M40488_IG08: ldr w24, [x19,#16] mov w4, w24 and w25, w4, #31 cbnz w25, G_M40488_IG10 ldr x26, [x19,#8] ldr w4, [x26,#8] mov x0, x26 mov x2, x22 mov w3, w20 mov w1, #0 bl System.Array:Copy(System.Array,int,System.Array,int,int) b G_M40488_IG33 ;; bbWeight=0.50 PerfScore 7.50 G_M40488_IG09: cmp w2, #1 bne G_M40488_IG38 b G_M40488_IG07 ;; bbWeight=0.50 PerfScore 1.25 G_M40488_IG10: sub w0, w24, #1 asr w21, w0, #5 ldr x26, [x19,#8] mov x0, x26 mov w4, w21 mov x2, x22 mov w3, w20 mov w1, #0 bl System.Array:Copy(System.Array,int,System.Array,int,int) ldr x1, [x19,#8] ldr w0, [x1,#8] cmp w21, w0 bhs G_M40488_IG44 sxtw x0, w21 lsl x0, x0, #2 add x0, x0, #16 ldr w1, [x1, x0] mov w0, #1 lsl w0, w0, w25 sub w0, w0, #1 and w1, w1, w0 add w0, w20, w21 ldr w2, [x22,#8] cmp w0, w2 bhs G_M40488_IG44 add w0, w20, w21 sxtw x0, w0 lsl x0, x0, #2 add x0, x0, #16 str w1, [x22, x0] b G_M40488_IG33 ;; bbWeight=0.50 PerfScore 16.00 G_M40488_IG11: mov x1, x21 movz x0, #0xd1ffab1e movk x0, #0xd1ffab1e LSL #16 movk x0, #0xd1ffab1e LSL #32 bl CORINFO_HELP_ISINSTANCEOFARRAY cbz x0, G_M40488_IG27 ldr w24, [x19,#16] mov w1, w24 add w1, w1, #7 lsr w22, w1, #3 ldr w1, [x21,#8] cmp w1, #0 blt G_M40488_IG35 sub w1, w1, w20 cmp w1, w22 blt G_M40488_IG39 ;; bbWeight=0.50 PerfScore 7.75 G_M40488_IG12: and w21, w24, #7 cbz w21, G_M40488_IG13 sub w22, w22, #1 ;; bbWeight=0.50 PerfScore 1.00 G_M40488_IG13: ldr w1, [x0,#8] cmp w1, w20 blo G_M40488_IG41 ;; bbWeight=0.25 PerfScore 1.12 G_M40488_IG14: add x24, x0, #16 sub w25, w1, w20 ldr x1, [x23] mov x0, x1 cmp w25, #0 bge G_M40488_IG16 ;; bbWeight=0.50 PerfScore 3.00 G_M40488_IG15: bl System.Diagnostics.Debug:Fail(System.String,System.String) ;; bbWeight=0.25 PerfScore 0.25 G_M40488_IG16: sxtw x0, w20 add x20, x0, x24 lsr w26, w22, #2 and w22, w22, #3 mov w24, #0 cmp w26, #0 ble G_M40488_IG22 ;; bbWeight=0.50 PerfScore 2.25 G_M40488_IG17: mov x0, x20 ldr x1, [x19,#8] ldr w2, [x1,#8] cmp w24, w2 bhs G_M40488_IG44 sxtw x2, w24 lsl x2, x2, #2 add x2, x2, #16 ldr w1, [x1, x2] cmp w25, #4 blo G_M40488_IG40 ;; bbWeight=4 PerfScore 58.00 G_M40488_IG18: str w1, [x0] cmp w25, #4 blo G_M40488_IG41 ;; bbWeight=4 PerfScore 10.00 G_M40488_IG19: sub w25, w25, #4 ldr x1, [x23] mov x0, x1 cmp w25, #0 bge G_M40488_IG21 ;; bbWeight=4 PerfScore 22.00 G_M40488_IG20: bl System.Diagnostics.Debug:Fail(System.String,System.String) ;; bbWeight=1 PerfScore 1.00 G_M40488_IG21: add x20, x20, #4 add w24, w24, #1 cmp w24, w26 blt G_M40488_IG17 ;; bbWeight=4 PerfScore 10.00 G_M40488_IG22: cbz w21, G_M40488_IG23 cmp w22, w25 bhs G_M40488_IG44 sxtw x1, w22 ldr x0, [x19,#8] ldr w2, [x0,#8] cmp w26, w2 bhs G_M40488_IG44 sxtw x2, w26 lsl x2, x2, #2 add x2, x2, #16 ldr w0, [x0, x2] lsl w2, w22, #3 asr w0, w0, w2 mov w2, #1 lsl w2, w2, w21 sub w2, w2, #1 and w0, w0, w2 strb w0, [x20, x1] ;; bbWeight=0.50 PerfScore 10.00 G_M40488_IG23: sub w22, w22, #1 cmp w22, #2 bhi G_M40488_IG33 mov w0, w22 adr x1, [@RWD00] ldr w1, [x1, x0, LSL #2] adr x2, [G_M40488_IG02] add x1, x1, x2 br x1 ;; bbWeight=0.50 PerfScore 4.00 G_M40488_IG24: cmp w25, #2 bls G_M40488_IG44 ldr x0, [x19,#8] ldr w1, [x0,#8] cmp w26, w1 bhs G_M40488_IG44 sxtw x1, w26 lsl x1, x1, #2 add x1, x1, #16 ldr w0, [x0, x1] asr w0, w0, #16 strb w0, [x20,#2] ;; bbWeight=0.50 PerfScore 8.00 G_M40488_IG25: cmp w25, #1 bls G_M40488_IG44 ldr x0, [x19,#8] ldr w1, [x0,#8] cmp w26, w1 bhs G_M40488_IG44 sxtw x1, w26 lsl x1, x1, #2 add x1, x1, #16 ldr w0, [x0, x1] asr w0, w0, #8 strb w0, [x20,#1] ;; bbWeight=0.50 PerfScore 8.00 G_M40488_IG26: cmp w25, #0 bls G_M40488_IG44 ldr x0, [x19,#8] ldr w1, [x0,#8] cmp w26, w1 bhs G_M40488_IG44 sxtw x1, w26 lsl x1, x1, #2 add x1, x1, #16 ldrb w0, [x0, x1] strb w0, [x20] b G_M40488_IG33 ;; bbWeight=0.50 PerfScore 8.00 G_M40488_IG27: mov x1, x21 movz x0, #0xd1ffab1e movk x0, #0xd1ffab1e LSL #16 movk x0, #0xd1ffab1e LSL #32 bl CORINFO_HELP_ISINSTANCEOFARRAY mov x23, x0 cbz x23, G_M40488_IG43 ldr w0, [x21,#8] cmp w0, #0 blt G_M40488_IG35 sub w0, w0, w20 ldr w24, [x19,#16] cmp w0, w24 blt G_M40488_IG42 ;; bbWeight=0.50 PerfScore 7.00 G_M40488_IG28: mov w21, #0 cmp w24, #32 blt G_M40488_IG32 movi v8.16b, #0x01 ldr w0, [x23,#8] cmp w20, w0 bhs G_M40488_IG44 sxtw x0, w20 add x0, x0, #16 add x0, x23, x0 str x0, [fp,#16] // [V40 loc37] ldr x27, [fp,#16] // [V40 loc37] cmp w24, #32 blo G_M40488_IG30 ldr x26, [x19,#8] movz x24, #0xd1ffab1e movk x24, #0xd1ffab1e LSL #16 movk x24, #0xd1ffab1e LSL #32 ;; bbWeight=0.50 PerfScore 8.75 G_M40488_IG29: mov x0, x26 lsr w1, w21, #5 ldr w2, [x0,#8] cmp w1, w2 bhs G_M40488_IG44 sxtw x1, w1 lsl x1, x1, #2 add x1, x1, #16 ldr w0, [x0, x1] dup v9.4s, w0 zip1 v9.16b, v9.16b, v9.16b zip1 v9.16b, v9.16b, v9.16b zip1 v10.16b, v9.16b, v9.16b mov x0, x24 mov w1, #7 mov v11.d[0], v9.d[1] mov v12.d[0], v8.d[1] mov v13.d[0], v10.d[1] bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE movz x0, #0xd1ffab1e movk x0, #0xd1ffab1e LSL #16 movk x0, #0xd1ffab1e LSL #32 ldr x1, [x0] ldr q16, [x1,#8] mov v10.d[1], v13.d[0] and v16.16b, v10.16b, v16.16b mov v8.d[1], v12.d[0] umin v16.16b, v16.16b, v8.16b mov w1, w21 add x1, x27, x1 st1 {v16.16b}, [x1] mov v9.d[1], v11.d[0] zip2 v16.16b, v9.16b, v9.16b ldr x0, [x0] ldr q17, [x0,#8] and v16.16b, v16.16b, v17.16b umin v16.16b, v16.16b, v8.16b add x0, x1, #16 st1 {v16.16b}, [x0] add w21, w21, #32 add w0, w21, #32 ldr w1, [x19,#16] cmp w0, w1 bls G_M40488_IG29 ;; bbWeight=4 PerfScore 202.00 G_M40488_IG30: mov x0, #0 str x0, [fp,#16] // [V40 loc37] ldr w0, [x19,#16] cmp w21, w0 bhs G_M40488_IG33 ;; bbWeight=0.50 PerfScore 3.00 G_M40488_IG31: lsr w0, w21, #5 and w1, w21, #31 ldr x2, [x19,#8] ldr w3, [x2,#8] cmp w0, w3 bhs G_M40488_IG44 sxtw x0, w0 lsl x0, x0, #2 add x0, x0, #16 ldr w0, [x2, x0] asr w0, w0, w1 tst w0, #1 cset x0, ne add w1, w20, w21 ldr w2, [x23,#8] cmp w1, w2 bhs G_M40488_IG44 sxtw x1, w1 add x1, x1, #16 strb w0, [x23, x1] add w21, w21, #1 ;; bbWeight=2 PerfScore 46.00 G_M40488_IG32: ldr w0, [x19,#16] cmp w21, w0 blo G_M40488_IG31 ;; bbWeight=4 PerfScore 18.00 G_M40488_IG33: ldr x27, [sp,#136] ldp x25, x26, [sp,#120] ldp x23, x24, [sp,#104] ldp x21, x22, [sp,#88] ldp x19, x20, [sp,#72] ldp d12, d13, [sp,#56] ldp d10, d11, [sp,#40] ldp d8, d9, [sp,#24] ldp fp, lr, [sp],#144 ret lr ;; bbWeight=1 PerfScore 11.00 G_M40488_IG34: bl CORINFO_HELP_THROWDIVZERO ;; bbWeight=0 PerfScore 0.00 G_M40488_IG35: bl CORINFO_HELP_OVERFLOW ;; bbWeight=0 PerfScore 0.00 G_M40488_IG36: movz x0, #0xd1ffab1e movk x0, #0xd1ffab1e LSL #16 movk x0, #0xd1ffab1e LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 mov w0, #0xd1ffab1e movz x1, #0xd1ffab1e movk x1, #0xd1ffab1e LSL #16 movk x1, #0xd1ffab1e LSL #32 bl CORINFO_HELP_STRCNS mov x1, x0 mov x0, x19 bl System.ArgumentNullException:.ctor(System.String):this mov x0, x19 bl CORINFO_HELP_THROW ;; bbWeight=0 PerfScore 0.00 G_M40488_IG37: movz x0, #0xd1ffab1e movk x0, #0xd1ffab1e LSL #16 movk x0, #0xd1ffab1e LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 str w20, [x19,#8] movz x0, #0xd1ffab1e movk x0, #0xd1ffab1e LSL #16 movk x0, #0xd1ffab1e LSL #32 bl CORINFO_HELP_NEWSFAST mov x20, x0 mov w0, #0xd1ffab1e movz x1, #0xd1ffab1e movk x1, #0xd1ffab1e LSL #16 movk x1, #0xd1ffab1e LSL #32 bl CORINFO_HELP_STRCNS mov x21, x0 mov w0, #129 movz x1, #0xd1ffab1e movk x1, #0xd1ffab1e LSL #16 movk x1, #0xd1ffab1e LSL #32 bl CORINFO_HELP_STRCNS mov x1, #0 bl System.SR:GetResourceString(System.String,System.String):System.String mov x3, x0 mov x1, x21 mov x2, x19 mov x0, x20 bl System.ArgumentOutOfRangeException:.ctor(System.String,System.Object,System.String):this mov x0, x20 bl CORINFO_HELP_THROW ;; bbWeight=0 PerfScore 0.00 G_M40488_IG38: movz x0, #0xd1ffab1e movk x0, #0xd1ffab1e LSL #16 movk x0, #0xd1ffab1e LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 mov w0, #0xd1ffab1e movz x1, #0xd1ffab1e movk x1, #0xd1ffab1e LSL #16 movk x1, #0xd1ffab1e LSL #32 bl CORINFO_HELP_STRCNS mov x1, #0 bl System.SR:GetResourceString(System.String,System.String):System.String mov x20, x0 mov w0, #0xd1ffab1e movz x1, #0xd1ffab1e movk x1, #0xd1ffab1e LSL #16 movk x1, #0xd1ffab1e LSL #32 bl CORINFO_HELP_STRCNS mov x2, x0 mov x1, x20 mov x0, x19 bl System.ArgumentException:.ctor(System.String,System.String):this mov x0, x19 bl CORINFO_HELP_THROW ;; bbWeight=0 PerfScore 0.00 G_M40488_IG39: movz x0, #0xd1ffab1e movk x0, #0xd1ffab1e LSL #16 movk x0, #0xd1ffab1e LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 mov w0, #0xd1ffab1e movz x1, #0xd1ffab1e movk x1, #0xd1ffab1e LSL #16 movk x1, #0xd1ffab1e LSL #32 bl CORINFO_HELP_STRCNS mov x1, #0 bl System.SR:GetResourceString(System.String,System.String):System.String mov x1, x0 mov x0, x19 bl System.ArgumentException:.ctor(System.String):this mov x0, x19 bl CORINFO_HELP_THROW ;; bbWeight=0 PerfScore 0.00 G_M40488_IG40: mov w0, #40 bl System.ThrowHelper:ThrowArgumentOutOfRangeException(int) brk #0 ;; bbWeight=0 PerfScore 0.00 G_M40488_IG41: bl System.ThrowHelper:ThrowArgumentOutOfRangeException() brk #0 ;; bbWeight=0 PerfScore 0.00 G_M40488_IG42: movz x0, #0xd1ffab1e movk x0, #0xd1ffab1e LSL #16 movk x0, #0xd1ffab1e LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 mov w0, #0xd1ffab1e movz x1, #0xd1ffab1e movk x1, #0xd1ffab1e LSL #16 movk x1, #0xd1ffab1e LSL #32 bl CORINFO_HELP_STRCNS mov x1, #0 bl System.SR:GetResourceString(System.String,System.String):System.String mov x1, x0 mov x0, x19 bl System.ArgumentException:.ctor(System.String):this mov x0, x19 bl CORINFO_HELP_THROW ;; bbWeight=0 PerfScore 0.00 G_M40488_IG43: movz x0, #0xd1ffab1e movk x0, #0xd1ffab1e LSL #16 movk x0, #0xd1ffab1e LSL #32 bl CORINFO_HELP_NEWSFAST mov x19, x0 mov w0, #0xd1ffab1e movz x1, #0xd1ffab1e movk x1, #0xd1ffab1e LSL #16 movk x1, #0xd1ffab1e LSL #32 bl CORINFO_HELP_STRCNS mov x1, #0 bl System.SR:GetResourceString(System.String,System.String):System.String mov x20, x0 mov w0, #0xd1ffab1e movz x1, #0xd1ffab1e movk x1, #0xd1ffab1e LSL #16 movk x1, #0xd1ffab1e LSL #32 bl CORINFO_HELP_STRCNS mov x2, x0 mov x1, x20 mov x0, x19 bl System.ArgumentException:.ctor(System.String,System.String):this mov x0, x19 bl CORINFO_HELP_THROW ;; bbWeight=0 PerfScore 0.00 G_M40488_IG44: bl CORINFO_HELP_RNGCHKFAIL brk #0 ;; bbWeight=0 PerfScore 0.00 RWD00 dd G_M40488_IG26 - G_M40488_IG02 dd G_M40488_IG25 - G_M40488_IG02 dd G_M40488_IG24 - G_M40488_IG02 ; Total bytes of code 1848, prolog size 56, PerfScore 697.55, (MethodHash=7d6661d7) for method System.Collections.BitArray:CopyTo(System.Array,int):this ; ============================================================ ; Assembly listing for method System.Collections.BitArray:Not():System.Collections.BitArray:this ; Emitting BLENDED_CODE for generic ARM64 CPU - Unix ; optimized code ; fp based frame ; fully interruptible ; Final local variable assignments ; ; V00 this [V00,T06] ( 7, 7 ) ref -> x0 this class-hnd ; V01 loc0 [V01,T01] ( 27, 21 ) ref -> x1 class-hnd ; V02 loc1 [V02,T03] ( 7, 12 ) int -> x2 ; V03 loc2 [V03,T00] ( 11, 31 ) int -> x3 ;* V04 loc3 [V04 ] ( 0, 0 ) struct (32) zero-ref do-not-enreg[S] ;* V05 loc4 [V05 ] ( 0, 0 ) long -> zero-ref ; V06 loc5 [V06 ] ( 5, 2.50) ref -> [fp+0x18] must-init pinned class-hnd ;* V07 loc6 [V07 ] ( 0, 0 ) struct (32) zero-ref do-not-enreg[S] ;* V08 loc7 [V08 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ;* V09 loc8 [V09 ] ( 0, 0 ) long -> zero-ref ;* V10 loc9 [V10 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ; V11 loc10 [V11,T09] ( 3, 3 ) long -> x4 ; V12 loc11 [V12,T18] ( 2, 4 ) simd16 -> d16 HFA(simd16) ;# V13 OutArgs [V13 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; V14 tmp1 [V14,T02] ( 2, 16 ) int -> x6 "Strict ordering of exceptions for Array store" ; V15 tmp2 [V15,T10] ( 2, 2 ) int -> x2 "Strict ordering of exceptions for Array store" ; V16 tmp3 [V16,T11] ( 2, 2 ) int -> x2 "Strict ordering of exceptions for Array store" ; V17 tmp4 [V17,T12] ( 2, 2 ) int -> x2 "Strict ordering of exceptions for Array store" ; V18 tmp5 [V18,T13] ( 2, 2 ) int -> x2 "Strict ordering of exceptions for Array store" ; V19 tmp6 [V19,T14] ( 2, 2 ) int -> x2 "Strict ordering of exceptions for Array store" ; V20 tmp7 [V20,T15] ( 2, 2 ) int -> x2 "Strict ordering of exceptions for Array store" ; V21 tmp8 [V21,T16] ( 2, 2 ) int -> x2 "Strict ordering of exceptions for Array store" ; V22 tmp9 [V22,T08] ( 2, 4 ) int -> x2 "Inlining Arg" ; V23 tmp10 [V23,T17] ( 2, 2 ) long -> x4 "Cast away GC" ; V24 cse0 [V24,T04] ( 3, 12 ) long -> x5 "CSE - aggressive" ; V25 cse1 [V25,T07] ( 3, 6 ) long -> x5 "CSE - aggressive" ; V26 cse2 [V26,T05] ( 16, 11.50) int -> x4 "CSE - aggressive" ; ; Lcl frame size = 16 G_M14226_IG01: stp fp, lr, [sp,#-32]! mov fp, sp str xzr, [fp,#24] // [V06 loc5] ;; bbWeight=1 PerfScore 2.50 G_M14226_IG02: ldr x1, [x0,#8] ldr w2, [x0,#16] add w2, w2, #31 lsr w2, w2, #5 cmp w2, #7 bhi G_M14226_IG10 mov w4, w2 adr x2, [@RWD00] ldr w2, [x2, x4, LSL #2] adr x3, [G_M14226_IG02] add x2, x2, x3 br x2 ;; bbWeight=1 PerfScore 15.00 G_M14226_IG03: ldr w4, [x1,#8] cmp w4, #6 bls G_M14226_IG19 ldr w4, [x1,#40] mvn w2, w4 str w2, [x1,#40] ;; bbWeight=0.50 PerfScore 4.50 G_M14226_IG04: ldr w4, [x1,#8] cmp w4, #5 bls G_M14226_IG19 ldr w4, [x1,#36] mvn w2, w4 str w2, [x1,#36] ;; bbWeight=0.50 PerfScore 4.50 G_M14226_IG05: ldr w4, [x1,#8] cmp w4, #4 bls G_M14226_IG19 ldr w4, [x1,#32] mvn w2, w4 str w2, [x1,#32] ;; bbWeight=0.50 PerfScore 4.50 G_M14226_IG06: ldr w4, [x1,#8] cmp w4, #3 bls G_M14226_IG19 ldr w4, [x1,#28] mvn w2, w4 str w2, [x1,#28] ;; bbWeight=0.50 PerfScore 4.50 G_M14226_IG07: ldr w4, [x1,#8] cmp w4, #2 bls G_M14226_IG19 ldr w4, [x1,#24] mvn w2, w4 str w2, [x1,#24] ;; bbWeight=0.50 PerfScore 4.50 G_M14226_IG08: ldr w4, [x1,#8] cmp w4, #1 bls G_M14226_IG19 ldr w4, [x1,#20] mvn w2, w4 str w2, [x1,#20] ;; bbWeight=0.50 PerfScore 4.50 G_M14226_IG09: ldr w4, [x1,#8] cmp w4, #0 bls G_M14226_IG19 ldr w2, [x1,#16] mvn w2, w2 str w2, [x1,#16] b G_M14226_IG17 ;; bbWeight=0.50 PerfScore 5.00 G_M14226_IG10: mov w3, #0 str x1, [fp,#24] // [V06 loc5] cbz x1, G_M14226_IG11 ldr x4, [fp,#24] // [V06 loc5] ldr w4, [x4,#8] cbnz w4, G_M14226_IG12 ;; bbWeight=0.50 PerfScore 4.25 G_M14226_IG11: mov x4, #0 b G_M14226_IG14 ;; bbWeight=0.50 PerfScore 0.75 G_M14226_IG12: ldr x4, [fp,#24] // [V06 loc5] ldr w4, [x4,#8] cmp w4, #0 bls G_M14226_IG19 ldr x4, [fp,#24] // [V06 loc5] add x4, x4, #16 sub w5, w2, #3 cmp w5, #0 bls G_M14226_IG15 ;; bbWeight=0.50 PerfScore 5.50 G_M14226_IG13: mov w5, w3 lsl x5, x5, #2 add x5, x4, x5 ld1 {v16.4s}, [x5] mvn v16.16b, v16.16b st1 {v16.4s}, [x5] add w3, w3, #4 ;; bbWeight=2 PerfScore 14.00 G_M14226_IG14: sub w5, w2, #3 cmp w3, w5 blo G_M14226_IG13 ;; bbWeight=4 PerfScore 8.00 G_M14226_IG15: mov x4, #0 str x4, [fp,#24] // [V06 loc5] cmp w3, w2 bhs G_M14226_IG17 ldr w4, [x1,#8] ;; bbWeight=0.50 PerfScore 3.00 G_M14226_IG16: cmp w3, w4 bhs G_M14226_IG19 sxtw x5, w3 lsl x5, x5, #2 add x5, x5, #16 ldr w6, [x1, x5] mvn w6, w6 str w6, [x1, x5] add w3, w3, #1 cmp w3, w2 blo G_M14226_IG16 ;; bbWeight=4 PerfScore 40.00 G_M14226_IG17: ldr w1, [x0,#20] add w3, w1, #1 str w3, [x0,#20] ;; bbWeight=1 PerfScore 4.50 G_M14226_IG18: ldp fp, lr, [sp],#32 ret lr ;; bbWeight=1 PerfScore 2.00 G_M14226_IG19: bl CORINFO_HELP_RNGCHKFAIL brk #0 ;; bbWeight=0 PerfScore 0.00 RWD00 dd G_M14226_IG17 - G_M14226_IG02 dd G_M14226_IG09 - G_M14226_IG02 dd G_M14226_IG08 - G_M14226_IG02 dd G_M14226_IG07 - G_M14226_IG02 dd G_M14226_IG06 - G_M14226_IG02 dd G_M14226_IG05 - G_M14226_IG02 dd G_M14226_IG04 - G_M14226_IG02 dd G_M14226_IG03 - G_M14226_IG02 ; Total bytes of code 432, prolog size 12, PerfScore 174.70, (MethodHash=1f77c86d) for method System.Collections.BitArray:Not():System.Collections.BitArray:this ; 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