****** START compiling Program:Main(ref) (MethodHash=c8bc16f0) Generating code for Windows x64 OPTIONS: Tier-1 compilation OPTIONS: compCodeOpt = FAST_CODE OPTIONS: compDbgCode = false OPTIONS: compDbgInfo = true OPTIONS: compDbgEnC = false OPTIONS: compProcedureSplitting = false OPTIONS: compProcedureSplittingEH = false OPTIONS: No PGO data IL to import: IL_0000 22 00 00 80 bf ldc.r4 -1.000000 IL_0005 22 00 00 80 3f ldc.r4 1.000000 IL_000a 73 0f 00 00 0a newobj 0xA00000F IL_000f 12 00 ldloca.s 0x0 IL_0011 22 00 00 80 3f ldc.r4 1.000000 IL_0016 22 00 00 80 bf ldc.r4 -1.000000 IL_001b 28 0f 00 00 0a call 0xA00000F IL_0020 06 ldloc.0 IL_0021 28 01 00 00 06 call 0x6000001 IL_0026 28 10 00 00 0a call 0xA000010 IL_002b 22 00 00 00 c0 ldc.r4 -2.000000 IL_0030 22 00 00 00 40 ldc.r4 2.000000 IL_0035 73 0f 00 00 0a newobj 0xA00000F IL_003a 12 01 ldloca.s 0x1 IL_003c 22 00 00 00 40 ldc.r4 2.000000 IL_0041 22 00 00 00 c0 ldc.r4 -2.000000 IL_0046 28 0f 00 00 0a call 0xA00000F IL_004b 07 ldloc.1 IL_004c 28 02 00 00 06 call 0x6000002 IL_0051 28 10 00 00 0a call 0xA000010 IL_0056 2a ret lvaSetClass: setting class for V00 to (00007FFA0E2B6C68) (null) Arg #0 passed in register(s) rcx SIMD Candidate Type System.Numerics.Vector2 Found Vector2 Known type Vector2 lvaGrabTemp returning 3 (V03 tmp0) (a long lifetime temp) called for OutgoingArgSpace. ; Initial local variable assignments ; ; V00 arg0 ref class-hnd ; V01 loc0 simd8 ; V02 loc1 simd8 ; V03 OutArgs lclBlk "OutgoingArgSpace" *************** In compInitDebuggingInfo() for Program:Main(ref) getVars() returned cVars = 0, extendOthers = true info.compVarScopesCount = 3 VarNum LVNum Name Beg End 0: 00h 00h V00 arg0 000h 057h 1: 01h 01h V01 loc0 000h 057h 2: 02h 02h V02 loc1 000h 057h info.compStmtOffsetsCount = 0 info.compStmtOffsetsImplicit = 0005h ( STACK_EMPTY CALL_SITE ) *************** In fgFindBasicBlocks() for Program:Main(ref) Jump targets: none New Basic Block BB01 [0000] created. BB01 [000..057) IL Code Size,Instr 87, 21, Basic Block count 1, Local Variable Num,Ref count 4, 4 for method Program:Main(ref) OPTIONS: opts.MinOpts() == false Basic block list for 'Program:Main(ref)' ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) ----------------------------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Pre-import *************** Finishing PHASE Pre-import *************** Starting PHASE Profile incorporation BBOPT set, but no profile data available (hr=80004001) *************** Finishing PHASE Profile incorporation [no changes] *************** Starting PHASE Importation *************** In impImport() for Program:Main(ref) impImportBlockPending for BB01 Importing BB01 (PC=000) of 'Program:Main(ref)' [ 0] 0 (0x000) ldc.r4 -1.0000000000000000 [ 1] 5 (0x005) ldc.r4 1.0000000000000000 [ 2] 10 (0x00a) newobj lvaGrabTemp returning 4 (V04 tmp1) called for NewObj constructor temp. Known type Vector2 STMT00000 (IL 0x000... ???) [000004] IA---------- * ASG simd8 (init) [000002] D------N---- +--* LCL_VAR simd8 V04 tmp1 [000003] ------------ \--* CNS_INT int 0 0A00000F In Compiler::impImportCall: opcode is newobj, kind=0, callRetType is void, structSize is 0 Named Intrinsic System.Numerics.Vector2..ctor: Notify VM instruction set (AVX2) must be supported. Not recognized Known type Vector2 Method .ctor maps to SIMD intrinsic initN Notify VM instruction set (SSE2) must be supported. Known type Vector2 STMT00001 (IL ???... ???) [000012] -A--G------- * ASG simd8 (copy) [000011] ----G--N---- +--* BLK simd8 <8> [000006] ------------ | \--* ADDR byref [000005] -------N---- | \--* LCL_VAR simd8 V04 tmp1 [000010] -------N---- \--* SIMD simd8 float initN [000008] ------------ \--* LIST float [000000] ------------ +--* CNS_DBL float -1.0000000000000000 [000007] ------------ \--* LIST float [000001] ------------ \--* CNS_DBL float 1.0000000000000000 [ 1] 15 (0x00f) ldloca.s 0 [ 2] 17 (0x011) ldc.r4 1.0000000000000000 [ 3] 22 (0x016) ldc.r4 -1.0000000000000000 [ 4] 27 (0x01b) call 0A00000F In Compiler::impImportCall: opcode is call, kind=0, callRetType is void, structSize is 0 Named Intrinsic System.Numerics.Vector2..ctor: Not recognized Known type Vector2 Method .ctor maps to SIMD intrinsic initN Known type Vector2 STMT00002 (IL 0x00F... ???) [000021] -A--G------- * ASG simd8 (copy) [000020] ----G--N---- +--* BLK simd8 <8> [000014] ------------ | \--* ADDR byref [000013] -------N---- | \--* LCL_VAR simd8 V01 loc0 [000019] -------N---- \--* SIMD simd8 float initN [000018] ------------ \--* LIST float [000015] ------------ +--* CNS_DBL float 1.0000000000000000 [000017] ------------ \--* LIST float [000016] ------------ \--* CNS_DBL float -1.0000000000000000 [ 1] 32 (0x020) ldloc.0 [ 2] 33 (0x021) call 06000001 In Compiler::impImportCall: opcode is call, kind=0, callRetType is float, structSize is 0 Calling impNormStructVal on: [000022] ------------ * LCL_VAR simd8 V01 loc0 Known type Vector2 resulting tree: [000025] n----------- * OBJ simd8 [000024] ------------ \--* ADDR byref [000022] -------N---- \--* LCL_VAR simd8 V01 loc0 Calling impNormStructVal on: [000009] ------------ * LCL_VAR simd8 V04 tmp1 Known type Vector2 resulting tree: [000027] n----------- * OBJ simd8 [000026] ------------ \--* ADDR byref [000009] -------N---- \--* LCL_VAR simd8 V04 tmp1 STMT00003 (IL 0x020... ???) [000023] I-C-G------- * CALL float Program.Distance (exactContextHnd=0x00007FFA0E2B7A89) [000027] n----------- arg0 +--* OBJ simd8 [000026] ------------ | \--* ADDR byref [000009] -------N---- | \--* LCL_VAR simd8 V04 tmp1 [000025] n----------- arg1 \--* OBJ simd8 [000024] ------------ \--* ADDR byref [000022] -------N---- \--* LCL_VAR simd8 V01 loc0 [ 1] 38 (0x026) call 0A000010 In Compiler::impImportCall: opcode is call, kind=0, callRetType is void, structSize is 0 INLINER: during 'impMarkInlineCandidate' result 'failed this callee' reason 'noinline per IL/cached result' for 'Program:Main(ref)' calling 'Console:WriteLine(float)' INLINER: during 'impMarkInlineCandidate' result 'failed this callee' reason 'noinline per IL/cached result' STMT00004 (IL ???... ???) [000029] --C-G------- * CALL void Console.WriteLine [000028] --C--------- arg0 \--* RET_EXPR float (inl return from call [000023]) [ 0] 43 (0x02b) ldc.r4 -2.0000000000000000 [ 1] 48 (0x030) ldc.r4 2.0000000000000000 [ 2] 53 (0x035) newobj lvaGrabTemp returning 5 (V05 tmp2) called for NewObj constructor temp. Known type Vector2 STMT00005 (IL 0x02B... ???) [000034] IA---------- * ASG simd8 (init) [000032] D------N---- +--* LCL_VAR simd8 V05 tmp2 [000033] ------------ \--* CNS_INT int 0 0A00000F In Compiler::impImportCall: opcode is newobj, kind=0, callRetType is void, structSize is 0 Named Intrinsic System.Numerics.Vector2..ctor: Not recognized Known type Vector2 Method .ctor maps to SIMD intrinsic initN Known type Vector2 STMT00006 (IL ???... ???) [000042] -A--G------- * ASG simd8 (copy) [000041] ----G--N---- +--* BLK simd8 <8> [000036] ------------ | \--* ADDR byref [000035] -------N---- | \--* LCL_VAR simd8 V05 tmp2 [000040] -------N---- \--* SIMD simd8 float initN [000038] ------------ \--* LIST float [000030] ------------ +--* CNS_DBL float -2.0000000000000000 [000037] ------------ \--* LIST float [000031] ------------ \--* CNS_DBL float 2.0000000000000000 [ 1] 58 (0x03a) ldloca.s 1 [ 2] 60 (0x03c) ldc.r4 2.0000000000000000 [ 3] 65 (0x041) ldc.r4 -2.0000000000000000 [ 4] 70 (0x046) call 0A00000F In Compiler::impImportCall: opcode is call, kind=0, callRetType is void, structSize is 0 Named Intrinsic System.Numerics.Vector2..ctor: Not recognized Known type Vector2 Method .ctor maps to SIMD intrinsic initN Known type Vector2 STMT00007 (IL 0x03A... ???) [000051] -A--G------- * ASG simd8 (copy) [000050] ----G--N---- +--* BLK simd8 <8> [000044] ------------ | \--* ADDR byref [000043] -------N---- | \--* LCL_VAR simd8 V02 loc1 [000049] -------N---- \--* SIMD simd8 float initN [000048] ------------ \--* LIST float [000045] ------------ +--* CNS_DBL float 2.0000000000000000 [000047] ------------ \--* LIST float [000046] ------------ \--* CNS_DBL float -2.0000000000000000 [ 1] 75 (0x04b) ldloc.1 [ 2] 76 (0x04c) call 06000002 In Compiler::impImportCall: opcode is call, kind=0, callRetType is float, structSize is 0 Calling impNormStructVal on: [000052] ------------ * LCL_VAR simd8 V02 loc1 Known type Vector2 resulting tree: [000055] n----------- * OBJ simd8 [000054] ------------ \--* ADDR byref [000052] -------N---- \--* LCL_VAR simd8 V02 loc1 Calling impNormStructVal on: [000039] ------------ * LCL_VAR simd8 V05 tmp2 Known type Vector2 resulting tree: [000057] n----------- * OBJ simd8 [000056] ------------ \--* ADDR byref [000039] -------N---- \--* LCL_VAR simd8 V05 tmp2 STMT00008 (IL 0x04B... ???) [000053] I-C-G------- * CALL float Program.Distance2 (exactContextHnd=0x00007FFA0E2B7A89) [000057] n----------- arg0 +--* OBJ simd8 [000056] ------------ | \--* ADDR byref [000039] -------N---- | \--* LCL_VAR simd8 V05 tmp2 [000055] n----------- arg1 \--* OBJ simd8 [000054] ------------ \--* ADDR byref [000052] -------N---- \--* LCL_VAR simd8 V02 loc1 [ 1] 81 (0x051) call 0A000010 (Implicit Tail call: prefixFlags |= PREFIX_TAILCALL_IMPLICIT) In Compiler::impImportCall: opcode is call, kind=0, callRetType is void, structSize is 0 info.compCompHnd->canTailCall returned false for call [000059] INLINER: during 'impMarkInlineCandidate' result 'failed this callee' reason 'noinline per IL/cached result' for 'Program:Main(ref)' calling 'Console:WriteLine(float)' INLINER: during 'impMarkInlineCandidate' result 'failed this callee' reason 'noinline per IL/cached result' STMT00009 (IL ???... ???) [000059] --C-G------- * CALL void Console.WriteLine [000058] --C--------- arg0 \--* RET_EXPR float (inl return from call [000053]) [ 0] 86 (0x056) ret STMT00010 (IL 0x056... ???) [000060] ------------ * RETURN void *************** Finishing PHASE Importation Trees after Importation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..057) (return), preds={} succs={} ***** BB01 STMT00000 (IL 0x000...0x056) [000004] IA---------- * ASG simd8 (init) [000002] D------N---- +--* LCL_VAR simd8 V04 tmp1 [000003] ------------ \--* CNS_INT int 0 ***** BB01 STMT00001 (IL ???... ???) [000012] -A--G------- * ASG simd8 (copy) [000011] ----G--N---- +--* BLK simd8 <8> [000006] ------------ | \--* ADDR byref [000005] -------N---- | \--* LCL_VAR simd8 V04 tmp1 [000010] -------N---- \--* SIMD simd8 float initN [000008] ------------ \--* LIST float [000000] ------------ +--* CNS_DBL float -1.0000000000000000 [000007] ------------ \--* LIST float [000001] ------------ \--* CNS_DBL float 1.0000000000000000 ***** BB01 STMT00002 (IL 0x00F... ???) [000021] -A--G------- * ASG simd8 (copy) [000020] ----G--N---- +--* BLK simd8 <8> [000014] ------------ | \--* ADDR byref [000013] -------N---- | \--* LCL_VAR simd8 V01 loc0 [000019] -------N---- \--* SIMD simd8 float initN [000018] ------------ \--* LIST float [000015] ------------ +--* CNS_DBL float 1.0000000000000000 [000017] ------------ \--* LIST float [000016] ------------ \--* CNS_DBL float -1.0000000000000000 ***** BB01 STMT00003 (IL 0x020... ???) [000023] I-C-G------- * CALL float Program.Distance (exactContextHnd=0x00007FFA0E2B7A89) [000027] n----------- arg0 +--* OBJ simd8 [000026] ------------ | \--* ADDR byref [000009] -------N---- | \--* LCL_VAR simd8 V04 tmp1 [000025] n----------- arg1 \--* OBJ simd8 [000024] ------------ \--* ADDR byref [000022] -------N---- \--* LCL_VAR simd8 V01 loc0 ***** BB01 STMT00004 (IL ???... ???) [000029] --C-G------- * CALL void Console.WriteLine [000028] --C--------- arg0 \--* RET_EXPR float (inl return from call [000023]) ***** BB01 STMT00005 (IL 0x02B... ???) [000034] IA---------- * ASG simd8 (init) [000032] D------N---- +--* LCL_VAR simd8 V05 tmp2 [000033] ------------ \--* CNS_INT int 0 ***** BB01 STMT00006 (IL ???... ???) [000042] -A--G------- * ASG simd8 (copy) [000041] ----G--N---- +--* BLK simd8 <8> [000036] ------------ | \--* ADDR byref [000035] -------N---- | \--* LCL_VAR simd8 V05 tmp2 [000040] -------N---- \--* SIMD simd8 float initN [000038] ------------ \--* LIST float [000030] ------------ +--* CNS_DBL float -2.0000000000000000 [000037] ------------ \--* LIST float [000031] ------------ \--* CNS_DBL float 2.0000000000000000 ***** BB01 STMT00007 (IL 0x03A... ???) [000051] -A--G------- * ASG simd8 (copy) [000050] ----G--N---- +--* BLK simd8 <8> [000044] ------------ | \--* ADDR byref [000043] -------N---- | \--* LCL_VAR simd8 V02 loc1 [000049] -------N---- \--* SIMD simd8 float initN [000048] ------------ \--* LIST float [000045] ------------ +--* CNS_DBL float 2.0000000000000000 [000047] ------------ \--* LIST float [000046] ------------ \--* CNS_DBL float -2.0000000000000000 ***** BB01 STMT00008 (IL 0x04B... ???) [000053] I-C-G------- * CALL float Program.Distance2 (exactContextHnd=0x00007FFA0E2B7A89) [000057] n----------- arg0 +--* OBJ simd8 [000056] ------------ | \--* ADDR byref [000039] -------N---- | \--* LCL_VAR simd8 V05 tmp2 [000055] n----------- arg1 \--* OBJ simd8 [000054] ------------ \--* ADDR byref [000052] -------N---- \--* LCL_VAR simd8 V02 loc1 ***** BB01 STMT00009 (IL ???... ???) [000059] --C-G------- * CALL void Console.WriteLine [000058] --C--------- arg0 \--* RET_EXPR float (inl return from call [000053]) ***** BB01 STMT00010 (IL 0x056... ???) [000060] ------------ * RETURN void ------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Indirect call transform -- no candidates to transform *************** Finishing PHASE Indirect call transform [no changes] *************** Starting PHASE Expand patchpoints -- no patchpoints to transform *************** Finishing PHASE Expand patchpoints [no changes] *************** Starting PHASE Post-import *************** Finishing PHASE Post-import *************** Starting PHASE Morph - Init New BlockSet epoch 1, # of blocks (including unused BB00): 2, bitset array size: 1 (short) *************** In fgRemoveEmptyBlocks *************** Finishing PHASE Morph - Init *************** In fgDebugCheckBBlist *************** Starting PHASE Morph - Inlining Expanding INLINE_CANDIDATE in statement STMT00003 in BB01: STMT00003 (IL 0x020... ???) [000023] I-C-G------- * CALL float Program.Distance (exactContextHnd=0x00007FFA0E2B7A89) [000027] n----------- arg0 +--* OBJ simd8 [000026] ------------ | \--* ADDR byref [000009] -------N---- | \--* LCL_VAR simd8 V04 tmp1 [000025] n----------- arg1 \--* OBJ simd8 [000024] ------------ \--* ADDR byref [000022] -------N---- \--* LCL_VAR simd8 V01 loc0 Argument #0: [000027] n----------- * OBJ simd8 [000026] ------------ \--* ADDR byref [000009] -------N---- \--* LCL_VAR simd8 V04 tmp1 Argument #1: has caller local ref [000025] n----------- * OBJ simd8 [000024] ------------ \--* ADDR byref [000022] -------N---- \--* LCL_VAR simd8 V01 loc0 Known type Vector2 Known type Vector2 INLINER: inlineInfo.tokenLookupContextHandle for Program:Distance(Vector2,Vector2):float set to 0x00007FFA0E2B7A89: Invoking compiler for the inlinee method Program:Distance(Vector2,Vector2):float : IL to import: IL_0000 02 ldarg.0 IL_0001 03 ldarg.1 IL_0002 28 03 00 00 06 call 0x6000003 IL_0007 28 0b 00 00 0a call 0xA00000B IL_000c 2a ret INLINER impTokenLookupContextHandle for Program:Distance(Vector2,Vector2):float is 0x00007FFA0E2B7A89. *************** In fgFindBasicBlocks() for Program:Distance(Vector2,Vector2):float Named Intrinsic System.MathF.Sqrt: Recognized Jump targets: none New Basic Block BB02 [0001] created. BB02 [000..00D) Basic block list for 'Program:Distance(Vector2,Vector2):float' ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB02 [0001] 1 1 [000..00D) (return) ----------------------------------------------------------------------------------------------------------------------------------------- *************** Inline @[000023] Starting PHASE Pre-import *************** Inline @[000023] Finishing PHASE Pre-import *************** Inline @[000023] Starting PHASE Profile incorporation BBOPT set, but no profile data available (hr=80004001) Computing inlinee profile scale: ... no callee profile data, will use non-pgo weight to scale ... call site not profiled, will use non-pgo weight to scale call site count 100 callee entry count 100 scale 1 Scaling inlinee blocks *************** Inline @[000023] Finishing PHASE Profile incorporation Trees after Profile incorporation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB02 [0001] 1 1 [000..00D) (return) ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB02 [000..00D) (return), preds={} succs={} ------------------------------------------------------------------------------------------------------------------- *************** Inline @[000023] Starting PHASE Importation *************** In impImport() for Program:Distance(Vector2,Vector2):float impImportBlockPending for BB02 Importing BB02 (PC=000) of 'Program:Distance(Vector2,Vector2):float' [ 0] 0 (0x000) ldarg.0 lvaGrabTemp returning 6 (V06 tmp3) called for Inlining Arg. Notify VM instruction set (AVX) must be supported. Known type Vector2 [ 1] 1 (0x001) ldarg.1 lvaGrabTemp returning 7 (V07 tmp4) called for Inlining Arg. Known type Vector2 [ 2] 2 (0x002) call 06000003 In Compiler::impImportCall: opcode is call, kind=0, callRetType is float, structSize is 0 Calling impNormStructVal on: [000062] ------------ * LCL_VAR simd8 V07 tmp4 Known type Vector2 resulting tree: [000065] n----------- * OBJ simd8 [000064] ------------ \--* ADDR byref [000062] -------N---- \--* LCL_VAR simd8 V07 tmp4 Calling impNormStructVal on: [000061] ------------ * LCL_VAR simd8 V06 tmp3 Known type Vector2 resulting tree: [000067] n----------- * OBJ simd8 [000066] ------------ \--* ADDR byref [000061] -------N---- \--* LCL_VAR simd8 V06 tmp3 [000063] I-C-G------- * CALL float Program.DistanceSquared (exactContextHnd=0x00007FFA0E2B7A89) [000067] n----------- arg0 +--* OBJ simd8 [000066] ------------ | \--* ADDR byref [000061] -------N---- | \--* LCL_VAR simd8 V06 tmp3 [000065] n----------- arg1 \--* OBJ simd8 [000064] ------------ \--* ADDR byref [000062] -------N---- \--* LCL_VAR simd8 V07 tmp4 [ 1] 7 (0x007) call 0A00000B In Compiler::impImportCall: opcode is call, kind=0, callRetType is float, structSize is 0 Named Intrinsic System.MathF.Sqrt: Recognized [ 1] 12 (0x00c) ret Inlinee Return expression (before normalization) => [000069] --C--------- * INTRINSIC float sqrt [000068] --C--------- \--* RET_EXPR float (inl return from call [000063]) Inlinee Return expression (after normalization) => [000069] --C--------- * INTRINSIC float sqrt [000068] --C--------- \--* RET_EXPR float (inl return from call [000063]) *************** Inline @[000023] Finishing PHASE Importation Trees after Importation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB02 [0001] 1 1 [000..00D) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB02 [000..00D) (return), preds={} succs={} ***** BB02 [000063] I-C-G------- * CALL float Program.DistanceSquared (exactContextHnd=0x00007FFA0E2B7A89) [000067] n----------- arg0 +--* OBJ simd8 [000066] ------------ | \--* ADDR byref [000061] -------N---- | \--* LCL_VAR simd8 V06 tmp3 [000065] n----------- arg1 \--* OBJ simd8 [000064] ------------ \--* ADDR byref [000062] -------N---- \--* LCL_VAR simd8 V07 tmp4 ------------------------------------------------------------------------------------------------------------------- *************** Inline @[000023] Starting PHASE Indirect call transform -- no candidates to transform *************** Inline @[000023] Finishing PHASE Indirect call transform [no changes] *************** Inline @[000023] Starting PHASE Expand patchpoints -- no patchpoints to transform *************** Inline @[000023] Finishing PHASE Expand patchpoints [no changes] *************** Inline @[000023] Starting PHASE Post-import *************** In fgRemoveEmptyBlocks *************** Inline @[000023] Finishing PHASE Post-import ----------- Statements (and blocks) added due to the inlining of call [000023] ----------- Arguments setup: Known type Vector2 STMT00012 (IL 0x020... ???) [000072] -A---------- * ASG simd8 (copy) [000070] D------N---- +--* LCL_VAR simd8 V06 tmp3 [000027] n----------- \--* OBJ simd8 [000026] ------------ \--* ADDR byref [000009] -------N---- \--* LCL_VAR simd8 V04 tmp1 Known type Vector2 STMT00013 (IL 0x020... ???) [000075] -A---------- * ASG simd8 (copy) [000073] D------N---- +--* LCL_VAR simd8 V07 tmp4 [000025] n----------- \--* OBJ simd8 [000024] ------------ \--* ADDR byref [000022] -------N---- \--* LCL_VAR simd8 V01 loc0 Inlinee method body: STMT00011 (IL 0x020... ???) [000063] I-C-G------- * CALL float Program.DistanceSquared (exactContextHnd=0x00007FFA0E2B7A89) [000067] n----------- arg0 +--* OBJ simd8 [000066] ------------ | \--* ADDR byref [000061] -------N---- | \--* LCL_VAR simd8 V06 tmp3 [000065] n----------- arg1 \--* OBJ simd8 [000064] ------------ \--* ADDR byref [000062] -------N---- \--* LCL_VAR simd8 V07 tmp4 fgInlineAppendStatements: no gc ref inline locals. Return expression for call at [000023] is [000069] --C--------- * INTRINSIC float sqrt [000068] --C--------- \--* RET_EXPR float (inl return from call [000063]) Successfully inlined Program:Distance(Vector2,Vector2):float (13 IL bytes) (depth 1) [aggressive inline attribute] -------------------------------------------------------------------------------------------- INLINER: during 'fgInline' result 'success' reason 'aggressive inline attribute' for 'Program:Main(ref)' calling 'Program:Distance(Vector2,Vector2):float' INLINER: during 'fgInline' result 'success' reason 'aggressive inline attribute' Expanding INLINE_CANDIDATE in statement STMT00011 in BB01: STMT00011 (IL 0x020... ???) [000063] I-C-G------- * CALL float Program.DistanceSquared (exactContextHnd=0x00007FFA0E2B7A89) [000067] n----------- arg0 +--* OBJ simd8 [000066] ------------ | \--* ADDR byref [000061] -------N---- | \--* LCL_VAR simd8 V06 tmp3 [000065] n----------- arg1 \--* OBJ simd8 [000064] ------------ \--* ADDR byref [000062] -------N---- \--* LCL_VAR simd8 V07 tmp4 Argument #0: [000067] n----------- * OBJ simd8 [000066] ------------ \--* ADDR byref [000061] -------N---- \--* LCL_VAR simd8 V06 tmp3 Argument #1: [000065] n----------- * OBJ simd8 [000064] ------------ \--* ADDR byref [000062] -------N---- \--* LCL_VAR simd8 V07 tmp4 Known type Vector2 Known type Vector2 Known type Vector2 INLINER: inlineInfo.tokenLookupContextHandle for Program:DistanceSquared(Vector2,Vector2):float set to 0x00007FFA0E2B7A89: Invoking compiler for the inlinee method Program:DistanceSquared(Vector2,Vector2):float : IL to import: IL_0000 02 ldarg.0 IL_0001 03 ldarg.1 IL_0002 28 0c 00 00 0a call 0xA00000C IL_0007 0a stloc.0 IL_0008 12 00 ldloca.s 0x0 IL_000a 28 0e 00 00 0a call 0xA00000E IL_000f 2a ret INLINER impTokenLookupContextHandle for Program:DistanceSquared(Vector2,Vector2):float is 0x00007FFA0E2B7A89. *************** In fgFindBasicBlocks() for Program:DistanceSquared(Vector2,Vector2):float Named Intrinsic System.Numerics.Vector2.op_Subtraction: Notify VM instruction set (AVX2) must be supported. Recognized Jump targets: none New Basic Block BB03 [0002] created. BB03 [000..010) Basic block list for 'Program:DistanceSquared(Vector2,Vector2):float' ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB03 [0002] 1 1 [000..010) (return) ----------------------------------------------------------------------------------------------------------------------------------------- *************** Inline @[000063] Starting PHASE Pre-import *************** Inline @[000063] Finishing PHASE Pre-import *************** Inline @[000063] Starting PHASE Profile incorporation BBOPT set, but no profile data available (hr=80004001) Computing inlinee profile scale: ... no callee profile data, will use non-pgo weight to scale ... call site not profiled, will use non-pgo weight to scale call site count 100 callee entry count 100 scale 1 Scaling inlinee blocks *************** Inline @[000063] Finishing PHASE Profile incorporation Trees after Profile incorporation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB03 [0002] 1 1 [000..010) (return) ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB03 [000..010) (return), preds={} succs={} ------------------------------------------------------------------------------------------------------------------- *************** Inline @[000063] Starting PHASE Importation *************** In impImport() for Program:DistanceSquared(Vector2,Vector2):float impImportBlockPending for BB03 Importing BB03 (PC=000) of 'Program:DistanceSquared(Vector2,Vector2):float' [ 0] 0 (0x000) ldarg.0 lvaGrabTemp returning 8 (V08 tmp5) called for Inlining Arg. Notify VM instruction set (AVX) must be supported. Known type Vector2 [ 1] 1 (0x001) ldarg.1 lvaGrabTemp returning 9 (V09 tmp6) called for Inlining Arg. Known type Vector2 [ 2] 2 (0x002) call 0A00000C In Compiler::impImportCall: opcode is call, kind=0, callRetType is struct, structSize is 8 Named Intrinsic System.Numerics.Vector2.op_Subtraction: Recognized Notify VM instruction set (SSE2) must be supported. Known type Vector2 Known type Vector2 Notify VM instruction set (SSE) must be supported. Known type Vector2 Known type Vector2 [ 1] 7 (0x007) stloc.0 lvaGrabTemp returning 10 (V10 tmp7) (a long lifetime temp) called for Inline stloc first use temp. Known type Vector2 [000082] -A---------- * ASG simd8 (copy) [000080] D------N---- +--* LCL_VAR simd8 V10 tmp7 [000079] ------------ \--* HWINTRINSIC simd8 float Subtract [000077] ------------ +--* LCL_VAR simd8 V08 tmp5 [000078] ------------ \--* LCL_VAR simd8 V09 tmp6 [ 0] 8 (0x008) ldloca.s 0 [ 1] 10 (0x00a) call 0A00000E In Compiler::impImportCall: opcode is call, kind=0, callRetType is float, structSize is 0 [000085] I-C-G------- * CALL float Vector2.LengthSquared (exactContextHnd=0x00007FFA0E2D30A9) [000084] ------------ this in rcx \--* ADDR byref [000083] -------N---- \--* LCL_VAR simd8 V10 tmp7 [ 1] 15 (0x00f) ret Inlinee Return expression (before normalization) => [000086] --C--------- * RET_EXPR float (inl return from call [000085]) Inlinee Return expression (after normalization) => [000086] --C--------- * RET_EXPR float (inl return from call [000085]) *************** Inline @[000063] Finishing PHASE Importation Trees after Importation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB03 [0002] 1 1 [000..010) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB03 [000..010) (return), preds={} succs={} ***** BB03 [000082] -A---------- * ASG simd8 (copy) [000080] D------N---- +--* LCL_VAR simd8 V10 tmp7 [000079] ------------ \--* HWINTRINSIC simd8 float Subtract [000077] ------------ +--* LCL_VAR simd8 V08 tmp5 [000078] ------------ \--* LCL_VAR simd8 V09 tmp6 ***** BB03 [000085] I-C-G------- * CALL float Vector2.LengthSquared (exactContextHnd=0x00007FFA0E2D30A9) [000084] ------------ this in rcx \--* ADDR byref [000083] -------N---- \--* LCL_VAR simd8 V10 tmp7 ------------------------------------------------------------------------------------------------------------------- *************** Inline @[000063] Starting PHASE Indirect call transform -- no candidates to transform *************** Inline @[000063] Finishing PHASE Indirect call transform [no changes] *************** Inline @[000063] Starting PHASE Expand patchpoints -- no patchpoints to transform *************** Inline @[000063] Finishing PHASE Expand patchpoints [no changes] *************** Inline @[000063] Starting PHASE Post-import *************** In fgRemoveEmptyBlocks *************** Inline @[000063] Finishing PHASE Post-import ----------- Statements (and blocks) added due to the inlining of call [000063] ----------- Arguments setup: Known type Vector2 STMT00016 (IL 0x020... ???) [000089] -A---------- * ASG simd8 (copy) [000087] D------N---- +--* LCL_VAR simd8 V08 tmp5 [000067] n----------- \--* OBJ simd8 [000066] ------------ \--* ADDR byref [000061] -------N---- \--* LCL_VAR simd8 V06 tmp3 Known type Vector2 STMT00017 (IL 0x020... ???) [000092] -A---------- * ASG simd8 (copy) [000090] D------N---- +--* LCL_VAR simd8 V09 tmp6 [000065] n----------- \--* OBJ simd8 [000064] ------------ \--* ADDR byref [000062] -------N---- \--* LCL_VAR simd8 V07 tmp4 Inlinee method body: STMT00014 (IL 0x020... ???) [000082] -A---------- * ASG simd8 (copy) [000080] D------N---- +--* LCL_VAR simd8 V10 tmp7 [000079] ------------ \--* HWINTRINSIC simd8 float Subtract [000077] ------------ +--* LCL_VAR simd8 V08 tmp5 [000078] ------------ \--* LCL_VAR simd8 V09 tmp6 STMT00015 (IL 0x020... ???) [000085] I-C-G------- * CALL float Vector2.LengthSquared (exactContextHnd=0x00007FFA0E2D30A9) [000084] ------------ this in rcx \--* ADDR byref [000083] -------N---- \--* LCL_VAR simd8 V10 tmp7 fgInlineAppendStatements: no gc ref inline locals. Return expression for call at [000063] is [000086] --C--------- * RET_EXPR float (inl return from call [000085]) Successfully inlined Program:DistanceSquared(Vector2,Vector2):float (16 IL bytes) (depth 2) [aggressive inline attribute] -------------------------------------------------------------------------------------------- INLINER: during 'fgInline' result 'success' reason 'aggressive inline attribute' for 'Program:Main(ref)' calling 'Program:DistanceSquared(Vector2,Vector2):float' INLINER: during 'fgInline' result 'success' reason 'aggressive inline attribute' Expanding INLINE_CANDIDATE in statement STMT00015 in BB01: STMT00015 (IL 0x020... ???) [000085] I-C-G------- * CALL float Vector2.LengthSquared (exactContextHnd=0x00007FFA0E2D30A9) [000084] ------------ this in rcx \--* ADDR byref [000083] -------N---- \--* LCL_VAR simd8 V10 tmp7 thisArg: is a constant is byref to a struct local [000084] ------------ * ADDR byref [000083] -------N---- \--* LCL_VAR simd8 V10 tmp7 INLINER: inlineInfo.tokenLookupContextHandle for Vector2:LengthSquared():float:this set to 0x00007FFA0E2D30A9: Invoking compiler for the inlinee method Vector2:LengthSquared():float:this : IL to import: IL_0000 02 ldarg.0 IL_0001 71 e0 01 00 02 ldobj 0x20001E0 IL_0006 02 ldarg.0 IL_0007 71 e0 01 00 02 ldobj 0x20001E0 IL_000c 28 98 1e 00 06 call 0x6001E98 IL_0011 2a ret INLINER impTokenLookupContextHandle for Vector2:LengthSquared():float:this is 0x00007FFA0E2D30A9. *************** In fgFindBasicBlocks() for Vector2:LengthSquared():float:this Named Intrinsic System.Numerics.Vector2.Dot: Notify VM instruction set (AVX2) must be supported. Recognized Jump targets: none New Basic Block BB04 [0003] created. BB04 [000..012) Basic block list for 'Vector2:LengthSquared():float:this' ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB04 [0003] 1 1 [000..012) (return) ----------------------------------------------------------------------------------------------------------------------------------------- *************** Inline @[000085] Starting PHASE Pre-import *************** Inline @[000085] Finishing PHASE Pre-import *************** Inline @[000085] Starting PHASE Profile incorporation BBOPT set, but no profile data available (hr=80004001) Computing inlinee profile scale: ... no callee profile data, will use non-pgo weight to scale ... call site not profiled, will use non-pgo weight to scale call site count 100 callee entry count 100 scale 1 Scaling inlinee blocks *************** Inline @[000085] Finishing PHASE Profile incorporation Trees after Profile incorporation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB04 [0003] 1 1 [000..012) (return) ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB04 [000..012) (return), preds={} succs={} ------------------------------------------------------------------------------------------------------------------- *************** Inline @[000085] Starting PHASE Importation *************** In impImport() for Vector2:LengthSquared():float:this impImportBlockPending for BB04 Importing BB04 (PC=000) of 'Vector2:LengthSquared():float:this' [ 0] 0 (0x000) ldarg.0 [ 1] 1 (0x001) ldobj 020001E0Notify VM instruction set (AVX) must be supported. Known type Vector2 [ 1] 6 (0x006) ldarg.0 [ 2] 7 (0x007) ldobj 020001E0 Known type Vector2 [ 2] 12 (0x00c) call 06001E98 In Compiler::impImportCall: opcode is call, kind=0, callRetType is float, structSize is 0 Named Intrinsic System.Numerics.Vector2.Dot: Recognized Notify VM instruction set (SSE2) must be supported. Known type Vector2 Known type Vector2 Notify VM instruction set (Vector128) must be supported. Known type Vector2 Known type Vector2 [ 1] 17 (0x011) ret Inlinee Return expression (before normalization) => [000100] ------------ * HWINTRINSIC float float Dot [000095] -------N---- +--* LCL_VAR simd8 V10 tmp7 [000098] -------N---- \--* LCL_VAR simd8 V10 tmp7 Inlinee Return expression (after normalization) => [000100] ------------ * HWINTRINSIC float float Dot [000095] -------N---- +--* LCL_VAR simd8 V10 tmp7 [000098] -------N---- \--* LCL_VAR simd8 V10 tmp7 ** Note: inlinee IL was partially imported -- imported 0 of 18 bytes of method IL *************** Inline @[000085] Finishing PHASE Importation Trees after Importation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB04 [0003] 1 1 [000..012) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB04 [000..012) (return), preds={} succs={} ------------------------------------------------------------------------------------------------------------------- *************** Inline @[000085] Starting PHASE Indirect call transform -- no candidates to transform *************** Inline @[000085] Finishing PHASE Indirect call transform [no changes] *************** Inline @[000085] Starting PHASE Expand patchpoints -- no patchpoints to transform *************** Inline @[000085] Finishing PHASE Expand patchpoints [no changes] *************** Inline @[000085] Starting PHASE Post-import *************** In fgRemoveEmptyBlocks *************** Inline @[000085] Finishing PHASE Post-import ----------- Statements (and blocks) added due to the inlining of call [000085] ----------- Arguments setup: Inlinee method body:fgInlineAppendStatements: no gc ref inline locals. Return expression for call at [000085] is [000100] ------------ * HWINTRINSIC float float Dot [000095] -------N---- +--* LCL_VAR simd8 V10 tmp7 [000098] -------N---- \--* LCL_VAR simd8 V10 tmp7 Successfully inlined Vector2:LengthSquared():float:this (18 IL bytes) (depth 3) [aggressive inline attribute] -------------------------------------------------------------------------------------------- INLINER: during 'fgInline' result 'success' reason 'aggressive inline attribute' for 'Program:Main(ref)' calling 'Vector2:LengthSquared():float:this' INLINER: during 'fgInline' result 'success' reason 'aggressive inline attribute' Replacing the return expression placeholder [000028] with [000069] [000028] --C--------- * RET_EXPR float (inl return from call [000069]) Inserting the inline return expression [000069] --C--------- * INTRINSIC float sqrt [000068] --C--------- \--* RET_EXPR float (inl return from call [000086]) Replacing the return expression placeholder [000068] with [000100] [000068] --C--------- * RET_EXPR float (inl return from call [000086]) Inserting the inline return expression [000100] ------------ * HWINTRINSIC float float Dot [000095] -------N---- +--* LCL_VAR simd8 V10 tmp7 [000098] -------N---- \--* LCL_VAR simd8 V10 tmp7 Expanding INLINE_CANDIDATE in statement STMT00008 in BB01: STMT00008 (IL 0x04B... ???) [000053] I-C-G------- * CALL float Program.Distance2 (exactContextHnd=0x00007FFA0E2B7A89) [000057] n----------- arg0 +--* OBJ simd8 [000056] ------------ | \--* ADDR byref [000039] -------N---- | \--* LCL_VAR simd8 V05 tmp2 [000055] n----------- arg1 \--* OBJ simd8 [000054] ------------ \--* ADDR byref [000052] -------N---- \--* LCL_VAR simd8 V02 loc1 Argument #0: [000057] n----------- * OBJ simd8 [000056] ------------ \--* ADDR byref [000039] -------N---- \--* LCL_VAR simd8 V05 tmp2 Argument #1: has caller local ref [000055] n----------- * OBJ simd8 [000054] ------------ \--* ADDR byref [000052] -------N---- \--* LCL_VAR simd8 V02 loc1 Known type Vector2 Known type Vector2 Known type Vector2 INLINER: inlineInfo.tokenLookupContextHandle for Program:Distance2(Vector2,Vector2):float set to 0x00007FFA0E2B7A89: Invoking compiler for the inlinee method Program:Distance2(Vector2,Vector2):float : IL to import: IL_0000 02 ldarg.0 IL_0001 03 ldarg.1 IL_0002 28 0c 00 00 0a call 0xA00000C IL_0007 0a stloc.0 IL_0008 12 00 ldloca.s 0x0 IL_000a 28 0d 00 00 0a call 0xA00000D IL_000f 2a ret INLINER impTokenLookupContextHandle for Program:Distance2(Vector2,Vector2):float is 0x00007FFA0E2B7A89. *************** In fgFindBasicBlocks() for Program:Distance2(Vector2,Vector2):float Named Intrinsic System.Numerics.Vector2.op_Subtraction: Notify VM instruction set (AVX2) must be supported. Recognized Jump targets: none New Basic Block BB05 [0004] created. BB05 [000..010) Basic block list for 'Program:Distance2(Vector2,Vector2):float' ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB05 [0004] 1 1 [000..010) (return) ----------------------------------------------------------------------------------------------------------------------------------------- *************** Inline @[000053] Starting PHASE Pre-import *************** Inline @[000053] Finishing PHASE Pre-import *************** Inline @[000053] Starting PHASE Profile incorporation BBOPT set, but no profile data available (hr=80004001) Computing inlinee profile scale: ... no callee profile data, will use non-pgo weight to scale ... call site not profiled, will use non-pgo weight to scale call site count 100 callee entry count 100 scale 1 Scaling inlinee blocks *************** Inline @[000053] Finishing PHASE Profile incorporation Trees after Profile incorporation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB05 [0004] 1 1 [000..010) (return) ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB05 [000..010) (return), preds={} succs={} ------------------------------------------------------------------------------------------------------------------- *************** Inline @[000053] Starting PHASE Importation *************** In impImport() for Program:Distance2(Vector2,Vector2):float impImportBlockPending for BB05 Importing BB05 (PC=000) of 'Program:Distance2(Vector2,Vector2):float' [ 0] 0 (0x000) ldarg.0 lvaGrabTemp returning 11 (V11 tmp8) called for Inlining Arg. Notify VM instruction set (AVX) must be supported. Known type Vector2 [ 1] 1 (0x001) ldarg.1 lvaGrabTemp returning 12 (V12 tmp9) called for Inlining Arg. Known type Vector2 [ 2] 2 (0x002) call 0A00000C In Compiler::impImportCall: opcode is call, kind=0, callRetType is struct, structSize is 8 Named Intrinsic System.Numerics.Vector2.op_Subtraction: Recognized Notify VM instruction set (SSE2) must be supported. Known type Vector2 Known type Vector2 Notify VM instruction set (SSE) must be supported. Known type Vector2 Known type Vector2 [ 1] 7 (0x007) stloc.0 lvaGrabTemp returning 13 (V13 tmp10) (a long lifetime temp) called for Inline stloc first use temp. Known type Vector2 [000107] -A---------- * ASG simd8 (copy) [000105] D------N---- +--* LCL_VAR simd8 V13 tmp10 [000104] ------------ \--* HWINTRINSIC simd8 float Subtract [000102] ------------ +--* LCL_VAR simd8 V11 tmp8 [000103] ------------ \--* LCL_VAR simd8 V12 tmp9 [ 0] 8 (0x008) ldloca.s 0 [ 1] 10 (0x00a) call 0A00000D In Compiler::impImportCall: opcode is call, kind=0, callRetType is float, structSize is 0 [000110] I-C-G------- * CALL float Vector2.Length (exactContextHnd=0x00007FFA0E2D30A9) [000109] ------------ this in rcx \--* ADDR byref [000108] -------N---- \--* LCL_VAR simd8 V13 tmp10 [ 1] 15 (0x00f) ret Inlinee Return expression (before normalization) => [000111] --C--------- * RET_EXPR float (inl return from call [000110]) Inlinee Return expression (after normalization) => [000111] --C--------- * RET_EXPR float (inl return from call [000110]) *************** Inline @[000053] Finishing PHASE Importation Trees after Importation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB05 [0004] 1 1 [000..010) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB05 [000..010) (return), preds={} succs={} ***** BB05 [000107] -A---------- * ASG simd8 (copy) [000105] D------N---- +--* LCL_VAR simd8 V13 tmp10 [000104] ------------ \--* HWINTRINSIC simd8 float Subtract [000102] ------------ +--* LCL_VAR simd8 V11 tmp8 [000103] ------------ \--* LCL_VAR simd8 V12 tmp9 ***** BB05 [000110] I-C-G------- * CALL float Vector2.Length (exactContextHnd=0x00007FFA0E2D30A9) [000109] ------------ this in rcx \--* ADDR byref [000108] -------N---- \--* LCL_VAR simd8 V13 tmp10 ------------------------------------------------------------------------------------------------------------------- *************** Inline @[000053] Starting PHASE Indirect call transform -- no candidates to transform *************** Inline @[000053] Finishing PHASE Indirect call transform [no changes] *************** Inline @[000053] Starting PHASE Expand patchpoints -- no patchpoints to transform *************** Inline @[000053] Finishing PHASE Expand patchpoints [no changes] *************** Inline @[000053] Starting PHASE Post-import *************** In fgRemoveEmptyBlocks *************** Inline @[000053] Finishing PHASE Post-import ----------- Statements (and blocks) added due to the inlining of call [000053] ----------- Arguments setup: Known type Vector2 STMT00020 (IL 0x04B... ???) [000114] -A---------- * ASG simd8 (copy) [000112] D------N---- +--* LCL_VAR simd8 V11 tmp8 [000057] n----------- \--* OBJ simd8 [000056] ------------ \--* ADDR byref [000039] -------N---- \--* LCL_VAR simd8 V05 tmp2 Known type Vector2 STMT00021 (IL 0x04B... ???) [000117] -A---------- * ASG simd8 (copy) [000115] D------N---- +--* LCL_VAR simd8 V12 tmp9 [000055] n----------- \--* OBJ simd8 [000054] ------------ \--* ADDR byref [000052] -------N---- \--* LCL_VAR simd8 V02 loc1 Inlinee method body: STMT00018 (IL 0x04B... ???) [000107] -A---------- * ASG simd8 (copy) [000105] D------N---- +--* LCL_VAR simd8 V13 tmp10 [000104] ------------ \--* HWINTRINSIC simd8 float Subtract [000102] ------------ +--* LCL_VAR simd8 V11 tmp8 [000103] ------------ \--* LCL_VAR simd8 V12 tmp9 STMT00019 (IL 0x04B... ???) [000110] I-C-G------- * CALL float Vector2.Length (exactContextHnd=0x00007FFA0E2D30A9) [000109] ------------ this in rcx \--* ADDR byref [000108] -------N---- \--* LCL_VAR simd8 V13 tmp10 fgInlineAppendStatements: no gc ref inline locals. Return expression for call at [000053] is [000111] --C--------- * RET_EXPR float (inl return from call [000110]) Successfully inlined Program:Distance2(Vector2,Vector2):float (16 IL bytes) (depth 1) [aggressive inline attribute] -------------------------------------------------------------------------------------------- INLINER: during 'fgInline' result 'success' reason 'aggressive inline attribute' for 'Program:Main(ref)' calling 'Program:Distance2(Vector2,Vector2):float' INLINER: during 'fgInline' result 'success' reason 'aggressive inline attribute' Expanding INLINE_CANDIDATE in statement STMT00019 in BB01: STMT00019 (IL 0x04B... ???) [000110] I-C-G------- * CALL float Vector2.Length (exactContextHnd=0x00007FFA0E2D30A9) [000109] ------------ this in rcx \--* ADDR byref [000108] -------N---- \--* LCL_VAR simd8 V13 tmp10 thisArg: is a constant is byref to a struct local [000109] ------------ * ADDR byref [000108] -------N---- \--* LCL_VAR simd8 V13 tmp10 INLINER: inlineInfo.tokenLookupContextHandle for Vector2:Length():float:this set to 0x00007FFA0E2D30A9: Invoking compiler for the inlinee method Vector2:Length():float:this : IL to import: IL_0000 02 ldarg.0 IL_0001 28 b1 1e 00 06 call 0x6001EB1 IL_0006 0a stloc.0 IL_0007 06 ldloc.0 IL_0008 28 90 04 00 06 call 0x6000490 IL_000d 2a ret INLINER impTokenLookupContextHandle for Vector2:Length():float:this is 0x00007FFA0E2D30A9. *************** In fgFindBasicBlocks() for Vector2:Length():float:this Named Intrinsic System.MathF.Sqrt: Recognized Jump targets: none New Basic Block BB06 [0005] created. BB06 [000..00E) Basic block list for 'Vector2:Length():float:this' ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB06 [0005] 1 1 [000..00E) (return) ----------------------------------------------------------------------------------------------------------------------------------------- *************** Inline @[000110] Starting PHASE Pre-import *************** Inline @[000110] Finishing PHASE Pre-import *************** Inline @[000110] Starting PHASE Profile incorporation BBOPT set, but no profile data available (hr=80004001) Computing inlinee profile scale: ... no callee profile data, will use non-pgo weight to scale ... call site not profiled, will use non-pgo weight to scale call site count 100 callee entry count 100 scale 1 Scaling inlinee blocks *************** Inline @[000110] Finishing PHASE Profile incorporation Trees after Profile incorporation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB06 [0005] 1 1 [000..00E) (return) ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB06 [000..00E) (return), preds={} succs={} ------------------------------------------------------------------------------------------------------------------- *************** Inline @[000110] Starting PHASE Importation *************** In impImport() for Vector2:Length():float:this impImportBlockPending for BB06 Importing BB06 (PC=000) of 'Vector2:Length():float:this' [ 0] 0 (0x000) ldarg.0 [ 1] 1 (0x001) call 06001EB1 In Compiler::impImportCall: opcode is call, kind=0, callRetType is float, structSize is 0 [000121] I-C-G------- * CALL float Vector2.LengthSquared (exactContextHnd=0x00007FFA0E2D30A9) [000119] ------------ this in rcx \--* ADDR byref [000120] -------N---- \--* LCL_VAR simd8 V13 tmp10 [ 1] 6 (0x006) stloc.0 lvaGrabTemp returning 14 (V14 tmp11) (a long lifetime temp) called for Inline stloc first use temp. [000124] -AC--------- * ASG float [000123] D------N---- +--* LCL_VAR float V14 tmp11 [000122] --C--------- \--* RET_EXPR float (inl return from call [000121]) [ 0] 7 (0x007) ldloc.0 [ 1] 8 (0x008) call 06000490 In Compiler::impImportCall: opcode is call, kind=0, callRetType is float, structSize is 0 Named Intrinsic System.MathF.Sqrt: Recognized [ 1] 13 (0x00d) ret Inlinee Return expression (before normalization) => [000126] ------------ * INTRINSIC float sqrt [000125] ------------ \--* LCL_VAR float V14 tmp11 Inlinee Return expression (after normalization) => [000126] ------------ * INTRINSIC float sqrt [000125] ------------ \--* LCL_VAR float V14 tmp11 *************** Inline @[000110] Finishing PHASE Importation Trees after Importation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB06 [0005] 1 1 [000..00E) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB06 [000..00E) (return), preds={} succs={} ***** BB06 [000121] I-C-G------- * CALL float Vector2.LengthSquared (exactContextHnd=0x00007FFA0E2D30A9) [000119] ------------ this in rcx \--* ADDR byref [000120] -------N---- \--* LCL_VAR simd8 V13 tmp10 ***** BB06 [000124] -AC--------- * ASG float [000123] D------N---- +--* LCL_VAR float V14 tmp11 [000122] --C--------- \--* RET_EXPR float (inl return from call [000121]) ------------------------------------------------------------------------------------------------------------------- *************** Inline @[000110] Starting PHASE Indirect call transform -- no candidates to transform *************** Inline @[000110] Finishing PHASE Indirect call transform [no changes] *************** Inline @[000110] Starting PHASE Expand patchpoints -- no patchpoints to transform *************** Inline @[000110] Finishing PHASE Expand patchpoints [no changes] *************** Inline @[000110] Starting PHASE Post-import *************** In fgRemoveEmptyBlocks *************** Inline @[000110] Finishing PHASE Post-import ----------- Statements (and blocks) added due to the inlining of call [000110] ----------- Arguments setup: Inlinee method body: STMT00022 (IL 0x04B... ???) [000121] I-C-G------- * CALL float Vector2.LengthSquared (exactContextHnd=0x00007FFA0E2D30A9) [000119] ------------ this in rcx \--* ADDR byref [000120] -------N---- \--* LCL_VAR simd8 V13 tmp10 STMT00023 (IL 0x04B... ???) [000124] -AC--------- * ASG float [000123] D------N---- +--* LCL_VAR float V14 tmp11 [000122] --C--------- \--* RET_EXPR float (inl return from call [000121]) fgInlineAppendStatements: no gc ref inline locals. Return expression for call at [000110] is [000126] ------------ * INTRINSIC float sqrt [000125] ------------ \--* LCL_VAR float V14 tmp11 Successfully inlined Vector2:Length():float:this (14 IL bytes) (depth 2) [aggressive inline attribute] -------------------------------------------------------------------------------------------- INLINER: during 'fgInline' result 'success' reason 'aggressive inline attribute' for 'Program:Main(ref)' calling 'Vector2:Length():float:this' INLINER: during 'fgInline' result 'success' reason 'aggressive inline attribute' Expanding INLINE_CANDIDATE in statement STMT00022 in BB01: STMT00022 (IL 0x04B... ???) [000121] I-C-G------- * CALL float Vector2.LengthSquared (exactContextHnd=0x00007FFA0E2D30A9) [000119] ------------ this in rcx \--* ADDR byref [000120] -------N---- \--* LCL_VAR simd8 V13 tmp10 thisArg: is a constant is byref to a struct local [000119] ------------ * ADDR byref [000120] -------N---- \--* LCL_VAR simd8 V13 tmp10 INLINER: inlineInfo.tokenLookupContextHandle for Vector2:LengthSquared():float:this set to 0x00007FFA0E2D30A9: Invoking compiler for the inlinee method Vector2:LengthSquared():float:this : IL to import: IL_0000 02 ldarg.0 IL_0001 71 e0 01 00 02 ldobj 0x20001E0 IL_0006 02 ldarg.0 IL_0007 71 e0 01 00 02 ldobj 0x20001E0 IL_000c 28 98 1e 00 06 call 0x6001E98 IL_0011 2a ret INLINER impTokenLookupContextHandle for Vector2:LengthSquared():float:this is 0x00007FFA0E2D30A9. *************** In fgFindBasicBlocks() for Vector2:LengthSquared():float:this Named Intrinsic System.Numerics.Vector2.Dot: Notify VM instruction set (AVX2) must be supported. Recognized Jump targets: none New Basic Block BB07 [0006] created. BB07 [000..012) Basic block list for 'Vector2:LengthSquared():float:this' ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB07 [0006] 1 1 [000..012) (return) ----------------------------------------------------------------------------------------------------------------------------------------- *************** Inline @[000121] Starting PHASE Pre-import *************** Inline @[000121] Finishing PHASE Pre-import *************** Inline @[000121] Starting PHASE Profile incorporation BBOPT set, but no profile data available (hr=80004001) Computing inlinee profile scale: ... no callee profile data, will use non-pgo weight to scale ... call site not profiled, will use non-pgo weight to scale call site count 100 callee entry count 100 scale 1 Scaling inlinee blocks *************** Inline @[000121] Finishing PHASE Profile incorporation Trees after Profile incorporation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB07 [0006] 1 1 [000..012) (return) ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB07 [000..012) (return), preds={} succs={} ------------------------------------------------------------------------------------------------------------------- *************** Inline @[000121] Starting PHASE Importation *************** In impImport() for Vector2:LengthSquared():float:this impImportBlockPending for BB07 Importing BB07 (PC=000) of 'Vector2:LengthSquared():float:this' [ 0] 0 (0x000) ldarg.0 [ 1] 1 (0x001) ldobj 020001E0Notify VM instruction set (AVX) must be supported. Known type Vector2 [ 1] 6 (0x006) ldarg.0 [ 2] 7 (0x007) ldobj 020001E0 Known type Vector2 [ 2] 12 (0x00c) call 06001E98 In Compiler::impImportCall: opcode is call, kind=0, callRetType is float, structSize is 0 Named Intrinsic System.Numerics.Vector2.Dot: Recognized Notify VM instruction set (SSE2) must be supported. Known type Vector2 Known type Vector2 Notify VM instruction set (Vector128) must be supported. Known type Vector2 Known type Vector2 [ 1] 17 (0x011) ret Inlinee Return expression (before normalization) => [000134] ------------ * HWINTRINSIC float float Dot [000129] -------N---- +--* LCL_VAR simd8 V13 tmp10 [000132] -------N---- \--* LCL_VAR simd8 V13 tmp10 Inlinee Return expression (after normalization) => [000134] ------------ * HWINTRINSIC float float Dot [000129] -------N---- +--* LCL_VAR simd8 V13 tmp10 [000132] -------N---- \--* LCL_VAR simd8 V13 tmp10 ** Note: inlinee IL was partially imported -- imported 0 of 18 bytes of method IL *************** Inline @[000121] Finishing PHASE Importation Trees after Importation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB07 [0006] 1 1 [000..012) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB07 [000..012) (return), preds={} succs={} ------------------------------------------------------------------------------------------------------------------- *************** Inline @[000121] Starting PHASE Indirect call transform -- no candidates to transform *************** Inline @[000121] Finishing PHASE Indirect call transform [no changes] *************** Inline @[000121] Starting PHASE Expand patchpoints -- no patchpoints to transform *************** Inline @[000121] Finishing PHASE Expand patchpoints [no changes] *************** Inline @[000121] Starting PHASE Post-import *************** In fgRemoveEmptyBlocks *************** Inline @[000121] Finishing PHASE Post-import ----------- Statements (and blocks) added due to the inlining of call [000121] ----------- Arguments setup: Inlinee method body:fgInlineAppendStatements: no gc ref inline locals. Return expression for call at [000121] is [000134] ------------ * HWINTRINSIC float float Dot [000129] -------N---- +--* LCL_VAR simd8 V13 tmp10 [000132] -------N---- \--* LCL_VAR simd8 V13 tmp10 Successfully inlined Vector2:LengthSquared():float:this (18 IL bytes) (depth 3) [aggressive inline attribute] -------------------------------------------------------------------------------------------- INLINER: during 'fgInline' result 'success' reason 'aggressive inline attribute' for 'Program:Main(ref)' calling 'Vector2:LengthSquared():float:this' INLINER: during 'fgInline' result 'success' reason 'aggressive inline attribute' Replacing the return expression placeholder [000122] with [000134] [000122] --C--------- * RET_EXPR float (inl return from call [000134]) Inserting the inline return expression [000134] ------------ * HWINTRINSIC float float Dot [000129] -------N---- +--* LCL_VAR simd8 V13 tmp10 [000132] -------N---- \--* LCL_VAR simd8 V13 tmp10 Replacing the return expression placeholder [000058] with [000126] [000058] --C--------- * RET_EXPR float (inl return from call [000111]) Inserting the inline return expression [000126] ------------ * INTRINSIC float sqrt [000125] ------------ \--* LCL_VAR float V14 tmp11 **************** Inline Tree Inlines into 06000004 [via DefaultPolicy] Program:Main(ref) [1 IL=0033 TR=000023 06000001] [aggressive inline attribute] Program:Distance(Vector2,Vector2):float [2 IL=0002 TR=000063 06000003] [aggressive inline attribute] Program:DistanceSquared(Vector2,Vector2):float [3 IL=0010 TR=000085 06001EB1] [aggressive inline attribute] Vector2:LengthSquared():float:this [0 IL=0038 TR=000029 0600007D] [FAILED: noinline per IL/cached result] Console:WriteLine(float) [4 IL=0076 TR=000053 06000002] [aggressive inline attribute] Program:Distance2(Vector2,Vector2):float [5 IL=0010 TR=000110 06001EB0] [aggressive inline attribute] Vector2:Length():float:this [6 IL=0001 TR=000121 06001EB1] [aggressive inline attribute] Vector2:LengthSquared():float:this [0 IL=0081 TR=000059 0600007D] [FAILED: noinline per IL/cached result] Console:WriteLine(float) Budget: initialTime=321, finalTime=355, initialBudget=3210, currentBudget=3272 Budget: increased by 62 because of force inlines Budget: initialSize=2114, finalSize=2114 *************** Finishing PHASE Morph - Inlining Trees after Morph - Inlining ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..057) (return), preds={} succs={} ***** BB01 STMT00000 (IL 0x000...0x056) [000004] IA---------- * ASG simd8 (init) [000002] D------N---- +--* LCL_VAR simd8 V04 tmp1 [000003] ------------ \--* CNS_INT int 0 ***** BB01 STMT00001 (IL ???... ???) [000012] -A--G------- * ASG simd8 (copy) [000011] ----G--N---- +--* BLK simd8 <8> [000006] ------------ | \--* ADDR byref [000005] -------N---- | \--* LCL_VAR simd8 V04 tmp1 [000010] -------N---- \--* SIMD simd8 float initN [000008] ------------ \--* LIST float [000000] ------------ +--* CNS_DBL float -1.0000000000000000 [000007] ------------ \--* LIST float [000001] ------------ \--* CNS_DBL float 1.0000000000000000 ***** BB01 STMT00002 (IL 0x00F... ???) [000021] -A--G------- * ASG simd8 (copy) [000020] ----G--N---- +--* BLK simd8 <8> [000014] ------------ | \--* ADDR byref [000013] -------N---- | \--* LCL_VAR simd8 V01 loc0 [000019] -------N---- \--* SIMD simd8 float initN [000018] ------------ \--* LIST float [000015] ------------ +--* CNS_DBL float 1.0000000000000000 [000017] ------------ \--* LIST float [000016] ------------ \--* CNS_DBL float -1.0000000000000000 ***** BB01 STMT00012 (IL 0x020... ???) [000072] -A---------- * ASG simd8 (copy) [000070] D------N---- +--* LCL_VAR simd8 V06 tmp3 [000027] n----------- \--* OBJ simd8 [000026] ------------ \--* ADDR byref [000009] -------N---- \--* LCL_VAR simd8 V04 tmp1 ***** BB01 STMT00013 (IL 0x020... ???) [000075] -A---------- * ASG simd8 (copy) [000073] D------N---- +--* LCL_VAR simd8 V07 tmp4 [000025] n----------- \--* OBJ simd8 [000024] ------------ \--* ADDR byref [000022] -------N---- \--* LCL_VAR simd8 V01 loc0 ***** BB01 STMT00016 (IL 0x020... ???) [000089] -A---------- * ASG simd8 (copy) [000087] D------N---- +--* LCL_VAR simd8 V08 tmp5 [000067] n----------- \--* OBJ simd8 [000066] ------------ \--* ADDR byref [000061] -------N---- \--* LCL_VAR simd8 V06 tmp3 ***** BB01 STMT00017 (IL 0x020... ???) [000092] -A---------- * ASG simd8 (copy) [000090] D------N---- +--* LCL_VAR simd8 V09 tmp6 [000065] n----------- \--* OBJ simd8 [000064] ------------ \--* ADDR byref [000062] -------N---- \--* LCL_VAR simd8 V07 tmp4 ***** BB01 STMT00014 (IL 0x020... ???) [000082] -A---------- * ASG simd8 (copy) [000080] D------N---- +--* LCL_VAR simd8 V10 tmp7 [000079] ------------ \--* HWINTRINSIC simd8 float Subtract [000077] ------------ +--* LCL_VAR simd8 V08 tmp5 [000078] ------------ \--* LCL_VAR simd8 V09 tmp6 ***** BB01 STMT00004 (IL ???... ???) [000029] --C-G------- * CALL void Console.WriteLine [000069] --C--------- arg0 \--* INTRINSIC float sqrt [000100] ------------ \--* HWINTRINSIC float float Dot [000095] -------N---- +--* LCL_VAR simd8 V10 tmp7 [000098] -------N---- \--* LCL_VAR simd8 V10 tmp7 ***** BB01 STMT00005 (IL 0x02B... ???) [000034] IA---------- * ASG simd8 (init) [000032] D------N---- +--* LCL_VAR simd8 V05 tmp2 [000033] ------------ \--* CNS_INT int 0 ***** BB01 STMT00006 (IL ???... ???) [000042] -A--G------- * ASG simd8 (copy) [000041] ----G--N---- +--* BLK simd8 <8> [000036] ------------ | \--* ADDR byref [000035] -------N---- | \--* LCL_VAR simd8 V05 tmp2 [000040] -------N---- \--* SIMD simd8 float initN [000038] ------------ \--* LIST float [000030] ------------ +--* CNS_DBL float -2.0000000000000000 [000037] ------------ \--* LIST float [000031] ------------ \--* CNS_DBL float 2.0000000000000000 ***** BB01 STMT00007 (IL 0x03A... ???) [000051] -A--G------- * ASG simd8 (copy) [000050] ----G--N---- +--* BLK simd8 <8> [000044] ------------ | \--* ADDR byref [000043] -------N---- | \--* LCL_VAR simd8 V02 loc1 [000049] -------N---- \--* SIMD simd8 float initN [000048] ------------ \--* LIST float [000045] ------------ +--* CNS_DBL float 2.0000000000000000 [000047] ------------ \--* LIST float [000046] ------------ \--* CNS_DBL float -2.0000000000000000 ***** BB01 STMT00020 (IL 0x04B... ???) [000114] -A---------- * ASG simd8 (copy) [000112] D------N---- +--* LCL_VAR simd8 V11 tmp8 [000057] n----------- \--* OBJ simd8 [000056] ------------ \--* ADDR byref [000039] -------N---- \--* LCL_VAR simd8 V05 tmp2 ***** BB01 STMT00021 (IL 0x04B... ???) [000117] -A---------- * ASG simd8 (copy) [000115] D------N---- +--* LCL_VAR simd8 V12 tmp9 [000055] n----------- \--* OBJ simd8 [000054] ------------ \--* ADDR byref [000052] -------N---- \--* LCL_VAR simd8 V02 loc1 ***** BB01 STMT00018 (IL 0x04B... ???) [000107] -A---------- * ASG simd8 (copy) [000105] D------N---- +--* LCL_VAR simd8 V13 tmp10 [000104] ------------ \--* HWINTRINSIC simd8 float Subtract [000102] ------------ +--* LCL_VAR simd8 V11 tmp8 [000103] ------------ \--* LCL_VAR simd8 V12 tmp9 ***** BB01 STMT00023 (IL 0x04B... ???) [000124] -AC--------- * ASG float [000123] D------N---- +--* LCL_VAR float V14 tmp11 [000134] ------------ \--* HWINTRINSIC float float Dot [000129] -------N---- +--* LCL_VAR simd8 V13 tmp10 [000132] -------N---- \--* LCL_VAR simd8 V13 tmp10 ***** BB01 STMT00009 (IL ???... ???) [000059] --C-G------- * CALL void Console.WriteLine [000126] ------------ arg0 \--* INTRINSIC float sqrt [000125] ------------ \--* LCL_VAR float V14 tmp11 ***** BB01 STMT00010 (IL 0x056... ???) [000060] ------------ * RETURN void ------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Allocate Objects no newobjs in this method; punting *************** Finishing PHASE Allocate Objects [no changes] *************** Starting PHASE Morph - Add internal blocks *************** After fgAddInternal() ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table is empty *************** Finishing PHASE Morph - Add internal blocks *************** Starting PHASE Remove empty try *************** In fgRemoveEmptyTry() No EH in this method, nothing to remove. *************** Finishing PHASE Remove empty try [no changes] *************** Starting PHASE Remove empty finally No EH in this method, nothing to remove. *************** Finishing PHASE Remove empty finally [no changes] *************** Starting PHASE Merge callfinally chains No EH in this method, nothing to merge. *************** Finishing PHASE Merge callfinally chains [no changes] *************** Starting PHASE Clone finally No EH in this method, no cloning. *************** Finishing PHASE Clone finally [no changes] *************** Starting PHASE Compute preds Renumbering the basic blocks for fgComputePred *************** Before renumbering the basic blocks ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table is empty *************** After renumbering the basic blocks =============== No blocks renumbered! New BlockSet epoch 2, # of blocks (including unused BB00): 2, bitset array size: 1 (short) *************** In fgComputePreds() ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- *************** After fgComputePreds() ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- *************** Finishing PHASE Compute preds *************** Starting PHASE Merge throw blocks *************** In fgTailMergeThrows Method does not have multiple noreturn calls. *************** Finishing PHASE Merge throw blocks [no changes] *************** Starting PHASE Update flow graph early pass *************** In fgUpdateFlowGraph() Before updating the flow graph: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** Finishing PHASE Update flow graph early pass *************** Starting PHASE Morph - Promote Structs *************** In fgResetImplicitByRefRefCount() *************** In fgPromoteStructs() lvaTable before fgPromoteStructs ; Initial local variable assignments ; ; V00 arg0 ref class-hnd ; V01 loc0 simd8 ld-addr-op ; V02 loc1 simd8 ld-addr-op ; V03 OutArgs lclBlk "OutgoingArgSpace" ; V04 tmp1 simd8 "NewObj constructor temp" ; V05 tmp2 simd8 "NewObj constructor temp" ; V06 tmp3 simd8 "Inlining Arg" ; V07 tmp4 simd8 "Inlining Arg" ; V08 tmp5 simd8 "Inlining Arg" ; V09 tmp6 simd8 "Inlining Arg" ; V10 tmp7 simd8 ld-addr-op "Inline stloc first use temp" ; V11 tmp8 simd8 "Inlining Arg" ; V12 tmp9 simd8 "Inlining Arg" ; V13 tmp10 simd8 ld-addr-op "Inline stloc first use temp" ; V14 tmp11 float "Inline stloc first use temp" Promoting struct local V06 (Vector2): lvaGrabTemp returning 15 (V15 tmp12) (a long lifetime temp) called for field V06.X (fldOffset=0x0). lvaGrabTemp returning 16 (V16 tmp13) (a long lifetime temp) called for field V06.Y (fldOffset=0x4). Promoting struct local V07 (Vector2): lvaGrabTemp returning 17 (V17 tmp14) (a long lifetime temp) called for field V07.X (fldOffset=0x0). lvaGrabTemp returning 18 (V18 tmp15) (a long lifetime temp) called for field V07.Y (fldOffset=0x4). lvaTable after fgPromoteStructs ; Initial local variable assignments ; ; V00 arg0 ref class-hnd ; V01 loc0 simd8 ld-addr-op ; V02 loc1 simd8 ld-addr-op ; V03 OutArgs lclBlk "OutgoingArgSpace" ; V04 tmp1 simd8 "NewObj constructor temp" ; V05 tmp2 simd8 "NewObj constructor temp" ; V06 tmp3 simd8 "Inlining Arg" ; V07 tmp4 simd8 "Inlining Arg" ; V08 tmp5 simd8 "Inlining Arg" ; V09 tmp6 simd8 "Inlining Arg" ; V10 tmp7 simd8 ld-addr-op "Inline stloc first use temp" ; V11 tmp8 simd8 "Inlining Arg" ; V12 tmp9 simd8 "Inlining Arg" ; V13 tmp10 simd8 ld-addr-op "Inline stloc first use temp" ; V14 tmp11 float "Inline stloc first use temp" ; V15 tmp12 float V06.X(offs=0x00) P-INDEP "field V06.X (fldOffset=0x0)" ; V16 tmp13 float V06.Y(offs=0x04) P-INDEP "field V06.Y (fldOffset=0x4)" ; V17 tmp14 float V07.X(offs=0x00) P-INDEP "field V07.X (fldOffset=0x0)" ; V18 tmp15 float V07.Y(offs=0x04) P-INDEP "field V07.Y (fldOffset=0x4)" *************** Finishing PHASE Morph - Promote Structs *************** Starting PHASE Morph - Structs/AddrExp *************** In fgMarkAddressExposedLocals() LocalAddressVisitor visiting statement: STMT00000 (IL 0x000...0x056) [000004] IA---------- * ASG simd8 (init) [000002] D------N---- +--* LCL_VAR simd8 V04 tmp1 [000003] ------------ \--* CNS_INT int 0 LocalAddressVisitor visiting statement: STMT00001 (IL ???... ???) [000012] -A--G------- * ASG simd8 (copy) [000011] ----G--N---- +--* BLK simd8 <8> [000006] ------------ | \--* ADDR byref [000005] -------N---- | \--* LCL_VAR simd8 V04 tmp1 [000010] -------N---- \--* SIMD simd8 float initN [000008] ------------ \--* LIST float [000000] ------------ +--* CNS_DBL float -1.0000000000000000 [000007] ------------ \--* LIST float [000001] ------------ \--* CNS_DBL float 1.0000000000000000 LocalAddressVisitor visiting statement: STMT00002 (IL 0x00F... ???) [000021] -A--G------- * ASG simd8 (copy) [000020] ----G--N---- +--* BLK simd8 <8> [000014] ------------ | \--* ADDR byref [000013] -------N---- | \--* LCL_VAR simd8 V01 loc0 [000019] -------N---- \--* SIMD simd8 float initN [000018] ------------ \--* LIST float [000015] ------------ +--* CNS_DBL float 1.0000000000000000 [000017] ------------ \--* LIST float [000016] ------------ \--* CNS_DBL float -1.0000000000000000 LocalAddressVisitor visiting statement: STMT00012 (IL 0x020... ???) [000072] -A---------- * ASG simd8 (copy) [000070] D------N---- +--* LCL_VAR simd8 (P) V06 tmp3 +--* float V06.X (offs=0x00) -> V15 tmp12 +--* float V06.Y (offs=0x04) -> V16 tmp13 [000027] n----------- \--* OBJ simd8 [000026] ------------ \--* ADDR byref [000009] -------N---- \--* LCL_VAR simd8 V04 tmp1 LocalAddressVisitor visiting statement: STMT00013 (IL 0x020... ???) [000075] -A---------- * ASG simd8 (copy) [000073] D------N---- +--* LCL_VAR simd8 (P) V07 tmp4 +--* float V07.X (offs=0x00) -> V17 tmp14 +--* float V07.Y (offs=0x04) -> V18 tmp15 [000025] n----------- \--* OBJ simd8 [000024] ------------ \--* ADDR byref [000022] -------N---- \--* LCL_VAR simd8 V01 loc0 LocalAddressVisitor visiting statement: STMT00016 (IL 0x020... ???) [000089] -A---------- * ASG simd8 (copy) [000087] D------N---- +--* LCL_VAR simd8 V08 tmp5 [000067] n----------- \--* OBJ simd8 [000066] ------------ \--* ADDR byref [000061] -------N---- \--* LCL_VAR simd8 (P) V06 tmp3 \--* float V06.X (offs=0x00) -> V15 tmp12 \--* float V06.Y (offs=0x04) -> V16 tmp13 LocalAddressVisitor visiting statement: STMT00017 (IL 0x020... ???) [000092] -A---------- * ASG simd8 (copy) [000090] D------N---- +--* LCL_VAR simd8 V09 tmp6 [000065] n----------- \--* OBJ simd8 [000064] ------------ \--* ADDR byref [000062] -------N---- \--* LCL_VAR simd8 (P) V07 tmp4 \--* float V07.X (offs=0x00) -> V17 tmp14 \--* float V07.Y (offs=0x04) -> V18 tmp15 LocalAddressVisitor visiting statement: STMT00014 (IL 0x020... ???) [000082] -A---------- * ASG simd8 (copy) [000080] D------N---- +--* LCL_VAR simd8 V10 tmp7 [000079] ------------ \--* HWINTRINSIC simd8 float Subtract [000077] ------------ +--* LCL_VAR simd8 V08 tmp5 [000078] ------------ \--* LCL_VAR simd8 V09 tmp6 LocalAddressVisitor visiting statement: STMT00004 (IL ???... ???) [000029] --C-G------- * CALL void Console.WriteLine [000069] --C--------- arg0 \--* INTRINSIC float sqrt [000100] ------------ \--* HWINTRINSIC float float Dot [000095] -------N---- +--* LCL_VAR simd8 V10 tmp7 [000098] -------N---- \--* LCL_VAR simd8 V10 tmp7 LocalAddressVisitor visiting statement: STMT00005 (IL 0x02B... ???) [000034] IA---------- * ASG simd8 (init) [000032] D------N---- +--* LCL_VAR simd8 V05 tmp2 [000033] ------------ \--* CNS_INT int 0 LocalAddressVisitor visiting statement: STMT00006 (IL ???... ???) [000042] -A--G------- * ASG simd8 (copy) [000041] ----G--N---- +--* BLK simd8 <8> [000036] ------------ | \--* ADDR byref [000035] -------N---- | \--* LCL_VAR simd8 V05 tmp2 [000040] -------N---- \--* SIMD simd8 float initN [000038] ------------ \--* LIST float [000030] ------------ +--* CNS_DBL float -2.0000000000000000 [000037] ------------ \--* LIST float [000031] ------------ \--* CNS_DBL float 2.0000000000000000 LocalAddressVisitor visiting statement: STMT00007 (IL 0x03A... ???) [000051] -A--G------- * ASG simd8 (copy) [000050] ----G--N---- +--* BLK simd8 <8> [000044] ------------ | \--* ADDR byref [000043] -------N---- | \--* LCL_VAR simd8 V02 loc1 [000049] -------N---- \--* SIMD simd8 float initN [000048] ------------ \--* LIST float [000045] ------------ +--* CNS_DBL float 2.0000000000000000 [000047] ------------ \--* LIST float [000046] ------------ \--* CNS_DBL float -2.0000000000000000 LocalAddressVisitor visiting statement: STMT00020 (IL 0x04B... ???) [000114] -A---------- * ASG simd8 (copy) [000112] D------N---- +--* LCL_VAR simd8 V11 tmp8 [000057] n----------- \--* OBJ simd8 [000056] ------------ \--* ADDR byref [000039] -------N---- \--* LCL_VAR simd8 V05 tmp2 LocalAddressVisitor visiting statement: STMT00021 (IL 0x04B... ???) [000117] -A---------- * ASG simd8 (copy) [000115] D------N---- +--* LCL_VAR simd8 V12 tmp9 [000055] n----------- \--* OBJ simd8 [000054] ------------ \--* ADDR byref [000052] -------N---- \--* LCL_VAR simd8 V02 loc1 LocalAddressVisitor visiting statement: STMT00018 (IL 0x04B... ???) [000107] -A---------- * ASG simd8 (copy) [000105] D------N---- +--* LCL_VAR simd8 V13 tmp10 [000104] ------------ \--* HWINTRINSIC simd8 float Subtract [000102] ------------ +--* LCL_VAR simd8 V11 tmp8 [000103] ------------ \--* LCL_VAR simd8 V12 tmp9 LocalAddressVisitor visiting statement: STMT00023 (IL 0x04B... ???) [000124] -AC--------- * ASG float [000123] D------N---- +--* LCL_VAR float V14 tmp11 [000134] ------------ \--* HWINTRINSIC float float Dot [000129] -------N---- +--* LCL_VAR simd8 V13 tmp10 [000132] -------N---- \--* LCL_VAR simd8 V13 tmp10 LocalAddressVisitor visiting statement: STMT00009 (IL ???... ???) [000059] --C-G------- * CALL void Console.WriteLine [000126] ------------ arg0 \--* INTRINSIC float sqrt [000125] ------------ \--* LCL_VAR float V14 tmp11 LocalAddressVisitor visiting statement: STMT00010 (IL 0x056... ???) [000060] ------------ * RETURN void *************** Finishing PHASE Morph - Structs/AddrExp *************** Starting PHASE Morph - ByRefs *************** In fgRetypeImplicitByRefArgs() *************** Finishing PHASE Morph - ByRefs *************** Starting PHASE Morph - Global *************** In fgMorphBlocks() Morphing BB01 of 'Program:Main(ref)' fgMorphTree BB01, STMT00000 (before) [000004] IA---------- * ASG simd8 (init) [000002] D------N---- +--* LCL_VAR simd8 V04 tmp1 [000003] ------------ \--* CNS_INT int 0 fgMorphBlkNode for dst tree, before: [000002] D----+-N---- * LCL_VAR simd8 V04 tmp1 fgMorphBlkNode after: [000002] D----+-N---- * LCL_VAR simd8 V04 tmp1 fgMorphInitBlock:fgMorphOneAsgBlock (after): [000004] -A---------- * ASG simd8 (copy) [000002] D----+-N---- +--* LCL_VAR simd8 V04 tmp1 [000136] ------------ \--* SIMD simd8 float init [000003] -----+------ \--* CNS_INT int 0 using oneAsgTree. fgMorphTree BB01, STMT00000 (after) [000004] -A---+------ * ASG simd8 (copy) [000002] D----+-N---- +--* LCL_VAR simd8 V04 tmp1 [000136] ------------ \--* SIMD simd8 float init [000003] -----+------ \--* CNS_INT int 0 fgMorphTree BB01, STMT00001 (before) [000012] -A--G------- * ASG simd8 (copy) [000011] ----G--N---- +--* BLK simd8 <8> [000006] ------------ | \--* ADDR byref [000005] -------N---- | \--* LCL_VAR simd8 V04 tmp1 [000010] -------N---- \--* SIMD simd8 float initN [000008] ------------ \--* LIST float [000000] ------------ +--* CNS_DBL float -1.0000000000000000 [000007] ------------ \--* LIST float [000001] ------------ \--* CNS_DBL float 1.0000000000000000 fgMorphCopyBlock: fgMorphBlkNode for dst tree, before: [000011] n---G+-N---- * BLK simd8 <8> [000006] -----+------ \--* ADDR byref [000005] D----+-N---- \--* LCL_VAR simd8 V04 tmp1 fgMorphBlkNode after: [000011] n---G+-N---- * BLK simd8 <8> [000006] -----+------ \--* ADDR byref [000005] D----+-N---- \--* LCL_VAR simd8 V04 tmp1 fgMorphBlkNode for src tree, before: [000010] -----+-N---- * SIMD simd8 float initN [000008] -----+------ \--* LIST float [000000] -----+------ +--* CNS_DBL float -1.0000000000000000 [000007] ------------ \--* LIST float [000001] -----+------ \--* CNS_DBL float 1.0000000000000000 fgMorphBlkNode after: [000010] -----+-N---- * SIMD simd8 float initN [000008] -----+------ \--* LIST float [000000] -----+------ +--* CNS_DBL float -1.0000000000000000 [000007] ------------ \--* LIST float [000001] -----+------ \--* CNS_DBL float 1.0000000000000000 block assignment to morph: [000012] -A--G------- * ASG simd8 (copy) [000011] n---G+-N---- +--* BLK simd8 <8> [000006] -----+------ | \--* ADDR byref [000005] D----+-N---- | \--* LCL_VAR simd8 V04 tmp1 [000010] -----+-N---- \--* SIMD simd8 float initN [000008] -----+------ \--* LIST float [000000] -----+------ +--* CNS_DBL float -1.0000000000000000 [000007] ------------ \--* LIST float [000001] -----+------ \--* CNS_DBL float 1.0000000000000000 this requires a CopyBlock. fgMorphCopyBlock (after): [000012] -A--G------- * ASG simd8 (copy) [000005] D----+-N---- +--* LCL_VAR simd8 V04 tmp1 [000010] -----+-N---- \--* SIMD simd8 float initN [000008] -----+------ \--* LIST float [000000] -----+------ +--* CNS_DBL float -1.0000000000000000 [000007] ------------ \--* LIST float [000001] -----+------ \--* CNS_DBL float 1.0000000000000000 fgMorphTree BB01, STMT00001 (after) [000012] -A--G+------ * ASG simd8 (copy) [000005] D----+-N---- +--* LCL_VAR simd8 V04 tmp1 [000010] -----+-N---- \--* SIMD simd8 float initN [000008] -----+------ \--* LIST float [000000] -----+------ +--* CNS_DBL float -1.0000000000000000 [000007] ------------ \--* LIST float [000001] -----+------ \--* CNS_DBL float 1.0000000000000000 fgMorphTree BB01, STMT00002 (before) [000021] -A--G------- * ASG simd8 (copy) [000020] ----G--N---- +--* BLK simd8 <8> [000014] ------------ | \--* ADDR byref [000013] -------N---- | \--* LCL_VAR simd8 V01 loc0 [000019] -------N---- \--* SIMD simd8 float initN [000018] ------------ \--* LIST float [000015] ------------ +--* CNS_DBL float 1.0000000000000000 [000017] ------------ \--* LIST float [000016] ------------ \--* CNS_DBL float -1.0000000000000000 fgMorphCopyBlock: fgMorphBlkNode for dst tree, before: [000020] n---G+-N---- * BLK simd8 <8> [000014] -----+------ \--* ADDR byref [000013] D----+-N---- \--* LCL_VAR simd8 V01 loc0 fgMorphBlkNode after: [000020] n---G+-N---- * BLK simd8 <8> [000014] -----+------ \--* ADDR byref [000013] D----+-N---- \--* LCL_VAR simd8 V01 loc0 fgMorphBlkNode for src tree, before: [000019] -----+-N---- * SIMD simd8 float initN [000018] -----+------ \--* LIST float [000015] -----+------ +--* CNS_DBL float 1.0000000000000000 [000017] ------------ \--* LIST float [000016] -----+------ \--* CNS_DBL float -1.0000000000000000 fgMorphBlkNode after: [000019] -----+-N---- * SIMD simd8 float initN [000018] -----+------ \--* LIST float [000015] -----+------ +--* CNS_DBL float 1.0000000000000000 [000017] ------------ \--* LIST float [000016] -----+------ \--* CNS_DBL float -1.0000000000000000 block assignment to morph: [000021] -A--G------- * ASG simd8 (copy) [000020] n---G+-N---- +--* BLK simd8 <8> [000014] -----+------ | \--* ADDR byref [000013] D----+-N---- | \--* LCL_VAR simd8 V01 loc0 [000019] -----+-N---- \--* SIMD simd8 float initN [000018] -----+------ \--* LIST float [000015] -----+------ +--* CNS_DBL float 1.0000000000000000 [000017] ------------ \--* LIST float [000016] -----+------ \--* CNS_DBL float -1.0000000000000000 this requires a CopyBlock. fgMorphCopyBlock (after): [000021] -A--G------- * ASG simd8 (copy) [000013] D----+-N---- +--* LCL_VAR simd8 V01 loc0 [000019] -----+-N---- \--* SIMD simd8 float initN [000018] -----+------ \--* LIST float [000015] -----+------ +--* CNS_DBL float 1.0000000000000000 [000017] ------------ \--* LIST float [000016] -----+------ \--* CNS_DBL float -1.0000000000000000 fgMorphTree BB01, STMT00002 (after) [000021] -A--G+------ * ASG simd8 (copy) [000013] D----+-N---- +--* LCL_VAR simd8 V01 loc0 [000019] -----+-N---- \--* SIMD simd8 float initN [000018] -----+------ \--* LIST float [000015] -----+------ +--* CNS_DBL float 1.0000000000000000 [000017] ------------ \--* LIST float [000016] -----+------ \--* CNS_DBL float -1.0000000000000000 fgMorphTree BB01, STMT00012 (before) [000072] -A---------- * ASG simd8 (copy) [000070] D------N---- +--* LCL_VAR simd8 (P) V06 tmp3 +--* float V06.X (offs=0x00) -> V15 tmp12 +--* float V06.Y (offs=0x04) -> V16 tmp13 [000027] n----------- \--* OBJ simd8 [000026] ------------ \--* ADDR byref [000009] -------N---- \--* LCL_VAR simd8 V04 tmp1 fgMorphCopyBlock: fgMorphBlkNode for dst tree, before: [000070] D----+-N---- * LCL_VAR simd8 (P) V06 tmp3 * float V06.X (offs=0x00) -> V15 tmp12 * float V06.Y (offs=0x04) -> V16 tmp13 fgMorphBlkNode after: [000070] D----+-N---- * LCL_VAR simd8 (P) V06 tmp3 * float V06.X (offs=0x00) -> V15 tmp12 * float V06.Y (offs=0x04) -> V16 tmp13 fgMorphBlkNode for src tree, before: [000027] n----+------ * OBJ simd8 [000026] -----+------ \--* ADDR byref [000009] -----+-N---- \--* LCL_VAR simd8 V04 tmp1 fgMorphBlkNode after: [000027] n----+------ * OBJ simd8 [000026] -----+------ \--* ADDR byref [000009] -----+-N---- \--* LCL_VAR simd8 V04 tmp1 block assignment to morph: [000072] -A---------- * ASG simd8 (copy) [000070] D----+-N---- +--* LCL_VAR simd8 (P) V06 tmp3 +--* float V06.X (offs=0x00) -> V15 tmp12 +--* float V06.Y (offs=0x04) -> V16 tmp13 [000027] n----+------ \--* OBJ simd8 [000026] -----+------ \--* ADDR byref [000009] -----+-N---- \--* LCL_VAR simd8 V04 tmp1 (destDoFldAsg=true) this requires a CopyBlock. Local V06 should not be enregistered because: written in a block op fgMorphCopyBlock (after): [000072] -A---------- * ASG simd8 (copy) [000070] D----+-N---- +--* LCL_VAR simd8 (P) V06 tmp3 +--* float V06.X (offs=0x00) -> V15 tmp12 +--* float V06.Y (offs=0x04) -> V16 tmp13 [000009] -----+-N---- \--* LCL_VAR simd8 V04 tmp1 GenTreeNode creates assertion: [000072] -A---------- * ASG simd8 (copy) In BB01 New Local Copy Assertion: V06 == V04 index=#01, mask=0000000000000001 fgMorphTree BB01, STMT00012 (after) [000072] -A---+------ * ASG simd8 (copy) [000070] D----+-N---- +--* LCL_VAR simd8 (P) V06 tmp3 +--* float V06.X (offs=0x00) -> V15 tmp12 +--* float V06.Y (offs=0x04) -> V16 tmp13 [000009] -----+-N---- \--* LCL_VAR simd8 V04 tmp1 fgMorphTree BB01, STMT00013 (before) [000075] -A---------- * ASG simd8 (copy) [000073] D------N---- +--* LCL_VAR simd8 (P) V07 tmp4 +--* float V07.X (offs=0x00) -> V17 tmp14 +--* float V07.Y (offs=0x04) -> V18 tmp15 [000025] n----------- \--* OBJ simd8 [000024] ------------ \--* ADDR byref [000022] -------N---- \--* LCL_VAR simd8 V01 loc0 fgMorphCopyBlock: fgMorphBlkNode for dst tree, before: [000073] D----+-N---- * LCL_VAR simd8 (P) V07 tmp4 * float V07.X (offs=0x00) -> V17 tmp14 * float V07.Y (offs=0x04) -> V18 tmp15 fgMorphBlkNode after: [000073] D----+-N---- * LCL_VAR simd8 (P) V07 tmp4 * float V07.X (offs=0x00) -> V17 tmp14 * float V07.Y (offs=0x04) -> V18 tmp15 fgMorphBlkNode for src tree, before: [000025] n----+------ * OBJ simd8 [000024] -----+------ \--* ADDR byref [000022] -----+-N---- \--* LCL_VAR simd8 V01 loc0 fgMorphBlkNode after: [000025] n----+------ * OBJ simd8 [000024] -----+------ \--* ADDR byref [000022] -----+-N---- \--* LCL_VAR simd8 V01 loc0 block assignment to morph: [000075] -A---------- * ASG simd8 (copy) [000073] D----+-N---- +--* LCL_VAR simd8 (P) V07 tmp4 +--* float V07.X (offs=0x00) -> V17 tmp14 +--* float V07.Y (offs=0x04) -> V18 tmp15 [000025] n----+------ \--* OBJ simd8 [000024] -----+------ \--* ADDR byref [000022] -----+-N---- \--* LCL_VAR simd8 V01 loc0 (destDoFldAsg=true) this requires a CopyBlock. Local V07 should not be enregistered because: written in a block op fgMorphCopyBlock (after): [000075] -A---------- * ASG simd8 (copy) [000073] D----+-N---- +--* LCL_VAR simd8 (P) V07 tmp4 +--* float V07.X (offs=0x00) -> V17 tmp14 +--* float V07.Y (offs=0x04) -> V18 tmp15 [000022] -----+-N---- \--* LCL_VAR simd8 V01 loc0 GenTreeNode creates assertion: [000075] -A---------- * ASG simd8 (copy) In BB01 New Local Copy Assertion: V07 == V01 index=#02, mask=0000000000000002 fgMorphTree BB01, STMT00013 (after) [000075] -A---+------ * ASG simd8 (copy) [000073] D----+-N---- +--* LCL_VAR simd8 (P) V07 tmp4 +--* float V07.X (offs=0x00) -> V17 tmp14 +--* float V07.Y (offs=0x04) -> V18 tmp15 [000022] -----+-N---- \--* LCL_VAR simd8 V01 loc0 fgMorphTree BB01, STMT00016 (before) [000089] -A---------- * ASG simd8 (copy) [000087] D------N---- +--* LCL_VAR simd8 V08 tmp5 [000067] n----------- \--* OBJ simd8 [000066] ------------ \--* ADDR byref [000061] -------N---- \--* LCL_VAR simd8 (P) V06 tmp3 \--* float V06.X (offs=0x00) -> V15 tmp12 \--* float V06.Y (offs=0x04) -> V16 tmp13 fgMorphCopyBlock: fgMorphBlkNode for dst tree, before: [000087] D----+-N---- * LCL_VAR simd8 V08 tmp5 fgMorphBlkNode after: [000087] D----+-N---- * LCL_VAR simd8 V08 tmp5 fgMorphBlkNode for src tree, before: [000067] n----+------ * OBJ simd8 [000066] -----+------ \--* ADDR byref [000061] -----+-N---- \--* LCL_VAR simd8 (P) V06 tmp3 \--* float V06.X (offs=0x00) -> V15 tmp12 \--* float V06.Y (offs=0x04) -> V16 tmp13 fgMorphBlkNode after: [000067] n----+------ * OBJ simd8 [000066] -----+------ \--* ADDR byref [000061] -----+-N---- \--* LCL_VAR simd8 (P) V06 tmp3 \--* float V06.X (offs=0x00) -> V15 tmp12 \--* float V06.Y (offs=0x04) -> V16 tmp13 block assignment to morph: [000089] -A---------- * ASG simd8 (copy) [000087] D----+-N---- +--* LCL_VAR simd8 V08 tmp5 [000067] n----+------ \--* OBJ simd8 [000066] -----+------ \--* ADDR byref [000061] -----+-N---- \--* LCL_VAR simd8 (P) V06 tmp3 \--* float V06.X (offs=0x00) -> V15 tmp12 \--* float V06.Y (offs=0x04) -> V16 tmp13 (srcDoFldAsg=true) this requires a CopyBlock. Local V06 should not be enregistered because: written in a block op fgMorphCopyBlock (after): [000089] -A---------- * ASG simd8 (copy) [000087] D----+-N---- +--* LCL_VAR simd8 V08 tmp5 [000061] -----+-N---- \--* LCL_VAR simd8 (P) V06 tmp3 \--* float V06.X (offs=0x00) -> V15 tmp12 \--* float V06.Y (offs=0x04) -> V16 tmp13 GenTreeNode creates assertion: [000089] -A---------- * ASG simd8 (copy) In BB01 New Local Copy Assertion: V08 == V06 index=#03, mask=0000000000000004 fgMorphTree BB01, STMT00016 (after) [000089] -A---+------ * ASG simd8 (copy) [000087] D----+-N---- +--* LCL_VAR simd8 V08 tmp5 [000061] -----+-N---- \--* LCL_VAR simd8 (P) V06 tmp3 \--* float V06.X (offs=0x00) -> V15 tmp12 \--* float V06.Y (offs=0x04) -> V16 tmp13 fgMorphTree BB01, STMT00017 (before) [000092] -A---------- * ASG simd8 (copy) [000090] D------N---- +--* LCL_VAR simd8 V09 tmp6 [000065] n----------- \--* OBJ simd8 [000064] ------------ \--* ADDR byref [000062] -------N---- \--* LCL_VAR simd8 (P) V07 tmp4 \--* float V07.X (offs=0x00) -> V17 tmp14 \--* float V07.Y (offs=0x04) -> V18 tmp15 fgMorphCopyBlock: fgMorphBlkNode for dst tree, before: [000090] D----+-N---- * LCL_VAR simd8 V09 tmp6 fgMorphBlkNode after: [000090] D----+-N---- * LCL_VAR simd8 V09 tmp6 fgMorphBlkNode for src tree, before: [000065] n----+------ * OBJ simd8 [000064] -----+------ \--* ADDR byref [000062] -----+-N---- \--* LCL_VAR simd8 (P) V07 tmp4 \--* float V07.X (offs=0x00) -> V17 tmp14 \--* float V07.Y (offs=0x04) -> V18 tmp15 fgMorphBlkNode after: [000065] n----+------ * OBJ simd8 [000064] -----+------ \--* ADDR byref [000062] -----+-N---- \--* LCL_VAR simd8 (P) V07 tmp4 \--* float V07.X (offs=0x00) -> V17 tmp14 \--* float V07.Y (offs=0x04) -> V18 tmp15 block assignment to morph: [000092] -A---------- * ASG simd8 (copy) [000090] D----+-N---- +--* LCL_VAR simd8 V09 tmp6 [000065] n----+------ \--* OBJ simd8 [000064] -----+------ \--* ADDR byref [000062] -----+-N---- \--* LCL_VAR simd8 (P) V07 tmp4 \--* float V07.X (offs=0x00) -> V17 tmp14 \--* float V07.Y (offs=0x04) -> V18 tmp15 (srcDoFldAsg=true) this requires a CopyBlock. Local V07 should not be enregistered because: written in a block op fgMorphCopyBlock (after): [000092] -A---------- * ASG simd8 (copy) [000090] D----+-N---- +--* LCL_VAR simd8 V09 tmp6 [000062] -----+-N---- \--* LCL_VAR simd8 (P) V07 tmp4 \--* float V07.X (offs=0x00) -> V17 tmp14 \--* float V07.Y (offs=0x04) -> V18 tmp15 GenTreeNode creates assertion: [000092] -A---------- * ASG simd8 (copy) In BB01 New Local Copy Assertion: V09 == V07 index=#04, mask=0000000000000008 fgMorphTree BB01, STMT00017 (after) [000092] -A---+------ * ASG simd8 (copy) [000090] D----+-N---- +--* LCL_VAR simd8 V09 tmp6 [000062] -----+-N---- \--* LCL_VAR simd8 (P) V07 tmp4 \--* float V07.X (offs=0x00) -> V17 tmp14 \--* float V07.Y (offs=0x04) -> V18 tmp15 fgMorphTree BB01, STMT00014 (before) [000082] -A---------- * ASG simd8 (copy) [000080] D------N---- +--* LCL_VAR simd8 V10 tmp7 [000079] ------------ \--* HWINTRINSIC simd8 float Subtract [000077] ------------ +--* LCL_VAR simd8 V08 tmp5 [000078] ------------ \--* LCL_VAR simd8 V09 tmp6 fgMorphCopyBlock: fgMorphBlkNode for dst tree, before: [000080] D----+-N---- * LCL_VAR simd8 V10 tmp7 fgMorphBlkNode after: [000080] D----+-N---- * LCL_VAR simd8 V10 tmp7 fgMorphBlkNode for src tree, before: [000079] -----+------ * HWINTRINSIC simd8 float Subtract [000077] -----+------ +--* LCL_VAR simd8 V08 tmp5 [000078] -----+------ \--* LCL_VAR simd8 V09 tmp6 fgMorphBlkNode after: [000079] -----+------ * HWINTRINSIC simd8 float Subtract [000077] -----+------ +--* LCL_VAR simd8 V08 tmp5 [000078] -----+------ \--* LCL_VAR simd8 V09 tmp6 fgMorphOneAsgBlock (after): [000082] -A---------- * ASG simd8 (copy) [000080] D----+-N---- +--* LCL_VAR simd8 V10 tmp7 [000079] -----+------ \--* HWINTRINSIC simd8 float Subtract [000077] -----+------ +--* LCL_VAR simd8 V08 tmp5 [000078] -----+------ \--* LCL_VAR simd8 V09 tmp6 using oneAsgTree. fgMorphCopyBlock (after): [000082] -A---------- * ASG simd8 (copy) [000080] D----+-N---- +--* LCL_VAR simd8 V10 tmp7 [000079] -----+------ \--* HWINTRINSIC simd8 float Subtract [000077] -----+------ +--* LCL_VAR simd8 V08 tmp5 [000078] -----+------ \--* LCL_VAR simd8 V09 tmp6 fgMorphTree BB01, STMT00004 (before) [000029] --C-G------- * CALL void Console.WriteLine [000069] --C--------- arg0 \--* INTRINSIC float sqrt [000100] ------------ \--* HWINTRINSIC float float Dot [000095] -------N---- +--* LCL_VAR simd8 V10 tmp7 [000098] -------N---- \--* LCL_VAR simd8 V10 tmp7 Initializing arg info for 29.CALL: ArgTable for 29.CALL after fgInitArgInfo: fgArgTabEntry[arg 0 69.INTRINSIC float (By ref), 1 reg: mm0, byteAlignment=8] Morphing args for 29.CALL: argSlots=1, preallocatedArgCount=4, nextSlotNum=4, nextSlotByteOffset=32, outgoingArgSpaceSize=32 Sorting the arguments: Deferred argument ('mm0'): [000069] -----+------ * INTRINSIC float sqrt [000100] -----+------ \--* HWINTRINSIC float float Dot [000095] -----+-N---- +--* LCL_VAR simd8 V10 tmp7 [000098] -----+-N---- \--* LCL_VAR simd8 V10 tmp7 Replaced with placeholder node: [000137] ----------L- * ARGPLACE float Shuffled argument table: mm0 ArgTable for 29.CALL after fgMorphArgs: fgArgTabEntry[arg 0 69.INTRINSIC float (By ref), 1 reg: mm0, byteAlignment=8, lateArgInx=0, processed] fgMorphTree BB01, STMT00004 (after) [000029] --CXG+------ * CALL void Console.WriteLine [000069] -----+------ arg0 in mm0 \--* INTRINSIC float sqrt [000100] -----+------ \--* HWINTRINSIC float float Dot [000095] -----+-N---- +--* LCL_VAR simd8 V10 tmp7 [000098] -----+-N---- \--* LCL_VAR simd8 V10 tmp7 fgMorphTree BB01, STMT00005 (before) [000034] IA---------- * ASG simd8 (init) [000032] D------N---- +--* LCL_VAR simd8 V05 tmp2 [000033] ------------ \--* CNS_INT int 0 fgMorphBlkNode for dst tree, before: [000032] D----+-N---- * LCL_VAR simd8 V05 tmp2 fgMorphBlkNode after: [000032] D----+-N---- * LCL_VAR simd8 V05 tmp2 fgMorphInitBlock:fgMorphOneAsgBlock (after): [000034] -A---------- * ASG simd8 (copy) [000032] D----+-N---- +--* LCL_VAR simd8 V05 tmp2 [000138] ------------ \--* SIMD simd8 float init [000033] -----+------ \--* CNS_INT int 0 using oneAsgTree. fgMorphTree BB01, STMT00005 (after) [000034] -A---+------ * ASG simd8 (copy) [000032] D----+-N---- +--* LCL_VAR simd8 V05 tmp2 [000138] ------------ \--* SIMD simd8 float init [000033] -----+------ \--* CNS_INT int 0 fgMorphTree BB01, STMT00006 (before) [000042] -A--G------- * ASG simd8 (copy) [000041] ----G--N---- +--* BLK simd8 <8> [000036] ------------ | \--* ADDR byref [000035] -------N---- | \--* LCL_VAR simd8 V05 tmp2 [000040] -------N---- \--* SIMD simd8 float initN [000038] ------------ \--* LIST float [000030] ------------ +--* CNS_DBL float -2.0000000000000000 [000037] ------------ \--* LIST float [000031] ------------ \--* CNS_DBL float 2.0000000000000000 fgMorphCopyBlock: fgMorphBlkNode for dst tree, before: [000041] n---G+-N---- * BLK simd8 <8> [000036] -----+------ \--* ADDR byref [000035] D----+-N---- \--* LCL_VAR simd8 V05 tmp2 fgMorphBlkNode after: [000041] n---G+-N---- * BLK simd8 <8> [000036] -----+------ \--* ADDR byref [000035] D----+-N---- \--* LCL_VAR simd8 V05 tmp2 fgMorphBlkNode for src tree, before: [000040] -----+-N---- * SIMD simd8 float initN [000038] -----+------ \--* LIST float [000030] -----+------ +--* CNS_DBL float -2.0000000000000000 [000037] ------------ \--* LIST float [000031] -----+------ \--* CNS_DBL float 2.0000000000000000 fgMorphBlkNode after: [000040] -----+-N---- * SIMD simd8 float initN [000038] -----+------ \--* LIST float [000030] -----+------ +--* CNS_DBL float -2.0000000000000000 [000037] ------------ \--* LIST float [000031] -----+------ \--* CNS_DBL float 2.0000000000000000 block assignment to morph: [000042] -A--G------- * ASG simd8 (copy) [000041] n---G+-N---- +--* BLK simd8 <8> [000036] -----+------ | \--* ADDR byref [000035] D----+-N---- | \--* LCL_VAR simd8 V05 tmp2 [000040] -----+-N---- \--* SIMD simd8 float initN [000038] -----+------ \--* LIST float [000030] -----+------ +--* CNS_DBL float -2.0000000000000000 [000037] ------------ \--* LIST float [000031] -----+------ \--* CNS_DBL float 2.0000000000000000 this requires a CopyBlock. fgMorphCopyBlock (after): [000042] -A--G------- * ASG simd8 (copy) [000035] D----+-N---- +--* LCL_VAR simd8 V05 tmp2 [000040] -----+-N---- \--* SIMD simd8 float initN [000038] -----+------ \--* LIST float [000030] -----+------ +--* CNS_DBL float -2.0000000000000000 [000037] ------------ \--* LIST float [000031] -----+------ \--* CNS_DBL float 2.0000000000000000 fgMorphTree BB01, STMT00006 (after) [000042] -A--G+------ * ASG simd8 (copy) [000035] D----+-N---- +--* LCL_VAR simd8 V05 tmp2 [000040] -----+-N---- \--* SIMD simd8 float initN [000038] -----+------ \--* LIST float [000030] -----+------ +--* CNS_DBL float -2.0000000000000000 [000037] ------------ \--* LIST float [000031] -----+------ \--* CNS_DBL float 2.0000000000000000 fgMorphTree BB01, STMT00007 (before) [000051] -A--G------- * ASG simd8 (copy) [000050] ----G--N---- +--* BLK simd8 <8> [000044] ------------ | \--* ADDR byref [000043] -------N---- | \--* LCL_VAR simd8 V02 loc1 [000049] -------N---- \--* SIMD simd8 float initN [000048] ------------ \--* LIST float [000045] ------------ +--* CNS_DBL float 2.0000000000000000 [000047] ------------ \--* LIST float [000046] ------------ \--* CNS_DBL float -2.0000000000000000 fgMorphCopyBlock: fgMorphBlkNode for dst tree, before: [000050] n---G+-N---- * BLK simd8 <8> [000044] -----+------ \--* ADDR byref [000043] D----+-N---- \--* LCL_VAR simd8 V02 loc1 fgMorphBlkNode after: [000050] n---G+-N---- * BLK simd8 <8> [000044] -----+------ \--* ADDR byref [000043] D----+-N---- \--* LCL_VAR simd8 V02 loc1 fgMorphBlkNode for src tree, before: [000049] -----+-N---- * SIMD simd8 float initN [000048] -----+------ \--* LIST float [000045] -----+------ +--* CNS_DBL float 2.0000000000000000 [000047] ------------ \--* LIST float [000046] -----+------ \--* CNS_DBL float -2.0000000000000000 fgMorphBlkNode after: [000049] -----+-N---- * SIMD simd8 float initN [000048] -----+------ \--* LIST float [000045] -----+------ +--* CNS_DBL float 2.0000000000000000 [000047] ------------ \--* LIST float [000046] -----+------ \--* CNS_DBL float -2.0000000000000000 block assignment to morph: [000051] -A--G------- * ASG simd8 (copy) [000050] n---G+-N---- +--* BLK simd8 <8> [000044] -----+------ | \--* ADDR byref [000043] D----+-N---- | \--* LCL_VAR simd8 V02 loc1 [000049] -----+-N---- \--* SIMD simd8 float initN [000048] -----+------ \--* LIST float [000045] -----+------ +--* CNS_DBL float 2.0000000000000000 [000047] ------------ \--* LIST float [000046] -----+------ \--* CNS_DBL float -2.0000000000000000 this requires a CopyBlock. fgMorphCopyBlock (after): [000051] -A--G------- * ASG simd8 (copy) [000043] D----+-N---- +--* LCL_VAR simd8 V02 loc1 [000049] -----+-N---- \--* SIMD simd8 float initN [000048] -----+------ \--* LIST float [000045] -----+------ +--* CNS_DBL float 2.0000000000000000 [000047] ------------ \--* LIST float [000046] -----+------ \--* CNS_DBL float -2.0000000000000000 fgMorphTree BB01, STMT00007 (after) [000051] -A--G+------ * ASG simd8 (copy) [000043] D----+-N---- +--* LCL_VAR simd8 V02 loc1 [000049] -----+-N---- \--* SIMD simd8 float initN [000048] -----+------ \--* LIST float [000045] -----+------ +--* CNS_DBL float 2.0000000000000000 [000047] ------------ \--* LIST float [000046] -----+------ \--* CNS_DBL float -2.0000000000000000 fgMorphTree BB01, STMT00020 (before) [000114] -A---------- * ASG simd8 (copy) [000112] D------N---- +--* LCL_VAR simd8 V11 tmp8 [000057] n----------- \--* OBJ simd8 [000056] ------------ \--* ADDR byref [000039] -------N---- \--* LCL_VAR simd8 V05 tmp2 fgMorphCopyBlock: fgMorphBlkNode for dst tree, before: [000112] D----+-N---- * LCL_VAR simd8 V11 tmp8 fgMorphBlkNode after: [000112] D----+-N---- * LCL_VAR simd8 V11 tmp8 fgMorphBlkNode for src tree, before: [000057] n----+------ * OBJ simd8 [000056] -----+------ \--* ADDR byref [000039] -----+-N---- \--* LCL_VAR simd8 V05 tmp2 fgMorphBlkNode after: [000057] n----+------ * OBJ simd8 [000056] -----+------ \--* ADDR byref [000039] -----+-N---- \--* LCL_VAR simd8 V05 tmp2 fgMorphOneAsgBlock (after): [000114] -A---------- * ASG simd8 (copy) [000112] D----+-N---- +--* LCL_VAR simd8 V11 tmp8 [000039] -----+-N---- \--* LCL_VAR simd8 V05 tmp2 using oneAsgTree. fgMorphCopyBlock (after): [000114] -A---------- * ASG simd8 (copy) [000112] D----+-N---- +--* LCL_VAR simd8 V11 tmp8 [000039] -----+-N---- \--* LCL_VAR simd8 V05 tmp2 GenTreeNode creates assertion: [000114] -A---------- * ASG simd8 (copy) In BB01 New Local Copy Assertion: V11 == V05 index=#05, mask=0000000000000010 fgMorphTree BB01, STMT00020 (after) [000114] -A---+------ * ASG simd8 (copy) [000112] D----+-N---- +--* LCL_VAR simd8 V11 tmp8 [000039] -----+-N---- \--* LCL_VAR simd8 V05 tmp2 fgMorphTree BB01, STMT00021 (before) [000117] -A---------- * ASG simd8 (copy) [000115] D------N---- +--* LCL_VAR simd8 V12 tmp9 [000055] n----------- \--* OBJ simd8 [000054] ------------ \--* ADDR byref [000052] -------N---- \--* LCL_VAR simd8 V02 loc1 fgMorphCopyBlock: fgMorphBlkNode for dst tree, before: [000115] D----+-N---- * LCL_VAR simd8 V12 tmp9 fgMorphBlkNode after: [000115] D----+-N---- * LCL_VAR simd8 V12 tmp9 fgMorphBlkNode for src tree, before: [000055] n----+------ * OBJ simd8 [000054] -----+------ \--* ADDR byref [000052] -----+-N---- \--* LCL_VAR simd8 V02 loc1 fgMorphBlkNode after: [000055] n----+------ * OBJ simd8 [000054] -----+------ \--* ADDR byref [000052] -----+-N---- \--* LCL_VAR simd8 V02 loc1 fgMorphOneAsgBlock (after): [000117] -A---------- * ASG simd8 (copy) [000115] D----+-N---- +--* LCL_VAR simd8 V12 tmp9 [000052] -----+-N---- \--* LCL_VAR simd8 V02 loc1 using oneAsgTree. fgMorphCopyBlock (after): [000117] -A---------- * ASG simd8 (copy) [000115] D----+-N---- +--* LCL_VAR simd8 V12 tmp9 [000052] -----+-N---- \--* LCL_VAR simd8 V02 loc1 GenTreeNode creates assertion: [000117] -A---------- * ASG simd8 (copy) In BB01 New Local Copy Assertion: V12 == V02 index=#06, mask=0000000000000020 fgMorphTree BB01, STMT00021 (after) [000117] -A---+------ * ASG simd8 (copy) [000115] D----+-N---- +--* LCL_VAR simd8 V12 tmp9 [000052] -----+-N---- \--* LCL_VAR simd8 V02 loc1 fgMorphTree BB01, STMT00018 (before) [000107] -A---------- * ASG simd8 (copy) [000105] D------N---- +--* LCL_VAR simd8 V13 tmp10 [000104] ------------ \--* HWINTRINSIC simd8 float Subtract [000102] ------------ +--* LCL_VAR simd8 V11 tmp8 [000103] ------------ \--* LCL_VAR simd8 V12 tmp9 Assertion prop in BB01: Copy Assertion: V11 == V05 index=#05, mask=0000000000000010 [000102] ------------ * LCL_VAR simd8 V05 tmp2 Assertion prop in BB01: Copy Assertion: V12 == V02 index=#06, mask=0000000000000020 [000103] ------------ * LCL_VAR simd8 V02 loc1 fgMorphCopyBlock: fgMorphBlkNode for dst tree, before: [000105] D----+-N---- * LCL_VAR simd8 V13 tmp10 fgMorphBlkNode after: [000105] D----+-N---- * LCL_VAR simd8 V13 tmp10 fgMorphBlkNode for src tree, before: [000104] -----+------ * HWINTRINSIC simd8 float Subtract [000102] -----+------ +--* LCL_VAR simd8 V05 tmp2 [000103] -----+------ \--* LCL_VAR simd8 V02 loc1 fgMorphBlkNode after: [000104] -----+------ * HWINTRINSIC simd8 float Subtract [000102] -----+------ +--* LCL_VAR simd8 V05 tmp2 [000103] -----+------ \--* LCL_VAR simd8 V02 loc1 fgMorphOneAsgBlock (after): [000107] -A---------- * ASG simd8 (copy) [000105] D----+-N---- +--* LCL_VAR simd8 V13 tmp10 [000104] -----+------ \--* HWINTRINSIC simd8 float Subtract [000102] -----+------ +--* LCL_VAR simd8 V05 tmp2 [000103] -----+------ \--* LCL_VAR simd8 V02 loc1 using oneAsgTree. fgMorphCopyBlock (after): [000107] -A---------- * ASG simd8 (copy) [000105] D----+-N---- +--* LCL_VAR simd8 V13 tmp10 [000104] -----+------ \--* HWINTRINSIC simd8 float Subtract [000102] -----+------ +--* LCL_VAR simd8 V05 tmp2 [000103] -----+------ \--* LCL_VAR simd8 V02 loc1 fgMorphTree BB01, STMT00018 (after) [000107] -A---+------ * ASG simd8 (copy) [000105] D----+-N---- +--* LCL_VAR simd8 V13 tmp10 [000104] -----+------ \--* HWINTRINSIC simd8 float Subtract [000102] -----+------ +--* LCL_VAR simd8 V05 tmp2 [000103] -----+------ \--* LCL_VAR simd8 V02 loc1 fgMorphTree BB01, STMT00023 (before) [000124] -AC--------- * ASG float [000123] D------N---- +--* LCL_VAR float V14 tmp11 [000134] ------------ \--* HWINTRINSIC float float Dot [000129] -------N---- +--* LCL_VAR simd8 V13 tmp10 [000132] -------N---- \--* LCL_VAR simd8 V13 tmp10 fgMorphTree BB01, STMT00009 (before) [000059] --C-G------- * CALL void Console.WriteLine [000126] ------------ arg0 \--* INTRINSIC float sqrt [000125] ------------ \--* LCL_VAR float V14 tmp11 Initializing arg info for 59.CALL: ArgTable for 59.CALL after fgInitArgInfo: fgArgTabEntry[arg 0 126.INTRINSIC float (By ref), 1 reg: mm0, byteAlignment=8] Morphing args for 59.CALL: argSlots=1, preallocatedArgCount=4, nextSlotNum=4, nextSlotByteOffset=32, outgoingArgSpaceSize=32 Sorting the arguments: Deferred argument ('mm0'): [000126] -----+------ * INTRINSIC float sqrt [000125] -----+------ \--* LCL_VAR float V14 tmp11 Replaced with placeholder node: [000139] ----------L- * ARGPLACE float Shuffled argument table: mm0 ArgTable for 59.CALL after fgMorphArgs: fgArgTabEntry[arg 0 126.INTRINSIC float (By ref), 1 reg: mm0, byteAlignment=8, lateArgInx=0, processed] fgMorphTree BB01, STMT00009 (after) [000059] --CXG+------ * CALL void Console.WriteLine [000126] -----+------ arg0 in mm0 \--* INTRINSIC float sqrt [000125] -----+------ \--* LCL_VAR float V14 tmp11 fgMorphTree BB01, STMT00010 (before) [000060] ------------ * RETURN void *************** Finishing PHASE Morph - Global Trees after Morph - Global ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..057) (return), preds={} succs={} ***** BB01 STMT00000 (IL 0x000...0x056) [000004] -A---+------ * ASG simd8 (copy) [000002] D----+-N---- +--* LCL_VAR simd8 V04 tmp1 [000136] ------------ \--* SIMD simd8 float init [000003] -----+------ \--* CNS_INT int 0 ***** BB01 STMT00001 (IL ???... ???) [000012] -A--G+------ * ASG simd8 (copy) [000005] D----+-N---- +--* LCL_VAR simd8 V04 tmp1 [000010] -----+-N---- \--* SIMD simd8 float initN [000008] -----+------ \--* LIST float [000000] -----+------ +--* CNS_DBL float -1.0000000000000000 [000007] ------------ \--* LIST float [000001] -----+------ \--* CNS_DBL float 1.0000000000000000 ***** BB01 STMT00002 (IL 0x00F... ???) [000021] -A--G+------ * ASG simd8 (copy) [000013] D----+-N---- +--* LCL_VAR simd8 V01 loc0 [000019] -----+-N---- \--* SIMD simd8 float initN [000018] -----+------ \--* LIST float [000015] -----+------ +--* CNS_DBL float 1.0000000000000000 [000017] ------------ \--* LIST float [000016] -----+------ \--* CNS_DBL float -1.0000000000000000 ***** BB01 STMT00012 (IL 0x020... ???) [000072] -A---+------ * ASG simd8 (copy) [000070] D----+-N---- +--* LCL_VAR simd8 (P) V06 tmp3 +--* float V06.X (offs=0x00) -> V15 tmp12 +--* float V06.Y (offs=0x04) -> V16 tmp13 [000009] -----+-N---- \--* LCL_VAR simd8 V04 tmp1 ***** BB01 STMT00013 (IL 0x020... ???) [000075] -A---+------ * ASG simd8 (copy) [000073] D----+-N---- +--* LCL_VAR simd8 (P) V07 tmp4 +--* float V07.X (offs=0x00) -> V17 tmp14 +--* float V07.Y (offs=0x04) -> V18 tmp15 [000022] -----+-N---- \--* LCL_VAR simd8 V01 loc0 ***** BB01 STMT00016 (IL 0x020... ???) [000089] -A---+------ * ASG simd8 (copy) [000087] D----+-N---- +--* LCL_VAR simd8 V08 tmp5 [000061] -----+-N---- \--* LCL_VAR simd8 (P) V06 tmp3 \--* float V06.X (offs=0x00) -> V15 tmp12 \--* float V06.Y (offs=0x04) -> V16 tmp13 ***** BB01 STMT00017 (IL 0x020... ???) [000092] -A---+------ * ASG simd8 (copy) [000090] D----+-N---- +--* LCL_VAR simd8 V09 tmp6 [000062] -----+-N---- \--* LCL_VAR simd8 (P) V07 tmp4 \--* float V07.X (offs=0x00) -> V17 tmp14 \--* float V07.Y (offs=0x04) -> V18 tmp15 ***** BB01 STMT00014 (IL 0x020... ???) [000082] -A---+------ * ASG simd8 (copy) [000080] D----+-N---- +--* LCL_VAR simd8 V10 tmp7 [000079] -----+------ \--* HWINTRINSIC simd8 float Subtract [000077] -----+------ +--* LCL_VAR simd8 V08 tmp5 [000078] -----+------ \--* LCL_VAR simd8 V09 tmp6 ***** BB01 STMT00004 (IL ???... ???) [000029] --CXG+------ * CALL void Console.WriteLine [000069] -----+------ arg0 in mm0 \--* INTRINSIC float sqrt [000100] -----+------ \--* HWINTRINSIC float float Dot [000095] -----+-N---- +--* LCL_VAR simd8 V10 tmp7 [000098] -----+-N---- \--* LCL_VAR simd8 V10 tmp7 ***** BB01 STMT00005 (IL 0x02B... ???) [000034] -A---+------ * ASG simd8 (copy) [000032] D----+-N---- +--* LCL_VAR simd8 V05 tmp2 [000138] ------------ \--* SIMD simd8 float init [000033] -----+------ \--* CNS_INT int 0 ***** BB01 STMT00006 (IL ???... ???) [000042] -A--G+------ * ASG simd8 (copy) [000035] D----+-N---- +--* LCL_VAR simd8 V05 tmp2 [000040] -----+-N---- \--* SIMD simd8 float initN [000038] -----+------ \--* LIST float [000030] -----+------ +--* CNS_DBL float -2.0000000000000000 [000037] ------------ \--* LIST float [000031] -----+------ \--* CNS_DBL float 2.0000000000000000 ***** BB01 STMT00007 (IL 0x03A... ???) [000051] -A--G+------ * ASG simd8 (copy) [000043] D----+-N---- +--* LCL_VAR simd8 V02 loc1 [000049] -----+-N---- \--* SIMD simd8 float initN [000048] -----+------ \--* LIST float [000045] -----+------ +--* CNS_DBL float 2.0000000000000000 [000047] ------------ \--* LIST float [000046] -----+------ \--* CNS_DBL float -2.0000000000000000 ***** BB01 STMT00020 (IL 0x04B... ???) [000114] -A---+------ * ASG simd8 (copy) [000112] D----+-N---- +--* LCL_VAR simd8 V11 tmp8 [000039] -----+-N---- \--* LCL_VAR simd8 V05 tmp2 ***** BB01 STMT00021 (IL 0x04B... ???) [000117] -A---+------ * ASG simd8 (copy) [000115] D----+-N---- +--* LCL_VAR simd8 V12 tmp9 [000052] -----+-N---- \--* LCL_VAR simd8 V02 loc1 ***** BB01 STMT00018 (IL 0x04B... ???) [000107] -A---+------ * ASG simd8 (copy) [000105] D----+-N---- +--* LCL_VAR simd8 V13 tmp10 [000104] -----+------ \--* HWINTRINSIC simd8 float Subtract [000102] -----+------ +--* LCL_VAR simd8 V05 tmp2 [000103] -----+------ \--* LCL_VAR simd8 V02 loc1 ***** BB01 STMT00023 (IL 0x04B... ???) [000124] -A---+------ * ASG float [000123] D----+-N---- +--* LCL_VAR float V14 tmp11 [000134] -----+------ \--* HWINTRINSIC float float Dot [000129] -----+-N---- +--* LCL_VAR simd8 V13 tmp10 [000132] -----+-N---- \--* LCL_VAR simd8 V13 tmp10 ***** BB01 STMT00009 (IL ???... ???) [000059] --CXG+------ * CALL void Console.WriteLine [000126] -----+------ arg0 in mm0 \--* INTRINSIC float sqrt [000125] -----+------ \--* LCL_VAR float V14 tmp11 ***** BB01 STMT00010 (IL 0x056... ???) [000060] -----+------ * RETURN void ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** Starting PHASE GS Cookie No GS security needed *************** Finishing PHASE GS Cookie *************** Starting PHASE Compute edge weights (1, false) *************** In fgComputeBlockAndEdgeWeights() ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe ----------------------------------------------------------------------------------------------------------------------------------------- -- no profile data, so using default called count -- not optimizing or no profile data, so not computing edge weights *************** Finishing PHASE Compute edge weights (1, false) *************** Starting PHASE Create EH funclets *************** In fgCreateFunclets() After fgCreateFunclets() ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table is empty *************** In fgDebugCheckBBlist *************** Finishing PHASE Create EH funclets *************** Starting PHASE Invert loops *************** Finishing PHASE Invert loops Trees after Invert loops ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..057) (return), preds={} succs={} ***** BB01 STMT00000 (IL 0x000...0x056) [000004] -A---+------ * ASG simd8 (copy) [000002] D----+-N---- +--* LCL_VAR simd8 V04 tmp1 [000136] ------------ \--* SIMD simd8 float init [000003] -----+------ \--* CNS_INT int 0 ***** BB01 STMT00001 (IL ???... ???) [000012] -A--G+------ * ASG simd8 (copy) [000005] D----+-N---- +--* LCL_VAR simd8 V04 tmp1 [000010] -----+-N---- \--* SIMD simd8 float initN [000008] -----+------ \--* LIST float [000000] -----+------ +--* CNS_DBL float -1.0000000000000000 [000007] ------------ \--* LIST float [000001] -----+------ \--* CNS_DBL float 1.0000000000000000 ***** BB01 STMT00002 (IL 0x00F... ???) [000021] -A--G+------ * ASG simd8 (copy) [000013] D----+-N---- +--* LCL_VAR simd8 V01 loc0 [000019] -----+-N---- \--* SIMD simd8 float initN [000018] -----+------ \--* LIST float [000015] -----+------ +--* CNS_DBL float 1.0000000000000000 [000017] ------------ \--* LIST float [000016] -----+------ \--* CNS_DBL float -1.0000000000000000 ***** BB01 STMT00012 (IL 0x020... ???) [000072] -A---+------ * ASG simd8 (copy) [000070] D----+-N---- +--* LCL_VAR simd8 (P) V06 tmp3 +--* float V06.X (offs=0x00) -> V15 tmp12 +--* float V06.Y (offs=0x04) -> V16 tmp13 [000009] -----+-N---- \--* LCL_VAR simd8 V04 tmp1 ***** BB01 STMT00013 (IL 0x020... ???) [000075] -A---+------ * ASG simd8 (copy) [000073] D----+-N---- +--* LCL_VAR simd8 (P) V07 tmp4 +--* float V07.X (offs=0x00) -> V17 tmp14 +--* float V07.Y (offs=0x04) -> V18 tmp15 [000022] -----+-N---- \--* LCL_VAR simd8 V01 loc0 ***** BB01 STMT00016 (IL 0x020... ???) [000089] -A---+------ * ASG simd8 (copy) [000087] D----+-N---- +--* LCL_VAR simd8 V08 tmp5 [000061] -----+-N---- \--* LCL_VAR simd8 (P) V06 tmp3 \--* float V06.X (offs=0x00) -> V15 tmp12 \--* float V06.Y (offs=0x04) -> V16 tmp13 ***** BB01 STMT00017 (IL 0x020... ???) [000092] -A---+------ * ASG simd8 (copy) [000090] D----+-N---- +--* LCL_VAR simd8 V09 tmp6 [000062] -----+-N---- \--* LCL_VAR simd8 (P) V07 tmp4 \--* float V07.X (offs=0x00) -> V17 tmp14 \--* float V07.Y (offs=0x04) -> V18 tmp15 ***** BB01 STMT00014 (IL 0x020... ???) [000082] -A---+------ * ASG simd8 (copy) [000080] D----+-N---- +--* LCL_VAR simd8 V10 tmp7 [000079] -----+------ \--* HWINTRINSIC simd8 float Subtract [000077] -----+------ +--* LCL_VAR simd8 V08 tmp5 [000078] -----+------ \--* LCL_VAR simd8 V09 tmp6 ***** BB01 STMT00004 (IL ???... ???) [000029] --CXG+------ * CALL void Console.WriteLine [000069] -----+------ arg0 in mm0 \--* INTRINSIC float sqrt [000100] -----+------ \--* HWINTRINSIC float float Dot [000095] -----+-N---- +--* LCL_VAR simd8 V10 tmp7 [000098] -----+-N---- \--* LCL_VAR simd8 V10 tmp7 ***** BB01 STMT00005 (IL 0x02B... ???) [000034] -A---+------ * ASG simd8 (copy) [000032] D----+-N---- +--* LCL_VAR simd8 V05 tmp2 [000138] ------------ \--* SIMD simd8 float init [000033] -----+------ \--* CNS_INT int 0 ***** BB01 STMT00006 (IL ???... ???) [000042] -A--G+------ * ASG simd8 (copy) [000035] D----+-N---- +--* LCL_VAR simd8 V05 tmp2 [000040] -----+-N---- \--* SIMD simd8 float initN [000038] -----+------ \--* LIST float [000030] -----+------ +--* CNS_DBL float -2.0000000000000000 [000037] ------------ \--* LIST float [000031] -----+------ \--* CNS_DBL float 2.0000000000000000 ***** BB01 STMT00007 (IL 0x03A... ???) [000051] -A--G+------ * ASG simd8 (copy) [000043] D----+-N---- +--* LCL_VAR simd8 V02 loc1 [000049] -----+-N---- \--* SIMD simd8 float initN [000048] -----+------ \--* LIST float [000045] -----+------ +--* CNS_DBL float 2.0000000000000000 [000047] ------------ \--* LIST float [000046] -----+------ \--* CNS_DBL float -2.0000000000000000 ***** BB01 STMT00020 (IL 0x04B... ???) [000114] -A---+------ * ASG simd8 (copy) [000112] D----+-N---- +--* LCL_VAR simd8 V11 tmp8 [000039] -----+-N---- \--* LCL_VAR simd8 V05 tmp2 ***** BB01 STMT00021 (IL 0x04B... ???) [000117] -A---+------ * ASG simd8 (copy) [000115] D----+-N---- +--* LCL_VAR simd8 V12 tmp9 [000052] -----+-N---- \--* LCL_VAR simd8 V02 loc1 ***** BB01 STMT00018 (IL 0x04B... ???) [000107] -A---+------ * ASG simd8 (copy) [000105] D----+-N---- +--* LCL_VAR simd8 V13 tmp10 [000104] -----+------ \--* HWINTRINSIC simd8 float Subtract [000102] -----+------ +--* LCL_VAR simd8 V05 tmp2 [000103] -----+------ \--* LCL_VAR simd8 V02 loc1 ***** BB01 STMT00023 (IL 0x04B... ???) [000124] -A---+------ * ASG float [000123] D----+-N---- +--* LCL_VAR float V14 tmp11 [000134] -----+------ \--* HWINTRINSIC float float Dot [000129] -----+-N---- +--* LCL_VAR simd8 V13 tmp10 [000132] -----+-N---- \--* LCL_VAR simd8 V13 tmp10 ***** BB01 STMT00009 (IL ???... ???) [000059] --CXG+------ * CALL void Console.WriteLine [000126] -----+------ arg0 in mm0 \--* INTRINSIC float sqrt [000125] -----+------ \--* LCL_VAR float V14 tmp11 ***** BB01 STMT00010 (IL 0x056... ???) [000060] -----+------ * RETURN void ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** Starting PHASE Optimize layout *************** In fgUpdateFlowGraph() Before updating the flow graph: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe ----------------------------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** In fgUpdateFlowGraph() Before updating the flow graph: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe ----------------------------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** Finishing PHASE Optimize layout Trees after Optimize layout ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..057) (return), preds={} succs={} ***** BB01 STMT00000 (IL 0x000...0x056) [000004] -A---+------ * ASG simd8 (copy) [000002] D----+-N---- +--* LCL_VAR simd8 V04 tmp1 [000136] ------------ \--* SIMD simd8 float init [000003] -----+------ \--* CNS_INT int 0 ***** BB01 STMT00001 (IL ???... ???) [000012] -A--G+------ * ASG simd8 (copy) [000005] D----+-N---- +--* LCL_VAR simd8 V04 tmp1 [000010] -----+-N---- \--* SIMD simd8 float initN [000008] -----+------ \--* LIST float [000000] -----+------ +--* CNS_DBL float -1.0000000000000000 [000007] ------------ \--* LIST float [000001] -----+------ \--* CNS_DBL float 1.0000000000000000 ***** BB01 STMT00002 (IL 0x00F... ???) [000021] -A--G+------ * ASG simd8 (copy) [000013] D----+-N---- +--* LCL_VAR simd8 V01 loc0 [000019] -----+-N---- \--* SIMD simd8 float initN [000018] -----+------ \--* LIST float [000015] -----+------ +--* CNS_DBL float 1.0000000000000000 [000017] ------------ \--* LIST float [000016] -----+------ \--* CNS_DBL float -1.0000000000000000 ***** BB01 STMT00012 (IL 0x020... ???) [000072] -A---+------ * ASG simd8 (copy) [000070] D----+-N---- +--* LCL_VAR simd8 (P) V06 tmp3 +--* float V06.X (offs=0x00) -> V15 tmp12 +--* float V06.Y (offs=0x04) -> V16 tmp13 [000009] -----+-N---- \--* LCL_VAR simd8 V04 tmp1 ***** BB01 STMT00013 (IL 0x020... ???) [000075] -A---+------ * ASG simd8 (copy) [000073] D----+-N---- +--* LCL_VAR simd8 (P) V07 tmp4 +--* float V07.X (offs=0x00) -> V17 tmp14 +--* float V07.Y (offs=0x04) -> V18 tmp15 [000022] -----+-N---- \--* LCL_VAR simd8 V01 loc0 ***** BB01 STMT00016 (IL 0x020... ???) [000089] -A---+------ * ASG simd8 (copy) [000087] D----+-N---- +--* LCL_VAR simd8 V08 tmp5 [000061] -----+-N---- \--* LCL_VAR simd8 (P) V06 tmp3 \--* float V06.X (offs=0x00) -> V15 tmp12 \--* float V06.Y (offs=0x04) -> V16 tmp13 ***** BB01 STMT00017 (IL 0x020... ???) [000092] -A---+------ * ASG simd8 (copy) [000090] D----+-N---- +--* LCL_VAR simd8 V09 tmp6 [000062] -----+-N---- \--* LCL_VAR simd8 (P) V07 tmp4 \--* float V07.X (offs=0x00) -> V17 tmp14 \--* float V07.Y (offs=0x04) -> V18 tmp15 ***** BB01 STMT00014 (IL 0x020... ???) [000082] -A---+------ * ASG simd8 (copy) [000080] D----+-N---- +--* LCL_VAR simd8 V10 tmp7 [000079] -----+------ \--* HWINTRINSIC simd8 float Subtract [000077] -----+------ +--* LCL_VAR simd8 V08 tmp5 [000078] -----+------ \--* LCL_VAR simd8 V09 tmp6 ***** BB01 STMT00004 (IL ???... ???) [000029] --CXG+------ * CALL void Console.WriteLine [000069] -----+------ arg0 in mm0 \--* INTRINSIC float sqrt [000100] -----+------ \--* HWINTRINSIC float float Dot [000095] -----+-N---- +--* LCL_VAR simd8 V10 tmp7 [000098] -----+-N---- \--* LCL_VAR simd8 V10 tmp7 ***** BB01 STMT00005 (IL 0x02B... ???) [000034] -A---+------ * ASG simd8 (copy) [000032] D----+-N---- +--* LCL_VAR simd8 V05 tmp2 [000138] ------------ \--* SIMD simd8 float init [000033] -----+------ \--* CNS_INT int 0 ***** BB01 STMT00006 (IL ???... ???) [000042] -A--G+------ * ASG simd8 (copy) [000035] D----+-N---- +--* LCL_VAR simd8 V05 tmp2 [000040] -----+-N---- \--* SIMD simd8 float initN [000038] -----+------ \--* LIST float [000030] -----+------ +--* CNS_DBL float -2.0000000000000000 [000037] ------------ \--* LIST float [000031] -----+------ \--* CNS_DBL float 2.0000000000000000 ***** BB01 STMT00007 (IL 0x03A... ???) [000051] -A--G+------ * ASG simd8 (copy) [000043] D----+-N---- +--* LCL_VAR simd8 V02 loc1 [000049] -----+-N---- \--* SIMD simd8 float initN [000048] -----+------ \--* LIST float [000045] -----+------ +--* CNS_DBL float 2.0000000000000000 [000047] ------------ \--* LIST float [000046] -----+------ \--* CNS_DBL float -2.0000000000000000 ***** BB01 STMT00020 (IL 0x04B... ???) [000114] -A---+------ * ASG simd8 (copy) [000112] D----+-N---- +--* LCL_VAR simd8 V11 tmp8 [000039] -----+-N---- \--* LCL_VAR simd8 V05 tmp2 ***** BB01 STMT00021 (IL 0x04B... ???) [000117] -A---+------ * ASG simd8 (copy) [000115] D----+-N---- +--* LCL_VAR simd8 V12 tmp9 [000052] -----+-N---- \--* LCL_VAR simd8 V02 loc1 ***** BB01 STMT00018 (IL 0x04B... ???) [000107] -A---+------ * ASG simd8 (copy) [000105] D----+-N---- +--* LCL_VAR simd8 V13 tmp10 [000104] -----+------ \--* HWINTRINSIC simd8 float Subtract [000102] -----+------ +--* LCL_VAR simd8 V05 tmp2 [000103] -----+------ \--* LCL_VAR simd8 V02 loc1 ***** BB01 STMT00023 (IL 0x04B... ???) [000124] -A---+------ * ASG float [000123] D----+-N---- +--* LCL_VAR float V14 tmp11 [000134] -----+------ \--* HWINTRINSIC float float Dot [000129] -----+-N---- +--* LCL_VAR simd8 V13 tmp10 [000132] -----+-N---- \--* LCL_VAR simd8 V13 tmp10 ***** BB01 STMT00009 (IL ???... ???) [000059] --CXG+------ * CALL void Console.WriteLine [000126] -----+------ arg0 in mm0 \--* INTRINSIC float sqrt [000125] -----+------ \--* LCL_VAR float V14 tmp11 ***** BB01 STMT00010 (IL 0x056... ???) [000060] -----+------ * RETURN void ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** Starting PHASE Compute blocks reachability *************** In fgComputeReachability *************** In fgDebugCheckBBlist Renumbering the basic blocks for fgComputeReachability pass #1 *************** Before renumbering the basic blocks ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table is empty *************** After renumbering the basic blocks =============== No blocks renumbered! Enter blocks: BB01 After computing reachability sets: ------------------------------------------------ BBnum Reachable by ------------------------------------------------ BB01 : BB01 After computing reachability: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe ----------------------------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** In fgComputeDoms *************** In fgDebugCheckBBlist Dominator computation start blocks (those blocks with no incoming edges): BB01 ------------------------------------------------ BBnum Dominated by ------------------------------------------------ BB01: BB01 Inside fgBuildDomTree After computing the Dominance Tree: After numbering the dominator tree: BB01: pre=01, post=01 *************** Finishing PHASE Compute blocks reachability *************** Starting PHASE Find loops *************** In optFindLoops() *************** In fgDebugCheckBBlist *************** Finishing PHASE Find loops Trees after Find loops ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..057) (return), preds={} succs={} ***** BB01 STMT00000 (IL 0x000...0x056) [000004] -A---+------ * ASG simd8 (copy) [000002] D----+-N---- +--* LCL_VAR simd8 V04 tmp1 [000136] ------------ \--* SIMD simd8 float init [000003] -----+------ \--* CNS_INT int 0 ***** BB01 STMT00001 (IL ???... ???) [000012] -A--G+------ * ASG simd8 (copy) [000005] D----+-N---- +--* LCL_VAR simd8 V04 tmp1 [000010] -----+-N---- \--* SIMD simd8 float initN [000008] -----+------ \--* LIST float [000000] -----+------ +--* CNS_DBL float -1.0000000000000000 [000007] ------------ \--* LIST float [000001] -----+------ \--* CNS_DBL float 1.0000000000000000 ***** BB01 STMT00002 (IL 0x00F... ???) [000021] -A--G+------ * ASG simd8 (copy) [000013] D----+-N---- +--* LCL_VAR simd8 V01 loc0 [000019] -----+-N---- \--* SIMD simd8 float initN [000018] -----+------ \--* LIST float [000015] -----+------ +--* CNS_DBL float 1.0000000000000000 [000017] ------------ \--* LIST float [000016] -----+------ \--* CNS_DBL float -1.0000000000000000 ***** BB01 STMT00012 (IL 0x020... ???) [000072] -A---+------ * ASG simd8 (copy) [000070] D----+-N---- +--* LCL_VAR simd8 (P) V06 tmp3 +--* float V06.X (offs=0x00) -> V15 tmp12 +--* float V06.Y (offs=0x04) -> V16 tmp13 [000009] -----+-N---- \--* LCL_VAR simd8 V04 tmp1 ***** BB01 STMT00013 (IL 0x020... ???) [000075] -A---+------ * ASG simd8 (copy) [000073] D----+-N---- +--* LCL_VAR simd8 (P) V07 tmp4 +--* float V07.X (offs=0x00) -> V17 tmp14 +--* float V07.Y (offs=0x04) -> V18 tmp15 [000022] -----+-N---- \--* LCL_VAR simd8 V01 loc0 ***** BB01 STMT00016 (IL 0x020... ???) [000089] -A---+------ * ASG simd8 (copy) [000087] D----+-N---- +--* LCL_VAR simd8 V08 tmp5 [000061] -----+-N---- \--* LCL_VAR simd8 (P) V06 tmp3 \--* float V06.X (offs=0x00) -> V15 tmp12 \--* float V06.Y (offs=0x04) -> V16 tmp13 ***** BB01 STMT00017 (IL 0x020... ???) [000092] -A---+------ * ASG simd8 (copy) [000090] D----+-N---- +--* LCL_VAR simd8 V09 tmp6 [000062] -----+-N---- \--* LCL_VAR simd8 (P) V07 tmp4 \--* float V07.X (offs=0x00) -> V17 tmp14 \--* float V07.Y (offs=0x04) -> V18 tmp15 ***** BB01 STMT00014 (IL 0x020... ???) [000082] -A---+------ * ASG simd8 (copy) [000080] D----+-N---- +--* LCL_VAR simd8 V10 tmp7 [000079] -----+------ \--* HWINTRINSIC simd8 float Subtract [000077] -----+------ +--* LCL_VAR simd8 V08 tmp5 [000078] -----+------ \--* LCL_VAR simd8 V09 tmp6 ***** BB01 STMT00004 (IL ???... ???) [000029] --CXG+------ * CALL void Console.WriteLine [000069] -----+------ arg0 in mm0 \--* INTRINSIC float sqrt [000100] -----+------ \--* HWINTRINSIC float float Dot [000095] -----+-N---- +--* LCL_VAR simd8 V10 tmp7 [000098] -----+-N---- \--* LCL_VAR simd8 V10 tmp7 ***** BB01 STMT00005 (IL 0x02B... ???) [000034] -A---+------ * ASG simd8 (copy) [000032] D----+-N---- +--* LCL_VAR simd8 V05 tmp2 [000138] ------------ \--* SIMD simd8 float init [000033] -----+------ \--* CNS_INT int 0 ***** BB01 STMT00006 (IL ???... ???) [000042] -A--G+------ * ASG simd8 (copy) [000035] D----+-N---- +--* LCL_VAR simd8 V05 tmp2 [000040] -----+-N---- \--* SIMD simd8 float initN [000038] -----+------ \--* LIST float [000030] -----+------ +--* CNS_DBL float -2.0000000000000000 [000037] ------------ \--* LIST float [000031] -----+------ \--* CNS_DBL float 2.0000000000000000 ***** BB01 STMT00007 (IL 0x03A... ???) [000051] -A--G+------ * ASG simd8 (copy) [000043] D----+-N---- +--* LCL_VAR simd8 V02 loc1 [000049] -----+-N---- \--* SIMD simd8 float initN [000048] -----+------ \--* LIST float [000045] -----+------ +--* CNS_DBL float 2.0000000000000000 [000047] ------------ \--* LIST float [000046] -----+------ \--* CNS_DBL float -2.0000000000000000 ***** BB01 STMT00020 (IL 0x04B... ???) [000114] -A---+------ * ASG simd8 (copy) [000112] D----+-N---- +--* LCL_VAR simd8 V11 tmp8 [000039] -----+-N---- \--* LCL_VAR simd8 V05 tmp2 ***** BB01 STMT00021 (IL 0x04B... ???) [000117] -A---+------ * ASG simd8 (copy) [000115] D----+-N---- +--* LCL_VAR simd8 V12 tmp9 [000052] -----+-N---- \--* LCL_VAR simd8 V02 loc1 ***** BB01 STMT00018 (IL 0x04B... ???) [000107] -A---+------ * ASG simd8 (copy) [000105] D----+-N---- +--* LCL_VAR simd8 V13 tmp10 [000104] -----+------ \--* HWINTRINSIC simd8 float Subtract [000102] -----+------ +--* LCL_VAR simd8 V05 tmp2 [000103] -----+------ \--* LCL_VAR simd8 V02 loc1 ***** BB01 STMT00023 (IL 0x04B... ???) [000124] -A---+------ * ASG float [000123] D----+-N---- +--* LCL_VAR float V14 tmp11 [000134] -----+------ \--* HWINTRINSIC float float Dot [000129] -----+-N---- +--* LCL_VAR simd8 V13 tmp10 [000132] -----+-N---- \--* LCL_VAR simd8 V13 tmp10 ***** BB01 STMT00009 (IL ???... ???) [000059] --CXG+------ * CALL void Console.WriteLine [000126] -----+------ arg0 in mm0 \--* INTRINSIC float sqrt [000125] -----+------ \--* LCL_VAR float V14 tmp11 ***** BB01 STMT00010 (IL 0x056... ???) [000060] -----+------ * RETURN void ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** Starting PHASE Clone loops *************** In optCloneLoops() No loops to clone *************** Finishing PHASE Clone loops *************** Starting PHASE Unroll loops *************** Finishing PHASE Unroll loops *************** Starting PHASE Mark local vars *************** In lvaMarkLocalVars() *** lvaComputeRefCounts *** *** lvaComputeRefCounts -- explicit counts *** *** marking local variables in block BB01 (weight=1 ) STMT00000 (IL 0x000...0x056) [000004] -A---+------ * ASG simd8 (copy) [000002] D----+-N---- +--* LCL_VAR simd8 V04 tmp1 [000136] ------------ \--* SIMD simd8 float init [000003] -----+------ \--* CNS_INT int 0 New refCnts for V04: refCnt = 1, refCntWtd = 2 EH Var V04 needs explicit zero init. Disqualified as a register candidate. STMT00001 (IL ???... ???) [000012] -A--G+------ * ASG simd8 (copy) [000005] D----+-N---- +--* LCL_VAR simd8 V04 tmp1 [000010] -----+-N---- \--* SIMD simd8 float initN [000008] -----+------ \--* LIST float [000000] -----+------ +--* CNS_DBL float -1.0000000000000000 [000007] ------------ \--* LIST float [000001] -----+------ \--* CNS_DBL float 1.0000000000000000 New refCnts for V04: refCnt = 2, refCntWtd = 4 STMT00002 (IL 0x00F... ???) [000021] -A--G+------ * ASG simd8 (copy) [000013] D----+-N---- +--* LCL_VAR simd8 V01 loc0 [000019] -----+-N---- \--* SIMD simd8 float initN [000018] -----+------ \--* LIST float [000015] -----+------ +--* CNS_DBL float 1.0000000000000000 [000017] ------------ \--* LIST float [000016] -----+------ \--* CNS_DBL float -1.0000000000000000 New refCnts for V01: refCnt = 1, refCntWtd = 1 Marking EH Var V01 as a register candidate. STMT00012 (IL 0x020... ???) [000072] -A---+------ * ASG simd8 (copy) [000070] D----+-N---- +--* LCL_VAR simd8 (P) V06 tmp3 +--* float V06.X (offs=0x00) -> V15 tmp12 +--* float V06.Y (offs=0x04) -> V16 tmp13 [000009] -----+-N---- \--* LCL_VAR simd8 V04 tmp1 New refCnts for V15: refCnt = 1, refCntWtd = 2 New refCnts for V16: refCnt = 1, refCntWtd = 2 New refCnts for V06: refCnt = 1, refCntWtd = 2 EH Var V06 needs explicit zero init. Disqualified as a register candidate. New refCnts for V04: refCnt = 3, refCntWtd = 6 STMT00013 (IL 0x020... ???) [000075] -A---+------ * ASG simd8 (copy) [000073] D----+-N---- +--* LCL_VAR simd8 (P) V07 tmp4 +--* float V07.X (offs=0x00) -> V17 tmp14 +--* float V07.Y (offs=0x04) -> V18 tmp15 [000022] -----+-N---- \--* LCL_VAR simd8 V01 loc0 New refCnts for V17: refCnt = 1, refCntWtd = 2 New refCnts for V18: refCnt = 1, refCntWtd = 2 New refCnts for V07: refCnt = 1, refCntWtd = 2 EH Var V07 needs explicit zero init. Disqualified as a register candidate. New refCnts for V01: refCnt = 2, refCntWtd = 2 STMT00016 (IL 0x020... ???) [000089] -A---+------ * ASG simd8 (copy) [000087] D----+-N---- +--* LCL_VAR simd8 V08 tmp5 [000061] -----+-N---- \--* LCL_VAR simd8 (P) V06 tmp3 \--* float V06.X (offs=0x00) -> V15 tmp12 \--* float V06.Y (offs=0x04) -> V16 tmp13 New refCnts for V08: refCnt = 1, refCntWtd = 2 EH Var V08 needs explicit zero init. Disqualified as a register candidate. New refCnts for V15: refCnt = 2, refCntWtd = 4 New refCnts for V16: refCnt = 2, refCntWtd = 4 New refCnts for V06: refCnt = 2, refCntWtd = 4 STMT00017 (IL 0x020... ???) [000092] -A---+------ * ASG simd8 (copy) [000090] D----+-N---- +--* LCL_VAR simd8 V09 tmp6 [000062] -----+-N---- \--* LCL_VAR simd8 (P) V07 tmp4 \--* float V07.X (offs=0x00) -> V17 tmp14 \--* float V07.Y (offs=0x04) -> V18 tmp15 New refCnts for V09: refCnt = 1, refCntWtd = 2 EH Var V09 needs explicit zero init. Disqualified as a register candidate. New refCnts for V17: refCnt = 2, refCntWtd = 4 New refCnts for V18: refCnt = 2, refCntWtd = 4 New refCnts for V07: refCnt = 2, refCntWtd = 4 STMT00014 (IL 0x020... ???) [000082] -A---+------ * ASG simd8 (copy) [000080] D----+-N---- +--* LCL_VAR simd8 V10 tmp7 [000079] -----+------ \--* HWINTRINSIC simd8 float Subtract [000077] -----+------ +--* LCL_VAR simd8 V08 tmp5 [000078] -----+------ \--* LCL_VAR simd8 V09 tmp6 New refCnts for V10: refCnt = 1, refCntWtd = 1 Marking EH Var V10 as a register candidate. New refCnts for V08: refCnt = 2, refCntWtd = 4 New refCnts for V09: refCnt = 2, refCntWtd = 4 STMT00004 (IL ???... ???) [000029] --CXG+------ * CALL void Console.WriteLine [000069] -----+------ arg0 in mm0 \--* INTRINSIC float sqrt [000100] -----+------ \--* HWINTRINSIC float float Dot [000095] -----+-N---- +--* LCL_VAR simd8 V10 tmp7 [000098] -----+-N---- \--* LCL_VAR simd8 V10 tmp7 New refCnts for V10: refCnt = 2, refCntWtd = 2 New refCnts for V10: refCnt = 3, refCntWtd = 3 STMT00005 (IL 0x02B... ???) [000034] -A---+------ * ASG simd8 (copy) [000032] D----+-N---- +--* LCL_VAR simd8 V05 tmp2 [000138] ------------ \--* SIMD simd8 float init [000033] -----+------ \--* CNS_INT int 0 New refCnts for V05: refCnt = 1, refCntWtd = 2 EH Var V05 needs explicit zero init. Disqualified as a register candidate. STMT00006 (IL ???... ???) [000042] -A--G+------ * ASG simd8 (copy) [000035] D----+-N---- +--* LCL_VAR simd8 V05 tmp2 [000040] -----+-N---- \--* SIMD simd8 float initN [000038] -----+------ \--* LIST float [000030] -----+------ +--* CNS_DBL float -2.0000000000000000 [000037] ------------ \--* LIST float [000031] -----+------ \--* CNS_DBL float 2.0000000000000000 New refCnts for V05: refCnt = 2, refCntWtd = 4 STMT00007 (IL 0x03A... ???) [000051] -A--G+------ * ASG simd8 (copy) [000043] D----+-N---- +--* LCL_VAR simd8 V02 loc1 [000049] -----+-N---- \--* SIMD simd8 float initN [000048] -----+------ \--* LIST float [000045] -----+------ +--* CNS_DBL float 2.0000000000000000 [000047] ------------ \--* LIST float [000046] -----+------ \--* CNS_DBL float -2.0000000000000000 New refCnts for V02: refCnt = 1, refCntWtd = 1 Marking EH Var V02 as a register candidate. STMT00020 (IL 0x04B... ???) [000114] -A---+------ * ASG simd8 (copy) [000112] D----+-N---- +--* LCL_VAR simd8 V11 tmp8 [000039] -----+-N---- \--* LCL_VAR simd8 V05 tmp2 New refCnts for V11: refCnt = 1, refCntWtd = 2 EH Var V11 needs explicit zero init. Disqualified as a register candidate. New refCnts for V05: refCnt = 3, refCntWtd = 6 STMT00021 (IL 0x04B... ???) [000117] -A---+------ * ASG simd8 (copy) [000115] D----+-N---- +--* LCL_VAR simd8 V12 tmp9 [000052] -----+-N---- \--* LCL_VAR simd8 V02 loc1 New refCnts for V12: refCnt = 1, refCntWtd = 2 EH Var V12 needs explicit zero init. Disqualified as a register candidate. New refCnts for V02: refCnt = 2, refCntWtd = 2 STMT00018 (IL 0x04B... ???) [000107] -A---+------ * ASG simd8 (copy) [000105] D----+-N---- +--* LCL_VAR simd8 V13 tmp10 [000104] -----+------ \--* HWINTRINSIC simd8 float Subtract [000102] -----+------ +--* LCL_VAR simd8 V05 tmp2 [000103] -----+------ \--* LCL_VAR simd8 V02 loc1 New refCnts for V13: refCnt = 1, refCntWtd = 1 Marking EH Var V13 as a register candidate. New refCnts for V05: refCnt = 4, refCntWtd = 8 New refCnts for V02: refCnt = 3, refCntWtd = 3 STMT00023 (IL 0x04B... ???) [000124] -A---+------ * ASG float [000123] D----+-N---- +--* LCL_VAR float V14 tmp11 [000134] -----+------ \--* HWINTRINSIC float float Dot [000129] -----+-N---- +--* LCL_VAR simd8 V13 tmp10 [000132] -----+-N---- \--* LCL_VAR simd8 V13 tmp10 New refCnts for V14: refCnt = 1, refCntWtd = 1 Marking EH Var V14 as a register candidate. New refCnts for V13: refCnt = 2, refCntWtd = 2 New refCnts for V13: refCnt = 3, refCntWtd = 3 STMT00009 (IL ???... ???) [000059] --CXG+------ * CALL void Console.WriteLine [000126] -----+------ arg0 in mm0 \--* INTRINSIC float sqrt [000125] -----+------ \--* LCL_VAR float V14 tmp11 New refCnts for V14: refCnt = 2, refCntWtd = 2 STMT00010 (IL 0x056... ???) [000060] -----+------ * RETURN void *** lvaComputeRefCounts -- implicit counts *** *************** In optAddCopies() *************** Finishing PHASE Mark local vars *************** Starting PHASE Optimize bools *************** In optOptimizeBools() *************** In fgDebugCheckBBlist *************** Finishing PHASE Optimize bools *************** Starting PHASE Find oper order *************** In fgFindOperOrder() *************** Finishing PHASE Find oper order *************** Starting PHASE Set block order *************** In fgSetBlockOrder() The biggest BB has 7 tree nodes *************** Finishing PHASE Set block order Trees before Build SSA representation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..057) (return), preds={} succs={} ***** BB01 STMT00000 (IL 0x000...0x056) N004 ( 2, 3) [000004] -A------R--- * ASG simd8 (copy) N003 ( 1, 1) [000002] D------N---- +--* LCL_VAR simd8 V04 tmp1 N002 ( 2, 2) [000136] ------------ \--* SIMD simd8 float init N001 ( 1, 1) [000003] ------------ \--* CNS_INT int 0 ***** BB01 STMT00001 (IL ???... ???) N007 ( 6, 7) [000012] -A--G---R--- * ASG simd8 (copy) N006 ( 1, 1) [000005] D------N---- +--* LCL_VAR simd8 V04 tmp1 N005 ( 6, 7) [000010] -------N---- \--* SIMD simd8 float initN N004 ( 5, 6) [000008] ------------ \--* LIST float N001 ( 3, 4) [000000] ------------ +--* CNS_DBL float -1.0000000000000000 N003 ( 1, 1) [000007] ------------ \--* LIST float N002 ( 1, 1) [000001] ------------ \--* CNS_DBL float 1.0000000000000000 ***** BB01 STMT00002 (IL 0x00F... ???) N007 ( 10, 10) [000021] -A--G---R--- * ASG simd8 (copy) N006 ( 3, 2) [000013] D------N---- +--* LCL_VAR simd8 V01 loc0 N005 ( 6, 7) [000019] -------N---- \--* SIMD simd8 float initN N004 ( 5, 6) [000018] ------------ \--* LIST float N001 ( 1, 1) [000015] ------------ +--* CNS_DBL float 1.0000000000000000 N003 ( 3, 4) [000017] ------------ \--* LIST float N002 ( 3, 4) [000016] ------------ \--* CNS_DBL float -1.0000000000000000 ***** BB01 STMT00012 (IL 0x020... ???) N003 ( 5, 4) [000072] -A------R--- * ASG simd8 (copy) N002 ( 3, 2) [000070] D------N---- +--* LCL_VAR simd8 (P) V06 tmp3 +--* float V06.X (offs=0x00) -> V15 tmp12 +--* float V06.Y (offs=0x04) -> V16 tmp13 N001 ( 1, 1) [000009] -------N---- \--* LCL_VAR simd8 V04 tmp1 ***** BB01 STMT00013 (IL 0x020... ???) N003 ( 7, 5) [000075] -A------R--- * ASG simd8 (copy) N002 ( 3, 2) [000073] D------N---- +--* LCL_VAR simd8 (P) V07 tmp4 +--* float V07.X (offs=0x00) -> V17 tmp14 +--* float V07.Y (offs=0x04) -> V18 tmp15 N001 ( 3, 2) [000022] -------N---- \--* LCL_VAR simd8 V01 loc0 ***** BB01 STMT00016 (IL 0x020... ???) N003 ( 3, 3) [000089] -A------R--- * ASG simd8 (copy) N002 ( 1, 1) [000087] D------N---- +--* LCL_VAR simd8 V08 tmp5 N001 ( 3, 2) [000061] -------N---- \--* LCL_VAR simd8 (P) V06 tmp3 \--* float V06.X (offs=0x00) -> V15 tmp12 \--* float V06.Y (offs=0x04) -> V16 tmp13 ***** BB01 STMT00017 (IL 0x020... ???) N003 ( 3, 3) [000092] -A------R--- * ASG simd8 (copy) N002 ( 1, 1) [000090] D------N---- +--* LCL_VAR simd8 V09 tmp6 N001 ( 3, 2) [000062] -------N---- \--* LCL_VAR simd8 (P) V07 tmp4 \--* float V07.X (offs=0x00) -> V17 tmp14 \--* float V07.Y (offs=0x04) -> V18 tmp15 ***** BB01 STMT00014 (IL 0x020... ???) N005 ( 3, 3) [000082] -A------R--- * ASG simd8 (copy) N004 ( 1, 1) [000080] D------N---- +--* LCL_VAR simd8 V10 tmp7 N003 ( 3, 3) [000079] ------------ \--* HWINTRINSIC simd8 float Subtract N001 ( 1, 1) [000077] ------------ +--* LCL_VAR simd8 V08 tmp5 N002 ( 1, 1) [000078] ------------ \--* LCL_VAR simd8 V09 tmp6 ***** BB01 STMT00004 (IL ???... ???) N006 ( 20, 13) [000029] --CXG------- * CALL void Console.WriteLine N005 ( 6, 7) [000069] ------------ arg0 in mm0 \--* INTRINSIC float sqrt N004 ( 3, 3) [000100] ------------ \--* HWINTRINSIC float float Dot N002 ( 1, 1) [000095] -------N---- +--* LCL_VAR simd8 V10 tmp7 N003 ( 1, 1) [000098] -------N---- \--* LCL_VAR simd8 V10 tmp7 ***** BB01 STMT00005 (IL 0x02B... ???) N004 ( 2, 3) [000034] -A------R--- * ASG simd8 (copy) N003 ( 1, 1) [000032] D------N---- +--* LCL_VAR simd8 V05 tmp2 N002 ( 2, 2) [000138] ------------ \--* SIMD simd8 float init N001 ( 1, 1) [000033] ------------ \--* CNS_INT int 0 ***** BB01 STMT00006 (IL ???... ???) N007 ( 8, 10) [000042] -A--G---R--- * ASG simd8 (copy) N006 ( 1, 1) [000035] D------N---- +--* LCL_VAR simd8 V05 tmp2 N005 ( 8, 10) [000040] -------N---- \--* SIMD simd8 float initN N004 ( 7, 9) [000038] ------------ \--* LIST float N001 ( 3, 4) [000030] ------------ +--* CNS_DBL float -2.0000000000000000 N003 ( 3, 4) [000037] ------------ \--* LIST float N002 ( 3, 4) [000031] ------------ \--* CNS_DBL float 2.0000000000000000 ***** BB01 STMT00007 (IL 0x03A... ???) N007 ( 8, 10) [000051] -A--G---R--- * ASG simd8 (copy) N006 ( 1, 1) [000043] D------N---- +--* LCL_VAR simd8 V02 loc1 N005 ( 8, 10) [000049] -------N---- \--* SIMD simd8 float initN N004 ( 7, 9) [000048] ------------ \--* LIST float N001 ( 3, 4) [000045] ------------ +--* CNS_DBL float 2.0000000000000000 N003 ( 3, 4) [000047] ------------ \--* LIST float N002 ( 3, 4) [000046] ------------ \--* CNS_DBL float -2.0000000000000000 ***** BB01 STMT00020 (IL 0x04B... ???) N003 ( 5, 4) [000114] -A------R--- * ASG simd8 (copy) N002 ( 3, 2) [000112] D------N---- +--* LCL_VAR simd8 V11 tmp8 N001 ( 1, 1) [000039] -------N---- \--* LCL_VAR simd8 V05 tmp2 ***** BB01 STMT00021 (IL 0x04B... ???) N003 ( 5, 4) [000117] -A------R--- * ASG simd8 (copy) N002 ( 3, 2) [000115] D------N---- +--* LCL_VAR simd8 V12 tmp9 N001 ( 1, 1) [000052] -------N---- \--* LCL_VAR simd8 V02 loc1 ***** BB01 STMT00018 (IL 0x04B... ???) N005 ( 3, 3) [000107] -A------R--- * ASG simd8 (copy) N004 ( 1, 1) [000105] D------N---- +--* LCL_VAR simd8 V13 tmp10 N003 ( 3, 3) [000104] ------------ \--* HWINTRINSIC simd8 float Subtract N001 ( 1, 1) [000102] ------------ +--* LCL_VAR simd8 V05 tmp2 N002 ( 1, 1) [000103] ------------ \--* LCL_VAR simd8 V02 loc1 ***** BB01 STMT00023 (IL 0x04B... ???) N005 ( 7, 8) [000124] -A------R--- * ASG float N004 ( 3, 4) [000123] D------N---- +--* LCL_VAR float V14 tmp11 N003 ( 3, 3) [000134] ------------ \--* HWINTRINSIC float float Dot N001 ( 1, 1) [000129] -------N---- +--* LCL_VAR simd8 V13 tmp10 N002 ( 1, 1) [000132] -------N---- \--* LCL_VAR simd8 V13 tmp10 ***** BB01 STMT00009 (IL ???... ???) N004 ( 20, 14) [000059] --CXG------- * CALL void Console.WriteLine N003 ( 6, 8) [000126] ------------ arg0 in mm0 \--* INTRINSIC float sqrt N002 ( 3, 4) [000125] ------------ \--* LCL_VAR float V14 tmp11 ***** BB01 STMT00010 (IL 0x056... ???) N001 ( 0, 0) [000060] ------------ * RETURN void ------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Build SSA representation *************** In SsaBuilder::Build() [SsaBuilder] Max block count is 2. ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table is empty [SsaBuilder] Topologically sorted the graph. [SsaBuilder::ComputeImmediateDom] Inside fgBuildDomTree After computing the Dominance Tree: *************** In fgLocalVarLiveness() In fgLocalVarLivenessInit Local V15 should not be enregistered because: field of a dependently promoted struct Local V16 should not be enregistered because: field of a dependently promoted struct Local V17 should not be enregistered because: field of a dependently promoted struct Local V18 should not be enregistered because: field of a dependently promoted struct Tracked variable (15 out of 19) table: V05 tmp2 [ simd8]: refCnt = 4, refCntWtd = 8 V04 tmp1 [ simd8]: refCnt = 3, refCntWtd = 6 V08 tmp5 [ simd8]: refCnt = 2, refCntWtd = 4 V09 tmp6 [ simd8]: refCnt = 2, refCntWtd = 4 V15 tmp12 [ float]: refCnt = 2, refCntWtd = 4 V16 tmp13 [ float]: refCnt = 2, refCntWtd = 4 V17 tmp14 [ float]: refCnt = 2, refCntWtd = 4 V18 tmp15 [ float]: refCnt = 2, refCntWtd = 4 V02 loc1 [ simd8]: refCnt = 3, refCntWtd = 3 V10 tmp7 [ simd8]: refCnt = 3, refCntWtd = 3 V13 tmp10 [ simd8]: refCnt = 3, refCntWtd = 3 V01 loc0 [ simd8]: refCnt = 2, refCntWtd = 2 V14 tmp11 [ float]: refCnt = 2, refCntWtd = 2 V11 tmp8 [ simd8]: refCnt = 1, refCntWtd = 2 V12 tmp9 [ simd8]: refCnt = 1, refCntWtd = 2 *************** In fgPerBlockLocalVarLiveness() BB01 USE(0)={ } + ByrefExposed + GcHeap DEF(15)={V05 V04 V08 V09 V15 V16 V17 V18 V02 V10 V13 V01 V14 V11 V12} + ByrefExposed* + GcHeap* ** Memory liveness computed, GcHeap states and ByrefExposed states match *************** In fgInterBlockLocalVarLiveness() BB liveness after fgLiveVarAnalysis(): BB01 IN (0)={} + ByrefExposed + GcHeap OUT(0)={} top level assign removing stmt with no side effects Removing statement STMT00021 (IL 0x04B... ???) N003 ( 5, 4) [000117] -A------R--- * ASG simd8 (copy) N002 ( 3, 2) [000115] D------N---- +--* LCL_VAR simd8 V12 tmp9 N001 ( 1, 1) [000052] -------N---- \--* LCL_VAR simd8 V02 loc1 in BB01 as useless: top level assign removing stmt with no side effects Removing statement STMT00020 (IL 0x04B... ???) N003 ( 5, 4) [000114] -A------R--- * ASG simd8 (copy) N002 ( 3, 2) [000112] D------N---- +--* LCL_VAR simd8 V11 tmp8 N001 ( 1, 1) [000039] -------N---- \--* LCL_VAR simd8 V05 tmp2 in BB01 as useless: top level assign removing stmt with no side effects Removing statement STMT00005 (IL 0x02B... ???) N004 ( 2, 3) [000034] -A------R--- * ASG simd8 (copy) N003 ( 1, 1) [000032] D------N---- +--* LCL_VAR simd8 V05 tmp2 N002 ( 2, 2) [000138] ------------ \--* SIMD simd8 float init N001 ( 1, 1) [000033] ------------ \--* CNS_INT int 0 in BB01 as useless: top level assign removing stmt with no side effects Removing statement STMT00000 (IL 0x000...0x056) N004 ( 2, 3) [000004] -A------R--- * ASG simd8 (copy) N003 ( 1, 1) [000002] D------N---- +--* LCL_VAR simd8 V04 tmp1 N002 ( 2, 2) [000136] ------------ \--* SIMD simd8 float init N001 ( 1, 1) [000003] ------------ \--* CNS_INT int 0 in BB01 as useless: *************** In optRemoveRedundantZeroInits() Marking L04 as having an explicit init Marking L01 as having an explicit init Marking L06 as having an explicit init Marking L07 as having an explicit init Marking L08 as having an explicit init Marking L09 as having an explicit init Marking L10 as having an explicit init Marking L05 as having an explicit init Marking L02 as having an explicit init Marking L13 as having an explicit init Marking L14 as having an explicit init *************** In SsaBuilder::InsertPhiFunctions() Inserting phi functions: *************** In SsaBuilder::RenameVariables() After fgSsaBuild: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..057) (return), preds={} succs={} ***** BB01 STMT00001 (IL ???... ???) N007 ( 6, 7) [000012] -A--G---R--- * ASG simd8 (copy) N006 ( 1, 1) [000005] D------N---- +--* LCL_VAR simd8 V04 tmp1 d:2 N005 ( 6, 7) [000010] -------N---- \--* SIMD simd8 float initN N004 ( 5, 6) [000008] ------------ \--* LIST float N001 ( 3, 4) [000000] ------------ +--* CNS_DBL float -1.0000000000000000 N003 ( 1, 1) [000007] ------------ \--* LIST float N002 ( 1, 1) [000001] ------------ \--* CNS_DBL float 1.0000000000000000 ***** BB01 STMT00002 (IL 0x00F... ???) N007 ( 10, 10) [000021] -A--G---R--- * ASG simd8 (copy) N006 ( 3, 2) [000013] D------N---- +--* LCL_VAR simd8 V01 loc0 d:2 N005 ( 6, 7) [000019] -------N---- \--* SIMD simd8 float initN N004 ( 5, 6) [000018] ------------ \--* LIST float N001 ( 1, 1) [000015] ------------ +--* CNS_DBL float 1.0000000000000000 N003 ( 3, 4) [000017] ------------ \--* LIST float N002 ( 3, 4) [000016] ------------ \--* CNS_DBL float -1.0000000000000000 ***** BB01 STMT00012 (IL 0x020... ???) N003 ( 5, 4) [000072] -A------R--- * ASG simd8 (copy) N002 ( 3, 2) [000070] D------N---- +--* LCL_VAR simd8 (P) V06 tmp3 +--* float V06.X (offs=0x00) -> V15 tmp12 +--* float V06.Y (offs=0x04) -> V16 tmp13 N001 ( 1, 1) [000009] -------N---- \--* LCL_VAR simd8 V04 tmp1 u:2 (last use) ***** BB01 STMT00013 (IL 0x020... ???) N003 ( 7, 5) [000075] -A------R--- * ASG simd8 (copy) N002 ( 3, 2) [000073] D------N---- +--* LCL_VAR simd8 (P) V07 tmp4 +--* float V07.X (offs=0x00) -> V17 tmp14 +--* float V07.Y (offs=0x04) -> V18 tmp15 N001 ( 3, 2) [000022] -------N---- \--* LCL_VAR simd8 V01 loc0 u:2 (last use) ***** BB01 STMT00016 (IL 0x020... ???) N003 ( 3, 3) [000089] -A------R--- * ASG simd8 (copy) N002 ( 1, 1) [000087] D------N---- +--* LCL_VAR simd8 V08 tmp5 d:2 N001 ( 3, 2) [000061] -------N---- \--* LCL_VAR simd8 (P) V06 tmp3 \--* float V06.X (offs=0x00) -> V15 tmp12 \--* float V06.Y (offs=0x04) -> V16 tmp13 ***** BB01 STMT00017 (IL 0x020... ???) N003 ( 3, 3) [000092] -A------R--- * ASG simd8 (copy) N002 ( 1, 1) [000090] D------N---- +--* LCL_VAR simd8 V09 tmp6 d:2 N001 ( 3, 2) [000062] -------N---- \--* LCL_VAR simd8 (P) V07 tmp4 \--* float V07.X (offs=0x00) -> V17 tmp14 \--* float V07.Y (offs=0x04) -> V18 tmp15 ***** BB01 STMT00014 (IL 0x020... ???) N005 ( 3, 3) [000082] -A------R--- * ASG simd8 (copy) N004 ( 1, 1) [000080] D------N---- +--* LCL_VAR simd8 V10 tmp7 d:2 N003 ( 3, 3) [000079] ------------ \--* HWINTRINSIC simd8 float Subtract N001 ( 1, 1) [000077] ------------ +--* LCL_VAR simd8 V08 tmp5 u:2 (last use) N002 ( 1, 1) [000078] ------------ \--* LCL_VAR simd8 V09 tmp6 u:2 (last use) ***** BB01 STMT00004 (IL ???... ???) N006 ( 20, 13) [000029] --CXG------- * CALL void Console.WriteLine N005 ( 6, 7) [000069] ------------ arg0 in mm0 \--* INTRINSIC float sqrt N004 ( 3, 3) [000100] ------------ \--* HWINTRINSIC float float Dot N002 ( 1, 1) [000095] -------N---- +--* LCL_VAR simd8 V10 tmp7 u:2 N003 ( 1, 1) [000098] -------N---- \--* LCL_VAR simd8 V10 tmp7 u:2 (last use) ***** BB01 STMT00006 (IL ???... ???) N007 ( 8, 10) [000042] -A--G---R--- * ASG simd8 (copy) N006 ( 1, 1) [000035] D------N---- +--* LCL_VAR simd8 V05 tmp2 d:2 N005 ( 8, 10) [000040] -------N---- \--* SIMD simd8 float initN N004 ( 7, 9) [000038] ------------ \--* LIST float N001 ( 3, 4) [000030] ------------ +--* CNS_DBL float -2.0000000000000000 N003 ( 3, 4) [000037] ------------ \--* LIST float N002 ( 3, 4) [000031] ------------ \--* CNS_DBL float 2.0000000000000000 ***** BB01 STMT00007 (IL 0x03A... ???) N007 ( 8, 10) [000051] -A--G---R--- * ASG simd8 (copy) N006 ( 1, 1) [000043] D------N---- +--* LCL_VAR simd8 V02 loc1 d:2 N005 ( 8, 10) [000049] -------N---- \--* SIMD simd8 float initN N004 ( 7, 9) [000048] ------------ \--* LIST float N001 ( 3, 4) [000045] ------------ +--* CNS_DBL float 2.0000000000000000 N003 ( 3, 4) [000047] ------------ \--* LIST float N002 ( 3, 4) [000046] ------------ \--* CNS_DBL float -2.0000000000000000 ***** BB01 STMT00018 (IL 0x04B... ???) N005 ( 3, 3) [000107] -A------R--- * ASG simd8 (copy) N004 ( 1, 1) [000105] D------N---- +--* LCL_VAR simd8 V13 tmp10 d:2 N003 ( 3, 3) [000104] ------------ \--* HWINTRINSIC simd8 float Subtract N001 ( 1, 1) [000102] ------------ +--* LCL_VAR simd8 V05 tmp2 u:2 (last use) N002 ( 1, 1) [000103] ------------ \--* LCL_VAR simd8 V02 loc1 u:2 (last use) ***** BB01 STMT00023 (IL 0x04B... ???) N005 ( 7, 8) [000124] -A------R--- * ASG float N004 ( 3, 4) [000123] D------N---- +--* LCL_VAR float V14 tmp11 d:2 N003 ( 3, 3) [000134] ------------ \--* HWINTRINSIC float float Dot N001 ( 1, 1) [000129] -------N---- +--* LCL_VAR simd8 V13 tmp10 u:2 N002 ( 1, 1) [000132] -------N---- \--* LCL_VAR simd8 V13 tmp10 u:2 (last use) ***** BB01 STMT00009 (IL ???... ???) N004 ( 20, 14) [000059] --CXG------- * CALL void Console.WriteLine N003 ( 6, 8) [000126] ------------ arg0 in mm0 \--* INTRINSIC float sqrt N002 ( 3, 4) [000125] ------------ \--* LCL_VAR float V14 tmp11 u:2 (last use) ***** BB01 STMT00010 (IL 0x056... ???) N001 ( 0, 0) [000060] ------------ * RETURN void ------------------------------------------------------------------------------------------------------------------- *************** Finishing PHASE Build SSA representation Trees after Build SSA representation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..057) (return), preds={} succs={} ***** BB01 STMT00001 (IL ???... ???) N007 ( 6, 7) [000012] -A--G---R--- * ASG simd8 (copy) N006 ( 1, 1) [000005] D------N---- +--* LCL_VAR simd8 V04 tmp1 d:2 N005 ( 6, 7) [000010] -------N---- \--* SIMD simd8 float initN N004 ( 5, 6) [000008] ------------ \--* LIST float N001 ( 3, 4) [000000] ------------ +--* CNS_DBL float -1.0000000000000000 N003 ( 1, 1) [000007] ------------ \--* LIST float N002 ( 1, 1) [000001] ------------ \--* CNS_DBL float 1.0000000000000000 ***** BB01 STMT00002 (IL 0x00F... ???) N007 ( 10, 10) [000021] -A--G---R--- * ASG simd8 (copy) N006 ( 3, 2) [000013] D------N---- +--* LCL_VAR simd8 V01 loc0 d:2 N005 ( 6, 7) [000019] -------N---- \--* SIMD simd8 float initN N004 ( 5, 6) [000018] ------------ \--* LIST float N001 ( 1, 1) [000015] ------------ +--* CNS_DBL float 1.0000000000000000 N003 ( 3, 4) [000017] ------------ \--* LIST float N002 ( 3, 4) [000016] ------------ \--* CNS_DBL float -1.0000000000000000 ***** BB01 STMT00012 (IL 0x020... ???) N003 ( 5, 4) [000072] -A------R--- * ASG simd8 (copy) N002 ( 3, 2) [000070] D------N---- +--* LCL_VAR simd8 (P) V06 tmp3 +--* float V06.X (offs=0x00) -> V15 tmp12 +--* float V06.Y (offs=0x04) -> V16 tmp13 N001 ( 1, 1) [000009] -------N---- \--* LCL_VAR simd8 V04 tmp1 u:2 (last use) ***** BB01 STMT00013 (IL 0x020... ???) N003 ( 7, 5) [000075] -A------R--- * ASG simd8 (copy) N002 ( 3, 2) [000073] D------N---- +--* LCL_VAR simd8 (P) V07 tmp4 +--* float V07.X (offs=0x00) -> V17 tmp14 +--* float V07.Y (offs=0x04) -> V18 tmp15 N001 ( 3, 2) [000022] -------N---- \--* LCL_VAR simd8 V01 loc0 u:2 (last use) ***** BB01 STMT00016 (IL 0x020... ???) N003 ( 3, 3) [000089] -A------R--- * ASG simd8 (copy) N002 ( 1, 1) [000087] D------N---- +--* LCL_VAR simd8 V08 tmp5 d:2 N001 ( 3, 2) [000061] -------N---- \--* LCL_VAR simd8 (P) V06 tmp3 \--* float V06.X (offs=0x00) -> V15 tmp12 \--* float V06.Y (offs=0x04) -> V16 tmp13 ***** BB01 STMT00017 (IL 0x020... ???) N003 ( 3, 3) [000092] -A------R--- * ASG simd8 (copy) N002 ( 1, 1) [000090] D------N---- +--* LCL_VAR simd8 V09 tmp6 d:2 N001 ( 3, 2) [000062] -------N---- \--* LCL_VAR simd8 (P) V07 tmp4 \--* float V07.X (offs=0x00) -> V17 tmp14 \--* float V07.Y (offs=0x04) -> V18 tmp15 ***** BB01 STMT00014 (IL 0x020... ???) N005 ( 3, 3) [000082] -A------R--- * ASG simd8 (copy) N004 ( 1, 1) [000080] D------N---- +--* LCL_VAR simd8 V10 tmp7 d:2 N003 ( 3, 3) [000079] ------------ \--* HWINTRINSIC simd8 float Subtract N001 ( 1, 1) [000077] ------------ +--* LCL_VAR simd8 V08 tmp5 u:2 (last use) N002 ( 1, 1) [000078] ------------ \--* LCL_VAR simd8 V09 tmp6 u:2 (last use) ***** BB01 STMT00004 (IL ???... ???) N006 ( 20, 13) [000029] --CXG------- * CALL void Console.WriteLine N005 ( 6, 7) [000069] ------------ arg0 in mm0 \--* INTRINSIC float sqrt N004 ( 3, 3) [000100] ------------ \--* HWINTRINSIC float float Dot N002 ( 1, 1) [000095] -------N---- +--* LCL_VAR simd8 V10 tmp7 u:2 N003 ( 1, 1) [000098] -------N---- \--* LCL_VAR simd8 V10 tmp7 u:2 (last use) ***** BB01 STMT00006 (IL ???... ???) N007 ( 8, 10) [000042] -A--G---R--- * ASG simd8 (copy) N006 ( 1, 1) [000035] D------N---- +--* LCL_VAR simd8 V05 tmp2 d:2 N005 ( 8, 10) [000040] -------N---- \--* SIMD simd8 float initN N004 ( 7, 9) [000038] ------------ \--* LIST float N001 ( 3, 4) [000030] ------------ +--* CNS_DBL float -2.0000000000000000 N003 ( 3, 4) [000037] ------------ \--* LIST float N002 ( 3, 4) [000031] ------------ \--* CNS_DBL float 2.0000000000000000 ***** BB01 STMT00007 (IL 0x03A... ???) N007 ( 8, 10) [000051] -A--G---R--- * ASG simd8 (copy) N006 ( 1, 1) [000043] D------N---- +--* LCL_VAR simd8 V02 loc1 d:2 N005 ( 8, 10) [000049] -------N---- \--* SIMD simd8 float initN N004 ( 7, 9) [000048] ------------ \--* LIST float N001 ( 3, 4) [000045] ------------ +--* CNS_DBL float 2.0000000000000000 N003 ( 3, 4) [000047] ------------ \--* LIST float N002 ( 3, 4) [000046] ------------ \--* CNS_DBL float -2.0000000000000000 ***** BB01 STMT00018 (IL 0x04B... ???) N005 ( 3, 3) [000107] -A------R--- * ASG simd8 (copy) N004 ( 1, 1) [000105] D------N---- +--* LCL_VAR simd8 V13 tmp10 d:2 N003 ( 3, 3) [000104] ------------ \--* HWINTRINSIC simd8 float Subtract N001 ( 1, 1) [000102] ------------ +--* LCL_VAR simd8 V05 tmp2 u:2 (last use) N002 ( 1, 1) [000103] ------------ \--* LCL_VAR simd8 V02 loc1 u:2 (last use) ***** BB01 STMT00023 (IL 0x04B... ???) N005 ( 7, 8) [000124] -A------R--- * ASG float N004 ( 3, 4) [000123] D------N---- +--* LCL_VAR float V14 tmp11 d:2 N003 ( 3, 3) [000134] ------------ \--* HWINTRINSIC float float Dot N001 ( 1, 1) [000129] -------N---- +--* LCL_VAR simd8 V13 tmp10 u:2 N002 ( 1, 1) [000132] -------N---- \--* LCL_VAR simd8 V13 tmp10 u:2 (last use) ***** BB01 STMT00009 (IL ???... ???) N004 ( 20, 14) [000059] --CXG------- * CALL void Console.WriteLine N003 ( 6, 8) [000126] ------------ arg0 in mm0 \--* INTRINSIC float sqrt N002 ( 3, 4) [000125] ------------ \--* LCL_VAR float V14 tmp11 u:2 (last use) ***** BB01 STMT00010 (IL 0x056... ???) N001 ( 0, 0) [000060] ------------ * RETURN void ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** Starting PHASE Early Value Propagation *************** In optEarlyProp() After optEarlyProp: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..057) (return), preds={} succs={} ***** BB01 STMT00001 (IL ???... ???) N007 ( 6, 7) [000012] -A--G---R--- * ASG simd8 (copy) N006 ( 1, 1) [000005] D------N---- +--* LCL_VAR simd8 V04 tmp1 d:2 N005 ( 6, 7) [000010] -------N---- \--* SIMD simd8 float initN N004 ( 5, 6) [000008] ------------ \--* LIST float N001 ( 3, 4) [000000] ------------ +--* CNS_DBL float -1.0000000000000000 N003 ( 1, 1) [000007] ------------ \--* LIST float N002 ( 1, 1) [000001] ------------ \--* CNS_DBL float 1.0000000000000000 ***** BB01 STMT00002 (IL 0x00F... ???) N007 ( 10, 10) [000021] -A--G---R--- * ASG simd8 (copy) N006 ( 3, 2) [000013] D------N---- +--* LCL_VAR simd8 V01 loc0 d:2 N005 ( 6, 7) [000019] -------N---- \--* SIMD simd8 float initN N004 ( 5, 6) [000018] ------------ \--* LIST float N001 ( 1, 1) [000015] ------------ +--* CNS_DBL float 1.0000000000000000 N003 ( 3, 4) [000017] ------------ \--* LIST float N002 ( 3, 4) [000016] ------------ \--* CNS_DBL float -1.0000000000000000 ***** BB01 STMT00012 (IL 0x020... ???) N003 ( 5, 4) [000072] -A------R--- * ASG simd8 (copy) N002 ( 3, 2) [000070] D------N---- +--* LCL_VAR simd8 (P) V06 tmp3 +--* float V06.X (offs=0x00) -> V15 tmp12 +--* float V06.Y (offs=0x04) -> V16 tmp13 N001 ( 1, 1) [000009] -------N---- \--* LCL_VAR simd8 V04 tmp1 u:2 (last use) ***** BB01 STMT00013 (IL 0x020... ???) N003 ( 7, 5) [000075] -A------R--- * ASG simd8 (copy) N002 ( 3, 2) [000073] D------N---- +--* LCL_VAR simd8 (P) V07 tmp4 +--* float V07.X (offs=0x00) -> V17 tmp14 +--* float V07.Y (offs=0x04) -> V18 tmp15 N001 ( 3, 2) [000022] -------N---- \--* LCL_VAR simd8 V01 loc0 u:2 (last use) ***** BB01 STMT00016 (IL 0x020... ???) N003 ( 3, 3) [000089] -A------R--- * ASG simd8 (copy) N002 ( 1, 1) [000087] D------N---- +--* LCL_VAR simd8 V08 tmp5 d:2 N001 ( 3, 2) [000061] -------N---- \--* LCL_VAR simd8 (P) V06 tmp3 \--* float V06.X (offs=0x00) -> V15 tmp12 \--* float V06.Y (offs=0x04) -> V16 tmp13 ***** BB01 STMT00017 (IL 0x020... ???) N003 ( 3, 3) [000092] -A------R--- * ASG simd8 (copy) N002 ( 1, 1) [000090] D------N---- +--* LCL_VAR simd8 V09 tmp6 d:2 N001 ( 3, 2) [000062] -------N---- \--* LCL_VAR simd8 (P) V07 tmp4 \--* float V07.X (offs=0x00) -> V17 tmp14 \--* float V07.Y (offs=0x04) -> V18 tmp15 ***** BB01 STMT00014 (IL 0x020... ???) N005 ( 3, 3) [000082] -A------R--- * ASG simd8 (copy) N004 ( 1, 1) [000080] D------N---- +--* LCL_VAR simd8 V10 tmp7 d:2 N003 ( 3, 3) [000079] ------------ \--* HWINTRINSIC simd8 float Subtract N001 ( 1, 1) [000077] ------------ +--* LCL_VAR simd8 V08 tmp5 u:2 (last use) N002 ( 1, 1) [000078] ------------ \--* LCL_VAR simd8 V09 tmp6 u:2 (last use) ***** BB01 STMT00004 (IL ???... ???) N006 ( 20, 13) [000029] --CXG------- * CALL void Console.WriteLine N005 ( 6, 7) [000069] ------------ arg0 in mm0 \--* INTRINSIC float sqrt N004 ( 3, 3) [000100] ------------ \--* HWINTRINSIC float float Dot N002 ( 1, 1) [000095] -------N---- +--* LCL_VAR simd8 V10 tmp7 u:2 N003 ( 1, 1) [000098] -------N---- \--* LCL_VAR simd8 V10 tmp7 u:2 (last use) ***** BB01 STMT00006 (IL ???... ???) N007 ( 8, 10) [000042] -A--G---R--- * ASG simd8 (copy) N006 ( 1, 1) [000035] D------N---- +--* LCL_VAR simd8 V05 tmp2 d:2 N005 ( 8, 10) [000040] -------N---- \--* SIMD simd8 float initN N004 ( 7, 9) [000038] ------------ \--* LIST float N001 ( 3, 4) [000030] ------------ +--* CNS_DBL float -2.0000000000000000 N003 ( 3, 4) [000037] ------------ \--* LIST float N002 ( 3, 4) [000031] ------------ \--* CNS_DBL float 2.0000000000000000 ***** BB01 STMT00007 (IL 0x03A... ???) N007 ( 8, 10) [000051] -A--G---R--- * ASG simd8 (copy) N006 ( 1, 1) [000043] D------N---- +--* LCL_VAR simd8 V02 loc1 d:2 N005 ( 8, 10) [000049] -------N---- \--* SIMD simd8 float initN N004 ( 7, 9) [000048] ------------ \--* LIST float N001 ( 3, 4) [000045] ------------ +--* CNS_DBL float 2.0000000000000000 N003 ( 3, 4) [000047] ------------ \--* LIST float N002 ( 3, 4) [000046] ------------ \--* CNS_DBL float -2.0000000000000000 ***** BB01 STMT00018 (IL 0x04B... ???) N005 ( 3, 3) [000107] -A------R--- * ASG simd8 (copy) N004 ( 1, 1) [000105] D------N---- +--* LCL_VAR simd8 V13 tmp10 d:2 N003 ( 3, 3) [000104] ------------ \--* HWINTRINSIC simd8 float Subtract N001 ( 1, 1) [000102] ------------ +--* LCL_VAR simd8 V05 tmp2 u:2 (last use) N002 ( 1, 1) [000103] ------------ \--* LCL_VAR simd8 V02 loc1 u:2 (last use) ***** BB01 STMT00023 (IL 0x04B... ???) N005 ( 7, 8) [000124] -A------R--- * ASG float N004 ( 3, 4) [000123] D------N---- +--* LCL_VAR float V14 tmp11 d:2 N003 ( 3, 3) [000134] ------------ \--* HWINTRINSIC float float Dot N001 ( 1, 1) [000129] -------N---- +--* LCL_VAR simd8 V13 tmp10 u:2 N002 ( 1, 1) [000132] -------N---- \--* LCL_VAR simd8 V13 tmp10 u:2 (last use) ***** BB01 STMT00009 (IL ???... ???) N004 ( 20, 14) [000059] --CXG------- * CALL void Console.WriteLine N003 ( 6, 8) [000126] ------------ arg0 in mm0 \--* INTRINSIC float sqrt N002 ( 3, 4) [000125] ------------ \--* LCL_VAR float V14 tmp11 u:2 (last use) ***** BB01 STMT00010 (IL 0x056... ???) N001 ( 0, 0) [000060] ------------ * RETURN void ------------------------------------------------------------------------------------------------------------------- *************** Finishing PHASE Early Value Propagation *************** Starting PHASE Do value numbering *************** In fgValueNumber() Memory Initial Value in BB01 is: $100 The SSA definition for ByrefExposed (#1) at start of BB01 is $100 {InitVal($c0)} The SSA definition for GcHeap (#1) at start of BB01 is $100 {InitVal($c0)} ***** BB01, STMT00001(before) N007 ( 6, 7) [000012] -A--G---R--- * ASG simd8 (copy) N006 ( 1, 1) [000005] D------N---- +--* LCL_VAR simd8 V04 tmp1 d:2 N005 ( 6, 7) [000010] -------N---- \--* SIMD simd8 float initN N004 ( 5, 6) [000008] ------------ \--* LIST float N001 ( 3, 4) [000000] ------------ +--* CNS_DBL float -1.0000000000000000 N003 ( 1, 1) [000007] ------------ \--* LIST float N002 ( 1, 1) [000001] ------------ \--* CNS_DBL float 1.0000000000000000 N001 [000000] CNS_DBL -1.0000000000000000 => $81 {FltCns[-1.000000]} N002 [000001] CNS_DBL 1.0000000000000000 => $82 {FltCns[1.000000]} N003 [000007] LIST => $140 {LIST($82, $0)} N004 [000008] LIST => $141 {LIST($81, $140)} N005 [000010] SIMD => $180 {180} N006 [000005] LCL_VAR V04 tmp1 d:2 => $180 {180} N007 [000012] ASG => $180 {180} ***** BB01, STMT00001(after) N007 ( 6, 7) [000012] -A--G---R--- * ASG simd8 (copy) $180 N006 ( 1, 1) [000005] D------N---- +--* LCL_VAR simd8 V04 tmp1 d:2 $180 N005 ( 6, 7) [000010] -------N---- \--* SIMD simd8 float initN $180 N004 ( 5, 6) [000008] ------------ \--* LIST float $141 N001 ( 3, 4) [000000] ------------ +--* CNS_DBL float -1.0000000000000000 $81 N003 ( 1, 1) [000007] ------------ \--* LIST float $140 N002 ( 1, 1) [000001] ------------ \--* CNS_DBL float 1.0000000000000000 $82 --------- ***** BB01, STMT00002(before) N007 ( 10, 10) [000021] -A--G---R--- * ASG simd8 (copy) N006 ( 3, 2) [000013] D------N---- +--* LCL_VAR simd8 V01 loc0 d:2 N005 ( 6, 7) [000019] -------N---- \--* SIMD simd8 float initN N004 ( 5, 6) [000018] ------------ \--* LIST float N001 ( 1, 1) [000015] ------------ +--* CNS_DBL float 1.0000000000000000 N003 ( 3, 4) [000017] ------------ \--* LIST float N002 ( 3, 4) [000016] ------------ \--* CNS_DBL float -1.0000000000000000 N001 [000015] CNS_DBL 1.0000000000000000 => $82 {FltCns[1.000000]} N002 [000016] CNS_DBL -1.0000000000000000 => $81 {FltCns[-1.000000]} N003 [000017] LIST => $142 {LIST($81, $0)} N004 [000018] LIST => $143 {LIST($82, $142)} N005 [000019] SIMD => $182 {182} N006 [000013] LCL_VAR V01 loc0 d:2 => $182 {182} N007 [000021] ASG => $182 {182} ***** BB01, STMT00002(after) N007 ( 10, 10) [000021] -A--G---R--- * ASG simd8 (copy) $182 N006 ( 3, 2) [000013] D------N---- +--* LCL_VAR simd8 V01 loc0 d:2 $182 N005 ( 6, 7) [000019] -------N---- \--* SIMD simd8 float initN $182 N004 ( 5, 6) [000018] ------------ \--* LIST float $143 N001 ( 1, 1) [000015] ------------ +--* CNS_DBL float 1.0000000000000000 $82 N003 ( 3, 4) [000017] ------------ \--* LIST float $142 N002 ( 3, 4) [000016] ------------ \--* CNS_DBL float -1.0000000000000000 $81 --------- ***** BB01, STMT00012(before) N003 ( 5, 4) [000072] -A------R--- * ASG simd8 (copy) N002 ( 3, 2) [000070] D------N---- +--* LCL_VAR simd8 (P) V06 tmp3 +--* float V06.X (offs=0x00) -> V15 tmp12 +--* float V06.Y (offs=0x04) -> V16 tmp13 N001 ( 1, 1) [000009] -------N---- \--* LCL_VAR simd8 V04 tmp1 u:2 (last use) N001 [000009] LCL_VAR V04 tmp1 u:2 (last use) => $180 {180} Tree [000072] assigns to non-address-taken local var V06; excluded from SSA, so value not tracked. N003 [000072] ASG => $180 {180} ***** BB01, STMT00012(after) N003 ( 5, 4) [000072] -A------R--- * ASG simd8 (copy) $180 N002 ( 3, 2) [000070] D------N---- +--* LCL_VAR simd8 (P) V06 tmp3 +--* float V06.X (offs=0x00) -> V15 tmp12 +--* float V06.Y (offs=0x04) -> V16 tmp13 N001 ( 1, 1) [000009] -------N---- \--* LCL_VAR simd8 V04 tmp1 u:2 (last use) $180 --------- ***** BB01, STMT00013(before) N003 ( 7, 5) [000075] -A------R--- * ASG simd8 (copy) N002 ( 3, 2) [000073] D------N---- +--* LCL_VAR simd8 (P) V07 tmp4 +--* float V07.X (offs=0x00) -> V17 tmp14 +--* float V07.Y (offs=0x04) -> V18 tmp15 N001 ( 3, 2) [000022] -------N---- \--* LCL_VAR simd8 V01 loc0 u:2 (last use) N001 [000022] LCL_VAR V01 loc0 u:2 (last use) => $182 {182} Tree [000075] assigns to non-address-taken local var V07; excluded from SSA, so value not tracked. N003 [000075] ASG => $182 {182} ***** BB01, STMT00013(after) N003 ( 7, 5) [000075] -A------R--- * ASG simd8 (copy) $182 N002 ( 3, 2) [000073] D------N---- +--* LCL_VAR simd8 (P) V07 tmp4 +--* float V07.X (offs=0x00) -> V17 tmp14 +--* float V07.Y (offs=0x04) -> V18 tmp15 N001 ( 3, 2) [000022] -------N---- \--* LCL_VAR simd8 V01 loc0 u:2 (last use) $182 --------- ***** BB01, STMT00016(before) N003 ( 3, 3) [000089] -A------R--- * ASG simd8 (copy) N002 ( 1, 1) [000087] D------N---- +--* LCL_VAR simd8 V08 tmp5 d:2 N001 ( 3, 2) [000061] -------N---- \--* LCL_VAR simd8 (P) V06 tmp3 \--* float V06.X (offs=0x00) -> V15 tmp12 \--* float V06.Y (offs=0x04) -> V16 tmp13 N001 [000061] LCL_VAR V06 tmp3 float V06.X (offs=0x00) -> V15 tmp12 float V06.Y (offs=0x04) -> V16 tmp13 => $184 {184} N002 [000087] LCL_VAR V08 tmp5 d:2 => $184 {184} N003 [000089] ASG => $184 {184} ***** BB01, STMT00016(after) N003 ( 3, 3) [000089] -A------R--- * ASG simd8 (copy) $184 N002 ( 1, 1) [000087] D------N---- +--* LCL_VAR simd8 V08 tmp5 d:2 $184 N001 ( 3, 2) [000061] -------N---- \--* LCL_VAR simd8 (P) V06 tmp3 \--* float V06.X (offs=0x00) -> V15 tmp12 \--* float V06.Y (offs=0x04) -> V16 tmp13 $184 --------- ***** BB01, STMT00017(before) N003 ( 3, 3) [000092] -A------R--- * ASG simd8 (copy) N002 ( 1, 1) [000090] D------N---- +--* LCL_VAR simd8 V09 tmp6 d:2 N001 ( 3, 2) [000062] -------N---- \--* LCL_VAR simd8 (P) V07 tmp4 \--* float V07.X (offs=0x00) -> V17 tmp14 \--* float V07.Y (offs=0x04) -> V18 tmp15 N001 [000062] LCL_VAR V07 tmp4 float V07.X (offs=0x00) -> V17 tmp14 float V07.Y (offs=0x04) -> V18 tmp15 => $186 {186} N002 [000090] LCL_VAR V09 tmp6 d:2 => $186 {186} N003 [000092] ASG => $186 {186} ***** BB01, STMT00017(after) N003 ( 3, 3) [000092] -A------R--- * ASG simd8 (copy) $186 N002 ( 1, 1) [000090] D------N---- +--* LCL_VAR simd8 V09 tmp6 d:2 $186 N001 ( 3, 2) [000062] -------N---- \--* LCL_VAR simd8 (P) V07 tmp4 \--* float V07.X (offs=0x00) -> V17 tmp14 \--* float V07.Y (offs=0x04) -> V18 tmp15 $186 --------- ***** BB01, STMT00014(before) N005 ( 3, 3) [000082] -A------R--- * ASG simd8 (copy) N004 ( 1, 1) [000080] D------N---- +--* LCL_VAR simd8 V10 tmp7 d:2 N003 ( 3, 3) [000079] ------------ \--* HWINTRINSIC simd8 float Subtract N001 ( 1, 1) [000077] ------------ +--* LCL_VAR simd8 V08 tmp5 u:2 (last use) N002 ( 1, 1) [000078] ------------ \--* LCL_VAR simd8 V09 tmp6 u:2 (last use) N001 [000077] LCL_VAR V08 tmp5 u:2 (last use) => $184 {184} N002 [000078] LCL_VAR V09 tmp6 u:2 (last use) => $186 {186} N003 [000079] HWINTRINSIC => $1c0 {HWI_SSE_Subtract($184, $186)} N004 [000080] LCL_VAR V10 tmp7 d:2 => $1c0 {HWI_SSE_Subtract($184, $186)} N005 [000082] ASG => $1c0 {HWI_SSE_Subtract($184, $186)} ***** BB01, STMT00014(after) N005 ( 3, 3) [000082] -A------R--- * ASG simd8 (copy) $1c0 N004 ( 1, 1) [000080] D------N---- +--* LCL_VAR simd8 V10 tmp7 d:2 $1c0 N003 ( 3, 3) [000079] ------------ \--* HWINTRINSIC simd8 float Subtract $1c0 N001 ( 1, 1) [000077] ------------ +--* LCL_VAR simd8 V08 tmp5 u:2 (last use) $184 N002 ( 1, 1) [000078] ------------ \--* LCL_VAR simd8 V09 tmp6 u:2 (last use) $186 --------- ***** BB01, STMT00004(before) N006 ( 20, 13) [000029] --CXG------- * CALL void Console.WriteLine N005 ( 6, 7) [000069] ------------ arg0 in mm0 \--* INTRINSIC float sqrt N004 ( 3, 3) [000100] ------------ \--* HWINTRINSIC float float Dot N002 ( 1, 1) [000095] -------N---- +--* LCL_VAR simd8 V10 tmp7 u:2 N003 ( 1, 1) [000098] -------N---- \--* LCL_VAR simd8 V10 tmp7 u:2 (last use) N001 [000137] ARGPLACE => $200 {200} N002 [000095] LCL_VAR V10 tmp7 u:2 => $1c0 {HWI_SSE_Subtract($184, $186)} N003 [000098] LCL_VAR V10 tmp7 u:2 (last use) => $1c0 {HWI_SSE_Subtract($184, $186)} N004 [000100] HWINTRINSIC => $144 {HWI_Vector128_Dot($1c0, $1c0)} N005 [000069] INTRINSIC => $240 {Sqrt($144)} VN of ARGPLACE tree [000137] updated to $240 {Sqrt($144)} fgCurMemoryVN[GcHeap] assigned for CALL at [000029] to VN: $280. N006 [000029] CALL => $VN.Void ***** BB01, STMT00004(after) N006 ( 20, 13) [000029] --CXG------- * CALL void Console.WriteLine $VN.Void N005 ( 6, 7) [000069] ------------ arg0 in mm0 \--* INTRINSIC float sqrt $240 N004 ( 3, 3) [000100] ------------ \--* HWINTRINSIC float float Dot $144 N002 ( 1, 1) [000095] -------N---- +--* LCL_VAR simd8 V10 tmp7 u:2 $1c0 N003 ( 1, 1) [000098] -------N---- \--* LCL_VAR simd8 V10 tmp7 u:2 (last use) $1c0 --------- ***** BB01, STMT00006(before) N007 ( 8, 10) [000042] -A--G---R--- * ASG simd8 (copy) N006 ( 1, 1) [000035] D------N---- +--* LCL_VAR simd8 V05 tmp2 d:2 N005 ( 8, 10) [000040] -------N---- \--* SIMD simd8 float initN N004 ( 7, 9) [000038] ------------ \--* LIST float N001 ( 3, 4) [000030] ------------ +--* CNS_DBL float -2.0000000000000000 N003 ( 3, 4) [000037] ------------ \--* LIST float N002 ( 3, 4) [000031] ------------ \--* CNS_DBL float 2.0000000000000000 N001 [000030] CNS_DBL -2.0000000000000000 => $83 {FltCns[-2.000000]} N002 [000031] CNS_DBL 2.0000000000000000 => $84 {FltCns[2.000000]} N003 [000037] LIST => $145 {LIST($84, $0)} N004 [000038] LIST => $146 {LIST($83, $145)} N005 [000040] SIMD => $189 {189} N006 [000035] LCL_VAR V05 tmp2 d:2 => $189 {189} N007 [000042] ASG => $189 {189} ***** BB01, STMT00006(after) N007 ( 8, 10) [000042] -A--G---R--- * ASG simd8 (copy) $189 N006 ( 1, 1) [000035] D------N---- +--* LCL_VAR simd8 V05 tmp2 d:2 $189 N005 ( 8, 10) [000040] -------N---- \--* SIMD simd8 float initN $189 N004 ( 7, 9) [000038] ------------ \--* LIST float $146 N001 ( 3, 4) [000030] ------------ +--* CNS_DBL float -2.0000000000000000 $83 N003 ( 3, 4) [000037] ------------ \--* LIST float $145 N002 ( 3, 4) [000031] ------------ \--* CNS_DBL float 2.0000000000000000 $84 --------- ***** BB01, STMT00007(before) N007 ( 8, 10) [000051] -A--G---R--- * ASG simd8 (copy) N006 ( 1, 1) [000043] D------N---- +--* LCL_VAR simd8 V02 loc1 d:2 N005 ( 8, 10) [000049] -------N---- \--* SIMD simd8 float initN N004 ( 7, 9) [000048] ------------ \--* LIST float N001 ( 3, 4) [000045] ------------ +--* CNS_DBL float 2.0000000000000000 N003 ( 3, 4) [000047] ------------ \--* LIST float N002 ( 3, 4) [000046] ------------ \--* CNS_DBL float -2.0000000000000000 N001 [000045] CNS_DBL 2.0000000000000000 => $84 {FltCns[2.000000]} N002 [000046] CNS_DBL -2.0000000000000000 => $83 {FltCns[-2.000000]} N003 [000047] LIST => $147 {LIST($83, $0)} N004 [000048] LIST => $148 {LIST($84, $147)} N005 [000049] SIMD => $18b {18b} N006 [000043] LCL_VAR V02 loc1 d:2 => $18b {18b} N007 [000051] ASG => $18b {18b} ***** BB01, STMT00007(after) N007 ( 8, 10) [000051] -A--G---R--- * ASG simd8 (copy) $18b N006 ( 1, 1) [000043] D------N---- +--* LCL_VAR simd8 V02 loc1 d:2 $18b N005 ( 8, 10) [000049] -------N---- \--* SIMD simd8 float initN $18b N004 ( 7, 9) [000048] ------------ \--* LIST float $148 N001 ( 3, 4) [000045] ------------ +--* CNS_DBL float 2.0000000000000000 $84 N003 ( 3, 4) [000047] ------------ \--* LIST float $147 N002 ( 3, 4) [000046] ------------ \--* CNS_DBL float -2.0000000000000000 $83 --------- ***** BB01, STMT00018(before) N005 ( 3, 3) [000107] -A------R--- * ASG simd8 (copy) N004 ( 1, 1) [000105] D------N---- +--* LCL_VAR simd8 V13 tmp10 d:2 N003 ( 3, 3) [000104] ------------ \--* HWINTRINSIC simd8 float Subtract N001 ( 1, 1) [000102] ------------ +--* LCL_VAR simd8 V05 tmp2 u:2 (last use) N002 ( 1, 1) [000103] ------------ \--* LCL_VAR simd8 V02 loc1 u:2 (last use) N001 [000102] LCL_VAR V05 tmp2 u:2 (last use) => $189 {189} N002 [000103] LCL_VAR V02 loc1 u:2 (last use) => $18b {18b} N003 [000104] HWINTRINSIC => $1c1 {HWI_SSE_Subtract($189, $18b)} N004 [000105] LCL_VAR V13 tmp10 d:2 => $1c1 {HWI_SSE_Subtract($189, $18b)} N005 [000107] ASG => $1c1 {HWI_SSE_Subtract($189, $18b)} ***** BB01, STMT00018(after) N005 ( 3, 3) [000107] -A------R--- * ASG simd8 (copy) $1c1 N004 ( 1, 1) [000105] D------N---- +--* LCL_VAR simd8 V13 tmp10 d:2 $1c1 N003 ( 3, 3) [000104] ------------ \--* HWINTRINSIC simd8 float Subtract $1c1 N001 ( 1, 1) [000102] ------------ +--* LCL_VAR simd8 V05 tmp2 u:2 (last use) $189 N002 ( 1, 1) [000103] ------------ \--* LCL_VAR simd8 V02 loc1 u:2 (last use) $18b --------- ***** BB01, STMT00023(before) N005 ( 7, 8) [000124] -A------R--- * ASG float N004 ( 3, 4) [000123] D------N---- +--* LCL_VAR float V14 tmp11 d:2 N003 ( 3, 3) [000134] ------------ \--* HWINTRINSIC float float Dot N001 ( 1, 1) [000129] -------N---- +--* LCL_VAR simd8 V13 tmp10 u:2 N002 ( 1, 1) [000132] -------N---- \--* LCL_VAR simd8 V13 tmp10 u:2 (last use) N001 [000129] LCL_VAR V13 tmp10 u:2 => $1c1 {HWI_SSE_Subtract($189, $18b)} N002 [000132] LCL_VAR V13 tmp10 u:2 (last use) => $1c1 {HWI_SSE_Subtract($189, $18b)} N003 [000134] HWINTRINSIC => $149 {HWI_Vector128_Dot($1c1, $1c1)} N004 [000123] LCL_VAR V14 tmp11 d:2 => $149 {HWI_Vector128_Dot($1c1, $1c1)} N005 [000124] ASG => $149 {HWI_Vector128_Dot($1c1, $1c1)} ***** BB01, STMT00023(after) N005 ( 7, 8) [000124] -A------R--- * ASG float $149 N004 ( 3, 4) [000123] D------N---- +--* LCL_VAR float V14 tmp11 d:2 $149 N003 ( 3, 3) [000134] ------------ \--* HWINTRINSIC float float Dot $149 N001 ( 1, 1) [000129] -------N---- +--* LCL_VAR simd8 V13 tmp10 u:2 $1c1 N002 ( 1, 1) [000132] -------N---- \--* LCL_VAR simd8 V13 tmp10 u:2 (last use) $1c1 --------- ***** BB01, STMT00009(before) N004 ( 20, 14) [000059] --CXG------- * CALL void Console.WriteLine N003 ( 6, 8) [000126] ------------ arg0 in mm0 \--* INTRINSIC float sqrt N002 ( 3, 4) [000125] ------------ \--* LCL_VAR float V14 tmp11 u:2 (last use) N001 [000139] ARGPLACE => $202 {202} N002 [000125] LCL_VAR V14 tmp11 u:2 (last use) => $149 {HWI_Vector128_Dot($1c1, $1c1)} N003 [000126] INTRINSIC => $241 {Sqrt($149)} VN of ARGPLACE tree [000139] updated to $241 {Sqrt($149)} fgCurMemoryVN[GcHeap] assigned for CALL at [000059] to VN: $281. N004 [000059] CALL => $VN.Void ***** BB01, STMT00009(after) N004 ( 20, 14) [000059] --CXG------- * CALL void Console.WriteLine $VN.Void N003 ( 6, 8) [000126] ------------ arg0 in mm0 \--* INTRINSIC float sqrt $241 N002 ( 3, 4) [000125] ------------ \--* LCL_VAR float V14 tmp11 u:2 (last use) $149 --------- ***** BB01, STMT00010(before) N001 ( 0, 0) [000060] ------------ * RETURN void N001 [000060] RETURN => $2c0 {2c0} ***** BB01, STMT00010(after) N001 ( 0, 0) [000060] ------------ * RETURN void $2c0 finish(BB01). *************** Finishing PHASE Do value numbering *************** Starting PHASE Hoist loop code *************** Finishing PHASE Hoist loop code *************** Starting PHASE VN based copy prop *************** In optVnCopyProp() Copy Assertion for BB01 curSsaName stack: { } Live vars: {} => {V04} Live vars: {V04} => {V01 V04} Live vars: {V01 V04} => {V01} Live vars: {V01} => {V01 V15 V16} Live vars: {V01 V15 V16} => {V15 V16} Live vars: {V15 V16} => {V15 V16 V17 V18} Live vars: {V15 V16 V17 V18} => {V17 V18} Live vars: {V17 V18} => {V08 V17 V18} Live vars: {V08 V17 V18} => {V08} Live vars: {V08} => {V08 V09} Live vars: {V08 V09} => {V09} Live vars: {V09} => {} Live vars: {} => {V10} Live vars: {V10} => {} Live vars: {} => {V05} Live vars: {V05} => {V02 V05} Live vars: {V02 V05} => {V02} Live vars: {V02} => {} Live vars: {} => {V13} Live vars: {V13} => {} Live vars: {} => {V14} Live vars: {V14} => {} *************** Finishing PHASE VN based copy prop *************** Starting PHASE Redundant branch opts ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe ----------------------------------------------------------------------------------------------------------------------------------------- *************** Finishing PHASE Redundant branch opts [no changes] *************** Starting PHASE Optimize Valnum CSEs *************** In optOptimizeCSEs() Blocks/Trees at start of optOptimizeCSE phase ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..057) (return), preds={} succs={} ***** BB01 STMT00001 (IL ???... ???) N007 ( 6, 7) [000012] -A--G---R--- * ASG simd8 (copy) $180 N006 ( 1, 1) [000005] D------N---- +--* LCL_VAR simd8 V04 tmp1 d:2 $180 N005 ( 6, 7) [000010] -------N---- \--* SIMD simd8 float initN $180 N004 ( 5, 6) [000008] ------------ \--* LIST float $141 N001 ( 3, 4) [000000] ------------ +--* CNS_DBL float -1.0000000000000000 $81 N003 ( 1, 1) [000007] ------------ \--* LIST float $140 N002 ( 1, 1) [000001] ------------ \--* CNS_DBL float 1.0000000000000000 $82 ***** BB01 STMT00002 (IL 0x00F... ???) N007 ( 10, 10) [000021] -A--G---R--- * ASG simd8 (copy) $182 N006 ( 3, 2) [000013] D------N---- +--* LCL_VAR simd8 V01 loc0 d:2 $182 N005 ( 6, 7) [000019] -------N---- \--* SIMD simd8 float initN $182 N004 ( 5, 6) [000018] ------------ \--* LIST float $143 N001 ( 1, 1) [000015] ------------ +--* CNS_DBL float 1.0000000000000000 $82 N003 ( 3, 4) [000017] ------------ \--* LIST float $142 N002 ( 3, 4) [000016] ------------ \--* CNS_DBL float -1.0000000000000000 $81 ***** BB01 STMT00012 (IL 0x020... ???) N003 ( 5, 4) [000072] -A------R--- * ASG simd8 (copy) $180 N002 ( 3, 2) [000070] D------N---- +--* LCL_VAR simd8 (P) V06 tmp3 +--* float V06.X (offs=0x00) -> V15 tmp12 +--* float V06.Y (offs=0x04) -> V16 tmp13 N001 ( 1, 1) [000009] -------N---- \--* LCL_VAR simd8 V04 tmp1 u:2 (last use) $180 ***** BB01 STMT00013 (IL 0x020... ???) N003 ( 7, 5) [000075] -A------R--- * ASG simd8 (copy) $182 N002 ( 3, 2) [000073] D------N---- +--* LCL_VAR simd8 (P) V07 tmp4 +--* float V07.X (offs=0x00) -> V17 tmp14 +--* float V07.Y (offs=0x04) -> V18 tmp15 N001 ( 3, 2) [000022] -------N---- \--* LCL_VAR simd8 V01 loc0 u:2 (last use) $182 ***** BB01 STMT00016 (IL 0x020... ???) N003 ( 3, 3) [000089] -A------R--- * ASG simd8 (copy) $184 N002 ( 1, 1) [000087] D------N---- +--* LCL_VAR simd8 V08 tmp5 d:2 $184 N001 ( 3, 2) [000061] -------N---- \--* LCL_VAR simd8 (P) V06 tmp3 \--* float V06.X (offs=0x00) -> V15 tmp12 \--* float V06.Y (offs=0x04) -> V16 tmp13 $184 ***** BB01 STMT00017 (IL 0x020... ???) N003 ( 3, 3) [000092] -A------R--- * ASG simd8 (copy) $186 N002 ( 1, 1) [000090] D------N---- +--* LCL_VAR simd8 V09 tmp6 d:2 $186 N001 ( 3, 2) [000062] -------N---- \--* LCL_VAR simd8 (P) V07 tmp4 \--* float V07.X (offs=0x00) -> V17 tmp14 \--* float V07.Y (offs=0x04) -> V18 tmp15 $186 ***** BB01 STMT00014 (IL 0x020... ???) N005 ( 3, 3) [000082] -A------R--- * ASG simd8 (copy) $1c0 N004 ( 1, 1) [000080] D------N---- +--* LCL_VAR simd8 V10 tmp7 d:2 $1c0 N003 ( 3, 3) [000079] ------------ \--* HWINTRINSIC simd8 float Subtract $1c0 N001 ( 1, 1) [000077] ------------ +--* LCL_VAR simd8 V08 tmp5 u:2 (last use) $184 N002 ( 1, 1) [000078] ------------ \--* LCL_VAR simd8 V09 tmp6 u:2 (last use) $186 ***** BB01 STMT00004 (IL ???... ???) N006 ( 20, 13) [000029] --CXG------- * CALL void Console.WriteLine $VN.Void N005 ( 6, 7) [000069] ------------ arg0 in mm0 \--* INTRINSIC float sqrt $240 N004 ( 3, 3) [000100] ------------ \--* HWINTRINSIC float float Dot $144 N002 ( 1, 1) [000095] -------N---- +--* LCL_VAR simd8 V10 tmp7 u:2 $1c0 N003 ( 1, 1) [000098] -------N---- \--* LCL_VAR simd8 V10 tmp7 u:2 (last use) $1c0 ***** BB01 STMT00006 (IL ???... ???) N007 ( 8, 10) [000042] -A--G---R--- * ASG simd8 (copy) $189 N006 ( 1, 1) [000035] D------N---- +--* LCL_VAR simd8 V05 tmp2 d:2 $189 N005 ( 8, 10) [000040] -------N---- \--* SIMD simd8 float initN $189 N004 ( 7, 9) [000038] ------------ \--* LIST float $146 N001 ( 3, 4) [000030] ------------ +--* CNS_DBL float -2.0000000000000000 $83 N003 ( 3, 4) [000037] ------------ \--* LIST float $145 N002 ( 3, 4) [000031] ------------ \--* CNS_DBL float 2.0000000000000000 $84 ***** BB01 STMT00007 (IL 0x03A... ???) N007 ( 8, 10) [000051] -A--G---R--- * ASG simd8 (copy) $18b N006 ( 1, 1) [000043] D------N---- +--* LCL_VAR simd8 V02 loc1 d:2 $18b N005 ( 8, 10) [000049] -------N---- \--* SIMD simd8 float initN $18b N004 ( 7, 9) [000048] ------------ \--* LIST float $148 N001 ( 3, 4) [000045] ------------ +--* CNS_DBL float 2.0000000000000000 $84 N003 ( 3, 4) [000047] ------------ \--* LIST float $147 N002 ( 3, 4) [000046] ------------ \--* CNS_DBL float -2.0000000000000000 $83 ***** BB01 STMT00018 (IL 0x04B... ???) N005 ( 3, 3) [000107] -A------R--- * ASG simd8 (copy) $1c1 N004 ( 1, 1) [000105] D------N---- +--* LCL_VAR simd8 V13 tmp10 d:2 $1c1 N003 ( 3, 3) [000104] ------------ \--* HWINTRINSIC simd8 float Subtract $1c1 N001 ( 1, 1) [000102] ------------ +--* LCL_VAR simd8 V05 tmp2 u:2 (last use) $189 N002 ( 1, 1) [000103] ------------ \--* LCL_VAR simd8 V02 loc1 u:2 (last use) $18b ***** BB01 STMT00023 (IL 0x04B... ???) N005 ( 7, 8) [000124] -A------R--- * ASG float $149 N004 ( 3, 4) [000123] D------N---- +--* LCL_VAR float V14 tmp11 d:2 $149 N003 ( 3, 3) [000134] ------------ \--* HWINTRINSIC float float Dot $149 N001 ( 1, 1) [000129] -------N---- +--* LCL_VAR simd8 V13 tmp10 u:2 $1c1 N002 ( 1, 1) [000132] -------N---- \--* LCL_VAR simd8 V13 tmp10 u:2 (last use) $1c1 ***** BB01 STMT00009 (IL ???... ???) N004 ( 20, 14) [000059] --CXG------- * CALL void Console.WriteLine $VN.Void N003 ( 6, 8) [000126] ------------ arg0 in mm0 \--* INTRINSIC float sqrt $241 N002 ( 3, 4) [000125] ------------ \--* LCL_VAR float V14 tmp11 u:2 (last use) $149 ***** BB01 STMT00010 (IL 0x056... ???) N001 ( 0, 0) [000060] ------------ * RETURN void $2c0 ------------------------------------------------------------------------------------------------------------------- *************** In optOptimizeValnumCSEs() CSE candidate #01, key=$81 in BB01, [cost= 3, size= 4]: N002 ( 3, 4) CSE #01 (use)[000016] ------------ * CNS_DBL float -1.0000000000000000 $81 CSE candidate #02, key=$84 in BB01, [cost= 3, size= 4]: N001 ( 3, 4) CSE #02 (use)[000045] ------------ * CNS_DBL float 2.0000000000000000 $84 CSE candidate #03, key=$83 in BB01, [cost= 3, size= 4]: N002 ( 3, 4) CSE #03 (use)[000046] ------------ * CNS_DBL float -2.0000000000000000 $83 Blocks that generate CSE def/uses BB01 cseGen = 0000000000000015 Performing DataFlow for ValnumCSE's StartMerge BB01 :: cseOut = 000000000000007F EndMerge BB01 :: cseIn = 0000000000000000 :: cseGen = 0000000000000015 => cseOut = 0000000000000015 != preMerge = 000000000000007F, => true After performing DataFlow for ValnumCSE's BB01 cseIn = 0000000000000000, cseGen = 0000000000000015, cseOut = 0000000000000015 Labeling the CSEs with Use/Def information BB01 [000000] Def of CSE #01 [weight=1 ] BB01 [000016] Use of CSE #01 [weight=1 ] BB01 [000030] Def of CSE #03 [weight=1 ] BB01 [000031] Def of CSE #02 [weight=1 ] BB01 [000045] Use of CSE #02 [weight=1 ] BB01 [000046] Use of CSE #03 [weight=1 ] ************ Trees at start of optValnumCSE_Heuristic() ------------ BB01 [000..057) (return), preds={} succs={} ***** BB01 STMT00001 (IL ???... ???) N007 ( 6, 7) [000012] -A--G---R--- * ASG simd8 (copy) $180 N006 ( 1, 1) [000005] D------N---- +--* LCL_VAR simd8 V04 tmp1 d:2 $180 N005 ( 6, 7) [000010] -------N---- \--* SIMD simd8 float initN $180 N004 ( 5, 6) [000008] ------------ \--* LIST float $141 N001 ( 3, 4) CSE #01 (def)[000000] ------------ +--* CNS_DBL float -1.0000000000000000 $81 N003 ( 1, 1) [000007] ------------ \--* LIST float $140 N002 ( 1, 1) [000001] ------------ \--* CNS_DBL float 1.0000000000000000 $82 ***** BB01 STMT00002 (IL 0x00F... ???) N007 ( 10, 10) [000021] -A--G---R--- * ASG simd8 (copy) $182 N006 ( 3, 2) [000013] D------N---- +--* LCL_VAR simd8 V01 loc0 d:2 $182 N005 ( 6, 7) [000019] -------N---- \--* SIMD simd8 float initN $182 N004 ( 5, 6) [000018] ------------ \--* LIST float $143 N001 ( 1, 1) [000015] ------------ +--* CNS_DBL float 1.0000000000000000 $82 N003 ( 3, 4) [000017] ------------ \--* LIST float $142 N002 ( 3, 4) CSE #01 (use)[000016] ------------ \--* CNS_DBL float -1.0000000000000000 $81 ***** BB01 STMT00012 (IL 0x020... ???) N003 ( 5, 4) [000072] -A------R--- * ASG simd8 (copy) $180 N002 ( 3, 2) [000070] D------N---- +--* LCL_VAR simd8 (P) V06 tmp3 +--* float V06.X (offs=0x00) -> V15 tmp12 +--* float V06.Y (offs=0x04) -> V16 tmp13 N001 ( 1, 1) [000009] -------N---- \--* LCL_VAR simd8 V04 tmp1 u:2 (last use) $180 ***** BB01 STMT00013 (IL 0x020... ???) N003 ( 7, 5) [000075] -A------R--- * ASG simd8 (copy) $182 N002 ( 3, 2) [000073] D------N---- +--* LCL_VAR simd8 (P) V07 tmp4 +--* float V07.X (offs=0x00) -> V17 tmp14 +--* float V07.Y (offs=0x04) -> V18 tmp15 N001 ( 3, 2) [000022] -------N---- \--* LCL_VAR simd8 V01 loc0 u:2 (last use) $182 ***** BB01 STMT00016 (IL 0x020... ???) N003 ( 3, 3) [000089] -A------R--- * ASG simd8 (copy) $184 N002 ( 1, 1) [000087] D------N---- +--* LCL_VAR simd8 V08 tmp5 d:2 $184 N001 ( 3, 2) [000061] -------N---- \--* LCL_VAR simd8 (P) V06 tmp3 \--* float V06.X (offs=0x00) -> V15 tmp12 \--* float V06.Y (offs=0x04) -> V16 tmp13 $184 ***** BB01 STMT00017 (IL 0x020... ???) N003 ( 3, 3) [000092] -A------R--- * ASG simd8 (copy) $186 N002 ( 1, 1) [000090] D------N---- +--* LCL_VAR simd8 V09 tmp6 d:2 $186 N001 ( 3, 2) [000062] -------N---- \--* LCL_VAR simd8 (P) V07 tmp4 \--* float V07.X (offs=0x00) -> V17 tmp14 \--* float V07.Y (offs=0x04) -> V18 tmp15 $186 ***** BB01 STMT00014 (IL 0x020... ???) N005 ( 3, 3) [000082] -A------R--- * ASG simd8 (copy) $1c0 N004 ( 1, 1) [000080] D------N---- +--* LCL_VAR simd8 V10 tmp7 d:2 $1c0 N003 ( 3, 3) [000079] ------------ \--* HWINTRINSIC simd8 float Subtract $1c0 N001 ( 1, 1) [000077] ------------ +--* LCL_VAR simd8 V08 tmp5 u:2 (last use) $184 N002 ( 1, 1) [000078] ------------ \--* LCL_VAR simd8 V09 tmp6 u:2 (last use) $186 ***** BB01 STMT00004 (IL ???... ???) N006 ( 20, 13) [000029] --CXG------- * CALL void Console.WriteLine $VN.Void N005 ( 6, 7) [000069] ------------ arg0 in mm0 \--* INTRINSIC float sqrt $240 N004 ( 3, 3) [000100] ------------ \--* HWINTRINSIC float float Dot $144 N002 ( 1, 1) [000095] -------N---- +--* LCL_VAR simd8 V10 tmp7 u:2 $1c0 N003 ( 1, 1) [000098] -------N---- \--* LCL_VAR simd8 V10 tmp7 u:2 (last use) $1c0 ***** BB01 STMT00006 (IL ???... ???) N007 ( 8, 10) [000042] -A--G---R--- * ASG simd8 (copy) $189 N006 ( 1, 1) [000035] D------N---- +--* LCL_VAR simd8 V05 tmp2 d:2 $189 N005 ( 8, 10) [000040] -------N---- \--* SIMD simd8 float initN $189 N004 ( 7, 9) [000038] ------------ \--* LIST float $146 N001 ( 3, 4) CSE #03 (def)[000030] ------------ +--* CNS_DBL float -2.0000000000000000 $83 N003 ( 3, 4) [000037] ------------ \--* LIST float $145 N002 ( 3, 4) CSE #02 (def)[000031] ------------ \--* CNS_DBL float 2.0000000000000000 $84 ***** BB01 STMT00007 (IL 0x03A... ???) N007 ( 8, 10) [000051] -A--G---R--- * ASG simd8 (copy) $18b N006 ( 1, 1) [000043] D------N---- +--* LCL_VAR simd8 V02 loc1 d:2 $18b N005 ( 8, 10) [000049] -------N---- \--* SIMD simd8 float initN $18b N004 ( 7, 9) [000048] ------------ \--* LIST float $148 N001 ( 3, 4) CSE #02 (use)[000045] ------------ +--* CNS_DBL float 2.0000000000000000 $84 N003 ( 3, 4) [000047] ------------ \--* LIST float $147 N002 ( 3, 4) CSE #03 (use)[000046] ------------ \--* CNS_DBL float -2.0000000000000000 $83 ***** BB01 STMT00018 (IL 0x04B... ???) N005 ( 3, 3) [000107] -A------R--- * ASG simd8 (copy) $1c1 N004 ( 1, 1) [000105] D------N---- +--* LCL_VAR simd8 V13 tmp10 d:2 $1c1 N003 ( 3, 3) [000104] ------------ \--* HWINTRINSIC simd8 float Subtract $1c1 N001 ( 1, 1) [000102] ------------ +--* LCL_VAR simd8 V05 tmp2 u:2 (last use) $189 N002 ( 1, 1) [000103] ------------ \--* LCL_VAR simd8 V02 loc1 u:2 (last use) $18b ***** BB01 STMT00023 (IL 0x04B... ???) N005 ( 7, 8) [000124] -A------R--- * ASG float $149 N004 ( 3, 4) [000123] D------N---- +--* LCL_VAR float V14 tmp11 d:2 $149 N003 ( 3, 3) [000134] ------------ \--* HWINTRINSIC float float Dot $149 N001 ( 1, 1) [000129] -------N---- +--* LCL_VAR simd8 V13 tmp10 u:2 $1c1 N002 ( 1, 1) [000132] -------N---- \--* LCL_VAR simd8 V13 tmp10 u:2 (last use) $1c1 ***** BB01 STMT00009 (IL ???... ???) N004 ( 20, 14) [000059] --CXG------- * CALL void Console.WriteLine $VN.Void N003 ( 6, 8) [000126] ------------ arg0 in mm0 \--* INTRINSIC float sqrt $241 N002 ( 3, 4) [000125] ------------ \--* LCL_VAR float V14 tmp11 u:2 (last use) $149 ***** BB01 STMT00010 (IL 0x056... ???) N001 ( 0, 0) [000060] ------------ * RETURN void $2c0 ------------------------------------------------------------------------------------------------------------------- Aggressive CSE Promotion cutoff is 200.000000 Moderate CSE Promotion cutoff is 100.000000 enregCount is 10 Framesize estimate is 0x0020 We have a small frame Sorted CSE candidates: CSE #01, {$81 , $4 } useCnt=1: [def=100.000000, use=100.000000, cost= 3 ] :: N001 ( 3, 4) CSE #01 (def)[000000] ------------ * CNS_DBL float -1.0000000000000000 $81 CSE #02, {$84 , $4 } useCnt=1: [def=100.000000, use=100.000000, cost= 3 ] :: N002 ( 3, 4) CSE #02 (def)[000031] ------------ * CNS_DBL float 2.0000000000000000 $84 CSE #03, {$83 , $4 } useCnt=1: [def=100.000000, use=100.000000, cost= 3 ] :: N001 ( 3, 4) CSE #03 (def)[000030] ------------ * CNS_DBL float -2.0000000000000000 $83 Considering CSE #01 {$81 , $4 } [def=100.000000, use=100.000000, cost= 3 ] CSE Expression : N001 ( 3, 4) CSE #01 (def)[000000] ------------ * CNS_DBL float -1.0000000000000000 $81 Aggressive CSE Promotion (300.000000 >= 200.000000) cseRefCnt=300.000000, aggressiveRefCnt=200.000000, moderateRefCnt=100.000000 defCnt=100.000000, useCnt=100.000000, cost=3, size=4 def_cost=1, use_cost=1, extra_no_cost=6, extra_yes_cost=0 CSE cost savings check (306.000000 >= 200.000000) passes Promoting CSE: lvaGrabTemp returning 19 (V19 rat0) (a long lifetime temp) called for CSE - aggressive. CSE #01 is single-def, so associated CSE temp V19 will be in SSA New refCnts for V19: refCnt = 2, refCntWtd = 2 New refCnts for V19: refCnt = 3, refCntWtd = 3 CSE #01 def at [000000] replaced in BB01 with def of V19 optValnumCSE morphed tree: N011 ( 7, 9) [000012] -A--G---R--- * ASG simd8 (copy) $180 N010 ( 1, 1) [000005] D------N---- +--* LCL_VAR simd8 V04 tmp1 d:2 $180 N009 ( 7, 9) [000010] -A-----N---- \--* SIMD simd8 float initN $180 N008 ( 6, 8) [000008] -A---------- \--* LIST float $141 N005 ( 4, 6) [000143] -A---------- +--* COMMA float $81 N003 ( 3, 4) [000141] -A------R--- | +--* ASG float $VN.Void N002 ( 1, 2) [000140] D------N---- | | +--* LCL_VAR float V19 cse0 d:1 $81 N001 ( 3, 4) [000000] ------------ | | \--* CNS_DBL float -1.0000000000000000 $81 N004 ( 1, 2) [000142] ------------ | \--* LCL_VAR float V19 cse0 u:1 $81 N007 ( 1, 1) [000007] ------------ \--* LIST float $140 N006 ( 1, 1) [000001] ------------ \--* CNS_DBL float 1.0000000000000000 $82 Working on the replacement of the CSE #01 use at [000016] in BB01 optValnumCSE morphed tree: N007 ( 8, 8) [000021] -A--G---R--- * ASG simd8 (copy) $182 N006 ( 3, 2) [000013] D------N---- +--* LCL_VAR simd8 V01 loc0 d:2 $182 N005 ( 4, 5) [000019] -------N---- \--* SIMD simd8 float initN $182 N004 ( 3, 4) [000018] ------------ \--* LIST float $143 N001 ( 1, 1) [000015] ------------ +--* CNS_DBL float 1.0000000000000000 $82 N003 ( 1, 2) [000017] ------------ \--* LIST float $142 N002 ( 1, 2) [000144] ------------ \--* LCL_VAR float V19 cse0 u:1 $81 Considering CSE #02 {$84 , $4 } [def=100.000000, use=100.000000, cost= 3 ] CSE Expression : N002 ( 3, 4) CSE #02 (def)[000031] ------------ * CNS_DBL float 2.0000000000000000 $84 Aggressive CSE Promotion (300.000000 >= 200.000000) cseRefCnt=300.000000, aggressiveRefCnt=200.000000, moderateRefCnt=100.000000 defCnt=100.000000, useCnt=100.000000, cost=3, size=4 def_cost=1, use_cost=1, extra_no_cost=6, extra_yes_cost=0 CSE cost savings check (306.000000 >= 200.000000) passes Promoting CSE: lvaGrabTemp returning 20 (V20 rat0) (a long lifetime temp) called for CSE - aggressive. CSE #02 is single-def, so associated CSE temp V20 will be in SSA New refCnts for V20: refCnt = 2, refCntWtd = 2 New refCnts for V20: refCnt = 3, refCntWtd = 3 CSE #02 def at [000031] replaced in BB01 with def of V20 optValnumCSE morphed tree: N011 ( 9, 12) [000042] -A--G---R--- * ASG simd8 (copy) $189 N010 ( 1, 1) [000035] D------N---- +--* LCL_VAR simd8 V05 tmp2 d:2 $189 N009 ( 9, 12) [000040] -A-----N---- \--* SIMD simd8 float initN $189 N008 ( 8, 11) [000038] -A---------- \--* LIST float $146 N001 ( 3, 4) CSE #03 (def)[000030] ------------ +--* CNS_DBL float -2.0000000000000000 $83 N007 ( 4, 6) [000037] -A---------- \--* LIST float $145 N006 ( 4, 6) [000148] -A---------- \--* COMMA float $84 N004 ( 3, 4) [000146] -A------R--- +--* ASG float $VN.Void N003 ( 1, 2) [000145] D------N---- | +--* LCL_VAR float V20 cse1 d:1 $84 N002 ( 3, 4) [000031] ------------ | \--* CNS_DBL float 2.0000000000000000 $84 N005 ( 1, 2) [000147] ------------ \--* LCL_VAR float V20 cse1 u:1 $84 Working on the replacement of the CSE #02 use at [000045] in BB01 optValnumCSE morphed tree: N007 ( 6, 8) [000051] -A--G---R--- * ASG simd8 (copy) $18b N006 ( 1, 1) [000043] D------N---- +--* LCL_VAR simd8 V02 loc1 d:2 $18b N005 ( 6, 8) [000049] -------N---- \--* SIMD simd8 float initN $18b N004 ( 5, 7) [000048] ------------ \--* LIST float $148 N001 ( 1, 2) [000149] ------------ +--* LCL_VAR float V20 cse1 u:1 $84 N003 ( 3, 4) [000047] ------------ \--* LIST float $147 N002 ( 3, 4) CSE #03 (use)[000046] ------------ \--* CNS_DBL float -2.0000000000000000 $83 Considering CSE #03 {$83 , $4 } [def=100.000000, use=100.000000, cost= 3 ] CSE Expression : N001 ( 3, 4) CSE #03 (def)[000030] ------------ * CNS_DBL float -2.0000000000000000 $83 Aggressive CSE Promotion (300.000000 >= 200.000000) cseRefCnt=300.000000, aggressiveRefCnt=200.000000, moderateRefCnt=100.000000 defCnt=100.000000, useCnt=100.000000, cost=3, size=4 def_cost=1, use_cost=1, extra_no_cost=6, extra_yes_cost=0 CSE cost savings check (306.000000 >= 200.000000) passes Promoting CSE: lvaGrabTemp returning 21 (V21 rat0) (a long lifetime temp) called for CSE - aggressive. CSE #03 is single-def, so associated CSE temp V21 will be in SSA New refCnts for V21: refCnt = 2, refCntWtd = 2 New refCnts for V21: refCnt = 3, refCntWtd = 3 CSE #03 def at [000030] replaced in BB01 with def of V21 optValnumCSE morphed tree: N015 ( 10, 14) [000042] -A--G---R--- * ASG simd8 (copy) $189 N014 ( 1, 1) [000035] D------N---- +--* LCL_VAR simd8 V05 tmp2 d:2 $189 N013 ( 10, 14) [000040] -A-----N---- \--* SIMD simd8 float initN $189 N012 ( 9, 13) [000038] -A---------- \--* LIST float $146 N005 ( 4, 6) [000153] -A---------- +--* COMMA float $83 N003 ( 3, 4) [000151] -A------R--- | +--* ASG float $VN.Void N002 ( 1, 2) [000150] D------N---- | | +--* LCL_VAR float V21 cse2 d:1 $83 N001 ( 3, 4) [000030] ------------ | | \--* CNS_DBL float -2.0000000000000000 $83 N004 ( 1, 2) [000152] ------------ | \--* LCL_VAR float V21 cse2 u:1 $83 N011 ( 4, 6) [000037] -A---------- \--* LIST float $145 N010 ( 4, 6) [000148] -A---------- \--* COMMA float $84 N008 ( 3, 4) [000146] -A------R--- +--* ASG float $VN.Void N007 ( 1, 2) [000145] D------N---- | +--* LCL_VAR float V20 cse1 d:1 $84 N006 ( 3, 4) [000031] ------------ | \--* CNS_DBL float 2.0000000000000000 $84 N009 ( 1, 2) [000147] ------------ \--* LCL_VAR float V20 cse1 u:1 $84 Working on the replacement of the CSE #03 use at [000046] in BB01 optValnumCSE morphed tree: N007 ( 4, 6) [000051] -A--G---R--- * ASG simd8 (copy) $18b N006 ( 1, 1) [000043] D------N---- +--* LCL_VAR simd8 V02 loc1 d:2 $18b N005 ( 4, 6) [000049] -------N---- \--* SIMD simd8 float initN $18b N004 ( 3, 5) [000048] ------------ \--* LIST float $148 N001 ( 1, 2) [000149] ------------ +--* LCL_VAR float V20 cse1 u:1 $84 N003 ( 1, 2) [000047] ------------ \--* LIST float $147 N002 ( 1, 2) [000154] ------------ \--* LCL_VAR float V21 cse2 u:1 $83 *************** Finishing PHASE Optimize Valnum CSEs *************** Starting PHASE Assertion prop *************** In optAssertionPropMain() Blocks/Trees at start of phase ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..057) (return), preds={} succs={} ***** BB01 STMT00001 (IL ???... ???) N011 ( 7, 9) [000012] -A--G---R--- * ASG simd8 (copy) $180 N010 ( 1, 1) [000005] D------N---- +--* LCL_VAR simd8 V04 tmp1 d:2 $180 N009 ( 7, 9) [000010] -A-----N---- \--* SIMD simd8 float initN $180 N008 ( 6, 8) [000008] -A---------- \--* LIST float $141 N005 ( 4, 6) [000143] -A---------- +--* COMMA float $81 N003 ( 3, 4) [000141] -A------R--- | +--* ASG float $VN.Void N002 ( 1, 2) [000140] D------N---- | | +--* LCL_VAR float V19 cse0 d:1 $81 N001 ( 3, 4) [000000] ------------ | | \--* CNS_DBL float -1.0000000000000000 $81 N004 ( 1, 2) [000142] ------------ | \--* LCL_VAR float V19 cse0 u:1 $81 N007 ( 1, 1) [000007] ------------ \--* LIST float $140 N006 ( 1, 1) [000001] ------------ \--* CNS_DBL float 1.0000000000000000 $82 ***** BB01 STMT00002 (IL 0x00F... ???) N007 ( 8, 8) [000021] -A--G---R--- * ASG simd8 (copy) $182 N006 ( 3, 2) [000013] D------N---- +--* LCL_VAR simd8 V01 loc0 d:2 $182 N005 ( 4, 5) [000019] -------N---- \--* SIMD simd8 float initN $182 N004 ( 3, 4) [000018] ------------ \--* LIST float $143 N001 ( 1, 1) [000015] ------------ +--* CNS_DBL float 1.0000000000000000 $82 N003 ( 1, 2) [000017] ------------ \--* LIST float $142 N002 ( 1, 2) [000144] ------------ \--* LCL_VAR float V19 cse0 u:1 $81 ***** BB01 STMT00012 (IL 0x020... ???) N003 ( 5, 4) [000072] -A------R--- * ASG simd8 (copy) $180 N002 ( 3, 2) [000070] D------N---- +--* LCL_VAR simd8 (P) V06 tmp3 +--* float V06.X (offs=0x00) -> V15 tmp12 +--* float V06.Y (offs=0x04) -> V16 tmp13 N001 ( 1, 1) [000009] -------N---- \--* LCL_VAR simd8 V04 tmp1 u:2 (last use) $180 ***** BB01 STMT00013 (IL 0x020... ???) N003 ( 7, 5) [000075] -A------R--- * ASG simd8 (copy) $182 N002 ( 3, 2) [000073] D------N---- +--* LCL_VAR simd8 (P) V07 tmp4 +--* float V07.X (offs=0x00) -> V17 tmp14 +--* float V07.Y (offs=0x04) -> V18 tmp15 N001 ( 3, 2) [000022] -------N---- \--* LCL_VAR simd8 V01 loc0 u:2 (last use) $182 ***** BB01 STMT00016 (IL 0x020... ???) N003 ( 3, 3) [000089] -A------R--- * ASG simd8 (copy) $184 N002 ( 1, 1) [000087] D------N---- +--* LCL_VAR simd8 V08 tmp5 d:2 $184 N001 ( 3, 2) [000061] -------N---- \--* LCL_VAR simd8 (P) V06 tmp3 \--* float V06.X (offs=0x00) -> V15 tmp12 \--* float V06.Y (offs=0x04) -> V16 tmp13 $184 ***** BB01 STMT00017 (IL 0x020... ???) N003 ( 3, 3) [000092] -A------R--- * ASG simd8 (copy) $186 N002 ( 1, 1) [000090] D------N---- +--* LCL_VAR simd8 V09 tmp6 d:2 $186 N001 ( 3, 2) [000062] -------N---- \--* LCL_VAR simd8 (P) V07 tmp4 \--* float V07.X (offs=0x00) -> V17 tmp14 \--* float V07.Y (offs=0x04) -> V18 tmp15 $186 ***** BB01 STMT00014 (IL 0x020... ???) N005 ( 3, 3) [000082] -A------R--- * ASG simd8 (copy) $1c0 N004 ( 1, 1) [000080] D------N---- +--* LCL_VAR simd8 V10 tmp7 d:2 $1c0 N003 ( 3, 3) [000079] ------------ \--* HWINTRINSIC simd8 float Subtract $1c0 N001 ( 1, 1) [000077] ------------ +--* LCL_VAR simd8 V08 tmp5 u:2 (last use) $184 N002 ( 1, 1) [000078] ------------ \--* LCL_VAR simd8 V09 tmp6 u:2 (last use) $186 ***** BB01 STMT00004 (IL ???... ???) N006 ( 20, 13) [000029] --CXG------- * CALL void Console.WriteLine $VN.Void N005 ( 6, 7) [000069] ------------ arg0 in mm0 \--* INTRINSIC float sqrt $240 N004 ( 3, 3) [000100] ------------ \--* HWINTRINSIC float float Dot $144 N002 ( 1, 1) [000095] -------N---- +--* LCL_VAR simd8 V10 tmp7 u:2 $1c0 N003 ( 1, 1) [000098] -------N---- \--* LCL_VAR simd8 V10 tmp7 u:2 (last use) $1c0 ***** BB01 STMT00006 (IL ???... ???) N015 ( 10, 14) [000042] -A--G---R--- * ASG simd8 (copy) $189 N014 ( 1, 1) [000035] D------N---- +--* LCL_VAR simd8 V05 tmp2 d:2 $189 N013 ( 10, 14) [000040] -A-----N---- \--* SIMD simd8 float initN $189 N012 ( 9, 13) [000038] -A---------- \--* LIST float $146 N005 ( 4, 6) [000153] -A---------- +--* COMMA float $83 N003 ( 3, 4) [000151] -A------R--- | +--* ASG float $VN.Void N002 ( 1, 2) [000150] D------N---- | | +--* LCL_VAR float V21 cse2 d:1 $83 N001 ( 3, 4) [000030] ------------ | | \--* CNS_DBL float -2.0000000000000000 $83 N004 ( 1, 2) [000152] ------------ | \--* LCL_VAR float V21 cse2 u:1 $83 N011 ( 4, 6) [000037] -A---------- \--* LIST float $145 N010 ( 4, 6) [000148] -A---------- \--* COMMA float $84 N008 ( 3, 4) [000146] -A------R--- +--* ASG float $VN.Void N007 ( 1, 2) [000145] D------N---- | +--* LCL_VAR float V20 cse1 d:1 $84 N006 ( 3, 4) [000031] ------------ | \--* CNS_DBL float 2.0000000000000000 $84 N009 ( 1, 2) [000147] ------------ \--* LCL_VAR float V20 cse1 u:1 $84 ***** BB01 STMT00007 (IL 0x03A... ???) N007 ( 4, 6) [000051] -A--G---R--- * ASG simd8 (copy) $18b N006 ( 1, 1) [000043] D------N---- +--* LCL_VAR simd8 V02 loc1 d:2 $18b N005 ( 4, 6) [000049] -------N---- \--* SIMD simd8 float initN $18b N004 ( 3, 5) [000048] ------------ \--* LIST float $148 N001 ( 1, 2) [000149] ------------ +--* LCL_VAR float V20 cse1 u:1 $84 N003 ( 1, 2) [000047] ------------ \--* LIST float $147 N002 ( 1, 2) [000154] ------------ \--* LCL_VAR float V21 cse2 u:1 $83 ***** BB01 STMT00018 (IL 0x04B... ???) N005 ( 3, 3) [000107] -A------R--- * ASG simd8 (copy) $1c1 N004 ( 1, 1) [000105] D------N---- +--* LCL_VAR simd8 V13 tmp10 d:2 $1c1 N003 ( 3, 3) [000104] ------------ \--* HWINTRINSIC simd8 float Subtract $1c1 N001 ( 1, 1) [000102] ------------ +--* LCL_VAR simd8 V05 tmp2 u:2 (last use) $189 N002 ( 1, 1) [000103] ------------ \--* LCL_VAR simd8 V02 loc1 u:2 (last use) $18b ***** BB01 STMT00023 (IL 0x04B... ???) N005 ( 7, 8) [000124] -A------R--- * ASG float $149 N004 ( 3, 4) [000123] D------N---- +--* LCL_VAR float V14 tmp11 d:2 $149 N003 ( 3, 3) [000134] ------------ \--* HWINTRINSIC float float Dot $149 N001 ( 1, 1) [000129] -------N---- +--* LCL_VAR simd8 V13 tmp10 u:2 $1c1 N002 ( 1, 1) [000132] -------N---- \--* LCL_VAR simd8 V13 tmp10 u:2 (last use) $1c1 ***** BB01 STMT00009 (IL ???... ???) N004 ( 20, 14) [000059] --CXG------- * CALL void Console.WriteLine $VN.Void N003 ( 6, 8) [000126] ------------ arg0 in mm0 \--* INTRINSIC float sqrt $241 N002 ( 3, 4) [000125] ------------ \--* LCL_VAR float V14 tmp11 u:2 (last use) $149 ***** BB01 STMT00010 (IL 0x056... ???) N001 ( 0, 0) [000060] ------------ * RETURN void $2c0 ------------------------------------------------------------------------------------------------------------------- *************** Finishing PHASE Assertion prop *************** Starting PHASE Optimize index checks *************** In OptimizeRangeChecks() Blocks/trees before phase ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..057) (return), preds={} succs={} ***** BB01 STMT00001 (IL ???... ???) N011 ( 7, 9) [000012] -A--G---R--- * ASG simd8 (copy) $180 N010 ( 1, 1) [000005] D------N---- +--* LCL_VAR simd8 V04 tmp1 d:2 $180 N009 ( 7, 9) [000010] -A-----N---- \--* SIMD simd8 float initN $180 N008 ( 6, 8) [000008] -A---------- \--* LIST float $141 N005 ( 4, 6) [000143] -A---------- +--* COMMA float $81 N003 ( 3, 4) [000141] -A------R--- | +--* ASG float $VN.Void N002 ( 1, 2) [000140] D------N---- | | +--* LCL_VAR float V19 cse0 d:1 $81 N001 ( 3, 4) [000000] ------------ | | \--* CNS_DBL float -1.0000000000000000 $81 N004 ( 1, 2) [000142] ------------ | \--* LCL_VAR float V19 cse0 u:1 $81 N007 ( 1, 1) [000007] ------------ \--* LIST float $140 N006 ( 1, 1) [000001] ------------ \--* CNS_DBL float 1.0000000000000000 $82 ***** BB01 STMT00002 (IL 0x00F... ???) N007 ( 8, 8) [000021] -A--G---R--- * ASG simd8 (copy) $182 N006 ( 3, 2) [000013] D------N---- +--* LCL_VAR simd8 V01 loc0 d:2 $182 N005 ( 4, 5) [000019] -------N---- \--* SIMD simd8 float initN $182 N004 ( 3, 4) [000018] ------------ \--* LIST float $143 N001 ( 1, 1) [000015] ------------ +--* CNS_DBL float 1.0000000000000000 $82 N003 ( 1, 2) [000017] ------------ \--* LIST float $142 N002 ( 1, 2) [000144] ------------ \--* LCL_VAR float V19 cse0 u:1 $81 ***** BB01 STMT00012 (IL 0x020... ???) N003 ( 5, 4) [000072] -A------R--- * ASG simd8 (copy) $180 N002 ( 3, 2) [000070] D------N---- +--* LCL_VAR simd8 (P) V06 tmp3 +--* float V06.X (offs=0x00) -> V15 tmp12 +--* float V06.Y (offs=0x04) -> V16 tmp13 N001 ( 1, 1) [000009] -------N---- \--* LCL_VAR simd8 V04 tmp1 u:2 (last use) $180 ***** BB01 STMT00013 (IL 0x020... ???) N003 ( 7, 5) [000075] -A------R--- * ASG simd8 (copy) $182 N002 ( 3, 2) [000073] D------N---- +--* LCL_VAR simd8 (P) V07 tmp4 +--* float V07.X (offs=0x00) -> V17 tmp14 +--* float V07.Y (offs=0x04) -> V18 tmp15 N001 ( 3, 2) [000022] -------N---- \--* LCL_VAR simd8 V01 loc0 u:2 (last use) $182 ***** BB01 STMT00016 (IL 0x020... ???) N003 ( 3, 3) [000089] -A------R--- * ASG simd8 (copy) $184 N002 ( 1, 1) [000087] D------N---- +--* LCL_VAR simd8 V08 tmp5 d:2 $184 N001 ( 3, 2) [000061] -------N---- \--* LCL_VAR simd8 (P) V06 tmp3 \--* float V06.X (offs=0x00) -> V15 tmp12 \--* float V06.Y (offs=0x04) -> V16 tmp13 $184 ***** BB01 STMT00017 (IL 0x020... ???) N003 ( 3, 3) [000092] -A------R--- * ASG simd8 (copy) $186 N002 ( 1, 1) [000090] D------N---- +--* LCL_VAR simd8 V09 tmp6 d:2 $186 N001 ( 3, 2) [000062] -------N---- \--* LCL_VAR simd8 (P) V07 tmp4 \--* float V07.X (offs=0x00) -> V17 tmp14 \--* float V07.Y (offs=0x04) -> V18 tmp15 $186 ***** BB01 STMT00014 (IL 0x020... ???) N005 ( 3, 3) [000082] -A------R--- * ASG simd8 (copy) $1c0 N004 ( 1, 1) [000080] D------N---- +--* LCL_VAR simd8 V10 tmp7 d:2 $1c0 N003 ( 3, 3) [000079] ------------ \--* HWINTRINSIC simd8 float Subtract $1c0 N001 ( 1, 1) [000077] ------------ +--* LCL_VAR simd8 V08 tmp5 u:2 (last use) $184 N002 ( 1, 1) [000078] ------------ \--* LCL_VAR simd8 V09 tmp6 u:2 (last use) $186 ***** BB01 STMT00004 (IL ???... ???) N006 ( 20, 13) [000029] --CXG------- * CALL void Console.WriteLine $VN.Void N005 ( 6, 7) [000069] ------------ arg0 in mm0 \--* INTRINSIC float sqrt $240 N004 ( 3, 3) [000100] ------------ \--* HWINTRINSIC float float Dot $144 N002 ( 1, 1) [000095] -------N---- +--* LCL_VAR simd8 V10 tmp7 u:2 $1c0 N003 ( 1, 1) [000098] -------N---- \--* LCL_VAR simd8 V10 tmp7 u:2 (last use) $1c0 ***** BB01 STMT00006 (IL ???... ???) N015 ( 10, 14) [000042] -A--G---R--- * ASG simd8 (copy) $189 N014 ( 1, 1) [000035] D------N---- +--* LCL_VAR simd8 V05 tmp2 d:2 $189 N013 ( 10, 14) [000040] -A-----N---- \--* SIMD simd8 float initN $189 N012 ( 9, 13) [000038] -A---------- \--* LIST float $146 N005 ( 4, 6) [000153] -A---------- +--* COMMA float $83 N003 ( 3, 4) [000151] -A------R--- | +--* ASG float $VN.Void N002 ( 1, 2) [000150] D------N---- | | +--* LCL_VAR float V21 cse2 d:1 $83 N001 ( 3, 4) [000030] ------------ | | \--* CNS_DBL float -2.0000000000000000 $83 N004 ( 1, 2) [000152] ------------ | \--* LCL_VAR float V21 cse2 u:1 $83 N011 ( 4, 6) [000037] -A---------- \--* LIST float $145 N010 ( 4, 6) [000148] -A---------- \--* COMMA float $84 N008 ( 3, 4) [000146] -A------R--- +--* ASG float $VN.Void N007 ( 1, 2) [000145] D------N---- | +--* LCL_VAR float V20 cse1 d:1 $84 N006 ( 3, 4) [000031] ------------ | \--* CNS_DBL float 2.0000000000000000 $84 N009 ( 1, 2) [000147] ------------ \--* LCL_VAR float V20 cse1 u:1 $84 ***** BB01 STMT00007 (IL 0x03A... ???) N007 ( 4, 6) [000051] -A--G---R--- * ASG simd8 (copy) $18b N006 ( 1, 1) [000043] D------N---- +--* LCL_VAR simd8 V02 loc1 d:2 $18b N005 ( 4, 6) [000049] -------N---- \--* SIMD simd8 float initN $18b N004 ( 3, 5) [000048] ------------ \--* LIST float $148 N001 ( 1, 2) [000149] ------------ +--* LCL_VAR float V20 cse1 u:1 $84 N003 ( 1, 2) [000047] ------------ \--* LIST float $147 N002 ( 1, 2) [000154] ------------ \--* LCL_VAR float V21 cse2 u:1 $83 ***** BB01 STMT00018 (IL 0x04B... ???) N005 ( 3, 3) [000107] -A------R--- * ASG simd8 (copy) $1c1 N004 ( 1, 1) [000105] D------N---- +--* LCL_VAR simd8 V13 tmp10 d:2 $1c1 N003 ( 3, 3) [000104] ------------ \--* HWINTRINSIC simd8 float Subtract $1c1 N001 ( 1, 1) [000102] ------------ +--* LCL_VAR simd8 V05 tmp2 u:2 (last use) $189 N002 ( 1, 1) [000103] ------------ \--* LCL_VAR simd8 V02 loc1 u:2 (last use) $18b ***** BB01 STMT00023 (IL 0x04B... ???) N005 ( 7, 8) [000124] -A------R--- * ASG float $149 N004 ( 3, 4) [000123] D------N---- +--* LCL_VAR float V14 tmp11 d:2 $149 N003 ( 3, 3) [000134] ------------ \--* HWINTRINSIC float float Dot $149 N001 ( 1, 1) [000129] -------N---- +--* LCL_VAR simd8 V13 tmp10 u:2 $1c1 N002 ( 1, 1) [000132] -------N---- \--* LCL_VAR simd8 V13 tmp10 u:2 (last use) $1c1 ***** BB01 STMT00009 (IL ???... ???) N004 ( 20, 14) [000059] --CXG------- * CALL void Console.WriteLine $VN.Void N003 ( 6, 8) [000126] ------------ arg0 in mm0 \--* INTRINSIC float sqrt $241 N002 ( 3, 4) [000125] ------------ \--* LCL_VAR float V14 tmp11 u:2 (last use) $149 ***** BB01 STMT00010 (IL 0x056... ???) N001 ( 0, 0) [000060] ------------ * RETURN void $2c0 ------------------------------------------------------------------------------------------------------------------- *************** Finishing PHASE Optimize index checks *************** Starting PHASE Insert GC Polls *************** Finishing PHASE Insert GC Polls [no changes] *************** Starting PHASE Determine first cold block *************** In fgDetermineFirstColdBlock() No procedure splitting will be done for this method *************** Finishing PHASE Determine first cold block Trees before Rationalize IR ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..057) (return), preds={} succs={} ***** BB01 STMT00001 (IL ???... ???) N011 ( 7, 9) [000012] -A--G---R--- * ASG simd8 (copy) $180 N010 ( 1, 1) [000005] D------N---- +--* LCL_VAR simd8 V04 tmp1 d:2 $180 N009 ( 7, 9) [000010] -A-----N---- \--* SIMD simd8 float initN $180 N008 ( 6, 8) [000008] -A---------- \--* LIST float $141 N005 ( 4, 6) [000143] -A---------- +--* COMMA float $81 N003 ( 3, 4) [000141] -A------R--- | +--* ASG float $VN.Void N002 ( 1, 2) [000140] D------N---- | | +--* LCL_VAR float V19 cse0 d:1 $81 N001 ( 3, 4) [000000] ------------ | | \--* CNS_DBL float -1.0000000000000000 $81 N004 ( 1, 2) [000142] ------------ | \--* LCL_VAR float V19 cse0 u:1 $81 N007 ( 1, 1) [000007] ------------ \--* LIST float $140 N006 ( 1, 1) [000001] ------------ \--* CNS_DBL float 1.0000000000000000 $82 ***** BB01 STMT00002 (IL 0x00F... ???) N007 ( 8, 8) [000021] -A--G---R--- * ASG simd8 (copy) $182 N006 ( 3, 2) [000013] D------N---- +--* LCL_VAR simd8 V01 loc0 d:2 $182 N005 ( 4, 5) [000019] -------N---- \--* SIMD simd8 float initN $182 N004 ( 3, 4) [000018] ------------ \--* LIST float $143 N001 ( 1, 1) [000015] ------------ +--* CNS_DBL float 1.0000000000000000 $82 N003 ( 1, 2) [000017] ------------ \--* LIST float $142 N002 ( 1, 2) [000144] ------------ \--* LCL_VAR float V19 cse0 u:1 $81 ***** BB01 STMT00012 (IL 0x020... ???) N003 ( 5, 4) [000072] -A------R--- * ASG simd8 (copy) $180 N002 ( 3, 2) [000070] D------N---- +--* LCL_VAR simd8 (P) V06 tmp3 +--* float V06.X (offs=0x00) -> V15 tmp12 +--* float V06.Y (offs=0x04) -> V16 tmp13 N001 ( 1, 1) [000009] -------N---- \--* LCL_VAR simd8 V04 tmp1 u:2 (last use) $180 ***** BB01 STMT00013 (IL 0x020... ???) N003 ( 7, 5) [000075] -A------R--- * ASG simd8 (copy) $182 N002 ( 3, 2) [000073] D------N---- +--* LCL_VAR simd8 (P) V07 tmp4 +--* float V07.X (offs=0x00) -> V17 tmp14 +--* float V07.Y (offs=0x04) -> V18 tmp15 N001 ( 3, 2) [000022] -------N---- \--* LCL_VAR simd8 V01 loc0 u:2 (last use) $182 ***** BB01 STMT00016 (IL 0x020... ???) N003 ( 3, 3) [000089] -A------R--- * ASG simd8 (copy) $184 N002 ( 1, 1) [000087] D------N---- +--* LCL_VAR simd8 V08 tmp5 d:2 $184 N001 ( 3, 2) [000061] -------N---- \--* LCL_VAR simd8 (P) V06 tmp3 \--* float V06.X (offs=0x00) -> V15 tmp12 \--* float V06.Y (offs=0x04) -> V16 tmp13 $184 ***** BB01 STMT00017 (IL 0x020... ???) N003 ( 3, 3) [000092] -A------R--- * ASG simd8 (copy) $186 N002 ( 1, 1) [000090] D------N---- +--* LCL_VAR simd8 V09 tmp6 d:2 $186 N001 ( 3, 2) [000062] -------N---- \--* LCL_VAR simd8 (P) V07 tmp4 \--* float V07.X (offs=0x00) -> V17 tmp14 \--* float V07.Y (offs=0x04) -> V18 tmp15 $186 ***** BB01 STMT00014 (IL 0x020... ???) N005 ( 3, 3) [000082] -A------R--- * ASG simd8 (copy) $1c0 N004 ( 1, 1) [000080] D------N---- +--* LCL_VAR simd8 V10 tmp7 d:2 $1c0 N003 ( 3, 3) [000079] ------------ \--* HWINTRINSIC simd8 float Subtract $1c0 N001 ( 1, 1) [000077] ------------ +--* LCL_VAR simd8 V08 tmp5 u:2 (last use) $184 N002 ( 1, 1) [000078] ------------ \--* LCL_VAR simd8 V09 tmp6 u:2 (last use) $186 ***** BB01 STMT00004 (IL ???... ???) N006 ( 20, 13) [000029] --CXG------- * CALL void Console.WriteLine $VN.Void N005 ( 6, 7) [000069] ------------ arg0 in mm0 \--* INTRINSIC float sqrt $240 N004 ( 3, 3) [000100] ------------ \--* HWINTRINSIC float float Dot $144 N002 ( 1, 1) [000095] -------N---- +--* LCL_VAR simd8 V10 tmp7 u:2 $1c0 N003 ( 1, 1) [000098] -------N---- \--* LCL_VAR simd8 V10 tmp7 u:2 (last use) $1c0 ***** BB01 STMT00006 (IL ???... ???) N015 ( 10, 14) [000042] -A--G---R--- * ASG simd8 (copy) $189 N014 ( 1, 1) [000035] D------N---- +--* LCL_VAR simd8 V05 tmp2 d:2 $189 N013 ( 10, 14) [000040] -A-----N---- \--* SIMD simd8 float initN $189 N012 ( 9, 13) [000038] -A---------- \--* LIST float $146 N005 ( 4, 6) [000153] -A---------- +--* COMMA float $83 N003 ( 3, 4) [000151] -A------R--- | +--* ASG float $VN.Void N002 ( 1, 2) [000150] D------N---- | | +--* LCL_VAR float V21 cse2 d:1 $83 N001 ( 3, 4) [000030] ------------ | | \--* CNS_DBL float -2.0000000000000000 $83 N004 ( 1, 2) [000152] ------------ | \--* LCL_VAR float V21 cse2 u:1 $83 N011 ( 4, 6) [000037] -A---------- \--* LIST float $145 N010 ( 4, 6) [000148] -A---------- \--* COMMA float $84 N008 ( 3, 4) [000146] -A------R--- +--* ASG float $VN.Void N007 ( 1, 2) [000145] D------N---- | +--* LCL_VAR float V20 cse1 d:1 $84 N006 ( 3, 4) [000031] ------------ | \--* CNS_DBL float 2.0000000000000000 $84 N009 ( 1, 2) [000147] ------------ \--* LCL_VAR float V20 cse1 u:1 $84 ***** BB01 STMT00007 (IL 0x03A... ???) N007 ( 4, 6) [000051] -A--G---R--- * ASG simd8 (copy) $18b N006 ( 1, 1) [000043] D------N---- +--* LCL_VAR simd8 V02 loc1 d:2 $18b N005 ( 4, 6) [000049] -------N---- \--* SIMD simd8 float initN $18b N004 ( 3, 5) [000048] ------------ \--* LIST float $148 N001 ( 1, 2) [000149] ------------ +--* LCL_VAR float V20 cse1 u:1 $84 N003 ( 1, 2) [000047] ------------ \--* LIST float $147 N002 ( 1, 2) [000154] ------------ \--* LCL_VAR float V21 cse2 u:1 $83 ***** BB01 STMT00018 (IL 0x04B... ???) N005 ( 3, 3) [000107] -A------R--- * ASG simd8 (copy) $1c1 N004 ( 1, 1) [000105] D------N---- +--* LCL_VAR simd8 V13 tmp10 d:2 $1c1 N003 ( 3, 3) [000104] ------------ \--* HWINTRINSIC simd8 float Subtract $1c1 N001 ( 1, 1) [000102] ------------ +--* LCL_VAR simd8 V05 tmp2 u:2 (last use) $189 N002 ( 1, 1) [000103] ------------ \--* LCL_VAR simd8 V02 loc1 u:2 (last use) $18b ***** BB01 STMT00023 (IL 0x04B... ???) N005 ( 7, 8) [000124] -A------R--- * ASG float $149 N004 ( 3, 4) [000123] D------N---- +--* LCL_VAR float V14 tmp11 d:2 $149 N003 ( 3, 3) [000134] ------------ \--* HWINTRINSIC float float Dot $149 N001 ( 1, 1) [000129] -------N---- +--* LCL_VAR simd8 V13 tmp10 u:2 $1c1 N002 ( 1, 1) [000132] -------N---- \--* LCL_VAR simd8 V13 tmp10 u:2 (last use) $1c1 ***** BB01 STMT00009 (IL ???... ???) N004 ( 20, 14) [000059] --CXG------- * CALL void Console.WriteLine $VN.Void N003 ( 6, 8) [000126] ------------ arg0 in mm0 \--* INTRINSIC float sqrt $241 N002 ( 3, 4) [000125] ------------ \--* LCL_VAR float V14 tmp11 u:2 (last use) $149 ***** BB01 STMT00010 (IL 0x056... ???) N001 ( 0, 0) [000060] ------------ * RETURN void $2c0 ------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Rationalize IR rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N003 ( 3, 4) [000141] DA---------- * STORE_LCL_VAR float V19 cse0 d:1 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N011 ( 7, 9) [000012] DA--G------- * STORE_LCL_VAR simd8 V04 tmp1 d:2 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N007 ( 8, 8) [000021] DA--G------- * STORE_LCL_VAR simd8 V01 loc0 d:2 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N003 ( 5, 4) [000072] DA---------- * STORE_LCL_VAR simd8 (P) V06 tmp3 * float V06.X (offs=0x00) -> V15 tmp12 * float V06.Y (offs=0x04) -> V16 tmp13 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N003 ( 7, 5) [000075] DA---------- * STORE_LCL_VAR simd8 (P) V07 tmp4 * float V07.X (offs=0x00) -> V17 tmp14 * float V07.Y (offs=0x04) -> V18 tmp15 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N003 ( 3, 3) [000089] DA---------- * STORE_LCL_VAR simd8 V08 tmp5 d:2 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N003 ( 3, 3) [000092] DA---------- * STORE_LCL_VAR simd8 V09 tmp6 d:2 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N005 ( 3, 3) [000082] DA---------- * STORE_LCL_VAR simd8 V10 tmp7 d:2 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N003 ( 3, 4) [000151] DA---------- * STORE_LCL_VAR float V21 cse2 d:1 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N008 ( 3, 4) [000146] DA---------- * STORE_LCL_VAR float V20 cse1 d:1 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N015 ( 10, 14) [000042] DA--G------- * STORE_LCL_VAR simd8 V05 tmp2 d:2 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N007 ( 4, 6) [000051] DA--G------- * STORE_LCL_VAR simd8 V02 loc1 d:2 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N005 ( 3, 3) [000107] DA---------- * STORE_LCL_VAR simd8 V13 tmp10 d:2 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N005 ( 7, 8) [000124] DA---------- * STORE_LCL_VAR float V14 tmp11 d:2 *************** Finishing PHASE Rationalize IR Trees after Rationalize IR ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe LIR ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..057) (return), preds={} succs={} N001 ( 3, 4) [000000] ------------ t0 = CNS_DBL float -1.0000000000000000 $81 /--* t0 float N003 ( 3, 4) [000141] DA---------- * STORE_LCL_VAR float V19 cse0 d:1 N004 ( 1, 2) [000142] ------------ t142 = LCL_VAR float V19 cse0 u:1 $81 N006 ( 1, 1) [000001] ------------ t1 = CNS_DBL float 1.0000000000000000 $82 /--* t142 float +--* t1 float N009 ( 7, 9) [000010] -------N---- t10 = * SIMD simd8 float initN $180 /--* t10 simd8 N011 ( 7, 9) [000012] DA--G------- * STORE_LCL_VAR simd8 V04 tmp1 d:2 [000155] ------------ IL_OFFSET void IL offset: 0xf N001 ( 1, 1) [000015] ------------ t15 = CNS_DBL float 1.0000000000000000 $82 N002 ( 1, 2) [000144] ------------ t144 = LCL_VAR float V19 cse0 u:1 $81 /--* t15 float +--* t144 float N005 ( 4, 5) [000019] -------N---- t19 = * SIMD simd8 float initN $182 /--* t19 simd8 N007 ( 8, 8) [000021] DA--G------- * STORE_LCL_VAR simd8 V01 loc0 d:2 [000156] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 1, 1) [000009] -------N---- t9 = LCL_VAR simd8 V04 tmp1 u:2 (last use) $180 /--* t9 simd8 N003 ( 5, 4) [000072] DA---------- * STORE_LCL_VAR simd8 (P) V06 tmp3 * float V06.X (offs=0x00) -> V15 tmp12 * float V06.Y (offs=0x04) -> V16 tmp13 [000157] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 3, 2) [000022] -------N---- t22 = LCL_VAR simd8 V01 loc0 u:2 (last use) $182 /--* t22 simd8 N003 ( 7, 5) [000075] DA---------- * STORE_LCL_VAR simd8 (P) V07 tmp4 * float V07.X (offs=0x00) -> V17 tmp14 * float V07.Y (offs=0x04) -> V18 tmp15 [000158] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 3, 2) [000061] -------N---- t61 = LCL_VAR simd8 (P) V06 tmp3 * float V06.X (offs=0x00) -> V15 tmp12 * float V06.Y (offs=0x04) -> V16 tmp13 $184 /--* t61 simd8 N003 ( 3, 3) [000089] DA---------- * STORE_LCL_VAR simd8 V08 tmp5 d:2 [000159] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 3, 2) [000062] -------N---- t62 = LCL_VAR simd8 (P) V07 tmp4 * float V07.X (offs=0x00) -> V17 tmp14 * float V07.Y (offs=0x04) -> V18 tmp15 $186 /--* t62 simd8 N003 ( 3, 3) [000092] DA---------- * STORE_LCL_VAR simd8 V09 tmp6 d:2 [000160] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 1, 1) [000077] ------------ t77 = LCL_VAR simd8 V08 tmp5 u:2 (last use) $184 N002 ( 1, 1) [000078] ------------ t78 = LCL_VAR simd8 V09 tmp6 u:2 (last use) $186 /--* t77 simd8 +--* t78 simd8 N003 ( 3, 3) [000079] ------------ t79 = * HWINTRINSIC simd8 float Subtract $1c0 /--* t79 simd8 N005 ( 3, 3) [000082] DA---------- * STORE_LCL_VAR simd8 V10 tmp7 d:2 N002 ( 1, 1) [000095] -------N---- t95 = LCL_VAR simd8 V10 tmp7 u:2 $1c0 N003 ( 1, 1) [000098] -------N---- t98 = LCL_VAR simd8 V10 tmp7 u:2 (last use) $1c0 /--* t95 simd8 +--* t98 simd8 N004 ( 3, 3) [000100] ------------ t100 = * HWINTRINSIC float float Dot $144 /--* t100 float N005 ( 6, 7) [000069] ------------ t69 = * INTRINSIC float sqrt $240 /--* t69 float arg0 in mm0 N006 ( 20, 13) [000029] --CXG------- * CALL void Console.WriteLine $VN.Void N001 ( 3, 4) [000030] ------------ t30 = CNS_DBL float -2.0000000000000000 $83 /--* t30 float N003 ( 3, 4) [000151] DA---------- * STORE_LCL_VAR float V21 cse2 d:1 N004 ( 1, 2) [000152] ------------ t152 = LCL_VAR float V21 cse2 u:1 $83 N006 ( 3, 4) [000031] ------------ t31 = CNS_DBL float 2.0000000000000000 $84 /--* t31 float N008 ( 3, 4) [000146] DA---------- * STORE_LCL_VAR float V20 cse1 d:1 N009 ( 1, 2) [000147] ------------ t147 = LCL_VAR float V20 cse1 u:1 $84 /--* t152 float +--* t147 float N013 ( 10, 14) [000040] -------N---- t40 = * SIMD simd8 float initN $189 /--* t40 simd8 N015 ( 10, 14) [000042] DA--G------- * STORE_LCL_VAR simd8 V05 tmp2 d:2 [000161] ------------ IL_OFFSET void IL offset: 0x3a N001 ( 1, 2) [000149] ------------ t149 = LCL_VAR float V20 cse1 u:1 $84 N002 ( 1, 2) [000154] ------------ t154 = LCL_VAR float V21 cse2 u:1 $83 /--* t149 float +--* t154 float N005 ( 4, 6) [000049] -------N---- t49 = * SIMD simd8 float initN $18b /--* t49 simd8 N007 ( 4, 6) [000051] DA--G------- * STORE_LCL_VAR simd8 V02 loc1 d:2 [000162] ------------ IL_OFFSET void IL offset: 0x4b N001 ( 1, 1) [000102] ------------ t102 = LCL_VAR simd8 V05 tmp2 u:2 (last use) $189 N002 ( 1, 1) [000103] ------------ t103 = LCL_VAR simd8 V02 loc1 u:2 (last use) $18b /--* t102 simd8 +--* t103 simd8 N003 ( 3, 3) [000104] ------------ t104 = * HWINTRINSIC simd8 float Subtract $1c1 /--* t104 simd8 N005 ( 3, 3) [000107] DA---------- * STORE_LCL_VAR simd8 V13 tmp10 d:2 [000163] ------------ IL_OFFSET void IL offset: 0x4b N001 ( 1, 1) [000129] -------N---- t129 = LCL_VAR simd8 V13 tmp10 u:2 $1c1 N002 ( 1, 1) [000132] -------N---- t132 = LCL_VAR simd8 V13 tmp10 u:2 (last use) $1c1 /--* t129 simd8 +--* t132 simd8 N003 ( 3, 3) [000134] ------------ t134 = * HWINTRINSIC float float Dot $149 /--* t134 float N005 ( 7, 8) [000124] DA---------- * STORE_LCL_VAR float V14 tmp11 d:2 N002 ( 3, 4) [000125] ------------ t125 = LCL_VAR float V14 tmp11 u:2 (last use) $149 /--* t125 float N003 ( 6, 8) [000126] ------------ t126 = * INTRINSIC float sqrt $241 /--* t126 float arg0 in mm0 N004 ( 20, 14) [000059] --CXG------- * CALL void Console.WriteLine $VN.Void [000164] ------------ IL_OFFSET void IL offset: 0x56 N001 ( 0, 0) [000060] ------------ RETURN void $2c0 ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** Starting PHASE Do 'simple' lowering Bumping outgoingArgSpaceSize to 32 for call [000029] outgoingArgSpaceSize 32 sufficient for call [000059], which needs 32 *************** Finishing PHASE Do 'simple' lowering *************** In fgDebugCheckBBlist Trees before Lowering nodeinfo ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe LIR ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..057) (return), preds={} succs={} N001 ( 3, 4) [000000] ------------ t0 = CNS_DBL float -1.0000000000000000 $81 /--* t0 float N003 ( 3, 4) [000141] DA---------- * STORE_LCL_VAR float V19 cse0 d:1 N004 ( 1, 2) [000142] ------------ t142 = LCL_VAR float V19 cse0 u:1 $81 N006 ( 1, 1) [000001] ------------ t1 = CNS_DBL float 1.0000000000000000 $82 /--* t142 float +--* t1 float N009 ( 7, 9) [000010] -------N---- t10 = * SIMD simd8 float initN $180 /--* t10 simd8 N011 ( 7, 9) [000012] DA--G------- * STORE_LCL_VAR simd8 V04 tmp1 d:2 [000155] ------------ IL_OFFSET void IL offset: 0xf N001 ( 1, 1) [000015] ------------ t15 = CNS_DBL float 1.0000000000000000 $82 N002 ( 1, 2) [000144] ------------ t144 = LCL_VAR float V19 cse0 u:1 $81 /--* t15 float +--* t144 float N005 ( 4, 5) [000019] -------N---- t19 = * SIMD simd8 float initN $182 /--* t19 simd8 N007 ( 8, 8) [000021] DA--G------- * STORE_LCL_VAR simd8 V01 loc0 d:2 [000156] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 1, 1) [000009] -------N---- t9 = LCL_VAR simd8 V04 tmp1 u:2 (last use) $180 /--* t9 simd8 N003 ( 5, 4) [000072] DA---------- * STORE_LCL_VAR simd8 (P) V06 tmp3 * float V06.X (offs=0x00) -> V15 tmp12 * float V06.Y (offs=0x04) -> V16 tmp13 [000157] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 3, 2) [000022] -------N---- t22 = LCL_VAR simd8 V01 loc0 u:2 (last use) $182 /--* t22 simd8 N003 ( 7, 5) [000075] DA---------- * STORE_LCL_VAR simd8 (P) V07 tmp4 * float V07.X (offs=0x00) -> V17 tmp14 * float V07.Y (offs=0x04) -> V18 tmp15 [000158] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 3, 2) [000061] -------N---- t61 = LCL_VAR simd8 (P) V06 tmp3 * float V06.X (offs=0x00) -> V15 tmp12 * float V06.Y (offs=0x04) -> V16 tmp13 $184 /--* t61 simd8 N003 ( 3, 3) [000089] DA---------- * STORE_LCL_VAR simd8 V08 tmp5 d:2 [000159] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 3, 2) [000062] -------N---- t62 = LCL_VAR simd8 (P) V07 tmp4 * float V07.X (offs=0x00) -> V17 tmp14 * float V07.Y (offs=0x04) -> V18 tmp15 $186 /--* t62 simd8 N003 ( 3, 3) [000092] DA---------- * STORE_LCL_VAR simd8 V09 tmp6 d:2 [000160] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 1, 1) [000077] ------------ t77 = LCL_VAR simd8 V08 tmp5 u:2 (last use) $184 N002 ( 1, 1) [000078] ------------ t78 = LCL_VAR simd8 V09 tmp6 u:2 (last use) $186 /--* t77 simd8 +--* t78 simd8 N003 ( 3, 3) [000079] ------------ t79 = * HWINTRINSIC simd8 float Subtract $1c0 /--* t79 simd8 N005 ( 3, 3) [000082] DA---------- * STORE_LCL_VAR simd8 V10 tmp7 d:2 N002 ( 1, 1) [000095] -------N---- t95 = LCL_VAR simd8 V10 tmp7 u:2 $1c0 N003 ( 1, 1) [000098] -------N---- t98 = LCL_VAR simd8 V10 tmp7 u:2 (last use) $1c0 /--* t95 simd8 +--* t98 simd8 N004 ( 3, 3) [000100] ------------ t100 = * HWINTRINSIC float float Dot $144 /--* t100 float N005 ( 6, 7) [000069] ------------ t69 = * INTRINSIC float sqrt $240 /--* t69 float arg0 in mm0 N006 ( 20, 13) [000029] --CXG------- * CALL void Console.WriteLine $VN.Void N001 ( 3, 4) [000030] ------------ t30 = CNS_DBL float -2.0000000000000000 $83 /--* t30 float N003 ( 3, 4) [000151] DA---------- * STORE_LCL_VAR float V21 cse2 d:1 N004 ( 1, 2) [000152] ------------ t152 = LCL_VAR float V21 cse2 u:1 $83 N006 ( 3, 4) [000031] ------------ t31 = CNS_DBL float 2.0000000000000000 $84 /--* t31 float N008 ( 3, 4) [000146] DA---------- * STORE_LCL_VAR float V20 cse1 d:1 N009 ( 1, 2) [000147] ------------ t147 = LCL_VAR float V20 cse1 u:1 $84 /--* t152 float +--* t147 float N013 ( 10, 14) [000040] -------N---- t40 = * SIMD simd8 float initN $189 /--* t40 simd8 N015 ( 10, 14) [000042] DA--G------- * STORE_LCL_VAR simd8 V05 tmp2 d:2 [000161] ------------ IL_OFFSET void IL offset: 0x3a N001 ( 1, 2) [000149] ------------ t149 = LCL_VAR float V20 cse1 u:1 $84 N002 ( 1, 2) [000154] ------------ t154 = LCL_VAR float V21 cse2 u:1 $83 /--* t149 float +--* t154 float N005 ( 4, 6) [000049] -------N---- t49 = * SIMD simd8 float initN $18b /--* t49 simd8 N007 ( 4, 6) [000051] DA--G------- * STORE_LCL_VAR simd8 V02 loc1 d:2 [000162] ------------ IL_OFFSET void IL offset: 0x4b N001 ( 1, 1) [000102] ------------ t102 = LCL_VAR simd8 V05 tmp2 u:2 (last use) $189 N002 ( 1, 1) [000103] ------------ t103 = LCL_VAR simd8 V02 loc1 u:2 (last use) $18b /--* t102 simd8 +--* t103 simd8 N003 ( 3, 3) [000104] ------------ t104 = * HWINTRINSIC simd8 float Subtract $1c1 /--* t104 simd8 N005 ( 3, 3) [000107] DA---------- * STORE_LCL_VAR simd8 V13 tmp10 d:2 [000163] ------------ IL_OFFSET void IL offset: 0x4b N001 ( 1, 1) [000129] -------N---- t129 = LCL_VAR simd8 V13 tmp10 u:2 $1c1 N002 ( 1, 1) [000132] -------N---- t132 = LCL_VAR simd8 V13 tmp10 u:2 (last use) $1c1 /--* t129 simd8 +--* t132 simd8 N003 ( 3, 3) [000134] ------------ t134 = * HWINTRINSIC float float Dot $149 /--* t134 float N005 ( 7, 8) [000124] DA---------- * STORE_LCL_VAR float V14 tmp11 d:2 N002 ( 3, 4) [000125] ------------ t125 = LCL_VAR float V14 tmp11 u:2 (last use) $149 /--* t125 float N003 ( 6, 8) [000126] ------------ t126 = * INTRINSIC float sqrt $241 /--* t126 float arg0 in mm0 N004 ( 20, 14) [000059] --CXG------- * CALL void Console.WriteLine $VN.Void [000164] ------------ IL_OFFSET void IL offset: 0x56 N001 ( 0, 0) [000060] ------------ RETURN void $2c0 ------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Lowering nodeinfo lowering store lcl var/field (before): N001 ( 3, 4) [000000] ------------ t0 = CNS_DBL float -1.0000000000000000 $81 /--* t0 float N003 ( 3, 4) [000141] DA---------- * STORE_LCL_VAR float V19 cse0 d:1 lowering store lcl var/field (after): N001 ( 3, 4) [000000] ------------ t0 = CNS_DBL float -1.0000000000000000 $81 /--* t0 float N003 ( 3, 4) [000141] DA---------- * STORE_LCL_VAR float V19 cse0 d:1 lowering store lcl var/field (before): N004 ( 1, 2) [000142] ------------ t142 = LCL_VAR float V19 cse0 u:1 $81 N006 ( 1, 1) [000001] ------------ t1 = CNS_DBL float 1.0000000000000000 $82 /--* t142 float +--* t1 float N009 ( 7, 9) [000010] -------N---- t10 = * SIMD simd8 float initN $180 /--* t10 simd8 N011 ( 7, 9) [000012] DA--G------- * STORE_LCL_VAR simd8 V04 tmp1 d:2 lowering store lcl var/field (after): N004 ( 1, 2) [000142] ------------ t142 = LCL_VAR float V19 cse0 u:1 $81 N006 ( 1, 1) [000001] ------------ t1 = CNS_DBL float 1.0000000000000000 $82 /--* t142 float +--* t1 float N009 ( 7, 9) [000010] -------N---- t10 = * SIMD simd8 float initN $180 /--* t10 simd8 N011 ( 7, 9) [000012] DA--G------- * STORE_LCL_VAR simd8 V04 tmp1 d:2 lowering store lcl var/field (before): N001 ( 1, 1) [000015] ------------ t15 = CNS_DBL float 1.0000000000000000 $82 N002 ( 1, 2) [000144] ------------ t144 = LCL_VAR float V19 cse0 u:1 $81 /--* t15 float +--* t144 float N005 ( 4, 5) [000019] -------N---- t19 = * SIMD simd8 float initN $182 /--* t19 simd8 N007 ( 8, 8) [000021] DA--G------- * STORE_LCL_VAR simd8 V01 loc0 d:2 lowering store lcl var/field (after): N001 ( 1, 1) [000015] ------------ t15 = CNS_DBL float 1.0000000000000000 $82 N002 ( 1, 2) [000144] ------------ t144 = LCL_VAR float V19 cse0 u:1 $81 /--* t15 float +--* t144 float N005 ( 4, 5) [000019] -------N---- t19 = * SIMD simd8 float initN $182 /--* t19 simd8 N007 ( 8, 8) [000021] DA--G------- * STORE_LCL_VAR simd8 V01 loc0 d:2 lowering store lcl var/field (before): N001 ( 1, 1) [000009] -------N---- t9 = LCL_VAR simd8 V04 tmp1 u:2 (last use) $180 /--* t9 simd8 N003 ( 5, 4) [000072] DA---------- * STORE_LCL_VAR simd8 (P) V06 tmp3 * float V06.X (offs=0x00) -> V15 tmp12 * float V06.Y (offs=0x04) -> V16 tmp13 lowering store lcl var/field (after): N001 ( 1, 1) [000009] -------N---- t9 = LCL_VAR simd8 V04 tmp1 u:2 (last use) $180 /--* t9 simd8 N003 ( 5, 4) [000072] DA---------- * STORE_LCL_VAR simd8 (P) V06 tmp3 * float V06.X (offs=0x00) -> V15 tmp12 * float V06.Y (offs=0x04) -> V16 tmp13 lowering store lcl var/field (before): N001 ( 3, 2) [000022] -------N---- t22 = LCL_VAR simd8 V01 loc0 u:2 (last use) $182 /--* t22 simd8 N003 ( 7, 5) [000075] DA---------- * STORE_LCL_VAR simd8 (P) V07 tmp4 * float V07.X (offs=0x00) -> V17 tmp14 * float V07.Y (offs=0x04) -> V18 tmp15 lowering store lcl var/field (after): N001 ( 3, 2) [000022] -------N---- t22 = LCL_VAR simd8 V01 loc0 u:2 (last use) $182 /--* t22 simd8 N003 ( 7, 5) [000075] DA---------- * STORE_LCL_VAR simd8 (P) V07 tmp4 * float V07.X (offs=0x00) -> V17 tmp14 * float V07.Y (offs=0x04) -> V18 tmp15 lowering store lcl var/field (before): N001 ( 3, 2) [000061] -------N---- t61 = LCL_VAR simd8 (P) V06 tmp3 * float V06.X (offs=0x00) -> V15 tmp12 * float V06.Y (offs=0x04) -> V16 tmp13 $184 /--* t61 simd8 N003 ( 3, 3) [000089] DA---------- * STORE_LCL_VAR simd8 V08 tmp5 d:2 lowering store lcl var/field (after): N001 ( 3, 2) [000061] -------N---- t61 = LCL_VAR simd8 (P) V06 tmp3 * float V06.X (offs=0x00) -> V15 tmp12 * float V06.Y (offs=0x04) -> V16 tmp13 $184 /--* t61 simd8 N003 ( 3, 3) [000089] DA---------- * STORE_LCL_VAR simd8 V08 tmp5 d:2 lowering store lcl var/field (before): N001 ( 3, 2) [000062] -------N---- t62 = LCL_VAR simd8 (P) V07 tmp4 * float V07.X (offs=0x00) -> V17 tmp14 * float V07.Y (offs=0x04) -> V18 tmp15 $186 /--* t62 simd8 N003 ( 3, 3) [000092] DA---------- * STORE_LCL_VAR simd8 V09 tmp6 d:2 lowering store lcl var/field (after): N001 ( 3, 2) [000062] -------N---- t62 = LCL_VAR simd8 (P) V07 tmp4 * float V07.X (offs=0x00) -> V17 tmp14 * float V07.Y (offs=0x04) -> V18 tmp15 $186 /--* t62 simd8 N003 ( 3, 3) [000092] DA---------- * STORE_LCL_VAR simd8 V09 tmp6 d:2 lowering store lcl var/field (before): N001 ( 1, 1) [000077] ------------ t77 = LCL_VAR simd8 V08 tmp5 u:2 (last use) $184 N002 ( 1, 1) [000078] ------------ t78 = LCL_VAR simd8 V09 tmp6 u:2 (last use) $186 /--* t77 simd8 +--* t78 simd8 N003 ( 3, 3) [000079] ------------ t79 = * HWINTRINSIC simd8 float Subtract $1c0 /--* t79 simd8 N005 ( 3, 3) [000082] DA---------- * STORE_LCL_VAR simd8 V10 tmp7 d:2 lowering store lcl var/field (after): N001 ( 1, 1) [000077] ------------ t77 = LCL_VAR simd8 V08 tmp5 u:2 (last use) $184 N002 ( 1, 1) [000078] ------------ t78 = LCL_VAR simd8 V09 tmp6 u:2 (last use) $186 /--* t77 simd8 +--* t78 simd8 N003 ( 3, 3) [000079] ------------ t79 = * HWINTRINSIC simd8 float Subtract $1c0 /--* t79 simd8 N005 ( 3, 3) [000082] DA---------- * STORE_LCL_VAR simd8 V10 tmp7 d:2 Notify VM instruction set (SSE41) must be supported. lowering call (before): N002 ( 1, 1) [000095] -------N---- t95 = LCL_VAR simd8 V10 tmp7 u:2 $1c0 N003 ( 1, 1) [000098] -------N---- t98 = LCL_VAR simd8 V10 tmp7 u:2 (last use) $1c0 [000165] -c---------- t165 = CNS_INT int 49 /--* t95 simd8 +--* t98 simd8 +--* t165 int [000169] ------------ t169 = * HWINTRINSIC simd8 float DotProduct /--* t169 simd8 N004 ( 3, 3) [000100] ------------ t100 = * HWINTRINSIC float float ToScalar $144 /--* t100 float N005 ( 6, 7) [000069] ------------ t69 = * INTRINSIC float sqrt $240 /--* t69 float arg0 in mm0 N006 ( 20, 13) [000029] --CXG------- * CALL void Console.WriteLine $VN.Void objp: ====== args: ====== lowering arg : N001 ( 0, 0) [000137] ----------L- * ARGPLACE float $240 late: ====== lowering arg : N005 ( 6, 7) [000069] ------------ * INTRINSIC float sqrt $240 new node is : [000170] ------------ * PUTARG_REG float REG mm0 lowering call (after): N002 ( 1, 1) [000095] -------N---- t95 = LCL_VAR simd8 V10 tmp7 u:2 $1c0 N003 ( 1, 1) [000098] -------N---- t98 = LCL_VAR simd8 V10 tmp7 u:2 (last use) $1c0 [000165] -c---------- t165 = CNS_INT int 49 /--* t95 simd8 +--* t98 simd8 +--* t165 int [000169] ------------ t169 = * HWINTRINSIC simd8 float DotProduct /--* t169 simd8 N004 ( 3, 3) [000100] ------------ t100 = * HWINTRINSIC float float ToScalar $144 /--* t100 float N005 ( 6, 7) [000069] ------------ t69 = * INTRINSIC float sqrt $240 /--* t69 float [000170] ------------ t170 = * PUTARG_REG float REG mm0 /--* t170 float arg0 in mm0 N006 ( 20, 13) [000029] --CXG------- * CALL void Console.WriteLine $VN.Void lowering store lcl var/field (before): N001 ( 3, 4) [000030] ------------ t30 = CNS_DBL float -2.0000000000000000 $83 /--* t30 float N003 ( 3, 4) [000151] DA---------- * STORE_LCL_VAR float V21 cse2 d:1 lowering store lcl var/field (after): N001 ( 3, 4) [000030] ------------ t30 = CNS_DBL float -2.0000000000000000 $83 /--* t30 float N003 ( 3, 4) [000151] DA---------- * STORE_LCL_VAR float V21 cse2 d:1 lowering store lcl var/field (before): N006 ( 3, 4) [000031] ------------ t31 = CNS_DBL float 2.0000000000000000 $84 /--* t31 float N008 ( 3, 4) [000146] DA---------- * STORE_LCL_VAR float V20 cse1 d:1 lowering store lcl var/field (after): N006 ( 3, 4) [000031] ------------ t31 = CNS_DBL float 2.0000000000000000 $84 /--* t31 float N008 ( 3, 4) [000146] DA---------- * STORE_LCL_VAR float V20 cse1 d:1 lowering store lcl var/field (before): N004 ( 1, 2) [000152] ------------ t152 = LCL_VAR float V21 cse2 u:1 $83 N006 ( 3, 4) [000031] ------------ t31 = CNS_DBL float 2.0000000000000000 $84 /--* t31 float N008 ( 3, 4) [000146] DA---------- * STORE_LCL_VAR float V20 cse1 d:1 N009 ( 1, 2) [000147] ------------ t147 = LCL_VAR float V20 cse1 u:1 $84 /--* t152 float +--* t147 float N013 ( 10, 14) [000040] -------N---- t40 = * SIMD simd8 float initN $189 /--* t40 simd8 N015 ( 10, 14) [000042] DA--G------- * STORE_LCL_VAR simd8 V05 tmp2 d:2 lowering store lcl var/field (after): N004 ( 1, 2) [000152] ------------ t152 = LCL_VAR float V21 cse2 u:1 $83 N006 ( 3, 4) [000031] ------------ t31 = CNS_DBL float 2.0000000000000000 $84 /--* t31 float N008 ( 3, 4) [000146] DA---------- * STORE_LCL_VAR float V20 cse1 d:1 N009 ( 1, 2) [000147] ------------ t147 = LCL_VAR float V20 cse1 u:1 $84 /--* t152 float +--* t147 float N013 ( 10, 14) [000040] -------N---- t40 = * SIMD simd8 float initN $189 /--* t40 simd8 N015 ( 10, 14) [000042] DA--G------- * STORE_LCL_VAR simd8 V05 tmp2 d:2 lowering store lcl var/field (before): N001 ( 1, 2) [000149] ------------ t149 = LCL_VAR float V20 cse1 u:1 $84 N002 ( 1, 2) [000154] ------------ t154 = LCL_VAR float V21 cse2 u:1 $83 /--* t149 float +--* t154 float N005 ( 4, 6) [000049] -------N---- t49 = * SIMD simd8 float initN $18b /--* t49 simd8 N007 ( 4, 6) [000051] DA--G------- * STORE_LCL_VAR simd8 V02 loc1 d:2 lowering store lcl var/field (after): N001 ( 1, 2) [000149] ------------ t149 = LCL_VAR float V20 cse1 u:1 $84 N002 ( 1, 2) [000154] ------------ t154 = LCL_VAR float V21 cse2 u:1 $83 /--* t149 float +--* t154 float N005 ( 4, 6) [000049] -------N---- t49 = * SIMD simd8 float initN $18b /--* t49 simd8 N007 ( 4, 6) [000051] DA--G------- * STORE_LCL_VAR simd8 V02 loc1 d:2 lowering store lcl var/field (before): N001 ( 1, 1) [000102] ------------ t102 = LCL_VAR simd8 V05 tmp2 u:2 (last use) $189 N002 ( 1, 1) [000103] ------------ t103 = LCL_VAR simd8 V02 loc1 u:2 (last use) $18b /--* t102 simd8 +--* t103 simd8 N003 ( 3, 3) [000104] ------------ t104 = * HWINTRINSIC simd8 float Subtract $1c1 /--* t104 simd8 N005 ( 3, 3) [000107] DA---------- * STORE_LCL_VAR simd8 V13 tmp10 d:2 lowering store lcl var/field (after): N001 ( 1, 1) [000102] ------------ t102 = LCL_VAR simd8 V05 tmp2 u:2 (last use) $189 N002 ( 1, 1) [000103] ------------ t103 = LCL_VAR simd8 V02 loc1 u:2 (last use) $18b /--* t102 simd8 +--* t103 simd8 N003 ( 3, 3) [000104] ------------ t104 = * HWINTRINSIC simd8 float Subtract $1c1 /--* t104 simd8 N005 ( 3, 3) [000107] DA---------- * STORE_LCL_VAR simd8 V13 tmp10 d:2 lowering store lcl var/field (before): N001 ( 1, 1) [000129] -------N---- t129 = LCL_VAR simd8 V13 tmp10 u:2 $1c1 N002 ( 1, 1) [000132] -------N---- t132 = LCL_VAR simd8 V13 tmp10 u:2 (last use) $1c1 [000171] -c---------- t171 = CNS_INT int 49 /--* t129 simd8 +--* t132 simd8 +--* t171 int [000175] ------------ t175 = * HWINTRINSIC simd8 float DotProduct /--* t175 simd8 N003 ( 3, 3) [000134] ------------ t134 = * HWINTRINSIC float float ToScalar $149 /--* t134 float N005 ( 7, 8) [000124] DA---------- * STORE_LCL_VAR float V14 tmp11 d:2 lowering store lcl var/field (after): N001 ( 1, 1) [000129] -------N---- t129 = LCL_VAR simd8 V13 tmp10 u:2 $1c1 N002 ( 1, 1) [000132] -------N---- t132 = LCL_VAR simd8 V13 tmp10 u:2 (last use) $1c1 [000171] -c---------- t171 = CNS_INT int 49 /--* t129 simd8 +--* t132 simd8 +--* t171 int [000175] ------------ t175 = * HWINTRINSIC simd8 float DotProduct /--* t175 simd8 N003 ( 3, 3) [000134] ------------ t134 = * HWINTRINSIC float float ToScalar $149 /--* t134 float N005 ( 7, 8) [000124] DA---------- * STORE_LCL_VAR float V14 tmp11 d:2 lowering call (before): N002 ( 3, 4) [000125] ------------ t125 = LCL_VAR float V14 tmp11 u:2 (last use) $149 /--* t125 float N003 ( 6, 8) [000126] ------------ t126 = * INTRINSIC float sqrt $241 /--* t126 float arg0 in mm0 N004 ( 20, 14) [000059] --CXG------- * CALL void Console.WriteLine $VN.Void objp: ====== args: ====== lowering arg : N001 ( 0, 0) [000139] ----------L- * ARGPLACE float $241 late: ====== lowering arg : N003 ( 6, 8) [000126] ------------ * INTRINSIC float sqrt $241 new node is : [000176] ------------ * PUTARG_REG float REG mm0 lowering call (after): N002 ( 3, 4) [000125] ------------ t125 = LCL_VAR float V14 tmp11 u:2 (last use) $149 /--* t125 float N003 ( 6, 8) [000126] ------------ t126 = * INTRINSIC float sqrt $241 /--* t126 float [000176] ------------ t176 = * PUTARG_REG float REG mm0 /--* t176 float arg0 in mm0 N004 ( 20, 14) [000059] --CXG------- * CALL void Console.WriteLine $VN.Void lowering GT_RETURN N001 ( 0, 0) [000060] ------------ * RETURN void $2c0 ============Lower has completed modifying nodes. ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe LIR ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..057) (return), preds={} succs={} N001 ( 3, 4) [000000] ------------ t0 = CNS_DBL float -1.0000000000000000 $81 /--* t0 float N003 ( 3, 4) [000141] DA---------- * STORE_LCL_VAR float V19 cse0 d:1 N004 ( 1, 2) [000142] ------------ t142 = LCL_VAR float V19 cse0 u:1 $81 N006 ( 1, 1) [000001] ------------ t1 = CNS_DBL float 1.0000000000000000 $82 /--* t142 float +--* t1 float N009 ( 7, 9) [000010] -------N---- t10 = * SIMD simd8 float initN $180 /--* t10 simd8 N011 ( 7, 9) [000012] DA--G------- * STORE_LCL_VAR simd8 V04 tmp1 d:2 [000155] ------------ IL_OFFSET void IL offset: 0xf N001 ( 1, 1) [000015] ------------ t15 = CNS_DBL float 1.0000000000000000 $82 N002 ( 1, 2) [000144] ------------ t144 = LCL_VAR float V19 cse0 u:1 $81 /--* t15 float +--* t144 float N005 ( 4, 5) [000019] -------N---- t19 = * SIMD simd8 float initN $182 /--* t19 simd8 N007 ( 8, 8) [000021] DA--G------- * STORE_LCL_VAR simd8 V01 loc0 d:2 [000156] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 1, 1) [000009] -------N---- t9 = LCL_VAR simd8 V04 tmp1 u:2 (last use) $180 /--* t9 simd8 N003 ( 5, 4) [000072] DA---------- * STORE_LCL_VAR simd8 (P) V06 tmp3 * float V06.X (offs=0x00) -> V15 tmp12 * float V06.Y (offs=0x04) -> V16 tmp13 [000157] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 3, 2) [000022] -------N---- t22 = LCL_VAR simd8 V01 loc0 u:2 (last use) $182 /--* t22 simd8 N003 ( 7, 5) [000075] DA---------- * STORE_LCL_VAR simd8 (P) V07 tmp4 * float V07.X (offs=0x00) -> V17 tmp14 * float V07.Y (offs=0x04) -> V18 tmp15 [000158] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 3, 2) [000061] -------N---- t61 = LCL_VAR simd8 (P) V06 tmp3 * float V06.X (offs=0x00) -> V15 tmp12 * float V06.Y (offs=0x04) -> V16 tmp13 $184 /--* t61 simd8 N003 ( 3, 3) [000089] DA---------- * STORE_LCL_VAR simd8 V08 tmp5 d:2 [000159] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 3, 2) [000062] -------N---- t62 = LCL_VAR simd8 (P) V07 tmp4 * float V07.X (offs=0x00) -> V17 tmp14 * float V07.Y (offs=0x04) -> V18 tmp15 $186 /--* t62 simd8 N003 ( 3, 3) [000092] DA---------- * STORE_LCL_VAR simd8 V09 tmp6 d:2 [000160] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 1, 1) [000077] ------------ t77 = LCL_VAR simd8 V08 tmp5 u:2 (last use) $184 N002 ( 1, 1) [000078] ------------ t78 = LCL_VAR simd8 V09 tmp6 u:2 (last use) $186 /--* t77 simd8 +--* t78 simd8 N003 ( 3, 3) [000079] ------------ t79 = * HWINTRINSIC simd8 float Subtract $1c0 /--* t79 simd8 N005 ( 3, 3) [000082] DA---------- * STORE_LCL_VAR simd8 V10 tmp7 d:2 N002 ( 1, 1) [000095] -------N---- t95 = LCL_VAR simd8 V10 tmp7 u:2 $1c0 N003 ( 1, 1) [000098] -------N---- t98 = LCL_VAR simd8 V10 tmp7 u:2 (last use) $1c0 [000165] -c---------- t165 = CNS_INT int 49 /--* t95 simd8 +--* t98 simd8 +--* t165 int [000169] ------------ t169 = * HWINTRINSIC simd8 float DotProduct /--* t169 simd8 N004 ( 3, 3) [000100] ------------ t100 = * HWINTRINSIC float float ToScalar $144 /--* t100 float N005 ( 6, 7) [000069] ------------ t69 = * INTRINSIC float sqrt $240 /--* t69 float [000170] ------------ t170 = * PUTARG_REG float REG mm0 /--* t170 float arg0 in mm0 N006 ( 20, 13) [000029] --CXG------- * CALL void Console.WriteLine $VN.Void N001 ( 3, 4) [000030] ------------ t30 = CNS_DBL float -2.0000000000000000 $83 /--* t30 float N003 ( 3, 4) [000151] DA---------- * STORE_LCL_VAR float V21 cse2 d:1 N004 ( 1, 2) [000152] ------------ t152 = LCL_VAR float V21 cse2 u:1 $83 N006 ( 3, 4) [000031] ------------ t31 = CNS_DBL float 2.0000000000000000 $84 /--* t31 float N008 ( 3, 4) [000146] DA---------- * STORE_LCL_VAR float V20 cse1 d:1 N009 ( 1, 2) [000147] ------------ t147 = LCL_VAR float V20 cse1 u:1 $84 /--* t152 float +--* t147 float N013 ( 10, 14) [000040] -------N---- t40 = * SIMD simd8 float initN $189 /--* t40 simd8 N015 ( 10, 14) [000042] DA--G------- * STORE_LCL_VAR simd8 V05 tmp2 d:2 [000161] ------------ IL_OFFSET void IL offset: 0x3a N001 ( 1, 2) [000149] ------------ t149 = LCL_VAR float V20 cse1 u:1 $84 N002 ( 1, 2) [000154] ------------ t154 = LCL_VAR float V21 cse2 u:1 $83 /--* t149 float +--* t154 float N005 ( 4, 6) [000049] -------N---- t49 = * SIMD simd8 float initN $18b /--* t49 simd8 N007 ( 4, 6) [000051] DA--G------- * STORE_LCL_VAR simd8 V02 loc1 d:2 [000162] ------------ IL_OFFSET void IL offset: 0x4b N001 ( 1, 1) [000102] ------------ t102 = LCL_VAR simd8 V05 tmp2 u:2 (last use) $189 N002 ( 1, 1) [000103] ------------ t103 = LCL_VAR simd8 V02 loc1 u:2 (last use) $18b /--* t102 simd8 +--* t103 simd8 N003 ( 3, 3) [000104] ------------ t104 = * HWINTRINSIC simd8 float Subtract $1c1 /--* t104 simd8 N005 ( 3, 3) [000107] DA---------- * STORE_LCL_VAR simd8 V13 tmp10 d:2 [000163] ------------ IL_OFFSET void IL offset: 0x4b N001 ( 1, 1) [000129] -------N---- t129 = LCL_VAR simd8 V13 tmp10 u:2 $1c1 N002 ( 1, 1) [000132] -------N---- t132 = LCL_VAR simd8 V13 tmp10 u:2 (last use) $1c1 [000171] -c---------- t171 = CNS_INT int 49 /--* t129 simd8 +--* t132 simd8 +--* t171 int [000175] ------------ t175 = * HWINTRINSIC simd8 float DotProduct /--* t175 simd8 N003 ( 3, 3) [000134] ------------ t134 = * HWINTRINSIC float float ToScalar $149 /--* t134 float N005 ( 7, 8) [000124] DA---------- * STORE_LCL_VAR float V14 tmp11 d:2 N002 ( 3, 4) [000125] ------------ t125 = LCL_VAR float V14 tmp11 u:2 (last use) $149 /--* t125 float N003 ( 6, 8) [000126] ------------ t126 = * INTRINSIC float sqrt $241 /--* t126 float [000176] ------------ t176 = * PUTARG_REG float REG mm0 /--* t176 float arg0 in mm0 N004 ( 20, 14) [000059] --CXG------- * CALL void Console.WriteLine $VN.Void [000164] ------------ IL_OFFSET void IL offset: 0x56 N001 ( 0, 0) [000060] ------------ RETURN void $2c0 ------------------------------------------------------------------------------------------------------------------- *** lvaComputeRefCounts *** *** lvaComputeRefCounts -- explicit counts *** New refCnts for V19: refCnt = 1, refCntWtd = 1 New refCnts for V19: refCnt = 2, refCntWtd = 2 New refCnts for V04: refCnt = 1, refCntWtd = 2 New refCnts for V19: refCnt = 3, refCntWtd = 3 New refCnts for V01: refCnt = 1, refCntWtd = 1 New refCnts for V04: refCnt = 2, refCntWtd = 4 New refCnts for V15: refCnt = 1, refCntWtd = 2 New refCnts for V16: refCnt = 1, refCntWtd = 2 New refCnts for V06: refCnt = 1, refCntWtd = 2 New refCnts for V01: refCnt = 2, refCntWtd = 2 New refCnts for V17: refCnt = 1, refCntWtd = 2 New refCnts for V18: refCnt = 1, refCntWtd = 2 New refCnts for V07: refCnt = 1, refCntWtd = 2 New refCnts for V15: refCnt = 2, refCntWtd = 4 New refCnts for V16: refCnt = 2, refCntWtd = 4 New refCnts for V06: refCnt = 2, refCntWtd = 4 New refCnts for V08: refCnt = 1, refCntWtd = 2 New refCnts for V17: refCnt = 2, refCntWtd = 4 New refCnts for V18: refCnt = 2, refCntWtd = 4 New refCnts for V07: refCnt = 2, refCntWtd = 4 New refCnts for V09: refCnt = 1, refCntWtd = 2 New refCnts for V08: refCnt = 2, refCntWtd = 4 New refCnts for V09: refCnt = 2, refCntWtd = 4 New refCnts for V10: refCnt = 1, refCntWtd = 1 New refCnts for V10: refCnt = 2, refCntWtd = 2 New refCnts for V10: refCnt = 3, refCntWtd = 3 New refCnts for V21: refCnt = 1, refCntWtd = 1 New refCnts for V21: refCnt = 2, refCntWtd = 2 New refCnts for V20: refCnt = 1, refCntWtd = 1 New refCnts for V20: refCnt = 2, refCntWtd = 2 New refCnts for V05: refCnt = 1, refCntWtd = 2 New refCnts for V20: refCnt = 3, refCntWtd = 3 New refCnts for V21: refCnt = 3, refCntWtd = 3 New refCnts for V02: refCnt = 1, refCntWtd = 1 New refCnts for V05: refCnt = 2, refCntWtd = 4 New refCnts for V02: refCnt = 2, refCntWtd = 2 New refCnts for V13: refCnt = 1, refCntWtd = 1 New refCnts for V13: refCnt = 2, refCntWtd = 2 New refCnts for V13: refCnt = 3, refCntWtd = 3 New refCnts for V14: refCnt = 1, refCntWtd = 1 New refCnts for V14: refCnt = 2, refCntWtd = 2 *** lvaComputeRefCounts -- implicit counts *** *************** In fgLocalVarLiveness() ; Initial local variable assignments ; ; V00 arg0 ref class-hnd ; V01 loc0 simd8 ld-addr-op ; V02 loc1 simd8 ld-addr-op ; V03 OutArgs lclBlk <32> "OutgoingArgSpace" ; V04 tmp1 simd8 "NewObj constructor temp" ; V05 tmp2 simd8 "NewObj constructor temp" ; V06 tmp3 simd8 do-not-enreg[SB] "Inlining Arg" ; V07 tmp4 simd8 do-not-enreg[SB] "Inlining Arg" ; V08 tmp5 simd8 "Inlining Arg" ; V09 tmp6 simd8 "Inlining Arg" ; V10 tmp7 simd8 ld-addr-op "Inline stloc first use temp" ; V11 tmp8 simd8 "Inlining Arg" ; V12 tmp9 simd8 "Inlining Arg" ; V13 tmp10 simd8 ld-addr-op "Inline stloc first use temp" ; V14 tmp11 float "Inline stloc first use temp" ; V15 tmp12 float do-not-enreg[] V06.X(offs=0x00) P-DEP "field V06.X (fldOffset=0x0)" ; V16 tmp13 float do-not-enreg[] V06.Y(offs=0x04) P-DEP "field V06.Y (fldOffset=0x4)" ; V17 tmp14 float do-not-enreg[] V07.X(offs=0x00) P-DEP "field V07.X (fldOffset=0x0)" ; V18 tmp15 float do-not-enreg[] V07.Y(offs=0x04) P-DEP "field V07.Y (fldOffset=0x4)" ; V19 cse0 float "CSE - aggressive" ; V20 cse1 float "CSE - aggressive" ; V21 cse2 float "CSE - aggressive" In fgLocalVarLivenessInit Local V15 should not be enregistered because: field of a dependently promoted struct Local V16 should not be enregistered because: field of a dependently promoted struct Local V17 should not be enregistered because: field of a dependently promoted struct Local V18 should not be enregistered because: field of a dependently promoted struct Tracked variable (16 out of 22) table: V04 tmp1 [ simd8]: refCnt = 2, refCntWtd = 4 V05 tmp2 [ simd8]: refCnt = 2, refCntWtd = 4 V08 tmp5 [ simd8]: refCnt = 2, refCntWtd = 4 V09 tmp6 [ simd8]: refCnt = 2, refCntWtd = 4 V15 tmp12 [ float]: refCnt = 2, refCntWtd = 4 V16 tmp13 [ float]: refCnt = 2, refCntWtd = 4 V17 tmp14 [ float]: refCnt = 2, refCntWtd = 4 V18 tmp15 [ float]: refCnt = 2, refCntWtd = 4 V10 tmp7 [ simd8]: refCnt = 3, refCntWtd = 3 V13 tmp10 [ simd8]: refCnt = 3, refCntWtd = 3 V19 cse0 [ float]: refCnt = 3, refCntWtd = 3 V20 cse1 [ float]: refCnt = 3, refCntWtd = 3 V21 cse2 [ float]: refCnt = 3, refCntWtd = 3 V01 loc0 [ simd8]: refCnt = 2, refCntWtd = 2 V02 loc1 [ simd8]: refCnt = 2, refCntWtd = 2 V14 tmp11 [ float]: refCnt = 2, refCntWtd = 2 *************** In fgPerBlockLocalVarLiveness() BB01 USE(0)={ } + ByrefExposed + GcHeap DEF(16)={V04 V05 V08 V09 V15 V16 V17 V18 V10 V13 V19 V20 V21 V01 V02 V14} + ByrefExposed* + GcHeap* ** Memory liveness computed, GcHeap states and ByrefExposed states match *************** In fgInterBlockLocalVarLiveness() BB liveness after fgLiveVarAnalysis(): BB01 IN (0)={} + ByrefExposed + GcHeap OUT(0)={} *************** In fgUpdateFlowGraph() Before updating the flow graph: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe LIR ----------------------------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *** lvaComputeRefCounts *** *** lvaComputeRefCounts -- explicit counts *** New refCnts for V19: refCnt = 1, refCntWtd = 1 New refCnts for V19: refCnt = 2, refCntWtd = 2 New refCnts for V04: refCnt = 1, refCntWtd = 2 New refCnts for V19: refCnt = 3, refCntWtd = 3 New refCnts for V01: refCnt = 1, refCntWtd = 1 New refCnts for V04: refCnt = 2, refCntWtd = 4 New refCnts for V15: refCnt = 1, refCntWtd = 2 New refCnts for V16: refCnt = 1, refCntWtd = 2 New refCnts for V06: refCnt = 1, refCntWtd = 2 New refCnts for V01: refCnt = 2, refCntWtd = 2 New refCnts for V17: refCnt = 1, refCntWtd = 2 New refCnts for V18: refCnt = 1, refCntWtd = 2 New refCnts for V07: refCnt = 1, refCntWtd = 2 New refCnts for V15: refCnt = 2, refCntWtd = 4 New refCnts for V16: refCnt = 2, refCntWtd = 4 New refCnts for V06: refCnt = 2, refCntWtd = 4 New refCnts for V08: refCnt = 1, refCntWtd = 2 New refCnts for V17: refCnt = 2, refCntWtd = 4 New refCnts for V18: refCnt = 2, refCntWtd = 4 New refCnts for V07: refCnt = 2, refCntWtd = 4 New refCnts for V09: refCnt = 1, refCntWtd = 2 New refCnts for V08: refCnt = 2, refCntWtd = 4 New refCnts for V09: refCnt = 2, refCntWtd = 4 New refCnts for V10: refCnt = 1, refCntWtd = 1 New refCnts for V10: refCnt = 2, refCntWtd = 2 New refCnts for V10: refCnt = 3, refCntWtd = 3 New refCnts for V21: refCnt = 1, refCntWtd = 1 New refCnts for V21: refCnt = 2, refCntWtd = 2 New refCnts for V20: refCnt = 1, refCntWtd = 1 New refCnts for V20: refCnt = 2, refCntWtd = 2 New refCnts for V05: refCnt = 1, refCntWtd = 2 New refCnts for V20: refCnt = 3, refCntWtd = 3 New refCnts for V21: refCnt = 3, refCntWtd = 3 New refCnts for V02: refCnt = 1, refCntWtd = 1 New refCnts for V05: refCnt = 2, refCntWtd = 4 New refCnts for V02: refCnt = 2, refCntWtd = 2 New refCnts for V13: refCnt = 1, refCntWtd = 1 New refCnts for V13: refCnt = 2, refCntWtd = 2 New refCnts for V13: refCnt = 3, refCntWtd = 3 New refCnts for V14: refCnt = 1, refCntWtd = 1 New refCnts for V14: refCnt = 2, refCntWtd = 2 *** lvaComputeRefCounts -- implicit counts *** *************** Finishing PHASE Lowering nodeinfo Trees after Lowering nodeinfo ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe LIR ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..057) (return), preds={} succs={} N001 ( 3, 4) [000000] ------------ t0 = CNS_DBL float -1.0000000000000000 $81 /--* t0 float N003 ( 3, 4) [000141] DA---------- * STORE_LCL_VAR float V19 cse0 d:1 N004 ( 1, 2) [000142] ------------ t142 = LCL_VAR float V19 cse0 u:1 $81 N006 ( 1, 1) [000001] ------------ t1 = CNS_DBL float 1.0000000000000000 $82 /--* t142 float +--* t1 float N009 ( 7, 9) [000010] -------N---- t10 = * SIMD simd8 float initN $180 /--* t10 simd8 N011 ( 7, 9) [000012] DA--G------- * STORE_LCL_VAR simd8 V04 tmp1 d:2 [000155] ------------ IL_OFFSET void IL offset: 0xf N001 ( 1, 1) [000015] ------------ t15 = CNS_DBL float 1.0000000000000000 $82 N002 ( 1, 2) [000144] ------------ t144 = LCL_VAR float V19 cse0 u:1 (last use) $81 /--* t15 float +--* t144 float N005 ( 4, 5) [000019] -------N---- t19 = * SIMD simd8 float initN $182 /--* t19 simd8 N007 ( 8, 8) [000021] DA--G------- * STORE_LCL_VAR simd8 V01 loc0 d:2 [000156] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 1, 1) [000009] -------N---- t9 = LCL_VAR simd8 V04 tmp1 u:2 (last use) $180 /--* t9 simd8 N003 ( 5, 4) [000072] DA---------- * STORE_LCL_VAR simd8 (P) V06 tmp3 * float V06.X (offs=0x00) -> V15 tmp12 * float V06.Y (offs=0x04) -> V16 tmp13 [000157] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 3, 2) [000022] -------N---- t22 = LCL_VAR simd8 V01 loc0 u:2 (last use) $182 /--* t22 simd8 N003 ( 7, 5) [000075] DA---------- * STORE_LCL_VAR simd8 (P) V07 tmp4 * float V07.X (offs=0x00) -> V17 tmp14 * float V07.Y (offs=0x04) -> V18 tmp15 [000158] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 3, 2) [000061] -------N---- t61 = LCL_VAR simd8 (P) V06 tmp3 * float V06.X (offs=0x00) -> V15 tmp12 * float V06.Y (offs=0x04) -> V16 tmp13 $184 /--* t61 simd8 N003 ( 3, 3) [000089] DA---------- * STORE_LCL_VAR simd8 V08 tmp5 d:2 [000159] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 3, 2) [000062] -------N---- t62 = LCL_VAR simd8 (P) V07 tmp4 * float V07.X (offs=0x00) -> V17 tmp14 * float V07.Y (offs=0x04) -> V18 tmp15 $186 /--* t62 simd8 N003 ( 3, 3) [000092] DA---------- * STORE_LCL_VAR simd8 V09 tmp6 d:2 [000160] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 1, 1) [000077] ------------ t77 = LCL_VAR simd8 V08 tmp5 u:2 (last use) $184 N002 ( 1, 1) [000078] ------------ t78 = LCL_VAR simd8 V09 tmp6 u:2 (last use) $186 /--* t77 simd8 +--* t78 simd8 N003 ( 3, 3) [000079] ------------ t79 = * HWINTRINSIC simd8 float Subtract $1c0 /--* t79 simd8 N005 ( 3, 3) [000082] DA---------- * STORE_LCL_VAR simd8 V10 tmp7 d:2 N002 ( 1, 1) [000095] -------N---- t95 = LCL_VAR simd8 V10 tmp7 u:2 $1c0 N003 ( 1, 1) [000098] -------N---- t98 = LCL_VAR simd8 V10 tmp7 u:2 (last use) $1c0 [000165] -c---------- t165 = CNS_INT int 49 /--* t95 simd8 +--* t98 simd8 +--* t165 int [000169] ------------ t169 = * HWINTRINSIC simd8 float DotProduct /--* t169 simd8 N004 ( 3, 3) [000100] ------------ t100 = * HWINTRINSIC float float ToScalar $144 /--* t100 float N005 ( 6, 7) [000069] ------------ t69 = * INTRINSIC float sqrt $240 /--* t69 float [000170] ------------ t170 = * PUTARG_REG float REG mm0 /--* t170 float arg0 in mm0 N006 ( 20, 13) [000029] --CXG------- * CALL void Console.WriteLine $VN.Void N001 ( 3, 4) [000030] ------------ t30 = CNS_DBL float -2.0000000000000000 $83 /--* t30 float N003 ( 3, 4) [000151] DA---------- * STORE_LCL_VAR float V21 cse2 d:1 N004 ( 1, 2) [000152] ------------ t152 = LCL_VAR float V21 cse2 u:1 $83 N006 ( 3, 4) [000031] ------------ t31 = CNS_DBL float 2.0000000000000000 $84 /--* t31 float N008 ( 3, 4) [000146] DA---------- * STORE_LCL_VAR float V20 cse1 d:1 N009 ( 1, 2) [000147] ------------ t147 = LCL_VAR float V20 cse1 u:1 $84 /--* t152 float +--* t147 float N013 ( 10, 14) [000040] -------N---- t40 = * SIMD simd8 float initN $189 /--* t40 simd8 N015 ( 10, 14) [000042] DA--G------- * STORE_LCL_VAR simd8 V05 tmp2 d:2 [000161] ------------ IL_OFFSET void IL offset: 0x3a N001 ( 1, 2) [000149] ------------ t149 = LCL_VAR float V20 cse1 u:1 (last use) $84 N002 ( 1, 2) [000154] ------------ t154 = LCL_VAR float V21 cse2 u:1 (last use) $83 /--* t149 float +--* t154 float N005 ( 4, 6) [000049] -------N---- t49 = * SIMD simd8 float initN $18b /--* t49 simd8 N007 ( 4, 6) [000051] DA--G------- * STORE_LCL_VAR simd8 V02 loc1 d:2 [000162] ------------ IL_OFFSET void IL offset: 0x4b N001 ( 1, 1) [000102] ------------ t102 = LCL_VAR simd8 V05 tmp2 u:2 (last use) $189 N002 ( 1, 1) [000103] ------------ t103 = LCL_VAR simd8 V02 loc1 u:2 (last use) $18b /--* t102 simd8 +--* t103 simd8 N003 ( 3, 3) [000104] ------------ t104 = * HWINTRINSIC simd8 float Subtract $1c1 /--* t104 simd8 N005 ( 3, 3) [000107] DA---------- * STORE_LCL_VAR simd8 V13 tmp10 d:2 [000163] ------------ IL_OFFSET void IL offset: 0x4b N001 ( 1, 1) [000129] -------N---- t129 = LCL_VAR simd8 V13 tmp10 u:2 $1c1 N002 ( 1, 1) [000132] -------N---- t132 = LCL_VAR simd8 V13 tmp10 u:2 (last use) $1c1 [000171] -c---------- t171 = CNS_INT int 49 /--* t129 simd8 +--* t132 simd8 +--* t171 int [000175] ------------ t175 = * HWINTRINSIC simd8 float DotProduct /--* t175 simd8 N003 ( 3, 3) [000134] ------------ t134 = * HWINTRINSIC float float ToScalar $149 /--* t134 float N005 ( 7, 8) [000124] DA---------- * STORE_LCL_VAR float V14 tmp11 d:2 N002 ( 3, 4) [000125] ------------ t125 = LCL_VAR float V14 tmp11 u:2 (last use) $149 /--* t125 float N003 ( 6, 8) [000126] ------------ t126 = * INTRINSIC float sqrt $241 /--* t126 float [000176] ------------ t176 = * PUTARG_REG float REG mm0 /--* t176 float arg0 in mm0 N004 ( 20, 14) [000059] --CXG------- * CALL void Console.WriteLine $VN.Void [000164] ------------ IL_OFFSET void IL offset: 0x56 N001 ( 0, 0) [000060] ------------ RETURN void $2c0 ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist Trees before Calculate stack level slots ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe LIR ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..057) (return), preds={} succs={} N001 ( 3, 4) [000000] ------------ t0 = CNS_DBL float -1.0000000000000000 $81 /--* t0 float N003 ( 3, 4) [000141] DA---------- * STORE_LCL_VAR float V19 cse0 d:1 N004 ( 1, 2) [000142] ------------ t142 = LCL_VAR float V19 cse0 u:1 $81 N006 ( 1, 1) [000001] ------------ t1 = CNS_DBL float 1.0000000000000000 $82 /--* t142 float +--* t1 float N009 ( 7, 9) [000010] -------N---- t10 = * SIMD simd8 float initN $180 /--* t10 simd8 N011 ( 7, 9) [000012] DA--G------- * STORE_LCL_VAR simd8 V04 tmp1 d:2 [000155] ------------ IL_OFFSET void IL offset: 0xf N001 ( 1, 1) [000015] ------------ t15 = CNS_DBL float 1.0000000000000000 $82 N002 ( 1, 2) [000144] ------------ t144 = LCL_VAR float V19 cse0 u:1 (last use) $81 /--* t15 float +--* t144 float N005 ( 4, 5) [000019] -------N---- t19 = * SIMD simd8 float initN $182 /--* t19 simd8 N007 ( 8, 8) [000021] DA--G------- * STORE_LCL_VAR simd8 V01 loc0 d:2 [000156] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 1, 1) [000009] -------N---- t9 = LCL_VAR simd8 V04 tmp1 u:2 (last use) $180 /--* t9 simd8 N003 ( 5, 4) [000072] DA---------- * STORE_LCL_VAR simd8 (P) V06 tmp3 * float V06.X (offs=0x00) -> V15 tmp12 * float V06.Y (offs=0x04) -> V16 tmp13 [000157] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 3, 2) [000022] -------N---- t22 = LCL_VAR simd8 V01 loc0 u:2 (last use) $182 /--* t22 simd8 N003 ( 7, 5) [000075] DA---------- * STORE_LCL_VAR simd8 (P) V07 tmp4 * float V07.X (offs=0x00) -> V17 tmp14 * float V07.Y (offs=0x04) -> V18 tmp15 [000158] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 3, 2) [000061] -------N---- t61 = LCL_VAR simd8 (P) V06 tmp3 * float V06.X (offs=0x00) -> V15 tmp12 * float V06.Y (offs=0x04) -> V16 tmp13 $184 /--* t61 simd8 N003 ( 3, 3) [000089] DA---------- * STORE_LCL_VAR simd8 V08 tmp5 d:2 [000159] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 3, 2) [000062] -------N---- t62 = LCL_VAR simd8 (P) V07 tmp4 * float V07.X (offs=0x00) -> V17 tmp14 * float V07.Y (offs=0x04) -> V18 tmp15 $186 /--* t62 simd8 N003 ( 3, 3) [000092] DA---------- * STORE_LCL_VAR simd8 V09 tmp6 d:2 [000160] ------------ IL_OFFSET void IL offset: 0x20 N001 ( 1, 1) [000077] ------------ t77 = LCL_VAR simd8 V08 tmp5 u:2 (last use) $184 N002 ( 1, 1) [000078] ------------ t78 = LCL_VAR simd8 V09 tmp6 u:2 (last use) $186 /--* t77 simd8 +--* t78 simd8 N003 ( 3, 3) [000079] ------------ t79 = * HWINTRINSIC simd8 float Subtract $1c0 /--* t79 simd8 N005 ( 3, 3) [000082] DA---------- * STORE_LCL_VAR simd8 V10 tmp7 d:2 N002 ( 1, 1) [000095] -------N---- t95 = LCL_VAR simd8 V10 tmp7 u:2 $1c0 N003 ( 1, 1) [000098] -------N---- t98 = LCL_VAR simd8 V10 tmp7 u:2 (last use) $1c0 [000165] -c---------- t165 = CNS_INT int 49 /--* t95 simd8 +--* t98 simd8 +--* t165 int [000169] ------------ t169 = * HWINTRINSIC simd8 float DotProduct /--* t169 simd8 N004 ( 3, 3) [000100] ------------ t100 = * HWINTRINSIC float float ToScalar $144 /--* t100 float N005 ( 6, 7) [000069] ------------ t69 = * INTRINSIC float sqrt $240 /--* t69 float [000170] ------------ t170 = * PUTARG_REG float REG mm0 /--* t170 float arg0 in mm0 N006 ( 20, 13) [000029] --CXG------- * CALL void Console.WriteLine $VN.Void N001 ( 3, 4) [000030] ------------ t30 = CNS_DBL float -2.0000000000000000 $83 /--* t30 float N003 ( 3, 4) [000151] DA---------- * STORE_LCL_VAR float V21 cse2 d:1 N004 ( 1, 2) [000152] ------------ t152 = LCL_VAR float V21 cse2 u:1 $83 N006 ( 3, 4) [000031] ------------ t31 = CNS_DBL float 2.0000000000000000 $84 /--* t31 float N008 ( 3, 4) [000146] DA---------- * STORE_LCL_VAR float V20 cse1 d:1 N009 ( 1, 2) [000147] ------------ t147 = LCL_VAR float V20 cse1 u:1 $84 /--* t152 float +--* t147 float N013 ( 10, 14) [000040] -------N---- t40 = * SIMD simd8 float initN $189 /--* t40 simd8 N015 ( 10, 14) [000042] DA--G------- * STORE_LCL_VAR simd8 V05 tmp2 d:2 [000161] ------------ IL_OFFSET void IL offset: 0x3a N001 ( 1, 2) [000149] ------------ t149 = LCL_VAR float V20 cse1 u:1 (last use) $84 N002 ( 1, 2) [000154] ------------ t154 = LCL_VAR float V21 cse2 u:1 (last use) $83 /--* t149 float +--* t154 float N005 ( 4, 6) [000049] -------N---- t49 = * SIMD simd8 float initN $18b /--* t49 simd8 N007 ( 4, 6) [000051] DA--G------- * STORE_LCL_VAR simd8 V02 loc1 d:2 [000162] ------------ IL_OFFSET void IL offset: 0x4b N001 ( 1, 1) [000102] ------------ t102 = LCL_VAR simd8 V05 tmp2 u:2 (last use) $189 N002 ( 1, 1) [000103] ------------ t103 = LCL_VAR simd8 V02 loc1 u:2 (last use) $18b /--* t102 simd8 +--* t103 simd8 N003 ( 3, 3) [000104] ------------ t104 = * HWINTRINSIC simd8 float Subtract $1c1 /--* t104 simd8 N005 ( 3, 3) [000107] DA---------- * STORE_LCL_VAR simd8 V13 tmp10 d:2 [000163] ------------ IL_OFFSET void IL offset: 0x4b N001 ( 1, 1) [000129] -------N---- t129 = LCL_VAR simd8 V13 tmp10 u:2 $1c1 N002 ( 1, 1) [000132] -------N---- t132 = LCL_VAR simd8 V13 tmp10 u:2 (last use) $1c1 [000171] -c---------- t171 = CNS_INT int 49 /--* t129 simd8 +--* t132 simd8 +--* t171 int [000175] ------------ t175 = * HWINTRINSIC simd8 float DotProduct /--* t175 simd8 N003 ( 3, 3) [000134] ------------ t134 = * HWINTRINSIC float float ToScalar $149 /--* t134 float N005 ( 7, 8) [000124] DA---------- * STORE_LCL_VAR float V14 tmp11 d:2 N002 ( 3, 4) [000125] ------------ t125 = LCL_VAR float V14 tmp11 u:2 (last use) $149 /--* t125 float N003 ( 6, 8) [000126] ------------ t126 = * INTRINSIC float sqrt $241 /--* t126 float [000176] ------------ t176 = * PUTARG_REG float REG mm0 /--* t176 float arg0 in mm0 N004 ( 20, 14) [000059] --CXG------- * CALL void Console.WriteLine $VN.Void [000164] ------------ IL_OFFSET void IL offset: 0x56 N001 ( 0, 0) [000060] ------------ RETURN void $2c0 ------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Calculate stack level slots *************** Finishing PHASE Calculate stack level slots [no changes] *************** Starting PHASE Linear scan register alloc Clearing modified regs. buildIntervals ======== ----------------- LIVENESS: ----------------- BB01 use def in out {} {V01 V02 V04 V05 V08 V09 V10 V13 V14 V15 V16 V17 V18 V19 V20 V21} {} {} Interval 0: simd8 RefPositions {} physReg:NA Preferences=[allFloat] Interval 0: (V01) simd8 RefPositions {} physReg:NA Preferences=[allFloat] Interval 1: simd8 RefPositions {} physReg:NA Preferences=[allFloat] Interval 1: (V02) simd8 RefPositions {} physReg:NA Preferences=[allFloat] Interval 2: simd8 RefPositions {} physReg:NA Preferences=[allFloat] Interval 2: (V04) simd8 RefPositions {} physReg:NA Preferences=[allFloat] Interval 3: simd8 RefPositions {} physReg:NA Preferences=[allFloat] Interval 3: (V05) simd8 RefPositions {} physReg:NA Preferences=[allFloat] Interval 4: simd8 RefPositions {} physReg:NA Preferences=[allFloat] Interval 4: (V08) simd8 RefPositions {} physReg:NA Preferences=[allFloat] Interval 5: simd8 RefPositions {} physReg:NA Preferences=[allFloat] Interval 5: (V09) simd8 RefPositions {} physReg:NA Preferences=[allFloat] Interval 6: simd8 RefPositions {} physReg:NA Preferences=[allFloat] Interval 6: (V10) simd8 RefPositions {} physReg:NA Preferences=[allFloat] Interval 7: simd8 RefPositions {} physReg:NA Preferences=[allFloat] Interval 7: (V13) simd8 RefPositions {} physReg:NA Preferences=[allFloat] Interval 8: float RefPositions {} physReg:NA Preferences=[allFloat] Interval 8: (V14) float RefPositions {} physReg:NA Preferences=[allFloat] Interval 9: float RefPositions {} physReg:NA Preferences=[allFloat] Interval 9: (V19) float RefPositions {} physReg:NA Preferences=[allFloat] Interval 10: float RefPositions {} physReg:NA Preferences=[allFloat] Interval 10: (V20) float RefPositions {} physReg:NA Preferences=[allFloat] Interval 11: float RefPositions {} physReg:NA Preferences=[allFloat] Interval 11: (V21) float RefPositions {} physReg:NA Preferences=[allFloat] FP callee save candidate vars: {V04 V05 V08 V09} floatVarCount = 12; hasLoops = 0, singleExit = 1 TUPLE STYLE DUMP BEFORE LSRA LSRA Block Sequence: BB01( 1 ) BB01 [000..057) (return), preds={} succs={} ===== N001. t0 = CNS_DBL -1.0000000000000000 N003. V19(t141); t0 N004. V19(t142) N006. t1 = CNS_DBL 1.0000000000000000 N009. t10 = SIMD ; t142,t1 N011. V04(t12); t10 N000. IL_OFFSET IL offset: 0xf N001. t15 = CNS_DBL 1.0000000000000000 N002. V19(t144*) N005. t19 = SIMD ; t15,t144* N007. V01(t21); t19 N000. IL_OFFSET IL offset: 0x20 N001. V04(t9*) N003. V06 MEM; t9* N000. IL_OFFSET IL offset: 0x20 N001. V01(t22*) N003. V07 MEM; t22* N000. IL_OFFSET IL offset: 0x20 N001. t61* = V06 MEM N003. V08(t89); t61* N000. IL_OFFSET IL offset: 0x20 N001. t62* = V07 MEM N003. V09(t92); t62* N000. IL_OFFSET IL offset: 0x20 N001. V08(t77*) N002. V09(t78*) N003. t79 = HWINTRINSIC; t77*,t78* N005. V10(t82); t79 N002. V10(t95) N003. V10(t98*) N000. CNS_INT 49 N000. t169 = HWINTRINSIC; t95,t98* N004. t100 = HWINTRINSIC; t169 N005. t69 = INTRINSIC; t100 N000. t170 = PUTARG_REG; t69 N006. CALL ; t170 N001. t30 = CNS_DBL -2.0000000000000000 N003. V21(t151); t30 N004. V21(t152) N006. t31 = CNS_DBL 2.0000000000000000 N008. V20(t146); t31 N009. V20(t147) N013. t40 = SIMD ; t152,t147 N015. V05(t42); t40 N000. IL_OFFSET IL offset: 0x3a N001. V20(t149*) N002. V21(t154*) N005. t49 = SIMD ; t149*,t154* N007. V02(t51); t49 N000. IL_OFFSET IL offset: 0x4b N001. V05(t102*) N002. V02(t103*) N003. t104 = HWINTRINSIC; t102*,t103* N005. V13(t107); t104 N000. IL_OFFSET IL offset: 0x4b N001. V13(t129) N002. V13(t132*) N000. CNS_INT 49 N000. t175 = HWINTRINSIC; t129,t132* N003. t134 = HWINTRINSIC; t175 N005. V14(t124); t134 N002. V14(t125*) N003. t126 = INTRINSIC; t125* N000. t176 = PUTARG_REG; t126 N004. CALL ; t176 N000. IL_OFFSET IL offset: 0x56 N001. RETURN buildIntervals second part ======== Int arg V00 in reg rcx NEW BLOCK BB01 DefList: { } N003 ( 3, 4) [000000] ------------ * CNS_DBL float -1.0000000000000000 REG NA $81 Interval 12: float RefPositions {} physReg:NA Preferences=[allFloat] CNS_DBL BB01 regmask=[allFloat] minReg=1> DefList: { N003.t0. CNS_DBL } N005 ( 3, 4) [000141] DA---------- * STORE_LCL_VAR float V19 cse0 d:1 NA REG NA BB01 regmask=[allFloat] minReg=1 last> Assigning related to STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1 last> DefList: { } N007 ( 1, 2) [000142] ------------ * LCL_VAR float V19 cse0 u:1 NA REG NA $81 DefList: { } N009 ( 1, 1) [000001] ------------ * CNS_DBL float 1.0000000000000000 REG NA $82 Interval 13: float RefPositions {} physReg:NA Preferences=[allFloat] CNS_DBL BB01 regmask=[allFloat] minReg=1> DefList: { N009.t1. CNS_DBL } N011 ( 7, 9) [000010] -------N---- * SIMD simd8 float initN REG NA $180 Interval 14: float RefPositions {} physReg:NA Preferences=[allFloat] SIMD BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> BB01 regmask=[allFloat] minReg=1 last> SIMD BB01 regmask=[allFloat] minReg=1 last> Interval 15: simd8 RefPositions {} physReg:NA Preferences=[allFloat] SIMD BB01 regmask=[allFloat] minReg=1> DefList: { N011.t10. SIMD } N013 ( 7, 9) [000012] DA--G------- * STORE_LCL_VAR simd8 V04 tmp1 d:2 NA REG NA BB01 regmask=[allFloat] minReg=1 last> Assigning related to STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1 last> DefList: { } N015 (???,???) [000155] ------------ * IL_OFFSET void IL offset: 0xf REG NA DefList: { } N017 ( 1, 1) [000015] ------------ * CNS_DBL float 1.0000000000000000 REG NA $82 Interval 16: float RefPositions {} physReg:NA Preferences=[allFloat] CNS_DBL BB01 regmask=[allFloat] minReg=1> DefList: { N017.t15. CNS_DBL } N019 ( 1, 2) [000144] ------------ * LCL_VAR float V19 cse0 u:1 NA (last use) REG NA $81 DefList: { N017.t15. CNS_DBL } N021 ( 4, 5) [000019] -------N---- * SIMD simd8 float initN REG NA $182 Interval 17: float RefPositions {} physReg:NA Preferences=[allFloat] SIMD BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> SIMD BB01 regmask=[allFloat] minReg=1 last> Interval 18: simd8 RefPositions {} physReg:NA Preferences=[allFloat] SIMD BB01 regmask=[allFloat] minReg=1> DefList: { N021.t19. SIMD } N023 ( 8, 8) [000021] DA--G------- * STORE_LCL_VAR simd8 V01 loc0 d:2 NA REG NA BB01 regmask=[allFloat] minReg=1 last> Assigning related to STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1 last> DefList: { } N025 (???,???) [000156] ------------ * IL_OFFSET void IL offset: 0x20 REG NA DefList: { } N027 ( 1, 1) [000009] -------N---- * LCL_VAR simd8 V04 tmp1 u:2 NA (last use) REG NA $180 DefList: { } N029 ( 5, 4) [000072] DA---------- * STORE_LCL_VAR simd8 (P) V06 tmp3 NA * float V06.X (offs=0x00) -> V15 tmp12 * float V06.Y (offs=0x04) -> V16 tmp13 REG NA LCL_VAR BB01 regmask=[allFloat] minReg=1 last> DefList: { } N031 (???,???) [000157] ------------ * IL_OFFSET void IL offset: 0x20 REG NA DefList: { } N033 ( 3, 2) [000022] -------N---- * LCL_VAR simd8 V01 loc0 u:2 NA (last use) REG NA $182 DefList: { } N035 ( 7, 5) [000075] DA---------- * STORE_LCL_VAR simd8 (P) V07 tmp4 NA * float V07.X (offs=0x00) -> V17 tmp14 * float V07.Y (offs=0x04) -> V18 tmp15 REG NA LCL_VAR BB01 regmask=[allFloat] minReg=1 last> DefList: { } N037 (???,???) [000158] ------------ * IL_OFFSET void IL offset: 0x20 REG NA DefList: { } N039 ( 3, 2) [000061] -------N---- * LCL_VAR simd8 (P) V06 tmp3 NA * float V06.X (offs=0x00) -> V15 tmp12 * float V06.Y (offs=0x04) -> V16 tmp13 REG NA $184 Interval 19: simd8 RefPositions {} physReg:NA Preferences=[allFloat] LCL_VAR BB01 regmask=[allFloat] minReg=1> DefList: { N039.t61. LCL_VAR } N041 ( 3, 3) [000089] DA---------- * STORE_LCL_VAR simd8 V08 tmp5 d:2 NA REG NA BB01 regmask=[allFloat] minReg=1 last> Assigning related to STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1 last> DefList: { } N043 (???,???) [000159] ------------ * IL_OFFSET void IL offset: 0x20 REG NA DefList: { } N045 ( 3, 2) [000062] -------N---- * LCL_VAR simd8 (P) V07 tmp4 NA * float V07.X (offs=0x00) -> V17 tmp14 * float V07.Y (offs=0x04) -> V18 tmp15 REG NA $186 Interval 20: simd8 RefPositions {} physReg:NA Preferences=[allFloat] LCL_VAR BB01 regmask=[allFloat] minReg=1> DefList: { N045.t62. LCL_VAR } N047 ( 3, 3) [000092] DA---------- * STORE_LCL_VAR simd8 V09 tmp6 d:2 NA REG NA BB01 regmask=[allFloat] minReg=1 last> Assigning related to STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1 last> DefList: { } N049 (???,???) [000160] ------------ * IL_OFFSET void IL offset: 0x20 REG NA DefList: { } N051 ( 1, 1) [000077] ------------ * LCL_VAR simd8 V08 tmp5 u:2 NA (last use) REG NA $184 DefList: { } N053 ( 1, 1) [000078] ------------ * LCL_VAR simd8 V09 tmp6 u:2 NA (last use) REG NA $186 DefList: { } N055 ( 3, 3) [000079] ------------ * HWINTRINSIC simd8 float Subtract REG NA $1c0 LCL_VAR BB01 regmask=[allFloat] minReg=1 last> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> Interval 21: simd8 RefPositions {} physReg:NA Preferences=[allFloat] HWINTRINSIC BB01 regmask=[allFloat] minReg=1> DefList: { N055.t79. HWINTRINSIC } N057 ( 3, 3) [000082] DA---------- * STORE_LCL_VAR simd8 V10 tmp7 d:2 NA REG NA BB01 regmask=[allFloat] minReg=1 last> Assigning related to STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1 last> DefList: { } N059 ( 1, 1) [000095] -------N---- * LCL_VAR simd8 V10 tmp7 u:2 NA REG NA $1c0 DefList: { } N061 ( 1, 1) [000098] -------N---- * LCL_VAR simd8 V10 tmp7 u:2 NA (last use) REG NA $1c0 DefList: { } N063 (???,???) [000165] -c---------- * CNS_INT int 49 REG NA Contained DefList: { } N065 (???,???) [000169] ------------ * HWINTRINSIC simd8 float DotProduct REG NA LCL_VAR BB01 regmask=[allFloat] minReg=1 last> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> Interval 22: simd8 RefPositions {} physReg:NA Preferences=[allFloat] HWINTRINSIC BB01 regmask=[allFloat] minReg=1> DefList: { N065.t169. HWINTRINSIC } N067 ( 3, 3) [000100] ------------ * HWINTRINSIC float float ToScalar REG NA $144 BB01 regmask=[allFloat] minReg=1 last> Interval 23: float RefPositions {} physReg:NA Preferences=[allFloat] HWINTRINSIC BB01 regmask=[allFloat] minReg=1> Assigning related to DefList: { N067.t100. HWINTRINSIC } N069 ( 6, 7) [000069] ------------ * INTRINSIC float sqrt REG NA $240 BB01 regmask=[allFloat] minReg=1 last> Interval 24: float RefPositions {} physReg:NA Preferences=[allFloat] INTRINSIC BB01 regmask=[allFloat] minReg=1> Assigning related to DefList: { N069.t69. INTRINSIC } N071 (???,???) [000170] ------------ * PUTARG_REG float REG mm0 BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last fixed> Interval 25: float RefPositions {} physReg:NA Preferences=[allFloat] BB01 regmask=[mm0] minReg=1> PUTARG_REG BB01 regmask=[mm0] minReg=1 fixed> DefList: { N071.t170. PUTARG_REG } N073 ( 20, 13) [000029] --CXG------- * CALL void Console.WriteLine REG NA $VN.Void BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last fixed> BB01 regmask=[rax] minReg=1> BB01 regmask=[rcx] minReg=1> BB01 regmask=[rdx] minReg=1> BB01 regmask=[r8] minReg=1> BB01 regmask=[r9] minReg=1> BB01 regmask=[r10] minReg=1> BB01 regmask=[r11] minReg=1> BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm1] minReg=1> BB01 regmask=[mm2] minReg=1> BB01 regmask=[mm3] minReg=1> BB01 regmask=[mm4] minReg=1> BB01 regmask=[mm5] minReg=1> DefList: { } N075 ( 3, 4) [000030] ------------ * CNS_DBL float -2.0000000000000000 REG NA $83 Interval 26: float RefPositions {} physReg:NA Preferences=[allFloat] CNS_DBL BB01 regmask=[allFloat] minReg=1> DefList: { N075.t30. CNS_DBL } N077 ( 3, 4) [000151] DA---------- * STORE_LCL_VAR float V21 cse2 d:1 NA REG NA BB01 regmask=[allFloat] minReg=1 last> Assigning related to STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1 last> DefList: { } N079 ( 1, 2) [000152] ------------ * LCL_VAR float V21 cse2 u:1 NA REG NA $83 DefList: { } N081 ( 3, 4) [000031] ------------ * CNS_DBL float 2.0000000000000000 REG NA $84 Interval 27: float RefPositions {} physReg:NA Preferences=[allFloat] CNS_DBL BB01 regmask=[allFloat] minReg=1> DefList: { N081.t31. CNS_DBL } N083 ( 3, 4) [000146] DA---------- * STORE_LCL_VAR float V20 cse1 d:1 NA REG NA BB01 regmask=[allFloat] minReg=1 last> Assigning related to STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1 last> DefList: { } N085 ( 1, 2) [000147] ------------ * LCL_VAR float V20 cse1 u:1 NA REG NA $84 DefList: { } N087 ( 10, 14) [000040] -------N---- * SIMD simd8 float initN REG NA $189 Interval 28: float RefPositions {} physReg:NA Preferences=[allFloat] SIMD BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> SIMD BB01 regmask=[allFloat] minReg=1 last> Interval 29: simd8 RefPositions {} physReg:NA Preferences=[allFloat] SIMD BB01 regmask=[allFloat] minReg=1> DefList: { N087.t40. SIMD } N089 ( 10, 14) [000042] DA--G------- * STORE_LCL_VAR simd8 V05 tmp2 d:2 NA REG NA BB01 regmask=[allFloat] minReg=1 last> Assigning related to STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1 last> DefList: { } N091 (???,???) [000161] ------------ * IL_OFFSET void IL offset: 0x3a REG NA DefList: { } N093 ( 1, 2) [000149] ------------ * LCL_VAR float V20 cse1 u:1 NA (last use) REG NA $84 DefList: { } N095 ( 1, 2) [000154] ------------ * LCL_VAR float V21 cse2 u:1 NA (last use) REG NA $83 DefList: { } N097 ( 4, 6) [000049] -------N---- * SIMD simd8 float initN REG NA $18b Interval 30: float RefPositions {} physReg:NA Preferences=[allFloat] SIMD BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> SIMD BB01 regmask=[allFloat] minReg=1 last> Interval 31: simd8 RefPositions {} physReg:NA Preferences=[allFloat] SIMD BB01 regmask=[allFloat] minReg=1> DefList: { N097.t49. SIMD } N099 ( 4, 6) [000051] DA--G------- * STORE_LCL_VAR simd8 V02 loc1 d:2 NA REG NA BB01 regmask=[allFloat] minReg=1 last> Assigning related to STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1 last> DefList: { } N101 (???,???) [000162] ------------ * IL_OFFSET void IL offset: 0x4b REG NA DefList: { } N103 ( 1, 1) [000102] ------------ * LCL_VAR simd8 V05 tmp2 u:2 NA (last use) REG NA $189 DefList: { } N105 ( 1, 1) [000103] ------------ * LCL_VAR simd8 V02 loc1 u:2 NA (last use) REG NA $18b DefList: { } N107 ( 3, 3) [000104] ------------ * HWINTRINSIC simd8 float Subtract REG NA $1c1 LCL_VAR BB01 regmask=[allFloat] minReg=1 last> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> Interval 32: simd8 RefPositions {} physReg:NA Preferences=[allFloat] HWINTRINSIC BB01 regmask=[allFloat] minReg=1> DefList: { N107.t104. HWINTRINSIC } N109 ( 3, 3) [000107] DA---------- * STORE_LCL_VAR simd8 V13 tmp10 d:2 NA REG NA BB01 regmask=[allFloat] minReg=1 last> Assigning related to STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1 last> DefList: { } N111 (???,???) [000163] ------------ * IL_OFFSET void IL offset: 0x4b REG NA DefList: { } N113 ( 1, 1) [000129] -------N---- * LCL_VAR simd8 V13 tmp10 u:2 NA REG NA $1c1 DefList: { } N115 ( 1, 1) [000132] -------N---- * LCL_VAR simd8 V13 tmp10 u:2 NA (last use) REG NA $1c1 DefList: { } N117 (???,???) [000171] -c---------- * CNS_INT int 49 REG NA Contained DefList: { } N119 (???,???) [000175] ------------ * HWINTRINSIC simd8 float DotProduct REG NA LCL_VAR BB01 regmask=[allFloat] minReg=1 last> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> Interval 33: simd8 RefPositions {} physReg:NA Preferences=[allFloat] HWINTRINSIC BB01 regmask=[allFloat] minReg=1> DefList: { N119.t175. HWINTRINSIC } N121 ( 3, 3) [000134] ------------ * HWINTRINSIC float float ToScalar REG NA $149 BB01 regmask=[allFloat] minReg=1 last> Interval 34: float RefPositions {} physReg:NA Preferences=[allFloat] HWINTRINSIC BB01 regmask=[allFloat] minReg=1> Assigning related to DefList: { N121.t134. HWINTRINSIC } N123 ( 7, 8) [000124] DA---------- * STORE_LCL_VAR float V14 tmp11 d:2 NA REG NA BB01 regmask=[allFloat] minReg=1 last> Assigning related to STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1 last> DefList: { } N125 ( 3, 4) [000125] ------------ * LCL_VAR float V14 tmp11 u:2 NA (last use) REG NA $149 DefList: { } N127 ( 6, 8) [000126] ------------ * INTRINSIC float sqrt REG NA $241 LCL_VAR BB01 regmask=[allFloat] minReg=1 last> Interval 35: float RefPositions {} physReg:NA Preferences=[allFloat] INTRINSIC BB01 regmask=[allFloat] minReg=1> Assigning related to DefList: { N127.t126. INTRINSIC } N129 (???,???) [000176] ------------ * PUTARG_REG float REG mm0 BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last fixed> Interval 36: float RefPositions {} physReg:NA Preferences=[allFloat] BB01 regmask=[mm0] minReg=1> PUTARG_REG BB01 regmask=[mm0] minReg=1 fixed> DefList: { N129.t176. PUTARG_REG } N131 ( 20, 14) [000059] --CXG------- * CALL void Console.WriteLine REG NA $VN.Void BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last fixed> BB01 regmask=[rax] minReg=1> BB01 regmask=[rcx] minReg=1> BB01 regmask=[rdx] minReg=1> BB01 regmask=[r8] minReg=1> BB01 regmask=[r9] minReg=1> BB01 regmask=[r10] minReg=1> BB01 regmask=[r11] minReg=1> BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm1] minReg=1> BB01 regmask=[mm2] minReg=1> BB01 regmask=[mm3] minReg=1> BB01 regmask=[mm4] minReg=1> BB01 regmask=[mm5] minReg=1> DefList: { } N133 (???,???) [000164] ------------ * IL_OFFSET void IL offset: 0x56 REG NA DefList: { } N135 ( 0, 0) [000060] ------------ * RETURN void REG NA $2c0 CHECKING LAST USES for BB01, liveout={} ============================== use: {} def: {V01 V02 V04 V05 V08 V09 V10 V13 V14 V15 V16 V17 V18 V19 V20 V21} Linear scan intervals BEFORE VALIDATING INTERVALS: Interval 0: (V01) simd8 RefPositions {#19@24 #21@35} physReg:NA Preferences=[allFloat] Interval 1: (V02) simd8 RefPositions {#78@100 #80@107} physReg:NA Preferences=[allFloat] Interval 2: (V04) simd8 RefPositions {#11@14 #20@29} physReg:NA Preferences=[allFloat] Interval 3: (V05) simd8 RefPositions {#71@90 #79@107} physReg:NA Preferences=[allFloat] Interval 4: (V08) simd8 RefPositions {#24@42 #28@55} physReg:NA Preferences=[allFloat] Interval 5: (V09) simd8 RefPositions {#27@48 #29@55} physReg:NA Preferences=[allFloat] Interval 6: (V10) simd8 RefPositions {#32@58 #33@65 #34@65} physReg:NA Preferences=[allFloat] Interval 7: (V13) simd8 RefPositions {#83@110 #84@119 #85@119} physReg:NA Preferences=[allFloat] Interval 8: (V14) float RefPositions {#90@124 #91@127} physReg:NA Preferences=[allFloat] RelatedInterval Interval 9: (V19) float RefPositions {#3@6 #6@11 #15@21} physReg:NA Preferences=[allFloat] Interval 10: (V20) float RefPositions {#64@84 #67@87 #73@97} physReg:NA Preferences=[allFloat] Interval 11: (V21) float RefPositions {#61@78 #66@87 #74@97} physReg:NA Preferences=[allFloat] Interval 12: float (constant) RefPositions {#1@4 #2@5} physReg:NA Preferences=[allFloat] RelatedInterval Interval 13: float (constant) RefPositions {#4@10 #7@11} physReg:NA Preferences=[allFloat] Interval 14: float (INTERNAL) RefPositions {#5@11 #8@11} physReg:NA Preferences=[allFloat] Interval 15: simd8 RefPositions {#9@12 #10@13} physReg:NA Preferences=[allFloat] RelatedInterval Interval 16: float (constant) RefPositions {#12@18 #14@21} physReg:NA Preferences=[allFloat] Interval 17: float (INTERNAL) RefPositions {#13@21 #16@21} physReg:NA Preferences=[allFloat] Interval 18: simd8 RefPositions {#17@22 #18@23} physReg:NA Preferences=[allFloat] RelatedInterval Interval 19: simd8 RefPositions {#22@40 #23@41} physReg:NA Preferences=[allFloat] RelatedInterval Interval 20: simd8 RefPositions {#25@46 #26@47} physReg:NA Preferences=[allFloat] RelatedInterval Interval 21: simd8 RefPositions {#30@56 #31@57} physReg:NA Preferences=[allFloat] RelatedInterval Interval 22: simd8 RefPositions {#35@66 #36@67} physReg:NA Preferences=[allFloat] RelatedInterval Interval 23: float RefPositions {#37@68 #38@69} physReg:NA Preferences=[allFloat] RelatedInterval Interval 24: float RefPositions {#39@70 #41@71} physReg:NA Preferences=[mm0] Interval 25: float RefPositions {#43@72 #45@73} physReg:NA Preferences=[mm0] Interval 26: float (constant) RefPositions {#59@76 #60@77} physReg:NA Preferences=[allFloat] RelatedInterval Interval 27: float (constant) RefPositions {#62@82 #63@83} physReg:NA Preferences=[allFloat] RelatedInterval Interval 28: float (INTERNAL) RefPositions {#65@87 #68@87} physReg:NA Preferences=[allFloat] Interval 29: simd8 RefPositions {#69@88 #70@89} physReg:NA Preferences=[allFloat] RelatedInterval Interval 30: float (INTERNAL) RefPositions {#72@97 #75@97} physReg:NA Preferences=[allFloat] Interval 31: simd8 RefPositions {#76@98 #77@99} physReg:NA Preferences=[allFloat] RelatedInterval Interval 32: simd8 RefPositions {#81@108 #82@109} physReg:NA Preferences=[allFloat] RelatedInterval Interval 33: simd8 RefPositions {#86@120 #87@121} physReg:NA Preferences=[allFloat] RelatedInterval Interval 34: float RefPositions {#88@122 #89@123} physReg:NA Preferences=[allFloat] RelatedInterval Interval 35: float RefPositions {#92@128 #94@129} physReg:NA Preferences=[mm0] Interval 36: float RefPositions {#96@130 #98@131} physReg:NA Preferences=[mm0] ------------ REFPOSITIONS BEFORE VALIDATING INTERVALS: ------------ CNS_DBL BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> CNS_DBL BB01 regmask=[allFloat] minReg=1> SIMD BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> SIMD BB01 regmask=[allFloat] minReg=1 last> SIMD BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> CNS_DBL BB01 regmask=[allFloat] minReg=1> SIMD BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> SIMD BB01 regmask=[allFloat] minReg=1 last> SIMD BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> LCL_VAR BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> HWINTRINSIC BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> HWINTRINSIC BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> HWINTRINSIC BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last regOptional> INTRINSIC BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last fixed> BB01 regmask=[mm0] minReg=1> PUTARG_REG BB01 regmask=[mm0] minReg=1 fixed> BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last fixed> BB01 regmask=[rax] minReg=1 last> BB01 regmask=[rcx] minReg=1 last> BB01 regmask=[rdx] minReg=1 last> BB01 regmask=[r8] minReg=1 last> BB01 regmask=[r9] minReg=1 last> BB01 regmask=[r10] minReg=1 last> BB01 regmask=[r11] minReg=1 last> BB01 regmask=[mm0] minReg=1 last> BB01 regmask=[mm1] minReg=1 last> BB01 regmask=[mm2] minReg=1 last> BB01 regmask=[mm3] minReg=1 last> BB01 regmask=[mm4] minReg=1 last> BB01 regmask=[mm5] minReg=1 last> CNS_DBL BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> CNS_DBL BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> SIMD BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1> SIMD BB01 regmask=[allFloat] minReg=1 last> SIMD BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> SIMD BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> SIMD BB01 regmask=[allFloat] minReg=1 last> SIMD BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> HWINTRINSIC BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> HWINTRINSIC BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> HWINTRINSIC BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last regOptional> INTRINSIC BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last fixed> BB01 regmask=[mm0] minReg=1> PUTARG_REG BB01 regmask=[mm0] minReg=1 fixed> BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last fixed> BB01 regmask=[rax] minReg=1 last> BB01 regmask=[rcx] minReg=1 last> BB01 regmask=[rdx] minReg=1 last> BB01 regmask=[r8] minReg=1 last> BB01 regmask=[r9] minReg=1 last> BB01 regmask=[r10] minReg=1 last> BB01 regmask=[r11] minReg=1 last> BB01 regmask=[mm0] minReg=1 last> BB01 regmask=[mm1] minReg=1 last> BB01 regmask=[mm2] minReg=1 last> BB01 regmask=[mm3] minReg=1 last> BB01 regmask=[mm4] minReg=1 last> BB01 regmask=[mm5] minReg=1 last> ----------------- STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> ----------------- STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> ----------------- STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> ----------------- STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> ----------------- STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> ----------------- STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> ----------------- STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> ----------------- STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> ----------------- STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> ----------------- STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> ----------------- STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> ----------------- STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last regOptional> TUPLE STYLE DUMP WITH REF POSITIONS Incoming Parameters: BB01 [000..057) (return), preds={} succs={} ===== N003. CNS_DBL -1.0000000000000000 Def:(#1) Pref: N005. V19(L9) Use:(#2) * Def:(#3) N007. V19(L9) N009. CNS_DBL 1.0000000000000000 Def:(#4) N011. SIMD Def:(#5) Use:(#6) Use:(#7) * Use:(#8) * Def:(#9) Pref: N013. V04(L2) Use:(#10) * Def:(#11) N015. IL_OFFSET IL offset: 0xf N017. CNS_DBL 1.0000000000000000 Def:(#12) N019. V19(L9) N021. SIMD Def:(#13) Use:(#14) * Use:(#15) * Use:(#16) * Def:(#17) Pref: N023. V01(L0) Use:(#18) * Def:(#19) N025. IL_OFFSET IL offset: 0x20 N027. V04(L2) N029. V06 MEM Use:(#20) * N031. IL_OFFSET IL offset: 0x20 N033. V01(L0) N035. V07 MEM Use:(#21) * N037. IL_OFFSET IL offset: 0x20 N039. V06 MEM Def:(#22) Pref: N041. V08(L4) Use:(#23) * Def:(#24) N043. IL_OFFSET IL offset: 0x20 N045. V07 MEM Def:(#25) Pref: N047. V09(L5) Use:(#26) * Def:(#27) N049. IL_OFFSET IL offset: 0x20 N051. V08(L4) N053. V09(L5) N055. HWINTRINSIC Use:(#28) * Use:(#29) * Def:(#30) Pref: N057. V10(L6) Use:(#31) * Def:(#32) N059. V10(L6) N061. V10(L6) N063. CNS_INT 49 N065. HWINTRINSIC Use:(#33) Use:(#34) * Def:(#35) Pref: N067. HWINTRINSIC Use:(#36) * Def:(#37) Pref: N069. INTRINSIC Use:(#38) * Def:(#39) N071. PUTARG_REG Use:(#41) Fixed:mm0(#40) * Def:(#43) mm0 N073. CALL Use:(#45) Fixed:mm0(#44) * Kill: rax rcx rdx r8 r9 r10 r11 mm0 mm1 mm2 mm3 mm4 mm5 N075. CNS_DBL -2.0000000000000000 Def:(#59) Pref: N077. V21(L11) Use:(#60) * Def:(#61) N079. V21(L11) N081. CNS_DBL 2.0000000000000000 Def:(#62) Pref: N083. V20(L10) Use:(#63) * Def:(#64) N085. V20(L10) N087. SIMD Def:(#65) Use:(#66) Use:(#67) Use:(#68) * Def:(#69) Pref: N089. V05(L3) Use:(#70) * Def:(#71) N091. IL_OFFSET IL offset: 0x3a N093. V20(L10) N095. V21(L11) N097. SIMD Def:(#72) Use:(#73) * Use:(#74) * Use:(#75) * Def:(#76) Pref: N099. V02(L1) Use:(#77) * Def:(#78) N101. IL_OFFSET IL offset: 0x4b N103. V05(L3) N105. V02(L1) N107. HWINTRINSIC Use:(#79) * Use:(#80) * Def:(#81) Pref: N109. V13(L7) Use:(#82) * Def:(#83) N111. IL_OFFSET IL offset: 0x4b N113. V13(L7) N115. V13(L7) N117. CNS_INT 49 N119. HWINTRINSIC Use:(#84) Use:(#85) * Def:(#86) Pref: N121. HWINTRINSIC Use:(#87) * Def:(#88) Pref: N123. V14(L8) Use:(#89) * Def:(#90) Pref: N125. V14(L8) N127. INTRINSIC Use:(#91) * Def:(#92) N129. PUTARG_REG Use:(#94) Fixed:mm0(#93) * Def:(#96) mm0 N131. CALL Use:(#98) Fixed:mm0(#97) * Kill: rax rcx rdx r8 r9 r10 r11 mm0 mm1 mm2 mm3 mm4 mm5 N133. IL_OFFSET IL offset: 0x56 N135. RETURN Linear scan intervals after buildIntervals: Interval 0: (V01) simd8 RefPositions {#19@24 #21@35} physReg:NA Preferences=[allFloat] Interval 1: (V02) simd8 RefPositions {#78@100 #80@107} physReg:NA Preferences=[allFloat] Interval 2: (V04) simd8 RefPositions {#11@14 #20@29} physReg:NA Preferences=[allFloat] Interval 3: (V05) simd8 RefPositions {#71@90 #79@107} physReg:NA Preferences=[allFloat] Interval 4: (V08) simd8 RefPositions {#24@42 #28@55} physReg:NA Preferences=[allFloat] Interval 5: (V09) simd8 RefPositions {#27@48 #29@55} physReg:NA Preferences=[allFloat] Interval 6: (V10) simd8 RefPositions {#32@58 #33@65 #34@65} physReg:NA Preferences=[allFloat] Interval 7: (V13) simd8 RefPositions {#83@110 #84@119 #85@119} physReg:NA Preferences=[allFloat] Interval 8: (V14) float RefPositions {#90@124 #91@127} physReg:NA Preferences=[allFloat] RelatedInterval Interval 9: (V19) float RefPositions {#3@6 #6@11 #15@21} physReg:NA Preferences=[allFloat] Interval 10: (V20) float RefPositions {#64@84 #67@87 #73@97} physReg:NA Preferences=[allFloat] Interval 11: (V21) float RefPositions {#61@78 #66@87 #74@97} physReg:NA Preferences=[allFloat] Interval 12: float (constant) RefPositions {#1@4 #2@5} physReg:NA Preferences=[allFloat] RelatedInterval Interval 13: float (constant) RefPositions {#4@10 #7@11} physReg:NA Preferences=[allFloat] Interval 14: float (INTERNAL) RefPositions {#5@11 #8@11} physReg:NA Preferences=[allFloat] Interval 15: simd8 RefPositions {#9@12 #10@13} physReg:NA Preferences=[allFloat] RelatedInterval Interval 16: float (constant) RefPositions {#12@18 #14@21} physReg:NA Preferences=[allFloat] Interval 17: float (INTERNAL) RefPositions {#13@21 #16@21} physReg:NA Preferences=[allFloat] Interval 18: simd8 RefPositions {#17@22 #18@23} physReg:NA Preferences=[allFloat] RelatedInterval Interval 19: simd8 RefPositions {#22@40 #23@41} physReg:NA Preferences=[allFloat] RelatedInterval Interval 20: simd8 RefPositions {#25@46 #26@47} physReg:NA Preferences=[allFloat] RelatedInterval Interval 21: simd8 RefPositions {#30@56 #31@57} physReg:NA Preferences=[allFloat] RelatedInterval Interval 22: simd8 RefPositions {#35@66 #36@67} physReg:NA Preferences=[allFloat] RelatedInterval Interval 23: float RefPositions {#37@68 #38@69} physReg:NA Preferences=[allFloat] RelatedInterval Interval 24: float RefPositions {#39@70 #41@71} physReg:NA Preferences=[mm0] Interval 25: float RefPositions {#43@72 #45@73} physReg:NA Preferences=[mm0] Interval 26: float (constant) RefPositions {#59@76 #60@77} physReg:NA Preferences=[allFloat] RelatedInterval Interval 27: float (constant) RefPositions {#62@82 #63@83} physReg:NA Preferences=[allFloat] RelatedInterval Interval 28: float (INTERNAL) RefPositions {#65@87 #68@87} physReg:NA Preferences=[allFloat] Interval 29: simd8 RefPositions {#69@88 #70@89} physReg:NA Preferences=[allFloat] RelatedInterval Interval 30: float (INTERNAL) RefPositions {#72@97 #75@97} physReg:NA Preferences=[allFloat] Interval 31: simd8 RefPositions {#76@98 #77@99} physReg:NA Preferences=[allFloat] RelatedInterval Interval 32: simd8 RefPositions {#81@108 #82@109} physReg:NA Preferences=[allFloat] RelatedInterval Interval 33: simd8 RefPositions {#86@120 #87@121} physReg:NA Preferences=[allFloat] RelatedInterval Interval 34: float RefPositions {#88@122 #89@123} physReg:NA Preferences=[allFloat] RelatedInterval Interval 35: float RefPositions {#92@128 #94@129} physReg:NA Preferences=[mm0] Interval 36: float RefPositions {#96@130 #98@131} physReg:NA Preferences=[mm0] *************** In LinearScan::allocateRegisters() Linear scan intervals before allocateRegisters: Interval 0: (V01) simd8 RefPositions {#19@24 #21@35} physReg:NA Preferences=[allFloat] Interval 1: (V02) simd8 RefPositions {#78@100 #80@107} physReg:NA Preferences=[allFloat] Interval 2: (V04) simd8 RefPositions {#11@14 #20@29} physReg:NA Preferences=[allFloat] Interval 3: (V05) simd8 RefPositions {#71@90 #79@107} physReg:NA Preferences=[allFloat] Interval 4: (V08) simd8 RefPositions {#24@42 #28@55} physReg:NA Preferences=[allFloat] Interval 5: (V09) simd8 RefPositions {#27@48 #29@55} physReg:NA Preferences=[allFloat] Interval 6: (V10) simd8 RefPositions {#32@58 #33@65 #34@65} physReg:NA Preferences=[allFloat] Interval 7: (V13) simd8 RefPositions {#83@110 #84@119 #85@119} physReg:NA Preferences=[allFloat] Interval 8: (V14) float RefPositions {#90@124 #91@127} physReg:NA Preferences=[allFloat] RelatedInterval Interval 9: (V19) float RefPositions {#3@6 #6@11 #15@21} physReg:NA Preferences=[allFloat] Interval 10: (V20) float RefPositions {#64@84 #67@87 #73@97} physReg:NA Preferences=[allFloat] Interval 11: (V21) float RefPositions {#61@78 #66@87 #74@97} physReg:NA Preferences=[allFloat] Interval 12: float (constant) RefPositions {#1@4 #2@5} physReg:NA Preferences=[allFloat] RelatedInterval Interval 13: float (constant) RefPositions {#4@10 #7@11} physReg:NA Preferences=[allFloat] Interval 14: float (INTERNAL) RefPositions {#5@11 #8@11} physReg:NA Preferences=[allFloat] Interval 15: simd8 RefPositions {#9@12 #10@13} physReg:NA Preferences=[allFloat] RelatedInterval Interval 16: float (constant) RefPositions {#12@18 #14@21} physReg:NA Preferences=[allFloat] Interval 17: float (INTERNAL) RefPositions {#13@21 #16@21} physReg:NA Preferences=[allFloat] Interval 18: simd8 RefPositions {#17@22 #18@23} physReg:NA Preferences=[allFloat] RelatedInterval Interval 19: simd8 RefPositions {#22@40 #23@41} physReg:NA Preferences=[allFloat] RelatedInterval Interval 20: simd8 RefPositions {#25@46 #26@47} physReg:NA Preferences=[allFloat] RelatedInterval Interval 21: simd8 RefPositions {#30@56 #31@57} physReg:NA Preferences=[allFloat] RelatedInterval Interval 22: simd8 RefPositions {#35@66 #36@67} physReg:NA Preferences=[allFloat] RelatedInterval Interval 23: float RefPositions {#37@68 #38@69} physReg:NA Preferences=[allFloat] RelatedInterval Interval 24: float RefPositions {#39@70 #41@71} physReg:NA Preferences=[mm0] Interval 25: float RefPositions {#43@72 #45@73} physReg:NA Preferences=[mm0] Interval 26: float (constant) RefPositions {#59@76 #60@77} physReg:NA Preferences=[allFloat] RelatedInterval Interval 27: float (constant) RefPositions {#62@82 #63@83} physReg:NA Preferences=[allFloat] RelatedInterval Interval 28: float (INTERNAL) RefPositions {#65@87 #68@87} physReg:NA Preferences=[allFloat] Interval 29: simd8 RefPositions {#69@88 #70@89} physReg:NA Preferences=[allFloat] RelatedInterval Interval 30: float (INTERNAL) RefPositions {#72@97 #75@97} physReg:NA Preferences=[allFloat] Interval 31: simd8 RefPositions {#76@98 #77@99} physReg:NA Preferences=[allFloat] RelatedInterval Interval 32: simd8 RefPositions {#81@108 #82@109} physReg:NA Preferences=[allFloat] RelatedInterval Interval 33: simd8 RefPositions {#86@120 #87@121} physReg:NA Preferences=[allFloat] RelatedInterval Interval 34: float RefPositions {#88@122 #89@123} physReg:NA Preferences=[allFloat] RelatedInterval Interval 35: float RefPositions {#92@128 #94@129} physReg:NA Preferences=[mm0] Interval 36: float RefPositions {#96@130 #98@131} physReg:NA Preferences=[mm0] ------------ REFPOSITIONS BEFORE ALLOCATION: ------------ CNS_DBL BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> CNS_DBL BB01 regmask=[allFloat] minReg=1> SIMD BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> SIMD BB01 regmask=[allFloat] minReg=1 last> SIMD BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> CNS_DBL BB01 regmask=[allFloat] minReg=1> SIMD BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> SIMD BB01 regmask=[allFloat] minReg=1 last> SIMD BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> LCL_VAR BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> HWINTRINSIC BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> HWINTRINSIC BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> HWINTRINSIC BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last regOptional> INTRINSIC BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last fixed> BB01 regmask=[mm0] minReg=1> PUTARG_REG BB01 regmask=[mm0] minReg=1 fixed> BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last fixed> BB01 regmask=[rax] minReg=1 last> BB01 regmask=[rcx] minReg=1 last> BB01 regmask=[rdx] minReg=1 last> BB01 regmask=[r8] minReg=1 last> BB01 regmask=[r9] minReg=1 last> BB01 regmask=[r10] minReg=1 last> BB01 regmask=[r11] minReg=1 last> BB01 regmask=[mm0] minReg=1 last> BB01 regmask=[mm1] minReg=1 last> BB01 regmask=[mm2] minReg=1 last> BB01 regmask=[mm3] minReg=1 last> BB01 regmask=[mm4] minReg=1 last> BB01 regmask=[mm5] minReg=1 last> CNS_DBL BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> CNS_DBL BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> SIMD BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1> SIMD BB01 regmask=[allFloat] minReg=1 last> SIMD BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> SIMD BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> SIMD BB01 regmask=[allFloat] minReg=1 last> SIMD BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> HWINTRINSIC BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> HWINTRINSIC BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> HWINTRINSIC BB01 regmask=[allFloat] minReg=1> BB01 regmask=[allFloat] minReg=1 last> STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last regOptional> INTRINSIC BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last fixed> BB01 regmask=[mm0] minReg=1> PUTARG_REG BB01 regmask=[mm0] minReg=1 fixed> BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last fixed> BB01 regmask=[rax] minReg=1 last> BB01 regmask=[rcx] minReg=1 last> BB01 regmask=[rdx] minReg=1 last> BB01 regmask=[r8] minReg=1 last> BB01 regmask=[r9] minReg=1 last> BB01 regmask=[r10] minReg=1 last> BB01 regmask=[r11] minReg=1 last> BB01 regmask=[mm0] minReg=1 last> BB01 regmask=[mm1] minReg=1 last> BB01 regmask=[mm2] minReg=1 last> BB01 regmask=[mm3] minReg=1 last> BB01 regmask=[mm4] minReg=1 last> BB01 regmask=[mm5] minReg=1 last> VAR REFPOSITIONS BEFORE ALLOCATION --- V00 --- V01 (Interval 0) STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> --- V02 (Interval 1) STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> --- V03 --- V04 (Interval 2) STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> --- V05 (Interval 3) STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> --- V06 --- V07 --- V08 (Interval 4) STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> --- V09 (Interval 5) STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> --- V10 (Interval 6) STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> --- V11 --- V12 --- V13 (Interval 7) STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> --- V14 (Interval 8) STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last regOptional> --- V15 --- V16 --- V17 --- V18 --- V19 (Interval 9) STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> --- V20 (Interval 10) STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> --- V21 (Interval 11) STORE_LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1> LCL_VAR BB01 regmask=[allFloat] minReg=1 last> Allocating Registers -------------------- The following table has one or more rows for each RefPosition that is handled during allocation. The first column provides the basic information about the RefPosition, with its type (e.g. Def, Use, Fixd) followed by a '*' if it is a last use, and a 'D' if it is delayRegFree, and then the action taken during allocation (e.g. Alloc a new register, or Keep an existing one). The subsequent columns show the Interval occupying each register, if any, followed by 'a' if it is active, a 'p' if it is a large vector that has been partially spilled, and 'i'if it is inactive. Columns are only printed up to the last modifed register, which may increase during allocation, in which case additional columns will appear. Registers which are not marked modified have ---- in their column. --------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ Loc RP# Name Type Action Reg |rax |rcx |rdx |rbx |rbp |rsi |rdi |r8 |r9 |mm0 |mm1 |mm2 |mm6 |mm7 | --------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ | | | | | | | | | | | | | | | 1.#0 BB1 PredBB0 | | | | | | | | | | | | | | | 4.#1 C12 Def Alloc mm0 | | | | | | | | | |C12a| | | | | 5.#2 C12 Use * Keep mm0 | | | | | | | | | |C12a| | | | | 6.#3 V19 Def Alloc mm0 | | | | | | | | | |V19a| | | | | 10.#4 C13 Def Alloc mm1 | | | | | | | | | |V19a|C13a| | | | 11.#5 I14 Def Alloc mm2 | | | | | | | | | |V19a|C13a|I14a| | | 11.#6 V19 Use Keep mm0 | | | | | | | | | |V19a|C13a|I14a| | | 11.#7 C13 Use * Keep mm1 | | | | | | | | | |V19a|C13a|I14a| | | 11.#8 I14 Use * Keep mm2 | | | | | | | | | |V19a|C13a|I14a| | | 12.#9 I15 Def Alloc mm1 | | | | | | | | | |V19a|I15a| | | | 13.#10 I15 Use * Keep mm1 | | | | | | | | | |V19a|I15a| | | | 14.#11 V4 Def Alloc mm1 | | | | | | | | | |V19a|V4 a| | | | 18.#12 C16 Def Alloc mm2 | | | | | | | | | |V19a|V4 a|C16a| | | --------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ Loc RP# Name Type Action Reg |rax |rcx |rdx |rbx |rbp |rsi |rdi |r8 |r9 |mm0 |mm1 |mm2 |mm3 |mm6 |mm7 | --------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ 21.#13 I17 Def Alloc mm3 | | | | | | | | | |V19a|V4 a|C16a|I17a| | | 21.#14 C16 Use * Keep mm2 | | | | | | | | | |V19a|V4 a|C16a|I17a| | | 21.#15 V19 Use * Keep mm0 | | | | | | | | | |V19a|V4 a|C16a|I17a| | | 21.#16 I17 Use * Keep mm3 | | | | | | | | | |V19a|V4 a|C16a|I17a| | | 22.#17 I18 Def Alloc mm0 | | | | | | | | | |I18a|V4 a|C16i| | | | 23.#18 I18 Use * Keep mm0 | | | | | | | | | |I18a|V4 a|C16i| | | | 24.#19 V1 Def Alloc mm0 | | | | | | | | | |V1 a|V4 a|C16i| | | | 29.#20 V4 Use * Keep mm1 | | | | | | | | | |V1 a|V4 a|C16i| | | | 35.#21 V1 Use * Keep mm0 | | | | | | | | | |V1 a| |C16i| | | | 40.#22 I19 Def Alloc mm0 | | | | | | | | | |I19a| |C16i| | | | 41.#23 I19 Use * Keep mm0 | | | | | | | | | |I19a| |C16i| | | | 42.#24 V8 Def Alloc mm0 | | | | | | | | | |V8 a| |C16i| | | | 46.#25 I20 Def Alloc mm1 | | | | | | | | | |V8 a|I20a|C16i| | | | 47.#26 I20 Use * Keep mm1 | | | | | | | | | |V8 a|I20a|C16i| | | | 48.#27 V9 Def Alloc mm1 | | | | | | | | | |V8 a|V9 a|C16i| | | | 55.#28 V8 Use * Keep mm0 | | | | | | | | | |V8 a|V9 a|C16i| | | | 55.#29 V9 Use * Keep mm1 | | | | | | | | | |V8 a|V9 a|C16i| | | | 56.#30 I21 Def Alloc mm0 | | | | | | | | | |I21a| |C16i| | | | 57.#31 I21 Use * Keep mm0 | | | | | | | | | |I21a| |C16i| | | | 58.#32 V10 Def Alloc mm0 | | | | | | | | | |V10a| |C16i| | | | 65.#33 V10 Use Keep mm0 | | | | | | | | | |V10a| |C16i| | | | 65.#34 V10 Use * Keep mm0 | | | | | | | | | |V10a| |C16i| | | | 66.#35 I22 Def Alloc mm0 | | | | | | | | | |I22a| |C16i| | | | 67.#36 I22 Use * Keep mm0 | | | | | | | | | |I22a| |C16i| | | | 68.#37 I23 Def Alloc mm0 | | | | | | | | | |I23a| |C16i| | | | 69.#38 I23 Use * Keep mm0 | | | | | | | | | |I23a| |C16i| | | | 70.#39 I24 Def Alloc mm0 | | | | | | | | | |I24a| |C16i| | | | 71.#40 mm0 Fixd Keep mm0 | | | | | | | | | |I24a| |C16i| | | | 71.#41 I24 Use * Keep mm0 | | | | | | | | | |I24a| |C16i| | | | 72.#42 mm0 Fixd Keep mm0 | | | | | | | | | | | |C16i| | | | 72.#43 I25 Def Alloc mm0 | | | | | | | | | |I25a| |C16i| | | | 73.#44 mm0 Fixd Keep mm0 | | | | | | | | | |I25a| |C16i| | | | 73.#45 I25 Use * Keep mm0 | | | | | | | | | |I25a| |C16i| | | | 74.#46 rax Kill Keep rax | | | | | | | | | | | |C16i| | | | 74.#47 rcx Kill Keep rcx | | | | | | | | | | | |C16i| | | | 74.#48 rdx Kill Keep rdx | | | | | | | | | | | |C16i| | | | 74.#49 r8 Kill Keep r8 | | | | | | | | | | | |C16i| | | | 74.#50 r9 Kill Keep r9 | | | | | | | | | | | |C16i| | | | 74.#51 r10 Kill Keep r10 | | | | | | | | | | | |C16i| | | | 74.#52 r11 Kill Keep r11 | | | | | | | | | | | |C16i| | | | 74.#53 mm0 Kill Keep mm0 | | | | | | | | | | | |C16i| | | | 74.#54 mm1 Kill Keep mm1 | | | | | | | | | | | |C16i| | | | 74.#55 mm2 Kill Keep mm2 | | | | | | | | | | | | | | | | 74.#56 mm3 Kill Keep mm3 | | | | | | | | | | | | | | | | 74.#57 mm4 Kill Keep mm4 | | | | | | | | | | | | | | | | 74.#58 mm5 Kill Keep mm5 | | | | | | | | | | | | | | | | 76.#59 C26 Def Alloc mm0 | | | | | | | | | |C26a| | | | | | 77.#60 C26 Use * Keep mm0 | | | | | | | | | |C26a| | | | | | 78.#61 V21 Def Alloc mm0 | | | | | | | | | |V21a| | | | | | 82.#62 C27 Def Alloc mm1 | | | | | | | | | |V21a|C27a| | | | | 83.#63 C27 Use * Keep mm1 | | | | | | | | | |V21a|C27a| | | | | --------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ Loc RP# Name Type Action Reg |rax |rcx |rdx |rbx |rbp |rsi |rdi |r8 |r9 |mm0 |mm1 |mm2 |mm3 |mm6 |mm7 | --------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ 84.#64 V20 Def Alloc mm1 | | | | | | | | | |V21a|V20a| | | | | 87.#65 I28 Def Alloc mm2 | | | | | | | | | |V21a|V20a|I28a| | | | 87.#66 V21 Use Keep mm0 | | | | | | | | | |V21a|V20a|I28a| | | | 87.#67 V20 Use Keep mm1 | | | | | | | | | |V21a|V20a|I28a| | | | 87.#68 I28 Use * Keep mm2 | | | | | | | | | |V21a|V20a|I28a| | | | 88.#69 I29 Def Alloc mm2 | | | | | | | | | |V21a|V20a|I29a| | | | 89.#70 I29 Use * Keep mm2 | | | | | | | | | |V21a|V20a|I29a| | | | 90.#71 V5 Def Alloc mm2 | | | | | | | | | |V21a|V20a|V5 a| | | | 97.#72 I30 Def Alloc mm3 | | | | | | | | | |V21a|V20a|V5 a|I30a| | | 97.#73 V20 Use * Keep mm1 | | | | | | | | | |V21a|V20a|V5 a|I30a| | | 97.#74 V21 Use * Keep mm0 | | | | | | | | | |V21a|V20a|V5 a|I30a| | | 97.#75 I30 Use * Keep mm3 | | | | | | | | | |V21a|V20a|V5 a|I30a| | | 98.#76 I31 Def Alloc mm0 | | | | | | | | | |I31a| |V5 a| | | | 99.#77 I31 Use * Keep mm0 | | | | | | | | | |I31a| |V5 a| | | | 100.#78 V2 Def Alloc mm0 | | | | | | | | | |V2 a| |V5 a| | | | 107.#79 V5 Use * Keep mm2 | | | | | | | | | |V2 a| |V5 a| | | | 107.#80 V2 Use * Keep mm0 | | | | | | | | | |V2 a| |V5 a| | | | 108.#81 I32 Def Alloc mm0 | | | | | | | | | |I32a| | | | | | 109.#82 I32 Use * Keep mm0 | | | | | | | | | |I32a| | | | | | 110.#83 V13 Def Alloc mm0 | | | | | | | | | |V13a| | | | | | 119.#84 V13 Use Keep mm0 | | | | | | | | | |V13a| | | | | | 119.#85 V13 Use * Keep mm0 | | | | | | | | | |V13a| | | | | | 120.#86 I33 Def Alloc mm0 | | | | | | | | | |I33a| | | | | | 121.#87 I33 Use * Keep mm0 | | | | | | | | | |I33a| | | | | | 122.#88 I34 Def Alloc mm0 | | | | | | | | | |I34a| | | | | | 123.#89 I34 Use * Keep mm0 | | | | | | | | | |I34a| | | | | | 124.#90 V14 Def Alloc mm0 | | | | | | | | | |V14a| | | | | | 127.#91 V14 Use * Keep mm0 | | | | | | | | | |V14a| | | | | | 128.#92 I35 Def Alloc mm0 | | | | | | | | | |I35a| | | | | | 129.#93 mm0 Fixd Keep mm0 | | | | | | | | | |I35a| | | | | | 129.#94 I35 Use * Keep mm0 | | | | | | | | | |I35a| | | | | | 130.#95 mm0 Fixd Keep mm0 | | | | | | | | | | | | | | | | 130.#96 I36 Def Alloc mm0 | | | | | | | | | |I36a| | | | | | 131.#97 mm0 Fixd Keep mm0 | | | | | | | | | |I36a| | | | | | 131.#98 I36 Use * Keep mm0 | | | | | | | | | |I36a| | | | | | 132.#99 rax Kill Keep rax | | | | | | | | | | | | | | | | 132.#100 rcx Kill Keep rcx | | | | | | | | | | | | | | | | 132.#101 rdx Kill Keep rdx | | | | | | | | | | | | | | | | 132.#102 r8 Kill Keep r8 | | | | | | | | | | | | | | | | 132.#103 r9 Kill Keep r9 | | | | | | | | | | | | | | | | 132.#104 r10 Kill Keep r10 | | | | | | | | | | | | | | | | 132.#105 r11 Kill Keep r11 | | | | | | | | | | | | | | | | 132.#106 mm0 Kill Keep mm0 | | | | | | | | | | | | | | | | 132.#107 mm1 Kill Keep mm1 | | | | | | | | | | | | | | | | 132.#108 mm2 Kill Keep mm2 | | | | | | | | | | | | | | | | 132.#109 mm3 Kill Keep mm3 | | | | | | | | | | | | | | | | 132.#110 mm4 Kill Keep mm4 | | | | | | | | | | | | | | | | 132.#111 mm5 Kill Keep mm5 | | | | | | | | | | | | | | | | ------------ REFPOSITIONS AFTER ALLOCATION: ------------ CNS_DBL BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last> STORE_LCL_VAR BB01 regmask=[mm0] minReg=1> CNS_DBL BB01 regmask=[mm1] minReg=1> SIMD BB01 regmask=[mm2] minReg=1> LCL_VAR BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm1] minReg=1 last> SIMD BB01 regmask=[mm2] minReg=1 last> SIMD BB01 regmask=[mm1] minReg=1> BB01 regmask=[mm1] minReg=1 last> STORE_LCL_VAR BB01 regmask=[mm1] minReg=1> CNS_DBL BB01 regmask=[mm2] minReg=1> SIMD BB01 regmask=[mm3] minReg=1> BB01 regmask=[mm2] minReg=1 last> LCL_VAR BB01 regmask=[mm0] minReg=1 last> SIMD BB01 regmask=[mm3] minReg=1 last> SIMD BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last> STORE_LCL_VAR BB01 regmask=[mm0] minReg=1> LCL_VAR BB01 regmask=[mm1] minReg=1 last> LCL_VAR BB01 regmask=[mm0] minReg=1 last> LCL_VAR BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last> STORE_LCL_VAR BB01 regmask=[mm0] minReg=1> LCL_VAR BB01 regmask=[mm1] minReg=1> BB01 regmask=[mm1] minReg=1 last> STORE_LCL_VAR BB01 regmask=[mm1] minReg=1> LCL_VAR BB01 regmask=[mm0] minReg=1 last> LCL_VAR BB01 regmask=[mm1] minReg=1 last> HWINTRINSIC BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last> STORE_LCL_VAR BB01 regmask=[mm0] minReg=1> LCL_VAR BB01 regmask=[mm0] minReg=1> LCL_VAR BB01 regmask=[mm0] minReg=1 last> HWINTRINSIC BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last> HWINTRINSIC BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last regOptional> INTRINSIC BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last fixed> BB01 regmask=[mm0] minReg=1> PUTARG_REG BB01 regmask=[mm0] minReg=1 fixed> BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last fixed> BB01 regmask=[rax] minReg=1 last> BB01 regmask=[rcx] minReg=1 last> BB01 regmask=[rdx] minReg=1 last> BB01 regmask=[r8] minReg=1 last> BB01 regmask=[r9] minReg=1 last> BB01 regmask=[r10] minReg=1 last> BB01 regmask=[r11] minReg=1 last> BB01 regmask=[mm0] minReg=1 last> BB01 regmask=[mm1] minReg=1 last> BB01 regmask=[mm2] minReg=1 last> BB01 regmask=[mm3] minReg=1 last> BB01 regmask=[mm4] minReg=1 last> BB01 regmask=[mm5] minReg=1 last> CNS_DBL BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last> STORE_LCL_VAR BB01 regmask=[mm0] minReg=1> CNS_DBL BB01 regmask=[mm1] minReg=1> BB01 regmask=[mm1] minReg=1 last> STORE_LCL_VAR BB01 regmask=[mm1] minReg=1> SIMD BB01 regmask=[mm2] minReg=1> LCL_VAR BB01 regmask=[mm0] minReg=1> LCL_VAR BB01 regmask=[mm1] minReg=1> SIMD BB01 regmask=[mm2] minReg=1 last> SIMD BB01 regmask=[mm2] minReg=1> BB01 regmask=[mm2] minReg=1 last> STORE_LCL_VAR BB01 regmask=[mm2] minReg=1> SIMD BB01 regmask=[mm3] minReg=1> LCL_VAR BB01 regmask=[mm1] minReg=1 last> LCL_VAR BB01 regmask=[mm0] minReg=1 last> SIMD BB01 regmask=[mm3] minReg=1 last> SIMD BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last> STORE_LCL_VAR BB01 regmask=[mm0] minReg=1> LCL_VAR BB01 regmask=[mm2] minReg=1 last> LCL_VAR BB01 regmask=[mm0] minReg=1 last> HWINTRINSIC BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last> STORE_LCL_VAR BB01 regmask=[mm0] minReg=1> LCL_VAR BB01 regmask=[mm0] minReg=1> LCL_VAR BB01 regmask=[mm0] minReg=1 last> HWINTRINSIC BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last> HWINTRINSIC BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last> STORE_LCL_VAR BB01 regmask=[mm0] minReg=1> LCL_VAR BB01 regmask=[mm0] minReg=1 last regOptional> INTRINSIC BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last fixed> BB01 regmask=[mm0] minReg=1> PUTARG_REG BB01 regmask=[mm0] minReg=1 fixed> BB01 regmask=[mm0] minReg=1> BB01 regmask=[mm0] minReg=1 last fixed> BB01 regmask=[rax] minReg=1 last> BB01 regmask=[rcx] minReg=1 last> BB01 regmask=[rdx] minReg=1 last> BB01 regmask=[r8] minReg=1 last> BB01 regmask=[r9] minReg=1 last> BB01 regmask=[r10] minReg=1 last> BB01 regmask=[r11] minReg=1 last> BB01 regmask=[mm0] minReg=1 last> BB01 regmask=[mm1] minReg=1 last> BB01 regmask=[mm2] minReg=1 last> BB01 regmask=[mm3] minReg=1 last> BB01 regmask=[mm4] minReg=1 last> BB01 regmask=[mm5] minReg=1 last> VAR REFPOSITIONS AFTER ALLOCATION --- V00 --- V01 (Interval 0) STORE_LCL_VAR BB01 regmask=[mm0] minReg=1> LCL_VAR BB01 regmask=[mm0] minReg=1 last> --- V02 (Interval 1) STORE_LCL_VAR BB01 regmask=[mm0] minReg=1> LCL_VAR BB01 regmask=[mm0] minReg=1 last> --- V03 --- V04 (Interval 2) STORE_LCL_VAR BB01 regmask=[mm1] minReg=1> LCL_VAR BB01 regmask=[mm1] minReg=1 last> --- V05 (Interval 3) STORE_LCL_VAR BB01 regmask=[mm2] minReg=1> LCL_VAR BB01 regmask=[mm2] minReg=1 last> --- V06 --- V07 --- V08 (Interval 4) STORE_LCL_VAR BB01 regmask=[mm0] minReg=1> LCL_VAR BB01 regmask=[mm0] minReg=1 last> --- V09 (Interval 5) STORE_LCL_VAR BB01 regmask=[mm1] minReg=1> LCL_VAR BB01 regmask=[mm1] minReg=1 last> --- V10 (Interval 6) STORE_LCL_VAR BB01 regmask=[mm0] minReg=1> LCL_VAR BB01 regmask=[mm0] minReg=1> LCL_VAR BB01 regmask=[mm0] minReg=1 last> --- V11 --- V12 --- V13 (Interval 7) STORE_LCL_VAR BB01 regmask=[mm0] minReg=1> LCL_VAR BB01 regmask=[mm0] minReg=1> LCL_VAR BB01 regmask=[mm0] minReg=1 last> --- V14 (Interval 8) STORE_LCL_VAR BB01 regmask=[mm0] minReg=1> LCL_VAR BB01 regmask=[mm0] minReg=1 last regOptional> --- V15 --- V16 --- V17 --- V18 --- V19 (Interval 9) STORE_LCL_VAR BB01 regmask=[mm0] minReg=1> LCL_VAR BB01 regmask=[mm0] minReg=1> LCL_VAR BB01 regmask=[mm0] minReg=1 last> --- V20 (Interval 10) STORE_LCL_VAR BB01 regmask=[mm1] minReg=1> LCL_VAR BB01 regmask=[mm1] minReg=1> LCL_VAR BB01 regmask=[mm1] minReg=1 last> --- V21 (Interval 11) STORE_LCL_VAR BB01 regmask=[mm0] minReg=1> LCL_VAR BB01 regmask=[mm0] minReg=1> LCL_VAR BB01 regmask=[mm0] minReg=1 last> Active intervals at end of allocation: ----------------------- RESOLVING BB BOUNDARIES ----------------------- Resolution Candidates: {} Has No Critical Edges Prior to Resolution BB01 use def in out {} {V01 V02 V04 V05 V08 V09 V10 V13 V14 V15 V16 V17 V18 V19 V20 V21} {} {} Var=Reg beg of BB01: none Var=Reg end of BB01: none RESOLVING EDGES Trees after linear scan register allocator (LSRA) ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe LIR ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..057) (return), preds={} succs={} N003 ( 3, 4) [000000] ------------ t0 = CNS_DBL float -1.0000000000000000 REG mm0 $81 /--* t0 float N005 ( 3, 4) [000141] DA---------- * STORE_LCL_VAR float V19 cse0 d:1 mm0 REG mm0 N007 ( 1, 2) [000142] ------------ t142 = LCL_VAR float V19 cse0 u:1 mm0 REG mm0 $81 N009 ( 1, 1) [000001] ------------ t1 = CNS_DBL float 1.0000000000000000 REG mm1 $82 /--* t142 float +--* t1 float N011 ( 7, 9) [000010] -------N---- t10 = * SIMD simd8 float initN REG mm1 $180 /--* t10 simd8 N013 ( 7, 9) [000012] DA--G------- * STORE_LCL_VAR simd8 V04 tmp1 d:2 mm1 REG mm1 N015 (???,???) [000155] ------------ IL_OFFSET void IL offset: 0xf REG NA N017 ( 1, 1) [000015] ------------ t15 = CNS_DBL float 1.0000000000000000 REG mm2 $82 N019 ( 1, 2) [000144] ------------ t144 = LCL_VAR float V19 cse0 u:1 mm0 (last use) REG mm0 $81 /--* t15 float +--* t144 float N021 ( 4, 5) [000019] -------N---- t19 = * SIMD simd8 float initN REG mm0 $182 /--* t19 simd8 N023 ( 8, 8) [000021] DA--G------- * STORE_LCL_VAR simd8 V01 loc0 d:2 mm0 REG mm0 N025 (???,???) [000156] ------------ IL_OFFSET void IL offset: 0x20 REG NA N027 ( 1, 1) [000009] -------N---- t9 = LCL_VAR simd8 V04 tmp1 u:2 mm1 (last use) REG mm1 $180 /--* t9 simd8 N029 ( 5, 4) [000072] DA---------- * STORE_LCL_VAR simd8 (P) V06 tmp3 NA * float V06.X (offs=0x00) -> V15 tmp12 * float V06.Y (offs=0x04) -> V16 tmp13 REG NA N031 (???,???) [000157] ------------ IL_OFFSET void IL offset: 0x20 REG NA N033 ( 3, 2) [000022] -------N---- t22 = LCL_VAR simd8 V01 loc0 u:2 mm0 (last use) REG mm0 $182 /--* t22 simd8 N035 ( 7, 5) [000075] DA---------- * STORE_LCL_VAR simd8 (P) V07 tmp4 NA * float V07.X (offs=0x00) -> V17 tmp14 * float V07.Y (offs=0x04) -> V18 tmp15 REG NA N037 (???,???) [000158] ------------ IL_OFFSET void IL offset: 0x20 REG NA N039 ( 3, 2) [000061] -------N---- t61 = LCL_VAR simd8 (P) V06 tmp3 mm0 * float V06.X (offs=0x00) -> V15 tmp12 * float V06.Y (offs=0x04) -> V16 tmp13 REG mm0 $184 /--* t61 simd8 N041 ( 3, 3) [000089] DA---------- * STORE_LCL_VAR simd8 V08 tmp5 d:2 mm0 REG mm0 N043 (???,???) [000159] ------------ IL_OFFSET void IL offset: 0x20 REG NA N045 ( 3, 2) [000062] -------N---- t62 = LCL_VAR simd8 (P) V07 tmp4 mm1 * float V07.X (offs=0x00) -> V17 tmp14 * float V07.Y (offs=0x04) -> V18 tmp15 REG mm1 $186 /--* t62 simd8 N047 ( 3, 3) [000092] DA---------- * STORE_LCL_VAR simd8 V09 tmp6 d:2 mm1 REG mm1 N049 (???,???) [000160] ------------ IL_OFFSET void IL offset: 0x20 REG NA N051 ( 1, 1) [000077] ------------ t77 = LCL_VAR simd8 V08 tmp5 u:2 mm0 (last use) REG mm0 $184 N053 ( 1, 1) [000078] ------------ t78 = LCL_VAR simd8 V09 tmp6 u:2 mm1 (last use) REG mm1 $186 /--* t77 simd8 +--* t78 simd8 N055 ( 3, 3) [000079] ------------ t79 = * HWINTRINSIC simd8 float Subtract REG mm0 $1c0 /--* t79 simd8 N057 ( 3, 3) [000082] DA---------- * STORE_LCL_VAR simd8 V10 tmp7 d:2 mm0 REG mm0 N059 ( 1, 1) [000095] -------N---- t95 = LCL_VAR simd8 V10 tmp7 u:2 mm0 REG mm0 $1c0 N061 ( 1, 1) [000098] -------N---- t98 = LCL_VAR simd8 V10 tmp7 u:2 mm0 (last use) REG mm0 $1c0 N063 (???,???) [000165] -c---------- t165 = CNS_INT int 49 REG NA /--* t95 simd8 +--* t98 simd8 +--* t165 int N065 (???,???) [000169] ------------ t169 = * HWINTRINSIC simd8 float DotProduct REG mm0 /--* t169 simd8 N067 ( 3, 3) [000100] ------------ t100 = * HWINTRINSIC float float ToScalar REG mm0 $144 /--* t100 float N069 ( 6, 7) [000069] ------------ t69 = * INTRINSIC float sqrt REG mm0 $240 /--* t69 float N071 (???,???) [000170] ------------ t170 = * PUTARG_REG float REG mm0 /--* t170 float arg0 in mm0 N073 ( 20, 13) [000029] --CXG------- * CALL void Console.WriteLine REG NA $VN.Void N075 ( 3, 4) [000030] ------------ t30 = CNS_DBL float -2.0000000000000000 REG mm0 $83 /--* t30 float N077 ( 3, 4) [000151] DA---------- * STORE_LCL_VAR float V21 cse2 d:1 mm0 REG mm0 N079 ( 1, 2) [000152] ------------ t152 = LCL_VAR float V21 cse2 u:1 mm0 REG mm0 $83 N081 ( 3, 4) [000031] ------------ t31 = CNS_DBL float 2.0000000000000000 REG mm1 $84 /--* t31 float N083 ( 3, 4) [000146] DA---------- * STORE_LCL_VAR float V20 cse1 d:1 mm1 REG mm1 N085 ( 1, 2) [000147] ------------ t147 = LCL_VAR float V20 cse1 u:1 mm1 REG mm1 $84 /--* t152 float +--* t147 float N087 ( 10, 14) [000040] -------N---- t40 = * SIMD simd8 float initN REG mm2 $189 /--* t40 simd8 N089 ( 10, 14) [000042] DA--G------- * STORE_LCL_VAR simd8 V05 tmp2 d:2 mm2 REG mm2 N091 (???,???) [000161] ------------ IL_OFFSET void IL offset: 0x3a REG NA N093 ( 1, 2) [000149] ------------ t149 = LCL_VAR float V20 cse1 u:1 mm1 (last use) REG mm1 $84 N095 ( 1, 2) [000154] ------------ t154 = LCL_VAR float V21 cse2 u:1 mm0 (last use) REG mm0 $83 /--* t149 float +--* t154 float N097 ( 4, 6) [000049] -------N---- t49 = * SIMD simd8 float initN REG mm0 $18b /--* t49 simd8 N099 ( 4, 6) [000051] DA--G------- * STORE_LCL_VAR simd8 V02 loc1 d:2 mm0 REG mm0 N101 (???,???) [000162] ------------ IL_OFFSET void IL offset: 0x4b REG NA N103 ( 1, 1) [000102] ------------ t102 = LCL_VAR simd8 V05 tmp2 u:2 mm2 (last use) REG mm2 $189 N105 ( 1, 1) [000103] ------------ t103 = LCL_VAR simd8 V02 loc1 u:2 mm0 (last use) REG mm0 $18b /--* t102 simd8 +--* t103 simd8 N107 ( 3, 3) [000104] ------------ t104 = * HWINTRINSIC simd8 float Subtract REG mm0 $1c1 /--* t104 simd8 N109 ( 3, 3) [000107] DA---------- * STORE_LCL_VAR simd8 V13 tmp10 d:2 mm0 REG mm0 N111 (???,???) [000163] ------------ IL_OFFSET void IL offset: 0x4b REG NA N113 ( 1, 1) [000129] -------N---- t129 = LCL_VAR simd8 V13 tmp10 u:2 mm0 REG mm0 $1c1 N115 ( 1, 1) [000132] -------N---- t132 = LCL_VAR simd8 V13 tmp10 u:2 mm0 (last use) REG mm0 $1c1 N117 (???,???) [000171] -c---------- t171 = CNS_INT int 49 REG NA /--* t129 simd8 +--* t132 simd8 +--* t171 int N119 (???,???) [000175] ------------ t175 = * HWINTRINSIC simd8 float DotProduct REG mm0 /--* t175 simd8 N121 ( 3, 3) [000134] ------------ t134 = * HWINTRINSIC float float ToScalar REG mm0 $149 /--* t134 float N123 ( 7, 8) [000124] DA---------- * STORE_LCL_VAR float V14 tmp11 d:2 mm0 REG mm0 N125 ( 3, 4) [000125] ------------ t125 = LCL_VAR float V14 tmp11 u:2 mm0 (last use) REG mm0 $149 /--* t125 float N127 ( 6, 8) [000126] ------------ t126 = * INTRINSIC float sqrt REG mm0 $241 /--* t126 float N129 (???,???) [000176] ------------ t176 = * PUTARG_REG float REG mm0 /--* t176 float arg0 in mm0 N131 ( 20, 14) [000059] --CXG------- * CALL void Console.WriteLine REG NA $VN.Void N133 (???,???) [000164] ------------ IL_OFFSET void IL offset: 0x56 REG NA N135 ( 0, 0) [000060] ------------ RETURN void REG NA $2c0 ------------------------------------------------------------------------------------------------------------------- Final allocation --------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ Loc RP# Name Type Action Reg |rax |rcx |rdx |rbx |rbp |rsi |rdi |r8 |r9 |mm0 |mm1 |mm2 |mm3 |mm6 |mm7 | --------------------------------+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+ 1.#0 BB1 PredBB0 | | | | | | | | | | | | | | | | 4.#1 C12 Def Alloc mm0 | | | | | | | | | |C12a| | | | | | 5.#2 C12 Use * Keep mm0 | | | | | | | | | |C12i| | | | | | 6.#3 V19 Def Alloc mm0 | | | | | | | | | |V19a| | | | | | 10.#4 C13 Def Alloc mm1 | | | | | | | | | |V19a|C13a| | | | | 11.#5 I14 Def Alloc mm2 | | | | | | | | | |V19a|C13a|I14a| | | | 11.#6 V19 Use Keep mm0 | | | | | | | | | |V19a|C13a|I14a| | | | 11.#7 C13 Use * Keep mm1 | | | | | | | | | |V19a|C13i|I14a| | | | 11.#8 I14 Use * Keep mm2 | | | | | | | | | |V19a| |I14i| | | | 12.#9 I15 Def Alloc mm1 | | | | | | | | | |V19a|I15a| | | | | 13.#10 I15 Use * Keep mm1 | | | | | | | | | |V19a|I15i| | | | | 14.#11 V4 Def Alloc mm1 | | | | | | | | | |V19a|V4 a| | | | | 18.#12 C16 Def Alloc mm2 | | | | | | | | | |V19a|V4 a|C16a| | | | 21.#13 I17 Def Alloc mm3 | | | | | | | | | |V19a|V4 a|C16a|I17a| | | 21.#14 C16 Use * Keep mm2 | | | | | | | | | |V19a|V4 a|C16i|I17a| | | 21.#15 V19 Use * Keep mm0 | | | | | | | | | |V19i|V4 a| |I17a| | | 21.#16 I17 Use * Keep mm3 | | | | | | | | | | |V4 a| |I17i| | | 22.#17 I18 Def Alloc mm0 | | | | | | | | | |I18a|V4 a| | | | | 23.#18 I18 Use * Keep mm0 | | | | | | | | | |I18i|V4 a| | | | | 24.#19 V1 Def Alloc mm0 | | | | | | | | | |V1 a|V4 a| | | | | 29.#20 V4 Use * Keep mm1 | | | | | | | | | |V1 a|V4 i| | | | | 35.#21 V1 Use * Keep mm0 | | | | | | | | | |V1 i| | | | | | 40.#22 I19 Def Alloc mm0 | | | | | | | | | |I19a| | | | | | 41.#23 I19 Use * Keep mm0 | | | | | | | | | |I19i| | | | | | 42.#24 V8 Def Alloc mm0 | | | | | | | | | |V8 a| | | | | | 46.#25 I20 Def Alloc mm1 | | | | | | | | | |V8 a|I20a| | | | | 47.#26 I20 Use * Keep mm1 | | | | | | | | | |V8 a|I20i| | | | | 48.#27 V9 Def Alloc mm1 | | | | | | | | | |V8 a|V9 a| | | | | 55.#28 V8 Use * Keep mm0 | | | | | | | | | |V8 i|V9 a| | | | | 55.#29 V9 Use * Keep mm1 | | | | | | | | | | |V9 i| | | | | 56.#30 I21 Def Alloc mm0 | | | | | | | | | |I21a| | | | | | 57.#31 I21 Use * Keep mm0 | | | | | | | | | |I21i| | | | | | 58.#32 V10 Def Alloc mm0 | | | | | | | | | |V10a| | | | | | 65.#33 V10 Use Keep mm0 | | | | | | | | | |V10a| | | | | | 65.#34 V10 Use * Keep mm0 | | | | | | | | | |V10i| | | | | | 66.#35 I22 Def Alloc mm0 | | | | | | | | | |I22a| | | | | | 67.#36 I22 Use * Keep mm0 | | | | | | | | | |I22i| | | | | | 68.#37 I23 Def Alloc mm0 | | | | | | | | | |I23a| | | | | | 69.#38 I23 Use * Keep mm0 | | | | | | | | | |I23i| | | | | | 70.#39 I24 Def Alloc mm0 | | | | | | | | | |I24a| | | | | | 71.#40 mm0 Fixd Keep mm0 | | | | | | | | | |I24a| | | | | | 71.#41 I24 Use * Keep mm0 | | | | | | | | | |I24i| | | | | | 72.#42 mm0 Fixd Keep mm0 | | | | | | | | | | | | | | | | 72.#43 I25 Def Alloc mm0 | | | | | | | | | |I25a| | | | | | 73.#44 mm0 Fixd Keep mm0 | | | | | | | | | |I25a| | | | | | 73.#45 I25 Use * Keep mm0 | | | | | | | | | |I25i| | | | | | 74.#46 rax Kill Keep rax | | | | | | | | | | | | | | | | 74.#47 rcx Kill Keep rcx | | | | | | | | | | | | | | | | 74.#48 rdx Kill Keep rdx | | | | | | | | | | | | | | | | 74.#49 r8 Kill Keep r8 | | | | | | | | | | | | | | | | 74.#50 r9 Kill Keep r9 | | | | | | | | | | | | | | | | 74.#51 r10 Kill Keep r10 | | | | | | | | | | | | | | | | 74.#52 r11 Kill Keep r11 | | | | | | | | | | | | | | | | 74.#53 mm0 Kill Keep mm0 | | | | | | | | | | | | | | | | 74.#54 mm1 Kill Keep mm1 | | | | | | | | | | | | | | | | 74.#55 mm2 Kill Keep mm2 | | | | | | | | | | | | | | | | 74.#56 mm3 Kill Keep mm3 | | | | | | | | | | | | | | | | 74.#57 mm4 Kill Keep mm4 | | | | | | | | | | | | | | | | 74.#58 mm5 Kill Keep mm5 | | | | | | | | | | | | | | | | 76.#59 C26 Def Alloc mm0 | | | | | | | | | |C26a| | | | | | 77.#60 C26 Use * Keep mm0 | | | | | | | | | |C26i| | | | | | 78.#61 V21 Def Alloc mm0 | | | | | | | | | |V21a| | | | | | 82.#62 C27 Def Alloc mm1 | | | | | | | | | |V21a|C27a| | | | | 83.#63 C27 Use * Keep mm1 | | | | | | | | | |V21a|C27i| | | | | 84.#64 V20 Def Alloc mm1 | | | | | | | | | |V21a|V20a| | | | | 87.#65 I28 Def Alloc mm2 | | | | | | | | | |V21a|V20a|I28a| | | | 87.#66 V21 Use Keep mm0 | | | | | | | | | |V21a|V20a|I28a| | | | 87.#67 V20 Use Keep mm1 | | | | | | | | | |V21a|V20a|I28a| | | | 87.#68 I28 Use * Keep mm2 | | | | | | | | | |V21a|V20a|I28i| | | | 88.#69 I29 Def Alloc mm2 | | | | | | | | | |V21a|V20a|I29a| | | | 89.#70 I29 Use * Keep mm2 | | | | | | | | | |V21a|V20a|I29i| | | | 90.#71 V5 Def Alloc mm2 | | | | | | | | | |V21a|V20a|V5 a| | | | 97.#72 I30 Def Alloc mm3 | | | | | | | | | |V21a|V20a|V5 a|I30a| | | 97.#73 V20 Use * Keep mm1 | | | | | | | | | |V21a|V20i|V5 a|I30a| | | 97.#74 V21 Use * Keep mm0 | | | | | | | | | |V21i| |V5 a|I30a| | | 97.#75 I30 Use * Keep mm3 | | | | | | | | | | | |V5 a|I30i| | | 98.#76 I31 Def Alloc mm0 | | | | | | | | | |I31a| |V5 a| | | | 99.#77 I31 Use * Keep mm0 | | | | | | | | | |I31i| |V5 a| | | | 100.#78 V2 Def Alloc mm0 | | | | | | | | | |V2 a| |V5 a| | | | 107.#79 V5 Use * Keep mm2 | | | | | | | | | |V2 a| |V5 i| | | | 107.#80 V2 Use * Keep mm0 | | | | | | | | | |V2 i| | | | | | 108.#81 I32 Def Alloc mm0 | | | | | | | | | |I32a| | | | | | 109.#82 I32 Use * Keep mm0 | | | | | | | | | |I32i| | | | | | 110.#83 V13 Def Alloc mm0 | | | | | | | | | |V13a| | | | | | 119.#84 V13 Use Keep mm0 | | | | | | | | | |V13a| | | | | | 119.#85 V13 Use * Keep mm0 | | | | | | | | | |V13i| | | | | | 120.#86 I33 Def Alloc mm0 | | | | | | | | | |I33a| | | | | | 121.#87 I33 Use * Keep mm0 | | | | | | | | | |I33i| | | | | | 122.#88 I34 Def Alloc mm0 | | | | | | | | | |I34a| | | | | | 123.#89 I34 Use * Keep mm0 | | | | | | | | | |I34i| | | | | | 124.#90 V14 Def Alloc mm0 | | | | | | | | | |V14a| | | | | | 127.#91 V14 Use * Keep mm0 | | | | | | | | | |V14i| | | | | | 128.#92 I35 Def Alloc mm0 | | | | | | | | | |I35a| | | | | | 129.#93 mm0 Fixd Keep mm0 | | | | | | | | | |I35a| | | | | | 129.#94 I35 Use * Keep mm0 | | | | | | | | | |I35i| | | | | | 130.#95 mm0 Fixd Keep mm0 | | | | | | | | | | | | | | | | 130.#96 I36 Def Alloc mm0 | | | | | | | | | |I36a| | | | | | 131.#97 mm0 Fixd Keep mm0 | | | | | | | | | |I36a| | | | | | 131.#98 I36 Use * Keep mm0 | | | | | | | | | |I36i| | | | | | 132.#99 rax Kill Keep rax | | | | | | | | | | | | | | | | 132.#100 rcx Kill Keep rcx | | | | | | | | | | | | | | | | 132.#101 rdx Kill Keep rdx | | | | | | | | | | | | | | | | 132.#102 r8 Kill Keep r8 | | | | | | | | | | | | | | | | 132.#103 r9 Kill Keep r9 | | | | | | | | | | | | | | | | 132.#104 r10 Kill Keep r10 | | | | | | | | | | | | | | | | 132.#105 r11 Kill Keep r11 | | | | | | | | | | | | | | | | 132.#106 mm0 Kill Keep mm0 | | | | | | | | | | | | | | | | 132.#107 mm1 Kill Keep mm1 | | | | | | | | | | | | | | | | 132.#108 mm2 Kill Keep mm2 | | | | | | | | | | | | | | | | 132.#109 mm3 Kill Keep mm3 | | | | | | | | | | | | | | | | 132.#110 mm4 Kill Keep mm4 | | | | | | | | | | | | | | | | 132.#111 mm5 Kill Keep mm5 | | | | | | | | | | | | | | | | Recording the maximum number of concurrent spills: ---------- LSRA Stats ---------- Total Tracked Vars: 16 Total Reg Cand Vars: 12 Total number of Intervals: 36 Total number of RefPositions: 111 Total Number of spill temps created: 0 .......... BB01 [ 100.00]: COVERS = 14, BEST_FIT = 9, REG_ORDER = 10 .......... Total SpillCount : 0 Weighted: 0.000000 Total CopyReg : 0 Weighted: 0.000000 Total ResolutionMovs : 0 Weighted: 0.000000 Total SplitEdges : 0 Weighted: 0.000000 .......... Total COVERS [# 4] : 14 Weighted: 1400.000000 Total BEST_FIT [#11] : 9 Weighted: 900.000000 Total REG_ORDER [#13] : 10 Weighted: 1000.000000 TUPLE STYLE DUMP WITH REGISTER ASSIGNMENTS Incoming Parameters: BB01 [000..057) (return), preds={} succs={} ===== N003. mm0 = CNS_DBL -1.0000000000000000 * N005. V19(mm0); mm0 N007. V19(mm0) N009. mm1 = CNS_DBL 1.0000000000000000 N011. mm1 = SIMD ; mm0,mm1 * N013. V04(mm1); mm1 N015. IL_OFFSET IL offset: 0xf N017. mm2 = CNS_DBL 1.0000000000000000 N019. V19(mm0*) N021. mm0 = SIMD ; mm2,mm0* * N023. V01(mm0); mm0 N025. IL_OFFSET IL offset: 0x20 N027. V04(mm1*) N029. V06 MEM; mm1* N031. IL_OFFSET IL offset: 0x20 N033. V01(mm0*) N035. V07 MEM; mm0* N037. IL_OFFSET IL offset: 0x20 N039. mm0* = V06 MEM * N041. V08(mm0); mm0* N043. IL_OFFSET IL offset: 0x20 N045. mm1* = V07 MEM * N047. V09(mm1); mm1* N049. IL_OFFSET IL offset: 0x20 N051. V08(mm0*) N053. V09(mm1*) N055. mm0 = HWINTRINSIC; mm0*,mm1* * N057. V10(mm0); mm0 N059. V10(mm0) N061. V10(mm0*) N063. CNS_INT 49 N065. mm0 = HWINTRINSIC; mm0,mm0* N067. mm0 = HWINTRINSIC; mm0 N069. mm0 = INTRINSIC; mm0 N071. mm0 = PUTARG_REG; mm0 N073. CALL ; mm0 N075. mm0 = CNS_DBL -2.0000000000000000 * N077. V21(mm0); mm0 N079. V21(mm0) N081. mm1 = CNS_DBL 2.0000000000000000 * N083. V20(mm1); mm1 N085. V20(mm1) N087. mm2 = SIMD ; mm0,mm1 * N089. V05(mm2); mm2 N091. IL_OFFSET IL offset: 0x3a N093. V20(mm1*) N095. V21(mm0*) N097. mm0 = SIMD ; mm1*,mm0* * N099. V02(mm0); mm0 N101. IL_OFFSET IL offset: 0x4b N103. V05(mm2*) N105. V02(mm0*) N107. mm0 = HWINTRINSIC; mm2*,mm0* * N109. V13(mm0); mm0 N111. IL_OFFSET IL offset: 0x4b N113. V13(mm0) N115. V13(mm0*) N117. CNS_INT 49 N119. mm0 = HWINTRINSIC; mm0,mm0* N121. mm0 = HWINTRINSIC; mm0 * N123. V14(mm0); mm0 N125. V14(mm0*) N127. mm0 = INTRINSIC; mm0* N129. mm0 = PUTARG_REG; mm0 N131. CALL ; mm0 N133. IL_OFFSET IL offset: 0x56 N135. RETURN Var=Reg end of BB01: none *************** Finishing PHASE Linear scan register alloc *************** In genGenerateCode() ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i hascall gcsafe LIR ----------------------------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Generate code *************** In fgDebugCheckBBlist Finalizing stack frame Recording Var Locations at start of BB01 Modified regs: [rax rcx rdx r8-r11 mm0-mm5] Callee-saved registers pushed: 0 [] *************** In lvaAssignFrameOffsets(FINAL_FRAME_LAYOUT) Pad V06 tmp3, size=8, stkOffs=-0x8, pad=0 Assign V06 tmp3, size=8, stkOffs=-0x10 Pad V07 tmp4, size=8, stkOffs=-0x10, pad=0 Assign V07 tmp4, size=8, stkOffs=-0x18 Assign V03 OutArgs, size=32, stkOffs=-0x38 --- delta bump 8 for RA --- delta bump 56 for RSP frame --- virtual stack offset to actual stack offset delta is 64 -- V00 was 0, now 64 -- V03 was -56, now 8 -- V06 was -16, now 48 -- V07 was -24, now 40 ; Final local variable assignments ; ;* V00 arg0 [V00 ] ( 0, 0 ) ref -> zero-ref class-hnd ; V01 loc0 [V01,T13] ( 2, 2 ) simd8 -> mm0 ld-addr-op ; V02 loc1 [V02,T14] ( 2, 2 ) simd8 -> mm0 ld-addr-op ; V03 OutArgs [V03 ] ( 1, 1 ) lclBlk (32) [rsp+00H] "OutgoingArgSpace" ; V04 tmp1 [V04,T00] ( 2, 4 ) simd8 -> mm1 "NewObj constructor temp" ; V05 tmp2 [V05,T01] ( 2, 4 ) simd8 -> mm2 "NewObj constructor temp" ; V06 tmp3 [V06 ] ( 2, 4 ) simd8 -> [rsp+30H] do-not-enreg[SB] "Inlining Arg" ; V07 tmp4 [V07 ] ( 2, 4 ) simd8 -> [rsp+28H] do-not-enreg[SB] "Inlining Arg" ; V08 tmp5 [V08,T02] ( 2, 4 ) simd8 -> mm0 "Inlining Arg" ; V09 tmp6 [V09,T03] ( 2, 4 ) simd8 -> mm1 "Inlining Arg" ; V10 tmp7 [V10,T08] ( 3, 3 ) simd8 -> mm0 ld-addr-op "Inline stloc first use temp" ;* V11 tmp8 [V11 ] ( 0, 0 ) simd8 -> zero-ref "Inlining Arg" ;* V12 tmp9 [V12 ] ( 0, 0 ) simd8 -> zero-ref "Inlining Arg" ; V13 tmp10 [V13,T09] ( 3, 3 ) simd8 -> mm0 ld-addr-op "Inline stloc first use temp" ; V14 tmp11 [V14,T15] ( 2, 2 ) float -> mm0 "Inline stloc first use temp" ; V15 tmp12 [V15,T04] ( 2, 4 ) float -> [rsp+30H] do-not-enreg[] V06.X(offs=0x00) P-DEP "field V06.X (fldOffset=0x0)" ; V16 tmp13 [V16,T05] ( 2, 4 ) float -> [rsp+34H] do-not-enreg[] V06.Y(offs=0x04) P-DEP "field V06.Y (fldOffset=0x4)" ; V17 tmp14 [V17,T06] ( 2, 4 ) float -> [rsp+28H] do-not-enreg[] V07.X(offs=0x00) P-DEP "field V07.X (fldOffset=0x0)" ; V18 tmp15 [V18,T07] ( 2, 4 ) float -> [rsp+2CH] do-not-enreg[] V07.Y(offs=0x04) P-DEP "field V07.Y (fldOffset=0x4)" ; V19 cse0 [V19,T10] ( 3, 3 ) float -> mm0 "CSE - aggressive" ; V20 cse1 [V20,T11] ( 3, 3 ) float -> mm1 "CSE - aggressive" ; V21 cse2 [V21,T12] ( 3, 3 ) float -> mm0 "CSE - aggressive" ; ; Lcl frame size = 56 Mark labels for codegen BB01 : first block *************** After genMarkLabelsForCodegen() ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 [000..057) (return) i label hascall gcsafe LIR ----------------------------------------------------------------------------------------------------------------------------------------- Setting stack level from -572662307 to 0 =============== Generating BB01 [000..057) (return), preds={} succs={} flags=0x00000002.20090020: i label hascall gcsafe LIR BB01 IN (0)={} + ByrefExposed + GcHeap OUT(0)={} Recording Var Locations at start of BB01 Liveness not changing: 0000000000000000 {} Live regs: (unchanged) 00000000 {} GC regs: (unchanged) 00000000 {} Byref regs: (unchanged) 00000000 {} L_M59663_BB01: Mapped BB01 to G_M59663_IG02 Label: IG02, GCvars=0000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000000 {} Scope info: begin block BB01, IL range [000..057) Scope info: open scopes = Generating: N003 ( 3, 4) [000000] ------------ t0 = CNS_DBL float -1.0000000000000000 REG mm0 $81 IN0001: vmovss xmm0, dword ptr [reloc @RWD00] /--* t0 float Generating: N005 ( 3, 4) [000141] DA---------- * STORE_LCL_VAR float V19 cse0 d:1 mm0 REG mm0 V19 in reg mm0 is becoming live [000141] Live regs: 00000000 {} => 00000000 {xmm0} Live vars: {} => {V19} Generating: N007 ( 1, 2) [000142] ------------ t142 = LCL_VAR float V19 cse0 u:1 mm0 REG mm0 $81 Generating: N009 ( 1, 1) [000001] ------------ t1 = CNS_DBL float 1.0000000000000000 REG mm1 $82 IN0002: vmovss xmm1, dword ptr [reloc @RWD04] /--* t142 float +--* t1 float Generating: N011 ( 7, 9) [000010] -------N---- t10 = * SIMD simd8 float initN REG mm1 $180 IN0003: vxorps xmm2, xmm2 IN0004: vmovss xmm2, xmm2, xmm1 IN0005: vpslldq xmm2, 4 IN0006: vmovss xmm2, xmm2, xmm0 IN0007: vmovaps xmm1, xmm2 /--* t10 simd8 Generating: N013 ( 7, 9) [000012] DA--G------- * STORE_LCL_VAR simd8 V04 tmp1 d:2 mm1 REG mm1 V04 in reg mm1 is becoming live [000012] Live regs: 00000000 {xmm0} => 00000000 {xmm0 xmm1} Live vars: {V19} => {V04 V19} Added IP mapping: 0x000F (G_M59663_IG02,ins#7,ofs#44) label Generating: N015 (???,???) [000155] ------------ IL_OFFSET void IL offset: 0xf REG NA Generating: N017 ( 1, 1) [000015] ------------ t15 = CNS_DBL float 1.0000000000000000 REG mm2 $82 IN0008: vmovss xmm2, dword ptr [reloc @RWD04] Generating: N019 ( 1, 2) [000144] ------------ t144 = LCL_VAR float V19 cse0 u:1 mm0 (last use) REG mm0 $81 /--* t15 float +--* t144 float Generating: N021 ( 4, 5) [000019] -------N---- t19 = * SIMD simd8 float initN REG mm0 $182 IN0009: vxorps xmm3, xmm3 V19 in reg mm0 is becoming dead [000144] Live regs: 00000000 {xmm0 xmm1} => 00000000 {xmm1} Live vars: {V04 V19} => {V04} IN000a: vmovss xmm3, xmm3, xmm0 IN000b: vpslldq xmm3, 4 IN000c: vmovss xmm3, xmm3, xmm2 IN000d: vmovaps xmm0, xmm3 /--* t19 simd8 Generating: N023 ( 8, 8) [000021] DA--G------- * STORE_LCL_VAR simd8 V01 loc0 d:2 mm0 REG mm0 V01 in reg mm0 is becoming live [000021] Live regs: 00000000 {xmm1} => 00000000 {xmm0 xmm1} Live vars: {V04} => {V01 V04} Added IP mapping: 0x0020 (G_M59663_IG02,ins#13,ofs#79) Generating: N025 (???,???) [000156] ------------ IL_OFFSET void IL offset: 0x20 REG NA Generating: N027 ( 1, 1) [000009] -------N---- t9 = LCL_VAR simd8 V04 tmp1 u:2 mm1 (last use) REG mm1 $180 /--* t9 simd8 Generating: N029 ( 5, 4) [000072] DA---------- * STORE_LCL_VAR simd8 (P) V06 tmp3 NA * float V06.X (offs=0x00) -> V15 tmp12 * float V06.Y (offs=0x04) -> V16 tmp13 REG NA V04 in reg mm1 is becoming dead [000009] Live regs: 00000000 {xmm0 xmm1} => 00000000 {xmm0} Live vars: {V01 V04} => {V01} IN000e: vmovsd qword ptr [V06 rsp+30H], xmm1 Live vars: {V01} => {V01 V15 V16} genIPmappingAdd: ignoring duplicate IL offset 0x80000020 Generating: N031 (???,???) [000157] ------------ IL_OFFSET void IL offset: 0x20 REG NA Generating: N033 ( 3, 2) [000022] -------N---- t22 = LCL_VAR simd8 V01 loc0 u:2 mm0 (last use) REG mm0 $182 /--* t22 simd8 Generating: N035 ( 7, 5) [000075] DA---------- * STORE_LCL_VAR simd8 (P) V07 tmp4 NA * float V07.X (offs=0x00) -> V17 tmp14 * float V07.Y (offs=0x04) -> V18 tmp15 REG NA V01 in reg mm0 is becoming dead [000022] Live regs: 00000000 {xmm0} => 00000000 {} Live vars: {V01 V15 V16} => {V15 V16} IN000f: vmovsd qword ptr [V07 rsp+28H], xmm0 Live vars: {V15 V16} => {V15 V16 V17 V18} genIPmappingAdd: ignoring duplicate IL offset 0x80000020 Generating: N037 (???,???) [000158] ------------ IL_OFFSET void IL offset: 0x20 REG NA Generating: N039 ( 3, 2) [000061] -------N---- t61 = LCL_VAR simd8 (P) V06 tmp3 mm0 * float V06.X (offs=0x00) -> V15 tmp12 * float V06.Y (offs=0x04) -> V16 tmp13 REG mm0 $184 IN0010: vmovsd xmm0, qword ptr [V06 rsp+30H] Live vars: {V15 V16 V17 V18} => {V17 V18} /--* t61 simd8 Generating: N041 ( 3, 3) [000089] DA---------- * STORE_LCL_VAR simd8 V08 tmp5 d:2 mm0 REG mm0 V08 in reg mm0 is becoming live [000089] Live regs: 00000000 {} => 00000000 {xmm0} Live vars: {V17 V18} => {V08 V17 V18} genIPmappingAdd: ignoring duplicate IL offset 0x80000020 Generating: N043 (???,???) [000159] ------------ IL_OFFSET void IL offset: 0x20 REG NA Generating: N045 ( 3, 2) [000062] -------N---- t62 = LCL_VAR simd8 (P) V07 tmp4 mm1 * float V07.X (offs=0x00) -> V17 tmp14 * float V07.Y (offs=0x04) -> V18 tmp15 REG mm1 $186 IN0011: vmovsd xmm1, qword ptr [V07 rsp+28H] Live vars: {V08 V17 V18} => {V08} /--* t62 simd8 Generating: N047 ( 3, 3) [000092] DA---------- * STORE_LCL_VAR simd8 V09 tmp6 d:2 mm1 REG mm1 V09 in reg mm1 is becoming live [000092] Live regs: 00000000 {xmm0} => 00000000 {xmm0 xmm1} Live vars: {V08} => {V08 V09} genIPmappingAdd: ignoring duplicate IL offset 0x80000020 Generating: N049 (???,???) [000160] ------------ IL_OFFSET void IL offset: 0x20 REG NA Generating: N051 ( 1, 1) [000077] ------------ t77 = LCL_VAR simd8 V08 tmp5 u:2 mm0 (last use) REG mm0 $184 Generating: N053 ( 1, 1) [000078] ------------ t78 = LCL_VAR simd8 V09 tmp6 u:2 mm1 (last use) REG mm1 $186 /--* t77 simd8 +--* t78 simd8 Generating: N055 ( 3, 3) [000079] ------------ t79 = * HWINTRINSIC simd8 float Subtract REG mm0 $1c0 V08 in reg mm0 is becoming dead [000077] Live regs: 00000000 {xmm0 xmm1} => 00000000 {xmm1} Live vars: {V08 V09} => {V09} V09 in reg mm1 is becoming dead [000078] Live regs: 00000000 {xmm1} => 00000000 {} Live vars: {V09} => {} IN0012: vsubps xmm0, xmm0, xmm1 /--* t79 simd8 Generating: N057 ( 3, 3) [000082] DA---------- * STORE_LCL_VAR simd8 V10 tmp7 d:2 mm0 REG mm0 V10 in reg mm0 is becoming live [000082] Live regs: 00000000 {} => 00000000 {xmm0} Live vars: {} => {V10} Generating: N059 ( 1, 1) [000095] -------N---- t95 = LCL_VAR simd8 V10 tmp7 u:2 mm0 REG mm0 $1c0 Generating: N061 ( 1, 1) [000098] -------N---- t98 = LCL_VAR simd8 V10 tmp7 u:2 mm0 (last use) REG mm0 $1c0 Generating: N063 (???,???) [000165] -c---------- t165 = CNS_INT int 49 REG NA /--* t95 simd8 +--* t98 simd8 +--* t165 int Generating: N065 (???,???) [000169] ------------ t169 = * HWINTRINSIC simd8 float DotProduct REG mm0 V10 in reg mm0 is becoming dead [000098] Live regs: 00000000 {xmm0} => 00000000 {} Live vars: {V10} => {} IN0013: vdpps xmm0, xmm0, xmm0, 49 /--* t169 simd8 Generating: N067 ( 3, 3) [000100] ------------ t100 = * HWINTRINSIC float float ToScalar REG mm0 $144 /--* t100 float Generating: N069 ( 6, 7) [000069] ------------ t69 = * INTRINSIC float sqrt REG mm0 $240 IN0014: vsqrtss xmm0, xmm0 /--* t69 float Generating: N071 (???,???) [000170] ------------ t170 = * PUTARG_REG float REG mm0 /--* t170 float arg0 in mm0 Generating: N073 ( 20, 13) [000029] --CXG------- * CALL void Console.WriteLine REG NA $VN.Void Call: GCvars=0000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000000 {} IN0015: call Console:WriteLine(float) Generating: N075 ( 3, 4) [000030] ------------ t30 = CNS_DBL float -2.0000000000000000 REG mm0 $83 IN0016: vmovss xmm0, dword ptr [reloc @RWD08] /--* t30 float Generating: N077 ( 3, 4) [000151] DA---------- * STORE_LCL_VAR float V21 cse2 d:1 mm0 REG mm0 V21 in reg mm0 is becoming live [000151] Live regs: 00000000 {} => 00000000 {xmm0} Live vars: {} => {V21} Generating: N079 ( 1, 2) [000152] ------------ t152 = LCL_VAR float V21 cse2 u:1 mm0 REG mm0 $83 Generating: N081 ( 3, 4) [000031] ------------ t31 = CNS_DBL float 2.0000000000000000 REG mm1 $84 IN0017: vmovss xmm1, dword ptr [reloc @RWD12] /--* t31 float Generating: N083 ( 3, 4) [000146] DA---------- * STORE_LCL_VAR float V20 cse1 d:1 mm1 REG mm1 V20 in reg mm1 is becoming live [000146] Live regs: 00000000 {xmm0} => 00000000 {xmm0 xmm1} Live vars: {V21} => {V20 V21} Generating: N085 ( 1, 2) [000147] ------------ t147 = LCL_VAR float V20 cse1 u:1 mm1 REG mm1 $84 /--* t152 float +--* t147 float Generating: N087 ( 10, 14) [000040] -------N---- t40 = * SIMD simd8 float initN REG mm2 $189 IN0018: vxorps xmm2, xmm2 IN0019: vmovss xmm2, xmm2, xmm1 IN001a: vpslldq xmm2, 4 IN001b: vmovss xmm2, xmm2, xmm0 /--* t40 simd8 Generating: N089 ( 10, 14) [000042] DA--G------- * STORE_LCL_VAR simd8 V05 tmp2 d:2 mm2 REG mm2 V05 in reg mm2 is becoming live [000042] Live regs: 00000000 {xmm0 xmm1} => 00000000 {xmm0 xmm1 xmm2} Live vars: {V20 V21} => {V05 V20 V21} Added IP mapping: 0x003A (G_M59663_IG02,ins#27,ofs#167) Generating: N091 (???,???) [000161] ------------ IL_OFFSET void IL offset: 0x3a REG NA Generating: N093 ( 1, 2) [000149] ------------ t149 = LCL_VAR float V20 cse1 u:1 mm1 (last use) REG mm1 $84 Generating: N095 ( 1, 2) [000154] ------------ t154 = LCL_VAR float V21 cse2 u:1 mm0 (last use) REG mm0 $83 /--* t149 float +--* t154 float Generating: N097 ( 4, 6) [000049] -------N---- t49 = * SIMD simd8 float initN REG mm0 $18b IN001c: vxorps xmm3, xmm3 V20 in reg mm1 is becoming dead [000149] Live regs: 00000000 {xmm0 xmm1 xmm2} => 00000000 {xmm0 xmm2} Live vars: {V05 V20 V21} => {V05 V21} V21 in reg mm0 is becoming dead [000154] Live regs: 00000000 {xmm0 xmm2} => 00000000 {xmm2} Live vars: {V05 V21} => {V05} IN001d: vmovss xmm3, xmm3, xmm0 IN001e: vpslldq xmm3, 4 IN001f: vmovss xmm3, xmm3, xmm1 IN0020: vmovaps xmm0, xmm3 /--* t49 simd8 Generating: N099 ( 4, 6) [000051] DA--G------- * STORE_LCL_VAR simd8 V02 loc1 d:2 mm0 REG mm0 V02 in reg mm0 is becoming live [000051] Live regs: 00000000 {xmm2} => 00000000 {xmm0 xmm2} Live vars: {V05} => {V02 V05} Added IP mapping: 0x004B (G_M59663_IG02,ins#32,ofs#193) Generating: N101 (???,???) [000162] ------------ IL_OFFSET void IL offset: 0x4b REG NA Generating: N103 ( 1, 1) [000102] ------------ t102 = LCL_VAR simd8 V05 tmp2 u:2 mm2 (last use) REG mm2 $189 Generating: N105 ( 1, 1) [000103] ------------ t103 = LCL_VAR simd8 V02 loc1 u:2 mm0 (last use) REG mm0 $18b /--* t102 simd8 +--* t103 simd8 Generating: N107 ( 3, 3) [000104] ------------ t104 = * HWINTRINSIC simd8 float Subtract REG mm0 $1c1 V05 in reg mm2 is becoming dead [000102] Live regs: 00000000 {xmm0 xmm2} => 00000000 {xmm0} Live vars: {V02 V05} => {V02} V02 in reg mm0 is becoming dead [000103] Live regs: 00000000 {xmm0} => 00000000 {} Live vars: {V02} => {} IN0021: vsubps xmm0, xmm2, xmm0 /--* t104 simd8 Generating: N109 ( 3, 3) [000107] DA---------- * STORE_LCL_VAR simd8 V13 tmp10 d:2 mm0 REG mm0 V13 in reg mm0 is becoming live [000107] Live regs: 00000000 {} => 00000000 {xmm0} Live vars: {} => {V13} genIPmappingAdd: ignoring duplicate IL offset 0x8000004b Generating: N111 (???,???) [000163] ------------ IL_OFFSET void IL offset: 0x4b REG NA Generating: N113 ( 1, 1) [000129] -------N---- t129 = LCL_VAR simd8 V13 tmp10 u:2 mm0 REG mm0 $1c1 Generating: N115 ( 1, 1) [000132] -------N---- t132 = LCL_VAR simd8 V13 tmp10 u:2 mm0 (last use) REG mm0 $1c1 Generating: N117 (???,???) [000171] -c---------- t171 = CNS_INT int 49 REG NA /--* t129 simd8 +--* t132 simd8 +--* t171 int Generating: N119 (???,???) [000175] ------------ t175 = * HWINTRINSIC simd8 float DotProduct REG mm0 V13 in reg mm0 is becoming dead [000132] Live regs: 00000000 {xmm0} => 00000000 {} Live vars: {V13} => {} IN0022: vdpps xmm0, xmm0, xmm0, 49 /--* t175 simd8 Generating: N121 ( 3, 3) [000134] ------------ t134 = * HWINTRINSIC float float ToScalar REG mm0 $149 /--* t134 float Generating: N123 ( 7, 8) [000124] DA---------- * STORE_LCL_VAR float V14 tmp11 d:2 mm0 REG mm0 V14 in reg mm0 is becoming live [000124] Live regs: 00000000 {} => 00000000 {xmm0} Live vars: {} => {V14} Generating: N125 ( 3, 4) [000125] ------------ t125 = LCL_VAR float V14 tmp11 u:2 mm0 (last use) REG mm0 $149 /--* t125 float Generating: N127 ( 6, 8) [000126] ------------ t126 = * INTRINSIC float sqrt REG mm0 $241 V14 in reg mm0 is becoming dead [000125] Live regs: 00000000 {xmm0} => 00000000 {} Live vars: {V14} => {} IN0023: vsqrtss xmm0, xmm0 /--* t126 float Generating: N129 (???,???) [000176] ------------ t176 = * PUTARG_REG float REG mm0 /--* t176 float arg0 in mm0 Generating: N131 ( 20, 14) [000059] --CXG------- * CALL void Console.WriteLine REG NA $VN.Void Call: GCvars=0000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000000 {} IN0024: call Console:WriteLine(float) Added IP mapping: 0x0056 STACK_EMPTY (G_M59663_IG02,ins#36,ofs#214) Generating: N133 (???,???) [000164] ------------ IL_OFFSET void IL offset: 0x56 REG NA Generating: N135 ( 0, 0) [000060] ------------ RETURN void REG NA $2c0 Scope info: end block BB01, IL range [000..057) Scope info: ending scope, LVnum=0 [000..057) siEndScope: Failed to end scope for V00 Scope info: ending scope, LVnum=1 [000..057) Scope info: ending scope, LVnum=2 [000..057) Scope info: open scopes = Added IP mapping: EPILOG STACK_EMPTY (G_M59663_IG02,ins#36,ofs#214) label Reserving epilog IG for block BB01 IN0025: nop G_M59663_IG02: ; offs=000000H, funclet=00, bbWeight=1 *************** After placeholder IG creation G_M59663_IG01: ; func=00, offs=000000H, size=0000H, gcrefRegs=00000000 {} <-- Prolog IG G_M59663_IG02: ; offs=000000H, size=00D7H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref G_M59663_IG03: ; epilog placeholder, next placeholder=, BB01 [0000], epilog, extend <-- First placeholder <-- Last placeholder ; PrevGCVars=0000000000000000 {}, PrevGCrefRegs=00000000 {}, PrevByrefRegs=00000000 {} ; InitGCVars=0000000000000000 {}, InitGCrefRegs=00000000 {}, InitByrefRegs=00000000 {} Liveness not changing: 0000000000000000 {} # compCycleEstimate = 100, compSizeEstimate = 93 Program:Main(ref) ; Final local variable assignments ; ;* V00 arg0 [V00 ] ( 0, 0 ) ref -> zero-ref class-hnd ; V01 loc0 [V01,T13] ( 2, 2 ) simd8 -> mm0 ld-addr-op ; V02 loc1 [V02,T14] ( 2, 2 ) simd8 -> mm0 ld-addr-op ; V03 OutArgs [V03 ] ( 1, 1 ) lclBlk (32) [rsp+00H] "OutgoingArgSpace" ; V04 tmp1 [V04,T00] ( 2, 4 ) simd8 -> mm1 "NewObj constructor temp" ; V05 tmp2 [V05,T01] ( 2, 4 ) simd8 -> mm2 "NewObj constructor temp" ; V06 tmp3 [V06 ] ( 2, 4 ) simd8 -> [rsp+30H] do-not-enreg[SB] "Inlining Arg" ; V07 tmp4 [V07 ] ( 2, 4 ) simd8 -> [rsp+28H] do-not-enreg[SB] "Inlining Arg" ; V08 tmp5 [V08,T02] ( 2, 4 ) simd8 -> mm0 "Inlining Arg" ; V09 tmp6 [V09,T03] ( 2, 4 ) simd8 -> mm1 "Inlining Arg" ; V10 tmp7 [V10,T08] ( 3, 3 ) simd8 -> mm0 ld-addr-op "Inline stloc first use temp" ;* V11 tmp8 [V11 ] ( 0, 0 ) simd8 -> zero-ref "Inlining Arg" ;* V12 tmp9 [V12 ] ( 0, 0 ) simd8 -> zero-ref "Inlining Arg" ; V13 tmp10 [V13,T09] ( 3, 3 ) simd8 -> mm0 ld-addr-op "Inline stloc first use temp" ; V14 tmp11 [V14,T15] ( 2, 2 ) float -> mm0 "Inline stloc first use temp" ; V15 tmp12 [V15,T04] ( 2, 4 ) float -> [rsp+30H] do-not-enreg[] V06.X(offs=0x00) P-DEP "field V06.X (fldOffset=0x0)" ; V16 tmp13 [V16,T05] ( 2, 4 ) float -> [rsp+34H] do-not-enreg[] V06.Y(offs=0x04) P-DEP "field V06.Y (fldOffset=0x4)" ; V17 tmp14 [V17,T06] ( 2, 4 ) float -> [rsp+28H] do-not-enreg[] V07.X(offs=0x00) P-DEP "field V07.X (fldOffset=0x0)" ; V18 tmp15 [V18,T07] ( 2, 4 ) float -> [rsp+2CH] do-not-enreg[] V07.Y(offs=0x04) P-DEP "field V07.Y (fldOffset=0x4)" ; V19 cse0 [V19,T10] ( 3, 3 ) float -> mm0 "CSE - aggressive" ; V20 cse1 [V20,T11] ( 3, 3 ) float -> mm1 "CSE - aggressive" ; V21 cse2 [V21,T12] ( 3, 3 ) float -> mm0 "CSE - aggressive" ; ; Lcl frame size = 56 *************** Before prolog / epilog generation G_M59663_IG01: ; func=00, offs=000000H, size=0000H, gcrefRegs=00000000 {} <-- Prolog IG G_M59663_IG02: ; offs=000000H, size=00D7H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref G_M59663_IG03: ; epilog placeholder, next placeholder=, BB01 [0000], epilog, extend <-- First placeholder <-- Last placeholder ; PrevGCVars=0000000000000000 {}, PrevGCrefRegs=00000000 {}, PrevByrefRegs=00000000 {} ; InitGCVars=0000000000000000 {}, InitGCrefRegs=00000000 {}, InitByrefRegs=00000000 {} Recording Var Locations at start of BB01 *************** In genFnProlog() Added IP mapping to front: PROLOG STACK_EMPTY (G_M59663_IG01,ins#0,ofs#0) label __prolog: IN0026: sub rsp, 56 IN0027: vzeroupper *************** In genFnPrologCalleeRegArgs() for int regs *************** In genEnregisterIncomingStackArgs() G_M59663_IG01: ; offs=000000H, funclet=00, bbWeight=1 *************** In genFnEpilog() __epilog: gcVarPtrSetCur=0000000000000000 {}, gcRegGCrefSetCur=00000000 {}, gcRegByrefSetCur=00000000 {} IN0028: add rsp, 56 IN0029: ret G_M59663_IG03: ; offs=0000D7H, funclet=00, bbWeight=1 0 prologs, 1 epilogs, 0 funclet prologs, 0 funclet epilogs *************** After prolog / epilog generation G_M59663_IG01: ; func=00, offs=000000H, size=0007H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG G_M59663_IG02: ; offs=000007H, size=00D7H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref G_M59663_IG03: ; offs=0000DEH, size=0005H, epilog, nogc, extend *************** In emitJumpDistBind() *************** Finishing PHASE Generate code *************** Starting PHASE Emit code Hot code size = 0xE3 bytes Cold code size = 0x0 bytes reserveUnwindInfo(isFunclet=FALSE, isColdCode=FALSE, unwindSize=0x6) *************** In emitEndCodeGen() Converting emitMaxStackDepth from bytes (0) to elements (0) *************************************************************************** Instructions as they come out of the scheduler G_M59663_IG01: ; func=00, offs=000000H, size=0007H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG IN0026: 000000 4883EC38 sub rsp, 56 IN0027: 000004 C5F877 vzeroupper ;; bbWeight=1 PerfScore 1.25 G_M59663_IG02: ; func=00, offs=000007H, size=00D7H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref IN0001: 000007 C5FA1005D9000000 vmovss xmm0, dword ptr [reloc @RWD00] (ECS:9, ACS:8) Instruction predicted size = 9, actual = 8 Increasing size adj 0 by 1 => 1 IN0002: 00000F C5FA100DD5000000 vmovss xmm1, dword ptr [reloc @RWD04] (ECS:9, ACS:8) Instruction predicted size = 9, actual = 8 Increasing size adj 1 by 1 => 2 IN0003: 000017 C5E857D2 vxorps xmm2, xmm2 (ECS:5, ACS:4) Instruction predicted size = 5, actual = 4 Increasing size adj 2 by 1 => 3 IN0004: 00001B C5EA10D1 vmovss xmm2, xmm2, xmm1 (ECS:5, ACS:4) Instruction predicted size = 5, actual = 4 Increasing size adj 3 by 1 => 4 IN0005: 00001F C5E973FA04 vpslldq xmm2, 4 (ECS:6, ACS:5) Instruction predicted size = 6, actual = 5 Increasing size adj 4 by 1 => 5 IN0006: 000024 C5EA10D0 vmovss xmm2, xmm2, xmm0 (ECS:5, ACS:4) Instruction predicted size = 5, actual = 4 Increasing size adj 5 by 1 => 6 IN0007: 000028 C5F828CA vmovaps xmm1, xmm2 (ECS:5, ACS:4) Instruction predicted size = 5, actual = 4 Increasing size adj 6 by 1 => 7 IN0008: 00002C C5FA1015B8000000 vmovss xmm2, dword ptr [reloc @RWD04] (ECS:9, ACS:8) Instruction predicted size = 9, actual = 8 Increasing size adj 7 by 1 => 8 IN0009: 000034 C5E057DB vxorps xmm3, xmm3 (ECS:5, ACS:4) Instruction predicted size = 5, actual = 4 Increasing size adj 8 by 1 => 9 IN000a: 000038 C5E210D8 vmovss xmm3, xmm3, xmm0 (ECS:5, ACS:4) Instruction predicted size = 5, actual = 4 Increasing size adj 9 by 1 => 10 IN000b: 00003C C5E173FB04 vpslldq xmm3, 4 (ECS:6, ACS:5) Instruction predicted size = 6, actual = 5 Increasing size adj 10 by 1 => 11 IN000c: 000041 C5E210DA vmovss xmm3, xmm3, xmm2 (ECS:5, ACS:4) Instruction predicted size = 5, actual = 4 Increasing size adj 11 by 1 => 12 IN000d: 000045 C5F828C3 vmovaps xmm0, xmm3 (ECS:5, ACS:4) Instruction predicted size = 5, actual = 4 Increasing size adj 12 by 1 => 13 IN000e: 000049 C5FB114C2430 vmovsd qword ptr [rsp+30H], xmm1 (ECS:7, ACS:6) Instruction predicted size = 7, actual = 6 Increasing size adj 13 by 1 => 14 IN000f: 00004F C5FB11442428 vmovsd qword ptr [rsp+28H], xmm0 (ECS:7, ACS:6) Instruction predicted size = 7, actual = 6 Increasing size adj 14 by 1 => 15 IN0010: 000055 C5FB10442430 vmovsd xmm0, qword ptr [rsp+30H] (ECS:7, ACS:6) Instruction predicted size = 7, actual = 6 Increasing size adj 15 by 1 => 16 IN0011: 00005B C5FB104C2428 vmovsd xmm1, qword ptr [rsp+28H] (ECS:7, ACS:6) Instruction predicted size = 7, actual = 6 Increasing size adj 16 by 1 => 17 IN0012: 000061 C5F85CC1 vsubps xmm0, xmm0, xmm1 (ECS:5, ACS:4) Instruction predicted size = 5, actual = 4 Increasing size adj 17 by 1 => 18 IN0013: 000065 C4E37940C031 vdpps xmm0, xmm0, xmm0, 49 IN0014: 00006B C5FA51C0 vsqrtss xmm0, xmm0 (ECS:5, ACS:4) Instruction predicted size = 5, actual = 4 Increasing size adj 18 by 1 => 19 IN0015: 00006F E854FDFFFF call Console:WriteLine(float) ; gcr arg pop 0 IN0016: 000074 C5FA100574000000 vmovss xmm0, dword ptr [reloc @RWD08] (ECS:9, ACS:8) Instruction predicted size = 9, actual = 8 Increasing size adj 19 by 1 => 20 IN0017: 00007C C5FA100D70000000 vmovss xmm1, dword ptr [reloc @RWD12] (ECS:9, ACS:8) Instruction predicted size = 9, actual = 8 Increasing size adj 20 by 1 => 21 IN0018: 000084 C5E857D2 vxorps xmm2, xmm2 (ECS:5, ACS:4) Instruction predicted size = 5, actual = 4 Increasing size adj 21 by 1 => 22 IN0019: 000088 C5EA10D1 vmovss xmm2, xmm2, xmm1 (ECS:5, ACS:4) Instruction predicted size = 5, actual = 4 Increasing size adj 22 by 1 => 23 IN001a: 00008C C5E973FA04 vpslldq xmm2, 4 (ECS:6, ACS:5) Instruction predicted size = 6, actual = 5 Increasing size adj 23 by 1 => 24 IN001b: 000091 C5EA10D0 vmovss xmm2, xmm2, xmm0 (ECS:5, ACS:4) Instruction predicted size = 5, actual = 4 Increasing size adj 24 by 1 => 25 IN001c: 000095 C5E057DB vxorps xmm3, xmm3 (ECS:5, ACS:4) Instruction predicted size = 5, actual = 4 Increasing size adj 25 by 1 => 26 IN001d: 000099 C5E210D8 vmovss xmm3, xmm3, xmm0 (ECS:5, ACS:4) Instruction predicted size = 5, actual = 4 Increasing size adj 26 by 1 => 27 IN001e: 00009D C5E173FB04 vpslldq xmm3, 4 (ECS:6, ACS:5) Instruction predicted size = 6, actual = 5 Increasing size adj 27 by 1 => 28 IN001f: 0000A2 C5E210D9 vmovss xmm3, xmm3, xmm1 (ECS:5, ACS:4) Instruction predicted size = 5, actual = 4 Increasing size adj 28 by 1 => 29 IN0020: 0000A6 C5F828C3 vmovaps xmm0, xmm3 (ECS:5, ACS:4) Instruction predicted size = 5, actual = 4 Increasing size adj 29 by 1 => 30 IN0021: 0000AA C5E85CC0 vsubps xmm0, xmm2, xmm0 (ECS:5, ACS:4) Instruction predicted size = 5, actual = 4 Increasing size adj 30 by 1 => 31 IN0022: 0000AE C4E37940C031 vdpps xmm0, xmm0, xmm0, 49 IN0023: 0000B4 C5FA51C0 vsqrtss xmm0, xmm0 (ECS:5, ACS:4) Instruction predicted size = 5, actual = 4 Increasing size adj 31 by 1 => 32 IN0024: 0000B8 E80BFDFFFF call Console:WriteLine(float) ; gcr arg pop 0 IN0025: 0000BD 90 nop ;; bbWeight=1 PerfScore 83.33 G_M59663_IG03: ; func=00, offs=0000DEH, size=0005H, epilog, nogc, extend Block predicted offs = 000000DE, actual = 000000BE -> size adj = 32 IN0028: 0000BE 4883C438 add rsp, 56 IN0029: 0000C2 C3 ret ;; bbWeight=1 PerfScore 1.25 Emitting data sections: 16 total bytes section 0, size 4, RWD 0: 00 00 80 bf ; float -1 section 1, size 4, RWD 4: 00 00 80 3f ; float 1 section 2, size 4, RWD 8: 00 00 00 c0 ; float -2 section 3, size 4, RWD12: 00 00 00 40 ; float 2 Allocated method code size = 227 , actual size = 195, unused size = 32 ; Total bytes of code 195, prolog size 7, PerfScore 108.53, instruction count 41, allocated bytes for code 227 (MethodHash=c8bc16f0) for method Program:Main(ref) ; ============================================================ *************** After end code gen, before unwindEmit() G_M59663_IG01: ; func=00, offs=000000H, size=0007H, bbWeight=1 PerfScore 1.25, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG IN0026: 000000 sub rsp, 56 IN0027: 000004 vzeroupper G_M59663_IG02: ; offs=000007H, size=00B7H, bbWeight=1 PerfScore 83.33, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, isz IN0001: 000007 vmovss xmm0, dword ptr [reloc @RWD00] IN0002: 00000F vmovss xmm1, dword ptr [reloc @RWD04] IN0003: 000017 vxorps xmm2, xmm2 IN0004: 00001B vmovss xmm2, xmm2, xmm1 IN0005: 00001F vpslldq xmm2, 4 IN0006: 000024 vmovss xmm2, xmm2, xmm0 IN0007: 000028 vmovaps xmm1, xmm2 IN0008: 00002C vmovss xmm2, dword ptr [reloc @RWD04] IN0009: 000034 vxorps xmm3, xmm3 IN000a: 000038 vmovss xmm3, xmm3, xmm0 IN000b: 00003C vpslldq xmm3, 4 IN000c: 000041 vmovss xmm3, xmm3, xmm2 IN000d: 000045 vmovaps xmm0, xmm3 IN000e: 000049 vmovsd qword ptr [V06 rsp+30H], xmm1 IN000f: 00004F vmovsd qword ptr [V07 rsp+28H], xmm0 IN0010: 000055 vmovsd xmm0, qword ptr [V06 rsp+30H] IN0011: 00005B vmovsd xmm1, qword ptr [V07 rsp+28H] IN0012: 000061 vsubps xmm0, xmm0, xmm1 IN0013: 000065 vdpps xmm0, xmm0, xmm0, 49 IN0014: 00006B vsqrtss xmm0, xmm0 IN0015: 00006F call Console:WriteLine(float) IN0016: 000074 vmovss xmm0, dword ptr [reloc @RWD08] IN0017: 00007C vmovss xmm1, dword ptr [reloc @RWD12] IN0018: 000084 vxorps xmm2, xmm2 IN0019: 000088 vmovss xmm2, xmm2, xmm1 IN001a: 00008C vpslldq xmm2, 4 IN001b: 000091 vmovss xmm2, xmm2, xmm0 IN001c: 000095 vxorps xmm3, xmm3 IN001d: 000099 vmovss xmm3, xmm3, xmm0 IN001e: 00009D vpslldq xmm3, 4 IN001f: 0000A2 vmovss xmm3, xmm3, xmm1 IN0020: 0000A6 vmovaps xmm0, xmm3 IN0021: 0000AA vsubps xmm0, xmm2, xmm0 IN0022: 0000AE vdpps xmm0, xmm0, xmm0, 49 IN0023: 0000B4 vsqrtss xmm0, xmm0 IN0024: 0000B8 call Console:WriteLine(float) IN0025: 0000BD nop G_M59663_IG03: ; offs=0000BEH, size=0005H, bbWeight=1 PerfScore 1.25, epilog, nogc, extend IN0028: 0000BE add rsp, 56 IN0029: 0000C2 ret *************** Finishing PHASE Emit code *************** Starting PHASE Emit GC+EH tables Unwind Info: >> Start offset : 0x000000 (not in unwind data) >> End offset : 0x0000c3 (not in unwind data) Version : 1 Flags : 0x00 SizeOfProlog : 0x04 CountOfUnwindCodes: 1 FrameRegister : none (0) FrameOffset : N/A (no FrameRegister) (Value=0) UnwindCodes : CodeOffset: 0x04 UnwindOp: UWOP_ALLOC_SMALL (2) OpInfo: 6 * 8 + 8 = 56 = 0x38 allocUnwindInfo(pHotCode=0x00007FFA0E2100C0, pColdCode=0x0000000000000000, startOffset=0x0, endOffset=0xc3, unwindSize=0x6, pUnwindBlock=0x0000019751340092, funKind=0 (main function)) *************** In genIPmappingGen() IP mapping count : 7 IL offs PROLOG : 0x00000000 ( STACK_EMPTY ) IL offs 0x000F : 0x0000002C IL offs 0x0020 : 0x00000049 IL offs 0x003A : 0x00000095 IL offs 0x004B : 0x000000AA IL offs 0x0056 : 0x000000BD ( STACK_EMPTY ) IL offs EPILOG : 0x000000BD ( STACK_EMPTY ) *************** In genSetScopeInfo() VarLocInfo count is 1 ; Variable debug info: 1 live range(s), 1 var(s) for method Program:Main(ref) 0( UNKNOWN) : From 00000000h to 00000007h, in rcx *************** In gcInfoBlockHdrSave() Set code length to 195. Set ReturnKind to Scalar. Set Outgoing stack arg area size to 32. Defining 2 call sites: Offset 0x6f, size 5. Offset 0xb8, size 5. *************** Finishing PHASE Emit GC+EH tables Method code size: 195 Allocations for Program:Main(ref) (MethodHash=c8bc16f0) count: 1519, size: 124892, max = 3072 allocateMemory: 131072, nraUsed: 130152 Alloc'd bytes by kind: kind | size | pct ---------------------+------------+-------- AssertionProp | 6652 | 5.33% ASTNode | 22656 | 18.14% InstDesc | 4688 | 3.75% ImpStack | 384 | 0.31% BasicBlock | 2528 | 2.02% fgArgInfo | 128 | 0.10% fgArgInfoPtrArr | 16 | 0.01% FlowList | 0 | 0.00% TreeStatementList | 192 | 0.15% SiScope | 200 | 0.16% DominatorMemory | 96 | 0.08% LSRA | 3544 | 2.84% LSRA_Interval | 2960 | 2.37% LSRA_RefPosition | 7168 | 5.74% Reachability | 16 | 0.01% SSA | 1224 | 0.98% ValueNumber | 8170 | 6.54% LvaTable | 5084 | 4.07% UnwindInfo | 0 | 0.00% hashBv | 40 | 0.03% bitset | 536 | 0.43% FixedBitVect | 64 | 0.05% Generic | 3082 | 2.47% LocalAddressVisitor | 0 | 0.00% FieldSeqStore | 0 | 0.00% ZeroOffsetFieldMap | 280 | 0.22% ArrayInfoMap | 40 | 0.03% MemoryPhiArg | 0 | 0.00% CSE | 2096 | 1.68% GC | 1322 | 1.06% CorTailCallInfo | 0 | 0.00% Inlining | 4752 | 3.80% ArrayStack | 0 | 0.00% DebugInfo | 344 | 0.28% DebugOnly | 42731 | 34.21% Codegen | 1176 | 0.94% LoopOpt | 0 | 0.00% LoopClone | 0 | 0.00% LoopHoist | 0 | 0.00% Unknown | 451 | 0.36% RangeCheck | 0 | 0.00% CopyProp | 1264 | 1.01% SideEffects | 0 | 0.00% ObjectAllocator | 0 | 0.00% VariableLiveRanges | 0 | 0.00% ClassLayout | 112 | 0.09% TailMergeThrows | 0 | 0.00% EarlyProp | 0 | 0.00% ZeroInit | 896 | 0.72% Pgo | 0 | 0.00% ****** DONE compiling Program:Main(ref) 2.828427 5.656854