; Assembly listing for method d__23:MoveNext():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-0 compilation ; MinOpts code ; fp based frame ; fully interruptible ; Final local variable assignments ; ; V00 this [V00 ] ( 1, 1 ) byref -> [fp+B8H] do-not-enreg[] this ; V01 TypeCtx [V01 ] ( 1, 1 ) long -> [fp+B0H] do-not-enreg[] ; V02 loc0 [V02 ] ( 1, 1 ) int -> [fp+ACH] do-not-enreg[] must-init ; V03 loc1 [V03 ] ( 1, 1 ) ref -> [fp+A0H] do-not-enreg[] must-init class-hnd ; V04 loc2 [V04 ] ( 1, 1 ) int -> [fp+9CH] do-not-enreg[] must-init ; V05 loc3 [V05 ] ( 1, 1 ) struct ( 8) [fp+90H] do-not-enreg[XS] must-init addr-exposed ld-addr-op ; V06 loc4 [V06 ] ( 1, 1 ) struct ( 8) [fp+88H] do-not-enreg[XS] must-init addr-exposed ld-addr-op ; V07 loc5 [V07 ] ( 1, 1 ) int -> [fp+84H] do-not-enreg[] must-init ; V08 loc6 [V08 ] ( 1, 1 ) int -> [fp+80H] do-not-enreg[] must-init ; V09 loc7 [V09 ] ( 1, 1 ) ref -> [fp+78H] do-not-enreg[] must-init class-hnd ;# V10 OutArgs [V10 ] ( 1, 1 ) lclBlk ( 0) [sp+00H] do-not-enreg[] "OutgoingArgSpace" ; V11 tmp1 [V11 ] ( 1, 1 ) int -> [fp+74H] do-not-enreg[] "dup spill" ; V12 tmp2 [V12 ] ( 1, 1 ) ref -> [fp+68H] do-not-enreg[] must-init class-hnd "bubbling QMark1" ; V13 tmp3 [V13 ] ( 1, 1 ) long -> [fp+60H] do-not-enreg[] "spilling Runtime Lookup tree" ; V14 tmp4 [V14 ] ( 1, 1 ) ref -> [fp+58H] do-not-enreg[] must-init class-hnd "non-inline candidate call" ; V15 tmp5 [V15 ] ( 1, 1 ) ref -> [fp+50H] do-not-enreg[] must-init class-hnd "bubbling QMark1" ; V16 tmp6 [V16 ] ( 1, 1 ) long -> [fp+48H] do-not-enreg[] "spilling Runtime Lookup tree" ; V17 tmp7 [V17 ] ( 1, 1 ) byref -> [fp+40H] do-not-enreg[] must-init "bubbling QMark1" ; V18 tmp8 [V18 ] ( 1, 1 ) long -> [fp+38H] do-not-enreg[] "spilling Runtime Lookup tree" ; V19 tmp9 [V19 ] ( 1, 1 ) ref -> [fp+30H] do-not-enreg[] must-init class-hnd "impSpillSpecialSideEff" ; V20 tmp10 [V20 ] ( 1, 1 ) int -> [fp+28H] do-not-enreg[X] addr-exposed "patchpoint counter" ; V21 tmp11 [V21 ] ( 1, 1 ) ref -> [fp+20H] do-not-enreg[] must-init "argument with side effect" ; V22 tmp12 [V22 ] ( 1, 1 ) ref -> [fp+18H] do-not-enreg[] must-init "argument with side effect" ; V23 tmp13 [V23 ] ( 1, 1 ) ref -> [fp+10H] do-not-enreg[] must-init "argument with side effect" ; V24 PSPSym [V24 ] ( 1, 1 ) long -> [fp+C8H] do-not-enreg[V] "PSPSym" ; ; Lcl frame size = 192 G_M32124_IG01: ;; offset=0000H A9B37BFD stp fp, lr, [sp,#-208]! 910003FD mov fp, sp 910043A9 add x9, fp, #16 4F00E410 movi v16.16b, #0x00 AD004130 stp q16, q16, [x9] AD014130 stp q16, q16, [x9,#32] AD024130 stp q16, q16, [x9,#64] AD034130 stp q16, q16, [x9,#96] AD044130 stp q16, q16, [x9,#128] 910343E2 add x2, sp, #208 F90067A2 str x2, [fp,#200] // [V24 PSPSym] F90063A1 str x1, [fp,#192] F9005FA0 str x0, [fp,#184] // [V00 this] F9005BA1 str x1, [fp,#176] // [V01 TypeCtx] ;; size=56 bbWeight=1 PerfScore 12.00 G_M32124_IG02: ;; offset=0038H F9405FA0 ldr x0, [fp,#184] B9401000 ldr w0, [x0,#16] B900AFA0 str w0, [fp,#172] // [V02 loc0] F9405FA0 ldr x0, [fp,#184] // [V00 this] F9400000 ldr x0, [x0] F90053A0 str x0, [fp,#160] // [V03 loc1] 52807D00 mov w0, #0x3e8 B9002BA0 str w0, [fp,#40] // [V20 tmp10] ;; size=32 bbWeight=1 PerfScore 13.50 G_M32124_IG03: ;; offset=0058H B940AFA0 ldr w0, [fp,#172] // [V02 loc0] 34001400 cbz w0, G_M32124_IG17 F94053A0 ldr x0, [fp,#160] // [V03 loc1] D2829C01 movz x1, #0x14e0 // code for RentReturnArrayPoolTests`1:get_Pool F2A40C21 movk x1, #0x2061 LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 F9400021 ldr x1, [x1] D63F0020 blr x1 F9405FAE ldr x14, [fp,#184] // [V00 this] 910021CE add x14, x14, #8 AA0003EF mov x15, x0 97F6F7DC bl CORINFO_HELP_CHECKED_ASSIGN_REF F9405FA0 ldr x0, [fp,#184] // [V00 this] B900141F str wzr, [x0,#20] 140000FD b G_M32124_IG28 ;; size=60 bbWeight=1 PerfScore 18.50 G_M32124_IG04: ;; offset=0094H B9009FBF str wzr, [fp,#156] // [V04 loc2] 14000040 b G_M32124_IG10 ;; size=8 bbWeight=1 PerfScore 2.00 G_M32124_IG05: ;; offset=009CH F94053A0 ldr x0, [fp,#160] // [V03 loc1] F9400800 ldr x0, [x0,#16] F9002FA0 str x0, [fp,#88] // [V14 tmp4] F9405FA0 ldr x0, [fp,#184] // [V00 this] F9400400 ldr x0, [x0,#8] F90013A0 str x0, [fp,#32] // [V21 tmp11] F94013A0 ldr x0, [fp,#32] // [V21 tmp11] F94053A1 ldr x1, [fp,#160] // [V03 loc1] B9401821 ldr w1, [x1,#24] F94013A2 ldr x2, [fp,#32] // [V21 tmp11] F9400042 ldr x2, [x2] F9402042 ldr x2, [x2,#64] F9401042 ldr x2, [x2,#32] D63F0040 blr x2 F9000FA0 str x0, [fp,#24] // [V22 tmp12] F9400FA2 ldr x2, [fp,#24] // [V22 tmp12] B9409FA1 ldr w1, [fp,#156] // [V04 loc2] F9402FA0 ldr x0, [fp,#88] // [V14 tmp4] 97FF3787 bl CORINFO_HELP_ARRADDR_ST F94053A0 ldr x0, [fp,#160] // [V03 loc1] D2828A01 movz x1, #0x1450 // code for RentReturnArrayPoolTests`1:get_ManipulateArray F2A40C21 movk x1, #0x2061 LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 F9400021 ldr x1, [x1] D63F0020 blr x1 34000460 cbz w0, G_M32124_IG09 F94053A0 ldr x0, [fp,#160] // [V03 loc1] F9400800 ldr x0, [x0,#16] B9409FA1 ldr w1, [fp,#156] // [V04 loc2] B9400802 ldr w2, [x0,#8] 6B02003F cmp w1, w2 54000E02 bhs G_M32124_IG16 8B010C00 add x0, x0, x1, LSL #3 91004000 add x0, x0, #16 F9400000 ldr x0, [x0] F9002BA0 str x0, [fp,#80] // [V15 tmp5] F9405BA0 ldr x0, [fp,#176] // [V01 TypeCtx] F9401800 ldr x0, [x0,#48] F9400000 ldr x0, [x0] F9400800 ldr x0, [x0,#16] B40000E0 cbz x0, G_M32124_IG07 ;; size=164 bbWeight=1 PerfScore 76.50 G_M32124_IG06: ;; offset=0140H F9405BA0 ldr x0, [fp,#176] // [V01 TypeCtx] F9401800 ldr x0, [x0,#48] F9400000 ldr x0, [x0] F9400800 ldr x0, [x0,#16] F90027A0 str x0, [fp,#72] // [V16 tmp6] 14000007 b G_M32124_IG08 ;; size=24 bbWeight=0.50 PerfScore 6.50 G_M32124_IG07: ;; offset=0158H F9405BA0 ldr x0, [fp,#176] // [V01 TypeCtx] D282A701 movz x1, #0x1538 F2A40FC1 movk x1, #0x207e LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 97FF37DA bl CORINFO_HELP_RUNTIMEHANDLE_CLASS F90027A0 str x0, [fp,#72] // [V16 tmp6] ;; size=24 bbWeight=0.50 PerfScore 2.75 G_M32124_IG08: ;; offset=0170H F94027A0 ldr x0, [fp,#72] // [V16 tmp6] F9402BA1 ldr x1, [fp,#80] // [V15 tmp5] D2829F02 movz x2, #0x14f8 // code for RentReturnArrayPoolTests`1:Clear F2A40C22 movk x2, #0x2061 LSL #16 F2CFFF02 movk x2, #0x7ff8 LSL #32 F9400042 ldr x2, [x2] D63F0040 blr x2 ;; size=28 bbWeight=1 PerfScore 9.50 G_M32124_IG09: ;; offset=018CH B9409FA0 ldr w0, [fp,#156] // [V04 loc2] 11000400 add w0, w0, #1 B9009FA0 str w0, [fp,#156] // [V04 loc2] ;; size=12 bbWeight=1 PerfScore 3.50 G_M32124_IG10: ;; offset=0198H B9402BA0 ldr w0, [fp,#40] // [V20 tmp10] 51000400 sub w0, w0, #1 B9002BA0 str w0, [fp,#40] // [V20 tmp10] B9402BA0 ldr w0, [fp,#40] // [V20 tmp10] 7100001F cmp w0, #0 5400008C bgt G_M32124_IG12 ;; size=24 bbWeight=1 PerfScore 7.00 G_M32124_IG11: ;; offset=01B0H 9100A3A0 add x0, fp, #40 // [V20 tmp10] 52800C41 mov w1, #98 97FF37BE bl CORINFO_HELP_PATCHPOINT ;; size=12 bbWeight=0.01 PerfScore 0.02 G_M32124_IG12: ;; offset=01BCH B9409FA0 ldr w0, [fp,#156] // [V04 loc2] F94053A1 ldr x1, [fp,#160] // [V03 loc1] F9400821 ldr x1, [x1,#16] B9400821 ldr w1, [x1,#8] 6B01001F cmp w0, w1 54FFF66B blt G_M32124_IG05 F94053A0 ldr x0, [fp,#160] // [V03 loc1] D2829001 movz x1, #0x1480 // code for RentReturnArrayPoolTests`1:get_Async F2A40C21 movk x1, #0x2061 LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 F9400021 ldr x1, [x1] D63F0020 blr x1 340009C0 cbz w0, G_M32124_IG19 D2863300 movz x0, #0x3198 // code for Task:Yield F2A40B00 movk x0, #0x2058 LSL #16 F2CFFF00 movk x0, #0x7ff8 LSL #32 F9400000 ldr x0, [x0] D63F0000 blr x0 390223A0 strb w0, [fp,#136] // [V06 loc4] 910223A0 add x0, fp, #136 // [V06 loc4] D29E5101 movz x1, #0xf288 // code for YieldAwaitable:GetAwaiter F2A40F61 movk x1, #0x207b LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 F9400021 ldr x1, [x1] D63F0020 blr x1 390243A0 strb w0, [fp,#144] // [V05 loc3] 910243A0 add x0, fp, #144 // [V05 loc3] D29E2101 movz x1, #0xf108 // code for YieldAwaiter:get_IsCompleted F2A40F61 movk x1, #0x207b LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 F9400021 ldr x1, [x1] D63F0020 blr x1 35000680 cbnz w0, G_M32124_IG18 B900AFBF str wzr, [fp,#172] // [V02 loc0] F9405FA0 ldr x0, [fp,#184] // [V00 this] B900101F str wzr, [x0,#16] F9405FA0 ldr x0, [fp,#184] // [V00 this] 394243A1 ldrb w1, [fp,#144] 39008001 strb w1, [x0,#32] F9405FA0 ldr x0, [fp,#184] // [V00 this] 39C0001F ldrsb wzr, [x0] F9405FA0 ldr x0, [fp,#184] // [V00 this] 91006000 add x0, x0, #24 F90023A0 str x0, [fp,#64] // [V17 tmp7] F9405BA0 ldr x0, [fp,#176] // [V01 TypeCtx] F9401800 ldr x0, [x0,#48] F9400000 ldr x0, [x0] F9400C00 ldr x0, [x0,#24] B40000E0 cbz x0, G_M32124_IG14 ;; size=196 bbWeight=1 PerfScore 70.00 G_M32124_IG13: ;; offset=0280H F9405BA0 ldr x0, [fp,#176] // [V01 TypeCtx] F9401800 ldr x0, [x0,#48] F9400000 ldr x0, [x0] F9400C00 ldr x0, [x0,#24] F9001FA0 str x0, [fp,#56] // [V18 tmp8] 14000007 b G_M32124_IG15 ;; size=24 bbWeight=0.50 PerfScore 6.50 G_M32124_IG14: ;; offset=0298H F9405BA0 ldr x0, [fp,#176] // [V01 TypeCtx] D282C601 movz x1, #0x1630 F2A40FC1 movk x1, #0x207e LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 97FF378A bl CORINFO_HELP_RUNTIMEHANDLE_CLASS F9001FA0 str x0, [fp,#56] // [V18 tmp8] ;; size=24 bbWeight=0.50 PerfScore 2.75 G_M32124_IG15: ;; offset=02B0H 910243A2 add x2, fp, #144 // [V05 loc3] F94023A0 ldr x0, [fp,#64] // [V17 tmp7] F9401FA1 ldr x1, [fp,#56] // [V18 tmp8] F9405FA3 ldr x3, [fp,#184] // [V00 this] D29F9804 movz x4, #0xfcc0 // code for AsyncTaskMethodBuilder:AwaitUnsafeOnCompleted F2A40F64 movk x4, #0x207b LSL #16 F2CFFF04 movk x4, #0x7ff8 LSL #32 F9400084 ldr x4, [x4] D63F0080 blr x4 1400008A b G_M32124_IG32 ;; size=40 bbWeight=1 PerfScore 13.00 G_M32124_IG16: ;; offset=02D8H 97FF3742 bl CORINFO_HELP_RNGCHKFAIL ;; size=4 bbWeight=0 PerfScore 0.00 G_M32124_IG17: ;; offset=02DCH F9405FA0 ldr x0, [fp,#184] // [V00 this] 39408001 ldrb w1, [x0,#32] 390243A1 strb w1, [fp,#144] F9405FA0 ldr x0, [fp,#184] // [V00 this] 3900801F strb wzr, [x0,#32] 12800000 movn w0, #0 B90077A0 str w0, [fp,#116] // [V11 tmp1] B94077A0 ldr w0, [fp,#116] // [V11 tmp1] B900AFA0 str w0, [fp,#172] // [V02 loc0] F9405FA0 ldr x0, [fp,#184] // [V00 this] B94077A1 ldr w1, [fp,#116] // [V11 tmp1] B9001001 str w1, [x0,#16] ;; size=48 bbWeight=1 PerfScore 18.50 G_M32124_IG18: ;; offset=030CH 910243A0 add x0, fp, #144 // [V05 loc3] D29E3F01 movz x1, #0xf1f8 // code for YieldAwaiter:GetResult F2A40F61 movk x1, #0x207b LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 F9400021 ldr x1, [x1] D63F0020 blr x1 ;; size=24 bbWeight=1 PerfScore 6.00 G_M32124_IG19: ;; offset=0324H F94053A0 ldr x0, [fp,#160] // [V03 loc1] F9400800 ldr x0, [x0,#16] B9400800 ldr w0, [x0,#8] 51000400 sub w0, w0, #1 B90087A0 str w0, [fp,#132] // [V07 loc5] 14000040 b G_M32124_IG25 ;; size=24 bbWeight=1 PerfScore 10.50 G_M32124_IG20: ;; offset=033CH F94053A0 ldr x0, [fp,#160] // [V03 loc1] D2828A01 movz x1, #0x1450 // code for RentReturnArrayPoolTests`1:get_ManipulateArray F2A40C21 movk x1, #0x2061 LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 F9400021 ldr x1, [x1] D63F0020 blr x1 34000460 cbz w0, G_M32124_IG24 F94053A0 ldr x0, [fp,#160] // [V03 loc1] F9400800 ldr x0, [x0,#16] B94087A1 ldr w1, [fp,#132] // [V07 loc5] B9400802 ldr w2, [x0,#8] 6B02003F cmp w1, w2 54FFFB62 bhs G_M32124_IG16 8B010C00 add x0, x0, x1, LSL #3 91004000 add x0, x0, #16 F9400000 ldr x0, [x0] F90037A0 str x0, [fp,#104] // [V12 tmp2] F9405BA0 ldr x0, [fp,#176] // [V01 TypeCtx] F9401800 ldr x0, [x0,#48] F9400000 ldr x0, [x0] F9400800 ldr x0, [x0,#16] B40000E0 cbz x0, G_M32124_IG22 ;; size=88 bbWeight=1 PerfScore 37.50 G_M32124_IG21: ;; offset=0394H F9405BA0 ldr x0, [fp,#176] // [V01 TypeCtx] F9401800 ldr x0, [x0,#48] F9400000 ldr x0, [x0] F9400800 ldr x0, [x0,#16] F90033A0 str x0, [fp,#96] // [V13 tmp3] 14000007 b G_M32124_IG23 ;; size=24 bbWeight=0.50 PerfScore 6.50 G_M32124_IG22: ;; offset=03ACH F9405BA0 ldr x0, [fp,#176] // [V01 TypeCtx] D282A701 movz x1, #0x1538 F2A40FC1 movk x1, #0x207e LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 97FF3745 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS F90033A0 str x0, [fp,#96] // [V13 tmp3] ;; size=24 bbWeight=0.50 PerfScore 2.75 G_M32124_IG23: ;; offset=03C4H F94033A0 ldr x0, [fp,#96] // [V13 tmp3] F94037A1 ldr x1, [fp,#104] // [V12 tmp2] D282A202 movz x2, #0x1510 // code for RentReturnArrayPoolTests`1:IterateAll F2A40C22 movk x2, #0x2061 LSL #16 F2CFFF02 movk x2, #0x7ff8 LSL #32 F9400042 ldr x2, [x2] D63F0040 blr x2 ;; size=28 bbWeight=1 PerfScore 9.50 G_M32124_IG24: ;; offset=03E0H F9405FA0 ldr x0, [fp,#184] // [V00 this] F9400400 ldr x0, [x0,#8] F9000BA0 str x0, [fp,#16] // [V23 tmp13] F9400BA0 ldr x0, [fp,#16] // [V23 tmp13] F94053A1 ldr x1, [fp,#160] // [V03 loc1] F9400821 ldr x1, [x1,#16] B94087A2 ldr w2, [fp,#132] // [V07 loc5] B9400823 ldr w3, [x1,#8] 6B03005F cmp w2, w3 54FFF6A2 bhs G_M32124_IG16 8B020C21 add x1, x1, x2, LSL #3 91004021 add x1, x1, #16 F9400021 ldr x1, [x1] 2A1F03E2 mov w2, wzr F9400BA3 ldr x3, [fp,#16] // [V23 tmp13] F9400063 ldr x3, [x3] F9402063 ldr x3, [x3,#64] F9401463 ldr x3, [x3,#40] D63F0060 blr x3 B94087A0 ldr w0, [fp,#132] // [V07 loc5] 51000400 sub w0, w0, #1 B90087A0 str w0, [fp,#132] // [V07 loc5] ;; size=88 bbWeight=1 PerfScore 40.00 G_M32124_IG25: ;; offset=0438H B9402BA0 ldr w0, [fp,#40] // [V20 tmp10] 51000400 sub w0, w0, #1 B9002BA0 str w0, [fp,#40] // [V20 tmp10] B9402BA0 ldr w0, [fp,#40] // [V20 tmp10] 7100001F cmp w0, #0 5400008C bgt G_M32124_IG27 ;; size=24 bbWeight=1 PerfScore 7.00 G_M32124_IG26: ;; offset=0450H 9100A3A0 add x0, fp, #40 // [V20 tmp10] 52802261 mov w1, #275 97FF3716 bl CORINFO_HELP_PATCHPOINT ;; size=12 bbWeight=0.01 PerfScore 0.02 G_M32124_IG27: ;; offset=045CH B94087A0 ldr w0, [fp,#132] // [V07 loc5] 7100001F cmp w0, #0 54FFF6CA bge G_M32124_IG20 F9405FA0 ldr x0, [fp,#184] // [V00 this] B9401400 ldr w0, [x0,#20] B90083A0 str w0, [fp,#128] // [V08 loc6] B94083A0 ldr w0, [fp,#128] // [V08 loc6] 11000400 add w0, w0, #1 F9405FA1 ldr x1, [fp,#184] // [V00 this] B9001420 str w0, [x1,#20] ;; size=40 bbWeight=1 PerfScore 15.00 G_M32124_IG28: ;; offset=0484H B9402BA0 ldr w0, [fp,#40] // [V20 tmp10] 51000400 sub w0, w0, #1 B9002BA0 str w0, [fp,#40] // [V20 tmp10] B9402BA0 ldr w0, [fp,#40] // [V20 tmp10] 7100001F cmp w0, #0 5400008C bgt G_M32124_IG30 ;; size=24 bbWeight=1 PerfScore 7.00 G_M32124_IG29: ;; offset=049CH 9100A3A0 add x0, fp, #40 // [V20 tmp10] 52802541 mov w1, #298 97FF3703 bl CORINFO_HELP_PATCHPOINT ;; size=12 bbWeight=0.01 PerfScore 0.02 G_M32124_IG30: ;; offset=04A8H F9405FA0 ldr x0, [fp,#184] // [V00 this] B9401400 ldr w0, [x0,#20] 5290D401 movz w1, #0x86a0 72A00021 movk w1, #1 LSL #16 6B01001F cmp w0, w1 54FFDECB blt G_M32124_IG04 14000001 b G_M32124_IG31 ;; size=28 bbWeight=1 PerfScore 8.50 G_M32124_IG31: ;; offset=04C4H F9405FA0 ldr x0, [fp,#184] // [V00 this] 12800021 movn w1, #1 B9001001 str w1, [x0,#16] F9405FA0 ldr x0, [fp,#184] // [V00 this] F900041F str xzr, [x0,#8] F9405FA0 ldr x0, [fp,#184] // [V00 this] 39C0001F ldrsb wzr, [x0] F9405FA0 ldr x0, [fp,#184] // [V00 this] 91006000 add x0, x0, #24 D29E1501 movz x1, #0xf0a8 // code for AsyncTaskMethodBuilder:SetResult F2A40F61 movk x1, #0x207b LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 F9400021 ldr x1, [x1] D63F0020 blr x1 ;; size=56 bbWeight=1 PerfScore 19.50 G_M32124_IG32: ;; offset=04FCH A8CD7BFD ldp fp, lr, [sp],#208 D65F03C0 ret lr ;; size=8 bbWeight=1 PerfScore 2.00 G_M32124_IG33: ;; offset=0504H A9BE7BFD stp fp, lr, [sp,#-32]! 910343A3 add x3, fp, #208 F9000FE3 str x3, [sp,#24] ;; size=12 bbWeight=1 PerfScore 2.50 G_M32124_IG34: ;; offset=0510H F9001BA0 str x0, [fp,#48] // [V19 tmp9] F9401BA0 ldr x0, [fp,#48] // [V19 tmp9] F9003FA0 str x0, [fp,#120] // [V09 loc7] F9405FA0 ldr x0, [fp,#184] // [V00 this] 12800021 movn w1, #1 B9001001 str w1, [x0,#16] F9405FA0 ldr x0, [fp,#184] // [V00 this] F900041F str xzr, [x0,#8] F9405FA0 ldr x0, [fp,#184] // [V00 this] 39C0001F ldrsb wzr, [x0] F9405FA0 ldr x0, [fp,#184] // [V00 this] 91006000 add x0, x0, #24 F9403FA1 ldr x1, [fp,#120] // [V09 loc7] D29E1802 movz x2, #0xf0c0 // code for AsyncTaskMethodBuilder:SetException F2A40F62 movk x2, #0x207b LSL #16 F2CFFF02 movk x2, #0x7ff8 LSL #32 F9400042 ldr x2, [x2] D63F0040 blr x2 10FFFD20 adr x0, [G_M32124_IG32] ;; size=76 bbWeight=1 PerfScore 26.00 G_M32124_IG35: ;; offset=055CH A8C27BFD ldp fp, lr, [sp],#32 D65F03C0 ret lr ;; size=8 bbWeight=1 PerfScore 4.00 ; Total bytes of code 1380, prolog size 56, PerfScore 604.81, instruction count 345, allocated bytes for code 1380 (MethodHash=440a8283) for method d__23:MoveNext():this ; ============================================================ ; Assembly listing for method d__23:MoveNext():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; OSR variant for entry point 0x113 ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 4 inlinees with PGO data; 8 single block inlinees; 0 inlinees without PGO data ; Final local variable assignments ; ; V00 this [V00,T09] ( 17, 97 ) byref -> [fp+F8H] this EH-live single-def tier0-frame ; V01 TypeCtx [V01,T16] ( 9, 52.50) long -> x19 single-def ;* V02 loc0 [V02 ] ( 0, 0 ) int -> zero-ref ; V03 loc1 [V03,T00] ( 11,236 ) ref -> x20 class-hnd ; V04 loc2 [V04,T05] ( 7,164 ) int -> x21 ; V05 loc3 [V05 ] ( 3, 3 ) struct ( 8) [fp+D0H] do-not-enreg[XS] addr-exposed ld-addr-op tier0-frame ;* V06 loc4 [V06 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op ; V07 loc5 [V07,T01] ( 9,204 ) int -> x21 ; V08 loc6 [V08,T19] ( 2, 16 ) int -> x0 ;* V09 loc7 [V09 ] ( 0, 0 ) ref -> zero-ref class-hnd ;# V10 OutArgs [V10 ] ( 1, 1 ) lclBlk ( 0) [sp+00H] "OutgoingArgSpace" ; V11 tmp1 [V11,T14] ( 2, 64 ) ref -> x22 class-hnd "bubbling QMark1" ; V12 tmp2 [V12,T12] ( 3, 64 ) long -> x0 "spilling Runtime Lookup tree" ;* V13 tmp3 [V13 ] ( 0, 0 ) ref -> zero-ref class-hnd "non-inline candidate call" ; V14 tmp4 [V14,T15] ( 2, 64 ) ref -> x22 class-hnd "bubbling QMark1" ; V15 tmp5 [V15,T13] ( 3, 64 ) long -> x0 "spilling Runtime Lookup tree" ; V16 tmp6 [V16,T22] ( 2, 4 ) byref -> x20 "bubbling QMark1" ; V17 tmp7 [V17,T21] ( 3, 4 ) long -> x1 "spilling Runtime Lookup tree" ;* V18 tmp8 [V18 ] ( 0, 0 ) int -> zero-ref "dup spill" ; V19 tmp9 [V19,T35] ( 2, 0 ) ref -> x1 class-hnd single-def "impSpillSpecialSideEff" ;* V20 tmp10 [V20,T25] ( 0, 0 ) int -> zero-ref "OSR entry state var" ;* V21 tmp11 [V21 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "Inline ldloca(s) first use temp" ;* V22 tmp12 [V22 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "Inline ldloca(s) first use temp" ; V23 tmp13 [V23,T20] ( 4, 6 ) byref -> x14 single-def "Inlining Arg" ;* V24 tmp14 [V24 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op single-def "Inline ldloca(s) first use temp" ; V25 tmp15 [V25,T27] ( 8, 0.01) ref -> x19 class-hnd single-def "Inlining Arg" ; V26 tmp16 [V26,T30] ( 2, 0.01) struct ( 8) x20 "Inlining Arg" ;* V27 tmp17 [V27 ] ( 0, 0 ) ref -> zero-ref class-hnd "impAppendStmt" ;* V28 tmp18 [V28 ] ( 0, 0 ) ref -> zero-ref class-hnd "Inlining Arg" ;* V29 tmp19 [V29 ] ( 0, 0 ) bool -> zero-ref single-def "Inline return value spill temp" ; V30 tmp20 [V30,T32] ( 3, 0.00) bool -> x21 "Inline stloc first use temp" ; V31 tmp21 [V31,T31] ( 2, 0.01) struct ( 8) x20 "Inlining Arg" ; V32 tmp22 [V32,T33] ( 3, 0.00) ref -> x23 class-hnd "Inline stloc first use temp" ; V33 tmp23 [V33,T34] ( 3, 0 ) bool -> x0 "Inline return value spill temp" ; V34 tmp24 [V34,T29] ( 5, 0.01) int -> x0 single-def "Inline stloc first use temp" ; V35 tmp25 [V35,T02] ( 3,192 ) ref -> x0 "argument with side effect" ; V36 tmp26 [V36,T06] ( 2,128 ) ref -> x2 "argument with side effect" ; V37 tmp27 [V37,T07] ( 2,128 ) ref -> x22 "argument with side effect" ; V38 tmp28 [V38,T10] ( 3, 96 ) ref -> x0 "arr expr" ; V39 tmp29 [V39,T11] ( 3, 96 ) ref -> x0 "arr expr" ; V40 tmp30 [V40,T03] ( 3,192 ) ref -> x1 "arr expr" ; V41 tmp31 [V41,T04] ( 3,192 ) ref -> x0 "argument with side effect" ; V42 tmp32 [V42,T08] ( 2,128 ) ref -> x1 "argument with side effect" ; V43 tmp33 [V43,T36] ( 2, 0 ) ref -> x21 single-def "argument with side effect" ; V44 tmp34 [V44,T37] ( 2, 0 ) int -> x1 "argument with side effect" ; V45 PSPSym [V45,T26] ( 1, 1 ) long -> [fp+10H] do-not-enreg[V] "PSPSym" ;* V46 tmp36 [V46 ] ( 0, 0 ) byref -> zero-ref "optAddCopies" ; V47 cse0 [V47,T17] ( 3, 40 ) long -> x0 "CSE - moderate" ; V48 cse1 [V48,T18] ( 3, 40 ) long -> x0 "CSE - moderate" ; V49 cse2 [V49,T23] ( 3, 2.50) long -> x1 "CSE - moderate" ; V50 cse3 [V50,T28] ( 5, 0.01) byref -> x22 "CSE - conservative" ; V51 cse4 [V51,T24] ( 2, 2 ) byref -> x0 "CSE - moderate" ; ; Lcl frame size = 8 G_M32124_IG01: ;; offset=0000H A9BC7BFD stp fp, lr, [sp,#-64]! A901D3F3 stp x19, x20, [sp,#24] A902DBF5 stp x21, x22, [sp,#40] F9001FF7 str x23, [sp,#56] 910003FD mov fp, sp 910443F1 add xip1, sp, #272 F9000BB1 str xip1, [fp,#16] // [V45 PSPSym] F9407BB3 ldr x19, [fp,#240] F94073B4 ldr x20, [fp,#224] B940C7B5 ldr w21, [fp,#196] ;; size=40 bbWeight=1 PerfScore 12.00 G_M32124_IG02: ;; offset=0028H 14000050 b G_M32124_IG17 ;; size=4 bbWeight=1 PerfScore 1.00 G_M32124_IG03: ;; offset=002CH 2A1F03F5 mov w21, wzr F9400A80 ldr x0, [x20,#16] B9400800 ldr w0, [x0,#8] 7100001F cmp w0, #0 5400056D ble G_M32124_IG11 ;; size=20 bbWeight=4 PerfScore 32.00 G_M32124_IG04: ;; offset=0040H F9407FA3 ldr x3, [fp,#248] // [V00 this] F9400A96 ldr x22, [x20,#16] F9400460 ldr x0, [x3,#8] B9401A81 ldr w1, [x20,#24] F9400002 ldr x2, [x0] F9402042 ldr x2, [x2,#64] F9401042 ldr x2, [x2,#32] D63F0040 blr x2 AA0003E2 mov x2, x0 AA1603E0 mov x0, x22 2A1503E1 mov w1, w21 97FF35E3 bl CORINFO_HELP_ARRADDR_ST 39407280 ldrb w0, [x20,#28] 34000300 cbz w0, G_M32124_IG10 ;; size=56 bbWeight=32 PerfScore 880.00 G_M32124_IG05: ;; offset=0078H F9400A80 ldr x0, [x20,#16] B9400801 ldr w1, [x0,#8] 6B0102BF cmp w21, w1 54000102 bhs G_M32124_IG07 91004000 add x0, x0, #16 F8755816 ldr x22, [x0, w21, UXTW #3] F9401A60 ldr x0, [x19,#48] F9400000 ldr x0, [x0] F9400800 ldr x0, [x0,#16] B4000060 cbz x0, G_M32124_IG08 ;; size=40 bbWeight=16 PerfScore 336.00 G_M32124_IG06: ;; offset=00A0H 14000007 b G_M32124_IG09 ;; size=4 bbWeight=8 PerfScore 8.00 G_M32124_IG07: ;; offset=00A4H 97FF360D bl CORINFO_HELP_RNGCHKFAIL ;; size=4 bbWeight=0 PerfScore 0.00 G_M32124_IG08: ;; offset=00A8H AA1303E0 mov x0, x19 D282A701 movz x1, #0x1538 F2A40FC1 movk x1, #0x207e LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 97FF3644 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS ;; size=20 bbWeight=8 PerfScore 24.00 G_M32124_IG09: ;; offset=00BCH AA1603E1 mov x1, x22 D2829F02 movz x2, #0x14f8 // code for RentReturnArrayPoolTests`1:Clear F2A40C22 movk x2, #0x2061 LSL #16 F2CFFF02 movk x2, #0x7ff8 LSL #32 F9400042 ldr x2, [x2] D63F0040 blr x2 ;; size=24 bbWeight=16 PerfScore 96.00 G_M32124_IG10: ;; offset=00D4H 110006B5 add w21, w21, #1 F9400A80 ldr x0, [x20,#16] B9400800 ldr w0, [x0,#8] 6B15001F cmp w0, w21 54FFFAEC bgt G_M32124_IG04 ;; size=20 bbWeight=32 PerfScore 256.00 G_M32124_IG11: ;; offset=00E8H 39407680 ldrb w0, [x20,#29] 34000380 cbz w0, G_M32124_IG16 ;; size=8 bbWeight=4 PerfScore 16.00 G_M32124_IG12: ;; offset=00F0H 390343BF strb wzr, [fp,#208] // [V05 loc3] F9407FA3 ldr x3, [fp,#248] // [V00 this] B900107F str wzr, [x3,#16] 91008060 add x0, x3, #32 394343A1 ldrb w1, [fp,#208] // [V05 loc3] 39000001 strb w1, [x0] 91006074 add x20, x3, #24 F9401A60 ldr x0, [x19,#48] F9400000 ldr x0, [x0] F9400C01 ldr x1, [x0,#24] B4000041 cbz x1, G_M32124_IG14 ;; size=44 bbWeight=1 PerfScore 18.00 G_M32124_IG13: ;; offset=011CH 14000007 b G_M32124_IG15 ;; size=4 bbWeight=0.50 PerfScore 0.50 G_M32124_IG14: ;; offset=0120H AA1303E0 mov x0, x19 D282C601 movz x1, #0x1630 F2A40FC1 movk x1, #0x207e LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 97FF3626 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS AA0003E1 mov x1, x0 ;; size=24 bbWeight=0.50 PerfScore 1.75 G_M32124_IG15: ;; offset=0138H 910343A2 add x2, fp, #208 // [V05 loc3] AA1403E0 mov x0, x20 F9407FA3 ldr x3, [fp,#248] // [V00 this] D29F9804 movz x4, #0xfcc0 // code for AsyncTaskMethodBuilder:AwaitUnsafeOnCompleted F2A40F64 movk x4, #0x207b LSL #16 F2CFFF04 movk x4, #0x7ff8 LSL #32 F9400084 ldr x4, [x4] D63F0080 blr x4 14000066 b G_M32124_IG34 ;; size=36 bbWeight=1 PerfScore 9.50 G_M32124_IG16: ;; offset=015CH F9400A8E ldr x14, [x20,#16] B94009CE ldr w14, [x14,#8] 510005D5 sub w21, w14, #1 ;; size=12 bbWeight=4 PerfScore 26.00 G_M32124_IG17: ;; offset=0168H 710002BF cmp w21, #0 5400052B blt G_M32124_IG24 ;; size=8 bbWeight=8 PerfScore 12.00 G_M32124_IG18: ;; offset=0170H 39407280 ldrb w0, [x20,#28] 340002E0 cbz w0, G_M32124_IG23 ;; size=8 bbWeight=32 PerfScore 128.00 G_M32124_IG19: ;; offset=0178H F9400A80 ldr x0, [x20,#16] B9400801 ldr w1, [x0,#8] 6B0102BF cmp w21, w1 54FFF902 bhs G_M32124_IG07 91004000 add x0, x0, #16 F8755816 ldr x22, [x0, w21, UXTW #3] F9401A60 ldr x0, [x19,#48] F9400000 ldr x0, [x0] F9400800 ldr x0, [x0,#16] B4000040 cbz x0, G_M32124_IG21 ;; size=40 bbWeight=16 PerfScore 336.00 G_M32124_IG20: ;; offset=01A0H 14000006 b G_M32124_IG22 ;; size=4 bbWeight=8 PerfScore 8.00 G_M32124_IG21: ;; offset=01A4H AA1303E0 mov x0, x19 D282A701 movz x1, #0x1538 F2A40FC1 movk x1, #0x207e LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 97FF3605 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS ;; size=20 bbWeight=8 PerfScore 24.00 G_M32124_IG22: ;; offset=01B8H AA1603E1 mov x1, x22 D282A202 movz x2, #0x1510 // code for RentReturnArrayPoolTests`1:IterateAll F2A40C22 movk x2, #0x2061 LSL #16 F2CFFF02 movk x2, #0x7ff8 LSL #32 F9400042 ldr x2, [x2] D63F0040 blr x2 ;; size=24 bbWeight=16 PerfScore 96.00 G_M32124_IG23: ;; offset=01D0H F9407FA3 ldr x3, [fp,#248] // [V00 this] F9400460 ldr x0, [x3,#8] F9400A81 ldr x1, [x20,#16] B9400822 ldr w2, [x1,#8] 6B0202BF cmp w21, w2 54FFF602 bhs G_M32124_IG07 91004021 add x1, x1, #16 F8755821 ldr x1, [x1, w21, UXTW #3] 2A1F03E2 mov w2, wzr F9400004 ldr x4, [x0] F9402084 ldr x4, [x4,#64] F9401484 ldr x4, [x4,#40] D63F0080 blr x4 510006B5 sub w21, w21, #1 710002BF cmp w21, #0 54FFFB2A bge G_M32124_IG18 ;; size=64 bbWeight=32 PerfScore 912.00 G_M32124_IG24: ;; offset=0210H F9407FA3 ldr x3, [fp,#248] // [V00 this] B9401460 ldr w0, [x3,#20] 11000400 add w0, w0, #1 B9001460 str w0, [x3,#20] B9401460 ldr w0, [x3,#20] 5290D401 movz w1, #0x86a0 72A00021 movk w1, #1 LSL #16 6B01001F cmp w0, w1 54FFEFEB blt G_M32124_IG03 ;; size=36 bbWeight=8 PerfScore 96.00 G_M32124_IG25: ;; offset=0234H 1280002E movn w14, #1 B900106E str w14, [x3,#16] F900047F str xzr, [x3,#8] 9100606E add x14, x3, #24 F94001CF ldr x15, [x14] B50000EF cbnz x15, G_M32124_IG27 ;; size=24 bbWeight=1 PerfScore 7.00 G_M32124_IG26: ;; offset=024CH D281380F movz x15, #0x9c0 F2A7600F movk x15, #0x3b00 LSL #16 F2C0428F movk x15, #532 LSL #32 F94001EF ldr x15, [x15] 97F6F5A4 bl CORINFO_HELP_CHECKED_ASSIGN_REF 14000024 b G_M32124_IG34 ;; size=24 bbWeight=1.00 PerfScore 6.49 G_M32124_IG27: ;; offset=0264H F94001D3 ldr x19, [x14] 2A1F03F4 mov w20, wzr D2896C00 movz x0, #0x4b60 F2A40580 movk x0, #0x202c LSL #16 F2CFFF00 movk x0, #0x7ff8 LSL #32 52807AC1 mov w1, #982 97FF359F bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE D2815900 movz x0, #0xac8 // data for TplEventSource:Log F2A76000 movk x0, #0x3b00 LSL #16 F2C04280 movk x0, #532 LSL #32 F9400000 ldr x0, [x0] 39427400 ldrb w0, [x0,#157] 35000460 cbnz w0, G_M32124_IG36 ;; size=52 bbWeight=0.00 PerfScore 0.02 G_M32124_IG28: ;; offset=0298H 2A1F03F5 mov w21, wzr 9100D276 add x22, x19, #52 88DFFEC0 ldar w0, [x22] 52A0AC01 mov w1, #0x5600000 6A01001F tst w0, w1 540002E0 beq G_M32124_IG35 ;; size=24 bbWeight=0.00 PerfScore 0.01 G_M32124_IG29: ;; offset=02B0H 2A1F03E0 mov w0, wzr ;; size=4 bbWeight=0 PerfScore 0.00 G_M32124_IG30: ;; offset=02B4H 340001C0 cbz w0, G_M32124_IG33 ;; size=4 bbWeight=0 PerfScore 0.00 G_M32124_IG31: ;; offset=02B8H 3900E274 strb w20, [x19,#56] 88DFFEC0 ldar w0, [x22] 32080000 orr w0, w0, #0x1000000 B8E082C0 swpal w0, w0, [x22] F9401677 ldr x23, [x19,#40] B50005F7 cbnz x23, G_M32124_IG37 ;; size=24 bbWeight=0.00 PerfScore 0.02 G_M32124_IG32: ;; offset=02D0H AA1303E0 mov x0, x19 D2868101 movz x1, #0x3408 // code for Task:FinishContinuations F2A40B01 movk x1, #0x2058 LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 F9400021 ldr x1, [x1] D63F0020 blr x1 52800035 mov w21, #1 ;; size=28 bbWeight=0.00 PerfScore 0.01 G_M32124_IG33: ;; offset=02ECH 34000695 cbz w21, G_M32124_IG38 ;; size=4 bbWeight=0.00 PerfScore 0.00 G_M32124_IG34: ;; offset=02F0H F9401FF7 ldr x23, [sp,#56] A942DBF5 ldp x21, x22, [sp,#40] A941D3F3 ldp x19, x20, [sp,#24] A8C47BFD ldp fp, lr, [sp],#64 910343FF add sp, sp, #208 D65F03C0 ret lr ;; size=24 bbWeight=1 PerfScore 6.50 G_M32124_IG35: ;; offset=0308H 32060001 orr w1, w0, #0x4000000 2A0003E2 mov w2, w0 88E2FEC1 casal w2, w1, [x22] 6B00005F cmp w2, w0 54000601 bne G_M32124_IG39 17FFFFE7 b G_M32124_IG31 ;; size=24 bbWeight=0.00 PerfScore 0.01 G_M32124_IG36: ;; offset=0320H D2896C00 movz x0, #0x4b60 F2A40580 movk x0, #0x202c LSL #16 F2CFFF00 movk x0, #0x7ff8 LSL #32 52807AC1 mov w1, #982 97FF3572 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE D2815900 movz x0, #0xac8 // data for TplEventSource:Log F2A76000 movk x0, #0x3b00 LSL #16 F2C04280 movk x0, #532 LSL #32 F9400015 ldr x21, [x0] AA1303E0 mov x0, x19 D2834701 movz x1, #0x1a38 // code for Task:get_Id F2A40B01 movk x1, #0x2058 LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 F9400021 ldr x1, [x1] B940001F ldr wzr, [x0] D63F0020 blr x1 2A0003E1 mov w1, w0 AA1503E0 mov x0, x21 52800022 mov w2, #1 D2826903 movz x3, #0x1348 // code for TplEventSource:TraceOperationEnd F2A40FE3 movk x3, #0x207f LSL #16 F2CFFF03 movk x3, #0x7ff8 LSL #32 F9400063 ldr x3, [x3] B940001F ldr wzr, [x0] D63F0060 blr x3 17FFFFC5 b G_M32124_IG28 ;; size=104 bbWeight=0 PerfScore 0.00 G_M32124_IG37: ;; offset=0388H AA1303E0 mov x0, x19 D2860901 movz x1, #0x3048 // code for Task:NotifyParentIfPotentiallyAttachedTask F2A40B01 movk x1, #0x2058 LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 F9400021 ldr x1, [x1] D63F0020 blr x1 AA1703E0 mov x0, x23 D2834401 movz x1, #0x1a20 // code for ContingentProperties:SetCompleted F2A40FE1 movk x1, #0x207f LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 F9400021 ldr x1, [x1] D63F0020 blr x1 17FFFFC6 b G_M32124_IG32 ;; size=52 bbWeight=0 PerfScore 0.00 G_M32124_IG38: ;; offset=03BCH 528002E0 mov w0, #23 D29A8401 movz x1, #0xd420 // code for ThrowHelper:ThrowInvalidOperationException F2A40B01 movk x1, #0x2058 LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 F9400021 ldr x1, [x1] D63F0020 blr x1 D43E0000 brk_windows #0 ;; size=28 bbWeight=0 PerfScore 0.00 G_M32124_IG39: ;; offset=03D8H AA1303E0 mov x0, x19 52A08001 mov w1, #0x4000000 52A0AC02 mov w2, #0x5600000 D2830B03 movz x3, #0x1858 // code for Task:AtomicStateUpdateSlow F2A40B03 movk x3, #0x2058 LSL #16 F2CFFF03 movk x3, #0x7ff8 LSL #32 F9400063 ldr x3, [x3] D63F0060 blr x3 17FFFFAF b G_M32124_IG30 ;; size=36 bbWeight=0 PerfScore 0.00 G_M32124_IG40: ;; offset=03FCH D10443FF sub sp, sp, #272 A9007BFD stp fp, lr, [sp] A901D3F3 stp x19, x20, [sp,#24] A902DBF5 stp x21, x22, [sp,#40] F9001FF7 str x23, [sp,#56] 910443A3 add x3, fp, #272 F9000BE3 str x3, [sp,#16] ;; size=28 bbWeight=0 PerfScore 0.00 G_M32124_IG41: ;; offset=0418H AA0003E1 mov x1, x0 12800020 movn w0, #1 F9407FA3 ldr x3, [fp,#248] // [V00 this] B9001060 str w0, [x3,#16] F900047F str xzr, [x3,#8] 91006060 add x0, x3, #24 D29E1802 movz x2, #0xf0c0 // code for AsyncTaskMethodBuilder:SetException F2A40F62 movk x2, #0x207b LSL #16 F2CFFF02 movk x2, #0x7ff8 LSL #32 F9400042 ldr x2, [x2] D63F0040 blr x2 10FFF560 adr x0, [G_M32124_IG34] ;; size=48 bbWeight=0 PerfScore 0.00 G_M32124_IG42: ;; offset=0448H F9401FF7 ldr x23, [sp,#56] A942DBF5 ldp x21, x22, [sp,#40] A941D3F3 ldp x19, x20, [sp,#24] A9407BFD ldp fp, lr, [sp] 910443FF add sp, sp, #272 D65F03C0 ret lr ;; size=24 bbWeight=0 PerfScore 0.00 ; Total bytes of code 1120, prolog size 40, PerfScore 3460.81, instruction count 280, allocated bytes for code 1120 (MethodHash=440a8283) for method d__23:MoveNext():this ; ============================================================ ; Assembly listing for method d__23:MoveNext():this ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; Tier-1 compilation ; optimized code ; fp based frame ; fully interruptible ; No PGO data ; 4 inlinees with PGO data; 8 single block inlinees; 0 inlinees without PGO data ; Final local variable assignments ; ; V00 this [V00,T09] ( 25,105 ) byref -> [fp+18H] this EH-live single-def ; V01 TypeCtx [V01,T16] ( 9, 52.50) long -> x19 single-def ; V02 loc0 [V02,T24] ( 2, 2 ) int -> x1 ; V03 loc1 [V03,T00] ( 13,242 ) ref -> x20 class-hnd single-def ; V04 loc2 [V04,T05] ( 7,164 ) int -> x21 ; V05 loc3 [V05 ] ( 4, 4 ) struct ( 8) [fp+20H] do-not-enreg[XS] must-init addr-exposed ld-addr-op ;* V06 loc4 [V06 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op ; V07 loc5 [V07,T01] ( 9,208 ) int -> x21 ; V08 loc6 [V08,T19] ( 2, 16 ) int -> x14 ;* V09 loc7 [V09 ] ( 0, 0 ) ref -> zero-ref class-hnd single-def ;# V10 OutArgs [V10 ] ( 1, 1 ) lclBlk ( 0) [sp+00H] "OutgoingArgSpace" ;* V11 tmp1 [V11 ] ( 0, 0 ) int -> zero-ref "dup spill" ; V12 tmp2 [V12,T14] ( 2, 64 ) ref -> x22 class-hnd "bubbling QMark1" ; V13 tmp3 [V13,T12] ( 3, 64 ) long -> x1 "spilling Runtime Lookup tree" ;* V14 tmp4 [V14 ] ( 0, 0 ) ref -> zero-ref class-hnd "non-inline candidate call" ; V15 tmp5 [V15,T15] ( 2, 64 ) ref -> x22 class-hnd "bubbling QMark1" ; V16 tmp6 [V16,T13] ( 3, 64 ) long -> x0 "spilling Runtime Lookup tree" ; V17 tmp7 [V17,T22] ( 2, 4 ) byref -> x20 "bubbling QMark1" ; V18 tmp8 [V18,T21] ( 3, 4 ) long -> x1 "spilling Runtime Lookup tree" ; V19 tmp9 [V19,T34] ( 2, 0 ) ref -> x1 class-hnd single-def "impSpillSpecialSideEff" ;* V20 tmp10 [V20 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "Inline ldloca(s) first use temp" ;* V21 tmp11 [V21 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op "Inline ldloca(s) first use temp" ; V22 tmp12 [V22,T20] ( 4, 6 ) byref -> x14 single-def "Inlining Arg" ;* V23 tmp13 [V23 ] ( 0, 0 ) struct ( 8) zero-ref ld-addr-op single-def "Inline ldloca(s) first use temp" ; V24 tmp14 [V24,T26] ( 8, 0.01) ref -> x19 class-hnd single-def "Inlining Arg" ; V25 tmp15 [V25,T29] ( 2, 0.01) struct ( 8) x20 "Inlining Arg" ;* V26 tmp16 [V26 ] ( 0, 0 ) ref -> zero-ref class-hnd "impAppendStmt" ;* V27 tmp17 [V27 ] ( 0, 0 ) ref -> zero-ref class-hnd "Inlining Arg" ;* V28 tmp18 [V28 ] ( 0, 0 ) bool -> zero-ref single-def "Inline return value spill temp" ; V29 tmp19 [V29,T31] ( 3, 0.00) bool -> x21 "Inline stloc first use temp" ; V30 tmp20 [V30,T30] ( 2, 0.01) struct ( 8) x20 "Inlining Arg" ; V31 tmp21 [V31,T32] ( 3, 0.00) ref -> x23 class-hnd "Inline stloc first use temp" ; V32 tmp22 [V32,T33] ( 3, 0 ) bool -> x0 "Inline return value spill temp" ; V33 tmp23 [V33,T28] ( 5, 0.01) int -> x0 single-def "Inline stloc first use temp" ; V34 tmp24 [V34,T02] ( 3,192 ) ref -> x0 "argument with side effect" ; V35 tmp25 [V35,T06] ( 2,128 ) ref -> x2 "argument with side effect" ; V36 tmp26 [V36,T07] ( 2,128 ) ref -> x22 "argument with side effect" ; V37 tmp27 [V37,T10] ( 3, 96 ) ref -> x0 "arr expr" ; V38 tmp28 [V38,T11] ( 3, 96 ) ref -> x1 "arr expr" ; V39 tmp29 [V39,T03] ( 3,192 ) ref -> x1 "arr expr" ; V40 tmp30 [V40,T04] ( 3,192 ) ref -> x3 "argument with side effect" ; V41 tmp31 [V41,T08] ( 2,128 ) ref -> x1 "argument with side effect" ; V42 tmp32 [V42,T35] ( 2, 0 ) ref -> x21 single-def "argument with side effect" ; V43 tmp33 [V43,T36] ( 2, 0 ) int -> x1 "argument with side effect" ; V44 PSPSym [V44,T25] ( 1, 1 ) long -> [fp+30H] do-not-enreg[V] "PSPSym" ;* V45 tmp35 [V45 ] ( 0, 0 ) byref -> zero-ref "optAddCopies" ; V46 cse0 [V46,T17] ( 3, 40 ) long -> x0 "CSE - moderate" ; V47 cse1 [V47,T18] ( 3, 40 ) long -> x1 "CSE - moderate" ; V48 cse2 [V48,T23] ( 3, 2.50) long -> x1 "CSE - moderate" ; V49 cse3 [V49,T27] ( 5, 0.01) byref -> x22 "CSE - conservative" ; ; Lcl frame size = 40 G_M32124_IG01: ;; offset=0000H A9BA7BFD stp fp, lr, [sp,#-96]! A903D3F3 stp x19, x20, [sp,#56] A904DBF5 stp x21, x22, [sp,#72] F9002FF7 str x23, [sp,#88] 910003FD mov fp, sp F90013BF str xzr, [fp,#32] // [V05 loc3] 910183E2 add x2, sp, #96 F9001BA2 str x2, [fp,#48] // [V44 PSPSym] F90017A1 str x1, [fp,#40] F9000FA0 str x0, [fp,#24] // [V00 this] AA0103F3 mov x19, x1 ;; size=44 bbWeight=1 PerfScore 9.50 G_M32124_IG02: ;; offset=002CH B9401001 ldr w1, [x0,#16] F9400014 ldr x20, [x0] ;; size=8 bbWeight=1 PerfScore 6.00 G_M32124_IG03: ;; offset=0034H 34000BA1 cbz w1, G_M32124_IG17 AA1403E0 mov x0, x20 D2829C01 movz x1, #0x14e0 // code for RentReturnArrayPoolTests`1:get_Pool F2A40C21 movk x1, #0x2061 LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 F9400021 ldr x1, [x1] D63F0020 blr x1 F9400FA3 ldr x3, [fp,#24] // [V00 this] 9100206E add x14, x3, #8 AA0003EF mov x15, x0 97F6C3EC bl CORINFO_HELP_CHECKED_ASSIGN_REF B900147F str wzr, [x3,#20] B9401460 ldr w0, [x3,#20] 5290D401 movz w1, #0x86a0 72A00021 movk w1, #1 LSL #16 6B01001F cmp w0, w1 5400118A bge G_M32124_IG26 ;; size=68 bbWeight=1 PerfScore 17.50 G_M32124_IG04: ;; offset=0078H F9400FA3 ldr x3, [fp,#24] // [V00 this] 2A1F03F5 mov w21, wzr F9400A80 ldr x0, [x20,#16] B9400800 ldr w0, [x0,#8] 7100001F cmp w0, #0 5400056D ble G_M32124_IG12 ;; size=24 bbWeight=4 PerfScore 40.00 G_M32124_IG05: ;; offset=0090H F9400FA3 ldr x3, [fp,#24] // [V00 this] F9400A96 ldr x22, [x20,#16] F9400460 ldr x0, [x3,#8] B9401A81 ldr w1, [x20,#24] F9400002 ldr x2, [x0] F9402042 ldr x2, [x2,#64] F9401042 ldr x2, [x2,#32] D63F0040 blr x2 AA0003E2 mov x2, x0 AA1603E0 mov x0, x22 2A1503E1 mov w1, w21 97FF0397 bl CORINFO_HELP_ARRADDR_ST 39407280 ldrb w0, [x20,#28] 34000300 cbz w0, G_M32124_IG11 ;; size=56 bbWeight=32 PerfScore 880.00 G_M32124_IG06: ;; offset=00C8H F9400A80 ldr x0, [x20,#16] B9400801 ldr w1, [x0,#8] 6B0102BF cmp w21, w1 54000102 bhs G_M32124_IG08 91004000 add x0, x0, #16 F8755816 ldr x22, [x0, w21, UXTW #3] F9401A60 ldr x0, [x19,#48] F9400000 ldr x0, [x0] F9400800 ldr x0, [x0,#16] B4000060 cbz x0, G_M32124_IG09 ;; size=40 bbWeight=16 PerfScore 336.00 G_M32124_IG07: ;; offset=00F0H 14000007 b G_M32124_IG10 ;; size=4 bbWeight=8 PerfScore 8.00 G_M32124_IG08: ;; offset=00F4H 97FF03C1 bl CORINFO_HELP_RNGCHKFAIL ;; size=4 bbWeight=0 PerfScore 0.00 G_M32124_IG09: ;; offset=00F8H AA1303E0 mov x0, x19 D282A701 movz x1, #0x1538 F2A40FC1 movk x1, #0x207e LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 97FF03F8 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS ;; size=20 bbWeight=8 PerfScore 24.00 G_M32124_IG10: ;; offset=010CH AA1603E1 mov x1, x22 D2829F02 movz x2, #0x14f8 // code for RentReturnArrayPoolTests`1:Clear F2A40C22 movk x2, #0x2061 LSL #16 F2CFFF02 movk x2, #0x7ff8 LSL #32 F9400042 ldr x2, [x2] D63F0040 blr x2 ;; size=24 bbWeight=16 PerfScore 96.00 G_M32124_IG11: ;; offset=0124H 110006B5 add w21, w21, #1 F9400A80 ldr x0, [x20,#16] B9400800 ldr w0, [x0,#8] 6B15001F cmp w0, w21 54FFFAEC bgt G_M32124_IG05 ;; size=20 bbWeight=32 PerfScore 256.00 G_M32124_IG12: ;; offset=0138H 39407680 ldrb w0, [x20,#29] 34000420 cbz w0, G_M32124_IG18 ;; size=8 bbWeight=4 PerfScore 16.00 G_M32124_IG13: ;; offset=0140H 390083BF strb wzr, [fp,#32] // [V05 loc3] F9400FA3 ldr x3, [fp,#24] // [V00 this] B900107F str wzr, [x3,#16] 394083A0 ldrb w0, [fp,#32] // [V05 loc3] 39008060 strb w0, [x3,#32] 91006074 add x20, x3, #24 F9401A60 ldr x0, [x19,#48] F9400000 ldr x0, [x0] F9400C01 ldr x1, [x0,#24] B4000041 cbz x1, G_M32124_IG15 ;; size=40 bbWeight=1 PerfScore 17.50 G_M32124_IG14: ;; offset=0168H 14000007 b G_M32124_IG16 ;; size=4 bbWeight=0.50 PerfScore 0.50 G_M32124_IG15: ;; offset=016CH AA1303E0 mov x0, x19 D282C601 movz x1, #0x1630 F2A40FC1 movk x1, #0x207e LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 97FF03DB bl CORINFO_HELP_RUNTIMEHANDLE_CLASS AA0003E1 mov x1, x0 ;; size=24 bbWeight=0.50 PerfScore 1.75 G_M32124_IG16: ;; offset=0184H 910083A2 add x2, fp, #32 // [V05 loc3] AA1403E0 mov x0, x20 F9400FA3 ldr x3, [fp,#24] // [V00 this] D29F9804 movz x4, #0xfcc0 // code for AsyncTaskMethodBuilder:AwaitUnsafeOnCompleted F2A40F64 movk x4, #0x207b LSL #16 F2CFFF04 movk x4, #0x7ff8 LSL #32 F9400084 ldr x4, [x4] D63F0080 blr x4 14000070 b G_M32124_IG35 ;; size=36 bbWeight=1 PerfScore 9.50 G_M32124_IG17: ;; offset=01A8H F9400FA0 ldr x0, [fp,#24] // [V00 this] 39408001 ldrb w1, [x0,#32] 390083A1 strb w1, [fp,#32] // [V05 loc3] 3900801F strb wzr, [x0,#32] 12800001 movn w1, #0 B9001001 str w1, [x0,#16] ;; size=24 bbWeight=1 PerfScore 8.50 G_M32124_IG18: ;; offset=01C0H F9400A81 ldr x1, [x20,#16] B9400821 ldr w1, [x1,#8] 51000435 sub w21, w1, #1 710002BF cmp w21, #0 5400058B blt G_M32124_IG25 ;; size=20 bbWeight=8 PerfScore 64.00 G_M32124_IG19: ;; offset=01D4H 39407281 ldrb w1, [x20,#28] 34000321 cbz w1, G_M32124_IG24 ;; size=8 bbWeight=32 PerfScore 128.00 G_M32124_IG20: ;; offset=01DCH F9400A81 ldr x1, [x20,#16] B9400822 ldr w2, [x1,#8] 6B0202BF cmp w21, w2 54FFF862 bhs G_M32124_IG08 91004021 add x1, x1, #16 F8755836 ldr x22, [x1, w21, UXTW #3] F9401A61 ldr x1, [x19,#48] F9400021 ldr x1, [x1] F9400821 ldr x1, [x1,#16] B4000041 cbz x1, G_M32124_IG22 ;; size=40 bbWeight=16 PerfScore 336.00 G_M32124_IG21: ;; offset=0204H 14000007 b G_M32124_IG23 ;; size=4 bbWeight=8 PerfScore 8.00 G_M32124_IG22: ;; offset=0208H AA1303E0 mov x0, x19 D282A701 movz x1, #0x1538 F2A40FC1 movk x1, #0x207e LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 97FF03B4 bl CORINFO_HELP_RUNTIMEHANDLE_CLASS AA0003E1 mov x1, x0 ;; size=24 bbWeight=8 PerfScore 28.00 G_M32124_IG23: ;; offset=0220H AA0103E0 mov x0, x1 AA1603E1 mov x1, x22 D282A202 movz x2, #0x1510 // code for RentReturnArrayPoolTests`1:IterateAll F2A40C22 movk x2, #0x2061 LSL #16 F2CFFF02 movk x2, #0x7ff8 LSL #32 F9400042 ldr x2, [x2] D63F0040 blr x2 ;; size=28 bbWeight=16 PerfScore 104.00 G_M32124_IG24: ;; offset=023CH F9400FA0 ldr x0, [fp,#24] // [V00 this] F9400403 ldr x3, [x0,#8] F9400A81 ldr x1, [x20,#16] B9400822 ldr w2, [x1,#8] 6B0202BF cmp w21, w2 54FFF522 bhs G_M32124_IG08 91004021 add x1, x1, #16 F8755821 ldr x1, [x1, w21, UXTW #3] AA0303E0 mov x0, x3 2A1F03E2 mov w2, wzr F9400063 ldr x3, [x3] F9402063 ldr x3, [x3,#64] F9401463 ldr x3, [x3,#40] D63F0060 blr x3 510006B5 sub w21, w21, #1 710002BF cmp w21, #0 54FFFACA bge G_M32124_IG19 ;; size=68 bbWeight=32 PerfScore 928.00 G_M32124_IG25: ;; offset=0280H F9400FA0 ldr x0, [fp,#24] // [V00 this] B940140E ldr w14, [x0,#20] 110005CE add w14, w14, #1 B900140E str w14, [x0,#20] B940140E ldr w14, [x0,#20] 5290D40F movz w15, #0x86a0 72A0002F movk w15, #1 LSL #16 6B0F01DF cmp w14, w15 54FFEECB blt G_M32124_IG04 ;; size=36 bbWeight=8 PerfScore 96.00 G_M32124_IG26: ;; offset=02A4H F9400FA0 ldr x0, [fp,#24] // [V00 this] 1280002E movn w14, #1 B900100E str w14, [x0,#16] F900041F str xzr, [x0,#8] 9100600E add x14, x0, #24 F94001CF ldr x15, [x14] B50000EF cbnz x15, G_M32124_IG28 ;; size=28 bbWeight=1 PerfScore 9.00 G_M32124_IG27: ;; offset=02C0H D281380F movz x15, #0x9c0 F2A7600F movk x15, #0x3b00 LSL #16 F2C0428F movk x15, #532 LSL #32 F94001EF ldr x15, [x15] 97F6C34F bl CORINFO_HELP_CHECKED_ASSIGN_REF 14000024 b G_M32124_IG35 ;; size=24 bbWeight=1.00 PerfScore 6.49 G_M32124_IG28: ;; offset=02D8H F94001D3 ldr x19, [x14] 2A1F03F4 mov w20, wzr D2896C00 movz x0, #0x4b60 F2A40580 movk x0, #0x202c LSL #16 F2CFFF00 movk x0, #0x7ff8 LSL #32 52807AC1 mov w1, #982 97FF034A bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE D2815900 movz x0, #0xac8 // data for TplEventSource:Log F2A76000 movk x0, #0x3b00 LSL #16 F2C04280 movk x0, #532 LSL #32 F9400000 ldr x0, [x0] 39427400 ldrb w0, [x0,#157] 35000440 cbnz w0, G_M32124_IG37 ;; size=52 bbWeight=0.00 PerfScore 0.02 G_M32124_IG29: ;; offset=030CH 2A1F03F5 mov w21, wzr 9100D276 add x22, x19, #52 88DFFEC0 ldar w0, [x22] 52A0AC01 mov w1, #0x5600000 6A01001F tst w0, w1 540002C0 beq G_M32124_IG36 ;; size=24 bbWeight=0.00 PerfScore 0.01 G_M32124_IG30: ;; offset=0324H 2A1F03E0 mov w0, wzr ;; size=4 bbWeight=0 PerfScore 0.00 G_M32124_IG31: ;; offset=0328H 340001C0 cbz w0, G_M32124_IG34 ;; size=4 bbWeight=0 PerfScore 0.00 G_M32124_IG32: ;; offset=032CH 3900E274 strb w20, [x19,#56] 88DFFEC0 ldar w0, [x22] 32080000 orr w0, w0, #0x1000000 B8E082C0 swpal w0, w0, [x22] F9401677 ldr x23, [x19,#40] B50005D7 cbnz x23, G_M32124_IG38 ;; size=24 bbWeight=0.00 PerfScore 0.02 G_M32124_IG33: ;; offset=0344H AA1303E0 mov x0, x19 D2868101 movz x1, #0x3408 // code for Task:FinishContinuations F2A40B01 movk x1, #0x2058 LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 F9400021 ldr x1, [x1] D63F0020 blr x1 52800035 mov w21, #1 ;; size=28 bbWeight=0.00 PerfScore 0.01 G_M32124_IG34: ;; offset=0360H 34000675 cbz w21, G_M32124_IG39 ;; size=4 bbWeight=0.00 PerfScore 0.00 G_M32124_IG35: ;; offset=0364H F9402FF7 ldr x23, [sp,#88] A944DBF5 ldp x21, x22, [sp,#72] A943D3F3 ldp x19, x20, [sp,#56] A8C67BFD ldp fp, lr, [sp],#96 D65F03C0 ret lr ;; size=20 bbWeight=1 PerfScore 6.00 G_M32124_IG36: ;; offset=0378H 32060001 orr w1, w0, #0x4000000 2A0003E2 mov w2, w0 88E2FEC1 casal w2, w1, [x22] 6B00005F cmp w2, w0 54000601 bne G_M32124_IG40 17FFFFE8 b G_M32124_IG32 ;; size=24 bbWeight=0.00 PerfScore 0.01 G_M32124_IG37: ;; offset=0390H D2896C00 movz x0, #0x4b60 F2A40580 movk x0, #0x202c LSL #16 F2CFFF00 movk x0, #0x7ff8 LSL #32 52807AC1 mov w1, #982 97FF031E bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE D2815900 movz x0, #0xac8 // data for TplEventSource:Log F2A76000 movk x0, #0x3b00 LSL #16 F2C04280 movk x0, #532 LSL #32 F9400015 ldr x21, [x0] AA1303E0 mov x0, x19 D2834701 movz x1, #0x1a38 // code for Task:get_Id F2A40B01 movk x1, #0x2058 LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 F9400021 ldr x1, [x1] B940001F ldr wzr, [x0] D63F0020 blr x1 2A0003E1 mov w1, w0 AA1503E0 mov x0, x21 52800022 mov w2, #1 D2826903 movz x3, #0x1348 // code for TplEventSource:TraceOperationEnd F2A40FE3 movk x3, #0x207f LSL #16 F2CFFF03 movk x3, #0x7ff8 LSL #32 F9400063 ldr x3, [x3] B940001F ldr wzr, [x0] D63F0060 blr x3 17FFFFC6 b G_M32124_IG29 ;; size=104 bbWeight=0 PerfScore 0.00 G_M32124_IG38: ;; offset=03F8H AA1303E0 mov x0, x19 D2860901 movz x1, #0x3048 // code for Task:NotifyParentIfPotentiallyAttachedTask F2A40B01 movk x1, #0x2058 LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 F9400021 ldr x1, [x1] D63F0020 blr x1 AA1703E0 mov x0, x23 D2834401 movz x1, #0x1a20 // code for ContingentProperties:SetCompleted F2A40FE1 movk x1, #0x207f LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 F9400021 ldr x1, [x1] D63F0020 blr x1 17FFFFC7 b G_M32124_IG33 ;; size=52 bbWeight=0 PerfScore 0.00 G_M32124_IG39: ;; offset=042CH 528002E0 mov w0, #23 D29A8401 movz x1, #0xd420 // code for ThrowHelper:ThrowInvalidOperationException F2A40B01 movk x1, #0x2058 LSL #16 F2CFFF01 movk x1, #0x7ff8 LSL #32 F9400021 ldr x1, [x1] D63F0020 blr x1 D43E0000 brk_windows #0 ;; size=28 bbWeight=0 PerfScore 0.00 G_M32124_IG40: ;; offset=0448H AA1303E0 mov x0, x19 52A08001 mov w1, #0x4000000 52A0AC02 mov w2, #0x5600000 D2830B03 movz x3, #0x1858 // code for Task:AtomicStateUpdateSlow F2A40B03 movk x3, #0x2058 LSL #16 F2CFFF03 movk x3, #0x7ff8 LSL #32 F9400063 ldr x3, [x3] D63F0060 blr x3 17FFFFB0 b G_M32124_IG31 ;; size=36 bbWeight=0 PerfScore 0.00 G_M32124_IG41: ;; offset=046CH A9BC7BFD stp fp, lr, [sp,#-64]! A901D3F3 stp x19, x20, [sp,#24] A902DBF5 stp x21, x22, [sp,#40] F9001FF7 str x23, [sp,#56] 910183A3 add x3, fp, #96 F9000BE3 str x3, [sp,#16] ;; size=24 bbWeight=0 PerfScore 0.00 G_M32124_IG42: ;; offset=0484H AA0003E1 mov x1, x0 12800020 movn w0, #1 F9400FB3 ldr x19, [fp,#24] // [V00 this] B9001260 str w0, [x19,#16] F900067F str xzr, [x19,#8] 91006260 add x0, x19, #24 D29E1802 movz x2, #0xf0c0 // code for AsyncTaskMethodBuilder:SetException F2A40F62 movk x2, #0x207b LSL #16 F2CFFF02 movk x2, #0x7ff8 LSL #32 F9400042 ldr x2, [x2] D63F0040 blr x2 10FFF5A0 adr x0, [G_M32124_IG35] ;; size=48 bbWeight=0 PerfScore 0.00 G_M32124_IG43: ;; offset=04B4H F9401FF7 ldr x23, [sp,#56] A942DBF5 ldp x21, x22, [sp,#40] A941D3F3 ldp x19, x20, [sp,#24] A8C47BFD ldp fp, lr, [sp],#64 D65F03C0 ret lr ;; size=20 bbWeight=0 PerfScore 0.00 ; Total bytes of code 1224, prolog size 44, PerfScore 3562.71, instruction count 306, allocated bytes for code 1224 (MethodHash=440a8283) for method d__23:MoveNext():this ; ============================================================