diff --git a/src/coreclr/jit/hwintrinsicarm64.cpp b/src/coreclr/jit/hwintrinsicarm64.cpp index ba89a5d8c8f03c..932cebacc0a89a 100644 --- a/src/coreclr/jit/hwintrinsicarm64.cpp +++ b/src/coreclr/jit/hwintrinsicarm64.cpp @@ -3471,6 +3471,30 @@ GenTree* Compiler::impSpecialIntrinsic(NamedIntrinsic intrinsic, break; } + case NI_Sve2_AddSaturate: + { + assert(sig->numArgs == 2); + assert(retType != TYP_VOID); + + CORINFO_ARG_LIST_HANDLE arg1 = sig->args; + CORINFO_ARG_LIST_HANDLE arg2 = info.compCompHnd->getArgNext(arg1); + CORINFO_CLASS_HANDLE argClass = NO_CLASS_HANDLE; + + var_types argType1 = JITtype2varType(strip(info.compCompHnd->getArgType(sig, arg1, &argClass))); + CorInfoType op1BaseJitType = getBaseJitTypeOfSIMDType(argClass); + var_types argType2 = JITtype2varType(strip(info.compCompHnd->getArgType(sig, arg2, &argClass))); + CorInfoType op2BaseJitType = getBaseJitTypeOfSIMDType(argClass); + assert(JitType2PreciseVarType(op1BaseJitType) == simdBaseType); + + op2 = impPopStack().val; + op1 = impPopStack().val; + + retNode = gtNewSimdHWIntrinsicNode(retType, op1, op2, intrinsic, simdBaseType, simdSize); + retNode->AsHWIntrinsic()->SetSimdBaseType(simdBaseType); + retNode->AsHWIntrinsic()->SetAuxiliaryJitType(op2BaseJitType); + break; + } + default: { return nullptr; diff --git a/src/coreclr/jit/hwintrinsiccodegenarm64.cpp b/src/coreclr/jit/hwintrinsiccodegenarm64.cpp index 9e90f6e182e7f5..c8a01afdeb39ca 100644 --- a/src/coreclr/jit/hwintrinsiccodegenarm64.cpp +++ b/src/coreclr/jit/hwintrinsiccodegenarm64.cpp @@ -694,6 +694,7 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node) bool hasImmShift = (intrinEmbMask.category == HW_Category_ShiftLeftByImmediate || intrinEmbMask.category == HW_Category_ShiftRightByImmediate) && HWIntrinsicInfo::HasImmediateOperand(intrinEmbMask.id); + bool hasOptionalEmbMask = HWIntrinsicInfo::IsOptionalEmbeddedMaskedOperation(intrinEmbMask.id); insOpts embOpt = opt; switch (intrinEmbMask.id) @@ -722,6 +723,24 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node) assert(intrin.op3->IsVectorZero()); break; + case NI_Sve2_AddSaturate: + { + var_types baseType = op2->AsHWIntrinsic()->GetSimdBaseType(); + var_types auxType = op2->AsHWIntrinsic()->GetAuxiliaryType(); + if (baseType != auxType) + { + insEmbMask = (varTypeIsUnsigned(baseType)) ? INS_sve_usqadd : INS_sve_suqadd; + // SUQADD and USQADD must be predicated. + hasOptionalEmbMask = false; + } + else + { + // SQADD and UQADD can be unpredicated. + hasOptionalEmbMask = true; + } + break; + } + case NI_Sve2_ConvertToSingleOdd: case NI_Sve2_ConvertToSingleOddRoundToOdd: embOpt = INS_OPTS_D_TO_S; @@ -788,6 +807,24 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node) emitInsHelper(targetReg, maskReg, embMaskOp2Reg); break; + case NI_Sve2_AddSaturate: + assert((targetReg == op1Reg) || (targetReg != embMaskOp2Reg) || + genIsSameLocalVar(intrinEmbMask.op1, intrinEmbMask.op2)); + + if (hasOptionalEmbMask && intrin.op1->IsTrueMask(intrinEmbMask.baseType)) + { + // Use unpredicated SQADD/UQADD if the mask is all-true. + GetEmitter()->emitIns_R_R_R(insEmbMask, emitSize, targetReg, embMaskOp1Reg, + embMaskOp2Reg, embOpt, sopt); + } + else + { + GetEmitter()->emitIns_R_R_R(INS_sve_movprfx, EA_SCALABLE, targetReg, maskReg, + embMaskOp1Reg, opt); + emitInsHelper(targetReg, maskReg, embMaskOp2Reg); + } + break; + case NI_Sve2_AddPairwise: case NI_Sve2_MaxNumberPairwise: case NI_Sve2_MaxPairwise: @@ -862,7 +899,7 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node) else if (falseReg != embMaskOp1Reg) { // At the point, targetReg != embMaskOp1Reg != falseReg - if (HWIntrinsicInfo::IsOptionalEmbeddedMaskedOperation(intrinEmbMask.id)) + if (hasOptionalEmbMask) { // If the embedded instruction supports optional mask operation, use the "unpredicated" // version of the instruction, followed by "sel" to select the active lanes. diff --git a/src/coreclr/jit/hwintrinsiclistarm64sve.h b/src/coreclr/jit/hwintrinsiclistarm64sve.h index 75e9603c8946ea..7def99dfa0619d 100644 --- a/src/coreclr/jit/hwintrinsiclistarm64sve.h +++ b/src/coreclr/jit/hwintrinsiclistarm64sve.h @@ -329,10 +329,8 @@ HARDWARE_INTRINSIC(Sve2, AddPairwiseWideningAndAdd, HARDWARE_INTRINSIC(Sve2, AddRotateComplex, -1, 3, {INS_sve_cadd, INS_sve_cadd, INS_sve_cadd, INS_sve_cadd, INS_sve_cadd, INS_sve_cadd, INS_sve_cadd, INS_sve_cadd, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_HasRMWSemantics|HW_Flag_HasImmediateOperand|HW_Flag_SpecialCodeGen) HARDWARE_INTRINSIC(Sve2, AddRoundedHighNarrowingEven, -1, 2, {INS_sve_raddhnb, INS_sve_raddhnb, INS_sve_raddhnb, INS_sve_raddhnb, INS_sve_raddhnb, INS_sve_raddhnb, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable) HARDWARE_INTRINSIC(Sve2, AddRoundedHighNarrowingOdd, -1, 3, {INS_sve_raddhnt, INS_sve_raddhnt, INS_sve_raddhnt, INS_sve_raddhnt, INS_sve_raddhnt, INS_sve_raddhnt, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_HasRMWSemantics) -HARDWARE_INTRINSIC(Sve2, AddSaturate, -1, -1, {INS_sve_sqadd, INS_sve_uqadd, INS_sve_sqadd, INS_sve_uqadd, INS_sve_sqadd, INS_sve_uqadd, INS_sve_sqadd, INS_sve_uqadd, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_OptionalEmbeddedMaskedOperation|HW_Flag_HasRMWSemantics|HW_Flag_LowMaskedOperation) +HARDWARE_INTRINSIC(Sve2, AddSaturate, -1, -1, {INS_sve_sqadd, INS_sve_uqadd, INS_sve_sqadd, INS_sve_uqadd, INS_sve_sqadd, INS_sve_uqadd, INS_sve_sqadd, INS_sve_uqadd, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_EmbeddedMaskedOperation|HW_Flag_HasRMWSemantics|HW_Flag_LowMaskedOperation|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen) HARDWARE_INTRINSIC(Sve2, AddSaturateRotateComplex, -1, 3, {INS_sve_sqcadd, INS_invalid, INS_sve_sqcadd, INS_invalid, INS_sve_sqcadd, INS_invalid, INS_sve_sqcadd, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_HasRMWSemantics|HW_Flag_HasImmediateOperand|HW_Flag_SpecialCodeGen) -HARDWARE_INTRINSIC(Sve2, AddSaturateWithSignedAddend, -1, -1, {INS_invalid, INS_sve_usqadd, INS_invalid, INS_sve_usqadd, INS_invalid, INS_sve_usqadd, INS_invalid, INS_sve_usqadd, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_EmbeddedMaskedOperation|HW_Flag_HasRMWSemantics|HW_Flag_LowMaskedOperation) -HARDWARE_INTRINSIC(Sve2, AddSaturateWithUnsignedAddend, -1, -1, {INS_sve_suqadd, INS_invalid, INS_sve_suqadd, INS_invalid, INS_sve_suqadd, INS_invalid, INS_sve_suqadd, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_EmbeddedMaskedOperation|HW_Flag_HasRMWSemantics|HW_Flag_LowMaskedOperation) HARDWARE_INTRINSIC(Sve2, AddWideningEven, -1, 2, {INS_invalid, INS_invalid, INS_sve_saddwb, INS_sve_uaddwb, INS_sve_saddwb, INS_sve_uaddwb, INS_sve_saddwb, INS_sve_uaddwb, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen) HARDWARE_INTRINSIC(Sve2, AddWideningEvenOdd, -1, 2, {INS_invalid, INS_invalid, INS_sve_saddlbt, INS_invalid, INS_sve_saddlbt, INS_invalid, INS_sve_saddlbt, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable) HARDWARE_INTRINSIC(Sve2, AddWideningOdd, -1, 2, {INS_invalid, INS_invalid, INS_sve_saddwt, INS_sve_uaddwt, INS_sve_saddwt, INS_sve_uaddwt, INS_sve_saddwt, INS_sve_uaddwt, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen) diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve2.PlatformNotSupported.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve2.PlatformNotSupported.cs index 9722d809c321c7..379d669fe2c95d 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve2.PlatformNotSupported.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve2.PlatformNotSupported.cs @@ -381,7 +381,6 @@ internal Arm64() { } /// svuint8_t svaddp[_u8]_m(svbool_t pg, svuint8_t op1, svuint8_t op2) /// svuint8_t svaddp[_u8]_x(svbool_t pg, svuint8_t op1, svuint8_t op2) /// ADDP Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// ADDP Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// public static Vector AddPairwise(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -389,7 +388,6 @@ internal Arm64() { } /// svfloat64_t svaddp[_f64]_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) /// svfloat64_t svaddp[_f64]_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) /// FADDP Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// FADDP Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// public static Vector AddPairwise(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -397,7 +395,6 @@ internal Arm64() { } /// svint16_t svaddp[_s16]_m(svbool_t pg, svint16_t op1, svint16_t op2) /// svint16_t svaddp[_s16]_x(svbool_t pg, svint16_t op1, svint16_t op2) /// ADDP Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// ADDP Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// public static Vector AddPairwise(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -405,7 +402,6 @@ internal Arm64() { } /// svint32_t svaddp[_s32]_m(svbool_t pg, svint32_t op1, svint32_t op2) /// svint32_t svaddp[_s32]_x(svbool_t pg, svint32_t op1, svint32_t op2) /// ADDP Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// ADDP Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// public static Vector AddPairwise(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -413,7 +409,6 @@ internal Arm64() { } /// svint64_t svaddp[_s64]_m(svbool_t pg, svint64_t op1, svint64_t op2) /// svint64_t svaddp[_s64]_x(svbool_t pg, svint64_t op1, svint64_t op2) /// ADDP Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// ADDP Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// public static Vector AddPairwise(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -421,7 +416,6 @@ internal Arm64() { } /// svint8_t svaddp[_s8]_m(svbool_t pg, svint8_t op1, svint8_t op2) /// svint8_t svaddp[_s8]_x(svbool_t pg, svint8_t op1, svint8_t op2) /// ADDP Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// ADDP Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// public static Vector AddPairwise(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -429,7 +423,6 @@ internal Arm64() { } /// svfloat32_t svaddp[_f32]_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) /// svfloat32_t svaddp[_f32]_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) /// FADDP Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// FADDP Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// public static Vector AddPairwise(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -437,7 +430,6 @@ internal Arm64() { } /// svuint16_t svaddp[_u16]_m(svbool_t pg, svuint16_t op1, svuint16_t op2) /// svuint16_t svaddp[_u16]_x(svbool_t pg, svuint16_t op1, svuint16_t op2) /// ADDP Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// ADDP Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// public static Vector AddPairwise(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -445,7 +437,6 @@ internal Arm64() { } /// svuint32_t svaddp[_u32]_m(svbool_t pg, svuint32_t op1, svuint32_t op2) /// svuint32_t svaddp[_u32]_x(svbool_t pg, svuint32_t op1, svuint32_t op2) /// ADDP Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// ADDP Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// public static Vector AddPairwise(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -453,7 +444,6 @@ internal Arm64() { } /// svuint64_t svaddp[_u64]_m(svbool_t pg, svuint64_t op1, svuint64_t op2) /// svuint64_t svaddp[_u64]_x(svbool_t pg, svuint64_t op1, svuint64_t op2) /// ADDP Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// ADDP Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// public static Vector AddPairwise(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -464,7 +454,6 @@ internal Arm64() { } /// svint16_t svadalp[_s16]_x(svbool_t pg, svint16_t op1, svint8_t op2) /// svint16_t svadalp[_s16]_z(svbool_t pg, svint16_t op1, svint8_t op2) /// SADALP Ztied1.H, Pg/M, Zop2.B - /// SADALP Ztied1.H, Pg/M, Zop2.B /// public static Vector AddPairwiseWideningAndAdd(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -473,7 +462,6 @@ internal Arm64() { } /// svint32_t svadalp[_s32]_x(svbool_t pg, svint32_t op1, svint16_t op2) /// svint32_t svadalp[_s32]_z(svbool_t pg, svint32_t op1, svint16_t op2) /// SADALP Ztied1.S, Pg/M, Zop2.H - /// SADALP Ztied1.S, Pg/M, Zop2.H /// public static Vector AddPairwiseWideningAndAdd(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -482,7 +470,6 @@ internal Arm64() { } /// svint64_t svadalp[_s64]_x(svbool_t pg, svint64_t op1, svint32_t op2) /// svint64_t svadalp[_s64]_z(svbool_t pg, svint64_t op1, svint32_t op2) /// SADALP Ztied1.D, Pg/M, Zop2.S - /// SADALP Ztied1.D, Pg/M, Zop2.S /// public static Vector AddPairwiseWideningAndAdd(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -491,7 +478,6 @@ internal Arm64() { } /// svuint16_t svadalp[_u16]_x(svbool_t pg, svuint16_t op1, svuint8_t op2) /// svuint16_t svadalp[_u16]_z(svbool_t pg, svuint16_t op1, svuint8_t op2) /// UADALP Ztied1.H, Pg/M, Zop2.B - /// UADALP Ztied1.H, Pg/M, Zop2.B /// public static Vector AddPairwiseWideningAndAdd(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -500,7 +486,6 @@ internal Arm64() { } /// svuint32_t svadalp[_u32]_x(svbool_t pg, svuint32_t op1, svuint16_t op2) /// svuint32_t svadalp[_u32]_z(svbool_t pg, svuint32_t op1, svuint16_t op2) /// UADALP Ztied1.S, Pg/M, Zop2.H - /// UADALP Ztied1.S, Pg/M, Zop2.H /// public static Vector AddPairwiseWideningAndAdd(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -509,7 +494,6 @@ internal Arm64() { } /// svuint64_t svadalp[_u64]_x(svbool_t pg, svuint64_t op1, svuint32_t op2) /// svuint64_t svadalp[_u64]_z(svbool_t pg, svuint64_t op1, svuint32_t op2) /// UADALP Ztied1.D, Pg/M, Zop2.S - /// UADALP Ztied1.D, Pg/M, Zop2.S /// public static Vector AddPairwiseWideningAndAdd(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -723,32 +707,6 @@ internal Arm64() { } /// public static new Vector AddSaturate(Vector left, Vector right) { throw new PlatformNotSupportedException(); } - // Saturating complex add with rotate - - /// - /// svint16_t svqcadd[_s16](svint16_t op1, svint16_t op2, uint64_t imm_rotation) - /// SQCADD Ztied1.H, Ztied1.H, Zop2.H, #imm_rotation - /// - public static Vector AddSaturateRotateComplex(Vector left, Vector right, [ConstantExpected(Min = 0, Max = (byte)(1))] byte rotation) { throw new PlatformNotSupportedException(); } - - /// - /// svint32_t svqcadd[_s32](svint32_t op1, svint32_t op2, uint64_t imm_rotation) - /// SQCADD Ztied1.S, Ztied1.S, Zop2.S, #imm_rotation - /// - public static Vector AddSaturateRotateComplex(Vector left, Vector right, [ConstantExpected(Min = 0, Max = (byte)(1))] byte rotation) { throw new PlatformNotSupportedException(); } - - /// - /// svint64_t svqcadd[_s64](svint64_t op1, svint64_t op2, uint64_t imm_rotation) - /// SQCADD Ztied1.D, Ztied1.D, Zop2.D, #imm_rotation - /// - public static Vector AddSaturateRotateComplex(Vector left, Vector right, [ConstantExpected(Min = 0, Max = (byte)(1))] byte rotation) { throw new PlatformNotSupportedException(); } - - /// - /// svint8_t svqcadd[_s8](svint8_t op1, svint8_t op2, uint64_t imm_rotation) - /// SQCADD Ztied1.B, Ztied1.B, Zop2.B, #imm_rotation - /// - public static Vector AddSaturateRotateComplex(Vector left, Vector right, [ConstantExpected(Min = 0, Max = (byte)(1))] byte rotation) { throw new PlatformNotSupportedException(); } - // Saturating add with signed addend /// @@ -756,36 +714,32 @@ internal Arm64() { } /// svuint8_t svsqadd[_u8]_x(svbool_t pg, svuint8_t op1, svint8_t op2) /// svuint8_t svsqadd[_u8]_z(svbool_t pg, svuint8_t op1, svint8_t op2) /// USQADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// USQADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// - public static Vector AddSaturateWithSignedAddend(Vector left, Vector right) { throw new PlatformNotSupportedException(); } + public static Vector AddSaturate(Vector left, Vector right) { throw new PlatformNotSupportedException(); } /// /// svuint16_t svsqadd[_u16]_m(svbool_t pg, svuint16_t op1, svint16_t op2) /// svuint16_t svsqadd[_u16]_x(svbool_t pg, svuint16_t op1, svint16_t op2) /// svuint16_t svsqadd[_u16]_z(svbool_t pg, svuint16_t op1, svint16_t op2) /// USQADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// USQADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// - public static Vector AddSaturateWithSignedAddend(Vector left, Vector right) { throw new PlatformNotSupportedException(); } + public static Vector AddSaturate(Vector left, Vector right) { throw new PlatformNotSupportedException(); } /// /// svuint32_t svsqadd[_u32]_m(svbool_t pg, svuint32_t op1, svint32_t op2) /// svuint32_t svsqadd[_u32]_x(svbool_t pg, svuint32_t op1, svint32_t op2) /// svuint32_t svsqadd[_u32]_z(svbool_t pg, svuint32_t op1, svint32_t op2) /// USQADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// USQADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// - public static Vector AddSaturateWithSignedAddend(Vector left, Vector right) { throw new PlatformNotSupportedException(); } + public static Vector AddSaturate(Vector left, Vector right) { throw new PlatformNotSupportedException(); } /// /// svuint64_t svsqadd[_u64]_m(svbool_t pg, svuint64_t op1, svint64_t op2) /// svuint64_t svsqadd[_u64]_x(svbool_t pg, svuint64_t op1, svint64_t op2) /// svuint64_t svsqadd[_u64]_z(svbool_t pg, svuint64_t op1, svint64_t op2) /// USQADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// USQADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// - public static Vector AddSaturateWithSignedAddend(Vector left, Vector right) { throw new PlatformNotSupportedException(); } + public static Vector AddSaturate(Vector left, Vector right) { throw new PlatformNotSupportedException(); } // Saturating add with unsigned addend @@ -794,36 +748,58 @@ internal Arm64() { } /// svint8_t svuqadd[_s8]_x(svbool_t pg, svint8_t op1, svuint8_t op2) /// svint8_t svuqadd[_s8]_z(svbool_t pg, svint8_t op1, svuint8_t op2) /// SUQADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// SUQADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// - public static Vector AddSaturateWithUnsignedAddend(Vector left, Vector right) { throw new PlatformNotSupportedException(); } + public static Vector AddSaturate(Vector left, Vector right) { throw new PlatformNotSupportedException(); } /// /// svint16_t svuqadd[_s16]_m(svbool_t pg, svint16_t op1, svuint16_t op2) /// svint16_t svuqadd[_s16]_x(svbool_t pg, svint16_t op1, svuint16_t op2) /// svint16_t svuqadd[_s16]_z(svbool_t pg, svint16_t op1, svuint16_t op2) /// SUQADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// SUQADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// - public static Vector AddSaturateWithUnsignedAddend(Vector left, Vector right) { throw new PlatformNotSupportedException(); } + public static Vector AddSaturate(Vector left, Vector right) { throw new PlatformNotSupportedException(); } /// /// svint32_t svuqadd[_s32]_m(svbool_t pg, svint32_t op1, svuint32_t op2) /// svint32_t svuqadd[_s32]_x(svbool_t pg, svint32_t op1, svuint32_t op2) /// svint32_t svuqadd[_s32]_z(svbool_t pg, svint32_t op1, svuint32_t op2) /// SUQADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// SUQADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// - public static Vector AddSaturateWithUnsignedAddend(Vector left, Vector right) { throw new PlatformNotSupportedException(); } + public static Vector AddSaturate(Vector left, Vector right) { throw new PlatformNotSupportedException(); } /// /// svint64_t svuqadd[_s64]_m(svbool_t pg, svint64_t op1, svuint64_t op2) /// svint64_t svuqadd[_s64]_x(svbool_t pg, svint64_t op1, svuint64_t op2) /// svint64_t svuqadd[_s64]_z(svbool_t pg, svint64_t op1, svuint64_t op2) /// SUQADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// SUQADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// - public static Vector AddSaturateWithUnsignedAddend(Vector left, Vector right) { throw new PlatformNotSupportedException(); } + public static Vector AddSaturate(Vector left, Vector right) { throw new PlatformNotSupportedException(); } + + // Saturating complex add with rotate + + /// + /// svint16_t svqcadd[_s16](svint16_t op1, svint16_t op2, uint64_t imm_rotation) + /// SQCADD Ztied1.H, Ztied1.H, Zop2.H, #imm_rotation + /// + public static Vector AddSaturateRotateComplex(Vector left, Vector right, [ConstantExpected(Min = 0, Max = (byte)(1))] byte rotation) { throw new PlatformNotSupportedException(); } + + /// + /// svint32_t svqcadd[_s32](svint32_t op1, svint32_t op2, uint64_t imm_rotation) + /// SQCADD Ztied1.S, Ztied1.S, Zop2.S, #imm_rotation + /// + public static Vector AddSaturateRotateComplex(Vector left, Vector right, [ConstantExpected(Min = 0, Max = (byte)(1))] byte rotation) { throw new PlatformNotSupportedException(); } + + /// + /// svint64_t svqcadd[_s64](svint64_t op1, svint64_t op2, uint64_t imm_rotation) + /// SQCADD Ztied1.D, Ztied1.D, Zop2.D, #imm_rotation + /// + public static Vector AddSaturateRotateComplex(Vector left, Vector right, [ConstantExpected(Min = 0, Max = (byte)(1))] byte rotation) { throw new PlatformNotSupportedException(); } + + /// + /// svint8_t svqcadd[_s8](svint8_t op1, svint8_t op2, uint64_t imm_rotation) + /// SQCADD Ztied1.B, Ztied1.B, Zop2.B, #imm_rotation + /// + public static Vector AddSaturateRotateComplex(Vector left, Vector right, [ConstantExpected(Min = 0, Max = (byte)(1))] byte rotation) { throw new PlatformNotSupportedException(); } // Add wide (bottom) @@ -1202,7 +1178,6 @@ internal Arm64() { } /// svfloat32_t svcvtnt_f32[_f64]_m(svfloat32_t even, svbool_t pg, svfloat64_t op) /// svfloat32_t svcvtnt_f32[_f64]_x(svfloat32_t even, svbool_t pg, svfloat64_t op) /// FCVTNT Ztied.S, Pg/M, Zop.D - /// FCVTNT Ztied.S, Pg/M, Zop.D /// public static Vector ConvertToSingleOdd(Vector even, Vector value) { throw new PlatformNotSupportedException(); } @@ -1212,7 +1187,6 @@ internal Arm64() { } /// svfloat32_t svcvtxnt_f32[_f64]_m(svfloat32_t even, svbool_t pg, svfloat64_t op) /// svfloat32_t svcvtxnt_f32[_f64]_x(svfloat32_t even, svbool_t pg, svfloat64_t op) /// FCVTXNT Ztied.S, Pg/M, Zop.D - /// FCVTXNT Ztied.S, Pg/M, Zop.D /// public static Vector ConvertToSingleOddRoundToOdd(Vector even, Vector value) { throw new PlatformNotSupportedException(); } @@ -1270,7 +1244,6 @@ internal Arm64() { } /// svuint8_t svhadd[_u8]_x(svbool_t pg, svuint8_t op1, svuint8_t op2) /// svuint8_t svhadd[_u8]_z(svbool_t pg, svuint8_t op1, svuint8_t op2) /// UHADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// UHADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// UHADD Ztied2.B, Pg/M, Ztied2.B, Zop1.B /// public static Vector FusedAddHalving(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -1280,7 +1253,6 @@ internal Arm64() { } /// svint16_t svhadd[_s16]_x(svbool_t pg, svint16_t op1, svint16_t op2) /// svint16_t svhadd[_s16]_z(svbool_t pg, svint16_t op1, svint16_t op2) /// SHADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// SHADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// SHADD Ztied2.H, Pg/M, Ztied2.H, Zop1.H /// public static Vector FusedAddHalving(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -1290,7 +1262,6 @@ internal Arm64() { } /// svint32_t svhadd[_s32]_x(svbool_t pg, svint32_t op1, svint32_t op2) /// svint32_t svhadd[_s32]_z(svbool_t pg, svint32_t op1, svint32_t op2) /// SHADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// SHADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// SHADD Ztied2.S, Pg/M, Ztied2.S, Zop1.S /// public static Vector FusedAddHalving(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -1300,7 +1271,6 @@ internal Arm64() { } /// svint64_t svhadd[_s64]_x(svbool_t pg, svint64_t op1, svint64_t op2) /// svint64_t svhadd[_s64]_z(svbool_t pg, svint64_t op1, svint64_t op2) /// SHADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// SHADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// SHADD Ztied2.D, Pg/M, Ztied2.D, Zop1.D /// public static Vector FusedAddHalving(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -1310,7 +1280,6 @@ internal Arm64() { } /// svint8_t svhadd[_s8]_x(svbool_t pg, svint8_t op1, svint8_t op2) /// svint8_t svhadd[_s8]_z(svbool_t pg, svint8_t op1, svint8_t op2) /// SHADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// SHADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// SHADD Ztied2.B, Pg/M, Ztied2.B, Zop1.B /// public static Vector FusedAddHalving(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -1320,7 +1289,6 @@ internal Arm64() { } /// svuint16_t svhadd[_u16]_x(svbool_t pg, svuint16_t op1, svuint16_t op2) /// svuint16_t svhadd[_u16]_z(svbool_t pg, svuint16_t op1, svuint16_t op2) /// UHADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// UHADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// UHADD Ztied2.H, Pg/M, Ztied2.H, Zop1.H /// public static Vector FusedAddHalving(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -1330,7 +1298,6 @@ internal Arm64() { } /// svuint32_t svhadd[_u32]_x(svbool_t pg, svuint32_t op1, svuint32_t op2) /// svuint32_t svhadd[_u32]_z(svbool_t pg, svuint32_t op1, svuint32_t op2) /// UHADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// UHADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// UHADD Ztied2.S, Pg/M, Ztied2.S, Zop1.S /// public static Vector FusedAddHalving(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -1340,7 +1307,6 @@ internal Arm64() { } /// svuint64_t svhadd[_u64]_x(svbool_t pg, svuint64_t op1, svuint64_t op2) /// svuint64_t svhadd[_u64]_z(svbool_t pg, svuint64_t op1, svuint64_t op2) /// UHADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// UHADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// UHADD Ztied2.D, Pg/M, Ztied2.D, Zop1.D /// public static Vector FusedAddHalving(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -1352,7 +1318,6 @@ internal Arm64() { } /// svuint8_t svhsub[_u8]_x(svbool_t pg, svuint8_t op1, svuint8_t op2) /// svuint8_t svhsub[_u8]_z(svbool_t pg, svuint8_t op1, svuint8_t op2) /// UHSUB Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// UHSUB Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// UHSUBR Ztied2.B, Pg/M, Ztied2.B, Zop1.B /// public static Vector FusedSubtractHalving(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -1362,7 +1327,6 @@ internal Arm64() { } /// svint16_t svhsub[_s16]_x(svbool_t pg, svint16_t op1, svint16_t op2) /// svint16_t svhsub[_s16]_z(svbool_t pg, svint16_t op1, svint16_t op2) /// SHSUB Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// SHSUB Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// SHSUBR Ztied2.H, Pg/M, Ztied2.H, Zop1.H /// public static Vector FusedSubtractHalving(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -1372,7 +1336,6 @@ internal Arm64() { } /// svint32_t svhsub[_s32]_x(svbool_t pg, svint32_t op1, svint32_t op2) /// svint32_t svhsub[_s32]_z(svbool_t pg, svint32_t op1, svint32_t op2) /// SHSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// SHSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// SHSUBR Ztied2.S, Pg/M, Ztied2.S, Zop1.S /// public static Vector FusedSubtractHalving(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -1382,7 +1345,6 @@ internal Arm64() { } /// svint64_t svhsub[_s64]_x(svbool_t pg, svint64_t op1, svint64_t op2) /// svint64_t svhsub[_s64]_z(svbool_t pg, svint64_t op1, svint64_t op2) /// SHSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// SHSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// SHSUBR Ztied2.D, Pg/M, Ztied2.D, Zop1.D /// public static Vector FusedSubtractHalving(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -1392,7 +1354,6 @@ internal Arm64() { } /// svint8_t svhsub[_s8]_x(svbool_t pg, svint8_t op1, svint8_t op2) /// svint8_t svhsub[_s8]_z(svbool_t pg, svint8_t op1, svint8_t op2) /// SHSUB Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// SHSUB Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// SHSUBR Ztied2.B, Pg/M, Ztied2.B, Zop1.B /// public static Vector FusedSubtractHalving(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -1402,7 +1363,6 @@ internal Arm64() { } /// svuint16_t svhsub[_u16]_x(svbool_t pg, svuint16_t op1, svuint16_t op2) /// svuint16_t svhsub[_u16]_z(svbool_t pg, svuint16_t op1, svuint16_t op2) /// UHSUB Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// UHSUB Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// UHSUBR Ztied2.H, Pg/M, Ztied2.H, Zop1.H /// public static Vector FusedSubtractHalving(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -1412,7 +1372,6 @@ internal Arm64() { } /// svuint32_t svhsub[_u32]_x(svbool_t pg, svuint32_t op1, svuint32_t op2) /// svuint32_t svhsub[_u32]_z(svbool_t pg, svuint32_t op1, svuint32_t op2) /// UHSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// UHSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// UHSUBR Ztied2.S, Pg/M, Ztied2.S, Zop1.S /// public static Vector FusedSubtractHalving(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -1422,7 +1381,6 @@ internal Arm64() { } /// svuint64_t svhsub[_u64]_x(svbool_t pg, svuint64_t op1, svuint64_t op2) /// svuint64_t svhsub[_u64]_z(svbool_t pg, svuint64_t op1, svuint64_t op2) /// UHSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// UHSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// UHSUBR Ztied2.D, Pg/M, Ztied2.D, Zop1.D /// public static Vector FusedSubtractHalving(Vector left, Vector right) { throw new PlatformNotSupportedException(); } @@ -4027,7 +3985,6 @@ internal Arm64() { } /// svuint8_t svqsub[_u8]_x(svbool_t pg, svuint8_t op1, svuint8_t op2) /// svuint8_t svqsub[_u8]_z(svbool_t pg, svuint8_t op1, svuint8_t op2) /// UQSUB Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// UQSUB Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// UQSUBR Ztied2.B, Pg/M, Ztied2.B, Zop1.B /// UQSUB Zresult.B, Zop1.B, Zop2.B /// @@ -4038,7 +3995,6 @@ internal Arm64() { } /// svint16_t svqsub[_s16]_x(svbool_t pg, svint16_t op1, svint16_t op2) /// svint16_t svqsub[_s16]_z(svbool_t pg, svint16_t op1, svint16_t op2) /// SQSUB Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// SQSUB Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// SQSUBR Ztied2.H, Pg/M, Ztied2.H, Zop1.H /// SQSUB Zresult.H, Zop1.H, Zop2.H /// @@ -4049,7 +4005,6 @@ internal Arm64() { } /// svint32_t svqsub[_s32]_x(svbool_t pg, svint32_t op1, svint32_t op2) /// svint32_t svqsub[_s32]_z(svbool_t pg, svint32_t op1, svint32_t op2) /// SQSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// SQSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// SQSUBR Ztied2.S, Pg/M, Ztied2.S, Zop1.S /// SQSUB Zresult.S, Zop1.S, Zop2.S /// @@ -4060,7 +4015,6 @@ internal Arm64() { } /// svint64_t svqsub[_s64]_x(svbool_t pg, svint64_t op1, svint64_t op2) /// svint64_t svqsub[_s64]_z(svbool_t pg, svint64_t op1, svint64_t op2) /// SQSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// SQSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// SQSUBR Ztied2.D, Pg/M, Ztied2.D, Zop1.D /// SQSUB Zresult.D, Zop1.D, Zop2.D /// @@ -4071,7 +4025,6 @@ internal Arm64() { } /// svint8_t svqsub[_s8]_x(svbool_t pg, svint8_t op1, svint8_t op2) /// svint8_t svqsub[_s8]_z(svbool_t pg, svint8_t op1, svint8_t op2) /// SQSUB Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// SQSUB Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// SQSUBR Ztied2.B, Pg/M, Ztied2.B, Zop1.B /// SQSUB Zresult.B, Zop1.B, Zop2.B /// @@ -4082,7 +4035,6 @@ internal Arm64() { } /// svuint16_t svqsub[_u16]_x(svbool_t pg, svuint16_t op1, svuint16_t op2) /// svuint16_t svqsub[_u16]_z(svbool_t pg, svuint16_t op1, svuint16_t op2) /// UQSUB Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// UQSUB Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// UQSUBR Ztied2.H, Pg/M, Ztied2.H, Zop1.H /// UQSUB Zresult.H, Zop1.H, Zop2.H /// @@ -4093,7 +4045,6 @@ internal Arm64() { } /// svuint32_t svqsub[_u32]_x(svbool_t pg, svuint32_t op1, svuint32_t op2) /// svuint32_t svqsub[_u32]_z(svbool_t pg, svuint32_t op1, svuint32_t op2) /// UQSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// UQSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// UQSUBR Ztied2.S, Pg/M, Ztied2.S, Zop1.S /// UQSUB Zresult.S, Zop1.S, Zop2.S /// @@ -4104,7 +4055,6 @@ internal Arm64() { } /// svuint64_t svqsub[_u64]_x(svbool_t pg, svuint64_t op1, svuint64_t op2) /// svuint64_t svqsub[_u64]_z(svbool_t pg, svuint64_t op1, svuint64_t op2) /// UQSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// UQSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// UQSUBR Ztied2.D, Pg/M, Ztied2.D, Zop1.D /// UQSUB Zresult.D, Zop1.D, Zop2.D /// diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve2.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve2.cs index 904ce01689efbb..b246c9cfcaa6b7 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve2.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve2.cs @@ -380,7 +380,6 @@ internal Arm64() { } /// svuint8_t svaddp[_u8]_m(svbool_t pg, svuint8_t op1, svuint8_t op2) /// svuint8_t svaddp[_u8]_x(svbool_t pg, svuint8_t op1, svuint8_t op2) /// ADDP Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// ADDP Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// public static Vector AddPairwise(Vector left, Vector right) => AddPairwise(left, right); @@ -388,7 +387,6 @@ internal Arm64() { } /// svfloat64_t svaddp[_f64]_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) /// svfloat64_t svaddp[_f64]_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) /// FADDP Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// FADDP Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// public static Vector AddPairwise(Vector left, Vector right) => AddPairwise(left, right); @@ -396,7 +394,6 @@ internal Arm64() { } /// svint16_t svaddp[_s16]_m(svbool_t pg, svint16_t op1, svint16_t op2) /// svint16_t svaddp[_s16]_x(svbool_t pg, svint16_t op1, svint16_t op2) /// ADDP Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// ADDP Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// public static Vector AddPairwise(Vector left, Vector right) => AddPairwise(left, right); @@ -404,7 +401,6 @@ internal Arm64() { } /// svint32_t svaddp[_s32]_m(svbool_t pg, svint32_t op1, svint32_t op2) /// svint32_t svaddp[_s32]_x(svbool_t pg, svint32_t op1, svint32_t op2) /// ADDP Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// ADDP Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// public static Vector AddPairwise(Vector left, Vector right) => AddPairwise(left, right); @@ -412,7 +408,6 @@ internal Arm64() { } /// svint64_t svaddp[_s64]_m(svbool_t pg, svint64_t op1, svint64_t op2) /// svint64_t svaddp[_s64]_x(svbool_t pg, svint64_t op1, svint64_t op2) /// ADDP Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// ADDP Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// public static Vector AddPairwise(Vector left, Vector right) => AddPairwise(left, right); @@ -420,7 +415,6 @@ internal Arm64() { } /// svint8_t svaddp[_s8]_m(svbool_t pg, svint8_t op1, svint8_t op2) /// svint8_t svaddp[_s8]_x(svbool_t pg, svint8_t op1, svint8_t op2) /// ADDP Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// ADDP Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// public static Vector AddPairwise(Vector left, Vector right) => AddPairwise(left, right); @@ -428,7 +422,6 @@ internal Arm64() { } /// svfloat32_t svaddp[_f32]_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) /// svfloat32_t svaddp[_f32]_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) /// FADDP Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// FADDP Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// public static Vector AddPairwise(Vector left, Vector right) => AddPairwise(left, right); @@ -436,7 +429,6 @@ internal Arm64() { } /// svuint16_t svaddp[_u16]_m(svbool_t pg, svuint16_t op1, svuint16_t op2) /// svuint16_t svaddp[_u16]_x(svbool_t pg, svuint16_t op1, svuint16_t op2) /// ADDP Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// ADDP Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// public static Vector AddPairwise(Vector left, Vector right) => AddPairwise(left, right); @@ -444,7 +436,6 @@ internal Arm64() { } /// svuint32_t svaddp[_u32]_m(svbool_t pg, svuint32_t op1, svuint32_t op2) /// svuint32_t svaddp[_u32]_x(svbool_t pg, svuint32_t op1, svuint32_t op2) /// ADDP Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// ADDP Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// public static Vector AddPairwise(Vector left, Vector right) => AddPairwise(left, right); @@ -452,7 +443,6 @@ internal Arm64() { } /// svuint64_t svaddp[_u64]_m(svbool_t pg, svuint64_t op1, svuint64_t op2) /// svuint64_t svaddp[_u64]_x(svbool_t pg, svuint64_t op1, svuint64_t op2) /// ADDP Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// ADDP Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// public static Vector AddPairwise(Vector left, Vector right) => AddPairwise(left, right); @@ -463,7 +453,6 @@ internal Arm64() { } /// svint16_t svadalp[_s16]_x(svbool_t pg, svint16_t op1, svint8_t op2) /// svint16_t svadalp[_s16]_z(svbool_t pg, svint16_t op1, svint8_t op2) /// SADALP Ztied1.H, Pg/M, Zop2.B - /// SADALP Ztied1.H, Pg/M, Zop2.B /// public static Vector AddPairwiseWideningAndAdd(Vector left, Vector right) => AddPairwiseWideningAndAdd(left, right); @@ -472,7 +461,6 @@ internal Arm64() { } /// svint32_t svadalp[_s32]_x(svbool_t pg, svint32_t op1, svint16_t op2) /// svint32_t svadalp[_s32]_z(svbool_t pg, svint32_t op1, svint16_t op2) /// SADALP Ztied1.S, Pg/M, Zop2.H - /// SADALP Ztied1.S, Pg/M, Zop2.H /// public static Vector AddPairwiseWideningAndAdd(Vector left, Vector right) => AddPairwiseWideningAndAdd(left, right); @@ -481,7 +469,6 @@ internal Arm64() { } /// svint64_t svadalp[_s64]_x(svbool_t pg, svint64_t op1, svint32_t op2) /// svint64_t svadalp[_s64]_z(svbool_t pg, svint64_t op1, svint32_t op2) /// SADALP Ztied1.D, Pg/M, Zop2.S - /// SADALP Ztied1.D, Pg/M, Zop2.S /// public static Vector AddPairwiseWideningAndAdd(Vector left, Vector right) => AddPairwiseWideningAndAdd(left, right); @@ -490,7 +477,6 @@ internal Arm64() { } /// svuint16_t svadalp[_u16]_x(svbool_t pg, svuint16_t op1, svuint8_t op2) /// svuint16_t svadalp[_u16]_z(svbool_t pg, svuint16_t op1, svuint8_t op2) /// UADALP Ztied1.H, Pg/M, Zop2.B - /// UADALP Ztied1.H, Pg/M, Zop2.B /// public static Vector AddPairwiseWideningAndAdd(Vector left, Vector right) => AddPairwiseWideningAndAdd(left, right); @@ -499,7 +485,6 @@ internal Arm64() { } /// svuint32_t svadalp[_u32]_x(svbool_t pg, svuint32_t op1, svuint16_t op2) /// svuint32_t svadalp[_u32]_z(svbool_t pg, svuint32_t op1, svuint16_t op2) /// UADALP Ztied1.S, Pg/M, Zop2.H - /// UADALP Ztied1.S, Pg/M, Zop2.H /// public static Vector AddPairwiseWideningAndAdd(Vector left, Vector right) => AddPairwiseWideningAndAdd(left, right); @@ -508,7 +493,6 @@ internal Arm64() { } /// svuint64_t svadalp[_u64]_x(svbool_t pg, svuint64_t op1, svuint32_t op2) /// svuint64_t svadalp[_u64]_z(svbool_t pg, svuint64_t op1, svuint32_t op2) /// UADALP Ztied1.D, Pg/M, Zop2.S - /// UADALP Ztied1.D, Pg/M, Zop2.S /// public static Vector AddPairwiseWideningAndAdd(Vector left, Vector right) => AddPairwiseWideningAndAdd(left, right); @@ -722,33 +706,6 @@ internal Arm64() { } /// public static new Vector AddSaturate(Vector left, Vector right) => AddSaturate(left, right); - // Saturating complex add with rotate - - /// - /// svint16_t svqcadd[_s16](svint16_t op1, svint16_t op2, uint64_t imm_rotation) - /// SQCADD Ztied1.H, Ztied1.H, Zop2.H, #imm_rotation - /// - public static Vector AddSaturateRotateComplex(Vector left, Vector right, [ConstantExpected(Min = 0, Max = (byte)(1))] byte rotation) => AddSaturateRotateComplex(left, right, rotation); - - /// - /// svint32_t svqcadd[_s32](svint32_t op1, svint32_t op2, uint64_t imm_rotation) - /// SQCADD Ztied1.S, Ztied1.S, Zop2.S, #imm_rotation - /// - public static Vector AddSaturateRotateComplex(Vector left, Vector right, [ConstantExpected(Min = 0, Max = (byte)(1))] byte rotation) => AddSaturateRotateComplex(left, right, rotation); - - /// - /// svint64_t svqcadd[_s64](svint64_t op1, svint64_t op2, uint64_t imm_rotation) - /// SQCADD Ztied1.D, Ztied1.D, Zop2.D, #imm_rotation - /// - public static Vector AddSaturateRotateComplex(Vector left, Vector right, [ConstantExpected(Min = 0, Max = (byte)(1))] byte rotation) => AddSaturateRotateComplex(left, right, rotation); - - /// - /// svint8_t svqcadd[_s8](svint8_t op1, svint8_t op2, uint64_t imm_rotation) - /// SQCADD Ztied1.B, Ztied1.B, Zop2.B, #imm_rotation - /// - public static Vector AddSaturateRotateComplex(Vector left, Vector right, [ConstantExpected(Min = 0, Max = (byte)(1))] byte rotation) => AddSaturateRotateComplex(left, right, rotation); - - // Saturating add with signed addend /// @@ -756,36 +713,32 @@ internal Arm64() { } /// svuint8_t svsqadd[_u8]_x(svbool_t pg, svuint8_t op1, svint8_t op2) /// svuint8_t svsqadd[_u8]_z(svbool_t pg, svuint8_t op1, svint8_t op2) /// USQADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// USQADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// - public static Vector AddSaturateWithSignedAddend(Vector left, Vector right) => AddSaturateWithSignedAddend(left, right); + public static Vector AddSaturate(Vector left, Vector right) => AddSaturate(left, right); /// /// svuint16_t svsqadd[_u16]_m(svbool_t pg, svuint16_t op1, svint16_t op2) /// svuint16_t svsqadd[_u16]_x(svbool_t pg, svuint16_t op1, svint16_t op2) /// svuint16_t svsqadd[_u16]_z(svbool_t pg, svuint16_t op1, svint16_t op2) /// USQADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// USQADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// - public static Vector AddSaturateWithSignedAddend(Vector left, Vector right) => AddSaturateWithSignedAddend(left, right); + public static Vector AddSaturate(Vector left, Vector right) => AddSaturate(left, right); /// /// svuint32_t svsqadd[_u32]_m(svbool_t pg, svuint32_t op1, svint32_t op2) /// svuint32_t svsqadd[_u32]_x(svbool_t pg, svuint32_t op1, svint32_t op2) /// svuint32_t svsqadd[_u32]_z(svbool_t pg, svuint32_t op1, svint32_t op2) /// USQADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// USQADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// - public static Vector AddSaturateWithSignedAddend(Vector left, Vector right) => AddSaturateWithSignedAddend(left, right); + public static Vector AddSaturate(Vector left, Vector right) => AddSaturate(left, right); /// /// svuint64_t svsqadd[_u64]_m(svbool_t pg, svuint64_t op1, svint64_t op2) /// svuint64_t svsqadd[_u64]_x(svbool_t pg, svuint64_t op1, svint64_t op2) /// svuint64_t svsqadd[_u64]_z(svbool_t pg, svuint64_t op1, svint64_t op2) /// USQADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// USQADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// - public static Vector AddSaturateWithSignedAddend(Vector left, Vector right) => AddSaturateWithSignedAddend(left, right); + public static Vector AddSaturate(Vector left, Vector right) => AddSaturate(left, right); // Saturating add with unsigned addend @@ -794,36 +747,59 @@ internal Arm64() { } /// svint16_t svuqadd[_s16]_x(svbool_t pg, svint16_t op1, svuint16_t op2) /// svint16_t svuqadd[_s16]_z(svbool_t pg, svint16_t op1, svuint16_t op2) /// SUQADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// SUQADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// - public static unsafe Vector AddSaturateWithUnsignedAddend(Vector left, Vector right) => AddSaturateWithUnsignedAddend(left, right); + public static unsafe Vector AddSaturate(Vector left, Vector right) => AddSaturate(left, right); /// /// svint32_t svuqadd[_s32]_m(svbool_t pg, svint32_t op1, svuint32_t op2) /// svint32_t svuqadd[_s32]_x(svbool_t pg, svint32_t op1, svuint32_t op2) /// svint32_t svuqadd[_s32]_z(svbool_t pg, svint32_t op1, svuint32_t op2) /// SUQADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// SUQADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// - public static unsafe Vector AddSaturateWithUnsignedAddend(Vector left, Vector right) => AddSaturateWithUnsignedAddend(left, right); + public static unsafe Vector AddSaturate(Vector left, Vector right) => AddSaturate(left, right); /// /// svint64_t svuqadd[_s64]_m(svbool_t pg, svint64_t op1, svuint64_t op2) /// svint64_t svuqadd[_s64]_x(svbool_t pg, svint64_t op1, svuint64_t op2) /// svint64_t svuqadd[_s64]_z(svbool_t pg, svint64_t op1, svuint64_t op2) /// SUQADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// SUQADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// - public static unsafe Vector AddSaturateWithUnsignedAddend(Vector left, Vector right) => AddSaturateWithUnsignedAddend(left, right); + public static unsafe Vector AddSaturate(Vector left, Vector right) => AddSaturate(left, right); /// /// svint8_t svuqadd[_s8]_m(svbool_t pg, svint8_t op1, svuint8_t op2) /// svint8_t svuqadd[_s8]_x(svbool_t pg, svint8_t op1, svuint8_t op2) /// svint8_t svuqadd[_s8]_z(svbool_t pg, svint8_t op1, svuint8_t op2) /// SUQADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// SUQADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// - public static unsafe Vector AddSaturateWithUnsignedAddend(Vector left, Vector right) => AddSaturateWithUnsignedAddend(left, right); + public static unsafe Vector AddSaturate(Vector left, Vector right) => AddSaturate(left, right); + + // Saturating complex add with rotate + + /// + /// svint16_t svqcadd[_s16](svint16_t op1, svint16_t op2, uint64_t imm_rotation) + /// SQCADD Ztied1.H, Ztied1.H, Zop2.H, #imm_rotation + /// + public static Vector AddSaturateRotateComplex(Vector left, Vector right, [ConstantExpected(Min = 0, Max = (byte)(1))] byte rotation) => AddSaturateRotateComplex(left, right, rotation); + + /// + /// svint32_t svqcadd[_s32](svint32_t op1, svint32_t op2, uint64_t imm_rotation) + /// SQCADD Ztied1.S, Ztied1.S, Zop2.S, #imm_rotation + /// + public static Vector AddSaturateRotateComplex(Vector left, Vector right, [ConstantExpected(Min = 0, Max = (byte)(1))] byte rotation) => AddSaturateRotateComplex(left, right, rotation); + + /// + /// svint64_t svqcadd[_s64](svint64_t op1, svint64_t op2, uint64_t imm_rotation) + /// SQCADD Ztied1.D, Ztied1.D, Zop2.D, #imm_rotation + /// + public static Vector AddSaturateRotateComplex(Vector left, Vector right, [ConstantExpected(Min = 0, Max = (byte)(1))] byte rotation) => AddSaturateRotateComplex(left, right, rotation); + + /// + /// svint8_t svqcadd[_s8](svint8_t op1, svint8_t op2, uint64_t imm_rotation) + /// SQCADD Ztied1.B, Ztied1.B, Zop2.B, #imm_rotation + /// + public static Vector AddSaturateRotateComplex(Vector left, Vector right, [ConstantExpected(Min = 0, Max = (byte)(1))] byte rotation) => AddSaturateRotateComplex(left, right, rotation); + // Add wide (bottom) @@ -1202,7 +1178,6 @@ internal Arm64() { } /// svfloat32_t svcvtnt_f32[_f64]_m(svfloat32_t even, svbool_t pg, svfloat64_t op) /// svfloat32_t svcvtnt_f32[_f64]_x(svfloat32_t even, svbool_t pg, svfloat64_t op) /// FCVTNT Ztied.S, Pg/M, Zop.D - /// FCVTNT Ztied.S, Pg/M, Zop.D /// public static Vector ConvertToSingleOdd(Vector even, Vector value) => ConvertToSingleOdd(even, value); @@ -1212,7 +1187,6 @@ internal Arm64() { } /// svfloat32_t svcvtxnt_f32[_f64]_m(svfloat32_t even, svbool_t pg, svfloat64_t op) /// svfloat32_t svcvtxnt_f32[_f64]_x(svfloat32_t even, svbool_t pg, svfloat64_t op) /// FCVTXNT Ztied.S, Pg/M, Zop.D - /// FCVTXNT Ztied.S, Pg/M, Zop.D /// public static Vector ConvertToSingleOddRoundToOdd(Vector even, Vector value) => ConvertToSingleOddRoundToOdd(even, value); @@ -1270,7 +1244,6 @@ internal Arm64() { } /// svuint8_t svhadd[_u8]_x(svbool_t pg, svuint8_t op1, svuint8_t op2) /// svuint8_t svhadd[_u8]_z(svbool_t pg, svuint8_t op1, svuint8_t op2) /// UHADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// UHADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// UHADD Ztied2.B, Pg/M, Ztied2.B, Zop1.B /// public static Vector FusedAddHalving(Vector left, Vector right) => FusedAddHalving(left, right); @@ -1280,7 +1253,6 @@ internal Arm64() { } /// svint16_t svhadd[_s16]_x(svbool_t pg, svint16_t op1, svint16_t op2) /// svint16_t svhadd[_s16]_z(svbool_t pg, svint16_t op1, svint16_t op2) /// SHADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// SHADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// SHADD Ztied2.H, Pg/M, Ztied2.H, Zop1.H /// public static Vector FusedAddHalving(Vector left, Vector right) => FusedAddHalving(left, right); @@ -1290,7 +1262,6 @@ internal Arm64() { } /// svint32_t svhadd[_s32]_x(svbool_t pg, svint32_t op1, svint32_t op2) /// svint32_t svhadd[_s32]_z(svbool_t pg, svint32_t op1, svint32_t op2) /// SHADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// SHADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// SHADD Ztied2.S, Pg/M, Ztied2.S, Zop1.S /// public static Vector FusedAddHalving(Vector left, Vector right) => FusedAddHalving(left, right); @@ -1300,7 +1271,6 @@ internal Arm64() { } /// svint64_t svhadd[_s64]_x(svbool_t pg, svint64_t op1, svint64_t op2) /// svint64_t svhadd[_s64]_z(svbool_t pg, svint64_t op1, svint64_t op2) /// SHADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// SHADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// SHADD Ztied2.D, Pg/M, Ztied2.D, Zop1.D /// public static Vector FusedAddHalving(Vector left, Vector right) => FusedAddHalving(left, right); @@ -1310,7 +1280,6 @@ internal Arm64() { } /// svint8_t svhadd[_s8]_x(svbool_t pg, svint8_t op1, svint8_t op2) /// svint8_t svhadd[_s8]_z(svbool_t pg, svint8_t op1, svint8_t op2) /// SHADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// SHADD Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// SHADD Ztied2.B, Pg/M, Ztied2.B, Zop1.B /// public static Vector FusedAddHalving(Vector left, Vector right) => FusedAddHalving(left, right); @@ -1320,7 +1289,6 @@ internal Arm64() { } /// svuint16_t svhadd[_u16]_x(svbool_t pg, svuint16_t op1, svuint16_t op2) /// svuint16_t svhadd[_u16]_z(svbool_t pg, svuint16_t op1, svuint16_t op2) /// UHADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// UHADD Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// UHADD Ztied2.H, Pg/M, Ztied2.H, Zop1.H /// public static Vector FusedAddHalving(Vector left, Vector right) => FusedAddHalving(left, right); @@ -1330,7 +1298,6 @@ internal Arm64() { } /// svuint32_t svhadd[_u32]_x(svbool_t pg, svuint32_t op1, svuint32_t op2) /// svuint32_t svhadd[_u32]_z(svbool_t pg, svuint32_t op1, svuint32_t op2) /// UHADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// UHADD Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// UHADD Ztied2.S, Pg/M, Ztied2.S, Zop1.S /// public static Vector FusedAddHalving(Vector left, Vector right) => FusedAddHalving(left, right); @@ -1340,7 +1307,6 @@ internal Arm64() { } /// svuint64_t svhadd[_u64]_x(svbool_t pg, svuint64_t op1, svuint64_t op2) /// svuint64_t svhadd[_u64]_z(svbool_t pg, svuint64_t op1, svuint64_t op2) /// UHADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// UHADD Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// UHADD Ztied2.D, Pg/M, Ztied2.D, Zop1.D /// public static Vector FusedAddHalving(Vector left, Vector right) => FusedAddHalving(left, right); @@ -1352,7 +1318,6 @@ internal Arm64() { } /// svuint8_t svhsub[_u8]_x(svbool_t pg, svuint8_t op1, svuint8_t op2) /// svuint8_t svhsub[_u8]_z(svbool_t pg, svuint8_t op1, svuint8_t op2) /// UHSUB Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// UHSUB Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// UHSUBR Ztied2.B, Pg/M, Ztied2.B, Zop1.B /// public static Vector FusedSubtractHalving(Vector left, Vector right) => FusedSubtractHalving(left, right); @@ -1362,7 +1327,6 @@ internal Arm64() { } /// svint16_t svhsub[_s16]_x(svbool_t pg, svint16_t op1, svint16_t op2) /// svint16_t svhsub[_s16]_z(svbool_t pg, svint16_t op1, svint16_t op2) /// SHSUB Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// SHSUB Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// SHSUBR Ztied2.H, Pg/M, Ztied2.H, Zop1.H /// public static Vector FusedSubtractHalving(Vector left, Vector right) => FusedSubtractHalving(left, right); @@ -1372,7 +1336,6 @@ internal Arm64() { } /// svint32_t svhsub[_s32]_x(svbool_t pg, svint32_t op1, svint32_t op2) /// svint32_t svhsub[_s32]_z(svbool_t pg, svint32_t op1, svint32_t op2) /// SHSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// SHSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// SHSUBR Ztied2.S, Pg/M, Ztied2.S, Zop1.S /// public static Vector FusedSubtractHalving(Vector left, Vector right) => FusedSubtractHalving(left, right); @@ -1382,7 +1345,6 @@ internal Arm64() { } /// svint64_t svhsub[_s64]_x(svbool_t pg, svint64_t op1, svint64_t op2) /// svint64_t svhsub[_s64]_z(svbool_t pg, svint64_t op1, svint64_t op2) /// SHSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// SHSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// SHSUBR Ztied2.D, Pg/M, Ztied2.D, Zop1.D /// public static Vector FusedSubtractHalving(Vector left, Vector right) => FusedSubtractHalving(left, right); @@ -1392,7 +1354,6 @@ internal Arm64() { } /// svint8_t svhsub[_s8]_x(svbool_t pg, svint8_t op1, svint8_t op2) /// svint8_t svhsub[_s8]_z(svbool_t pg, svint8_t op1, svint8_t op2) /// SHSUB Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// SHSUB Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// SHSUBR Ztied2.B, Pg/M, Ztied2.B, Zop1.B /// public static Vector FusedSubtractHalving(Vector left, Vector right) => FusedSubtractHalving(left, right); @@ -1402,7 +1363,6 @@ internal Arm64() { } /// svuint16_t svhsub[_u16]_x(svbool_t pg, svuint16_t op1, svuint16_t op2) /// svuint16_t svhsub[_u16]_z(svbool_t pg, svuint16_t op1, svuint16_t op2) /// UHSUB Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// UHSUB Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// UHSUBR Ztied2.H, Pg/M, Ztied2.H, Zop1.H /// public static Vector FusedSubtractHalving(Vector left, Vector right) => FusedSubtractHalving(left, right); @@ -1412,7 +1372,6 @@ internal Arm64() { } /// svuint32_t svhsub[_u32]_x(svbool_t pg, svuint32_t op1, svuint32_t op2) /// svuint32_t svhsub[_u32]_z(svbool_t pg, svuint32_t op1, svuint32_t op2) /// UHSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// UHSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// UHSUBR Ztied2.S, Pg/M, Ztied2.S, Zop1.S /// public static Vector FusedSubtractHalving(Vector left, Vector right) => FusedSubtractHalving(left, right); @@ -1422,7 +1381,6 @@ internal Arm64() { } /// svuint64_t svhsub[_u64]_x(svbool_t pg, svuint64_t op1, svuint64_t op2) /// svuint64_t svhsub[_u64]_z(svbool_t pg, svuint64_t op1, svuint64_t op2) /// UHSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// UHSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// UHSUBR Ztied2.D, Pg/M, Ztied2.D, Zop1.D /// public static Vector FusedSubtractHalving(Vector left, Vector right) => FusedSubtractHalving(left, right); @@ -1603,7 +1561,6 @@ internal Arm64() { } /// svfloat64_t svmaxnmp[_f64]_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) /// svfloat64_t svmaxnmp[_f64]_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) /// FMAXNMP Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// FMAXNMP Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// public static Vector MaxNumberPairwise(Vector left, Vector right) => MaxNumberPairwise(left, right); @@ -1611,7 +1568,6 @@ internal Arm64() { } /// svfloat32_t svmaxnmp[_f32]_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) /// svfloat32_t svmaxnmp[_f32]_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) /// FMAXNMP Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// FMAXNMP Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// public static Vector MaxNumberPairwise(Vector left, Vector right) => MaxNumberPairwise(left, right); @@ -1621,7 +1577,6 @@ internal Arm64() { } /// svuint8_t svmaxp[_u8]_m(svbool_t pg, svuint8_t op1, svuint8_t op2) /// svuint8_t svmaxp[_u8]_x(svbool_t pg, svuint8_t op1, svuint8_t op2) /// UMAXP Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// UMAXP Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// public static Vector MaxPairwise(Vector left, Vector right) => MaxPairwise(left, right); @@ -1629,7 +1584,6 @@ internal Arm64() { } /// svfloat64_t svmaxp[_f64]_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) /// svfloat64_t svmaxp[_f64]_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) /// FMAXP Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// FMAXP Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// public static Vector MaxPairwise(Vector left, Vector right) => MaxPairwise(left, right); @@ -1637,7 +1591,6 @@ internal Arm64() { } /// svint16_t svmaxp[_s16]_m(svbool_t pg, svint16_t op1, svint16_t op2) /// svint16_t svmaxp[_s16]_x(svbool_t pg, svint16_t op1, svint16_t op2) /// SMAXP Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// SMAXP Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// public static Vector MaxPairwise(Vector left, Vector right) => MaxPairwise(left, right); @@ -1645,7 +1598,6 @@ internal Arm64() { } /// svint32_t svmaxp[_s32]_m(svbool_t pg, svint32_t op1, svint32_t op2) /// svint32_t svmaxp[_s32]_x(svbool_t pg, svint32_t op1, svint32_t op2) /// SMAXP Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// SMAXP Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// public static Vector MaxPairwise(Vector left, Vector right) => MaxPairwise(left, right); @@ -1653,7 +1605,6 @@ internal Arm64() { } /// svint64_t svmaxp[_s64]_m(svbool_t pg, svint64_t op1, svint64_t op2) /// svint64_t svmaxp[_s64]_x(svbool_t pg, svint64_t op1, svint64_t op2) /// SMAXP Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// SMAXP Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// public static Vector MaxPairwise(Vector left, Vector right) => MaxPairwise(left, right); @@ -1661,7 +1612,6 @@ internal Arm64() { } /// svint8_t svmaxp[_s8]_m(svbool_t pg, svint8_t op1, svint8_t op2) /// svint8_t svmaxp[_s8]_x(svbool_t pg, svint8_t op1, svint8_t op2) /// SMAXP Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// SMAXP Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// public static Vector MaxPairwise(Vector left, Vector right) => MaxPairwise(left, right); @@ -1669,7 +1619,6 @@ internal Arm64() { } /// svfloat32_t svmaxp[_f32]_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) /// svfloat32_t svmaxp[_f32]_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) /// FMAXP Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// FMAXP Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// public static Vector MaxPairwise(Vector left, Vector right) => MaxPairwise(left, right); @@ -1677,7 +1626,6 @@ internal Arm64() { } /// svuint16_t svmaxp[_u16]_m(svbool_t pg, svuint16_t op1, svuint16_t op2) /// svuint16_t svmaxp[_u16]_x(svbool_t pg, svuint16_t op1, svuint16_t op2) /// UMAXP Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// UMAXP Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// public static Vector MaxPairwise(Vector left, Vector right) => MaxPairwise(left, right); @@ -1685,7 +1633,6 @@ internal Arm64() { } /// svuint32_t svmaxp[_u32]_m(svbool_t pg, svuint32_t op1, svuint32_t op2) /// svuint32_t svmaxp[_u32]_x(svbool_t pg, svuint32_t op1, svuint32_t op2) /// UMAXP Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// UMAXP Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// public static Vector MaxPairwise(Vector left, Vector right) => MaxPairwise(left, right); @@ -1693,7 +1640,6 @@ internal Arm64() { } /// svuint64_t svmaxp[_u64]_m(svbool_t pg, svuint64_t op1, svuint64_t op2) /// svuint64_t svmaxp[_u64]_x(svbool_t pg, svuint64_t op1, svuint64_t op2) /// UMAXP Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// UMAXP Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// public static Vector MaxPairwise(Vector left, Vector right) => MaxPairwise(left, right); @@ -1703,7 +1649,6 @@ internal Arm64() { } /// svfloat64_t svminnmp[_f64]_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) /// svfloat64_t svminnmp[_f64]_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) /// FMINNMP Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// FMINNMP Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// public static Vector MinNumberPairwise(Vector left, Vector right) => MinNumberPairwise(left, right); @@ -1711,7 +1656,6 @@ internal Arm64() { } /// svfloat32_t svminnmp[_f32]_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) /// svfloat32_t svminnmp[_f32]_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) /// FMINNMP Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// FMINNMP Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// public static Vector MinNumberPairwise(Vector left, Vector right) => MinNumberPairwise(left, right); @@ -1721,7 +1665,6 @@ internal Arm64() { } /// svuint8_t svminp[_u8]_m(svbool_t pg, svuint8_t op1, svuint8_t op2) /// svuint8_t svminp[_u8]_x(svbool_t pg, svuint8_t op1, svuint8_t op2) /// UMINP Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// UMINP Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// public static Vector MinPairwise(Vector left, Vector right) => MinPairwise(left, right); @@ -1729,7 +1672,6 @@ internal Arm64() { } /// svfloat64_t svminp[_f64]_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) /// svfloat64_t svminp[_f64]_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) /// FMINP Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// FMINP Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// public static Vector MinPairwise(Vector left, Vector right) => MinPairwise(left, right); @@ -1737,7 +1679,6 @@ internal Arm64() { } /// svint16_t svminp[_s16]_m(svbool_t pg, svint16_t op1, svint16_t op2) /// svint16_t svminp[_s16]_x(svbool_t pg, svint16_t op1, svint16_t op2) /// SMINP Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// SMINP Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// public static Vector MinPairwise(Vector left, Vector right) => MinPairwise(left, right); @@ -1745,7 +1686,6 @@ internal Arm64() { } /// svint32_t svminp[_s32]_m(svbool_t pg, svint32_t op1, svint32_t op2) /// svint32_t svminp[_s32]_x(svbool_t pg, svint32_t op1, svint32_t op2) /// SMINP Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// SMINP Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// public static Vector MinPairwise(Vector left, Vector right) => MinPairwise(left, right); @@ -1753,7 +1693,6 @@ internal Arm64() { } /// svint64_t svminp[_s64]_m(svbool_t pg, svint64_t op1, svint64_t op2) /// svint64_t svminp[_s64]_x(svbool_t pg, svint64_t op1, svint64_t op2) /// SMINP Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// SMINP Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// public static Vector MinPairwise(Vector left, Vector right) => MinPairwise(left, right); @@ -1761,7 +1700,6 @@ internal Arm64() { } /// svint8_t svminp[_s8]_m(svbool_t pg, svint8_t op1, svint8_t op2) /// svint8_t svminp[_s8]_x(svbool_t pg, svint8_t op1, svint8_t op2) /// SMINP Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// SMINP Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// public static Vector MinPairwise(Vector left, Vector right) => MinPairwise(left, right); @@ -1769,7 +1707,6 @@ internal Arm64() { } /// svfloat32_t svminp[_f32]_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) /// svfloat32_t svminp[_f32]_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) /// FMINP Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// FMINP Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// public static Vector MinPairwise(Vector left, Vector right) => MinPairwise(left, right); @@ -1777,7 +1714,6 @@ internal Arm64() { } /// svuint16_t svminp[_u16]_m(svbool_t pg, svuint16_t op1, svuint16_t op2) /// svuint16_t svminp[_u16]_x(svbool_t pg, svuint16_t op1, svuint16_t op2) /// UMINP Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// UMINP Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// public static Vector MinPairwise(Vector left, Vector right) => MinPairwise(left, right); @@ -1785,7 +1721,6 @@ internal Arm64() { } /// svuint32_t svminp[_u32]_m(svbool_t pg, svuint32_t op1, svuint32_t op2) /// svuint32_t svminp[_u32]_x(svbool_t pg, svuint32_t op1, svuint32_t op2) /// UMINP Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// UMINP Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// public static Vector MinPairwise(Vector left, Vector right) => MinPairwise(left, right); @@ -1793,7 +1728,6 @@ internal Arm64() { } /// svuint64_t svminp[_u64]_m(svbool_t pg, svuint64_t op1, svuint64_t op2) /// svuint64_t svminp[_u64]_x(svbool_t pg, svuint64_t op1, svuint64_t op2) /// UMINP Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// UMINP Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// public static Vector MinPairwise(Vector left, Vector right) => MinPairwise(left, right); @@ -4051,7 +3985,6 @@ internal Arm64() { } /// svuint8_t svqsub[_u8]_x(svbool_t pg, svuint8_t op1, svuint8_t op2) /// svuint8_t svqsub[_u8]_z(svbool_t pg, svuint8_t op1, svuint8_t op2) /// UQSUB Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// UQSUB Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// UQSUBR Ztied2.B, Pg/M, Ztied2.B, Zop1.B /// UQSUB Zresult.B, Zop1.B, Zop2.B /// @@ -4062,7 +3995,6 @@ internal Arm64() { } /// svint16_t svqsub[_s16]_x(svbool_t pg, svint16_t op1, svint16_t op2) /// svint16_t svqsub[_s16]_z(svbool_t pg, svint16_t op1, svint16_t op2) /// SQSUB Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// SQSUB Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// SQSUBR Ztied2.H, Pg/M, Ztied2.H, Zop1.H /// SQSUB Zresult.H, Zop1.H, Zop2.H /// @@ -4073,7 +4005,6 @@ internal Arm64() { } /// svint32_t svqsub[_s32]_x(svbool_t pg, svint32_t op1, svint32_t op2) /// svint32_t svqsub[_s32]_z(svbool_t pg, svint32_t op1, svint32_t op2) /// SQSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// SQSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// SQSUBR Ztied2.S, Pg/M, Ztied2.S, Zop1.S /// SQSUB Zresult.S, Zop1.S, Zop2.S /// @@ -4084,7 +4015,6 @@ internal Arm64() { } /// svint64_t svqsub[_s64]_x(svbool_t pg, svint64_t op1, svint64_t op2) /// svint64_t svqsub[_s64]_z(svbool_t pg, svint64_t op1, svint64_t op2) /// SQSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// SQSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// SQSUBR Ztied2.D, Pg/M, Ztied2.D, Zop1.D /// SQSUB Zresult.D, Zop1.D, Zop2.D /// @@ -4095,7 +4025,6 @@ internal Arm64() { } /// svint8_t svqsub[_s8]_x(svbool_t pg, svint8_t op1, svint8_t op2) /// svint8_t svqsub[_s8]_z(svbool_t pg, svint8_t op1, svint8_t op2) /// SQSUB Ztied1.B, Pg/M, Ztied1.B, Zop2.B - /// SQSUB Ztied1.B, Pg/M, Ztied1.B, Zop2.B /// SQSUBR Ztied2.B, Pg/M, Ztied2.B, Zop1.B /// SQSUB Zresult.B, Zop1.B, Zop2.B /// @@ -4106,7 +4035,6 @@ internal Arm64() { } /// svuint16_t svqsub[_u16]_x(svbool_t pg, svuint16_t op1, svuint16_t op2) /// svuint16_t svqsub[_u16]_z(svbool_t pg, svuint16_t op1, svuint16_t op2) /// UQSUB Ztied1.H, Pg/M, Ztied1.H, Zop2.H - /// UQSUB Ztied1.H, Pg/M, Ztied1.H, Zop2.H /// UQSUBR Ztied2.H, Pg/M, Ztied2.H, Zop1.H /// UQSUB Zresult.H, Zop1.H, Zop2.H /// @@ -4117,7 +4045,6 @@ internal Arm64() { } /// svuint32_t svqsub[_u32]_x(svbool_t pg, svuint32_t op1, svuint32_t op2) /// svuint32_t svqsub[_u32]_z(svbool_t pg, svuint32_t op1, svuint32_t op2) /// UQSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S - /// UQSUB Ztied1.S, Pg/M, Ztied1.S, Zop2.S /// UQSUBR Ztied2.S, Pg/M, Ztied2.S, Zop1.S /// UQSUB Zresult.S, Zop1.S, Zop2.S /// @@ -4128,7 +4055,6 @@ internal Arm64() { } /// svuint64_t svqsub[_u64]_x(svbool_t pg, svuint64_t op1, svuint64_t op2) /// svuint64_t svqsub[_u64]_z(svbool_t pg, svuint64_t op1, svuint64_t op2) /// UQSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D - /// UQSUB Ztied1.D, Pg/M, Ztied1.D, Zop2.D /// UQSUBR Ztied2.D, Pg/M, Ztied2.D, Zop1.D /// UQSUB Zresult.D, Zop1.D, Zop2.D /// diff --git a/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs b/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs index 479501776f2a19..de4714818720bb 100644 --- a/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs +++ b/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs @@ -6281,18 +6281,18 @@ internal Arm64() { } public static new System.Numerics.Vector AddSaturate(System.Numerics.Vector left, System.Numerics.Vector right) { throw null; } public static new System.Numerics.Vector AddSaturate(System.Numerics.Vector left, System.Numerics.Vector right) { throw null; } public static new System.Numerics.Vector AddSaturate(System.Numerics.Vector left, System.Numerics.Vector right) { throw null; } + public static System.Numerics.Vector AddSaturate(System.Numerics.Vector left, System.Numerics.Vector right) { throw null; } + public static System.Numerics.Vector AddSaturate(System.Numerics.Vector left, System.Numerics.Vector right) { throw null; } + public static System.Numerics.Vector AddSaturate(System.Numerics.Vector left, System.Numerics.Vector right) { throw null; } + public static System.Numerics.Vector AddSaturate(System.Numerics.Vector left, System.Numerics.Vector right) { throw null; } + public static System.Numerics.Vector AddSaturate(System.Numerics.Vector left, System.Numerics.Vector right) { throw null; } + public static System.Numerics.Vector AddSaturate(System.Numerics.Vector left, System.Numerics.Vector right) { throw null; } + public static System.Numerics.Vector AddSaturate(System.Numerics.Vector left, System.Numerics.Vector right) { throw null; } + public static System.Numerics.Vector AddSaturate(System.Numerics.Vector left, System.Numerics.Vector right) { throw null; } public static System.Numerics.Vector AddSaturateRotateComplex(System.Numerics.Vector left, System.Numerics.Vector right, [ConstantExpected(Min = 0, Max = (byte)(1))] byte rotation) { throw null; } public static System.Numerics.Vector AddSaturateRotateComplex(System.Numerics.Vector left, System.Numerics.Vector right, [ConstantExpected(Min = 0, Max = (byte)(1))] byte rotation) { throw null; } public static System.Numerics.Vector AddSaturateRotateComplex(System.Numerics.Vector left, System.Numerics.Vector right, [ConstantExpected(Min = 0, Max = (byte)(1))] byte rotation) { throw null; } public static System.Numerics.Vector AddSaturateRotateComplex(System.Numerics.Vector left, System.Numerics.Vector right, [ConstantExpected(Min = 0, Max = (byte)(1))] byte rotation) { throw null; } - public static System.Numerics.Vector AddSaturateWithSignedAddend(System.Numerics.Vector left, System.Numerics.Vector right) { throw null; } - public static System.Numerics.Vector AddSaturateWithSignedAddend(System.Numerics.Vector left, System.Numerics.Vector right) { throw null; } - public static System.Numerics.Vector AddSaturateWithSignedAddend(System.Numerics.Vector left, System.Numerics.Vector right) { throw null; } - public static System.Numerics.Vector AddSaturateWithSignedAddend(System.Numerics.Vector left, System.Numerics.Vector right) { throw null; } - public static System.Numerics.Vector AddSaturateWithUnsignedAddend(System.Numerics.Vector left, System.Numerics.Vector right) { throw null; } - public static System.Numerics.Vector AddSaturateWithUnsignedAddend(System.Numerics.Vector left, System.Numerics.Vector right) { throw null; } - public static System.Numerics.Vector AddSaturateWithUnsignedAddend(System.Numerics.Vector left, System.Numerics.Vector right) { throw null; } - public static System.Numerics.Vector AddSaturateWithUnsignedAddend(System.Numerics.Vector left, System.Numerics.Vector right) { throw null; } public static System.Numerics.Vector AddWideningEven(System.Numerics.Vector left, System.Numerics.Vector right) { throw null; } public static System.Numerics.Vector AddWideningEven(System.Numerics.Vector left, System.Numerics.Vector right) { throw null; } public static System.Numerics.Vector AddWideningEven(System.Numerics.Vector left, System.Numerics.Vector right) { throw null; } diff --git a/src/libraries/apicompat/ApiCompatBaseline.NetCoreAppLatestStable.xml b/src/libraries/apicompat/ApiCompatBaseline.NetCoreAppLatestStable.xml index c34164bf783cd0..5202b7ae2f0621 100644 --- a/src/libraries/apicompat/ApiCompatBaseline.NetCoreAppLatestStable.xml +++ b/src/libraries/apicompat/ApiCompatBaseline.NetCoreAppLatestStable.xml @@ -1,6 +1,54 @@  + + CP0002 + M:System.Runtime.Intrinsics.Arm.Sve2.AddSaturateWithSignedAddend(System.Numerics.Vector{System.Byte},System.Numerics.Vector{System.SByte}) + net10.0/System.Runtime.Intrinsics.dll + net11.0/System.Runtime.Intrinsics.dll + + + CP0002 + M:System.Runtime.Intrinsics.Arm.Sve2.AddSaturateWithSignedAddend(System.Numerics.Vector{System.UInt16},System.Numerics.Vector{System.Int16}) + net10.0/System.Runtime.Intrinsics.dll + net11.0/System.Runtime.Intrinsics.dll + + + CP0002 + M:System.Runtime.Intrinsics.Arm.Sve2.AddSaturateWithSignedAddend(System.Numerics.Vector{System.UInt32},System.Numerics.Vector{System.Int32}) + net10.0/System.Runtime.Intrinsics.dll + net11.0/System.Runtime.Intrinsics.dll + + + CP0002 + M:System.Runtime.Intrinsics.Arm.Sve2.AddSaturateWithSignedAddend(System.Numerics.Vector{System.UInt64},System.Numerics.Vector{System.Int64}) + net10.0/System.Runtime.Intrinsics.dll + net11.0/System.Runtime.Intrinsics.dll + + + CP0002 + M:System.Runtime.Intrinsics.Arm.Sve2.AddSaturateWithUnsignedAddend(System.Numerics.Vector{System.Int16},System.Numerics.Vector{System.UInt16}) + net10.0/System.Runtime.Intrinsics.dll + net11.0/System.Runtime.Intrinsics.dll + + + CP0002 + M:System.Runtime.Intrinsics.Arm.Sve2.AddSaturateWithUnsignedAddend(System.Numerics.Vector{System.Int32},System.Numerics.Vector{System.UInt32}) + net10.0/System.Runtime.Intrinsics.dll + net11.0/System.Runtime.Intrinsics.dll + + + CP0002 + M:System.Runtime.Intrinsics.Arm.Sve2.AddSaturateWithUnsignedAddend(System.Numerics.Vector{System.Int64},System.Numerics.Vector{System.UInt64}) + net10.0/System.Runtime.Intrinsics.dll + net11.0/System.Runtime.Intrinsics.dll + + + CP0002 + M:System.Runtime.Intrinsics.Arm.Sve2.AddSaturateWithUnsignedAddend(System.Numerics.Vector{System.SByte},System.Numerics.Vector{System.Byte}) + net10.0/System.Runtime.Intrinsics.dll + net11.0/System.Runtime.Intrinsics.dll + CP0014 T:System.Runtime.CompilerServices.AsyncHelpers:[T:System.Diagnostics.CodeAnalysis.ExperimentalAttribute] diff --git a/src/tests/Common/GenerateHWIntrinsicTests/Arm/Sve2Tests.cs b/src/tests/Common/GenerateHWIntrinsicTests/Arm/Sve2Tests.cs index 2bba9e4521cc8c..d10b37de7429db 100644 --- a/src/tests/Common/GenerateHWIntrinsicTests/Arm/Sve2Tests.cs +++ b/src/tests/Common/GenerateHWIntrinsicTests/Arm/Sve2Tests.cs @@ -134,6 +134,16 @@ static class Sve2Tests (Templates.SveVecBinOpTest, new Dictionary { ["TestName"] = "Sve2_AddSaturate_uint", ["Method"] = "AddSaturate", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt32", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "UInt32", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt32()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "Helpers.AddSaturate(left[i], right[i]) != result[i]", ["GetIterResult"] = "(UInt32) Helpers.AddSaturate(left[i], right[i])"}), (Templates.SveVecBinOpTest, new Dictionary { ["TestName"] = "Sve2_AddSaturate_ulong", ["Method"] = "AddSaturate", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt64", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "UInt64", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "UInt64", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt64()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt64()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "Helpers.AddSaturate(left[i], right[i]) != result[i]", ["GetIterResult"] = "(UInt64) Helpers.AddSaturate(left[i], right[i])"}), + (Templates.SveVecBinOpDifferentRetType, new Dictionary {["TestName"] = "Sve2_AddSaturate_byte_sbyte", ["Method"] = "AddSaturate", ["RetVectorType"] = "Vector", ["RetBaseType"] = "Byte", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Byte", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "SByte", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetByte()", ["NextValueOp2"] = "TestLibrary.Generator.GetSByte()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "Helpers.AddSaturate(left[i], right[i]) != result[i]", ["GetIterResult"] = "(Byte) Helpers.AddSaturate(left[i], right[i])"}), + (Templates.SveVecBinOpDifferentRetType, new Dictionary {["TestName"] = "Sve2_AddSaturate_ushort_short", ["Method"] = "AddSaturate", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt16", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "UInt16", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "Int16", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt16()", ["NextValueOp2"] = "TestLibrary.Generator.GetInt16()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "Helpers.AddSaturate(left[i], right[i]) != result[i]", ["GetIterResult"] = "(UInt16) Helpers.AddSaturate(left[i], right[i])"}), + (Templates.SveVecBinOpDifferentRetType, new Dictionary {["TestName"] = "Sve2_AddSaturate_uint_int", ["Method"] = "AddSaturate", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt32", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "Int32", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt32()", ["NextValueOp2"] = "TestLibrary.Generator.GetInt32()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "Helpers.AddSaturate(left[i], right[i]) != result[i]", ["GetIterResult"] = "(UInt32) Helpers.AddSaturate(left[i], right[i])"}), + (Templates.SveVecBinOpDifferentRetType, new Dictionary {["TestName"] = "Sve2_AddSaturate_ulong_long", ["Method"] = "AddSaturate", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt64", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "UInt64", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "Int64", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt64()", ["NextValueOp2"] = "TestLibrary.Generator.GetInt64()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "Helpers.AddSaturate(left[i], right[i]) != result[i]", ["GetIterResult"] = "(UInt64) Helpers.AddSaturate(left[i], right[i])"}), + + (Templates.SveVecBinOpDifferentRetType, new Dictionary {["TestName"] = "Sve2_AddSaturate_sbyte_byte", ["Method"] = "AddSaturate", ["RetVectorType"] = "Vector", ["RetBaseType"] = "SByte", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "SByte", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "Byte", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetSByte()", ["NextValueOp2"] = "TestLibrary.Generator.GetByte()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "Helpers.AddSaturate(left[i], right[i]) != result[i]", ["GetIterResult"] = "(SByte) Helpers.AddSaturate(left[i], right[i])"}), + (Templates.SveVecBinOpDifferentRetType, new Dictionary {["TestName"] = "Sve2_AddSaturate_short_ushort", ["Method"] = "AddSaturate", ["RetVectorType"] = "Vector", ["RetBaseType"] = "Int16", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Int16", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "UInt16", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetInt16()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt16()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "Helpers.AddSaturate(left[i], right[i]) != result[i]", ["GetIterResult"] = "(Int16) Helpers.AddSaturate(left[i], right[i])"}), + (Templates.SveVecBinOpDifferentRetType, new Dictionary {["TestName"] = "Sve2_AddSaturate_int_uint", ["Method"] = "AddSaturate", ["RetVectorType"] = "Vector", ["RetBaseType"] = "Int32", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Int32", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "UInt32", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetInt32()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "Helpers.AddSaturate(left[i], right[i]) != result[i]", ["GetIterResult"] = "(Int32) Helpers.AddSaturate(left[i], right[i])"}), + (Templates.SveVecBinOpDifferentRetType, new Dictionary {["TestName"] = "Sve2_AddSaturate_long_ulong", ["Method"] = "AddSaturate", ["RetVectorType"] = "Vector", ["RetBaseType"] = "Int64", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Int64", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "UInt64", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetInt64()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt64()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "Helpers.AddSaturate(left[i], right[i]) != result[i]", ["GetIterResult"] = "(Int64) Helpers.AddSaturate(left[i], right[i])"}), + (Templates.SveVecImmBinOpVecTest, new Dictionary {["TestName"] = "Sve2_AddSaturateRotateComplex_sbyte_0", ["Method"] = "AddSaturateRotateComplex", ["RetVectorType"] = "Vector", ["RetBaseType"] = "SByte", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "SByte", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "SByte", ["Op3BaseType"] = "Byte", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetSByte()", ["NextValueOp2"] = "TestLibrary.Generator.GetSByte()", ["NextValueMask"] = "Helpers.getMaskSByte()", ["Imm"] = "0", ["InvalidImm"] = "2", ["ConvertFunc"] = "", ["ValidateVectorResult"] = "!result.SequenceEqual(Helpers.AddSaturateRotateComplex(firstOp, secondOp, Imm))", ["GetVectorResult"] = "Helpers.AddSaturateRotateComplex(first, second, Imm)"}), (Templates.SveVecImmBinOpVecTest, new Dictionary {["TestName"] = "Sve2_AddSaturateRotateComplex_sbyte_1", ["Method"] = "AddSaturateRotateComplex", ["RetVectorType"] = "Vector", ["RetBaseType"] = "SByte", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "SByte", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "SByte", ["Op3BaseType"] = "Byte", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetSByte()", ["NextValueOp2"] = "TestLibrary.Generator.GetSByte()", ["NextValueMask"] = "Helpers.getMaskSByte()", ["Imm"] = "1", ["InvalidImm"] = "2", ["ConvertFunc"] = "", ["ValidateVectorResult"] = "!result.SequenceEqual(Helpers.AddSaturateRotateComplex(firstOp, secondOp, Imm))", ["GetVectorResult"] = "Helpers.AddSaturateRotateComplex(first, second, Imm)"}), @@ -146,16 +156,6 @@ static class Sve2Tests (Templates.SveVecImmBinOpVecTest, new Dictionary {["TestName"] = "Sve2_AddSaturateRotateComplex_long_0", ["Method"] = "AddSaturateRotateComplex", ["RetVectorType"] = "Vector", ["RetBaseType"] = "Int64", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Int64", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "Int64", ["Op3BaseType"] = "Byte", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetInt64()", ["NextValueOp2"] = "TestLibrary.Generator.GetInt64()", ["NextValueMask"] = "Helpers.getMaskInt64()", ["Imm"] = "0", ["InvalidImm"] = "2", ["ConvertFunc"] = "", ["ValidateVectorResult"] = "!result.SequenceEqual(Helpers.AddSaturateRotateComplex(firstOp, secondOp, Imm))", ["GetVectorResult"] = "Helpers.AddSaturateRotateComplex(first, second, Imm)"}), (Templates.SveVecImmBinOpVecTest, new Dictionary {["TestName"] = "Sve2_AddSaturateRotateComplex_long_1", ["Method"] = "AddSaturateRotateComplex", ["RetVectorType"] = "Vector", ["RetBaseType"] = "Int64", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Int64", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "Int64", ["Op3BaseType"] = "Byte", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetInt64()", ["NextValueOp2"] = "TestLibrary.Generator.GetInt64()", ["NextValueMask"] = "Helpers.getMaskInt64()", ["Imm"] = "1", ["InvalidImm"] = "2", ["ConvertFunc"] = "", ["ValidateVectorResult"] = "!result.SequenceEqual(Helpers.AddSaturateRotateComplex(firstOp, secondOp, Imm))", ["GetVectorResult"] = "Helpers.AddSaturateRotateComplex(first, second, Imm)"}), - (Templates.SveVecBinOpDifferentRetType, new Dictionary {["TestName"] = "Sve2_AddSaturateWithSignedAddend_byte_sbyte", ["Method"] = "AddSaturateWithSignedAddend", ["RetVectorType"] = "Vector", ["RetBaseType"] = "Byte", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Byte", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "SByte", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetByte()", ["NextValueOp2"] = "TestLibrary.Generator.GetSByte()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "Helpers.AddSaturate(left[i], right[i]) != result[i]", ["GetIterResult"] = "(Byte) Helpers.AddSaturate(left[i], right[i])"}), - (Templates.SveVecBinOpDifferentRetType, new Dictionary {["TestName"] = "Sve2_AddSaturateWithSignedAddend_ushort_short", ["Method"] = "AddSaturateWithSignedAddend", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt16", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "UInt16", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "Int16", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt16()", ["NextValueOp2"] = "TestLibrary.Generator.GetInt16()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "Helpers.AddSaturate(left[i], right[i]) != result[i]", ["GetIterResult"] = "(UInt16) Helpers.AddSaturate(left[i], right[i])"}), - (Templates.SveVecBinOpDifferentRetType, new Dictionary {["TestName"] = "Sve2_AddSaturateWithSignedAddend_uint_int", ["Method"] = "AddSaturateWithSignedAddend", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt32", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "Int32", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt32()", ["NextValueOp2"] = "TestLibrary.Generator.GetInt32()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "Helpers.AddSaturate(left[i], right[i]) != result[i]", ["GetIterResult"] = "(UInt32) Helpers.AddSaturate(left[i], right[i])"}), - (Templates.SveVecBinOpDifferentRetType, new Dictionary {["TestName"] = "Sve2_AddSaturateWithSignedAddend_ulong_long", ["Method"] = "AddSaturateWithSignedAddend", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt64", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "UInt64", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "Int64", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt64()", ["NextValueOp2"] = "TestLibrary.Generator.GetInt64()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "Helpers.AddSaturate(left[i], right[i]) != result[i]", ["GetIterResult"] = "(UInt64) Helpers.AddSaturate(left[i], right[i])"}), - - (Templates.SveVecBinOpDifferentRetType, new Dictionary {["TestName"] = "Sve2_AddSaturateWithUnsignedAddend_sbyte_byte", ["Method"] = "AddSaturateWithUnsignedAddend", ["RetVectorType"] = "Vector", ["RetBaseType"] = "SByte", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "SByte", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "Byte", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetSByte()", ["NextValueOp2"] = "TestLibrary.Generator.GetByte()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "Helpers.AddSaturate(left[i], right[i]) != result[i]", ["GetIterResult"] = "(SByte) Helpers.AddSaturate(left[i], right[i])"}), - (Templates.SveVecBinOpDifferentRetType, new Dictionary {["TestName"] = "Sve2_AddSaturateWithUnsignedAddend_short_ushort", ["Method"] = "AddSaturateWithUnsignedAddend", ["RetVectorType"] = "Vector", ["RetBaseType"] = "Int16", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Int16", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "UInt16", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetInt16()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt16()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "Helpers.AddSaturate(left[i], right[i]) != result[i]", ["GetIterResult"] = "(Int16) Helpers.AddSaturate(left[i], right[i])"}), - (Templates.SveVecBinOpDifferentRetType, new Dictionary {["TestName"] = "Sve2_AddSaturateWithUnsignedAddend_int_uint", ["Method"] = "AddSaturateWithUnsignedAddend", ["RetVectorType"] = "Vector", ["RetBaseType"] = "Int32", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Int32", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "UInt32", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetInt32()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "Helpers.AddSaturate(left[i], right[i]) != result[i]", ["GetIterResult"] = "(Int32) Helpers.AddSaturate(left[i], right[i])"}), - (Templates.SveVecBinOpDifferentRetType, new Dictionary {["TestName"] = "Sve2_AddSaturateWithUnsignedAddend_long_ulong", ["Method"] = "AddSaturateWithUnsignedAddend", ["RetVectorType"] = "Vector", ["RetBaseType"] = "Int64", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Int64", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "UInt64", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetInt64()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt64()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "Helpers.AddSaturate(left[i], right[i]) != result[i]", ["GetIterResult"] = "(Int64) Helpers.AddSaturate(left[i], right[i])"}), - (Templates.SveVecBinOpDifferentRetType, new Dictionary { ["TestName"] = "Sve2_AddWideningEven_short_short_sbyte", ["Method"] = "AddWideningEven", ["RetVectorType"] = "Vector", ["RetBaseType"] = "Int16", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Int16", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "SByte", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetInt16()", ["NextValueOp2"] = "TestLibrary.Generator.GetSByte()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "Helpers.AddWidening(left[i], right[i * 2]) != result[i]", ["GetIterResult"] = "(Int16) Helpers.AddWidening(left[i], right[i * 2])"}), (Templates.SveVecBinOpDifferentRetType, new Dictionary { ["TestName"] = "Sve2_AddWideningEven_int_int_short", ["Method"] = "AddWideningEven", ["RetVectorType"] = "Vector", ["RetBaseType"] = "Int32", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Int32", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "Int16", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetInt32()", ["NextValueOp2"] = "TestLibrary.Generator.GetInt16()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "Helpers.AddWidening(left[i], right[i * 2]) != result[i]", ["GetIterResult"] = "(Int32) Helpers.AddWidening(left[i], right[i * 2])"}), (Templates.SveVecBinOpDifferentRetType, new Dictionary { ["TestName"] = "Sve2_AddWideningEven_long_long_int", ["Method"] = "AddWideningEven", ["RetVectorType"] = "Vector", ["RetBaseType"] = "Int64", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Int64", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "Int32", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetInt64()", ["NextValueOp2"] = "TestLibrary.Generator.GetInt32()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "Helpers.AddWidening(left[i], right[i * 2]) != result[i]", ["GetIterResult"] = "(Int64) Helpers.AddWidening(left[i], right[i * 2])",}), @@ -834,7 +834,7 @@ static class Sve2Tests (Templates.SveVecImmBinOpTest,new Dictionary {["TestName"] = "Sve2_ShiftRightLogicalRoundedNarrowingSaturateOdd_ushort_uint", ["Method"] = "ShiftRightLogicalRoundedNarrowingSaturateOdd", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt16", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "UInt16", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "UInt32", ["Op3BaseType"] = "Byte", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt16()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["NextValueMask"] = "Helpers.getMaskUInt32()", ["Imm"] = "13", ["InvalidImm"] = "17", ["ValidateIterResult"] = "result[i] != Helpers.ShiftRightLogicalRoundedNarrowingSaturateOdd(firstOp[i], secondOp[Helpers.NarrowIdx(i)], Imm, i)", ["GetIterResult"] = "Helpers.ShiftRightLogicalRoundedNarrowingSaturateOdd(firstOp[i], secondOp[Helpers.NarrowIdx(i)], Imm, i)",}), (Templates.SveVecImmBinOpTest,new Dictionary {["TestName"] = "Sve2_ShiftRightLogicalRoundedNarrowingSaturateOdd_uint_ulong", ["Method"] = "ShiftRightLogicalRoundedNarrowingSaturateOdd", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt32", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "UInt64", ["Op3BaseType"] = "Byte", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt32()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt64()", ["NextValueMask"] = "Helpers.getMaskUInt64()", ["Imm"] = "28", ["InvalidImm"] = "33", ["ValidateIterResult"] = "result[i] != Helpers.ShiftRightLogicalRoundedNarrowingSaturateOdd(firstOp[i], secondOp[Helpers.NarrowIdx(i)], Imm, i)", ["GetIterResult"] = "Helpers.ShiftRightLogicalRoundedNarrowingSaturateOdd(firstOp[i], secondOp[Helpers.NarrowIdx(i)], Imm, i)",}), - (Templates.SveVecTernOpVecTest, new Dictionary { ["TestName"] = "Sve2_SubtractBorrowWideningEven_uint", ["Method"] = "SubtractBorrowWideningEven", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt32", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "UInt32", ["Op3VectorType"] = "Vector", ["Op3BaseType"] = "UInt32", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt32()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["NextValueOp3"] = "TestLibrary.Generator.GetUInt32()", ["ValidateVectorResult"] = "!result.SequenceEqual(Helpers.SubtractBorrowWideningEven(firstOp, secondOp, thirdOp))", ["GetVectorResult"] = "Helpers.SubtractBorrowWideningEven(first, second, third)"}), + (Templates.SveVecTernOpVecTest, new Dictionary { ["TestName"] = "Sve2_SubtractBorrowWideningEven_uint", ["Method"] = "SubtractBorrowWideningEven", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt32", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "UInt32", ["Op3VectorType"] = "Vector", ["Op3BaseType"] = "UInt32", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt32()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["NextValueOp3"] = "TestLibrary.Generator.GetUInt32()", ["ValidateVectorResult"] = "!result.SequenceEqual(Helpers.SubtractBorrowWideningEven(firstOp, secondOp, thirdOp))", ["GetVectorResult"] = "Helpers.SubtractBorrowWideningEven(first, second, third)"}), (Templates.SveVecTernOpVecTest, new Dictionary { ["TestName"] = "Sve2_SubtractBorrowWideningEven_ulong", ["Method"] = "SubtractBorrowWideningEven", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt64", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "UInt64", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "UInt64", ["Op3VectorType"] = "Vector", ["Op3BaseType"] = "UInt64", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt64()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt64()", ["NextValueOp3"] = "TestLibrary.Generator.GetUInt64()", ["ValidateVectorResult"] = "!result.SequenceEqual(Helpers.SubtractBorrowWideningEven(firstOp, secondOp, thirdOp))", ["GetVectorResult"] = "Helpers.SubtractBorrowWideningEven(first, second, third)"}), (Templates.SveVecTernOpVecTest, new Dictionary { ["TestName"] = "Sve2_SubtractBorrowWideningOdd_uint", ["Method"] = "SubtractBorrowWideningOdd", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt32", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "UInt32", ["Op3VectorType"] = "Vector", ["Op3BaseType"] = "UInt32", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt32()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["NextValueOp3"] = "TestLibrary.Generator.GetUInt32()", ["ValidateVectorResult"] = "!result.SequenceEqual(Helpers.SubtractBorrowWideningOdd(firstOp, secondOp, thirdOp))", ["GetVectorResult"] = "Helpers.SubtractBorrowWideningOdd(first, second, third)"}), (Templates.SveVecTernOpVecTest, new Dictionary { ["TestName"] = "Sve2_SubtractBorrowWideningOdd_ulong", ["Method"] = "SubtractBorrowWideningOdd", ["RetVectorType"] = "Vector", ["RetBaseType"] = "UInt64", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "UInt64", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "UInt64", ["Op3VectorType"] = "Vector", ["Op3BaseType"] = "UInt64", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetUInt64()", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt64()", ["NextValueOp3"] = "TestLibrary.Generator.GetUInt64()", ["ValidateVectorResult"] = "!result.SequenceEqual(Helpers.SubtractBorrowWideningOdd(firstOp, secondOp, thirdOp))", ["GetVectorResult"] = "Helpers.SubtractBorrowWideningOdd(first, second, third)"}),