From 74839835fbe79726ce004deb9318cf22894959bc Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Wed, 12 Feb 2014 18:20:58 +0100 Subject: [PATCH 1/9] ARM: mvebu: add audio I2S controller to Armada 370 Device Tree The Armada 370 SoC has an I2S audio controller. This commit adds the description of this controller to the Device Tree describing this SoC, as well as two possible muxing configurations for the I2S bus pins. Signed-off-by: Thomas Petazzoni Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-370.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi index 0d8530c98cf507..e3f4c187ef4832 100644 --- a/arch/arm/boot/dts/armada-370.dtsi +++ b/arch/arm/boot/dts/armada-370.dtsi @@ -132,6 +132,20 @@ "mpp51", "mpp52", "mpp53"; marvell,function = "sd0"; }; + + i2s_pins1: i2s-pins1 { + marvell,pins = "mpp5", "mpp6", "mpp7", + "mpp8", "mpp9", "mpp10", + "mpp12", "mpp13"; + marvell,function = "audio"; + }; + + i2s_pins2: i2s-pins2 { + marvell,pins = "mpp49", "mpp47", "mpp50", + "mpp59", "mpp57", "mpp61", + "mpp62", "mpp60", "mpp58"; + marvell,function = "audio"; + }; }; gpio0: gpio@18100 { @@ -196,6 +210,15 @@ clocks = <&coreclk 2>; }; + audio_controller: audio-controller@30000 { + compatible = "marvell,armada370-audio"; + reg = <0x30000 0x4000>; + interrupts = <93>; + clocks = <&gateclk 0>; + clock-names = "internal"; + status = "disabled"; + }; + usb@50000 { clocks = <&coreclk 0>; }; From 8d001f0b9968f1a79edf49390e5b8d8164df13fe Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Wed, 12 Feb 2014 18:20:59 +0100 Subject: [PATCH 2/9] ARM: mvebu: add I2C0 muxing option for Armada 370 SoC This commit adds a pin-muxing configuration for the I2C0 bus of the Armada 370, which is used on the Armada 370 DB platform to interface with the CS42L51 audio codec. Signed-off-by: Thomas Petazzoni Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-370.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi index e3f4c187ef4832..6f216f0a785660 100644 --- a/arch/arm/boot/dts/armada-370.dtsi +++ b/arch/arm/boot/dts/armada-370.dtsi @@ -133,6 +133,11 @@ marvell,function = "sd0"; }; + i2c0_pins: i2c0-pins { + marvell,pins = "mpp2", "mpp3"; + marvell,function = "i2c0"; + }; + i2s_pins1: i2s-pins1 { marvell,pins = "mpp5", "mpp6", "mpp7", "mpp8", "mpp9", "mpp10", From 249f3822509b74f8c8d0731aeb7ccea065376c9b Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Wed, 12 Feb 2014 18:21:00 +0100 Subject: [PATCH 3/9] ARM: mvebu: add audio support to Armada 370 DB This commit adds the necessary Device Tree informations to enable audio support on the Armada 370 DB platform. In details it: * Instantiates the CS42L51 audio codec on the I2C0 bus, and configures this bus with the appropriate pin-muxing configuration. * Enables the I2S audio controller, and configures it with the appropriate pin-muxing configuration. * Through hog pins, ensures that the other pins possibly used for I2S are muxed with another function than I2S. Signed-off-by: Thomas Petazzoni Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-370-db.dts | 48 +++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts index 08a56bcfc72487..7df18660939b5b 100644 --- a/arch/arm/boot/dts/armada-370-db.dts +++ b/arch/arm/boot/dts/armada-370-db.dts @@ -64,6 +64,22 @@ phy-mode = "rgmii-id"; }; + i2c@11000 { + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + status = "okay"; + audio_codec: audio-codec@4a { + compatible = "cirrus,cs42l51"; + reg = <0x4a>; + }; + }; + + audio-controller@30000 { + pinctrl-0 = <&i2s_pins2>; + pinctrl-names = "default"; + status = "okay"; + }; + mvsdio@d4000 { pinctrl-0 = <&sdio_pins1>; pinctrl-names = "default"; @@ -80,6 +96,30 @@ broken-cd; }; + pinctrl { + /* + * These pins might be muxed as I2S by + * the bootloader, but it conflicts + * with the real I2S pins that are + * muxed using i2s_pins. We must mux + * those pins to a function other than + * I2S. + */ + pinctrl-0 = <&hog_pins1 &hog_pins2>; + pinctrl-names = "default"; + + hog_pins1: hog-pins1 { + marvell,pins = "mpp6", "mpp8", "mpp10", + "mpp12", "mpp13"; + marvell,function = "gpio"; + }; + + hog_pins2: hog-pins2 { + marvell,pins = "mpp5", "mpp7", "mpp9"; + marvell,function = "gpo"; + }; + }; + usb@50000 { status = "okay"; }; @@ -112,10 +152,18 @@ /* Port 0, Lane 0 */ status = "okay"; }; + pcie@2,0 { /* Port 1, Lane 0 */ status = "okay"; }; }; }; + + sound { + compatible = "marvell,a370db-audio"; + marvell,audio-controller = <&audio_controller>; + marvell,audio-codec = <&audio_codec>; + status = "okay"; + }; }; From 5b26bd88b20a257cd18d52d1eebf8e6026aa6be9 Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Wed, 12 Feb 2014 18:21:01 +0100 Subject: [PATCH 4/9] ARM: mvebu: enable S/PDIF audio in Armada 370 DB Device Tree In addition to the analog audio input and output, the Armada 370 DB also has S/PDIF input and output optical connectors. This commit improves the Device Tree description of the Armada 370 DB platform to enable the S/PDIF support. Signed-off-by: Thomas Petazzoni Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-370-db.dts | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts index 7df18660939b5b..82f238a9063ffe 100644 --- a/arch/arm/boot/dts/armada-370-db.dts +++ b/arch/arm/boot/dts/armada-370-db.dts @@ -163,7 +163,15 @@ sound { compatible = "marvell,a370db-audio"; marvell,audio-controller = <&audio_controller>; - marvell,audio-codec = <&audio_codec>; + marvell,audio-codec = <&audio_codec &spdif_out &spdif_in>; status = "okay"; }; + + spdif_out: spdif-out { + compatible = "linux,spdif-dit"; + }; + + spdif_in: spdif-in { + compatible = "linux,spdif-dir"; + }; }; From dd943170838e3cc097cb5fe5f2a4fd4c0986c220 Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Sat, 15 Feb 2014 13:59:52 +0100 Subject: [PATCH 5/9] ARM: Kirkwood: Add DT description of rd88f6192. Mechanically translate rd88f6192-nas-setup.c into DT equivelent. Signed-off-by: Andrew Lunn Signed-off-by: Jason Cooper --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/kirkwood-rd88f6192.dts | 112 +++++++++++++++++++++++ 2 files changed, 113 insertions(+) create mode 100644 arch/arm/boot/dts/kirkwood-rd88f6192.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index cfd364dcf55175..40132ea1ac0e6d 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -112,6 +112,7 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-b3.dtb \ kirkwood-nsa310a.dtb \ kirkwood-openblocks_a6.dtb \ kirkwood-openblocks_a7.dtb \ + kirkwood-rd88f6192.dtb \ kirkwood-sheevaplug.dtb \ kirkwood-sheevaplug-esata.dtb \ kirkwood-topkick.dtb \ diff --git a/arch/arm/boot/dts/kirkwood-rd88f6192.dts b/arch/arm/boot/dts/kirkwood-rd88f6192.dts new file mode 100644 index 00000000000000..e9dd850492976c --- /dev/null +++ b/arch/arm/boot/dts/kirkwood-rd88f6192.dts @@ -0,0 +1,112 @@ +/* + * Marvell RD88F6192 Board descrition + * + * Andrew Lunn + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + * + * This file contains the definitions that are common between the three + * variants of the Marvell Kirkwood Development Board. + */ +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6192.dtsi" + +/ { + model = "Marvell RD88F6192 reference design"; + compatible = "marvell,rd88f6192", "marvell,kirkwood-88f6192", "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x20000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200n8"; + }; + + mbus { + pcie-controller { + status = "okay"; + + pcie@1,0 { + status = "okay"; + }; + }; + }; + + ocp@f1000000 { + pinctrl: pinctrl@10000 { + pinctrl-0 = <&pmx_usb_power>; + pinctrl-names = "default"; + + pmx_usb_power: pmx-usb-power { + marvell,pins = "mpp10"; + marvell,function = "gpo"; + }; + }; + + serial@12000 { + status = "okay"; + + }; + + spi@10600 { + status = "okay"; + pinctrl-0 = <&pmx_spi>; + pinctrl-names = "default"; + + m25p128@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,m25p128"; + reg = <0>; + spi-max-frequency = <20000000>; + mode = <0>; + }; + }; + + sata@80000 { + status = "okay"; + nr-ports = <2>; + }; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_usb_power>; + pinctrl-names = "default"; + + usb_power: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "USB VBUS"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 10 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@8 { + reg = <8>; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; \ No newline at end of file From e2eaa339af441b3d51cdaa16870065c4154ce13c Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Sat, 15 Feb 2014 13:59:53 +0100 Subject: [PATCH 6/9] ARM: Kirkwood: convert rd88f6281-setup.c to DT. Perform a mechanical translation of rd88f6281-setup.c into DT. Since the hardware differs between the A0 and A1 stepping, two dts files are used, and a .dtsi file for the common parts. The A0 part does not have a "wan" port on the switch and uses PHY address 10 to address the switch. The A1 part does have the "wan" port and uses address 0. Signed-off-by: Andrew Lunn Signed-off-by: Jason Cooper --- arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/kirkwood-rd88f6281-a0.dts | 26 ++++ arch/arm/boot/dts/kirkwood-rd88f6281-a1.dts | 31 ++++ arch/arm/boot/dts/kirkwood-rd88f6281.dtsi | 152 ++++++++++++++++++++ 4 files changed, 211 insertions(+) create mode 100644 arch/arm/boot/dts/kirkwood-rd88f6281-a0.dts create mode 100644 arch/arm/boot/dts/kirkwood-rd88f6281-a1.dts create mode 100644 arch/arm/boot/dts/kirkwood-rd88f6281.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 40132ea1ac0e6d..0eda36cbf7e047 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -113,6 +113,8 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-b3.dtb \ kirkwood-openblocks_a6.dtb \ kirkwood-openblocks_a7.dtb \ kirkwood-rd88f6192.dtb \ + kirkwood-rd88f6281-a0.dtb \ + kirkwood-rd88f6281-a1.dtb \ kirkwood-sheevaplug.dtb \ kirkwood-sheevaplug-esata.dtb \ kirkwood-topkick.dtb \ diff --git a/arch/arm/boot/dts/kirkwood-rd88f6281-a0.dts b/arch/arm/boot/dts/kirkwood-rd88f6281-a0.dts new file mode 100644 index 00000000000000..a803bbb70bc859 --- /dev/null +++ b/arch/arm/boot/dts/kirkwood-rd88f6281-a0.dts @@ -0,0 +1,26 @@ +/* + * Marvell RD88F6181 A0 Board descrition + * + * Andrew Lunn + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + * + * This file contains the definitions for the board with the A0 variant of + * the SoC. The ethernet switch does not have a "wan" port. + */ + +/dts-v1/; +#include "kirkwood-rd88f6281.dtsi" + +/ { + model = "Marvell RD88f6281 Reference design, with A0 SoC"; + compatible = "marvell,rd88f6281-a0", "marvell,rd88f6281","marvell,kirkwood-88f6281", "marvell,kirkwood"; + + dsa@0 { + switch@0 { + reg = <10 0>; /* MDIO address 10, switch 0 in tree */ + }; + }; +}; \ No newline at end of file diff --git a/arch/arm/boot/dts/kirkwood-rd88f6281-a1.dts b/arch/arm/boot/dts/kirkwood-rd88f6281-a1.dts new file mode 100644 index 00000000000000..baeebbf1d8c728 --- /dev/null +++ b/arch/arm/boot/dts/kirkwood-rd88f6281-a1.dts @@ -0,0 +1,31 @@ +/* + * Marvell RD88F6181 A1 Board descrition + * + * Andrew Lunn + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + * + * This file contains the definitions for the board with the A1 variant of + * the SoC. The ethernet switch has a "wan" port. + */ + +/dts-v1/; + +#include "kirkwood-rd88f6281.dtsi" + +/ { + model = "Marvell RD88f6281 Reference design, with A1 SoC"; + compatible = "marvell,rd88f6281-a1", "marvell,rd88f6281","marvell,kirkwood-88f6281", "marvell,kirkwood"; + + dsa@0 { + switch@0 { + reg = <0 0>; /* MDIO address 0, switch 0 in tree */ + port@4 { + reg = <4>; + label = "wan"; + }; + }; + }; +}; \ No newline at end of file diff --git a/arch/arm/boot/dts/kirkwood-rd88f6281.dtsi b/arch/arm/boot/dts/kirkwood-rd88f6281.dtsi new file mode 100644 index 00000000000000..d6368c39102e74 --- /dev/null +++ b/arch/arm/boot/dts/kirkwood-rd88f6281.dtsi @@ -0,0 +1,152 @@ +/* + * Marvell RD88F6181 Common Board descrition + * + * Andrew Lunn + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + * + * This file contains the definitions that are common between the two + * variants of the Marvell Kirkwood Development Board. + */ + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + memory { + device_type = "memory"; + reg = <0x00000000 0x20000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200n8"; + }; + + mbus { + pcie-controller { + status = "okay"; + + pcie@1,0 { + status = "okay"; + }; + }; + }; + + ocp@f1000000 { + pinctrl: pinctrl@10000 { + pinctrl-0 = <&pmx_sdio_cd>; + pinctrl-names = "default"; + + pmx_sdio_cd: pmx-sdio-cd { + marvell,pins = "mpp28"; + marvell,function = "gpio"; + }; + }; + + serial@12000 { + status = "okay"; + + }; + + sata@80000 { + status = "okay"; + nr-ports = <2>; + }; + mvsdio@90000 { + pinctrl-0 = <&pmx_sdio &pmx_sdio_cd>; + pinctrl-names = "default"; + status = "okay"; + cd-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; + /* No WP GPIO */ + }; + }; + + dsa@0 { + compatible = "marvell,dsa"; + #address-cells = <2>; + #size-cells = <0>; + + dsa,ethernet = <ð0>; + dsa,mii-bus = <ðphy1>; + + switch@0 { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan1"; + }; + + port@1 { + reg = <1>; + label = "lan2"; + }; + + port@2 { + reg = <2>; + label = "lan3"; + }; + + port@3 { + reg = <3>; + label = "lan4"; + }; + + port@5 { + reg = <5>; + label = "cpu"; + }; + }; + }; +}; + +&nand { + status = "okay"; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x100000>; + read-only; + }; + + partition@100000 { + label = "uImage"; + reg = <0x0100000 0x200000>; + }; + + partition@300000 { + label = "data"; + reg = <0x0300000 0x500000>; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; + + ethphy1: ethernet-phy@ff { + reg = <0xff>; /* No PHY attached */ + speed = <1000>; + duple = <1>; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; + +ð1 { + status = "okay"; + ethernet1-port@0 { + phy-handle = <ðphy1>; + }; +}; From 05afeeb9b1b4bdb1ae0013df0549b81a61c9ad42 Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Mon, 10 Feb 2014 20:00:32 -0300 Subject: [PATCH 7/9] ARM: mvebu: Enable Armada 370/XP watchdog in the devicetree Add the DT nodes to enable watchdog support available in Armada 370 and Armada XP SoCs. Tested-by: Willy Tarreau Signed-off-by: Ezequiel Garcia Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-370-xp.dtsi | 4 ++++ arch/arm/boot/dts/armada-370.dtsi | 5 +++++ arch/arm/boot/dts/armada-xp.dtsi | 6 ++++++ 3 files changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi index 74b5964430ac3a..7bbc4ac997fbc9 100644 --- a/arch/arm/boot/dts/armada-370-xp.dtsi +++ b/arch/arm/boot/dts/armada-370-xp.dtsi @@ -199,6 +199,10 @@ interrupts = <37>, <38>, <39>, <40>, <5>, <6>; }; + watchdog@20300 { + reg = <0x20300 0x34>, <0x20704 0x4>; + }; + usb@50000 { compatible = "marvell,orion-ehci"; reg = <0x50000 0x500>; diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi index 6f216f0a785660..af1f11e9e5a011 100644 --- a/arch/arm/boot/dts/armada-370.dtsi +++ b/arch/arm/boot/dts/armada-370.dtsi @@ -215,6 +215,11 @@ clocks = <&coreclk 2>; }; + watchdog@20300 { + compatible = "marvell,armada-370-wdt"; + clocks = <&coreclk 2>; + }; + audio_controller: audio-controller@30000 { compatible = "marvell,armada370-audio"; reg = <0x30000 0x4000>; diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index b8b84a22f0f397..abb9f9dcc525a6 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -111,6 +111,12 @@ clock-names = "nbclk", "fixed"; }; + watchdog@20300 { + compatible = "marvell,armada-xp-wdt"; + clocks = <&coreclk 2>, <&refclk>; + clock-names = "nbclk", "fixed"; + }; + armada-370-xp-pmsu@22000 { compatible = "marvell,armada-370-xp-pmsu"; reg = <0x22100 0x400>, <0x20800 0x20>; From 7224cbc18e322d546653ece81c849155006abfaf Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Mon, 10 Feb 2014 20:00:33 -0300 Subject: [PATCH 8/9] ARM: kirkwood: Add RSTOUT 'reg' entry to devicetree In order to support multiplatform builds the watchdog devicetree binding was modified and now the 'reg' property is specified to need two entries. This commit adds the second entry as-per the new specification. Tested-by: Andrew Lunn Signed-off-by: Ezequiel Garcia Signed-off-by: Jason Cooper --- arch/arm/boot/dts/kirkwood.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi index 6abf44d257dfa3..85542c2f34b145 100644 --- a/arch/arm/boot/dts/kirkwood.dtsi +++ b/arch/arm/boot/dts/kirkwood.dtsi @@ -178,7 +178,7 @@ wdt: watchdog-timer@20300 { compatible = "marvell,orion-wdt"; - reg = <0x20300 0x28>; + reg = <0x20300 0x28>, <0x20108 0x4>; interrupt-parent = <&bridge_intc>; interrupts = <3>; clocks = <&gate_clk 7>; From 7a5b293f2086cfc17519e586bd8f89be72a2fc4e Mon Sep 17 00:00:00 2001 From: Ezequiel Garcia Date: Mon, 10 Feb 2014 20:00:34 -0300 Subject: [PATCH 9/9] ARM: dove: Enable Dove watchdog in the devicetree Add the devicetree node to enable watchdog support available in Dove SoCs. Tested-by: Sebastian Hesselbarth Signed-off-by: Ezequiel Garcia Signed-off-by: Jason Cooper --- arch/arm/boot/dts/dove.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index 2b76524f4aa74e..a88ed73c1c86a5 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -210,6 +210,14 @@ clocks = <&core_clk 0>; }; + watchdog@20300 { + compatible = "marvell,orion-wdt"; + reg = <0x20300 0x28>, <0x20108 0x4>; + interrupt-parent = <&bridge_intc>; + interrupts = <3>; + clocks = <&core_clk 0>; + }; + crypto: crypto-engine@30000 { compatible = "marvell,orion-crypto"; reg = <0x30000 0x10000>,