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@tmc tmc commented Nov 3, 2025

Summary

This PR optimizes RegisterFunc performance and adds comprehensive benchmarking infrastructure, plus fixes a critical ARM64 bug:

  • Allocation optimization: Cache struct types and pool struct instances to reduce memory pressure
  • Benchmark infrastructure: Add comprehensive benchmark suite for measuring calling overhead
  • ARM64 bug fix: Fix argument corruption on alignment flush in stack packing

Benchmark Results

Sample results (RegisterFunc/CFunc):

1args:   158.4 ns/op,   40 B/op,   3 allocs/op
5args:   251.4 ns/op,  176 B/op,   7 allocs/op
10args:  458.7 ns/op,  328 B/op,  12 allocs/op
14args:  587.0 ns/op,  472 B/op,  16 allocs/op
15args:  615.2 ns/op,  512 B/op,  17 allocs/op

tmc added 4 commits October 31, 2025 09:44
Add benchmark tests comparing RegisterFunc, SyscallN, and callback performance
across different argument counts (1, 2, 3, 5, 10, 14, 15 args). The benchmarks
measure:

- RegisterFunc with Go callbacks vs C functions
- SyscallN with Go callbacks vs C functions
- Round-trip calls (Go → C → Go callback)

Includes corresponding C library with sum functions and callback wrappers
to enable realistic performance comparisons between different calling
approaches in purego.
Replace direct purego.Dlopen/Dlclose calls with load.OpenLibrary/CloseLibrary
from the internal load package for consistency with other test code. Includes
proper error handling in the defer cleanup function.
)

Fix a critical bug in ARM64 struct argument packing where the register
value (val) and class were not being reset after flushing due to
alignment requirements.

When packing struct fields into registers, if a field's alignment
causes shift >= 64, the current register is flushed. However, the
code was not resetting 'val' and 'class' after the flush, causing
subsequent fields to be ORed with stale data from previous fields.

Example bug with FourInt32s{1, 2, 3, 4}:
- Fields 0,1 packed: val = 0x0000000200000001
- Flush at field 2 due to shift >= 64
- BUG: val still contains 0x0000000200000001
- Field 2 packs: val |= 3 becomes 0x0000000200000003 (should be 0x03)
- Field 3 packs: val |= (4<<32) becomes 0x0000000400000003
- Result: field 3 = 6 instead of 4 (bit 1 from field 1 leaked)

This fix ensures val and class are properly reset after each flush,
preventing data corruption between register boundaries.

Closes ebitengine#359
Optimize RegisterFunc performance by eliminating repeated allocations when
handling stack arguments on darwin/arm64. Key improvements:

- Cache struct types using type hashing to avoid recreating identical types
- Pool struct instances for reuse across calls
- Pre-compute field names array to eliminate strconv.Itoa allocations
- Use sync.Map for concurrent-safe caching of types and pools

These optimizations significantly reduce memory pressure in RegisterFunc
when dealing with functions that have many arguments passed on the stack,
particularly benefiting high-frequency call scenarios.
@tmc tmc marked this pull request as draft November 3, 2025 01:27
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