From 8a4bb3a748ca84e1bf095170924b8ac1d6ab39f1 Mon Sep 17 00:00:00 2001 From: Dhruv Chopra Date: Tue, 19 Jan 2021 10:55:59 -0500 Subject: [PATCH] Eliminate vm.heapBaseAddress() This commit removes J9::VMEnv::heapBaseAddress() as this routine always returns 0. It was introduced in the codebase early on in the codebase and has since been superseded by a shift-based solution. Hence it no longer needed. Signed-off-by: Dhruv Chopra --- .../aarch64/codegen/J9TreeEvaluator.cpp | 38 +--- runtime/compiler/codegen/J9CodeGenerator.cpp | 47 +--- runtime/compiler/codegen/J9TreeEvaluator.cpp | 39 ++-- runtime/compiler/env/J9ObjectModel.cpp | 4 +- runtime/compiler/env/J9VMEnv.cpp | 10 +- runtime/compiler/env/J9VMEnv.hpp | 4 +- runtime/compiler/env/VMJ9.cpp | 4 +- .../compiler/p/codegen/J9TreeEvaluator.cpp | 213 +++--------------- .../compiler/x/codegen/J9TreeEvaluator.cpp | 115 +++------- .../compiler/z/codegen/J9TreeEvaluator.cpp | 49 ++-- 10 files changed, 114 insertions(+), 409 deletions(-) diff --git a/runtime/compiler/aarch64/codegen/J9TreeEvaluator.cpp b/runtime/compiler/aarch64/codegen/J9TreeEvaluator.cpp index 10170bdd7fb..c378e2bfe90 100644 --- a/runtime/compiler/aarch64/codegen/J9TreeEvaluator.cpp +++ b/runtime/compiler/aarch64/codegen/J9TreeEvaluator.cpp @@ -1,5 +1,5 @@ /******************************************************************************* - * Copyright (c) 2019, 2020 IBM Corp. and others + * Copyright (c) 2019, 2021 IBM Corp. and others * * This program and the accompanying materials are made available under * the terms of the Eclipse Public License 2.0 which accompanies this @@ -484,20 +484,12 @@ J9::ARM64::TreeEvaluator::awrtbariEvaluator(TR::Node *node, TR::CodeGenerator *c if (translatedNode->getOpCode().isRightShift()) // optional translatedNode = translatedNode->getFirstChild(); - bool usingLowMemHeap = false; - if (TR::Compiler->vm.heapBaseAddress() == 0 || secondChild->isNull()) - usingLowMemHeap = true; + usingCompressedPointers = true; - if (translatedNode->getOpCode().isSub() || usingLowMemHeap) - usingCompressedPointers = true; - - if (usingCompressedPointers) - { - while (secondChild->getNumChildren() && secondChild->getOpCodeValue() != TR::a2l) - secondChild = secondChild->getFirstChild(); - if (secondChild->getNumChildren()) - secondChild = secondChild->getFirstChild(); - } + while (secondChild->getNumChildren() && secondChild->getOpCodeValue() != TR::a2l) + secondChild = secondChild->getFirstChild(); + if (secondChild->getNumChildren()) + secondChild = secondChild->getFirstChild(); } if (secondChild->getReferenceCount() > 1 && secondChild->getRegister() != NULL) @@ -2645,20 +2637,12 @@ J9::ARM64::TreeEvaluator::ArrayStoreCHKEvaluator(TR::Node *node, TR::CodeGenerat if (translatedNode->getOpCode().isRightShift()) // optional translatedNode = translatedNode->getFirstChild(); - bool usingLowMemHeap = false; - if (TR::Compiler->vm.heapBaseAddress() == 0 || sourceChild->isNull()) - usingLowMemHeap = true; + usingCompressedPointers = true; - if ((translatedNode->getOpCode().isSub()) || usingLowMemHeap) - usingCompressedPointers = true; - - if (usingCompressedPointers) - { - while ((sourceChild->getNumChildren() > 0) && (sourceChild->getOpCodeValue() != TR::a2l)) - sourceChild = sourceChild->getFirstChild(); - if (sourceChild->getOpCodeValue() == TR::a2l) - sourceChild = sourceChild->getFirstChild(); - } + while ((sourceChild->getNumChildren() > 0) && (sourceChild->getOpCodeValue() != TR::a2l)) + sourceChild = sourceChild->getFirstChild(); + if (sourceChild->getOpCodeValue() == TR::a2l) + sourceChild = sourceChild->getFirstChild(); } TR::Register *srcReg; diff --git a/runtime/compiler/codegen/J9CodeGenerator.cpp b/runtime/compiler/codegen/J9CodeGenerator.cpp index 3f3f3c24ad6..0031cf5b59c 100644 --- a/runtime/compiler/codegen/J9CodeGenerator.cpp +++ b/runtime/compiler/codegen/J9CodeGenerator.cpp @@ -1,5 +1,5 @@ /******************************************************************************* - * Copyright (c) 2000, 2020 IBM Corp. and others + * Copyright (c) 2000, 2021 IBM Corp. and others * * This program and the accompanying materials are made available under * the terms of the Eclipse Public License 2.0 which accompanies this @@ -462,12 +462,7 @@ J9::CodeGenerator::lowerCompressedRefs( vcount_t visitCount, TR_BitVector *childrenToBeLowered) { - bool isLowMem = false; - if (TR::Compiler->vm.heapBaseAddress() == 0) - { - isLowMem = true; - } - + bool isLowMem = true; if (node->getOpCode().isCall() && childrenToBeLowered) { TR_BitVectorIterator bvi(*childrenToBeLowered); @@ -484,8 +479,7 @@ J9::CodeGenerator::lowerCompressedRefs( } TR::Node *heapBase = TR::Node::create(node, TR::lconst, 0, 0); - heapBase->setLongInt(TR::Compiler->vm.heapBaseAddress()); - lowerCASValues(node, nextChild, valueChild, self()->comp(), shftOffset, isLowMem, heapBase); + lowerCASValues(node, nextChild, valueChild, self()->comp(), shftOffset, true, heapBase); } } @@ -3322,8 +3316,7 @@ J9::CodeGenerator::compressedReferenceRematerialization() // no need to rematerialize for lowMemHeap if (self()->comp()->useCompressedPointers() && - ((TR::Compiler->vm.heapBaseAddress() != 0) || - (TR::Compiler->om.compressedReferenceShift() != 0)) && + (TR::Compiler->om.compressedReferenceShift() != 0) && !disableRematforCP) { if (self()->comp()->getOption(TR_TraceCG)) @@ -3440,7 +3433,6 @@ J9::CodeGenerator::compressedReferenceRematerialization() } if (self()->comp()->useCompressedPointers() && - (TR::Compiler->vm.heapBaseAddress() == 0) && !disableRematforCP) { for (tt = self()->comp()->getStartTree(); tt; tt = tt->getNextTreeTop()) @@ -3501,8 +3493,6 @@ J9::CodeGenerator::rematerializeCompressedRefs( bool alreadyVisitedReferenceInNullTest = false; bool alreadyVisitedReferenceInStore = false; - bool isLowMemHeap = (TR::Compiler->vm.heapBaseAddress() == 0); - TR::Node *reference = NULL; TR::Node *address = NULL; @@ -3589,7 +3579,6 @@ J9::CodeGenerator::rematerializeCompressedRefs( ((node->getFirstChild()->getOpCodeValue() == TR::ladd && node->getFirstChild()->containsCompressionSequence()) || ((node->getFirstChild()->getOpCodeValue() == TR::lshl) && - (self()->canFoldLargeOffsetInAddressing() || (TR::Compiler->vm.heapBaseAddress() == 0)) && self()->isAddressScaleIndexSupported((1 << TR::Compiler->om.compressedReferenceShiftOffset()))))) { if (parent && @@ -3720,7 +3709,7 @@ J9::CodeGenerator::rematerializeCompressedRefs( static bool disableBranchlessPassThroughNULLCHK = feGetEnv("TR_disableBranchlessPassThroughNULLCHK") != NULL; if (node->getOpCode().isNullCheck() && reference && - (!isLowMemHeap || self()->performsChecksExplicitly() || (disableBranchlessPassThroughNULLCHK && node->getFirstChild()->getOpCodeValue() == TR::PassThrough)) && + (self()->performsChecksExplicitly() || (disableBranchlessPassThroughNULLCHK && node->getFirstChild()->getOpCodeValue() == TR::PassThrough)) && ((node->getFirstChild()->getOpCodeValue() == TR::l2a) || (reference->getOpCodeValue() == TR::l2a)) && performTransformation(self()->comp(), "%sTransforming null check reference %p in null check node %p to be checked explicitly\n", OPT_DETAILS, reference, node)) @@ -3861,32 +3850,6 @@ J9::CodeGenerator::rematerializeCompressedRefs( } } - if (self()->materializesHeapBase() && - !isLowMemHeap && - parent && (!parent->getOpCode().isStore()) && - (node->getOpCodeValue() == TR::lconst) && - (node->getLongInt() == TR::Compiler->vm.heapBaseAddress()) && - performTransformation(self()->comp(), "%sTransforming heap base constant node %p to auto load \n", OPT_DETAILS, node)) - { - if (!autoSymRef) - { - autoSymRef = self()->comp()->getSymRefTab()->createTemporary(self()->comp()->getMethodSymbol(), node->getDataType()); - TR::TreeTop *startTree = self()->comp()->getStartTree(); - TR::TreeTop *nextTree = startTree->getNextTreeTop(); - - TR::Node *lconstNode = TR::Node::create(node, TR::lconst, 0, 0); - lconstNode->setLongInt(node->getLongInt()); - TR::Node *storeNode = TR::Node::createWithSymRef(TR::lstore, 1, 1, lconstNode, autoSymRef); - TR::TreeTop *tt = TR::TreeTop::create(self()->comp(), storeNode); - startTree->join(tt); - tt->join(nextTree); - } - - TR::Node::recreate(node, TR::lload); - node->setSymbolReference(autoSymRef); - } - - if (address && node->getOpCode().isStoreIndirect()) { if (address->getOpCodeValue() == TR::l2a && (address->getReferenceCount() == 1 || !alreadyVisitedReferenceInStore) && diff --git a/runtime/compiler/codegen/J9TreeEvaluator.cpp b/runtime/compiler/codegen/J9TreeEvaluator.cpp index 08c3162249e..d11abd1abe5 100644 --- a/runtime/compiler/codegen/J9TreeEvaluator.cpp +++ b/runtime/compiler/codegen/J9TreeEvaluator.cpp @@ -1,5 +1,5 @@ /******************************************************************************* - * Copyright (c) 2000, 2020 IBM Corp. and others + * Copyright (c) 2000, 2021 IBM Corp. and others * * This program and the accompanying materials are made available under * the terms of the Eclipse Public License 2.0 which accompanies this @@ -499,32 +499,25 @@ bool J9::TreeEvaluator::getIndirectWrtbarValueNode(TR::CodeGenerator *cg, TR::No translatedNode = translatedNode->getFirstChild(); } - if (translatedNode->getOpCode().isSub() || - TR::Compiler->vm.heapBaseAddress() == 0 || sourceChild->isNull()) /* i.e. usingLowMemHeap */ + usingCompressedPointers = true; + + while ((sourceChild->getNumChildren() > 0) && (sourceChild->getOpCodeValue() != TR::a2l)) { - usingCompressedPointers = true; + sourceChild = sourceChild->getFirstChild(); } - - if (usingCompressedPointers) + if (sourceChild->getOpCodeValue() == TR::a2l) { - while ((sourceChild->getNumChildren() > 0) && (sourceChild->getOpCodeValue() != TR::a2l)) - { - sourceChild = sourceChild->getFirstChild(); - } - if (sourceChild->getOpCodeValue() == TR::a2l) - { - sourceChild = sourceChild->getFirstChild(); - } + sourceChild = sourceChild->getFirstChild(); + } - // Artificially bump up the refCount on the value so - // that different registers are allocated for the actual - // and compressed values. This is done so that the VMwrtbarEvaluator - // uses the uncompressed value. We only need to do this when the caller - // is evaluating the actual write barrier. - if (incSrcRefCount) - { - sourceChild->incReferenceCount(); - } + // Artificially bump up the refCount on the value so + // that different registers are allocated for the actual + // and compressed values. This is done so that the VMwrtbarEvaluator + // uses the uncompressed value. We only need to do this when the caller + // is evaluating the actual write barrier. + if (incSrcRefCount) + { + sourceChild->incReferenceCount(); } } return usingCompressedPointers; diff --git a/runtime/compiler/env/J9ObjectModel.cpp b/runtime/compiler/env/J9ObjectModel.cpp index 730343c3945..d523c9c849a 100644 --- a/runtime/compiler/env/J9ObjectModel.cpp +++ b/runtime/compiler/env/J9ObjectModel.cpp @@ -1,5 +1,5 @@ /******************************************************************************* - * Copyright (c) 2000, 2020 IBM Corp. and others + * Copyright (c) 2000, 2021 IBM Corp. and others * * This program and the accompanying materials are made available under * the terms of the Eclipse Public License 2.0 which accompanies this @@ -618,7 +618,7 @@ J9::ObjectModel::getArrayLengthInElements(TR::Compilation* comp, uintptr_t objec uintptr_t J9::ObjectModel::decompressReference(TR::Compilation* comp, uintptr_t compressedReference) { - return (compressedReference << TR::Compiler->om.compressedReferenceShift()) + TR::Compiler->vm.heapBaseAddress(); + return (compressedReference << TR::Compiler->om.compressedReferenceShift()); } bool diff --git a/runtime/compiler/env/J9VMEnv.cpp b/runtime/compiler/env/J9VMEnv.cpp index ae362654e94..a7ec1b33eb5 100644 --- a/runtime/compiler/env/J9VMEnv.cpp +++ b/runtime/compiler/env/J9VMEnv.cpp @@ -1,5 +1,5 @@ /******************************************************************************* - * Copyright (c) 2000, 2020 IBM Corp. and others + * Copyright (c) 2000, 2021 IBM Corp. and others * * This program and the accompanying materials are made available under * the terms of the Eclipse Public License 2.0 which accompanies this @@ -61,14 +61,6 @@ J9::VMEnv::maxHeapSizeInBytes() return (int64_t) mmf->j9gc_get_maximum_heap_size(jvm); } - -UDATA -J9::VMEnv::heapBaseAddress() - { - return 0; - } - - bool J9::VMEnv::hasAccess(OMR_VMThread *omrVMThread) { diff --git a/runtime/compiler/env/J9VMEnv.hpp b/runtime/compiler/env/J9VMEnv.hpp index e9c2a56091e..388a4e79b54 100644 --- a/runtime/compiler/env/J9VMEnv.hpp +++ b/runtime/compiler/env/J9VMEnv.hpp @@ -1,5 +1,5 @@ /******************************************************************************* - * Copyright (c) 2000, 2020 IBM Corp. and others + * Copyright (c) 2000, 2021 IBM Corp. and others * * This program and the accompanying materials are made available under * the terms of the Eclipse Public License 2.0 which accompanies this @@ -51,8 +51,6 @@ class OMR_EXTENSIBLE VMEnv : public OMR::VMEnvConnector int64_t maxHeapSizeInBytes(); - uintptr_t heapBaseAddress(); - uintptr_t thisThreadGetPendingExceptionOffset(); bool hasResumableTrapHandler(TR::Compilation *comp); diff --git a/runtime/compiler/env/VMJ9.cpp b/runtime/compiler/env/VMJ9.cpp index 30ab17f4cca..e9033e64850 100644 --- a/runtime/compiler/env/VMJ9.cpp +++ b/runtime/compiler/env/VMJ9.cpp @@ -1,5 +1,5 @@ /******************************************************************************* - * Copyright (c) 2000, 2020 IBM Corp. and others + * Copyright (c) 2000, 2021 IBM Corp. and others * * This program and the accompanying materials are made available under * the terms of the Eclipse Public License 2.0 which accompanies this @@ -1141,7 +1141,7 @@ TR_J9VMBase::getReferenceFieldAtAddress(uintptr_t fieldAddress) if (TR::Compiler->om.compressObjectReferences()) { uintptr_t compressedResult = *(uint32_t*)fieldAddress; - return (compressedResult << TR::Compiler->om.compressedReferenceShift()) + TR::Compiler->vm.heapBaseAddress(); + return (compressedResult << TR::Compiler->om.compressedReferenceShift()); } return *(uintptr_t*)fieldAddress; } diff --git a/runtime/compiler/p/codegen/J9TreeEvaluator.cpp b/runtime/compiler/p/codegen/J9TreeEvaluator.cpp index 66f37dc7fc5..15ece0145ed 100644 --- a/runtime/compiler/p/codegen/J9TreeEvaluator.cpp +++ b/runtime/compiler/p/codegen/J9TreeEvaluator.cpp @@ -1498,20 +1498,11 @@ TR::Register *J9::Power::TreeEvaluator::awrtbariEvaluator(TR::Node *node, TR::Co if (translatedNode->getOpCode().isRightShift()) // optional translatedNode = translatedNode->getFirstChild(); - bool usingLowMemHeap = false; - if (TR::Compiler->vm.heapBaseAddress() == 0 || secondChild->isNull()) - usingLowMemHeap = true; - - if (translatedNode->getOpCode().isSub() || usingLowMemHeap) - usingCompressedPointers = true; - - if (usingCompressedPointers) - { - while (secondChild->getNumChildren() && secondChild->getOpCodeValue() != TR::a2l) - secondChild = secondChild->getFirstChild(); - if (secondChild->getNumChildren()) - secondChild = secondChild->getFirstChild(); - } + usingCompressedPointers = true; + while (secondChild->getNumChildren() && secondChild->getOpCodeValue() != TR::a2l) + secondChild = secondChild->getFirstChild(); + if (secondChild->getNumChildren()) + secondChild = secondChild->getFirstChild(); } int32_t sizeofMR = TR::Compiler->om.sizeofReferenceAddress(); @@ -2613,26 +2604,9 @@ static TR::InstOpCode::Mnemonic getLoadOrStoreFromDataType(TR::CodeGenerator *cg static void genDecompressPointer(TR::CodeGenerator *cg, TR::Node *node, TR::Register *ptrReg, TR::Register *condReg = NULL, bool nullCheck = true) { TR_J9VMBase *fej9 = (TR_J9VMBase *) (cg->comp()->fe()); - uintptr_t heapBase = TR::Compiler->vm.heapBaseAddress(); int32_t shiftAmount = TR::Compiler->om.compressedReferenceShift(); - if (heapBase != 0) - { - TR::LabelSymbol *skipLabel = NULL; - if (nullCheck) - { - TR_ASSERT(condReg, "Need a condition reg for non-zero heap base decompression"); - skipLabel = TR::LabelSymbol::create(cg->trHeapMemory(),cg); - generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::cmpli8, node, condReg, ptrReg, NULLVALUE); - generateConditionalBranchInstruction(cg, TR::InstOpCode::beq, node, skipLabel, condReg); - } - if (shiftAmount != 0) - generateShiftLeftImmediateLong(cg, node, ptrReg, ptrReg, shiftAmount); - addConstantToLong(node, ptrReg, heapBase, ptrReg, cg); - if (nullCheck) - generateLabelInstruction(cg, TR::InstOpCode::label, node, skipLabel); - } - else if (shiftAmount != 0) + if (shiftAmount != 0) generateShiftLeftImmediateLong(cg, node, ptrReg, ptrReg, shiftAmount); } @@ -2664,47 +2638,18 @@ static TR::Register *addConstantToLongWithTempReg(TR::Node * node, TR::Register static void genDecompressPointerWithTempReg(TR::CodeGenerator *cg, TR::Node *node, TR::Register *ptrReg, TR::Register *tempReg, TR::Register *condReg = NULL, bool nullCheck = true) { TR_J9VMBase *fej9 = (TR_J9VMBase *) (cg->comp()->fe()); - uintptr_t heapBase = TR::Compiler->vm.heapBaseAddress(); int32_t shiftAmount = TR::Compiler->om.compressedReferenceShift(); - if (heapBase != 0) - { - TR::LabelSymbol *skipLabel = NULL; - if (nullCheck) - { - TR_ASSERT(condReg, "Need a condition reg for non-zero heap base decompression"); - skipLabel = TR::LabelSymbol::create(cg->trHeapMemory(),cg); - generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::cmpli8, node, condReg, ptrReg, NULLVALUE); - generateConditionalBranchInstruction(cg, TR::InstOpCode::beq, node, skipLabel, condReg); - } - if (shiftAmount != 0) - generateShiftLeftImmediateLong(cg, node, ptrReg, ptrReg, shiftAmount); - addConstantToLongWithTempReg(node, ptrReg, heapBase, ptrReg, tempReg, cg); - if (nullCheck) - generateLabelInstruction(cg, TR::InstOpCode::label, node, skipLabel); - } - else if (shiftAmount != 0) + if (shiftAmount != 0) generateShiftLeftImmediateLong(cg, node, ptrReg, ptrReg, shiftAmount); } static TR::Register *genDecompressPointerNonNull2Regs(TR::CodeGenerator *cg, TR::Node *node, TR::Register *ptrReg, TR::Register *targetReg) { TR_J9VMBase *fej9 = (TR_J9VMBase *) (cg->comp()->fe()); - uintptr_t heapBase = TR::Compiler->vm.heapBaseAddress(); int32_t shiftAmount = TR::Compiler->om.compressedReferenceShift(); - if (heapBase != 0) - { - TR::Register *temp = ptrReg; - if (shiftAmount != 0) - { - generateShiftLeftImmediateLong(cg, node, targetReg, ptrReg, shiftAmount); - temp = targetReg; - } - addConstantToLong(node, temp, heapBase, targetReg, cg); - return targetReg; - } - else if (shiftAmount != 0) + if (shiftAmount != 0) { generateShiftLeftImmediateLong(cg, node, targetReg, ptrReg, shiftAmount); return targetReg; @@ -2718,21 +2663,9 @@ static TR::Register *genDecompressPointerNonNull2Regs(TR::CodeGenerator *cg, TR: static TR::Register *genDecompressPointerNonNull2RegsWithTempReg(TR::CodeGenerator *cg, TR::Node *node, TR::Register *ptrReg, TR::Register *targetReg, TR::Register *tempReg) { TR_J9VMBase *fej9 = (TR_J9VMBase *) (cg->comp()->fe()); - uintptr_t heapBase = TR::Compiler->vm.heapBaseAddress(); int32_t shiftAmount = TR::Compiler->om.compressedReferenceShift(); - if (heapBase != 0) - { - TR::Register *temp = ptrReg; - if (shiftAmount != 0) - { - generateShiftLeftImmediateLong(cg, node, targetReg, ptrReg, shiftAmount); - temp = targetReg; - } - addConstantToLongWithTempReg(node, temp, heapBase, targetReg, tempReg, cg); - return targetReg; - } - else if (shiftAmount != 0) + if (shiftAmount != 0) { generateShiftLeftImmediateLong(cg, node, targetReg, ptrReg, shiftAmount); return targetReg; @@ -2746,26 +2679,9 @@ static TR::Register *genDecompressPointerNonNull2RegsWithTempReg(TR::CodeGenerat static void genCompressPointerWithTempReg(TR::CodeGenerator *cg, TR::Node *node, TR::Register *ptrReg, TR::Register *tempReg, TR::Register *condReg = NULL, bool nullCheck = true) { TR_J9VMBase *fej9 = (TR_J9VMBase *) (cg->comp()->fe()); - uintptr_t heapBase = TR::Compiler->vm.heapBaseAddress(); int32_t shiftAmount = TR::Compiler->om.compressedReferenceShift(); - if (heapBase != 0) - { - TR::LabelSymbol *skipLabel = NULL; - if (nullCheck) - { - TR_ASSERT(condReg, "Need a condition reg for non-zero heap base compression"); - skipLabel = TR::LabelSymbol::create(cg->trHeapMemory(),cg); - generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::cmpli8, node, condReg, ptrReg, NULLVALUE); - generateConditionalBranchInstruction(cg, TR::InstOpCode::beq, node, skipLabel, condReg); - } - addConstantToLongWithTempReg(node, ptrReg, (int64_t)(-heapBase), ptrReg, tempReg, cg); - if (shiftAmount != 0) - generateShiftRightLogicalImmediateLong(cg, node, ptrReg, ptrReg, shiftAmount); - if (nullCheck) - generateLabelInstruction(cg, TR::InstOpCode::label, node, skipLabel); - } - else if (shiftAmount != 0) + if (shiftAmount != 0) { generateShiftRightLogicalImmediateLong(cg, node, ptrReg, ptrReg, shiftAmount); } @@ -2774,26 +2690,9 @@ static void genCompressPointerWithTempReg(TR::CodeGenerator *cg, TR::Node *node, static void genCompressPointer(TR::CodeGenerator *cg, TR::Node *node, TR::Register *ptrReg, TR::Register *condReg = NULL, bool nullCheck = true) { TR_J9VMBase *fej9 = (TR_J9VMBase *) (cg->comp()->fe()); - uintptr_t heapBase = TR::Compiler->vm.heapBaseAddress(); int32_t shiftAmount = TR::Compiler->om.compressedReferenceShift(); - if (heapBase != 0) - { - TR::LabelSymbol *skipLabel = NULL; - if (nullCheck) - { - TR_ASSERT(condReg, "Need a condition reg for non-zero heap base compression"); - skipLabel = TR::LabelSymbol::create(cg->trHeapMemory(),cg); - generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::cmpli8, node, condReg, ptrReg, NULLVALUE); - generateConditionalBranchInstruction(cg, TR::InstOpCode::beq, node, skipLabel, condReg); - } - addConstantToLong(node, ptrReg, -heapBase, ptrReg, cg); - if (shiftAmount != 0) - generateShiftRightLogicalImmediateLong(cg, node, ptrReg, ptrReg, shiftAmount); - if (nullCheck) - generateLabelInstruction(cg, TR::InstOpCode::label, node, skipLabel); - } - else if (shiftAmount != 0) + if (shiftAmount != 0) { generateShiftRightLogicalImmediateLong(cg, node, ptrReg, ptrReg, shiftAmount); } @@ -2802,17 +2701,9 @@ static void genCompressPointer(TR::CodeGenerator *cg, TR::Node *node, TR::Regist static TR::Register *genCompressPointerNonNull2RegsWithTempReg(TR::CodeGenerator *cg, TR::Node *node, TR::Register *ptrReg, TR::Register *targetReg, TR::Register *tempReg) { TR_J9VMBase *fej9 = (TR_J9VMBase *) (cg->comp()->fe()); - uintptr_t heapBase = TR::Compiler->vm.heapBaseAddress(); int32_t shiftAmount = TR::Compiler->om.compressedReferenceShift(); - if (heapBase != 0) - { - addConstantToLongWithTempReg(node, targetReg, (int64_t)(-heapBase), ptrReg, tempReg, cg); - if (shiftAmount != 0) - generateShiftRightLogicalImmediateLong(cg, node, targetReg, targetReg, shiftAmount); - return targetReg; - } - else if (shiftAmount != 0) + if (shiftAmount != 0) { generateShiftRightLogicalImmediateLong(cg, node, targetReg, ptrReg, shiftAmount); return targetReg; @@ -2824,17 +2715,9 @@ static TR::Register *genCompressPointerNonNull2RegsWithTempReg(TR::CodeGenerator static TR::Register *genCompressPointerNonNull2Regs(TR::CodeGenerator *cg, TR::Node *node, TR::Register *ptrReg, TR::Register *targetReg) { TR_J9VMBase *fej9 = (TR_J9VMBase *) (cg->comp()->fe()); - uintptr_t heapBase = TR::Compiler->vm.heapBaseAddress(); int32_t shiftAmount = TR::Compiler->om.compressedReferenceShift(); - if (heapBase != 0) - { - addConstantToLong(node, targetReg, (int64_t)(-heapBase), ptrReg, cg); - if (shiftAmount != 0) - generateShiftRightLogicalImmediateLong(cg, node, targetReg, targetReg, shiftAmount); - return targetReg; - } - else if (shiftAmount != 0) + if (shiftAmount != 0) { generateShiftRightLogicalImmediateLong(cg, node, targetReg, ptrReg, shiftAmount); return targetReg; @@ -3105,15 +2988,7 @@ TR::Register *J9::Power::TreeEvaluator::BNDCHKwithSpineCHKEvaluator(TR::Node *no genArrayletAccessAddr(cg, node, elementSize, baseArrayReg, indexReg, indexChild->getInt(), arrayletReg, arrayletOffsetReg, arrayletOffsetVal); // Decompress the arraylet pointer if necessary. - // - if (TR::Compiler->vm.heapBaseAddress()) - { - TR::Register *condReg = srm->findOrCreateScratchRegister(TR_CCR); - genDecompressPointer(cg, node, arrayletReg, condReg); - srm->reclaimScratchRegister(condReg); - } - else - genDecompressPointer(cg, node, arrayletReg); + genDecompressPointer(cg, node, arrayletReg); if (doLoadOrStore) { @@ -3194,15 +3069,7 @@ TR::Register *J9::Power::TreeEvaluator::BNDCHKwithSpineCHKEvaluator(TR::Node *no if (doLoadDecompress) { TR_ASSERT(dt == TR::Address, "Expecting loads with decompression trees to have data type TR::Address"); - - if (TR::Compiler->vm.heapBaseAddress()) - { - TR::Register *condReg = srm->findOrCreateScratchRegister(TR_CCR); - genDecompressPointer(cg, node, loadOrStoreReg, condReg); - srm->reclaimScratchRegister(condReg); - } - else - genDecompressPointer(cg, node, loadOrStoreReg); + genDecompressPointer(cg, node, loadOrStoreReg); } } @@ -3513,7 +3380,6 @@ TR::Register *J9::Power::TreeEvaluator::ArrayStoreCHKEvaluator(TR::Node *node, T TR::Node *sourceChild = firstChild->getSecondChild(); TR::Node *destinationChild = firstChild->getChild(2); - bool usingCompressedPointers = false; if (comp->useCompressedPointers() && firstChild->getOpCode().isIndirect()) { // pattern match the sequence @@ -3540,20 +3406,10 @@ TR::Register *J9::Power::TreeEvaluator::ArrayStoreCHKEvaluator(TR::Node *node, T if (translatedNode->getOpCode().isRightShift()) // optional translatedNode = translatedNode->getFirstChild(); - bool usingLowMemHeap = false; - if (TR::Compiler->vm.heapBaseAddress() == 0 || sourceChild->isNull()) - usingLowMemHeap = true; - - if ((translatedNode->getOpCode().isSub()) || usingLowMemHeap) - usingCompressedPointers = true; - - if (usingCompressedPointers) - { - while ((sourceChild->getNumChildren() > 0) && (sourceChild->getOpCodeValue() != TR::a2l)) - sourceChild = sourceChild->getFirstChild(); - if (sourceChild->getOpCodeValue() == TR::a2l) - sourceChild = sourceChild->getFirstChild(); - } + while ((sourceChild->getNumChildren() > 0) && (sourceChild->getOpCodeValue() != TR::a2l)) + sourceChild = sourceChild->getFirstChild(); + if (sourceChild->getOpCodeValue() == TR::a2l) + sourceChild = sourceChild->getFirstChild(); } // Since ArrayStoreCHK doesn't have the shape of the corresponding helper call we have to create this tree @@ -6828,8 +6684,6 @@ TR::Register *J9::Power::TreeEvaluator::VMnewEvaluator(TR::Node *node, TR::CodeG generateInstruction(cg, TR::InstOpCode::bad, node); iCursor = generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::addi, node, tmp4Reg, resReg, dataBegin, iCursor); - if (TR::Compiler->vm.heapBaseAddress() != 0) - iCursor = generateTrg1Src1ImmInstruction(cg, TR::InstOpCode::addi, node, tmp4Reg, tmp4Reg, -TR::Compiler->vm.heapBaseAddress(), iCursor); if (TR::Compiler->om.compressedReferenceShiftOffset() > 0) iCursor = generateShiftRightLogicalImmediateLong(cg, node, tmp4Reg, tmp4Reg, TR::Compiler->om.compressedReferenceShiftOffset(), iCursor); iCursor = generateMemSrc1Instruction(cg, (comp->target().is64Bit() && !comp->useCompressedPointers()) ? TR::InstOpCode::std : TR::InstOpCode::stw, node, @@ -8505,12 +8359,7 @@ static TR::Register *VMinlineCompareAndSwapObject(TR::Node *node, TR::CodeGenera bool bumpedRefCount = false; if (comp->useCompressedPointers() && (fifthChild->getDataType() != TR::Address)) { - bool usingLowMemHeap = false; bool useShiftedOffsets = (TR::Compiler->om.compressedReferenceShiftOffset() != 0); - bool usingCompressedPointers = false; - - if (TR::Compiler->vm.heapBaseAddress() == 0 || fifthChild->isNull()) - usingLowMemHeap = true; translatedNode = fifthChild; if (translatedNode->getOpCode().isConversion()) @@ -8518,25 +8367,19 @@ static TR::Register *VMinlineCompareAndSwapObject(TR::Node *node, TR::CodeGenera if (translatedNode->getOpCode().isRightShift()) // optional translatedNode = translatedNode->getFirstChild(); - if (translatedNode->getOpCode().isSub() || usingLowMemHeap) - usingCompressedPointers = true; - translatedNode = fifthChild; - if (usingCompressedPointers) + if (useShiftedOffsets) { - if (!usingLowMemHeap || useShiftedOffsets) - { - while ((translatedNode->getNumChildren() > 0) && (translatedNode->getOpCodeValue() != TR::a2l)) - translatedNode = translatedNode->getFirstChild(); + while ((translatedNode->getNumChildren() > 0) && (translatedNode->getOpCodeValue() != TR::a2l)) + translatedNode = translatedNode->getFirstChild(); - if (translatedNode->getOpCodeValue() == TR::a2l) - translatedNode = translatedNode->getFirstChild(); + if (translatedNode->getOpCodeValue() == TR::a2l) + translatedNode = translatedNode->getFirstChild(); - // this is required so that different registers are - // allocated for the actual store and translated values - translatedNode->incReferenceCount(); - bumpedRefCount = true; - } + // this is required so that different registers are + // allocated for the actual store and translated values + translatedNode->incReferenceCount(); + bumpedRefCount = true; } } diff --git a/runtime/compiler/x/codegen/J9TreeEvaluator.cpp b/runtime/compiler/x/codegen/J9TreeEvaluator.cpp index f542dc07f1a..8e62d085bb2 100644 --- a/runtime/compiler/x/codegen/J9TreeEvaluator.cpp +++ b/runtime/compiler/x/codegen/J9TreeEvaluator.cpp @@ -1,5 +1,5 @@ /******************************************************************************* - * Copyright (c) 2000, 2020 IBM Corp. and others + * Copyright (c) 2000, 2021 IBM Corp. and others * * This program and the accompanying materials are made available under * the terms of the Eclipse Public License 2.0 which accompanies this @@ -359,21 +359,12 @@ static TR_OutlinedInstructions *generateArrayletReference( if (comp->target().is64Bit() && comp->useCompressedPointers()) { - if (TR::Compiler->vm.heapBaseAddress() == 0) - isHB0 = true; + isHB0 = true; shiftOffset = TR::Compiler->om.compressedReferenceShiftOffset(); - - if (isHB0) - { - if (shiftOffset > 0) - { - generateRegImmInstruction(SHL8RegImm1, node, scratchReg, shiftOffset, cg); - } - } - else + if (shiftOffset > 0) { - TR_ASSERT(0, "!HB0 not supported yet"); + generateRegImmInstruction(SHL8RegImm1, node, scratchReg, shiftOffset, cg); } } @@ -1037,7 +1028,6 @@ TR::Register *J9::X86::TreeEvaluator::writeBarrierEvaluator(TR::Node *node, TR:: TR::Node *sourceObject; TR::Compilation *comp = cg->comp(); bool usingCompressedPointers = false; - bool usingLowMemHeap = false; bool useShiftedOffsets = (TR::Compiler->om.compressedReferenceShiftOffset() != 0); if (node->getOpCodeValue() == TR::awrtbari) @@ -1072,26 +1062,17 @@ TR::Register *J9::X86::TreeEvaluator::writeBarrierEvaluator(TR::Node *node, TR:: if (translatedNode->getOpCode().isRightShift()) // optional translatedNode = translatedNode->getFirstChild(); - if (TR::Compiler->vm.heapBaseAddress() == 0 || - sourceObject->isNull()) - usingLowMemHeap = true; - - if (translatedNode->getOpCode().isSub() || usingLowMemHeap) - usingCompressedPointers = true; + usingCompressedPointers = true; - if (usingCompressedPointers) + if (useShiftedOffsets) { - if (!usingLowMemHeap || useShiftedOffsets) - { - while ((sourceObject->getNumChildren() > 0) && - (sourceObject->getOpCodeValue() != TR::a2l)) - sourceObject = sourceObject->getFirstChild(); - if (sourceObject->getOpCodeValue() == TR::a2l) + while ((sourceObject->getNumChildren() > 0) && (sourceObject->getOpCodeValue() != TR::a2l)) sourceObject = sourceObject->getFirstChild(); - // this is required so that different registers are - // allocated for the actual store and translated values - sourceObject->incReferenceCount(); - } + if (sourceObject->getOpCodeValue() == TR::a2l) + sourceObject = sourceObject->getFirstChild(); + // this is required so that different registers are + // allocated for the actual store and translated values + sourceObject->incReferenceCount(); } } } @@ -2600,26 +2581,18 @@ TR::Register *J9::X86::TreeEvaluator::ArrayStoreCHKEvaluator(TR::Node *node, TR: if (translatedNode->getOpCode().isRightShift()) //optional translatedNode = translatedNode->getFirstChild(); - if ((TR::Compiler->vm.heapBaseAddress() == 0) || - sourceChild->isNull()) - usingLowMemHeap = true; - - if (translatedNode->getOpCode().isSub() || usingLowMemHeap) - usingCompressedPointers = true; + usingLowMemHeap = true; + usingCompressedPointers = true; - if (usingCompressedPointers) + if (useShiftedOffsets) { - if (!usingLowMemHeap || useShiftedOffsets) - { - while ((sourceChild->getNumChildren() > 0) && - (sourceChild->getOpCodeValue() != TR::a2l)) - sourceChild = sourceChild->getFirstChild(); - if (sourceChild->getOpCodeValue() == TR::a2l) - sourceChild = sourceChild->getFirstChild(); - // this is required so that different registers are - // allocated for the actual store and translated values - sourceChild->incReferenceCount(); - } + while ((sourceChild->getNumChildren() > 0) && (sourceChild->getOpCodeValue() != TR::a2l)) + sourceChild = sourceChild->getFirstChild(); + if (sourceChild->getOpCodeValue() == TR::a2l) + sourceChild = sourceChild->getFirstChild(); + // this is required so that different registers are + // allocated for the actual store and translated values + sourceChild->incReferenceCount(); } } @@ -6999,9 +6972,7 @@ static void genInitArrayHeader( // Compress the arraylet pointer. // - if (TR::Compiler->vm.heapBaseAddress() != 0) - generateRegImmInstruction(SUB8RegImm4, node, tempReg, TR::Compiler->vm.heapBaseAddress(), cg); - else if (TR::Compiler->om.compressedReferenceShiftOffset() > 0) + if (TR::Compiler->om.compressedReferenceShiftOffset() > 0) generateRegImmInstruction(SHR8RegImm1, node, tempReg, TR::Compiler->om.compressedReferenceShiftOffset(), cg); } else @@ -9587,13 +9558,7 @@ inlineCompareAndSwapNative( isObject && (newValueChild->getDataType() != TR::Address)) { - bool usingLowMemHeap = false; bool useShiftedOffsets = (TR::Compiler->om.compressedReferenceShiftOffset() != 0); - bool usingCompressedPointers = false; - - if (TR::Compiler->vm.heapBaseAddress() == 0 || - newValueChild->isNull()) - usingLowMemHeap = true; translatedNode = newValueChild; if (translatedNode->getOpCode().isConversion()) @@ -9601,26 +9566,20 @@ inlineCompareAndSwapNative( if (translatedNode->getOpCode().isRightShift()) // optional translatedNode = translatedNode->getFirstChild(); - if (translatedNode->getOpCode().isSub() || usingLowMemHeap) - usingCompressedPointers = true; - translatedNode = newValueChild; - if (usingCompressedPointers) + if (useShiftedOffsets) { - if (!usingLowMemHeap || useShiftedOffsets) - { - while ((translatedNode->getNumChildren() > 0) && - (translatedNode->getOpCodeValue() != TR::a2l)) - translatedNode = translatedNode->getFirstChild(); + while ((translatedNode->getNumChildren() > 0) && + (translatedNode->getOpCodeValue() != TR::a2l)) + translatedNode = translatedNode->getFirstChild(); - if (translatedNode->getOpCodeValue() == TR::a2l) - translatedNode = translatedNode->getFirstChild(); + if (translatedNode->getOpCodeValue() == TR::a2l) + translatedNode = translatedNode->getFirstChild(); - // this is required so that different registers are - // allocated for the actual store and translated values - bumpedRefCount = true; - translatedNode->incReferenceCount(); - } + // this is required so that different registers are + // allocated for the actual store and translated values + bumpedRefCount = true; + translatedNode->incReferenceCount(); } } @@ -11088,12 +11047,8 @@ void J9::X86::TreeEvaluator::VMwrtbarWithStoreEvaluator( if (translatedNode->getOpCode().isRightShift()) // optional translatedNode = translatedNode->getFirstChild(); - if ((TR::Compiler->vm.heapBaseAddress() == 0) || - translatedStore->getSecondChild()->isNull()) - usingLowMemHeap = true; - - if (translatedNode->getOpCode().isSub() || usingLowMemHeap) - usingCompressedPointers = true; + usingLowMemHeap = true; + usingCompressedPointers = true; } TR::Register *translatedSourceReg = sourceRegister; diff --git a/runtime/compiler/z/codegen/J9TreeEvaluator.cpp b/runtime/compiler/z/codegen/J9TreeEvaluator.cpp index f66044060cd..d87035c2ad7 100644 --- a/runtime/compiler/z/codegen/J9TreeEvaluator.cpp +++ b/runtime/compiler/z/codegen/J9TreeEvaluator.cpp @@ -4772,11 +4772,6 @@ J9::Z::TreeEvaluator::BNDCHKwithSpineCHKEvaluator(TR::Node *node, TR::CodeGenera { cursor = generateRSInstruction(cg, TR::InstOpCode::SLLG, node, tmpReg, tmpReg, cmpRefsShift, cursor); } - - // Add heapbase value if necessary. - uintptr_t heapBaseValue = TR::Compiler->vm.heapBaseAddress(); - if (heapBaseValue != 0) - cursor = generateRegLitRefInstruction(cg, TR::InstOpCode::AG, node, tmpReg, (int64_t)heapBaseValue, NULL, cursor, NULL, false); } // Calculate the offset with the arraylet for the index. @@ -4887,11 +4882,6 @@ J9::Z::TreeEvaluator::BNDCHKwithSpineCHKEvaluator(TR::Node *node, TR::CodeGenera { cursor = generateRSInstruction(cg, TR::InstOpCode::SLLG, node, loadOrStoreReg, loadOrStoreReg, cmpRefsShift, cursor); } - - // Add heapbase value if necessary. - uintptr_t heapBaseValue = TR::Compiler->vm.heapBaseAddress(); - if (heapBaseValue != 0) - cursor = generateRegLitRefInstruction(cg, TR::InstOpCode::AG, node, loadOrStoreReg, (int64_t)heapBaseValue, NULL, cursor, NULL, false); } if (highArrayletMR) @@ -5201,13 +5191,7 @@ J9::Z::TreeEvaluator::ArrayStoreCHKEvaluator(TR::Node * node, TR::CodeGenerator if (translatedNode->getOpCode().isRightShift()) // optional translatedNode = translatedNode->getFirstChild(); - bool usingLowMemHeap = false; - if (TR::Compiler->vm.heapBaseAddress() == 0 || - sourceChild->isNull()) - usingLowMemHeap = true; - - if (translatedNode->getOpCode().isSub() || usingLowMemHeap) - usingCompressedPointers = true; + usingCompressedPointers = true; if (usingCompressedPointers) { @@ -9094,8 +9078,7 @@ J9::Z::TreeEvaluator::VMnewEvaluator(TR::Node * node, TR::CodeGenerator * cg) if (generateArraylets) { iCursor = generateS390ImmOp(cg, TR::InstOpCode::getAddOpCode(), node, temp1Reg, resReg, dataBegin, conditions, litPoolBaseReg); - if(TR::Compiler->vm.heapBaseAddress() == 0) - iCursor = generateS390ImmOp(cg, TR::InstOpCode::getAddOpCode(), node, temp1Reg, temp1Reg, -((int64_t)(TR::Compiler->vm.heapBaseAddress())), conditions, litPoolBaseReg); + iCursor = generateS390ImmOp(cg, TR::InstOpCode::getAddOpCode(), node, temp1Reg, temp1Reg, -((int64_t)(0)), conditions, litPoolBaseReg); if(TR::Compiler->om.compressedReferenceShiftOffset() > 0) iCursor = generateRSInstruction(cg, TR::InstOpCode::SRL, node, temp1Reg, TR::Compiler->om.compressedReferenceShiftOffset(), iCursor); @@ -9993,28 +9976,22 @@ VMinlineCompareAndSwap(TR::Node *node, TR::CodeGenerator *cg, TR::InstOpCode::Mn decompressedValueNode = decompressedValueNode->getFirstChild(); } - if (decompressedValueNode->getOpCode().isSub() || TR::Compiler->vm.heapBaseAddress() == 0 || newVNode->isNull()) + isValueCompressedReference = true; + + while ((decompressedValueNode->getNumChildren() > 0) && (decompressedValueNode->getOpCodeValue() != TR::a2l)) { - isValueCompressedReference = true; + decompressedValueNode = decompressedValueNode->getFirstChild(); } - if (isValueCompressedReference) + if (decompressedValueNode->getOpCodeValue() == TR::a2l) { - while ((decompressedValueNode->getNumChildren() > 0) && (decompressedValueNode->getOpCodeValue() != TR::a2l)) - { - decompressedValueNode = decompressedValueNode->getFirstChild(); - } - - if (decompressedValueNode->getOpCodeValue() == TR::a2l) - { - decompressedValueNode = decompressedValueNode->getFirstChild(); - } - - // Artificially bump the reference count on the value so that different registers are allocated for the - // compressed and decompressed values. This is done so that the card mark write barrier helper uses the - // decompressed value. - decompressedValueNode->incReferenceCount(); + decompressedValueNode = decompressedValueNode->getFirstChild(); } + + // Artificially bump the reference count on the value so that different registers are allocated for the + // compressed and decompressed values. This is done so that the card mark write barrier helper uses the + // decompressed value. + decompressedValueNode->incReferenceCount(); } // Eval old and new vals