diff --git a/device/accton/x86_64-accton_as4630_54te-r0/Accton-AS4630-54TE/hwsku.json b/device/accton/x86_64-accton_as4630_54te-r0/Accton-AS4630-54TE/hwsku.json new file mode 100644 index 0000000000..29852938ec --- /dev/null +++ b/device/accton/x86_64-accton_as4630_54te-r0/Accton-AS4630-54TE/hwsku.json @@ -0,0 +1,315 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet1": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet2": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet3": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet4": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet5": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet6": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet7": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet8": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet9": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet10": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet11": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet12": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet13": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet14": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet15": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet16": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet17": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet18": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet19": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet20": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet21": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet22": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet23": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet24": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet25": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet26": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet27": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet28": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet29": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet30": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet31": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet32": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet33": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet34": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet35": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet36": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet37": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet38": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet39": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet40": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet41": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet42": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet43": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet44": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet45": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet46": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet47": { + "default_brkout_mode": "1x1G", + "port_type": "RJ45", + "autoneg": "on" + }, + + "Ethernet48": { + "default_brkout_mode": "1x25G[10G]" + }, + + "Ethernet49": { + "default_brkout_mode": "1x25G[10G]" + }, + + "Ethernet50": { + "default_brkout_mode": "1x25G[10G]" + }, + + "Ethernet51": { + "default_brkout_mode": "1x25G[10G]" + }, + + "Ethernet52": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet56": { + "default_brkout_mode": "1x100G[40G]" + } + } +} diff --git a/device/accton/x86_64-accton_as4630_54te-r0/Accton-AS4630-54TE/hx5-as4630-48x1G+4x25G+2x100G.bcm b/device/accton/x86_64-accton_as4630_54te-r0/Accton-AS4630-54TE/hx5-as4630-48x1G+4x25G+2x100G.bcm new file mode 100644 index 0000000000..1a02415067 --- /dev/null +++ b/device/accton/x86_64-accton_as4630_54te-r0/Accton-AS4630-54TE/hx5-as4630-48x1G+4x25G+2x100G.bcm @@ -0,0 +1,502 @@ +stable_size=76303168 + +#polarity/lanemap is using TH2 style. +core_clock_frequency=893 +dpp_clock_ratio=2:3 + +ptp_ts_pll_fref=50000000 +ptp_bs_fref_0=50000000 +ptp_bs_fref_1=50000000 + +#oversubscribe_mode=1 + +pbmp_xport_xe=0x1FFFFFFE000000000000 + +parity_enable=0 +mem_cache_enable=1 + +l2_mem_entries=32768 +#l3_mem_entries=49152 +#fpem_mem_entries=16384 +l2xmsg_mode=1 +l3_alpm_enable=2 +ipv6_lpm_128b_enable=1 +port_flex_enable=1 +pcie_hot_swap_timeout_usec=10000 +ifp_inports_support_enable=1 + +#3x PM4x10Q (3 * 16 = 48 physical ports) +#Doesn't support oversubscribe in Q mode +#MCQ0 +port_gmii_mode_1=1 #Q mode + +#riot vxlan +#dport_map_direct=1 +flow_init_mode=1 +riot_enable=1 +riot_overlay_l3_intf_mem_size=4096 +riot_overlay_l3_egress_mem_size=8192 +l3_ecmp_levels=2 +riot_overlay_ecmp_resilient_hash_size=16384 +use_all_splithorizon_groups=1 +host_as_route_disable=1 +max_vp_lags=448 + +#PHY4 U56 xx1, MDC/MDIO2, PHYADDR:0x00-0x07, 0x08 +port_phy_addr_1=0x40 +port_phy_addr_2=0x41 +port_phy_addr_3=0x42 +port_phy_addr_4=0x43 +port_phy_addr_5=0x44 +port_phy_addr_6=0x45 +port_phy_addr_7=0x46 +port_phy_addr_8=0x47 +phy_port_primary_and_offset_1=0x0100 +phy_port_primary_and_offset_2=0x0101 +phy_port_primary_and_offset_3=0x0102 +phy_port_primary_and_offset_4=0x0103 +phy_port_primary_and_offset_5=0x0104 +phy_port_primary_and_offset_6=0x0105 +phy_port_primary_and_offset_7=0x0106 +phy_port_primary_and_offset_8=0x0107 +dport_map_port_1=26 +dport_map_port_2=25 +dport_map_port_3=28 +dport_map_port_4=27 +dport_map_port_5=30 +dport_map_port_6=29 +dport_map_port_7=32 +dport_map_port_8=31 +portmap_1=1:1 +portmap_2=2:1 +portmap_3=3:1 +portmap_4=4:1 +portmap_5=5:1 +portmap_6=6:1 +portmap_7=7:1 +portmap_8=8:1 +phy_chain_rx_lane_map_physical{1.0}=0x3210 +phy_chain_rx_lane_map_physical{2.0}=0x3210 +phy_chain_rx_lane_map_physical{3.0}=0x3210 +phy_chain_rx_lane_map_physical{4.0}=0x3210 +phy_chain_rx_lane_map_physical{5.0}=0x3210 +phy_chain_rx_lane_map_physical{6.0}=0x3210 +phy_chain_rx_lane_map_physical{7.0}=0x3210 +phy_chain_rx_lane_map_physical{8.0}=0x3210 +phy_chain_tx_lane_map_physical{1.0}=0x3210 +phy_chain_tx_lane_map_physical{2.0}=0x3210 +phy_chain_tx_lane_map_physical{3.0}=0x3210 +phy_chain_tx_lane_map_physical{4.0}=0x3210 +phy_chain_tx_lane_map_physical{5.0}=0x3210 +phy_chain_tx_lane_map_physical{6.0}=0x3210 +phy_chain_tx_lane_map_physical{7.0}=0x3210 +phy_chain_tx_lane_map_physical{8.0}=0x3210 +phy_chain_rx_polarity_flip_physical{1.0}=0x0 +phy_chain_rx_polarity_flip_physical{2.0}=0x0 +phy_chain_rx_polarity_flip_physical{3.0}=0x0 +phy_chain_rx_polarity_flip_physical{4.0}=0x0 +phy_chain_rx_polarity_flip_physical{5.0}=0x0 +phy_chain_rx_polarity_flip_physical{6.0}=0x0 +phy_chain_rx_polarity_flip_physical{7.0}=0x0 +phy_chain_rx_polarity_flip_physical{8.0}=0x0 +phy_chain_tx_polarity_flip_physical{1.0}=0x0 +phy_chain_tx_polarity_flip_physical{2.0}=0x0 +phy_chain_tx_polarity_flip_physical{3.0}=0x0 +phy_chain_tx_polarity_flip_physical{4.0}=0x0 +phy_chain_tx_polarity_flip_physical{5.0}=0x0 +phy_chain_tx_polarity_flip_physical{6.0}=0x0 +phy_chain_tx_polarity_flip_physical{7.0}=0x0 +phy_chain_tx_polarity_flip_physical{8.0}=0x0 + + +#PHY5 U57 x1x, MDC/MDIO2, PHYADDR:0x09-0x10, 0x11 +port_phy_addr_9=0x49 +port_phy_addr_10=0x4A +port_phy_addr_11=0x4B +port_phy_addr_12=0x4C +port_phy_addr_13=0x4D +port_phy_addr_14=0x4E +port_phy_addr_15=0x4F +port_phy_addr_16=0x50 +phy_port_primary_and_offset_9=0x0900 +phy_port_primary_and_offset_10=0x0901 +phy_port_primary_and_offset_11=0x0902 +phy_port_primary_and_offset_12=0x0903 +phy_port_primary_and_offset_13=0x0904 +phy_port_primary_and_offset_14=0x0905 +phy_port_primary_and_offset_15=0x0906 +phy_port_primary_and_offset_16=0x0907 +dport_map_port_9=34 +dport_map_port_10=33 +dport_map_port_11=36 +dport_map_port_12=35 +dport_map_port_13=38 +dport_map_port_14=37 +dport_map_port_15=40 +dport_map_port_16=39 +portmap_9=9:1 +portmap_10=10:1 +portmap_11=11:1 +portmap_12=12:1 +portmap_13=13:1 +portmap_14=14:1 +portmap_15=15:1 +portmap_16=16:1 +phy_chain_rx_lane_map_physical{9.0}=0x3210 +phy_chain_rx_lane_map_physical{10.0}=0x3210 +phy_chain_rx_lane_map_physical{11.0}=0x3210 +phy_chain_rx_lane_map_physical{12.0}=0x3210 +phy_chain_rx_lane_map_physical{13.0}=0x3210 +phy_chain_rx_lane_map_physical{14.0}=0x3210 +phy_chain_rx_lane_map_physical{15.0}=0x3210 +phy_chain_rx_lane_map_physical{16.0}=0x3210 +phy_chain_tx_lane_map_physical{9.0}=0x3210 +phy_chain_tx_lane_map_physical{10.0}=0x3210 +phy_chain_tx_lane_map_physical{11.0}=0x3210 +phy_chain_tx_lane_map_physical{12.0}=0x3210 +phy_chain_tx_lane_map_physical{13.0}=0x3210 +phy_chain_tx_lane_map_physical{14.0}=0x3210 +phy_chain_tx_lane_map_physical{15.0}=0x3210 +phy_chain_tx_lane_map_physical{16.0}=0x3210 +phy_chain_rx_polarity_flip_physical{9.0}=0x0 +phy_chain_rx_polarity_flip_physical{10.0}=0x0 +phy_chain_rx_polarity_flip_physical{11.0}=0x0 +phy_chain_rx_polarity_flip_physical{12.0}=0x0 +phy_chain_rx_polarity_flip_physical{13.0}=0x0 +phy_chain_rx_polarity_flip_physical{14.0}=0x0 +phy_chain_rx_polarity_flip_physical{15.0}=0x0 +phy_chain_rx_polarity_flip_physical{16.0}=0x0 +phy_chain_tx_polarity_flip_physical{9.0}=0x0 +phy_chain_tx_polarity_flip_physical{10.0}=0x0 +phy_chain_tx_polarity_flip_physical{11.0}=0x0 +phy_chain_tx_polarity_flip_physical{12.0}=0x0 +phy_chain_tx_polarity_flip_physical{13.0}=0x0 +phy_chain_tx_polarity_flip_physical{14.0}=0x0 +phy_chain_tx_polarity_flip_physical{15.0}=0x0 +phy_chain_tx_polarity_flip_physical{16.0}=0x0 + +#MCQ1 +port_gmii_mode_17=1 #Q mode + +#PHY6 U58 11x, MDC/MDIO2, PHYADDR:0x12-0x19, 0x1A +port_phy_addr_17=0x52 +port_phy_addr_18=0x53 +port_phy_addr_19=0x54 +port_phy_addr_20=0x55 +port_phy_addr_21=0x56 +port_phy_addr_22=0x57 +port_phy_addr_23=0x58 +port_phy_addr_24=0x59 +phy_port_primary_and_offset_17=0x1100 +phy_port_primary_and_offset_18=0x1101 +phy_port_primary_and_offset_19=0x1102 +phy_port_primary_and_offset_20=0x1103 +phy_port_primary_and_offset_21=0x1104 +phy_port_primary_and_offset_22=0x1105 +phy_port_primary_and_offset_23=0x1106 +phy_port_primary_and_offset_24=0x1107 +dport_map_port_17=42 +dport_map_port_18=41 +dport_map_port_19=44 +dport_map_port_20=43 +dport_map_port_21=46 +dport_map_port_22=45 +dport_map_port_23=48 +dport_map_port_24=47 +portmap_17=17:1 +portmap_18=18:1 +portmap_19=19:1 +portmap_20=20:1 +portmap_21=21:1 +portmap_22=22:1 +portmap_23=23:1 +portmap_24=24:1 +phy_chain_rx_lane_map_physical{17.0}=0x3210 +phy_chain_rx_lane_map_physical{18.0}=0x3210 +phy_chain_rx_lane_map_physical{19.0}=0x3210 +phy_chain_rx_lane_map_physical{20.0}=0x3210 +phy_chain_rx_lane_map_physical{21.0}=0x3210 +phy_chain_rx_lane_map_physical{22.0}=0x3210 +phy_chain_rx_lane_map_physical{23.0}=0x3210 +phy_chain_rx_lane_map_physical{24.0}=0x3210 +phy_chain_tx_lane_map_physical{17.0}=0x3210 +phy_chain_tx_lane_map_physical{18.0}=0x3210 +phy_chain_tx_lane_map_physical{19.0}=0x3210 +phy_chain_tx_lane_map_physical{20.0}=0x3210 +phy_chain_tx_lane_map_physical{21.0}=0x3210 +phy_chain_tx_lane_map_physical{22.0}=0x3210 +phy_chain_tx_lane_map_physical{23.0}=0x3210 +phy_chain_tx_lane_map_physical{24.0}=0x3210 +phy_chain_rx_polarity_flip_physical{17.0}=0x0 +phy_chain_rx_polarity_flip_physical{18.0}=0x0 +phy_chain_rx_polarity_flip_physical{19.0}=0x0 +phy_chain_rx_polarity_flip_physical{20.0}=0x0 +phy_chain_rx_polarity_flip_physical{21.0}=0x0 +phy_chain_rx_polarity_flip_physical{22.0}=0x0 +phy_chain_rx_polarity_flip_physical{23.0}=0x0 +phy_chain_rx_polarity_flip_physical{24.0}=0x0 +phy_chain_tx_polarity_flip_physical{17.0}=0x0 +phy_chain_tx_polarity_flip_physical{18.0}=0x0 +phy_chain_tx_polarity_flip_physical{19.0}=0x0 +phy_chain_tx_polarity_flip_physical{20.0}=0x0 +phy_chain_tx_polarity_flip_physical{21.0}=0x0 +phy_chain_tx_polarity_flip_physical{22.0}=0x0 +phy_chain_tx_polarity_flip_physical{23.0}=0x0 +phy_chain_tx_polarity_flip_physical{24.0}=0x0 + +#PHY1 U53 xx1, MDC/MDIO0, PHYADDR:0x00-0x07, 0x08 +port_phy_addr_25=0x00 +port_phy_addr_26=0x01 +port_phy_addr_27=0x02 +port_phy_addr_28=0x03 +port_phy_addr_29=0x04 +port_phy_addr_30=0x05 +port_phy_addr_31=0x06 +port_phy_addr_32=0x07 +phy_port_primary_and_offset_25=0x1900 +phy_port_primary_and_offset_26=0x1901 +phy_port_primary_and_offset_27=0x1902 +phy_port_primary_and_offset_28=0x1903 +phy_port_primary_and_offset_29=0x1904 +phy_port_primary_and_offset_30=0x1905 +phy_port_primary_and_offset_31=0x1906 +phy_port_primary_and_offset_32=0x1907 +dport_map_port_25=2 +dport_map_port_26=1 +dport_map_port_27=4 +dport_map_port_28=3 +dport_map_port_29=6 +dport_map_port_30=5 +dport_map_port_31=8 +dport_map_port_32=7 +portmap_25=25:1 +portmap_26=26:1 +portmap_27=27:1 +portmap_28=28:1 +portmap_29=29:1 +portmap_30=30:1 +portmap_31=31:1 +portmap_32=32:1 +phy_chain_rx_lane_map_physical{25.0}=0x3210 +phy_chain_rx_lane_map_physical{26.0}=0x3210 +phy_chain_rx_lane_map_physical{27.0}=0x3210 +phy_chain_rx_lane_map_physical{28.0}=0x3210 +phy_chain_rx_lane_map_physical{29.0}=0x3210 +phy_chain_rx_lane_map_physical{30.0}=0x3210 +phy_chain_rx_lane_map_physical{31.0}=0x3210 +phy_chain_rx_lane_map_physical{32.0}=0x3210 +phy_chain_tx_lane_map_physical{25.0}=0x3210 +phy_chain_tx_lane_map_physical{26.0}=0x3210 +phy_chain_tx_lane_map_physical{27.0}=0x3210 +phy_chain_tx_lane_map_physical{28.0}=0x3210 +phy_chain_tx_lane_map_physical{29.0}=0x3210 +phy_chain_tx_lane_map_physical{30.0}=0x3210 +phy_chain_tx_lane_map_physical{31.0}=0x3210 +phy_chain_tx_lane_map_physical{32.0}=0x3210 +phy_chain_rx_polarity_flip_physical{25.0}=0x0 +phy_chain_rx_polarity_flip_physical{26.0}=0x0 +phy_chain_rx_polarity_flip_physical{27.0}=0x0 +phy_chain_rx_polarity_flip_physical{28.0}=0x0 +phy_chain_rx_polarity_flip_physical{29.0}=0x0 +phy_chain_rx_polarity_flip_physical{30.0}=0x0 +phy_chain_rx_polarity_flip_physical{31.0}=0x0 +phy_chain_rx_polarity_flip_physical{32.0}=0x0 +phy_chain_tx_polarity_flip_physical{25.0}=0x0 +phy_chain_tx_polarity_flip_physical{26.0}=0x0 +phy_chain_tx_polarity_flip_physical{27.0}=0x0 +phy_chain_tx_polarity_flip_physical{28.0}=0x0 +phy_chain_tx_polarity_flip_physical{29.0}=0x0 +phy_chain_tx_polarity_flip_physical{30.0}=0x0 +phy_chain_tx_polarity_flip_physical{31.0}=0x0 +phy_chain_tx_polarity_flip_physical{32.0}=0x0 + +#MCQ2 +port_gmii_mode_33=1 #Q mode + +#PHY2 U54 x1x, MDC/MDIO0, PHYADDR:0x09-0x10, 0x11 +port_phy_addr_33=0x0D +port_phy_addr_34=0x0E +port_phy_addr_35=0x0F +port_phy_addr_36=0x10 +port_phy_addr_37=0x09 +port_phy_addr_38=0x0A +port_phy_addr_39=0x0B +port_phy_addr_40=0x0C +phy_port_primary_and_offset_33=0x2504 +phy_port_primary_and_offset_34=0x2505 +phy_port_primary_and_offset_35=0x2506 +phy_port_primary_and_offset_36=0x2507 +phy_port_primary_and_offset_37=0x2500 +phy_port_primary_and_offset_38=0x2501 +phy_port_primary_and_offset_39=0x2502 +phy_port_primary_and_offset_40=0x2503 +dport_map_port_33=14 +dport_map_port_34=13 +dport_map_port_35=16 +dport_map_port_36=15 +dport_map_port_37=10 +dport_map_port_38=9 +dport_map_port_39=12 +dport_map_port_40=11 +portmap_33=33:1 +portmap_34=34:1 +portmap_35=35:1 +portmap_36=36:1 +portmap_37=37:1 +portmap_38=38:1 +portmap_39=39:1 +portmap_40=40:1 +phy_chain_rx_lane_map_physical{33.0}=0x3210 +phy_chain_rx_lane_map_physical{34.0}=0x3210 +phy_chain_rx_lane_map_physical{35.0}=0x3210 +phy_chain_rx_lane_map_physical{36.0}=0x3210 +phy_chain_rx_lane_map_physical{37.0}=0x3210 +phy_chain_rx_lane_map_physical{38.0}=0x3210 +phy_chain_rx_lane_map_physical{39.0}=0x3210 +phy_chain_rx_lane_map_physical{40.0}=0x3210 +phy_chain_tx_lane_map_physical{33.0}=0x3210 +phy_chain_tx_lane_map_physical{34.0}=0x3210 +phy_chain_tx_lane_map_physical{35.0}=0x3210 +phy_chain_tx_lane_map_physical{36.0}=0x3210 +phy_chain_tx_lane_map_physical{37.0}=0x3210 +phy_chain_tx_lane_map_physical{38.0}=0x3210 +phy_chain_tx_lane_map_physical{39.0}=0x3210 +phy_chain_tx_lane_map_physical{40.0}=0x3210 +phy_chain_rx_polarity_flip_physical{33.0}=0x1 +phy_chain_rx_polarity_flip_physical{34.0}=0x1 +phy_chain_rx_polarity_flip_physical{35.0}=0x1 +phy_chain_rx_polarity_flip_physical{36.0}=0x1 +phy_chain_rx_polarity_flip_physical{37.0}=0x1 +phy_chain_rx_polarity_flip_physical{38.0}=0x1 +phy_chain_rx_polarity_flip_physical{39.0}=0x1 +phy_chain_rx_polarity_flip_physical{40.0}=0x1 +phy_chain_tx_polarity_flip_physical{33.0}=0x1 +phy_chain_tx_polarity_flip_physical{34.0}=0x1 +phy_chain_tx_polarity_flip_physical{35.0}=0x1 +phy_chain_tx_polarity_flip_physical{36.0}=0x1 +phy_chain_tx_polarity_flip_physical{37.0}=0x1 +phy_chain_tx_polarity_flip_physical{38.0}=0x1 +phy_chain_tx_polarity_flip_physical{39.0}=0x1 +phy_chain_tx_polarity_flip_physical{40.0}=0x1 + +#PHY3 U55 11x, MDC/MDIO0, PHYADDR:0x12-0x19, 0x1A +port_phy_addr_41=0x16 +port_phy_addr_42=0x17 +port_phy_addr_43=0x18 +port_phy_addr_44=0x19 +port_phy_addr_45=0x12 +port_phy_addr_46=0x13 +port_phy_addr_47=0x14 +port_phy_addr_48=0x15 +phy_port_primary_and_offset_41=0x2D00 +phy_port_primary_and_offset_42=0x2D01 +phy_port_primary_and_offset_43=0x2D02 +phy_port_primary_and_offset_44=0x2D03 +phy_port_primary_and_offset_45=0x2D04 +phy_port_primary_and_offset_46=0x2D05 +phy_port_primary_and_offset_47=0x2D06 +phy_port_primary_and_offset_48=0x2D07 +dport_map_port_41=22 +dport_map_port_42=21 +dport_map_port_43=24 +dport_map_port_44=23 +dport_map_port_45=18 +dport_map_port_46=17 +dport_map_port_47=20 +dport_map_port_48=19 +portmap_41=41:1 +portmap_42=42:1 +portmap_43=43:1 +portmap_44=44:1 +portmap_45=45:1 +portmap_46=46:1 +portmap_47=47:1 +portmap_48=48:1 +phy_chain_rx_lane_map_physical{41.0}=0x3210 +phy_chain_rx_lane_map_physical{42.0}=0x3210 +phy_chain_rx_lane_map_physical{43.0}=0x3210 +phy_chain_rx_lane_map_physical{44.0}=0x3210 +phy_chain_rx_lane_map_physical{45.0}=0x3210 +phy_chain_rx_lane_map_physical{46.0}=0x3210 +phy_chain_rx_lane_map_physical{47.0}=0x3210 +phy_chain_rx_lane_map_physical{48.0}=0x3210 +phy_chain_tx_lane_map_physical{41.0}=0x3210 +phy_chain_tx_lane_map_physical{42.0}=0x3210 +phy_chain_tx_lane_map_physical{43.0}=0x3210 +phy_chain_tx_lane_map_physical{44.0}=0x3210 +phy_chain_tx_lane_map_physical{45.0}=0x3210 +phy_chain_tx_lane_map_physical{46.0}=0x3210 +phy_chain_tx_lane_map_physical{47.0}=0x3210 +phy_chain_tx_lane_map_physical{48.0}=0x3210 +phy_chain_rx_polarity_flip_physical{41.0}=0x1 +phy_chain_rx_polarity_flip_physical{42.0}=0x1 +phy_chain_rx_polarity_flip_physical{43.0}=0x1 +phy_chain_rx_polarity_flip_physical{44.0}=0x1 +phy_chain_rx_polarity_flip_physical{45.0}=0x1 +phy_chain_rx_polarity_flip_physical{46.0}=0x1 +phy_chain_rx_polarity_flip_physical{47.0}=0x1 +phy_chain_rx_polarity_flip_physical{48.0}=0x1 +phy_chain_tx_polarity_flip_physical{41.0}=0x1 +phy_chain_tx_polarity_flip_physical{42.0}=0x1 +phy_chain_tx_polarity_flip_physical{43.0}=0x1 +phy_chain_tx_polarity_flip_physical{44.0}=0x1 +phy_chain_tx_polarity_flip_physical{45.0}=0x1 +phy_chain_tx_polarity_flip_physical{46.0}=0x1 +phy_chain_tx_polarity_flip_physical{47.0}=0x1 +phy_chain_tx_polarity_flip_physical{48.0}=0x1 + +#3x PM4x25 (3 * 4 = 12 physical ports) +#FC0 +dport_map_port_49=51 +dport_map_port_50=50 +dport_map_port_51=49 +dport_map_port_52=52 +portmap_49=65:25 +portmap_50=66:25 +portmap_51=67:25 +portmap_52=68:25 +#FC1 +dport_map_port_53=57 +dport_map_port_54=58 +dport_map_port_55=59 +dport_map_port_56=60 +portmap_53=69:100:4 +#portmap_55=71:50 +#portmap_54=70:25 +#portmap_55=71:25 +#portmap_56=72:25 +#FC2 +dport_map_port_57=53 +dport_map_port_58=54 +dport_map_port_59=55 +dport_map_port_60=56 +portmap_57=73:100:4 +#portmap_59=75:50 +#portmap_58=74:25 +#portmap_59=75:25 +#portmap_60=76:25 + +#4x PM4x10 (4 * 4 = 16 physical ports) +#MC0 No connection +#MC1 No connection +#MC2 No connection +#MC3 No connection +#portmap_=49:10 +#portmap_=50:10 +#portmap_=51:10 +#portmap_=52:10 + +#portmap_=53:10 +#portmap_=54:10 +#portmap_=55:10 +#portmap_=56:10 + +#portmap_=57:10 +#portmap_=58:10 +#portmap_=59:10 +#portmap_=60:10 + +#portmap_=61:10 +#portmap_=62:10 +#portmap_=63:10 +#portmap_=64:10 diff --git a/device/accton/x86_64-accton_as4630_54te-r0/Accton-AS4630-54TE/port_config.ini b/device/accton/x86_64-accton_as4630_54te-r0/Accton-AS4630-54TE/port_config.ini index 7040875faf..c30f99f480 100755 --- a/device/accton/x86_64-accton_as4630_54te-r0/Accton-AS4630-54TE/port_config.ini +++ b/device/accton/x86_64-accton_as4630_54te-r0/Accton-AS4630-54TE/port_config.ini @@ -1,55 +1,55 @@ -# name lanes alias index speed autoneg -Ethernet0 26 thousandE1 1 1000 on -Ethernet1 25 thousandE2 2 1000 on -Ethernet2 28 thousandE3 3 1000 on -Ethernet3 27 thousandE4 4 1000 on -Ethernet4 30 thousandE5 5 1000 on -Ethernet5 29 thousandE6 6 1000 on -Ethernet6 32 thousandE7 7 1000 on -Ethernet7 31 thousandE8 8 1000 on -Ethernet8 38 thousandE9 9 1000 on -Ethernet9 37 thousandE10 10 1000 on -Ethernet10 40 thousandE11 11 1000 on -Ethernet11 39 thousandE12 12 1000 on -Ethernet12 34 thousandE13 13 1000 on -Ethernet13 33 thousandE14 14 1000 on -Ethernet14 36 thousandE15 15 1000 on -Ethernet15 35 thousandE16 16 1000 on -Ethernet16 46 thousandE17 17 1000 on -Ethernet17 45 thousandE18 18 1000 on -Ethernet18 48 thousandE19 19 1000 on -Ethernet19 47 thousandE20 20 1000 on -Ethernet20 42 thousandE21 21 1000 on -Ethernet21 41 thousandE22 22 1000 on -Ethernet22 44 thousandE23 23 1000 on -Ethernet23 43 thousandE24 24 1000 on -Ethernet24 2 thousandE25 25 1000 on -Ethernet25 1 thousandE26 26 1000 on -Ethernet26 4 thousandE27 27 1000 on -Ethernet27 3 thousandE28 28 1000 on -Ethernet28 6 thousandE29 29 1000 on -Ethernet29 5 thousandE30 30 1000 on -Ethernet30 8 thousandE31 31 1000 on -Ethernet31 7 thousandE32 32 1000 on -Ethernet32 10 thousandE33 33 1000 on -Ethernet33 9 thousandE34 34 1000 on -Ethernet34 12 thousandE35 35 1000 on -Ethernet35 11 thousandE36 36 1000 on -Ethernet36 14 thousandE37 37 1000 on -Ethernet37 13 thousandE38 38 1000 on -Ethernet38 16 thousandE39 39 1000 on -Ethernet39 15 thousandE40 40 1000 on -Ethernet40 18 thousandE41 41 1000 on -Ethernet41 17 thousandE42 42 1000 on -Ethernet42 20 thousandE43 43 1000 on -Ethernet43 19 thousandE44 44 1000 on -Ethernet44 22 thousandE45 45 1000 on -Ethernet45 21 thousandE46 46 1000 on -Ethernet46 24 thousandE47 47 1000 on -Ethernet47 23 thousandE48 48 1000 on -Ethernet48 67 twentyfiveGigE49 49 25000 off -Ethernet49 66 twentyfiveGigE50 50 25000 off -Ethernet50 65 twentyfiveGigE51 51 25000 off -Ethernet51 68 twentyfiveGigE52 52 25000 off -Ethernet52 73,74,75,76 hundredGigE53 53 100000 off -Ethernet56 69,70,71,72 hundredGigE54 54 100000 off +# name lanes alias index speed autoneg +Ethernet0 26 Eth1(Port1) 1 1000 on +Ethernet1 25 Eth2(Port2) 2 1000 on +Ethernet2 28 Eth3(Port3) 3 1000 on +Ethernet3 27 Eth4(Port4) 4 1000 on +Ethernet4 30 Eth5(Port5) 5 1000 on +Ethernet5 29 Eth6(Port6) 6 1000 on +Ethernet6 32 Eth7(Port7) 7 1000 on +Ethernet7 31 Eth8(Port8) 8 1000 on +Ethernet8 38 Eth9(Port9) 9 1000 on +Ethernet9 37 Eth10(Port10) 10 1000 on +Ethernet10 40 Eth11(Port11) 11 1000 on +Ethernet11 39 Eth12(Port12) 12 1000 on +Ethernet12 34 Eth13(Port13) 13 1000 on +Ethernet13 33 Eth14(Port14) 14 1000 on +Ethernet14 36 Eth15(Port15) 15 1000 on +Ethernet15 35 Eth16(Port16) 16 1000 on +Ethernet16 46 Eth17(Port17) 17 1000 on +Ethernet17 45 Eth18(Port18) 18 1000 on +Ethernet18 48 Eth19(Port19) 19 1000 on +Ethernet19 47 Eth20(Port20) 20 1000 on +Ethernet20 42 Eth21(Port21) 21 1000 on +Ethernet21 41 Eth22(Port22) 22 1000 on +Ethernet22 44 Eth23(Port23) 23 1000 on +Ethernet23 43 Eth24(Port24) 24 1000 on +Ethernet24 2 Eth25(Port25) 25 1000 on +Ethernet25 1 Eth26(Port26) 26 1000 on +Ethernet26 4 Eth27(Port27) 27 1000 on +Ethernet27 3 Eth28(Port28) 28 1000 on +Ethernet28 6 Eth29(Port29) 29 1000 on +Ethernet29 5 Eth30(Port30) 30 1000 on +Ethernet30 8 Eth31(Port31) 31 1000 on +Ethernet31 7 Eth32(Port32) 32 1000 on +Ethernet32 10 Eth33(Port33) 33 1000 on +Ethernet33 9 Eth34(Port34) 34 1000 on +Ethernet34 12 Eth35(Port35) 35 1000 on +Ethernet35 11 Eth36(Port36) 36 1000 on +Ethernet36 14 Eth37(Port37) 37 1000 on +Ethernet37 13 Eth38(Port38) 38 1000 on +Ethernet38 16 Eth39(Port39) 39 1000 on +Ethernet39 15 Eth40(Port40) 40 1000 on +Ethernet40 18 Eth41(Port41) 41 1000 on +Ethernet41 17 Eth42(Port42) 42 1000 on +Ethernet42 20 Eth43(Port43) 43 1000 on +Ethernet43 19 Eth44(Port44) 44 1000 on +Ethernet44 22 Eth45(Port45) 45 1000 on +Ethernet45 21 Eth46(Port46) 46 1000 on +Ethernet46 24 Eth47(Port47) 47 1000 on +Ethernet47 23 Eth48(Port48) 48 1000 on +Ethernet48 67 Eth49(Port49) 49 25000 off +Ethernet49 66 Eth50(Port50) 50 25000 off +Ethernet50 65 Eth51(Port51) 51 25000 off +Ethernet51 68 Eth52(Port52) 52 25000 off +Ethernet52 73,74,75,76 Eth53(Port53) 53 100000 off +Ethernet56 69,70,71,72 Eth54(Port54) 54 100000 off diff --git a/device/accton/x86_64-accton_as4630_54te-r0/Accton-AS4630-54TE/sai.profile b/device/accton/x86_64-accton_as4630_54te-r0/Accton-AS4630-54TE/sai.profile new file mode 100644 index 0000000000..5329410fe8 --- /dev/null +++ b/device/accton/x86_64-accton_as4630_54te-r0/Accton-AS4630-54TE/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/hx5-as4630-48x1G+4x25G+2x100G.bcm diff --git a/device/accton/x86_64-accton_as4630_54te-r0/custom_led.bin b/device/accton/x86_64-accton_as4630_54te-r0/custom_led.bin new file mode 100644 index 0000000000..11f7790348 Binary files /dev/null and b/device/accton/x86_64-accton_as4630_54te-r0/custom_led.bin differ diff --git a/device/accton/x86_64-accton_as4630_54te-r0/led_proc_init.soc b/device/accton/x86_64-accton_as4630_54te-r0/led_proc_init.soc new file mode 100644 index 0000000000..5bef973ed2 --- /dev/null +++ b/device/accton/x86_64-accton_as4630_54te-r0/led_proc_init.soc @@ -0,0 +1,3 @@ +m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin +led start +led auto on