Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Move Super Watchdog functions into RTC_CNTL common implementation #125

Merged
merged 2 commits into from
Jul 27, 2022
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 0 additions & 2 deletions esp-hal-common/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,6 @@ pub mod interrupt;
pub mod prelude;
pub mod pulse_control;
pub mod rng;
#[cfg(not(feature = "esp32c3"))]
pub mod rtc_cntl;
pub mod serial;
pub mod spi;
Expand All @@ -58,7 +57,6 @@ pub use interrupt::*;
pub use procmacros as macros;
pub use pulse_control::PulseControl;
pub use rng::Rng;
#[cfg(not(feature = "esp32c3"))]
pub use rtc_cntl::RtcCntl;
pub use serial::Serial;
pub use spi::Spi;
Expand Down
20 changes: 20 additions & 0 deletions esp-hal-common/src/rtc_cntl.rs
Original file line number Diff line number Diff line change
Expand Up @@ -23,4 +23,24 @@ impl RtcCntl {
.modify(|_, w| w.wdt_en().bit(enable).wdt_flashboot_mod_en().clear_bit());
self.set_wdt_write_protection(true);
}

#[cfg(any(feature = "esp32c3", feature = "esp32s3"))]
pub fn set_super_wdt_enable(&mut self, enable: bool) {
self.set_swd_write_protection(false);

self.rtc_cntl
.swd_conf
.write(|w| w.swd_auto_feed_en().bit(!enable));

self.set_swd_write_protection(true);
}

#[cfg(any(feature = "esp32c3", feature = "esp32s3"))]
fn set_swd_write_protection(&mut self, enable: bool) {
let wkey = if enable { 0u32 } else { 0x8F1D_312A };

self.rtc_cntl
.swd_wprotect
.write(|w| unsafe { w.swd_wkey().bits(wkey) });
}
}
2 changes: 1 addition & 1 deletion esp32c3-hal/examples/adc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -36,7 +36,7 @@ fn main() -> ! {
let mut wdt1 = timer_group1.wdt;

rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

Expand Down
2 changes: 1 addition & 1 deletion esp32c3-hal/examples/advanced_serial.rs
Original file line number Diff line number Diff line change
Expand Up @@ -39,7 +39,7 @@ fn main() -> ! {

// Disable watchdog timers
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

Expand Down
2 changes: 1 addition & 1 deletion esp32c3-hal/examples/blinky.rs
Original file line number Diff line number Diff line change
Expand Up @@ -33,7 +33,7 @@ fn main() -> ! {
let mut wdt1 = timer_group1.wdt;

rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

Expand Down
2 changes: 1 addition & 1 deletion esp32c3-hal/examples/gpio_interrupt.rs
Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,7 @@ fn main() -> ! {
let mut wdt1 = timer_group1.wdt;

rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

Expand Down
2 changes: 1 addition & 1 deletion esp32c3-hal/examples/hello_rgb.rs
Original file line number Diff line number Diff line change
Expand Up @@ -46,7 +46,7 @@ fn main() -> ! {

// Disable watchdogs
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();

// Configure RMT peripheral globally
Expand Down
2 changes: 1 addition & 1 deletion esp32c3-hal/examples/hello_world.rs
Original file line number Diff line number Diff line change
Expand Up @@ -34,7 +34,7 @@ fn main() -> ! {

// Disable watchdog timers
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

Expand Down
2 changes: 1 addition & 1 deletion esp32c3-hal/examples/i2c_display.rs
Original file line number Diff line number Diff line change
Expand Up @@ -48,7 +48,7 @@ fn main() -> ! {

// Disable watchdog timers
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

Expand Down
2 changes: 1 addition & 1 deletion esp32c3-hal/examples/read_efuse.rs
Original file line number Diff line number Diff line change
Expand Up @@ -33,7 +33,7 @@ fn main() -> ! {

// Disable watchdog timers
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

Expand Down
2 changes: 1 addition & 1 deletion esp32c3-hal/examples/serial_interrupts.rs
Original file line number Diff line number Diff line change
Expand Up @@ -41,7 +41,7 @@ fn main() -> ! {

// Disable watchdog timers
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

Expand Down
2 changes: 1 addition & 1 deletion esp32c3-hal/examples/spi_loopback.rs
Original file line number Diff line number Diff line change
Expand Up @@ -49,7 +49,7 @@ fn main() -> ! {
let mut serial0 = Serial::new(peripherals.UART0);

rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

Expand Down
2 changes: 1 addition & 1 deletion esp32c3-hal/examples/systimer.rs
Original file line number Diff line number Diff line change
Expand Up @@ -39,7 +39,7 @@ fn main() -> ! {
let mut wdt1 = timer_group1.wdt;

rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

Expand Down
2 changes: 1 addition & 1 deletion esp32c3-hal/examples/timer_interrupt.rs
Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,7 @@ fn main() -> ! {
let mut wdt1 = timer_group1.wdt;

rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

Expand Down
2 changes: 1 addition & 1 deletion esp32c3-hal/examples/usb_serial_jtag.rs
Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ fn main() -> ! {

// Disable watchdog timers
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

Expand Down
2 changes: 1 addition & 1 deletion esp32c3-hal/examples/watchdog.rs
Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ fn main() -> ! {

// Disable watchdog timers
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.start(2u64.secs());
wdt1.disable();

Expand Down
4 changes: 2 additions & 2 deletions esp32c3-hal/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -23,17 +23,17 @@ pub use esp_hal_common::{
Delay,
PulseControl,
Rng,
RtcCntl,
Serial,
UsbSerialJtag,
};
#[cfg(feature = "direct-boot")]
use riscv_rt::pre_init;

pub use self::{gpio::IO, rtc_cntl::RtcCntl};
pub use self::gpio::IO;

pub mod adc;
pub mod gpio;
pub mod rtc_cntl;

/// Common module for analog functions
pub mod analog {
Expand Down
49 changes: 0 additions & 49 deletions esp32c3-hal/src/rtc_cntl.rs

This file was deleted.