From 0165453dc903c12e2a8f458307e4801a37162d87 Mon Sep 17 00:00:00 2001 From: sethp Date: Mon, 22 May 2023 10:02:38 -0700 Subject: [PATCH] feat: place __INTERRUPTS vector in .trap.rodata (#119) * feat: place __INTERRUPTS vector in `.trap.rodata` This commit preemptively adopts the change proposed to [svd2rust] to expose the link section as a config parameter. [svd2rust]: https://github.com/rust-embedded/svd2rust/pull/718 * chore: update generated files via: ``` (cd xtask; cargo run -- --generate-only) ``` * fix: quiet rust-analyzer's noisy complaints Rust-analyzer's "all targets" default mode runs afoul of `#[no_std]` crates that don't have a test harness. This change tells cargo (and indirectly, rust-analyzer) that we have no expectation for that to work. The CI changes don't have any effect currently, since none of these crates have any `bin`s or `example`s, but it does check that the rust-analzyzer complaints won't crop back up in the future. * chore: point at post-merge-queue commit --- .github/workflows/ci.yml | 8 ++--- esp32/Cargo.toml | 4 +++ esp32/src/lib.rs | 2 +- esp32/src/sens/sar_dac_ctrl1.rs | 8 ++--- esp32/src/sens/sar_touch_ctrl1.rs | 8 ++--- esp32/src/sens/sar_touch_ctrl2.rs | 8 ++--- esp32/src/sens/sar_tsens_ctrl.rs | 8 ++--- esp32c2/Cargo.toml | 4 +++ esp32c2/src/gpio/func_out_sel_cfg.rs | 8 ++--- esp32c2/src/lib.rs | 3 +- esp32c3/Cargo.toml | 4 +++ esp32c3/src/gpio/func_out_sel_cfg.rs | 8 ++--- esp32c3/src/i2s0/rx_clkm_div_conf.rs | 32 ++++++++--------- esp32c3/src/i2s0/rx_conf.rs | 8 ++--- esp32c3/src/i2s0/tx_clkm_conf.rs | 8 ++--- esp32c3/src/i2s0/tx_clkm_div_conf.rs | 32 ++++++++--------- esp32c3/src/i2s0/tx_conf.rs | 8 ++--- esp32c3/src/lib.rs | 3 +- esp32c6/Cargo.toml | 4 +++ esp32c6/src/gpio/func_out_sel_cfg.rs | 8 ++--- esp32c6/src/hp_sys/cpu_peri_timeout_uid.rs | 4 +-- esp32c6/src/hp_sys/hp_peri_timeout_uid.rs | 4 +-- esp32c6/src/hp_sys/modem_peri_timeout_uid.rs | 4 +-- esp32c6/src/i2s0/rx_clkm_div_conf.rs | 32 ++++++++--------- esp32c6/src/i2s0/rx_conf.rs | 8 ++--- esp32c6/src/i2s0/tx_clkm_conf.rs | 8 ++--- esp32c6/src/i2s0/tx_clkm_div_conf.rs | 32 ++++++++--------- esp32c6/src/i2s0/tx_conf.rs | 8 ++--- esp32c6/src/lib.rs | 3 +- esp32c6/src/parl_io/rx_cfg0.rs | 8 ++--- esp32c6/src/pcr/i2s_rx_clkm_div_conf.rs | 32 ++++++++--------- esp32c6/src/pcr/i2s_tx_clkm_conf.rs | 8 ++--- esp32c6/src/pcr/i2s_tx_clkm_div_conf.rs | 32 ++++++++--------- esp32h2/Cargo.toml | 4 +++ esp32h2/src/gpio/func_out_sel_cfg.rs | 8 ++--- esp32h2/src/hp_sys/cpu_peri_timeout_uid.rs | 4 +-- esp32h2/src/hp_sys/hp_peri_timeout_uid.rs | 4 +-- esp32h2/src/i2s0/rx_clkm_div_conf.rs | 32 ++++++++--------- esp32h2/src/i2s0/rx_conf.rs | 8 ++--- esp32h2/src/i2s0/tx_clkm_conf.rs | 8 ++--- esp32h2/src/i2s0/tx_clkm_div_conf.rs | 32 ++++++++--------- esp32h2/src/i2s0/tx_conf.rs | 8 ++--- esp32h2/src/lib.rs | 3 +- esp32h2/src/parl_io/rx_mode_cfg.rs | 8 ++--- esp32h2/src/pcr/i2s_rx_clkm_div_conf.rs | 32 ++++++++--------- esp32h2/src/pcr/i2s_tx_clkm_conf.rs | 8 ++--- esp32h2/src/pcr/i2s_tx_clkm_div_conf.rs | 32 ++++++++--------- esp32s2/Cargo.toml | 4 +++ esp32s2/src/aes/block_mode.rs | 8 ++--- esp32s2/src/aes/endian.rs | 8 ++--- esp32s2/src/aes/mode.rs | 8 ++--- esp32s2/src/apb_saradc/thres_ctrl.rs | 16 ++++----- esp32s2/src/gpio/func_out_sel_cfg.rs | 8 ++--- esp32s2/src/lib.rs | 2 +- esp32s3/Cargo.toml | 4 +++ esp32s3/src/gpio/func_out_sel_cfg.rs | 8 ++--- esp32s3/src/i2s0/rx_clkm_div_conf.rs | 32 ++++++++--------- esp32s3/src/i2s0/rx_conf.rs | 8 ++--- esp32s3/src/i2s0/tx_clkm_conf.rs | 8 ++--- esp32s3/src/i2s0/tx_clkm_div_conf.rs | 32 ++++++++--------- esp32s3/src/i2s0/tx_conf.rs | 8 ++--- esp32s3/src/i2s1/rx_clkm_div_conf.rs | 32 ++++++++--------- esp32s3/src/i2s1/rx_conf.rs | 8 ++--- esp32s3/src/i2s1/tx_clkm_conf.rs | 8 ++--- esp32s3/src/i2s1/tx_clkm_div_conf.rs | 32 ++++++++--------- esp32s3/src/i2s1/tx_conf.rs | 8 ++--- esp32s3/src/lib.rs | 2 +- esp32s3/src/rtc_cntl/touch_ctrl2.rs | 8 ++--- esp32s3/src/sens/sar_tsens_ctrl.rs | 8 ++--- esp8266/Cargo.toml | 4 +++ esp8266/src/dport/ioswap.rs | 16 ++++----- esp8266/src/lib.rs | 3 +- esp8266/src/uart0.rs | 4 +-- esp8266/src/uart0/uart_int_st.rs | 2 +- esp8266/src/uart1.rs | 4 +-- esp8266/src/uart1/uart_int_st.rs | 2 +- xtask/Cargo.lock | 19 ++++++++-- xtask/Cargo.toml | 3 ++ xtask/src/main.rs | 38 ++++++++++++-------- 79 files changed, 484 insertions(+), 421 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 99f13f297a..fae0d91d94 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -42,7 +42,7 @@ jobs: - name: generate pac run: cargo run --manifest-path=xtask/Cargo.toml -- --generate-only ${{ matrix.chip }} - name: build pac - run: cd ${{ matrix.chip }} && cargo check + run: cd ${{ matrix.chip }} && cargo check --all-targets check-xtensa: runs-on: ubuntu-latest @@ -64,7 +64,7 @@ jobs: - name: generate pac run: cargo run --manifest-path=xtask/Cargo.toml -- --generate-only ${{ matrix.chip }} - name: build pac - run: cd ${{ matrix.chip }} && cargo check + run: cd ${{ matrix.chip }} && cargo check --all-targets # -------------------------------------------------------------------------- # MSRV @@ -92,7 +92,7 @@ jobs: - name: generate pac run: cargo +nightly run --manifest-path=xtask/Cargo.toml -- --generate-only ${{ matrix.chip }} - name: build pac - run: cd ${{ matrix.chip }} && cargo +1.65.0 check + run: cd ${{ matrix.chip }} && cargo +1.65.0 check --all-targets msrv-xtensa: runs-on: ubuntu-latest @@ -115,4 +115,4 @@ jobs: - name: generate pac run: cargo run --manifest-path=xtask/Cargo.toml -- --generate-only ${{ matrix.chip }} - name: build pac - run: cd ${{ matrix.chip }} && cargo check + run: cd ${{ matrix.chip }} && cargo check --all-targets diff --git a/esp32/Cargo.toml b/esp32/Cargo.toml index d0c23101f8..fa54ff049f 100644 --- a/esp32/Cargo.toml +++ b/esp32/Cargo.toml @@ -23,6 +23,10 @@ include = [ "device.x", ] +[lib] +bench = false +test = false + [dependencies] critical-section = { version = "1.1.1", optional = true } vcell = "0.1.3" diff --git a/esp32/src/lib.rs b/esp32/src/lib.rs index 0de7c9fc9b..9a949a2607 100644 --- a/esp32/src/lib.rs +++ b/esp32/src/lib.rs @@ -1,4 +1,4 @@ -#![doc = "Peripheral access API for ESP32 microcontrollers (generated using svd2rust v0.28.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.28.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] +#![doc = "Peripheral access API for ESP32 microcontrollers (generated using svd2rust v0.28.0 (e6a6d15 2023-05-19))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.28.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] #![deny(dead_code)] #![deny(improper_ctypes)] #![deny(missing_docs)] diff --git a/esp32/src/sens/sar_dac_ctrl1.rs b/esp32/src/sens/sar_dac_ctrl1.rs index 2742a1d109..cfb4df8621 100644 --- a/esp32/src/sens/sar_dac_ctrl1.rs +++ b/esp32/src/sens/sar_dac_ctrl1.rs @@ -48,9 +48,9 @@ pub type DEBUG_BIT_SEL_R = crate::FieldReader; #[doc = "Field `DEBUG_BIT_SEL` writer - "] pub type DEBUG_BIT_SEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SAR_DAC_CTRL1_SPEC, u8, u8, 5, O>; -#[doc = "Field `DAC_DIG_FORCE` reader - 1: DAC1 & DAC2 use DMA 0: DAC1 & DAC2 do not use DMA"] +#[doc = "Field `DAC_DIG_FORCE` reader - 1: DAC1 & DAC2 use DMA 0: DAC1 & DAC2 do not use DMA"] pub type DAC_DIG_FORCE_R = crate::BitReader; -#[doc = "Field `DAC_DIG_FORCE` writer - 1: DAC1 & DAC2 use DMA 0: DAC1 & DAC2 do not use DMA"] +#[doc = "Field `DAC_DIG_FORCE` writer - 1: DAC1 & DAC2 use DMA 0: DAC1 & DAC2 do not use DMA"] pub type DAC_DIG_FORCE_W<'a, const O: u8> = crate::BitWriter<'a, u32, SAR_DAC_CTRL1_SPEC, bool, O>; #[doc = "Field `DAC_CLK_FORCE_LOW` reader - 1: force PDAC_CLK to low"] pub type DAC_CLK_FORCE_LOW_R = crate::BitReader; @@ -82,7 +82,7 @@ impl R { pub fn debug_bit_sel(&self) -> DEBUG_BIT_SEL_R { DEBUG_BIT_SEL_R::new(((self.bits >> 17) & 0x1f) as u8) } - #[doc = "Bit 22 - 1: DAC1 & DAC2 use DMA 0: DAC1 & DAC2 do not use DMA"] + #[doc = "Bit 22 - 1: DAC1 & DAC2 use DMA 0: DAC1 & DAC2 do not use DMA"] #[inline(always)] pub fn dac_dig_force(&self) -> DAC_DIG_FORCE_R { DAC_DIG_FORCE_R::new(((self.bits >> 22) & 1) != 0) @@ -122,7 +122,7 @@ impl W { pub fn debug_bit_sel(&mut self) -> DEBUG_BIT_SEL_W<17> { DEBUG_BIT_SEL_W::new(self) } - #[doc = "Bit 22 - 1: DAC1 & DAC2 use DMA 0: DAC1 & DAC2 do not use DMA"] + #[doc = "Bit 22 - 1: DAC1 & DAC2 use DMA 0: DAC1 & DAC2 do not use DMA"] #[inline(always)] #[must_use] pub fn dac_dig_force(&mut self) -> DAC_DIG_FORCE_W<22> { diff --git a/esp32/src/sens/sar_touch_ctrl1.rs b/esp32/src/sens/sar_touch_ctrl1.rs index ebb4d3ed1d..fc783b075e 100644 --- a/esp32/src/sens/sar_touch_ctrl1.rs +++ b/esp32/src/sens/sar_touch_ctrl1.rs @@ -49,9 +49,9 @@ pub type TOUCH_OUT_SEL_R = crate::BitReader; #[doc = "Field `TOUCH_OUT_SEL` writer - 1: when the counter is greater then the threshold the touch pad is considered as \"touched\" 0: when the counter is less than the threshold the touch pad is considered as \"touched\""] pub type TOUCH_OUT_SEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, SAR_TOUCH_CTRL1_SPEC, bool, O>; -#[doc = "Field `TOUCH_OUT_1EN` reader - 1: wakeup interrupt is generated if SET1 is \"touched\" 0: wakeup interrupt is generated only if SET1 & SET2 is both \"touched\""] +#[doc = "Field `TOUCH_OUT_1EN` reader - 1: wakeup interrupt is generated if SET1 is \"touched\" 0: wakeup interrupt is generated only if SET1 & SET2 is both \"touched\""] pub type TOUCH_OUT_1EN_R = crate::BitReader; -#[doc = "Field `TOUCH_OUT_1EN` writer - 1: wakeup interrupt is generated if SET1 is \"touched\" 0: wakeup interrupt is generated only if SET1 & SET2 is both \"touched\""] +#[doc = "Field `TOUCH_OUT_1EN` writer - 1: wakeup interrupt is generated if SET1 is \"touched\" 0: wakeup interrupt is generated only if SET1 & SET2 is both \"touched\""] pub type TOUCH_OUT_1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SAR_TOUCH_CTRL1_SPEC, bool, O>; #[doc = "Field `XPD_HALL_FORCE` reader - 1: XPD HALL is controlled by SW. 0: XPD HALL is controlled by FSM in ULP-coprocessor"] @@ -80,7 +80,7 @@ impl R { pub fn touch_out_sel(&self) -> TOUCH_OUT_SEL_R { TOUCH_OUT_SEL_R::new(((self.bits >> 24) & 1) != 0) } - #[doc = "Bit 25 - 1: wakeup interrupt is generated if SET1 is \"touched\" 0: wakeup interrupt is generated only if SET1 & SET2 is both \"touched\""] + #[doc = "Bit 25 - 1: wakeup interrupt is generated if SET1 is \"touched\" 0: wakeup interrupt is generated only if SET1 & SET2 is both \"touched\""] #[inline(always)] pub fn touch_out_1en(&self) -> TOUCH_OUT_1EN_R { TOUCH_OUT_1EN_R::new(((self.bits >> 25) & 1) != 0) @@ -115,7 +115,7 @@ impl W { pub fn touch_out_sel(&mut self) -> TOUCH_OUT_SEL_W<24> { TOUCH_OUT_SEL_W::new(self) } - #[doc = "Bit 25 - 1: wakeup interrupt is generated if SET1 is \"touched\" 0: wakeup interrupt is generated only if SET1 & SET2 is both \"touched\""] + #[doc = "Bit 25 - 1: wakeup interrupt is generated if SET1 is \"touched\" 0: wakeup interrupt is generated only if SET1 & SET2 is both \"touched\""] #[inline(always)] #[must_use] pub fn touch_out_1en(&mut self) -> TOUCH_OUT_1EN_W<25> { diff --git a/esp32/src/sens/sar_touch_ctrl2.rs b/esp32/src/sens/sar_touch_ctrl2.rs index 69f7a794ce..3032cc6cc6 100644 --- a/esp32/src/sens/sar_touch_ctrl2.rs +++ b/esp32/src/sens/sar_touch_ctrl2.rs @@ -38,9 +38,9 @@ impl From> for W { pub type TOUCH_MEAS_EN_R = crate::FieldReader; #[doc = "Field `TOUCH_MEAS_DONE` reader - fsm set 1 to indicate touch touch meas is done"] pub type TOUCH_MEAS_DONE_R = crate::BitReader; -#[doc = "Field `TOUCH_START_FSM_EN` reader - 1: TOUCH_START & TOUCH_XPD is controlled by touch fsm 0: TOUCH_START & TOUCH_XPD is controlled by registers"] +#[doc = "Field `TOUCH_START_FSM_EN` reader - 1: TOUCH_START & TOUCH_XPD is controlled by touch fsm 0: TOUCH_START & TOUCH_XPD is controlled by registers"] pub type TOUCH_START_FSM_EN_R = crate::BitReader; -#[doc = "Field `TOUCH_START_FSM_EN` writer - 1: TOUCH_START & TOUCH_XPD is controlled by touch fsm 0: TOUCH_START & TOUCH_XPD is controlled by registers"] +#[doc = "Field `TOUCH_START_FSM_EN` writer - 1: TOUCH_START & TOUCH_XPD is controlled by touch fsm 0: TOUCH_START & TOUCH_XPD is controlled by registers"] pub type TOUCH_START_FSM_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, SAR_TOUCH_CTRL2_SPEC, bool, O>; #[doc = "Field `TOUCH_START_EN` reader - 1: start touch fsm valid when reg_touch_start_force is set"] @@ -72,7 +72,7 @@ impl R { pub fn touch_meas_done(&self) -> TOUCH_MEAS_DONE_R { TOUCH_MEAS_DONE_R::new(((self.bits >> 10) & 1) != 0) } - #[doc = "Bit 11 - 1: TOUCH_START & TOUCH_XPD is controlled by touch fsm 0: TOUCH_START & TOUCH_XPD is controlled by registers"] + #[doc = "Bit 11 - 1: TOUCH_START & TOUCH_XPD is controlled by touch fsm 0: TOUCH_START & TOUCH_XPD is controlled by registers"] #[inline(always)] pub fn touch_start_fsm_en(&self) -> TOUCH_START_FSM_EN_R { TOUCH_START_FSM_EN_R::new(((self.bits >> 11) & 1) != 0) @@ -94,7 +94,7 @@ impl R { } } impl W { - #[doc = "Bit 11 - 1: TOUCH_START & TOUCH_XPD is controlled by touch fsm 0: TOUCH_START & TOUCH_XPD is controlled by registers"] + #[doc = "Bit 11 - 1: TOUCH_START & TOUCH_XPD is controlled by touch fsm 0: TOUCH_START & TOUCH_XPD is controlled by registers"] #[inline(always)] #[must_use] pub fn touch_start_fsm_en(&mut self) -> TOUCH_START_FSM_EN_W<11> { diff --git a/esp32/src/sens/sar_tsens_ctrl.rs b/esp32/src/sens/sar_tsens_ctrl.rs index 3d6f02f562..54bf39a52b 100644 --- a/esp32/src/sens/sar_tsens_ctrl.rs +++ b/esp32/src/sens/sar_tsens_ctrl.rs @@ -67,9 +67,9 @@ pub type TSENS_POWER_UP_R = crate::BitReader; #[doc = "Field `TSENS_POWER_UP` writer - temperature sensor power up"] pub type TSENS_POWER_UP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SAR_TSENS_CTRL_SPEC, bool, O>; -#[doc = "Field `TSENS_POWER_UP_FORCE` reader - 1: dump out & power up controlled by SW 0: by FSM"] +#[doc = "Field `TSENS_POWER_UP_FORCE` reader - 1: dump out & power up controlled by SW 0: by FSM"] pub type TSENS_POWER_UP_FORCE_R = crate::BitReader; -#[doc = "Field `TSENS_POWER_UP_FORCE` writer - 1: dump out & power up controlled by SW 0: by FSM"] +#[doc = "Field `TSENS_POWER_UP_FORCE` writer - 1: dump out & power up controlled by SW 0: by FSM"] pub type TSENS_POWER_UP_FORCE_W<'a, const O: u8> = crate::BitWriter<'a, u32, SAR_TSENS_CTRL_SPEC, bool, O>; #[doc = "Field `TSENS_DUMP_OUT` reader - temperature sensor dump out only active when reg_tsens_power_up_force = 1"] @@ -113,7 +113,7 @@ impl R { pub fn tsens_power_up(&self) -> TSENS_POWER_UP_R { TSENS_POWER_UP_R::new(((self.bits >> 24) & 1) != 0) } - #[doc = "Bit 25 - 1: dump out & power up controlled by SW 0: by FSM"] + #[doc = "Bit 25 - 1: dump out & power up controlled by SW 0: by FSM"] #[inline(always)] pub fn tsens_power_up_force(&self) -> TSENS_POWER_UP_FORCE_R { TSENS_POWER_UP_FORCE_R::new(((self.bits >> 25) & 1) != 0) @@ -167,7 +167,7 @@ impl W { pub fn tsens_power_up(&mut self) -> TSENS_POWER_UP_W<24> { TSENS_POWER_UP_W::new(self) } - #[doc = "Bit 25 - 1: dump out & power up controlled by SW 0: by FSM"] + #[doc = "Bit 25 - 1: dump out & power up controlled by SW 0: by FSM"] #[inline(always)] #[must_use] pub fn tsens_power_up_force(&mut self) -> TSENS_POWER_UP_FORCE_W<25> { diff --git a/esp32c2/Cargo.toml b/esp32c2/Cargo.toml index fc44d1dfe1..a5135fc82e 100644 --- a/esp32c2/Cargo.toml +++ b/esp32c2/Cargo.toml @@ -23,6 +23,10 @@ include = [ "device.x" ] +[lib] +bench = false +test = false + [dependencies] critical-section = { version = "1.1.1", optional = true } vcell = "0.1.3" diff --git a/esp32c2/src/gpio/func_out_sel_cfg.rs b/esp32c2/src/gpio/func_out_sel_cfg.rs index 00b262f4de..c80c032983 100644 --- a/esp32c2/src/gpio/func_out_sel_cfg.rs +++ b/esp32c2/src/gpio/func_out_sel_cfg.rs @@ -34,9 +34,9 @@ impl From> for W { W(writer) } } -#[doc = "Field `OUT_SEL` reader - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] +#[doc = "Field `OUT_SEL` reader - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] pub type OUT_SEL_R = crate::FieldReader; -#[doc = "Field `OUT_SEL` writer - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] +#[doc = "Field `OUT_SEL` writer - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] pub type OUT_SEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, FUNC_OUT_SEL_CFG_SPEC, u8, u8, 8, O>; #[doc = "Field `INV_SEL` reader - set this bit to invert output signal.1:invert.0:not invert."] @@ -52,7 +52,7 @@ pub type OEN_INV_SEL_R = crate::BitReader; #[doc = "Field `OEN_INV_SEL` writer - set this bit to invert output enable signal.1:invert.0:not invert."] pub type OEN_INV_SEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, FUNC_OUT_SEL_CFG_SPEC, bool, O>; impl R { - #[doc = "Bits 0:7 - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] + #[doc = "Bits 0:7 - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] #[inline(always)] pub fn out_sel(&self) -> OUT_SEL_R { OUT_SEL_R::new((self.bits & 0xff) as u8) @@ -74,7 +74,7 @@ impl R { } } impl W { - #[doc = "Bits 0:7 - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] + #[doc = "Bits 0:7 - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] #[inline(always)] #[must_use] pub fn out_sel(&mut self) -> OUT_SEL_W<0> { diff --git a/esp32c2/src/lib.rs b/esp32c2/src/lib.rs index 5130e60f18..2b7db45dab 100644 --- a/esp32c2/src/lib.rs +++ b/esp32c2/src/lib.rs @@ -1,4 +1,4 @@ -#![doc = "Peripheral access API for ESP32-C2 microcontrollers (generated using svd2rust v0.28.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.28.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] +#![doc = "Peripheral access API for ESP32-C2 microcontrollers (generated using svd2rust v0.28.0 (e6a6d15 2023-05-19))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.28.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] #![deny(dead_code)] #![deny(improper_ctypes)] #![deny(missing_docs)] @@ -77,6 +77,7 @@ pub union Vector { } #[cfg(feature = "rt")] #[doc(hidden)] +#[link_section = ".trap.rodata"] #[no_mangle] pub static __EXTERNAL_INTERRUPTS: [Vector; 42] = [ Vector { _handler: WIFI_MAC }, diff --git a/esp32c3/Cargo.toml b/esp32c3/Cargo.toml index 9d038033bd..c97455c250 100644 --- a/esp32c3/Cargo.toml +++ b/esp32c3/Cargo.toml @@ -23,6 +23,10 @@ include = [ "device.x" ] +[lib] +bench = false +test = false + [dependencies] critical-section = { version = "1.1.1", optional = true } vcell = "0.1.3" diff --git a/esp32c3/src/gpio/func_out_sel_cfg.rs b/esp32c3/src/gpio/func_out_sel_cfg.rs index 00b262f4de..c80c032983 100644 --- a/esp32c3/src/gpio/func_out_sel_cfg.rs +++ b/esp32c3/src/gpio/func_out_sel_cfg.rs @@ -34,9 +34,9 @@ impl From> for W { W(writer) } } -#[doc = "Field `OUT_SEL` reader - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] +#[doc = "Field `OUT_SEL` reader - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] pub type OUT_SEL_R = crate::FieldReader; -#[doc = "Field `OUT_SEL` writer - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] +#[doc = "Field `OUT_SEL` writer - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] pub type OUT_SEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, FUNC_OUT_SEL_CFG_SPEC, u8, u8, 8, O>; #[doc = "Field `INV_SEL` reader - set this bit to invert output signal.1:invert.0:not invert."] @@ -52,7 +52,7 @@ pub type OEN_INV_SEL_R = crate::BitReader; #[doc = "Field `OEN_INV_SEL` writer - set this bit to invert output enable signal.1:invert.0:not invert."] pub type OEN_INV_SEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, FUNC_OUT_SEL_CFG_SPEC, bool, O>; impl R { - #[doc = "Bits 0:7 - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] + #[doc = "Bits 0:7 - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] #[inline(always)] pub fn out_sel(&self) -> OUT_SEL_R { OUT_SEL_R::new((self.bits & 0xff) as u8) @@ -74,7 +74,7 @@ impl R { } } impl W { - #[doc = "Bits 0:7 - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] + #[doc = "Bits 0:7 - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] #[inline(always)] #[must_use] pub fn out_sel(&mut self) -> OUT_SEL_W<0> { diff --git a/esp32c3/src/i2s0/rx_clkm_div_conf.rs b/esp32c3/src/i2s0/rx_clkm_div_conf.rs index 1ecd234883..2bd925a573 100644 --- a/esp32c3/src/i2s0/rx_clkm_div_conf.rs +++ b/esp32c3/src/i2s0/rx_clkm_div_conf.rs @@ -34,68 +34,68 @@ impl From> for W { W(writer) } } -#[doc = "Field `RX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `RX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] pub type RX_CLKM_DIV_Z_R = crate::FieldReader; -#[doc = "Field `RX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `RX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] pub type RX_CLKM_DIV_Z_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `RX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `RX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] pub type RX_CLKM_DIV_Y_R = crate::FieldReader; -#[doc = "Field `RX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `RX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] pub type RX_CLKM_DIV_Y_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `RX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `RX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type RX_CLKM_DIV_X_R = crate::FieldReader; -#[doc = "Field `RX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `RX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type RX_CLKM_DIV_X_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `RX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `RX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] pub type RX_CLKM_DIV_YN1_R = crate::BitReader; -#[doc = "Field `RX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `RX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] pub type RX_CLKM_DIV_YN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, RX_CLKM_DIV_CONF_SPEC, bool, O>; impl R { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] #[inline(always)] pub fn rx_clkm_div_z(&self) -> RX_CLKM_DIV_Z_R { RX_CLKM_DIV_Z_R::new((self.bits & 0x01ff) as u16) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] pub fn rx_clkm_div_y(&self) -> RX_CLKM_DIV_Y_R { RX_CLKM_DIV_Y_R::new(((self.bits >> 9) & 0x01ff) as u16) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] pub fn rx_clkm_div_x(&self) -> RX_CLKM_DIV_X_R { RX_CLKM_DIV_X_R::new(((self.bits >> 18) & 0x01ff) as u16) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] #[inline(always)] pub fn rx_clkm_div_yn1(&self) -> RX_CLKM_DIV_YN1_R { RX_CLKM_DIV_YN1_R::new(((self.bits >> 27) & 1) != 0) } } impl W { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] #[inline(always)] #[must_use] pub fn rx_clkm_div_z(&mut self) -> RX_CLKM_DIV_Z_W<0> { RX_CLKM_DIV_Z_W::new(self) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] #[must_use] pub fn rx_clkm_div_y(&mut self) -> RX_CLKM_DIV_Y_W<9> { RX_CLKM_DIV_Y_W::new(self) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] #[must_use] pub fn rx_clkm_div_x(&mut self) -> RX_CLKM_DIV_X_W<18> { RX_CLKM_DIV_X_W::new(self) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] #[inline(always)] #[must_use] pub fn rx_clkm_div_yn1(&mut self) -> RX_CLKM_DIV_YN1_W<27> { diff --git a/esp32c3/src/i2s0/rx_conf.rs b/esp32c3/src/i2s0/rx_conf.rs index 3ff2604d3b..f5312d6c00 100644 --- a/esp32c3/src/i2s0/rx_conf.rs +++ b/esp32c3/src/i2s0/rx_conf.rs @@ -62,9 +62,9 @@ pub type RX_UPDATE_W<'a, const O: u8> = crate::BitWriter<'a, u32, RX_CONF_SPEC, pub type RX_MONO_FST_VLD_R = crate::BitReader; #[doc = "Field `RX_MONO_FST_VLD` writer - 1: The first channel data value is valid in I2S RX mono mode. 0: The second channel data value is valid in I2S RX mono mode."] pub type RX_MONO_FST_VLD_W<'a, const O: u8> = crate::BitWriter<'a, u32, RX_CONF_SPEC, bool, O>; -#[doc = "Field `RX_PCM_CONF` reader - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] +#[doc = "Field `RX_PCM_CONF` reader - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] pub type RX_PCM_CONF_R = crate::FieldReader; -#[doc = "Field `RX_PCM_CONF` writer - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] +#[doc = "Field `RX_PCM_CONF` writer - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] pub type RX_PCM_CONF_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RX_CONF_SPEC, u8, u8, 2, O>; #[doc = "Field `RX_PCM_BYPASS` reader - Set this bit to bypass Compress/Decompress module for received data."] pub type RX_PCM_BYPASS_R = crate::BitReader; @@ -129,7 +129,7 @@ impl R { pub fn rx_mono_fst_vld(&self) -> RX_MONO_FST_VLD_R { RX_MONO_FST_VLD_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bits 10:11 - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] + #[doc = "Bits 10:11 - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] #[inline(always)] pub fn rx_pcm_conf(&self) -> RX_PCM_CONF_R { RX_PCM_CONF_R::new(((self.bits >> 10) & 3) as u8) @@ -224,7 +224,7 @@ impl W { pub fn rx_mono_fst_vld(&mut self) -> RX_MONO_FST_VLD_W<9> { RX_MONO_FST_VLD_W::new(self) } - #[doc = "Bits 10:11 - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] + #[doc = "Bits 10:11 - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] #[inline(always)] #[must_use] pub fn rx_pcm_conf(&mut self) -> RX_PCM_CONF_W<10> { diff --git a/esp32c3/src/i2s0/tx_clkm_conf.rs b/esp32c3/src/i2s0/tx_clkm_conf.rs index 5e7f2e6402..dc3cad40c4 100644 --- a/esp32c3/src/i2s0/tx_clkm_conf.rs +++ b/esp32c3/src/i2s0/tx_clkm_conf.rs @@ -34,9 +34,9 @@ impl From> for W { W(writer) } } -#[doc = "Field `TX_CLKM_DIV_NUM` reader - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] +#[doc = "Field `TX_CLKM_DIV_NUM` reader - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] pub type TX_CLKM_DIV_NUM_R = crate::FieldReader; -#[doc = "Field `TX_CLKM_DIV_NUM` writer - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] +#[doc = "Field `TX_CLKM_DIV_NUM` writer - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] pub type TX_CLKM_DIV_NUM_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CLKM_CONF_SPEC, u8, u8, 8, O>; #[doc = "Field `TX_CLK_ACTIVE` reader - I2S Tx module clock enable signal."] @@ -53,7 +53,7 @@ pub type CLK_EN_R = crate::BitReader; #[doc = "Field `CLK_EN` writer - Set this bit to enable clk gate"] pub type CLK_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TX_CLKM_CONF_SPEC, bool, O>; impl R { - #[doc = "Bits 0:7 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] + #[doc = "Bits 0:7 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] #[inline(always)] pub fn tx_clkm_div_num(&self) -> TX_CLKM_DIV_NUM_R { TX_CLKM_DIV_NUM_R::new((self.bits & 0xff) as u8) @@ -75,7 +75,7 @@ impl R { } } impl W { - #[doc = "Bits 0:7 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] + #[doc = "Bits 0:7 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] #[inline(always)] #[must_use] pub fn tx_clkm_div_num(&mut self) -> TX_CLKM_DIV_NUM_W<0> { diff --git a/esp32c3/src/i2s0/tx_clkm_div_conf.rs b/esp32c3/src/i2s0/tx_clkm_div_conf.rs index bde1d90ac9..e675169a93 100644 --- a/esp32c3/src/i2s0/tx_clkm_div_conf.rs +++ b/esp32c3/src/i2s0/tx_clkm_div_conf.rs @@ -34,68 +34,68 @@ impl From> for W { W(writer) } } -#[doc = "Field `TX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `TX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] pub type TX_CLKM_DIV_Z_R = crate::FieldReader; -#[doc = "Field `TX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `TX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] pub type TX_CLKM_DIV_Z_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `TX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `TX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] pub type TX_CLKM_DIV_Y_R = crate::FieldReader; -#[doc = "Field `TX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `TX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] pub type TX_CLKM_DIV_Y_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `TX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `TX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type TX_CLKM_DIV_X_R = crate::FieldReader; -#[doc = "Field `TX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `TX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type TX_CLKM_DIV_X_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `TX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `TX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] pub type TX_CLKM_DIV_YN1_R = crate::BitReader; -#[doc = "Field `TX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `TX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] pub type TX_CLKM_DIV_YN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, TX_CLKM_DIV_CONF_SPEC, bool, O>; impl R { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] #[inline(always)] pub fn tx_clkm_div_z(&self) -> TX_CLKM_DIV_Z_R { TX_CLKM_DIV_Z_R::new((self.bits & 0x01ff) as u16) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] pub fn tx_clkm_div_y(&self) -> TX_CLKM_DIV_Y_R { TX_CLKM_DIV_Y_R::new(((self.bits >> 9) & 0x01ff) as u16) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] pub fn tx_clkm_div_x(&self) -> TX_CLKM_DIV_X_R { TX_CLKM_DIV_X_R::new(((self.bits >> 18) & 0x01ff) as u16) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] #[inline(always)] pub fn tx_clkm_div_yn1(&self) -> TX_CLKM_DIV_YN1_R { TX_CLKM_DIV_YN1_R::new(((self.bits >> 27) & 1) != 0) } } impl W { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] #[inline(always)] #[must_use] pub fn tx_clkm_div_z(&mut self) -> TX_CLKM_DIV_Z_W<0> { TX_CLKM_DIV_Z_W::new(self) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] #[must_use] pub fn tx_clkm_div_y(&mut self) -> TX_CLKM_DIV_Y_W<9> { TX_CLKM_DIV_Y_W::new(self) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] #[must_use] pub fn tx_clkm_div_x(&mut self) -> TX_CLKM_DIV_X_W<18> { TX_CLKM_DIV_X_W::new(self) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] #[inline(always)] #[must_use] pub fn tx_clkm_div_yn1(&mut self) -> TX_CLKM_DIV_YN1_W<27> { diff --git a/esp32c3/src/i2s0/tx_conf.rs b/esp32c3/src/i2s0/tx_conf.rs index 673c5f9c41..64c00b1b2a 100644 --- a/esp32c3/src/i2s0/tx_conf.rs +++ b/esp32c3/src/i2s0/tx_conf.rs @@ -66,9 +66,9 @@ pub type TX_UPDATE_W<'a, const O: u8> = crate::BitWriter<'a, u32, TX_CONF_SPEC, pub type TX_MONO_FST_VLD_R = crate::BitReader; #[doc = "Field `TX_MONO_FST_VLD` writer - 1: The first channel data value is valid in I2S TX mono mode. 0: The second channel data value is valid in I2S TX mono mode."] pub type TX_MONO_FST_VLD_W<'a, const O: u8> = crate::BitWriter<'a, u32, TX_CONF_SPEC, bool, O>; -#[doc = "Field `TX_PCM_CONF` reader - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] +#[doc = "Field `TX_PCM_CONF` reader - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] pub type TX_PCM_CONF_R = crate::FieldReader; -#[doc = "Field `TX_PCM_CONF` writer - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] +#[doc = "Field `TX_PCM_CONF` writer - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] pub type TX_PCM_CONF_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CONF_SPEC, u8, u8, 2, O>; #[doc = "Field `TX_PCM_BYPASS` reader - Set this bit to bypass Compress/Decompress module for transmitted data."] pub type TX_PCM_BYPASS_R = crate::BitReader; @@ -146,7 +146,7 @@ impl R { pub fn tx_mono_fst_vld(&self) -> TX_MONO_FST_VLD_R { TX_MONO_FST_VLD_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bits 10:11 - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] + #[doc = "Bits 10:11 - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] #[inline(always)] pub fn tx_pcm_conf(&self) -> TX_PCM_CONF_R { TX_PCM_CONF_R::new(((self.bits >> 10) & 3) as u8) @@ -257,7 +257,7 @@ impl W { pub fn tx_mono_fst_vld(&mut self) -> TX_MONO_FST_VLD_W<9> { TX_MONO_FST_VLD_W::new(self) } - #[doc = "Bits 10:11 - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] + #[doc = "Bits 10:11 - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] #[inline(always)] #[must_use] pub fn tx_pcm_conf(&mut self) -> TX_PCM_CONF_W<10> { diff --git a/esp32c3/src/lib.rs b/esp32c3/src/lib.rs index c0304a1cdf..6d2d274bcb 100644 --- a/esp32c3/src/lib.rs +++ b/esp32c3/src/lib.rs @@ -1,4 +1,4 @@ -#![doc = "Peripheral access API for ESP32-C3 microcontrollers (generated using svd2rust v0.28.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.28.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] +#![doc = "Peripheral access API for ESP32-C3 microcontrollers (generated using svd2rust v0.28.0 (e6a6d15 2023-05-19))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.28.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] #![deny(dead_code)] #![deny(improper_ctypes)] #![deny(missing_docs)] @@ -97,6 +97,7 @@ pub union Vector { } #[cfg(feature = "rt")] #[doc(hidden)] +#[link_section = ".trap.rodata"] #[no_mangle] pub static __EXTERNAL_INTERRUPTS: [Vector; 62] = [ Vector { _handler: WIFI_MAC }, diff --git a/esp32c6/Cargo.toml b/esp32c6/Cargo.toml index e290c1cc77..318ee2fa6b 100644 --- a/esp32c6/Cargo.toml +++ b/esp32c6/Cargo.toml @@ -23,6 +23,10 @@ include = [ "device.x" ] +[lib] +bench = false +test = false + [dependencies] critical-section = { version = "1.1.1", optional = true } vcell = "0.1.3" diff --git a/esp32c6/src/gpio/func_out_sel_cfg.rs b/esp32c6/src/gpio/func_out_sel_cfg.rs index 63a181fe49..732ef75a65 100644 --- a/esp32c6/src/gpio/func_out_sel_cfg.rs +++ b/esp32c6/src/gpio/func_out_sel_cfg.rs @@ -34,9 +34,9 @@ impl From> for W { W(writer) } } -#[doc = "Field `OUT_SEL` reader - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-127: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=128: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] +#[doc = "Field `OUT_SEL` reader - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-127: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=128: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] pub type OUT_SEL_R = crate::FieldReader; -#[doc = "Field `OUT_SEL` writer - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-127: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=128: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] +#[doc = "Field `OUT_SEL` writer - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-127: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=128: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] pub type OUT_SEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, FUNC_OUT_SEL_CFG_SPEC, u8, u8, 8, O>; #[doc = "Field `INV_SEL` reader - set this bit to invert output signal.1:invert.0:not invert."] @@ -52,7 +52,7 @@ pub type OEN_INV_SEL_R = crate::BitReader; #[doc = "Field `OEN_INV_SEL` writer - set this bit to invert output enable signal.1:invert.0:not invert."] pub type OEN_INV_SEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, FUNC_OUT_SEL_CFG_SPEC, bool, O>; impl R { - #[doc = "Bits 0:7 - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-127: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=128: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] + #[doc = "Bits 0:7 - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-127: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=128: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] #[inline(always)] pub fn out_sel(&self) -> OUT_SEL_R { OUT_SEL_R::new((self.bits & 0xff) as u8) @@ -74,7 +74,7 @@ impl R { } } impl W { - #[doc = "Bits 0:7 - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-127: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=128: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] + #[doc = "Bits 0:7 - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-127: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=128: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] #[inline(always)] #[must_use] pub fn out_sel(&mut self) -> OUT_SEL_W<0> { diff --git a/esp32c6/src/hp_sys/cpu_peri_timeout_uid.rs b/esp32c6/src/hp_sys/cpu_peri_timeout_uid.rs index 6d19c0f297..41738f55e4 100644 --- a/esp32c6/src/hp_sys/cpu_peri_timeout_uid.rs +++ b/esp32c6/src/hp_sys/cpu_peri_timeout_uid.rs @@ -13,10 +13,10 @@ impl From> for R { R(reader) } } -#[doc = "Field `CPU_PERI_TIMEOUT_UID` reader - Record master id\\[4:0\\] & master permission\\[6:5\\] when trigger timeout. This register will be cleared after the interrupt is cleared."] +#[doc = "Field `CPU_PERI_TIMEOUT_UID` reader - Record master id\\[4:0\\] & master permission\\[6:5\\] when trigger timeout. This register will be cleared after the interrupt is cleared."] pub type CPU_PERI_TIMEOUT_UID_R = crate::FieldReader; impl R { - #[doc = "Bits 0:6 - Record master id\\[4:0\\] & master permission\\[6:5\\] when trigger timeout. This register will be cleared after the interrupt is cleared."] + #[doc = "Bits 0:6 - Record master id\\[4:0\\] & master permission\\[6:5\\] when trigger timeout. This register will be cleared after the interrupt is cleared."] #[inline(always)] pub fn cpu_peri_timeout_uid(&self) -> CPU_PERI_TIMEOUT_UID_R { CPU_PERI_TIMEOUT_UID_R::new((self.bits & 0x7f) as u8) diff --git a/esp32c6/src/hp_sys/hp_peri_timeout_uid.rs b/esp32c6/src/hp_sys/hp_peri_timeout_uid.rs index 6c47c98562..b3258d0d26 100644 --- a/esp32c6/src/hp_sys/hp_peri_timeout_uid.rs +++ b/esp32c6/src/hp_sys/hp_peri_timeout_uid.rs @@ -13,10 +13,10 @@ impl From> for R { R(reader) } } -#[doc = "Field `HP_PERI_TIMEOUT_UID` reader - Record master id\\[4:0\\] & master permission\\[6:5\\] when trigger timeout. This register will be cleared after the interrupt is cleared."] +#[doc = "Field `HP_PERI_TIMEOUT_UID` reader - Record master id\\[4:0\\] & master permission\\[6:5\\] when trigger timeout. This register will be cleared after the interrupt is cleared."] pub type HP_PERI_TIMEOUT_UID_R = crate::FieldReader; impl R { - #[doc = "Bits 0:6 - Record master id\\[4:0\\] & master permission\\[6:5\\] when trigger timeout. This register will be cleared after the interrupt is cleared."] + #[doc = "Bits 0:6 - Record master id\\[4:0\\] & master permission\\[6:5\\] when trigger timeout. This register will be cleared after the interrupt is cleared."] #[inline(always)] pub fn hp_peri_timeout_uid(&self) -> HP_PERI_TIMEOUT_UID_R { HP_PERI_TIMEOUT_UID_R::new((self.bits & 0x7f) as u8) diff --git a/esp32c6/src/hp_sys/modem_peri_timeout_uid.rs b/esp32c6/src/hp_sys/modem_peri_timeout_uid.rs index d8d4bcc7b5..18de27df4c 100644 --- a/esp32c6/src/hp_sys/modem_peri_timeout_uid.rs +++ b/esp32c6/src/hp_sys/modem_peri_timeout_uid.rs @@ -13,10 +13,10 @@ impl From> for R { R(reader) } } -#[doc = "Field `MODEM_PERI_TIMEOUT_UID` reader - Record master id\\[4:0\\] & master permission\\[6:5\\] when trigger timeout. This register will be cleared after the interrupt is cleared."] +#[doc = "Field `MODEM_PERI_TIMEOUT_UID` reader - Record master id\\[4:0\\] & master permission\\[6:5\\] when trigger timeout. This register will be cleared after the interrupt is cleared."] pub type MODEM_PERI_TIMEOUT_UID_R = crate::FieldReader; impl R { - #[doc = "Bits 0:6 - Record master id\\[4:0\\] & master permission\\[6:5\\] when trigger timeout. This register will be cleared after the interrupt is cleared."] + #[doc = "Bits 0:6 - Record master id\\[4:0\\] & master permission\\[6:5\\] when trigger timeout. This register will be cleared after the interrupt is cleared."] #[inline(always)] pub fn modem_peri_timeout_uid(&self) -> MODEM_PERI_TIMEOUT_UID_R { MODEM_PERI_TIMEOUT_UID_R::new((self.bits & 0x7f) as u8) diff --git a/esp32c6/src/i2s0/rx_clkm_div_conf.rs b/esp32c6/src/i2s0/rx_clkm_div_conf.rs index 1ecd234883..2bd925a573 100644 --- a/esp32c6/src/i2s0/rx_clkm_div_conf.rs +++ b/esp32c6/src/i2s0/rx_clkm_div_conf.rs @@ -34,68 +34,68 @@ impl From> for W { W(writer) } } -#[doc = "Field `RX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `RX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] pub type RX_CLKM_DIV_Z_R = crate::FieldReader; -#[doc = "Field `RX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `RX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] pub type RX_CLKM_DIV_Z_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `RX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `RX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] pub type RX_CLKM_DIV_Y_R = crate::FieldReader; -#[doc = "Field `RX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `RX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] pub type RX_CLKM_DIV_Y_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `RX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `RX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type RX_CLKM_DIV_X_R = crate::FieldReader; -#[doc = "Field `RX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `RX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type RX_CLKM_DIV_X_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `RX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `RX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] pub type RX_CLKM_DIV_YN1_R = crate::BitReader; -#[doc = "Field `RX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `RX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] pub type RX_CLKM_DIV_YN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, RX_CLKM_DIV_CONF_SPEC, bool, O>; impl R { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] #[inline(always)] pub fn rx_clkm_div_z(&self) -> RX_CLKM_DIV_Z_R { RX_CLKM_DIV_Z_R::new((self.bits & 0x01ff) as u16) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] pub fn rx_clkm_div_y(&self) -> RX_CLKM_DIV_Y_R { RX_CLKM_DIV_Y_R::new(((self.bits >> 9) & 0x01ff) as u16) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] pub fn rx_clkm_div_x(&self) -> RX_CLKM_DIV_X_R { RX_CLKM_DIV_X_R::new(((self.bits >> 18) & 0x01ff) as u16) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] #[inline(always)] pub fn rx_clkm_div_yn1(&self) -> RX_CLKM_DIV_YN1_R { RX_CLKM_DIV_YN1_R::new(((self.bits >> 27) & 1) != 0) } } impl W { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] #[inline(always)] #[must_use] pub fn rx_clkm_div_z(&mut self) -> RX_CLKM_DIV_Z_W<0> { RX_CLKM_DIV_Z_W::new(self) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] #[must_use] pub fn rx_clkm_div_y(&mut self) -> RX_CLKM_DIV_Y_W<9> { RX_CLKM_DIV_Y_W::new(self) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] #[must_use] pub fn rx_clkm_div_x(&mut self) -> RX_CLKM_DIV_X_W<18> { RX_CLKM_DIV_X_W::new(self) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] #[inline(always)] #[must_use] pub fn rx_clkm_div_yn1(&mut self) -> RX_CLKM_DIV_YN1_W<27> { diff --git a/esp32c6/src/i2s0/rx_conf.rs b/esp32c6/src/i2s0/rx_conf.rs index 3ff2604d3b..f5312d6c00 100644 --- a/esp32c6/src/i2s0/rx_conf.rs +++ b/esp32c6/src/i2s0/rx_conf.rs @@ -62,9 +62,9 @@ pub type RX_UPDATE_W<'a, const O: u8> = crate::BitWriter<'a, u32, RX_CONF_SPEC, pub type RX_MONO_FST_VLD_R = crate::BitReader; #[doc = "Field `RX_MONO_FST_VLD` writer - 1: The first channel data value is valid in I2S RX mono mode. 0: The second channel data value is valid in I2S RX mono mode."] pub type RX_MONO_FST_VLD_W<'a, const O: u8> = crate::BitWriter<'a, u32, RX_CONF_SPEC, bool, O>; -#[doc = "Field `RX_PCM_CONF` reader - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] +#[doc = "Field `RX_PCM_CONF` reader - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] pub type RX_PCM_CONF_R = crate::FieldReader; -#[doc = "Field `RX_PCM_CONF` writer - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] +#[doc = "Field `RX_PCM_CONF` writer - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] pub type RX_PCM_CONF_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RX_CONF_SPEC, u8, u8, 2, O>; #[doc = "Field `RX_PCM_BYPASS` reader - Set this bit to bypass Compress/Decompress module for received data."] pub type RX_PCM_BYPASS_R = crate::BitReader; @@ -129,7 +129,7 @@ impl R { pub fn rx_mono_fst_vld(&self) -> RX_MONO_FST_VLD_R { RX_MONO_FST_VLD_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bits 10:11 - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] + #[doc = "Bits 10:11 - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] #[inline(always)] pub fn rx_pcm_conf(&self) -> RX_PCM_CONF_R { RX_PCM_CONF_R::new(((self.bits >> 10) & 3) as u8) @@ -224,7 +224,7 @@ impl W { pub fn rx_mono_fst_vld(&mut self) -> RX_MONO_FST_VLD_W<9> { RX_MONO_FST_VLD_W::new(self) } - #[doc = "Bits 10:11 - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] + #[doc = "Bits 10:11 - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] #[inline(always)] #[must_use] pub fn rx_pcm_conf(&mut self) -> RX_PCM_CONF_W<10> { diff --git a/esp32c6/src/i2s0/tx_clkm_conf.rs b/esp32c6/src/i2s0/tx_clkm_conf.rs index 5e7f2e6402..dc3cad40c4 100644 --- a/esp32c6/src/i2s0/tx_clkm_conf.rs +++ b/esp32c6/src/i2s0/tx_clkm_conf.rs @@ -34,9 +34,9 @@ impl From> for W { W(writer) } } -#[doc = "Field `TX_CLKM_DIV_NUM` reader - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] +#[doc = "Field `TX_CLKM_DIV_NUM` reader - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] pub type TX_CLKM_DIV_NUM_R = crate::FieldReader; -#[doc = "Field `TX_CLKM_DIV_NUM` writer - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] +#[doc = "Field `TX_CLKM_DIV_NUM` writer - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] pub type TX_CLKM_DIV_NUM_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CLKM_CONF_SPEC, u8, u8, 8, O>; #[doc = "Field `TX_CLK_ACTIVE` reader - I2S Tx module clock enable signal."] @@ -53,7 +53,7 @@ pub type CLK_EN_R = crate::BitReader; #[doc = "Field `CLK_EN` writer - Set this bit to enable clk gate"] pub type CLK_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TX_CLKM_CONF_SPEC, bool, O>; impl R { - #[doc = "Bits 0:7 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] + #[doc = "Bits 0:7 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] #[inline(always)] pub fn tx_clkm_div_num(&self) -> TX_CLKM_DIV_NUM_R { TX_CLKM_DIV_NUM_R::new((self.bits & 0xff) as u8) @@ -75,7 +75,7 @@ impl R { } } impl W { - #[doc = "Bits 0:7 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] + #[doc = "Bits 0:7 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] #[inline(always)] #[must_use] pub fn tx_clkm_div_num(&mut self) -> TX_CLKM_DIV_NUM_W<0> { diff --git a/esp32c6/src/i2s0/tx_clkm_div_conf.rs b/esp32c6/src/i2s0/tx_clkm_div_conf.rs index bde1d90ac9..e675169a93 100644 --- a/esp32c6/src/i2s0/tx_clkm_div_conf.rs +++ b/esp32c6/src/i2s0/tx_clkm_div_conf.rs @@ -34,68 +34,68 @@ impl From> for W { W(writer) } } -#[doc = "Field `TX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `TX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] pub type TX_CLKM_DIV_Z_R = crate::FieldReader; -#[doc = "Field `TX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `TX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] pub type TX_CLKM_DIV_Z_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `TX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `TX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] pub type TX_CLKM_DIV_Y_R = crate::FieldReader; -#[doc = "Field `TX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `TX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] pub type TX_CLKM_DIV_Y_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `TX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `TX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type TX_CLKM_DIV_X_R = crate::FieldReader; -#[doc = "Field `TX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `TX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type TX_CLKM_DIV_X_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `TX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `TX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] pub type TX_CLKM_DIV_YN1_R = crate::BitReader; -#[doc = "Field `TX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `TX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] pub type TX_CLKM_DIV_YN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, TX_CLKM_DIV_CONF_SPEC, bool, O>; impl R { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] #[inline(always)] pub fn tx_clkm_div_z(&self) -> TX_CLKM_DIV_Z_R { TX_CLKM_DIV_Z_R::new((self.bits & 0x01ff) as u16) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] pub fn tx_clkm_div_y(&self) -> TX_CLKM_DIV_Y_R { TX_CLKM_DIV_Y_R::new(((self.bits >> 9) & 0x01ff) as u16) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] pub fn tx_clkm_div_x(&self) -> TX_CLKM_DIV_X_R { TX_CLKM_DIV_X_R::new(((self.bits >> 18) & 0x01ff) as u16) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] #[inline(always)] pub fn tx_clkm_div_yn1(&self) -> TX_CLKM_DIV_YN1_R { TX_CLKM_DIV_YN1_R::new(((self.bits >> 27) & 1) != 0) } } impl W { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] #[inline(always)] #[must_use] pub fn tx_clkm_div_z(&mut self) -> TX_CLKM_DIV_Z_W<0> { TX_CLKM_DIV_Z_W::new(self) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] #[must_use] pub fn tx_clkm_div_y(&mut self) -> TX_CLKM_DIV_Y_W<9> { TX_CLKM_DIV_Y_W::new(self) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] #[must_use] pub fn tx_clkm_div_x(&mut self) -> TX_CLKM_DIV_X_W<18> { TX_CLKM_DIV_X_W::new(self) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] #[inline(always)] #[must_use] pub fn tx_clkm_div_yn1(&mut self) -> TX_CLKM_DIV_YN1_W<27> { diff --git a/esp32c6/src/i2s0/tx_conf.rs b/esp32c6/src/i2s0/tx_conf.rs index 673c5f9c41..64c00b1b2a 100644 --- a/esp32c6/src/i2s0/tx_conf.rs +++ b/esp32c6/src/i2s0/tx_conf.rs @@ -66,9 +66,9 @@ pub type TX_UPDATE_W<'a, const O: u8> = crate::BitWriter<'a, u32, TX_CONF_SPEC, pub type TX_MONO_FST_VLD_R = crate::BitReader; #[doc = "Field `TX_MONO_FST_VLD` writer - 1: The first channel data value is valid in I2S TX mono mode. 0: The second channel data value is valid in I2S TX mono mode."] pub type TX_MONO_FST_VLD_W<'a, const O: u8> = crate::BitWriter<'a, u32, TX_CONF_SPEC, bool, O>; -#[doc = "Field `TX_PCM_CONF` reader - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] +#[doc = "Field `TX_PCM_CONF` reader - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] pub type TX_PCM_CONF_R = crate::FieldReader; -#[doc = "Field `TX_PCM_CONF` writer - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] +#[doc = "Field `TX_PCM_CONF` writer - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] pub type TX_PCM_CONF_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CONF_SPEC, u8, u8, 2, O>; #[doc = "Field `TX_PCM_BYPASS` reader - Set this bit to bypass Compress/Decompress module for transmitted data."] pub type TX_PCM_BYPASS_R = crate::BitReader; @@ -146,7 +146,7 @@ impl R { pub fn tx_mono_fst_vld(&self) -> TX_MONO_FST_VLD_R { TX_MONO_FST_VLD_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bits 10:11 - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] + #[doc = "Bits 10:11 - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] #[inline(always)] pub fn tx_pcm_conf(&self) -> TX_PCM_CONF_R { TX_PCM_CONF_R::new(((self.bits >> 10) & 3) as u8) @@ -257,7 +257,7 @@ impl W { pub fn tx_mono_fst_vld(&mut self) -> TX_MONO_FST_VLD_W<9> { TX_MONO_FST_VLD_W::new(self) } - #[doc = "Bits 10:11 - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] + #[doc = "Bits 10:11 - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] #[inline(always)] #[must_use] pub fn tx_pcm_conf(&mut self) -> TX_PCM_CONF_W<10> { diff --git a/esp32c6/src/lib.rs b/esp32c6/src/lib.rs index f313d0fb81..9b6ef7900f 100644 --- a/esp32c6/src/lib.rs +++ b/esp32c6/src/lib.rs @@ -1,4 +1,4 @@ -#![doc = "Peripheral access API for ESP32-C6 microcontrollers (generated using svd2rust v0.28.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.28.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] +#![doc = "Peripheral access API for ESP32-C6 microcontrollers (generated using svd2rust v0.28.0 (e6a6d15 2023-05-19))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.28.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] #![deny(dead_code)] #![deny(improper_ctypes)] #![deny(missing_docs)] @@ -112,6 +112,7 @@ pub union Vector { } #[cfg(feature = "rt")] #[doc(hidden)] +#[link_section = ".trap.rodata"] #[no_mangle] pub static __EXTERNAL_INTERRUPTS: [Vector; 77] = [ Vector { _handler: WIFI_MAC }, diff --git a/esp32c6/src/parl_io/rx_cfg0.rs b/esp32c6/src/parl_io/rx_cfg0.rs index 98f825e669..78ae6d7851 100644 --- a/esp32c6/src/parl_io/rx_cfg0.rs +++ b/esp32c6/src/parl_io/rx_cfg0.rs @@ -51,9 +51,9 @@ pub type RX_DATA_BYTELEN_W<'a, const O: u8> = pub type RX_SW_EN_R = crate::BitReader; #[doc = "Field `RX_SW_EN` writer - Write 1 to enable software data sampling."] pub type RX_SW_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, RX_CFG0_SPEC, bool, O>; -#[doc = "Field `RX_PULSE_SUBMODE_SEL` reader - Pulse submode selection. 0000: positive pulse start(data bit included) && positive pulse end(data bit included) 0001: positive pulse start(data bit included) && positive pulse end (data bit excluded) 0010: positive pulse start(data bit excluded) && positive pulse end (data bit included) 0011: positive pulse start(data bit excluded) && positive pulse end (data bit excluded) 0100: positive pulse start(data bit included) && length end 0101: positive pulse start(data bit excluded) && length end 0110: negative pulse start(data bit included) && negative pulse end(data bit included) 0111: negative pulse start(data bit included) && negative pulse end (data bit excluded) 1000: negative pulse start(data bit excluded) && negative pulse end (data bit included) 1001: negative pulse start(data bit excluded) && negative pulse end (data bit excluded) 1010: negative pulse start(data bit included) && length end 1011: negative pulse start(data bit excluded) && length end"] +#[doc = "Field `RX_PULSE_SUBMODE_SEL` reader - Pulse submode selection. 0000: positive pulse start(data bit included) && positive pulse end(data bit included) 0001: positive pulse start(data bit included) && positive pulse end (data bit excluded) 0010: positive pulse start(data bit excluded) && positive pulse end (data bit included) 0011: positive pulse start(data bit excluded) && positive pulse end (data bit excluded) 0100: positive pulse start(data bit included) && length end 0101: positive pulse start(data bit excluded) && length end 0110: negative pulse start(data bit included) && negative pulse end(data bit included) 0111: negative pulse start(data bit included) && negative pulse end (data bit excluded) 1000: negative pulse start(data bit excluded) && negative pulse end (data bit included) 1001: negative pulse start(data bit excluded) && negative pulse end (data bit excluded) 1010: negative pulse start(data bit included) && length end 1011: negative pulse start(data bit excluded) && length end"] pub type RX_PULSE_SUBMODE_SEL_R = crate::FieldReader; -#[doc = "Field `RX_PULSE_SUBMODE_SEL` writer - Pulse submode selection. 0000: positive pulse start(data bit included) && positive pulse end(data bit included) 0001: positive pulse start(data bit included) && positive pulse end (data bit excluded) 0010: positive pulse start(data bit excluded) && positive pulse end (data bit included) 0011: positive pulse start(data bit excluded) && positive pulse end (data bit excluded) 0100: positive pulse start(data bit included) && length end 0101: positive pulse start(data bit excluded) && length end 0110: negative pulse start(data bit included) && negative pulse end(data bit included) 0111: negative pulse start(data bit included) && negative pulse end (data bit excluded) 1000: negative pulse start(data bit excluded) && negative pulse end (data bit included) 1001: negative pulse start(data bit excluded) && negative pulse end (data bit excluded) 1010: negative pulse start(data bit included) && length end 1011: negative pulse start(data bit excluded) && length end"] +#[doc = "Field `RX_PULSE_SUBMODE_SEL` writer - Pulse submode selection. 0000: positive pulse start(data bit included) && positive pulse end(data bit included) 0001: positive pulse start(data bit included) && positive pulse end (data bit excluded) 0010: positive pulse start(data bit excluded) && positive pulse end (data bit included) 0011: positive pulse start(data bit excluded) && positive pulse end (data bit excluded) 0100: positive pulse start(data bit included) && length end 0101: positive pulse start(data bit excluded) && length end 0110: negative pulse start(data bit included) && negative pulse end(data bit included) 0111: negative pulse start(data bit included) && negative pulse end (data bit excluded) 1000: negative pulse start(data bit excluded) && negative pulse end (data bit included) 1001: negative pulse start(data bit excluded) && negative pulse end (data bit excluded) 1010: negative pulse start(data bit included) && length end 1011: negative pulse start(data bit excluded) && length end"] pub type RX_PULSE_SUBMODE_SEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RX_CFG0_SPEC, u8, u8, 4, O>; #[doc = "Field `RX_LEVEL_SUBMODE_SEL` reader - Write 0 to sample data at high level of external enable signal. Write 1 to sample data at low level of external enable signal."] @@ -103,7 +103,7 @@ impl R { pub fn rx_sw_en(&self) -> RX_SW_EN_R { RX_SW_EN_R::new(((self.bits >> 18) & 1) != 0) } - #[doc = "Bits 19:22 - Pulse submode selection. 0000: positive pulse start(data bit included) && positive pulse end(data bit included) 0001: positive pulse start(data bit included) && positive pulse end (data bit excluded) 0010: positive pulse start(data bit excluded) && positive pulse end (data bit included) 0011: positive pulse start(data bit excluded) && positive pulse end (data bit excluded) 0100: positive pulse start(data bit included) && length end 0101: positive pulse start(data bit excluded) && length end 0110: negative pulse start(data bit included) && negative pulse end(data bit included) 0111: negative pulse start(data bit included) && negative pulse end (data bit excluded) 1000: negative pulse start(data bit excluded) && negative pulse end (data bit included) 1001: negative pulse start(data bit excluded) && negative pulse end (data bit excluded) 1010: negative pulse start(data bit included) && length end 1011: negative pulse start(data bit excluded) && length end"] + #[doc = "Bits 19:22 - Pulse submode selection. 0000: positive pulse start(data bit included) && positive pulse end(data bit included) 0001: positive pulse start(data bit included) && positive pulse end (data bit excluded) 0010: positive pulse start(data bit excluded) && positive pulse end (data bit included) 0011: positive pulse start(data bit excluded) && positive pulse end (data bit excluded) 0100: positive pulse start(data bit included) && length end 0101: positive pulse start(data bit excluded) && length end 0110: negative pulse start(data bit included) && negative pulse end(data bit included) 0111: negative pulse start(data bit included) && negative pulse end (data bit excluded) 1000: negative pulse start(data bit excluded) && negative pulse end (data bit included) 1001: negative pulse start(data bit excluded) && negative pulse end (data bit excluded) 1010: negative pulse start(data bit included) && length end 1011: negative pulse start(data bit excluded) && length end"] #[inline(always)] pub fn rx_pulse_submode_sel(&self) -> RX_PULSE_SUBMODE_SEL_R { RX_PULSE_SUBMODE_SEL_R::new(((self.bits >> 19) & 0x0f) as u8) @@ -164,7 +164,7 @@ impl W { pub fn rx_sw_en(&mut self) -> RX_SW_EN_W<18> { RX_SW_EN_W::new(self) } - #[doc = "Bits 19:22 - Pulse submode selection. 0000: positive pulse start(data bit included) && positive pulse end(data bit included) 0001: positive pulse start(data bit included) && positive pulse end (data bit excluded) 0010: positive pulse start(data bit excluded) && positive pulse end (data bit included) 0011: positive pulse start(data bit excluded) && positive pulse end (data bit excluded) 0100: positive pulse start(data bit included) && length end 0101: positive pulse start(data bit excluded) && length end 0110: negative pulse start(data bit included) && negative pulse end(data bit included) 0111: negative pulse start(data bit included) && negative pulse end (data bit excluded) 1000: negative pulse start(data bit excluded) && negative pulse end (data bit included) 1001: negative pulse start(data bit excluded) && negative pulse end (data bit excluded) 1010: negative pulse start(data bit included) && length end 1011: negative pulse start(data bit excluded) && length end"] + #[doc = "Bits 19:22 - Pulse submode selection. 0000: positive pulse start(data bit included) && positive pulse end(data bit included) 0001: positive pulse start(data bit included) && positive pulse end (data bit excluded) 0010: positive pulse start(data bit excluded) && positive pulse end (data bit included) 0011: positive pulse start(data bit excluded) && positive pulse end (data bit excluded) 0100: positive pulse start(data bit included) && length end 0101: positive pulse start(data bit excluded) && length end 0110: negative pulse start(data bit included) && negative pulse end(data bit included) 0111: negative pulse start(data bit included) && negative pulse end (data bit excluded) 1000: negative pulse start(data bit excluded) && negative pulse end (data bit included) 1001: negative pulse start(data bit excluded) && negative pulse end (data bit excluded) 1010: negative pulse start(data bit included) && length end 1011: negative pulse start(data bit excluded) && length end"] #[inline(always)] #[must_use] pub fn rx_pulse_submode_sel(&mut self) -> RX_PULSE_SUBMODE_SEL_W<19> { diff --git a/esp32c6/src/pcr/i2s_rx_clkm_div_conf.rs b/esp32c6/src/pcr/i2s_rx_clkm_div_conf.rs index c8dd16927d..023603cfcc 100644 --- a/esp32c6/src/pcr/i2s_rx_clkm_div_conf.rs +++ b/esp32c6/src/pcr/i2s_rx_clkm_div_conf.rs @@ -34,68 +34,68 @@ impl From> for W { W(writer) } } -#[doc = "Field `I2S_RX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `I2S_RX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] pub type I2S_RX_CLKM_DIV_Z_R = crate::FieldReader; -#[doc = "Field `I2S_RX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `I2S_RX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] pub type I2S_RX_CLKM_DIV_Z_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2S_RX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `I2S_RX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `I2S_RX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] pub type I2S_RX_CLKM_DIV_Y_R = crate::FieldReader; -#[doc = "Field `I2S_RX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `I2S_RX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] pub type I2S_RX_CLKM_DIV_Y_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2S_RX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `I2S_RX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `I2S_RX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type I2S_RX_CLKM_DIV_X_R = crate::FieldReader; -#[doc = "Field `I2S_RX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `I2S_RX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type I2S_RX_CLKM_DIV_X_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2S_RX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `I2S_RX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `I2S_RX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] pub type I2S_RX_CLKM_DIV_YN1_R = crate::BitReader; -#[doc = "Field `I2S_RX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `I2S_RX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] pub type I2S_RX_CLKM_DIV_YN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2S_RX_CLKM_DIV_CONF_SPEC, bool, O>; impl R { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] #[inline(always)] pub fn i2s_rx_clkm_div_z(&self) -> I2S_RX_CLKM_DIV_Z_R { I2S_RX_CLKM_DIV_Z_R::new((self.bits & 0x01ff) as u16) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] pub fn i2s_rx_clkm_div_y(&self) -> I2S_RX_CLKM_DIV_Y_R { I2S_RX_CLKM_DIV_Y_R::new(((self.bits >> 9) & 0x01ff) as u16) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] pub fn i2s_rx_clkm_div_x(&self) -> I2S_RX_CLKM_DIV_X_R { I2S_RX_CLKM_DIV_X_R::new(((self.bits >> 18) & 0x01ff) as u16) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] #[inline(always)] pub fn i2s_rx_clkm_div_yn1(&self) -> I2S_RX_CLKM_DIV_YN1_R { I2S_RX_CLKM_DIV_YN1_R::new(((self.bits >> 27) & 1) != 0) } } impl W { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] #[inline(always)] #[must_use] pub fn i2s_rx_clkm_div_z(&mut self) -> I2S_RX_CLKM_DIV_Z_W<0> { I2S_RX_CLKM_DIV_Z_W::new(self) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] #[must_use] pub fn i2s_rx_clkm_div_y(&mut self) -> I2S_RX_CLKM_DIV_Y_W<9> { I2S_RX_CLKM_DIV_Y_W::new(self) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] #[must_use] pub fn i2s_rx_clkm_div_x(&mut self) -> I2S_RX_CLKM_DIV_X_W<18> { I2S_RX_CLKM_DIV_X_W::new(self) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] #[inline(always)] #[must_use] pub fn i2s_rx_clkm_div_yn1(&mut self) -> I2S_RX_CLKM_DIV_YN1_W<27> { diff --git a/esp32c6/src/pcr/i2s_tx_clkm_conf.rs b/esp32c6/src/pcr/i2s_tx_clkm_conf.rs index 9a292b0730..08fd36d18f 100644 --- a/esp32c6/src/pcr/i2s_tx_clkm_conf.rs +++ b/esp32c6/src/pcr/i2s_tx_clkm_conf.rs @@ -34,9 +34,9 @@ impl From> for W { W(writer) } } -#[doc = "Field `I2S_TX_CLKM_DIV_NUM` reader - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] +#[doc = "Field `I2S_TX_CLKM_DIV_NUM` reader - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] pub type I2S_TX_CLKM_DIV_NUM_R = crate::FieldReader; -#[doc = "Field `I2S_TX_CLKM_DIV_NUM` writer - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] +#[doc = "Field `I2S_TX_CLKM_DIV_NUM` writer - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] pub type I2S_TX_CLKM_DIV_NUM_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2S_TX_CLKM_CONF_SPEC, u8, u8, 8, O>; #[doc = "Field `I2S_TX_CLKM_SEL` reader - Select I2S Tx module source clock. 0: XTAL clock. 1: APLL. 2: CLK160. 3: I2S_MCLK_in."] @@ -50,7 +50,7 @@ pub type I2S_TX_CLKM_EN_R = crate::BitReader; pub type I2S_TX_CLKM_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2S_TX_CLKM_CONF_SPEC, bool, O>; impl R { - #[doc = "Bits 12:19 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] + #[doc = "Bits 12:19 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] #[inline(always)] pub fn i2s_tx_clkm_div_num(&self) -> I2S_TX_CLKM_DIV_NUM_R { I2S_TX_CLKM_DIV_NUM_R::new(((self.bits >> 12) & 0xff) as u8) @@ -67,7 +67,7 @@ impl R { } } impl W { - #[doc = "Bits 12:19 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] + #[doc = "Bits 12:19 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] #[inline(always)] #[must_use] pub fn i2s_tx_clkm_div_num(&mut self) -> I2S_TX_CLKM_DIV_NUM_W<12> { diff --git a/esp32c6/src/pcr/i2s_tx_clkm_div_conf.rs b/esp32c6/src/pcr/i2s_tx_clkm_div_conf.rs index 5eded224a0..cf4ff4fbbb 100644 --- a/esp32c6/src/pcr/i2s_tx_clkm_div_conf.rs +++ b/esp32c6/src/pcr/i2s_tx_clkm_div_conf.rs @@ -34,68 +34,68 @@ impl From> for W { W(writer) } } -#[doc = "Field `I2S_TX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `I2S_TX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] pub type I2S_TX_CLKM_DIV_Z_R = crate::FieldReader; -#[doc = "Field `I2S_TX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `I2S_TX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] pub type I2S_TX_CLKM_DIV_Z_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2S_TX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `I2S_TX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `I2S_TX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] pub type I2S_TX_CLKM_DIV_Y_R = crate::FieldReader; -#[doc = "Field `I2S_TX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `I2S_TX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] pub type I2S_TX_CLKM_DIV_Y_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2S_TX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `I2S_TX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `I2S_TX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type I2S_TX_CLKM_DIV_X_R = crate::FieldReader; -#[doc = "Field `I2S_TX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `I2S_TX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type I2S_TX_CLKM_DIV_X_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2S_TX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `I2S_TX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `I2S_TX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] pub type I2S_TX_CLKM_DIV_YN1_R = crate::BitReader; -#[doc = "Field `I2S_TX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `I2S_TX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] pub type I2S_TX_CLKM_DIV_YN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2S_TX_CLKM_DIV_CONF_SPEC, bool, O>; impl R { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] #[inline(always)] pub fn i2s_tx_clkm_div_z(&self) -> I2S_TX_CLKM_DIV_Z_R { I2S_TX_CLKM_DIV_Z_R::new((self.bits & 0x01ff) as u16) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] pub fn i2s_tx_clkm_div_y(&self) -> I2S_TX_CLKM_DIV_Y_R { I2S_TX_CLKM_DIV_Y_R::new(((self.bits >> 9) & 0x01ff) as u16) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] pub fn i2s_tx_clkm_div_x(&self) -> I2S_TX_CLKM_DIV_X_R { I2S_TX_CLKM_DIV_X_R::new(((self.bits >> 18) & 0x01ff) as u16) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] #[inline(always)] pub fn i2s_tx_clkm_div_yn1(&self) -> I2S_TX_CLKM_DIV_YN1_R { I2S_TX_CLKM_DIV_YN1_R::new(((self.bits >> 27) & 1) != 0) } } impl W { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] #[inline(always)] #[must_use] pub fn i2s_tx_clkm_div_z(&mut self) -> I2S_TX_CLKM_DIV_Z_W<0> { I2S_TX_CLKM_DIV_Z_W::new(self) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] #[must_use] pub fn i2s_tx_clkm_div_y(&mut self) -> I2S_TX_CLKM_DIV_Y_W<9> { I2S_TX_CLKM_DIV_Y_W::new(self) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] #[must_use] pub fn i2s_tx_clkm_div_x(&mut self) -> I2S_TX_CLKM_DIV_X_W<18> { I2S_TX_CLKM_DIV_X_W::new(self) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] #[inline(always)] #[must_use] pub fn i2s_tx_clkm_div_yn1(&mut self) -> I2S_TX_CLKM_DIV_YN1_W<27> { diff --git a/esp32h2/Cargo.toml b/esp32h2/Cargo.toml index a71e134e73..759f47bb1d 100644 --- a/esp32h2/Cargo.toml +++ b/esp32h2/Cargo.toml @@ -23,6 +23,10 @@ include = [ "device.x" ] +[lib] +bench = false +test = false + [dependencies] critical-section = { version = "1.1.1", optional = true } vcell = "0.1.3" diff --git a/esp32h2/src/gpio/func_out_sel_cfg.rs b/esp32h2/src/gpio/func_out_sel_cfg.rs index 63a181fe49..732ef75a65 100644 --- a/esp32h2/src/gpio/func_out_sel_cfg.rs +++ b/esp32h2/src/gpio/func_out_sel_cfg.rs @@ -34,9 +34,9 @@ impl From> for W { W(writer) } } -#[doc = "Field `OUT_SEL` reader - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-127: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=128: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] +#[doc = "Field `OUT_SEL` reader - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-127: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=128: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] pub type OUT_SEL_R = crate::FieldReader; -#[doc = "Field `OUT_SEL` writer - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-127: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=128: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] +#[doc = "Field `OUT_SEL` writer - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-127: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=128: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] pub type OUT_SEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, FUNC_OUT_SEL_CFG_SPEC, u8, u8, 8, O>; #[doc = "Field `INV_SEL` reader - set this bit to invert output signal.1:invert.0:not invert."] @@ -52,7 +52,7 @@ pub type OEN_INV_SEL_R = crate::BitReader; #[doc = "Field `OEN_INV_SEL` writer - set this bit to invert output enable signal.1:invert.0:not invert."] pub type OEN_INV_SEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, FUNC_OUT_SEL_CFG_SPEC, bool, O>; impl R { - #[doc = "Bits 0:7 - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-127: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=128: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] + #[doc = "Bits 0:7 - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-127: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=128: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] #[inline(always)] pub fn out_sel(&self) -> OUT_SEL_R { OUT_SEL_R::new((self.bits & 0xff) as u8) @@ -74,7 +74,7 @@ impl R { } } impl W { - #[doc = "Bits 0:7 - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-127: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=128: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] + #[doc = "Bits 0:7 - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-127: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=128: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] #[inline(always)] #[must_use] pub fn out_sel(&mut self) -> OUT_SEL_W<0> { diff --git a/esp32h2/src/hp_sys/cpu_peri_timeout_uid.rs b/esp32h2/src/hp_sys/cpu_peri_timeout_uid.rs index 6d19c0f297..41738f55e4 100644 --- a/esp32h2/src/hp_sys/cpu_peri_timeout_uid.rs +++ b/esp32h2/src/hp_sys/cpu_peri_timeout_uid.rs @@ -13,10 +13,10 @@ impl From> for R { R(reader) } } -#[doc = "Field `CPU_PERI_TIMEOUT_UID` reader - Record master id\\[4:0\\] & master permission\\[6:5\\] when trigger timeout. This register will be cleared after the interrupt is cleared."] +#[doc = "Field `CPU_PERI_TIMEOUT_UID` reader - Record master id\\[4:0\\] & master permission\\[6:5\\] when trigger timeout. This register will be cleared after the interrupt is cleared."] pub type CPU_PERI_TIMEOUT_UID_R = crate::FieldReader; impl R { - #[doc = "Bits 0:6 - Record master id\\[4:0\\] & master permission\\[6:5\\] when trigger timeout. This register will be cleared after the interrupt is cleared."] + #[doc = "Bits 0:6 - Record master id\\[4:0\\] & master permission\\[6:5\\] when trigger timeout. This register will be cleared after the interrupt is cleared."] #[inline(always)] pub fn cpu_peri_timeout_uid(&self) -> CPU_PERI_TIMEOUT_UID_R { CPU_PERI_TIMEOUT_UID_R::new((self.bits & 0x7f) as u8) diff --git a/esp32h2/src/hp_sys/hp_peri_timeout_uid.rs b/esp32h2/src/hp_sys/hp_peri_timeout_uid.rs index 6c47c98562..b3258d0d26 100644 --- a/esp32h2/src/hp_sys/hp_peri_timeout_uid.rs +++ b/esp32h2/src/hp_sys/hp_peri_timeout_uid.rs @@ -13,10 +13,10 @@ impl From> for R { R(reader) } } -#[doc = "Field `HP_PERI_TIMEOUT_UID` reader - Record master id\\[4:0\\] & master permission\\[6:5\\] when trigger timeout. This register will be cleared after the interrupt is cleared."] +#[doc = "Field `HP_PERI_TIMEOUT_UID` reader - Record master id\\[4:0\\] & master permission\\[6:5\\] when trigger timeout. This register will be cleared after the interrupt is cleared."] pub type HP_PERI_TIMEOUT_UID_R = crate::FieldReader; impl R { - #[doc = "Bits 0:6 - Record master id\\[4:0\\] & master permission\\[6:5\\] when trigger timeout. This register will be cleared after the interrupt is cleared."] + #[doc = "Bits 0:6 - Record master id\\[4:0\\] & master permission\\[6:5\\] when trigger timeout. This register will be cleared after the interrupt is cleared."] #[inline(always)] pub fn hp_peri_timeout_uid(&self) -> HP_PERI_TIMEOUT_UID_R { HP_PERI_TIMEOUT_UID_R::new((self.bits & 0x7f) as u8) diff --git a/esp32h2/src/i2s0/rx_clkm_div_conf.rs b/esp32h2/src/i2s0/rx_clkm_div_conf.rs index 1ecd234883..2bd925a573 100644 --- a/esp32h2/src/i2s0/rx_clkm_div_conf.rs +++ b/esp32h2/src/i2s0/rx_clkm_div_conf.rs @@ -34,68 +34,68 @@ impl From> for W { W(writer) } } -#[doc = "Field `RX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `RX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] pub type RX_CLKM_DIV_Z_R = crate::FieldReader; -#[doc = "Field `RX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `RX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] pub type RX_CLKM_DIV_Z_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `RX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `RX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] pub type RX_CLKM_DIV_Y_R = crate::FieldReader; -#[doc = "Field `RX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `RX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] pub type RX_CLKM_DIV_Y_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `RX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `RX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type RX_CLKM_DIV_X_R = crate::FieldReader; -#[doc = "Field `RX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `RX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type RX_CLKM_DIV_X_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `RX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `RX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] pub type RX_CLKM_DIV_YN1_R = crate::BitReader; -#[doc = "Field `RX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `RX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] pub type RX_CLKM_DIV_YN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, RX_CLKM_DIV_CONF_SPEC, bool, O>; impl R { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] #[inline(always)] pub fn rx_clkm_div_z(&self) -> RX_CLKM_DIV_Z_R { RX_CLKM_DIV_Z_R::new((self.bits & 0x01ff) as u16) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] pub fn rx_clkm_div_y(&self) -> RX_CLKM_DIV_Y_R { RX_CLKM_DIV_Y_R::new(((self.bits >> 9) & 0x01ff) as u16) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] pub fn rx_clkm_div_x(&self) -> RX_CLKM_DIV_X_R { RX_CLKM_DIV_X_R::new(((self.bits >> 18) & 0x01ff) as u16) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] #[inline(always)] pub fn rx_clkm_div_yn1(&self) -> RX_CLKM_DIV_YN1_R { RX_CLKM_DIV_YN1_R::new(((self.bits >> 27) & 1) != 0) } } impl W { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] #[inline(always)] #[must_use] pub fn rx_clkm_div_z(&mut self) -> RX_CLKM_DIV_Z_W<0> { RX_CLKM_DIV_Z_W::new(self) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] #[must_use] pub fn rx_clkm_div_y(&mut self) -> RX_CLKM_DIV_Y_W<9> { RX_CLKM_DIV_Y_W::new(self) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] #[must_use] pub fn rx_clkm_div_x(&mut self) -> RX_CLKM_DIV_X_W<18> { RX_CLKM_DIV_X_W::new(self) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] #[inline(always)] #[must_use] pub fn rx_clkm_div_yn1(&mut self) -> RX_CLKM_DIV_YN1_W<27> { diff --git a/esp32h2/src/i2s0/rx_conf.rs b/esp32h2/src/i2s0/rx_conf.rs index b53ecb89a4..af63fd4871 100644 --- a/esp32h2/src/i2s0/rx_conf.rs +++ b/esp32h2/src/i2s0/rx_conf.rs @@ -66,9 +66,9 @@ pub type RX_UPDATE_W<'a, const O: u8> = crate::BitWriter<'a, u32, RX_CONF_SPEC, pub type RX_MONO_FST_VLD_R = crate::BitReader; #[doc = "Field `RX_MONO_FST_VLD` writer - 1: The first channel data value is valid in I2S RX mono mode. 0: The second channel data value is valid in I2S RX mono mode."] pub type RX_MONO_FST_VLD_W<'a, const O: u8> = crate::BitWriter<'a, u32, RX_CONF_SPEC, bool, O>; -#[doc = "Field `RX_PCM_CONF` reader - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] +#[doc = "Field `RX_PCM_CONF` reader - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] pub type RX_PCM_CONF_R = crate::FieldReader; -#[doc = "Field `RX_PCM_CONF` writer - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] +#[doc = "Field `RX_PCM_CONF` writer - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] pub type RX_PCM_CONF_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RX_CONF_SPEC, u8, u8, 2, O>; #[doc = "Field `RX_PCM_BYPASS` reader - Set this bit to bypass Compress/Decompress module for received data."] pub type RX_PCM_BYPASS_R = crate::BitReader; @@ -143,7 +143,7 @@ impl R { pub fn rx_mono_fst_vld(&self) -> RX_MONO_FST_VLD_R { RX_MONO_FST_VLD_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bits 10:11 - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] + #[doc = "Bits 10:11 - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] #[inline(always)] pub fn rx_pcm_conf(&self) -> RX_PCM_CONF_R { RX_PCM_CONF_R::new(((self.bits >> 10) & 3) as u8) @@ -249,7 +249,7 @@ impl W { pub fn rx_mono_fst_vld(&mut self) -> RX_MONO_FST_VLD_W<9> { RX_MONO_FST_VLD_W::new(self) } - #[doc = "Bits 10:11 - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] + #[doc = "Bits 10:11 - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] #[inline(always)] #[must_use] pub fn rx_pcm_conf(&mut self) -> RX_PCM_CONF_W<10> { diff --git a/esp32h2/src/i2s0/tx_clkm_conf.rs b/esp32h2/src/i2s0/tx_clkm_conf.rs index 5e7f2e6402..dc3cad40c4 100644 --- a/esp32h2/src/i2s0/tx_clkm_conf.rs +++ b/esp32h2/src/i2s0/tx_clkm_conf.rs @@ -34,9 +34,9 @@ impl From> for W { W(writer) } } -#[doc = "Field `TX_CLKM_DIV_NUM` reader - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] +#[doc = "Field `TX_CLKM_DIV_NUM` reader - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] pub type TX_CLKM_DIV_NUM_R = crate::FieldReader; -#[doc = "Field `TX_CLKM_DIV_NUM` writer - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] +#[doc = "Field `TX_CLKM_DIV_NUM` writer - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] pub type TX_CLKM_DIV_NUM_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CLKM_CONF_SPEC, u8, u8, 8, O>; #[doc = "Field `TX_CLK_ACTIVE` reader - I2S Tx module clock enable signal."] @@ -53,7 +53,7 @@ pub type CLK_EN_R = crate::BitReader; #[doc = "Field `CLK_EN` writer - Set this bit to enable clk gate"] pub type CLK_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TX_CLKM_CONF_SPEC, bool, O>; impl R { - #[doc = "Bits 0:7 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] + #[doc = "Bits 0:7 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] #[inline(always)] pub fn tx_clkm_div_num(&self) -> TX_CLKM_DIV_NUM_R { TX_CLKM_DIV_NUM_R::new((self.bits & 0xff) as u8) @@ -75,7 +75,7 @@ impl R { } } impl W { - #[doc = "Bits 0:7 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] + #[doc = "Bits 0:7 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] #[inline(always)] #[must_use] pub fn tx_clkm_div_num(&mut self) -> TX_CLKM_DIV_NUM_W<0> { diff --git a/esp32h2/src/i2s0/tx_clkm_div_conf.rs b/esp32h2/src/i2s0/tx_clkm_div_conf.rs index bde1d90ac9..e675169a93 100644 --- a/esp32h2/src/i2s0/tx_clkm_div_conf.rs +++ b/esp32h2/src/i2s0/tx_clkm_div_conf.rs @@ -34,68 +34,68 @@ impl From> for W { W(writer) } } -#[doc = "Field `TX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `TX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] pub type TX_CLKM_DIV_Z_R = crate::FieldReader; -#[doc = "Field `TX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `TX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] pub type TX_CLKM_DIV_Z_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `TX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `TX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] pub type TX_CLKM_DIV_Y_R = crate::FieldReader; -#[doc = "Field `TX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `TX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] pub type TX_CLKM_DIV_Y_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `TX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `TX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type TX_CLKM_DIV_X_R = crate::FieldReader; -#[doc = "Field `TX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `TX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type TX_CLKM_DIV_X_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `TX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `TX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] pub type TX_CLKM_DIV_YN1_R = crate::BitReader; -#[doc = "Field `TX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `TX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] pub type TX_CLKM_DIV_YN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, TX_CLKM_DIV_CONF_SPEC, bool, O>; impl R { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] #[inline(always)] pub fn tx_clkm_div_z(&self) -> TX_CLKM_DIV_Z_R { TX_CLKM_DIV_Z_R::new((self.bits & 0x01ff) as u16) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] pub fn tx_clkm_div_y(&self) -> TX_CLKM_DIV_Y_R { TX_CLKM_DIV_Y_R::new(((self.bits >> 9) & 0x01ff) as u16) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] pub fn tx_clkm_div_x(&self) -> TX_CLKM_DIV_X_R { TX_CLKM_DIV_X_R::new(((self.bits >> 18) & 0x01ff) as u16) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] #[inline(always)] pub fn tx_clkm_div_yn1(&self) -> TX_CLKM_DIV_YN1_R { TX_CLKM_DIV_YN1_R::new(((self.bits >> 27) & 1) != 0) } } impl W { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] #[inline(always)] #[must_use] pub fn tx_clkm_div_z(&mut self) -> TX_CLKM_DIV_Z_W<0> { TX_CLKM_DIV_Z_W::new(self) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] #[must_use] pub fn tx_clkm_div_y(&mut self) -> TX_CLKM_DIV_Y_W<9> { TX_CLKM_DIV_Y_W::new(self) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] #[must_use] pub fn tx_clkm_div_x(&mut self) -> TX_CLKM_DIV_X_W<18> { TX_CLKM_DIV_X_W::new(self) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] #[inline(always)] #[must_use] pub fn tx_clkm_div_yn1(&mut self) -> TX_CLKM_DIV_YN1_W<27> { diff --git a/esp32h2/src/i2s0/tx_conf.rs b/esp32h2/src/i2s0/tx_conf.rs index 7374c0df81..777c12ad9c 100644 --- a/esp32h2/src/i2s0/tx_conf.rs +++ b/esp32h2/src/i2s0/tx_conf.rs @@ -70,9 +70,9 @@ pub type TX_UPDATE_W<'a, const O: u8> = crate::BitWriter<'a, u32, TX_CONF_SPEC, pub type TX_MONO_FST_VLD_R = crate::BitReader; #[doc = "Field `TX_MONO_FST_VLD` writer - 1: The first channel data value is valid in I2S TX mono mode. 0: The second channel data value is valid in I2S TX mono mode."] pub type TX_MONO_FST_VLD_W<'a, const O: u8> = crate::BitWriter<'a, u32, TX_CONF_SPEC, bool, O>; -#[doc = "Field `TX_PCM_CONF` reader - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] +#[doc = "Field `TX_PCM_CONF` reader - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] pub type TX_PCM_CONF_R = crate::FieldReader; -#[doc = "Field `TX_PCM_CONF` writer - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] +#[doc = "Field `TX_PCM_CONF` writer - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] pub type TX_PCM_CONF_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CONF_SPEC, u8, u8, 2, O>; #[doc = "Field `TX_PCM_BYPASS` reader - Set this bit to bypass Compress/Decompress module for transmitted data."] pub type TX_PCM_BYPASS_R = crate::BitReader; @@ -164,7 +164,7 @@ impl R { pub fn tx_mono_fst_vld(&self) -> TX_MONO_FST_VLD_R { TX_MONO_FST_VLD_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bits 10:11 - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] + #[doc = "Bits 10:11 - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] #[inline(always)] pub fn tx_pcm_conf(&self) -> TX_PCM_CONF_R { TX_PCM_CONF_R::new(((self.bits >> 10) & 3) as u8) @@ -291,7 +291,7 @@ impl W { pub fn tx_mono_fst_vld(&mut self) -> TX_MONO_FST_VLD_W<9> { TX_MONO_FST_VLD_W::new(self) } - #[doc = "Bits 10:11 - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] + #[doc = "Bits 10:11 - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] #[inline(always)] #[must_use] pub fn tx_pcm_conf(&mut self) -> TX_PCM_CONF_W<10> { diff --git a/esp32h2/src/lib.rs b/esp32h2/src/lib.rs index 1d65069ed6..9221243083 100644 --- a/esp32h2/src/lib.rs +++ b/esp32h2/src/lib.rs @@ -1,4 +1,4 @@ -#![doc = "Peripheral access API for ESP32-H2 microcontrollers (generated using svd2rust v0.28.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.28.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] +#![doc = "Peripheral access API for ESP32-H2 microcontrollers (generated using svd2rust v0.28.0 (e6a6d15 2023-05-19))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.28.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] #![deny(dead_code)] #![deny(improper_ctypes)] #![deny(missing_docs)] @@ -100,6 +100,7 @@ pub union Vector { } #[cfg(feature = "rt")] #[doc(hidden)] +#[link_section = ".trap.rodata"] #[no_mangle] pub static __EXTERNAL_INTERRUPTS: [Vector; 65] = [ Vector { _handler: PMU }, diff --git a/esp32h2/src/parl_io/rx_mode_cfg.rs b/esp32h2/src/parl_io/rx_mode_cfg.rs index c39954b924..be13fe91b0 100644 --- a/esp32h2/src/parl_io/rx_mode_cfg.rs +++ b/esp32h2/src/parl_io/rx_mode_cfg.rs @@ -47,9 +47,9 @@ pub type RX_SW_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, RX_MODE_CFG_SPE pub type RX_EXT_EN_INV_R = crate::BitReader; #[doc = "Field `RX_EXT_EN_INV` writer - Set this bit to invert the external enable signal."] pub type RX_EXT_EN_INV_W<'a, const O: u8> = crate::BitWriter<'a, u32, RX_MODE_CFG_SPEC, bool, O>; -#[doc = "Field `RX_PULSE_SUBMODE_SEL` reader - Configures the rxd pulse sampling submode. 4'd0: positive pulse start(data bit included) && positive pulse end(data bit included) 4'd1: positive pulse start(data bit included) && positive pulse end (data bit excluded) 4'd2: positive pulse start(data bit excluded) && positive pulse end (data bit included) 4'd3: positive pulse start(data bit excluded) && positive pulse end (data bit excluded) 4'd4: positive pulse start(data bit included) && length end 4'd5: positive pulse start(data bit excluded) && length end"] +#[doc = "Field `RX_PULSE_SUBMODE_SEL` reader - Configures the rxd pulse sampling submode. 4'd0: positive pulse start(data bit included) && positive pulse end(data bit included) 4'd1: positive pulse start(data bit included) && positive pulse end (data bit excluded) 4'd2: positive pulse start(data bit excluded) && positive pulse end (data bit included) 4'd3: positive pulse start(data bit excluded) && positive pulse end (data bit excluded) 4'd4: positive pulse start(data bit included) && length end 4'd5: positive pulse start(data bit excluded) && length end"] pub type RX_PULSE_SUBMODE_SEL_R = crate::FieldReader; -#[doc = "Field `RX_PULSE_SUBMODE_SEL` writer - Configures the rxd pulse sampling submode. 4'd0: positive pulse start(data bit included) && positive pulse end(data bit included) 4'd1: positive pulse start(data bit included) && positive pulse end (data bit excluded) 4'd2: positive pulse start(data bit excluded) && positive pulse end (data bit included) 4'd3: positive pulse start(data bit excluded) && positive pulse end (data bit excluded) 4'd4: positive pulse start(data bit included) && length end 4'd5: positive pulse start(data bit excluded) && length end"] +#[doc = "Field `RX_PULSE_SUBMODE_SEL` writer - Configures the rxd pulse sampling submode. 4'd0: positive pulse start(data bit included) && positive pulse end(data bit included) 4'd1: positive pulse start(data bit included) && positive pulse end (data bit excluded) 4'd2: positive pulse start(data bit excluded) && positive pulse end (data bit included) 4'd3: positive pulse start(data bit excluded) && positive pulse end (data bit excluded) 4'd4: positive pulse start(data bit included) && length end 4'd5: positive pulse start(data bit excluded) && length end"] pub type RX_PULSE_SUBMODE_SEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RX_MODE_CFG_SPEC, u8, u8, 3, O>; #[doc = "Field `RX_SMP_MODE_SEL` reader - Configures the rxd sampling mode. 2'b00: external level enable mode 2'b01: external pulse enable mode 2'b10: internal software enable mode"] @@ -73,7 +73,7 @@ impl R { pub fn rx_ext_en_inv(&self) -> RX_EXT_EN_INV_R { RX_EXT_EN_INV_R::new(((self.bits >> 26) & 1) != 0) } - #[doc = "Bits 27:29 - Configures the rxd pulse sampling submode. 4'd0: positive pulse start(data bit included) && positive pulse end(data bit included) 4'd1: positive pulse start(data bit included) && positive pulse end (data bit excluded) 4'd2: positive pulse start(data bit excluded) && positive pulse end (data bit included) 4'd3: positive pulse start(data bit excluded) && positive pulse end (data bit excluded) 4'd4: positive pulse start(data bit included) && length end 4'd5: positive pulse start(data bit excluded) && length end"] + #[doc = "Bits 27:29 - Configures the rxd pulse sampling submode. 4'd0: positive pulse start(data bit included) && positive pulse end(data bit included) 4'd1: positive pulse start(data bit included) && positive pulse end (data bit excluded) 4'd2: positive pulse start(data bit excluded) && positive pulse end (data bit included) 4'd3: positive pulse start(data bit excluded) && positive pulse end (data bit excluded) 4'd4: positive pulse start(data bit included) && length end 4'd5: positive pulse start(data bit excluded) && length end"] #[inline(always)] pub fn rx_pulse_submode_sel(&self) -> RX_PULSE_SUBMODE_SEL_R { RX_PULSE_SUBMODE_SEL_R::new(((self.bits >> 27) & 7) as u8) @@ -103,7 +103,7 @@ impl W { pub fn rx_ext_en_inv(&mut self) -> RX_EXT_EN_INV_W<26> { RX_EXT_EN_INV_W::new(self) } - #[doc = "Bits 27:29 - Configures the rxd pulse sampling submode. 4'd0: positive pulse start(data bit included) && positive pulse end(data bit included) 4'd1: positive pulse start(data bit included) && positive pulse end (data bit excluded) 4'd2: positive pulse start(data bit excluded) && positive pulse end (data bit included) 4'd3: positive pulse start(data bit excluded) && positive pulse end (data bit excluded) 4'd4: positive pulse start(data bit included) && length end 4'd5: positive pulse start(data bit excluded) && length end"] + #[doc = "Bits 27:29 - Configures the rxd pulse sampling submode. 4'd0: positive pulse start(data bit included) && positive pulse end(data bit included) 4'd1: positive pulse start(data bit included) && positive pulse end (data bit excluded) 4'd2: positive pulse start(data bit excluded) && positive pulse end (data bit included) 4'd3: positive pulse start(data bit excluded) && positive pulse end (data bit excluded) 4'd4: positive pulse start(data bit included) && length end 4'd5: positive pulse start(data bit excluded) && length end"] #[inline(always)] #[must_use] pub fn rx_pulse_submode_sel(&mut self) -> RX_PULSE_SUBMODE_SEL_W<27> { diff --git a/esp32h2/src/pcr/i2s_rx_clkm_div_conf.rs b/esp32h2/src/pcr/i2s_rx_clkm_div_conf.rs index c8dd16927d..023603cfcc 100644 --- a/esp32h2/src/pcr/i2s_rx_clkm_div_conf.rs +++ b/esp32h2/src/pcr/i2s_rx_clkm_div_conf.rs @@ -34,68 +34,68 @@ impl From> for W { W(writer) } } -#[doc = "Field `I2S_RX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `I2S_RX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] pub type I2S_RX_CLKM_DIV_Z_R = crate::FieldReader; -#[doc = "Field `I2S_RX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `I2S_RX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] pub type I2S_RX_CLKM_DIV_Z_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2S_RX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `I2S_RX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `I2S_RX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] pub type I2S_RX_CLKM_DIV_Y_R = crate::FieldReader; -#[doc = "Field `I2S_RX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `I2S_RX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] pub type I2S_RX_CLKM_DIV_Y_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2S_RX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `I2S_RX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `I2S_RX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type I2S_RX_CLKM_DIV_X_R = crate::FieldReader; -#[doc = "Field `I2S_RX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `I2S_RX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type I2S_RX_CLKM_DIV_X_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2S_RX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `I2S_RX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `I2S_RX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] pub type I2S_RX_CLKM_DIV_YN1_R = crate::BitReader; -#[doc = "Field `I2S_RX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `I2S_RX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] pub type I2S_RX_CLKM_DIV_YN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2S_RX_CLKM_DIV_CONF_SPEC, bool, O>; impl R { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] #[inline(always)] pub fn i2s_rx_clkm_div_z(&self) -> I2S_RX_CLKM_DIV_Z_R { I2S_RX_CLKM_DIV_Z_R::new((self.bits & 0x01ff) as u16) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] pub fn i2s_rx_clkm_div_y(&self) -> I2S_RX_CLKM_DIV_Y_R { I2S_RX_CLKM_DIV_Y_R::new(((self.bits >> 9) & 0x01ff) as u16) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] pub fn i2s_rx_clkm_div_x(&self) -> I2S_RX_CLKM_DIV_X_R { I2S_RX_CLKM_DIV_X_R::new(((self.bits >> 18) & 0x01ff) as u16) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] #[inline(always)] pub fn i2s_rx_clkm_div_yn1(&self) -> I2S_RX_CLKM_DIV_YN1_R { I2S_RX_CLKM_DIV_YN1_R::new(((self.bits >> 27) & 1) != 0) } } impl W { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] #[inline(always)] #[must_use] pub fn i2s_rx_clkm_div_z(&mut self) -> I2S_RX_CLKM_DIV_Z_W<0> { I2S_RX_CLKM_DIV_Z_W::new(self) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] #[must_use] pub fn i2s_rx_clkm_div_y(&mut self) -> I2S_RX_CLKM_DIV_Y_W<9> { I2S_RX_CLKM_DIV_Y_W::new(self) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] #[must_use] pub fn i2s_rx_clkm_div_x(&mut self) -> I2S_RX_CLKM_DIV_X_W<18> { I2S_RX_CLKM_DIV_X_W::new(self) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] #[inline(always)] #[must_use] pub fn i2s_rx_clkm_div_yn1(&mut self) -> I2S_RX_CLKM_DIV_YN1_W<27> { diff --git a/esp32h2/src/pcr/i2s_tx_clkm_conf.rs b/esp32h2/src/pcr/i2s_tx_clkm_conf.rs index 9a292b0730..08fd36d18f 100644 --- a/esp32h2/src/pcr/i2s_tx_clkm_conf.rs +++ b/esp32h2/src/pcr/i2s_tx_clkm_conf.rs @@ -34,9 +34,9 @@ impl From> for W { W(writer) } } -#[doc = "Field `I2S_TX_CLKM_DIV_NUM` reader - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] +#[doc = "Field `I2S_TX_CLKM_DIV_NUM` reader - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] pub type I2S_TX_CLKM_DIV_NUM_R = crate::FieldReader; -#[doc = "Field `I2S_TX_CLKM_DIV_NUM` writer - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] +#[doc = "Field `I2S_TX_CLKM_DIV_NUM` writer - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] pub type I2S_TX_CLKM_DIV_NUM_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2S_TX_CLKM_CONF_SPEC, u8, u8, 8, O>; #[doc = "Field `I2S_TX_CLKM_SEL` reader - Select I2S Tx module source clock. 0: XTAL clock. 1: APLL. 2: CLK160. 3: I2S_MCLK_in."] @@ -50,7 +50,7 @@ pub type I2S_TX_CLKM_EN_R = crate::BitReader; pub type I2S_TX_CLKM_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2S_TX_CLKM_CONF_SPEC, bool, O>; impl R { - #[doc = "Bits 12:19 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] + #[doc = "Bits 12:19 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] #[inline(always)] pub fn i2s_tx_clkm_div_num(&self) -> I2S_TX_CLKM_DIV_NUM_R { I2S_TX_CLKM_DIV_NUM_R::new(((self.bits >> 12) & 0xff) as u8) @@ -67,7 +67,7 @@ impl R { } } impl W { - #[doc = "Bits 12:19 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] + #[doc = "Bits 12:19 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] #[inline(always)] #[must_use] pub fn i2s_tx_clkm_div_num(&mut self) -> I2S_TX_CLKM_DIV_NUM_W<12> { diff --git a/esp32h2/src/pcr/i2s_tx_clkm_div_conf.rs b/esp32h2/src/pcr/i2s_tx_clkm_div_conf.rs index 5eded224a0..cf4ff4fbbb 100644 --- a/esp32h2/src/pcr/i2s_tx_clkm_div_conf.rs +++ b/esp32h2/src/pcr/i2s_tx_clkm_div_conf.rs @@ -34,68 +34,68 @@ impl From> for W { W(writer) } } -#[doc = "Field `I2S_TX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `I2S_TX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] pub type I2S_TX_CLKM_DIV_Z_R = crate::FieldReader; -#[doc = "Field `I2S_TX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `I2S_TX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] pub type I2S_TX_CLKM_DIV_Z_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2S_TX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `I2S_TX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `I2S_TX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] pub type I2S_TX_CLKM_DIV_Y_R = crate::FieldReader; -#[doc = "Field `I2S_TX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `I2S_TX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] pub type I2S_TX_CLKM_DIV_Y_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2S_TX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `I2S_TX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `I2S_TX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type I2S_TX_CLKM_DIV_X_R = crate::FieldReader; -#[doc = "Field `I2S_TX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `I2S_TX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type I2S_TX_CLKM_DIV_X_W<'a, const O: u8> = crate::FieldWriter<'a, u32, I2S_TX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `I2S_TX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `I2S_TX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] pub type I2S_TX_CLKM_DIV_YN1_R = crate::BitReader; -#[doc = "Field `I2S_TX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `I2S_TX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] pub type I2S_TX_CLKM_DIV_YN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, I2S_TX_CLKM_DIV_CONF_SPEC, bool, O>; impl R { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] #[inline(always)] pub fn i2s_tx_clkm_div_z(&self) -> I2S_TX_CLKM_DIV_Z_R { I2S_TX_CLKM_DIV_Z_R::new((self.bits & 0x01ff) as u16) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] pub fn i2s_tx_clkm_div_y(&self) -> I2S_TX_CLKM_DIV_Y_R { I2S_TX_CLKM_DIV_Y_R::new(((self.bits >> 9) & 0x01ff) as u16) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] pub fn i2s_tx_clkm_div_x(&self) -> I2S_TX_CLKM_DIV_X_R { I2S_TX_CLKM_DIV_X_R::new(((self.bits >> 18) & 0x01ff) as u16) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] #[inline(always)] pub fn i2s_tx_clkm_div_yn1(&self) -> I2S_TX_CLKM_DIV_YN1_R { I2S_TX_CLKM_DIV_YN1_R::new(((self.bits >> 27) & 1) != 0) } } impl W { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] #[inline(always)] #[must_use] pub fn i2s_tx_clkm_div_z(&mut self) -> I2S_TX_CLKM_DIV_Z_W<0> { I2S_TX_CLKM_DIV_Z_W::new(self) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] #[must_use] pub fn i2s_tx_clkm_div_y(&mut self) -> I2S_TX_CLKM_DIV_Y_W<9> { I2S_TX_CLKM_DIV_Y_W::new(self) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] #[must_use] pub fn i2s_tx_clkm_div_x(&mut self) -> I2S_TX_CLKM_DIV_X_W<18> { I2S_TX_CLKM_DIV_X_W::new(self) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] #[inline(always)] #[must_use] pub fn i2s_tx_clkm_div_yn1(&mut self) -> I2S_TX_CLKM_DIV_YN1_W<27> { diff --git a/esp32s2/Cargo.toml b/esp32s2/Cargo.toml index bd34352846..5406c240ce 100644 --- a/esp32s2/Cargo.toml +++ b/esp32s2/Cargo.toml @@ -23,6 +23,10 @@ include = [ "device.x", ] +[lib] +bench = false +test = false + [dependencies] critical-section = { version = "1.1.1", optional = true } vcell = "0.1.3" diff --git a/esp32s2/src/aes/block_mode.rs b/esp32s2/src/aes/block_mode.rs index bbe8262cf5..e5ad59a8ca 100644 --- a/esp32s2/src/aes/block_mode.rs +++ b/esp32s2/src/aes/block_mode.rs @@ -34,19 +34,19 @@ impl From> for W { W(writer) } } -#[doc = "Field `BLOCK_MODE` reader - Defines the operation type of the AES Accelerator operating under the DMA-AES working mode. For details, see Table 8. & 3'h0(BLOCK_MODE_ECB): ECB # 3'h1(BLOCK_MODE_CBC): CBC # 3'h2(BLOCK_MODE_OFB): OFB # 3'h3(BLOCK_MODE_CTR): CTR # 3'h4(BLOCK_MODE_CFB8): CFB-8 # 3'h5(BLOCK_MODE_CFB128): CFB-128 # 3'h6(BLOCK_MODE_GCM): GCM &"] +#[doc = "Field `BLOCK_MODE` reader - Defines the operation type of the AES Accelerator operating under the DMA-AES working mode. For details, see Table 8. & 3'h0(BLOCK_MODE_ECB): ECB # 3'h1(BLOCK_MODE_CBC): CBC # 3'h2(BLOCK_MODE_OFB): OFB # 3'h3(BLOCK_MODE_CTR): CTR # 3'h4(BLOCK_MODE_CFB8): CFB-8 # 3'h5(BLOCK_MODE_CFB128): CFB-128 # 3'h6(BLOCK_MODE_GCM): GCM &"] pub type BLOCK_MODE_R = crate::FieldReader; -#[doc = "Field `BLOCK_MODE` writer - Defines the operation type of the AES Accelerator operating under the DMA-AES working mode. For details, see Table 8. & 3'h0(BLOCK_MODE_ECB): ECB # 3'h1(BLOCK_MODE_CBC): CBC # 3'h2(BLOCK_MODE_OFB): OFB # 3'h3(BLOCK_MODE_CTR): CTR # 3'h4(BLOCK_MODE_CFB8): CFB-8 # 3'h5(BLOCK_MODE_CFB128): CFB-128 # 3'h6(BLOCK_MODE_GCM): GCM &"] +#[doc = "Field `BLOCK_MODE` writer - Defines the operation type of the AES Accelerator operating under the DMA-AES working mode. For details, see Table 8. & 3'h0(BLOCK_MODE_ECB): ECB # 3'h1(BLOCK_MODE_CBC): CBC # 3'h2(BLOCK_MODE_OFB): OFB # 3'h3(BLOCK_MODE_CTR): CTR # 3'h4(BLOCK_MODE_CFB8): CFB-8 # 3'h5(BLOCK_MODE_CFB128): CFB-128 # 3'h6(BLOCK_MODE_GCM): GCM &"] pub type BLOCK_MODE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, BLOCK_MODE_SPEC, u8, u8, 3, O>; impl R { - #[doc = "Bits 0:2 - Defines the operation type of the AES Accelerator operating under the DMA-AES working mode. For details, see Table 8. & 3'h0(BLOCK_MODE_ECB): ECB # 3'h1(BLOCK_MODE_CBC): CBC # 3'h2(BLOCK_MODE_OFB): OFB # 3'h3(BLOCK_MODE_CTR): CTR # 3'h4(BLOCK_MODE_CFB8): CFB-8 # 3'h5(BLOCK_MODE_CFB128): CFB-128 # 3'h6(BLOCK_MODE_GCM): GCM &"] + #[doc = "Bits 0:2 - Defines the operation type of the AES Accelerator operating under the DMA-AES working mode. For details, see Table 8. & 3'h0(BLOCK_MODE_ECB): ECB # 3'h1(BLOCK_MODE_CBC): CBC # 3'h2(BLOCK_MODE_OFB): OFB # 3'h3(BLOCK_MODE_CTR): CTR # 3'h4(BLOCK_MODE_CFB8): CFB-8 # 3'h5(BLOCK_MODE_CFB128): CFB-128 # 3'h6(BLOCK_MODE_GCM): GCM &"] #[inline(always)] pub fn block_mode(&self) -> BLOCK_MODE_R { BLOCK_MODE_R::new((self.bits & 7) as u8) } } impl W { - #[doc = "Bits 0:2 - Defines the operation type of the AES Accelerator operating under the DMA-AES working mode. For details, see Table 8. & 3'h0(BLOCK_MODE_ECB): ECB # 3'h1(BLOCK_MODE_CBC): CBC # 3'h2(BLOCK_MODE_OFB): OFB # 3'h3(BLOCK_MODE_CTR): CTR # 3'h4(BLOCK_MODE_CFB8): CFB-8 # 3'h5(BLOCK_MODE_CFB128): CFB-128 # 3'h6(BLOCK_MODE_GCM): GCM &"] + #[doc = "Bits 0:2 - Defines the operation type of the AES Accelerator operating under the DMA-AES working mode. For details, see Table 8. & 3'h0(BLOCK_MODE_ECB): ECB # 3'h1(BLOCK_MODE_CBC): CBC # 3'h2(BLOCK_MODE_OFB): OFB # 3'h3(BLOCK_MODE_CTR): CTR # 3'h4(BLOCK_MODE_CFB8): CFB-8 # 3'h5(BLOCK_MODE_CFB128): CFB-128 # 3'h6(BLOCK_MODE_GCM): GCM &"] #[inline(always)] #[must_use] pub fn block_mode(&mut self) -> BLOCK_MODE_W<0> { diff --git a/esp32s2/src/aes/endian.rs b/esp32s2/src/aes/endian.rs index 7c5f92345a..96ea24c07e 100644 --- a/esp32s2/src/aes/endian.rs +++ b/esp32s2/src/aes/endian.rs @@ -34,19 +34,19 @@ impl From> for W { W(writer) } } -#[doc = "Field `ENDIAN` reader - Defines the endianness of input and output texts. & \\[1:0\\] key endian # \\[3:2\\] text_in endian or in_stream endian # \\[5:4\\] text_out endian or out_stream endian # &"] +#[doc = "Field `ENDIAN` reader - Defines the endianness of input and output texts. & \\[1:0\\] key endian # \\[3:2\\] text_in endian or in_stream endian # \\[5:4\\] text_out endian or out_stream endian # &"] pub type ENDIAN_R = crate::FieldReader; -#[doc = "Field `ENDIAN` writer - Defines the endianness of input and output texts. & \\[1:0\\] key endian # \\[3:2\\] text_in endian or in_stream endian # \\[5:4\\] text_out endian or out_stream endian # &"] +#[doc = "Field `ENDIAN` writer - Defines the endianness of input and output texts. & \\[1:0\\] key endian # \\[3:2\\] text_in endian or in_stream endian # \\[5:4\\] text_out endian or out_stream endian # &"] pub type ENDIAN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ENDIAN_SPEC, u8, u8, 6, O>; impl R { - #[doc = "Bits 0:5 - Defines the endianness of input and output texts. & \\[1:0\\] key endian # \\[3:2\\] text_in endian or in_stream endian # \\[5:4\\] text_out endian or out_stream endian # &"] + #[doc = "Bits 0:5 - Defines the endianness of input and output texts. & \\[1:0\\] key endian # \\[3:2\\] text_in endian or in_stream endian # \\[5:4\\] text_out endian or out_stream endian # &"] #[inline(always)] pub fn endian(&self) -> ENDIAN_R { ENDIAN_R::new((self.bits & 0x3f) as u8) } } impl W { - #[doc = "Bits 0:5 - Defines the endianness of input and output texts. & \\[1:0\\] key endian # \\[3:2\\] text_in endian or in_stream endian # \\[5:4\\] text_out endian or out_stream endian # &"] + #[doc = "Bits 0:5 - Defines the endianness of input and output texts. & \\[1:0\\] key endian # \\[3:2\\] text_in endian or in_stream endian # \\[5:4\\] text_out endian or out_stream endian # &"] #[inline(always)] #[must_use] pub fn endian(&mut self) -> ENDIAN_W<0> { diff --git a/esp32s2/src/aes/mode.rs b/esp32s2/src/aes/mode.rs index 6593e0edc3..6f8ec6b3a4 100644 --- a/esp32s2/src/aes/mode.rs +++ b/esp32s2/src/aes/mode.rs @@ -34,19 +34,19 @@ impl From> for W { W(writer) } } -#[doc = "Field `MODE` reader - Defines the operation type of the AES Accelerator operating under the Typical AES working mode. & 0x0(AES_EN_128): AES-EN-128 # 0x1(AES_EN_192): AES-EN-192 # 0x2(AES_EN_256): AES-EN-256 # 0x4(AES_DE_128): AES-DE-128 # 0x5(AES_DE_192): AES-DE-192 # 0x6(AES_DE_256): AES-DE-256 &"] +#[doc = "Field `MODE` reader - Defines the operation type of the AES Accelerator operating under the Typical AES working mode. & 0x0(AES_EN_128): AES-EN-128 # 0x1(AES_EN_192): AES-EN-192 # 0x2(AES_EN_256): AES-EN-256 # 0x4(AES_DE_128): AES-DE-128 # 0x5(AES_DE_192): AES-DE-192 # 0x6(AES_DE_256): AES-DE-256 &"] pub type MODE_R = crate::FieldReader; -#[doc = "Field `MODE` writer - Defines the operation type of the AES Accelerator operating under the Typical AES working mode. & 0x0(AES_EN_128): AES-EN-128 # 0x1(AES_EN_192): AES-EN-192 # 0x2(AES_EN_256): AES-EN-256 # 0x4(AES_DE_128): AES-DE-128 # 0x5(AES_DE_192): AES-DE-192 # 0x6(AES_DE_256): AES-DE-256 &"] +#[doc = "Field `MODE` writer - Defines the operation type of the AES Accelerator operating under the Typical AES working mode. & 0x0(AES_EN_128): AES-EN-128 # 0x1(AES_EN_192): AES-EN-192 # 0x2(AES_EN_256): AES-EN-256 # 0x4(AES_DE_128): AES-DE-128 # 0x5(AES_DE_192): AES-DE-192 # 0x6(AES_DE_256): AES-DE-256 &"] pub type MODE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MODE_SPEC, u8, u8, 3, O>; impl R { - #[doc = "Bits 0:2 - Defines the operation type of the AES Accelerator operating under the Typical AES working mode. & 0x0(AES_EN_128): AES-EN-128 # 0x1(AES_EN_192): AES-EN-192 # 0x2(AES_EN_256): AES-EN-256 # 0x4(AES_DE_128): AES-DE-128 # 0x5(AES_DE_192): AES-DE-192 # 0x6(AES_DE_256): AES-DE-256 &"] + #[doc = "Bits 0:2 - Defines the operation type of the AES Accelerator operating under the Typical AES working mode. & 0x0(AES_EN_128): AES-EN-128 # 0x1(AES_EN_192): AES-EN-192 # 0x2(AES_EN_256): AES-EN-256 # 0x4(AES_DE_128): AES-DE-128 # 0x5(AES_DE_192): AES-DE-192 # 0x6(AES_DE_256): AES-DE-256 &"] #[inline(always)] pub fn mode(&self) -> MODE_R { MODE_R::new((self.bits & 7) as u8) } } impl W { - #[doc = "Bits 0:2 - Defines the operation type of the AES Accelerator operating under the Typical AES working mode. & 0x0(AES_EN_128): AES-EN-128 # 0x1(AES_EN_192): AES-EN-192 # 0x2(AES_EN_256): AES-EN-256 # 0x4(AES_DE_128): AES-DE-128 # 0x5(AES_DE_192): AES-DE-192 # 0x6(AES_DE_256): AES-DE-256 &"] + #[doc = "Bits 0:2 - Defines the operation type of the AES Accelerator operating under the Typical AES working mode. & 0x0(AES_EN_128): AES-EN-128 # 0x1(AES_EN_192): AES-EN-192 # 0x2(AES_EN_256): AES-EN-256 # 0x4(AES_DE_128): AES-DE-128 # 0x5(AES_DE_192): AES-DE-192 # 0x6(AES_DE_256): AES-DE-256 &"] #[inline(always)] #[must_use] pub fn mode(&mut self) -> MODE_W<0> { diff --git a/esp32s2/src/apb_saradc/thres_ctrl.rs b/esp32s2/src/apb_saradc/thres_ctrl.rs index 930ad74ebe..5aa6fb3e73 100644 --- a/esp32s2/src/apb_saradc/thres_ctrl.rs +++ b/esp32s2/src/apb_saradc/thres_ctrl.rs @@ -38,13 +38,13 @@ impl From> for W { pub type CLK_EN_R = crate::BitReader; #[doc = "Field `CLK_EN` writer - Clock gate enable."] pub type CLK_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, THRES_CTRL_SPEC, bool, O>; -#[doc = "Field `ADC2_THRES_MODE` reader - 1: ADC_DATA > = threshold, generate interrupt. 0: ADC_DATA < threshold, generate interrupt."] +#[doc = "Field `ADC2_THRES_MODE` reader - 1: ADC_DATA > = threshold, generate interrupt. 0: ADC_DATA < threshold, generate interrupt."] pub type ADC2_THRES_MODE_R = crate::BitReader; -#[doc = "Field `ADC2_THRES_MODE` writer - 1: ADC_DATA > = threshold, generate interrupt. 0: ADC_DATA < threshold, generate interrupt."] +#[doc = "Field `ADC2_THRES_MODE` writer - 1: ADC_DATA > = threshold, generate interrupt. 0: ADC_DATA < threshold, generate interrupt."] pub type ADC2_THRES_MODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, THRES_CTRL_SPEC, bool, O>; -#[doc = "Field `ADC1_THRES_MODE` reader - 1: ADC_DATA > = threshold, generate interrupt. 0: ADC_DATA < threshold, generate interrupt."] +#[doc = "Field `ADC1_THRES_MODE` reader - 1: ADC_DATA > = threshold, generate interrupt. 0: ADC_DATA < threshold, generate interrupt."] pub type ADC1_THRES_MODE_R = crate::BitReader; -#[doc = "Field `ADC1_THRES_MODE` writer - 1: ADC_DATA > = threshold, generate interrupt. 0: ADC_DATA < threshold, generate interrupt."] +#[doc = "Field `ADC1_THRES_MODE` writer - 1: ADC_DATA > = threshold, generate interrupt. 0: ADC_DATA < threshold, generate interrupt."] pub type ADC1_THRES_MODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, THRES_CTRL_SPEC, bool, O>; #[doc = "Field `ADC2_THRES` reader - ADC2 threshold."] pub type ADC2_THRES_R = crate::FieldReader; @@ -70,12 +70,12 @@ impl R { pub fn clk_en(&self) -> CLK_EN_R { CLK_EN_R::new((self.bits & 1) != 0) } - #[doc = "Bit 2 - 1: ADC_DATA > = threshold, generate interrupt. 0: ADC_DATA < threshold, generate interrupt."] + #[doc = "Bit 2 - 1: ADC_DATA > = threshold, generate interrupt. 0: ADC_DATA < threshold, generate interrupt."] #[inline(always)] pub fn adc2_thres_mode(&self) -> ADC2_THRES_MODE_R { ADC2_THRES_MODE_R::new(((self.bits >> 2) & 1) != 0) } - #[doc = "Bit 3 - 1: ADC_DATA > = threshold, generate interrupt. 0: ADC_DATA < threshold, generate interrupt."] + #[doc = "Bit 3 - 1: ADC_DATA > = threshold, generate interrupt. 0: ADC_DATA < threshold, generate interrupt."] #[inline(always)] pub fn adc1_thres_mode(&self) -> ADC1_THRES_MODE_R { ADC1_THRES_MODE_R::new(((self.bits >> 3) & 1) != 0) @@ -108,13 +108,13 @@ impl W { pub fn clk_en(&mut self) -> CLK_EN_W<0> { CLK_EN_W::new(self) } - #[doc = "Bit 2 - 1: ADC_DATA > = threshold, generate interrupt. 0: ADC_DATA < threshold, generate interrupt."] + #[doc = "Bit 2 - 1: ADC_DATA > = threshold, generate interrupt. 0: ADC_DATA < threshold, generate interrupt."] #[inline(always)] #[must_use] pub fn adc2_thres_mode(&mut self) -> ADC2_THRES_MODE_W<2> { ADC2_THRES_MODE_W::new(self) } - #[doc = "Bit 3 - 1: ADC_DATA > = threshold, generate interrupt. 0: ADC_DATA < threshold, generate interrupt."] + #[doc = "Bit 3 - 1: ADC_DATA > = threshold, generate interrupt. 0: ADC_DATA < threshold, generate interrupt."] #[inline(always)] #[must_use] pub fn adc1_thres_mode(&mut self) -> ADC1_THRES_MODE_W<3> { diff --git a/esp32s2/src/gpio/func_out_sel_cfg.rs b/esp32s2/src/gpio/func_out_sel_cfg.rs index e2de2b07eb..547fd4b4ec 100644 --- a/esp32s2/src/gpio/func_out_sel_cfg.rs +++ b/esp32s2/src/gpio/func_out_sel_cfg.rs @@ -34,9 +34,9 @@ impl From> for W { W(writer) } } -#[doc = "Field `OUT_SEL` reader - Selection control for GPIO output n. If a value s (0<=s<256) is written to this field, the peripheral output signal s will be connected to GPIO output n. If a value 256 is written to this field, bit n of GPIO_OUT_REG/GPIO_OUT1_REG and GPIO_ENABLE_REG/GPIO_ENABLE1_REG will be selected as the output value and output enable."] +#[doc = "Field `OUT_SEL` reader - Selection control for GPIO output n. If a value s (0<=s<256) is written to this field, the peripheral output signal s will be connected to GPIO output n. If a value 256 is written to this field, bit n of GPIO_OUT_REG/GPIO_OUT1_REG and GPIO_ENABLE_REG/GPIO_ENABLE1_REG will be selected as the output value and output enable."] pub type OUT_SEL_R = crate::FieldReader; -#[doc = "Field `OUT_SEL` writer - Selection control for GPIO output n. If a value s (0<=s<256) is written to this field, the peripheral output signal s will be connected to GPIO output n. If a value 256 is written to this field, bit n of GPIO_OUT_REG/GPIO_OUT1_REG and GPIO_ENABLE_REG/GPIO_ENABLE1_REG will be selected as the output value and output enable."] +#[doc = "Field `OUT_SEL` writer - Selection control for GPIO output n. If a value s (0<=s<256) is written to this field, the peripheral output signal s will be connected to GPIO output n. If a value 256 is written to this field, bit n of GPIO_OUT_REG/GPIO_OUT1_REG and GPIO_ENABLE_REG/GPIO_ENABLE1_REG will be selected as the output value and output enable."] pub type OUT_SEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, FUNC_OUT_SEL_CFG_SPEC, u16, u16, 9, O>; #[doc = "Field `INV_SEL` reader - 0: Do not invert the output value; 1: Invert the output value."] @@ -52,7 +52,7 @@ pub type OEN_INV_SEL_R = crate::BitReader; #[doc = "Field `OEN_INV_SEL` writer - 0: Do not invert the output enable signal; 1: Invert the output enable signal."] pub type OEN_INV_SEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, FUNC_OUT_SEL_CFG_SPEC, bool, O>; impl R { - #[doc = "Bits 0:8 - Selection control for GPIO output n. If a value s (0<=s<256) is written to this field, the peripheral output signal s will be connected to GPIO output n. If a value 256 is written to this field, bit n of GPIO_OUT_REG/GPIO_OUT1_REG and GPIO_ENABLE_REG/GPIO_ENABLE1_REG will be selected as the output value and output enable."] + #[doc = "Bits 0:8 - Selection control for GPIO output n. If a value s (0<=s<256) is written to this field, the peripheral output signal s will be connected to GPIO output n. If a value 256 is written to this field, bit n of GPIO_OUT_REG/GPIO_OUT1_REG and GPIO_ENABLE_REG/GPIO_ENABLE1_REG will be selected as the output value and output enable."] #[inline(always)] pub fn out_sel(&self) -> OUT_SEL_R { OUT_SEL_R::new((self.bits & 0x01ff) as u16) @@ -74,7 +74,7 @@ impl R { } } impl W { - #[doc = "Bits 0:8 - Selection control for GPIO output n. If a value s (0<=s<256) is written to this field, the peripheral output signal s will be connected to GPIO output n. If a value 256 is written to this field, bit n of GPIO_OUT_REG/GPIO_OUT1_REG and GPIO_ENABLE_REG/GPIO_ENABLE1_REG will be selected as the output value and output enable."] + #[doc = "Bits 0:8 - Selection control for GPIO output n. If a value s (0<=s<256) is written to this field, the peripheral output signal s will be connected to GPIO output n. If a value 256 is written to this field, bit n of GPIO_OUT_REG/GPIO_OUT1_REG and GPIO_ENABLE_REG/GPIO_ENABLE1_REG will be selected as the output value and output enable."] #[inline(always)] #[must_use] pub fn out_sel(&mut self) -> OUT_SEL_W<0> { diff --git a/esp32s2/src/lib.rs b/esp32s2/src/lib.rs index e7d9215749..4894066d9d 100644 --- a/esp32s2/src/lib.rs +++ b/esp32s2/src/lib.rs @@ -1,4 +1,4 @@ -#![doc = "Peripheral access API for ESP32-S2 microcontrollers (generated using svd2rust v0.28.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.28.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] +#![doc = "Peripheral access API for ESP32-S2 microcontrollers (generated using svd2rust v0.28.0 (e6a6d15 2023-05-19))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.28.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] #![deny(dead_code)] #![deny(improper_ctypes)] #![deny(missing_docs)] diff --git a/esp32s3/Cargo.toml b/esp32s3/Cargo.toml index ed7b1ccf3e..0540e23a92 100644 --- a/esp32s3/Cargo.toml +++ b/esp32s3/Cargo.toml @@ -23,6 +23,10 @@ include = [ "device.x" ] +[lib] +bench = false +test = false + [dependencies] critical-section = { version = "1.1.1", optional = true } vcell = "0.1.3" diff --git a/esp32s3/src/gpio/func_out_sel_cfg.rs b/esp32s3/src/gpio/func_out_sel_cfg.rs index cd0ee901ae..a77202e58d 100644 --- a/esp32s3/src/gpio/func_out_sel_cfg.rs +++ b/esp32s3/src/gpio/func_out_sel_cfg.rs @@ -34,9 +34,9 @@ impl From> for W { W(writer) } } -#[doc = "Field `OUT_SEL` reader - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] +#[doc = "Field `OUT_SEL` reader - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] pub type OUT_SEL_R = crate::FieldReader; -#[doc = "Field `OUT_SEL` writer - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] +#[doc = "Field `OUT_SEL` writer - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] pub type OUT_SEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, FUNC_OUT_SEL_CFG_SPEC, u16, u16, 9, O>; #[doc = "Field `INV_SEL` reader - set this bit to invert output signal.1:invert.0:not invert."] @@ -52,7 +52,7 @@ pub type OEN_INV_SEL_R = crate::BitReader; #[doc = "Field `OEN_INV_SEL` writer - set this bit to invert output enable signal.1:invert.0:not invert."] pub type OEN_INV_SEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, FUNC_OUT_SEL_CFG_SPEC, bool, O>; impl R { - #[doc = "Bits 0:8 - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] + #[doc = "Bits 0:8 - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] #[inline(always)] pub fn out_sel(&self) -> OUT_SEL_R { OUT_SEL_R::new((self.bits & 0x01ff) as u16) @@ -74,7 +74,7 @@ impl R { } } impl W { - #[doc = "Bits 0:8 - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] + #[doc = "Bits 0:8 - The value of the bits: 0<=s<=256. Set the value to select output signal. s=0-255: output of GPIO\\[n\\] equals input of peripheral\\[s\\]. s=256: output of GPIO\\[n\\] equals GPIO_OUT_REG\\[n\\]."] #[inline(always)] #[must_use] pub fn out_sel(&mut self) -> OUT_SEL_W<0> { diff --git a/esp32s3/src/i2s0/rx_clkm_div_conf.rs b/esp32s3/src/i2s0/rx_clkm_div_conf.rs index 1ecd234883..2bd925a573 100644 --- a/esp32s3/src/i2s0/rx_clkm_div_conf.rs +++ b/esp32s3/src/i2s0/rx_clkm_div_conf.rs @@ -34,68 +34,68 @@ impl From> for W { W(writer) } } -#[doc = "Field `RX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `RX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] pub type RX_CLKM_DIV_Z_R = crate::FieldReader; -#[doc = "Field `RX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `RX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] pub type RX_CLKM_DIV_Z_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `RX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `RX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] pub type RX_CLKM_DIV_Y_R = crate::FieldReader; -#[doc = "Field `RX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `RX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] pub type RX_CLKM_DIV_Y_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `RX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `RX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type RX_CLKM_DIV_X_R = crate::FieldReader; -#[doc = "Field `RX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `RX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type RX_CLKM_DIV_X_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `RX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `RX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] pub type RX_CLKM_DIV_YN1_R = crate::BitReader; -#[doc = "Field `RX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `RX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] pub type RX_CLKM_DIV_YN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, RX_CLKM_DIV_CONF_SPEC, bool, O>; impl R { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] #[inline(always)] pub fn rx_clkm_div_z(&self) -> RX_CLKM_DIV_Z_R { RX_CLKM_DIV_Z_R::new((self.bits & 0x01ff) as u16) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] pub fn rx_clkm_div_y(&self) -> RX_CLKM_DIV_Y_R { RX_CLKM_DIV_Y_R::new(((self.bits >> 9) & 0x01ff) as u16) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] pub fn rx_clkm_div_x(&self) -> RX_CLKM_DIV_X_R { RX_CLKM_DIV_X_R::new(((self.bits >> 18) & 0x01ff) as u16) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] #[inline(always)] pub fn rx_clkm_div_yn1(&self) -> RX_CLKM_DIV_YN1_R { RX_CLKM_DIV_YN1_R::new(((self.bits >> 27) & 1) != 0) } } impl W { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] #[inline(always)] #[must_use] pub fn rx_clkm_div_z(&mut self) -> RX_CLKM_DIV_Z_W<0> { RX_CLKM_DIV_Z_W::new(self) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] #[must_use] pub fn rx_clkm_div_y(&mut self) -> RX_CLKM_DIV_Y_W<9> { RX_CLKM_DIV_Y_W::new(self) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] #[must_use] pub fn rx_clkm_div_x(&mut self) -> RX_CLKM_DIV_X_W<18> { RX_CLKM_DIV_X_W::new(self) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] #[inline(always)] #[must_use] pub fn rx_clkm_div_yn1(&mut self) -> RX_CLKM_DIV_YN1_W<27> { diff --git a/esp32s3/src/i2s0/rx_conf.rs b/esp32s3/src/i2s0/rx_conf.rs index c8f81f052f..2ea3667f08 100644 --- a/esp32s3/src/i2s0/rx_conf.rs +++ b/esp32s3/src/i2s0/rx_conf.rs @@ -62,9 +62,9 @@ pub type RX_UPDATE_W<'a, const O: u8> = crate::BitWriter<'a, u32, RX_CONF_SPEC, pub type RX_MONO_FST_VLD_R = crate::BitReader; #[doc = "Field `RX_MONO_FST_VLD` writer - 1: The first channel data value is valid in I2S RX mono mode. 0: The second channel data value is valid in I2S RX mono mode."] pub type RX_MONO_FST_VLD_W<'a, const O: u8> = crate::BitWriter<'a, u32, RX_CONF_SPEC, bool, O>; -#[doc = "Field `RX_PCM_CONF` reader - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] +#[doc = "Field `RX_PCM_CONF` reader - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] pub type RX_PCM_CONF_R = crate::FieldReader; -#[doc = "Field `RX_PCM_CONF` writer - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] +#[doc = "Field `RX_PCM_CONF` writer - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] pub type RX_PCM_CONF_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RX_CONF_SPEC, u8, u8, 2, O>; #[doc = "Field `RX_PCM_BYPASS` reader - Set this bit to bypass Compress/Decompress module for received data."] pub type RX_PCM_BYPASS_R = crate::BitReader; @@ -138,7 +138,7 @@ impl R { pub fn rx_mono_fst_vld(&self) -> RX_MONO_FST_VLD_R { RX_MONO_FST_VLD_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bits 10:11 - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] + #[doc = "Bits 10:11 - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] #[inline(always)] pub fn rx_pcm_conf(&self) -> RX_PCM_CONF_R { RX_PCM_CONF_R::new(((self.bits >> 10) & 3) as u8) @@ -243,7 +243,7 @@ impl W { pub fn rx_mono_fst_vld(&mut self) -> RX_MONO_FST_VLD_W<9> { RX_MONO_FST_VLD_W::new(self) } - #[doc = "Bits 10:11 - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] + #[doc = "Bits 10:11 - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] #[inline(always)] #[must_use] pub fn rx_pcm_conf(&mut self) -> RX_PCM_CONF_W<10> { diff --git a/esp32s3/src/i2s0/tx_clkm_conf.rs b/esp32s3/src/i2s0/tx_clkm_conf.rs index 5e7f2e6402..dc3cad40c4 100644 --- a/esp32s3/src/i2s0/tx_clkm_conf.rs +++ b/esp32s3/src/i2s0/tx_clkm_conf.rs @@ -34,9 +34,9 @@ impl From> for W { W(writer) } } -#[doc = "Field `TX_CLKM_DIV_NUM` reader - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] +#[doc = "Field `TX_CLKM_DIV_NUM` reader - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] pub type TX_CLKM_DIV_NUM_R = crate::FieldReader; -#[doc = "Field `TX_CLKM_DIV_NUM` writer - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] +#[doc = "Field `TX_CLKM_DIV_NUM` writer - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] pub type TX_CLKM_DIV_NUM_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CLKM_CONF_SPEC, u8, u8, 8, O>; #[doc = "Field `TX_CLK_ACTIVE` reader - I2S Tx module clock enable signal."] @@ -53,7 +53,7 @@ pub type CLK_EN_R = crate::BitReader; #[doc = "Field `CLK_EN` writer - Set this bit to enable clk gate"] pub type CLK_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TX_CLKM_CONF_SPEC, bool, O>; impl R { - #[doc = "Bits 0:7 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] + #[doc = "Bits 0:7 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] #[inline(always)] pub fn tx_clkm_div_num(&self) -> TX_CLKM_DIV_NUM_R { TX_CLKM_DIV_NUM_R::new((self.bits & 0xff) as u8) @@ -75,7 +75,7 @@ impl R { } } impl W { - #[doc = "Bits 0:7 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] + #[doc = "Bits 0:7 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] #[inline(always)] #[must_use] pub fn tx_clkm_div_num(&mut self) -> TX_CLKM_DIV_NUM_W<0> { diff --git a/esp32s3/src/i2s0/tx_clkm_div_conf.rs b/esp32s3/src/i2s0/tx_clkm_div_conf.rs index bde1d90ac9..e675169a93 100644 --- a/esp32s3/src/i2s0/tx_clkm_div_conf.rs +++ b/esp32s3/src/i2s0/tx_clkm_div_conf.rs @@ -34,68 +34,68 @@ impl From> for W { W(writer) } } -#[doc = "Field `TX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `TX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] pub type TX_CLKM_DIV_Z_R = crate::FieldReader; -#[doc = "Field `TX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `TX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] pub type TX_CLKM_DIV_Z_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `TX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `TX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] pub type TX_CLKM_DIV_Y_R = crate::FieldReader; -#[doc = "Field `TX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `TX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] pub type TX_CLKM_DIV_Y_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `TX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `TX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type TX_CLKM_DIV_X_R = crate::FieldReader; -#[doc = "Field `TX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `TX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type TX_CLKM_DIV_X_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `TX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `TX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] pub type TX_CLKM_DIV_YN1_R = crate::BitReader; -#[doc = "Field `TX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `TX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] pub type TX_CLKM_DIV_YN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, TX_CLKM_DIV_CONF_SPEC, bool, O>; impl R { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] #[inline(always)] pub fn tx_clkm_div_z(&self) -> TX_CLKM_DIV_Z_R { TX_CLKM_DIV_Z_R::new((self.bits & 0x01ff) as u16) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] pub fn tx_clkm_div_y(&self) -> TX_CLKM_DIV_Y_R { TX_CLKM_DIV_Y_R::new(((self.bits >> 9) & 0x01ff) as u16) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] pub fn tx_clkm_div_x(&self) -> TX_CLKM_DIV_X_R { TX_CLKM_DIV_X_R::new(((self.bits >> 18) & 0x01ff) as u16) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] #[inline(always)] pub fn tx_clkm_div_yn1(&self) -> TX_CLKM_DIV_YN1_R { TX_CLKM_DIV_YN1_R::new(((self.bits >> 27) & 1) != 0) } } impl W { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] #[inline(always)] #[must_use] pub fn tx_clkm_div_z(&mut self) -> TX_CLKM_DIV_Z_W<0> { TX_CLKM_DIV_Z_W::new(self) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] #[must_use] pub fn tx_clkm_div_y(&mut self) -> TX_CLKM_DIV_Y_W<9> { TX_CLKM_DIV_Y_W::new(self) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] #[must_use] pub fn tx_clkm_div_x(&mut self) -> TX_CLKM_DIV_X_W<18> { TX_CLKM_DIV_X_W::new(self) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] #[inline(always)] #[must_use] pub fn tx_clkm_div_yn1(&mut self) -> TX_CLKM_DIV_YN1_W<27> { diff --git a/esp32s3/src/i2s0/tx_conf.rs b/esp32s3/src/i2s0/tx_conf.rs index 673c5f9c41..64c00b1b2a 100644 --- a/esp32s3/src/i2s0/tx_conf.rs +++ b/esp32s3/src/i2s0/tx_conf.rs @@ -66,9 +66,9 @@ pub type TX_UPDATE_W<'a, const O: u8> = crate::BitWriter<'a, u32, TX_CONF_SPEC, pub type TX_MONO_FST_VLD_R = crate::BitReader; #[doc = "Field `TX_MONO_FST_VLD` writer - 1: The first channel data value is valid in I2S TX mono mode. 0: The second channel data value is valid in I2S TX mono mode."] pub type TX_MONO_FST_VLD_W<'a, const O: u8> = crate::BitWriter<'a, u32, TX_CONF_SPEC, bool, O>; -#[doc = "Field `TX_PCM_CONF` reader - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] +#[doc = "Field `TX_PCM_CONF` reader - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] pub type TX_PCM_CONF_R = crate::FieldReader; -#[doc = "Field `TX_PCM_CONF` writer - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] +#[doc = "Field `TX_PCM_CONF` writer - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] pub type TX_PCM_CONF_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CONF_SPEC, u8, u8, 2, O>; #[doc = "Field `TX_PCM_BYPASS` reader - Set this bit to bypass Compress/Decompress module for transmitted data."] pub type TX_PCM_BYPASS_R = crate::BitReader; @@ -146,7 +146,7 @@ impl R { pub fn tx_mono_fst_vld(&self) -> TX_MONO_FST_VLD_R { TX_MONO_FST_VLD_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bits 10:11 - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] + #[doc = "Bits 10:11 - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] #[inline(always)] pub fn tx_pcm_conf(&self) -> TX_PCM_CONF_R { TX_PCM_CONF_R::new(((self.bits >> 10) & 3) as u8) @@ -257,7 +257,7 @@ impl W { pub fn tx_mono_fst_vld(&mut self) -> TX_MONO_FST_VLD_W<9> { TX_MONO_FST_VLD_W::new(self) } - #[doc = "Bits 10:11 - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] + #[doc = "Bits 10:11 - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] #[inline(always)] #[must_use] pub fn tx_pcm_conf(&mut self) -> TX_PCM_CONF_W<10> { diff --git a/esp32s3/src/i2s1/rx_clkm_div_conf.rs b/esp32s3/src/i2s1/rx_clkm_div_conf.rs index 1ecd234883..2bd925a573 100644 --- a/esp32s3/src/i2s1/rx_clkm_div_conf.rs +++ b/esp32s3/src/i2s1/rx_clkm_div_conf.rs @@ -34,68 +34,68 @@ impl From> for W { W(writer) } } -#[doc = "Field `RX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `RX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] pub type RX_CLKM_DIV_Z_R = crate::FieldReader; -#[doc = "Field `RX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `RX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] pub type RX_CLKM_DIV_Z_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `RX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `RX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] pub type RX_CLKM_DIV_Y_R = crate::FieldReader; -#[doc = "Field `RX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `RX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] pub type RX_CLKM_DIV_Y_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `RX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `RX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type RX_CLKM_DIV_X_R = crate::FieldReader; -#[doc = "Field `RX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `RX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type RX_CLKM_DIV_X_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `RX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `RX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] pub type RX_CLKM_DIV_YN1_R = crate::BitReader; -#[doc = "Field `RX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `RX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] pub type RX_CLKM_DIV_YN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, RX_CLKM_DIV_CONF_SPEC, bool, O>; impl R { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] #[inline(always)] pub fn rx_clkm_div_z(&self) -> RX_CLKM_DIV_Z_R { RX_CLKM_DIV_Z_R::new((self.bits & 0x01ff) as u16) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] pub fn rx_clkm_div_y(&self) -> RX_CLKM_DIV_Y_R { RX_CLKM_DIV_Y_R::new(((self.bits >> 9) & 0x01ff) as u16) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] pub fn rx_clkm_div_x(&self) -> RX_CLKM_DIV_X_R { RX_CLKM_DIV_X_R::new(((self.bits >> 18) & 0x01ff) as u16) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] #[inline(always)] pub fn rx_clkm_div_yn1(&self) -> RX_CLKM_DIV_YN1_R { RX_CLKM_DIV_YN1_R::new(((self.bits >> 27) & 1) != 0) } } impl W { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_RX_CLKM_DIV_Z is (a-b)."] #[inline(always)] #[must_use] pub fn rx_clkm_div_z(&mut self) -> RX_CLKM_DIV_Z_W<0> { RX_CLKM_DIV_Z_W::new(self) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_RX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_RX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] #[must_use] pub fn rx_clkm_div_y(&mut self) -> RX_CLKM_DIV_Y_W<9> { RX_CLKM_DIV_Y_W::new(self) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_RX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_RX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] #[must_use] pub fn rx_clkm_div_x(&mut self) -> RX_CLKM_DIV_X_W<18> { RX_CLKM_DIV_X_W::new(self) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_RX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_RX_CLKM_DIV_YN1 is 1."] #[inline(always)] #[must_use] pub fn rx_clkm_div_yn1(&mut self) -> RX_CLKM_DIV_YN1_W<27> { diff --git a/esp32s3/src/i2s1/rx_conf.rs b/esp32s3/src/i2s1/rx_conf.rs index 3ff2604d3b..f5312d6c00 100644 --- a/esp32s3/src/i2s1/rx_conf.rs +++ b/esp32s3/src/i2s1/rx_conf.rs @@ -62,9 +62,9 @@ pub type RX_UPDATE_W<'a, const O: u8> = crate::BitWriter<'a, u32, RX_CONF_SPEC, pub type RX_MONO_FST_VLD_R = crate::BitReader; #[doc = "Field `RX_MONO_FST_VLD` writer - 1: The first channel data value is valid in I2S RX mono mode. 0: The second channel data value is valid in I2S RX mono mode."] pub type RX_MONO_FST_VLD_W<'a, const O: u8> = crate::BitWriter<'a, u32, RX_CONF_SPEC, bool, O>; -#[doc = "Field `RX_PCM_CONF` reader - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] +#[doc = "Field `RX_PCM_CONF` reader - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] pub type RX_PCM_CONF_R = crate::FieldReader; -#[doc = "Field `RX_PCM_CONF` writer - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] +#[doc = "Field `RX_PCM_CONF` writer - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] pub type RX_PCM_CONF_W<'a, const O: u8> = crate::FieldWriter<'a, u32, RX_CONF_SPEC, u8, u8, 2, O>; #[doc = "Field `RX_PCM_BYPASS` reader - Set this bit to bypass Compress/Decompress module for received data."] pub type RX_PCM_BYPASS_R = crate::BitReader; @@ -129,7 +129,7 @@ impl R { pub fn rx_mono_fst_vld(&self) -> RX_MONO_FST_VLD_R { RX_MONO_FST_VLD_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bits 10:11 - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] + #[doc = "Bits 10:11 - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] #[inline(always)] pub fn rx_pcm_conf(&self) -> RX_PCM_CONF_R { RX_PCM_CONF_R::new(((self.bits >> 10) & 3) as u8) @@ -224,7 +224,7 @@ impl W { pub fn rx_mono_fst_vld(&mut self) -> RX_MONO_FST_VLD_W<9> { RX_MONO_FST_VLD_W::new(self) } - #[doc = "Bits 10:11 - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] + #[doc = "Bits 10:11 - I2S RX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] #[inline(always)] #[must_use] pub fn rx_pcm_conf(&mut self) -> RX_PCM_CONF_W<10> { diff --git a/esp32s3/src/i2s1/tx_clkm_conf.rs b/esp32s3/src/i2s1/tx_clkm_conf.rs index 5e7f2e6402..dc3cad40c4 100644 --- a/esp32s3/src/i2s1/tx_clkm_conf.rs +++ b/esp32s3/src/i2s1/tx_clkm_conf.rs @@ -34,9 +34,9 @@ impl From> for W { W(writer) } } -#[doc = "Field `TX_CLKM_DIV_NUM` reader - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] +#[doc = "Field `TX_CLKM_DIV_NUM` reader - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] pub type TX_CLKM_DIV_NUM_R = crate::FieldReader; -#[doc = "Field `TX_CLKM_DIV_NUM` writer - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] +#[doc = "Field `TX_CLKM_DIV_NUM` writer - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] pub type TX_CLKM_DIV_NUM_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CLKM_CONF_SPEC, u8, u8, 8, O>; #[doc = "Field `TX_CLK_ACTIVE` reader - I2S Tx module clock enable signal."] @@ -53,7 +53,7 @@ pub type CLK_EN_R = crate::BitReader; #[doc = "Field `CLK_EN` writer - Set this bit to enable clk gate"] pub type CLK_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TX_CLKM_CONF_SPEC, bool, O>; impl R { - #[doc = "Bits 0:7 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] + #[doc = "Bits 0:7 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] #[inline(always)] pub fn tx_clkm_div_num(&self) -> TX_CLKM_DIV_NUM_R { TX_CLKM_DIV_NUM_R::new((self.bits & 0xff) as u8) @@ -75,7 +75,7 @@ impl R { } } impl W { - #[doc = "Bits 0:7 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] + #[doc = "Bits 0:7 - Integral I2S TX clock divider value. f_I2S_CLK = f_I2S_CLK_S/(N+b/a). There will be (a-b) * n-div and b * (n+1)-div. So the average combination will be: for b <= a/2, z * \\[x * n-div + (n+1)-div\\] + y * n-div. For b > a/2, z * \\[n-div + x * (n+1)-div\\] + y * (n+1)-div."] #[inline(always)] #[must_use] pub fn tx_clkm_div_num(&mut self) -> TX_CLKM_DIV_NUM_W<0> { diff --git a/esp32s3/src/i2s1/tx_clkm_div_conf.rs b/esp32s3/src/i2s1/tx_clkm_div_conf.rs index bde1d90ac9..e675169a93 100644 --- a/esp32s3/src/i2s1/tx_clkm_div_conf.rs +++ b/esp32s3/src/i2s1/tx_clkm_div_conf.rs @@ -34,68 +34,68 @@ impl From> for W { W(writer) } } -#[doc = "Field `TX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `TX_CLKM_DIV_Z` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] pub type TX_CLKM_DIV_Z_R = crate::FieldReader; -#[doc = "Field `TX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] +#[doc = "Field `TX_CLKM_DIV_Z` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] pub type TX_CLKM_DIV_Z_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `TX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `TX_CLKM_DIV_Y` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] pub type TX_CLKM_DIV_Y_R = crate::FieldReader; -#[doc = "Field `TX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] +#[doc = "Field `TX_CLKM_DIV_Y` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] pub type TX_CLKM_DIV_Y_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `TX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `TX_CLKM_DIV_X` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type TX_CLKM_DIV_X_R = crate::FieldReader; -#[doc = "Field `TX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] +#[doc = "Field `TX_CLKM_DIV_X` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] pub type TX_CLKM_DIV_X_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CLKM_DIV_CONF_SPEC, u16, u16, 9, O>; -#[doc = "Field `TX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `TX_CLKM_DIV_YN1` reader - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] pub type TX_CLKM_DIV_YN1_R = crate::BitReader; -#[doc = "Field `TX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] +#[doc = "Field `TX_CLKM_DIV_YN1` writer - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] pub type TX_CLKM_DIV_YN1_W<'a, const O: u8> = crate::BitWriter<'a, u32, TX_CLKM_DIV_CONF_SPEC, bool, O>; impl R { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] #[inline(always)] pub fn tx_clkm_div_z(&self) -> TX_CLKM_DIV_Z_R { TX_CLKM_DIV_Z_R::new((self.bits & 0x01ff) as u16) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] pub fn tx_clkm_div_y(&self) -> TX_CLKM_DIV_Y_R { TX_CLKM_DIV_Y_R::new(((self.bits >> 9) & 0x01ff) as u16) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] pub fn tx_clkm_div_x(&self) -> TX_CLKM_DIV_X_R { TX_CLKM_DIV_X_R::new(((self.bits >> 18) & 0x01ff) as u16) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] #[inline(always)] pub fn tx_clkm_div_yn1(&self) -> TX_CLKM_DIV_YN1_R { TX_CLKM_DIV_YN1_R::new(((self.bits >> 27) & 1) != 0) } } impl W { - #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] + #[doc = "Bits 0:8 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Z is b. For b > a/2, the value of I2S_TX_CLKM_DIV_Z is (a-b)."] #[inline(always)] #[must_use] pub fn tx_clkm_div_z(&mut self) -> TX_CLKM_DIV_Z_W<0> { TX_CLKM_DIV_Z_W::new(self) } - #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] + #[doc = "Bits 9:17 - For b <= a/2, the value of I2S_TX_CLKM_DIV_Y is (a%b) . For b > a/2, the value of I2S_TX_CLKM_DIV_Y is (a%(a-b))."] #[inline(always)] #[must_use] pub fn tx_clkm_div_y(&mut self) -> TX_CLKM_DIV_Y_W<9> { TX_CLKM_DIV_Y_W::new(self) } - #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] + #[doc = "Bits 18:26 - For b <= a/2, the value of I2S_TX_CLKM_DIV_X is (a/b) - 1. For b > a/2, the value of I2S_TX_CLKM_DIV_X is (a/(a-b)) - 1."] #[inline(always)] #[must_use] pub fn tx_clkm_div_x(&mut self) -> TX_CLKM_DIV_X_W<18> { TX_CLKM_DIV_X_W::new(self) } - #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] + #[doc = "Bit 27 - For b <= a/2, the value of I2S_TX_CLKM_DIV_YN1 is 0 . For b > a/2, the value of I2S_TX_CLKM_DIV_YN1 is 1."] #[inline(always)] #[must_use] pub fn tx_clkm_div_yn1(&mut self) -> TX_CLKM_DIV_YN1_W<27> { diff --git a/esp32s3/src/i2s1/tx_conf.rs b/esp32s3/src/i2s1/tx_conf.rs index 673c5f9c41..64c00b1b2a 100644 --- a/esp32s3/src/i2s1/tx_conf.rs +++ b/esp32s3/src/i2s1/tx_conf.rs @@ -66,9 +66,9 @@ pub type TX_UPDATE_W<'a, const O: u8> = crate::BitWriter<'a, u32, TX_CONF_SPEC, pub type TX_MONO_FST_VLD_R = crate::BitReader; #[doc = "Field `TX_MONO_FST_VLD` writer - 1: The first channel data value is valid in I2S TX mono mode. 0: The second channel data value is valid in I2S TX mono mode."] pub type TX_MONO_FST_VLD_W<'a, const O: u8> = crate::BitWriter<'a, u32, TX_CONF_SPEC, bool, O>; -#[doc = "Field `TX_PCM_CONF` reader - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] +#[doc = "Field `TX_PCM_CONF` reader - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] pub type TX_PCM_CONF_R = crate::FieldReader; -#[doc = "Field `TX_PCM_CONF` writer - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] +#[doc = "Field `TX_PCM_CONF` writer - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] pub type TX_PCM_CONF_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TX_CONF_SPEC, u8, u8, 2, O>; #[doc = "Field `TX_PCM_BYPASS` reader - Set this bit to bypass Compress/Decompress module for transmitted data."] pub type TX_PCM_BYPASS_R = crate::BitReader; @@ -146,7 +146,7 @@ impl R { pub fn tx_mono_fst_vld(&self) -> TX_MONO_FST_VLD_R { TX_MONO_FST_VLD_R::new(((self.bits >> 9) & 1) != 0) } - #[doc = "Bits 10:11 - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] + #[doc = "Bits 10:11 - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] #[inline(always)] pub fn tx_pcm_conf(&self) -> TX_PCM_CONF_R { TX_PCM_CONF_R::new(((self.bits >> 10) & 3) as u8) @@ -257,7 +257,7 @@ impl W { pub fn tx_mono_fst_vld(&mut self) -> TX_MONO_FST_VLD_W<9> { TX_MONO_FST_VLD_W::new(self) } - #[doc = "Bits 10:11 - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] + #[doc = "Bits 10:11 - I2S TX compress/decompress configuration bit. & 0 (atol): A-Law decompress, 1 (ltoa) : A-Law compress, 2 (utol) : u-Law decompress, 3 (ltou) : u-Law compress. &"] #[inline(always)] #[must_use] pub fn tx_pcm_conf(&mut self) -> TX_PCM_CONF_W<10> { diff --git a/esp32s3/src/lib.rs b/esp32s3/src/lib.rs index c908d1d166..3e2fcca5cf 100644 --- a/esp32s3/src/lib.rs +++ b/esp32s3/src/lib.rs @@ -1,4 +1,4 @@ -#![doc = "Peripheral access API for ESP32-S3 microcontrollers (generated using svd2rust v0.28.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.28.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] +#![doc = "Peripheral access API for ESP32-S3 microcontrollers (generated using svd2rust v0.28.0 (e6a6d15 2023-05-19))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.28.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] #![deny(dead_code)] #![deny(improper_ctypes)] #![deny(missing_docs)] diff --git a/esp32s3/src/rtc_cntl/touch_ctrl2.rs b/esp32s3/src/rtc_cntl/touch_ctrl2.rs index 9ca647ef0d..94018662a4 100644 --- a/esp32s3/src/rtc_cntl/touch_ctrl2.rs +++ b/esp32s3/src/rtc_cntl/touch_ctrl2.rs @@ -67,9 +67,9 @@ pub type TOUCH_SLP_TIMER_EN_R = crate::BitReader; #[doc = "Field `TOUCH_SLP_TIMER_EN` writer - touch timer enable bit"] pub type TOUCH_SLP_TIMER_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TOUCH_CTRL2_SPEC, bool, O>; -#[doc = "Field `TOUCH_START_FSM_EN` reader - 1: TOUCH_START & TOUCH_XPD is controlled by touch fsm"] +#[doc = "Field `TOUCH_START_FSM_EN` reader - 1: TOUCH_START & TOUCH_XPD is controlled by touch fsm"] pub type TOUCH_START_FSM_EN_R = crate::BitReader; -#[doc = "Field `TOUCH_START_FSM_EN` writer - 1: TOUCH_START & TOUCH_XPD is controlled by touch fsm"] +#[doc = "Field `TOUCH_START_FSM_EN` writer - 1: TOUCH_START & TOUCH_XPD is controlled by touch fsm"] pub type TOUCH_START_FSM_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, TOUCH_CTRL2_SPEC, bool, O>; #[doc = "Field `TOUCH_START_EN` reader - 1: start touch fsm"] @@ -144,7 +144,7 @@ impl R { pub fn touch_slp_timer_en(&self) -> TOUCH_SLP_TIMER_EN_R { TOUCH_SLP_TIMER_EN_R::new(((self.bits >> 13) & 1) != 0) } - #[doc = "Bit 14 - 1: TOUCH_START & TOUCH_XPD is controlled by touch fsm"] + #[doc = "Bit 14 - 1: TOUCH_START & TOUCH_XPD is controlled by touch fsm"] #[inline(always)] pub fn touch_start_fsm_en(&self) -> TOUCH_START_FSM_EN_R { TOUCH_START_FSM_EN_R::new(((self.bits >> 14) & 1) != 0) @@ -233,7 +233,7 @@ impl W { pub fn touch_slp_timer_en(&mut self) -> TOUCH_SLP_TIMER_EN_W<13> { TOUCH_SLP_TIMER_EN_W::new(self) } - #[doc = "Bit 14 - 1: TOUCH_START & TOUCH_XPD is controlled by touch fsm"] + #[doc = "Bit 14 - 1: TOUCH_START & TOUCH_XPD is controlled by touch fsm"] #[inline(always)] #[must_use] pub fn touch_start_fsm_en(&mut self) -> TOUCH_START_FSM_EN_W<14> { diff --git a/esp32s3/src/sens/sar_tsens_ctrl.rs b/esp32s3/src/sens/sar_tsens_ctrl.rs index 4b643e6d1d..b883c92c05 100644 --- a/esp32s3/src/sens/sar_tsens_ctrl.rs +++ b/esp32s3/src/sens/sar_tsens_ctrl.rs @@ -58,9 +58,9 @@ pub type SAR_TSENS_POWER_UP_R = crate::BitReader; #[doc = "Field `SAR_TSENS_POWER_UP` writer - temperature sensor power up"] pub type SAR_TSENS_POWER_UP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SAR_TSENS_CTRL_SPEC, bool, O>; -#[doc = "Field `SAR_TSENS_POWER_UP_FORCE` reader - 1: dump out & power up controlled by SW 0: by FSM"] +#[doc = "Field `SAR_TSENS_POWER_UP_FORCE` reader - 1: dump out & power up controlled by SW 0: by FSM"] pub type SAR_TSENS_POWER_UP_FORCE_R = crate::BitReader; -#[doc = "Field `SAR_TSENS_POWER_UP_FORCE` writer - 1: dump out & power up controlled by SW 0: by FSM"] +#[doc = "Field `SAR_TSENS_POWER_UP_FORCE` writer - 1: dump out & power up controlled by SW 0: by FSM"] pub type SAR_TSENS_POWER_UP_FORCE_W<'a, const O: u8> = crate::BitWriter<'a, u32, SAR_TSENS_CTRL_SPEC, bool, O>; #[doc = "Field `SAR_TSENS_DUMP_OUT` reader - temperature sensor dump out only active when reg_tsens_power_up_force = 1"] @@ -99,7 +99,7 @@ impl R { pub fn sar_tsens_power_up(&self) -> SAR_TSENS_POWER_UP_R { SAR_TSENS_POWER_UP_R::new(((self.bits >> 22) & 1) != 0) } - #[doc = "Bit 23 - 1: dump out & power up controlled by SW 0: by FSM"] + #[doc = "Bit 23 - 1: dump out & power up controlled by SW 0: by FSM"] #[inline(always)] pub fn sar_tsens_power_up_force(&self) -> SAR_TSENS_POWER_UP_FORCE_R { SAR_TSENS_POWER_UP_FORCE_R::new(((self.bits >> 23) & 1) != 0) @@ -135,7 +135,7 @@ impl W { pub fn sar_tsens_power_up(&mut self) -> SAR_TSENS_POWER_UP_W<22> { SAR_TSENS_POWER_UP_W::new(self) } - #[doc = "Bit 23 - 1: dump out & power up controlled by SW 0: by FSM"] + #[doc = "Bit 23 - 1: dump out & power up controlled by SW 0: by FSM"] #[inline(always)] #[must_use] pub fn sar_tsens_power_up_force(&mut self) -> SAR_TSENS_POWER_UP_FORCE_W<23> { diff --git a/esp8266/Cargo.toml b/esp8266/Cargo.toml index 5b9af623b5..fc7c220025 100644 --- a/esp8266/Cargo.toml +++ b/esp8266/Cargo.toml @@ -23,6 +23,10 @@ include = [ "device.x", ] +[lib] +bench = false +test = false + [dependencies] critical-section = { version = "1.1.1", optional = true } vcell = "0.1.3" diff --git a/esp8266/src/dport/ioswap.rs b/esp8266/src/dport/ioswap.rs index 205760a12c..d9a3556bd4 100644 --- a/esp8266/src/dport/ioswap.rs +++ b/esp8266/src/dport/ioswap.rs @@ -42,13 +42,13 @@ pub type UART_W<'a, const O: u8> = crate::BitWriter<'a, u32, IOSWAP_SPEC, bool, pub type SPI_R = crate::BitReader; #[doc = "Field `spi` writer - Swap SPI"] pub type SPI_W<'a, const O: u8> = crate::BitWriter<'a, u32, IOSWAP_SPEC, bool, O>; -#[doc = "Field `uart0` reader - Swap UART0 pins (u0rxd <-> u0cts), (u0txd <-> u0rts)"] +#[doc = "Field `uart0` reader - Swap UART0 pins (u0rxd <-> u0cts), (u0txd <-> u0rts)"] pub type UART0_R = crate::BitReader; -#[doc = "Field `uart0` writer - Swap UART0 pins (u0rxd <-> u0cts), (u0txd <-> u0rts)"] +#[doc = "Field `uart0` writer - Swap UART0 pins (u0rxd <-> u0cts), (u0txd <-> u0rts)"] pub type UART0_W<'a, const O: u8> = crate::BitWriter<'a, u32, IOSWAP_SPEC, bool, O>; -#[doc = "Field `uart1` reader - Swap UART1 pins (u1rxd <-> u1cts), (u1txd <-> u1rts)"] +#[doc = "Field `uart1` reader - Swap UART1 pins (u1rxd <-> u1cts), (u1txd <-> u1rts)"] pub type UART1_R = crate::BitReader; -#[doc = "Field `uart1` writer - Swap UART1 pins (u1rxd <-> u1cts), (u1txd <-> u1rts)"] +#[doc = "Field `uart1` writer - Swap UART1 pins (u1rxd <-> u1cts), (u1txd <-> u1rts)"] pub type UART1_W<'a, const O: u8> = crate::BitWriter<'a, u32, IOSWAP_SPEC, bool, O>; #[doc = "Field `hspi` reader - Set HSPI with higher priority"] pub type HSPI_R = crate::BitReader; @@ -73,12 +73,12 @@ impl R { pub fn spi(&self) -> SPI_R { SPI_R::new(((self.bits >> 1) & 1) != 0) } - #[doc = "Bit 2 - Swap UART0 pins (u0rxd <-> u0cts), (u0txd <-> u0rts)"] + #[doc = "Bit 2 - Swap UART0 pins (u0rxd <-> u0cts), (u0txd <-> u0rts)"] #[inline(always)] pub fn uart0(&self) -> UART0_R { UART0_R::new(((self.bits >> 2) & 1) != 0) } - #[doc = "Bit 3 - Swap UART1 pins (u1rxd <-> u1cts), (u1txd <-> u1rts)"] + #[doc = "Bit 3 - Swap UART1 pins (u1rxd <-> u1cts), (u1txd <-> u1rts)"] #[inline(always)] pub fn uart1(&self) -> UART1_R { UART1_R::new(((self.bits >> 3) & 1) != 0) @@ -112,13 +112,13 @@ impl W { pub fn spi(&mut self) -> SPI_W<1> { SPI_W::new(self) } - #[doc = "Bit 2 - Swap UART0 pins (u0rxd <-> u0cts), (u0txd <-> u0rts)"] + #[doc = "Bit 2 - Swap UART0 pins (u0rxd <-> u0cts), (u0txd <-> u0rts)"] #[inline(always)] #[must_use] pub fn uart0(&mut self) -> UART0_W<2> { UART0_W::new(self) } - #[doc = "Bit 3 - Swap UART1 pins (u1rxd <-> u1cts), (u1txd <-> u1rts)"] + #[doc = "Bit 3 - Swap UART1 pins (u1rxd <-> u1cts), (u1txd <-> u1rts)"] #[inline(always)] #[must_use] pub fn uart1(&mut self) -> UART1_W<3> { diff --git a/esp8266/src/lib.rs b/esp8266/src/lib.rs index 09bc9c4523..c87ae2453e 100644 --- a/esp8266/src/lib.rs +++ b/esp8266/src/lib.rs @@ -1,4 +1,4 @@ -#![doc = "Peripheral access API for ESP8266 microcontrollers (generated using svd2rust v0.28.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.28.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] +#![doc = "Peripheral access API for ESP8266 microcontrollers (generated using svd2rust v0.28.0 (e6a6d15 2023-05-19))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.28.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] #![deny(dead_code)] #![deny(improper_ctypes)] #![deny(missing_docs)] @@ -15,6 +15,7 @@ #![deny(while_true)] #![allow(non_camel_case_types)] #![allow(non_snake_case)] +#![doc(html_logo_url = "https://avatars.githubusercontent.com/u/46717278")] #![no_std] use core::marker::PhantomData; use core::ops::Deref; diff --git a/esp8266/src/uart0.rs b/esp8266/src/uart0.rs index e8ddd3f685..4620e40cb0 100644 --- a/esp8266/src/uart0.rs +++ b/esp8266/src/uart0.rs @@ -5,7 +5,7 @@ pub struct RegisterBlock { pub uart_fifo: UART_FIFO, #[doc = "0x04 - UART INTERRUPT RAW STATE"] pub uart_int_raw: UART_INT_RAW, - #[doc = "0x08 - UART INTERRUPT STATEREGISTERUART_INT_RAW&UART_INT_ENA"] + #[doc = "0x08 - UART INTERRUPT STATEREGISTERUART_INT_RAW&UART_INT_ENA"] pub uart_int_st: UART_INT_ST, #[doc = "0x0c - UART INTERRUPT ENABLE REGISTER"] pub uart_int_ena: UART_INT_ENA, @@ -43,7 +43,7 @@ pub type UART_INT_RAW = crate::Reg; pub mod uart_int_raw; #[doc = "UART_INT_ST (r) register accessor: an alias for `Reg`"] pub type UART_INT_ST = crate::Reg; -#[doc = "UART INTERRUPT STATEREGISTERUART_INT_RAW&UART_INT_ENA"] +#[doc = "UART INTERRUPT STATEREGISTERUART_INT_RAW&UART_INT_ENA"] pub mod uart_int_st; #[doc = "UART_INT_ENA (rw) register accessor: an alias for `Reg`"] pub type UART_INT_ENA = crate::Reg; diff --git a/esp8266/src/uart0/uart_int_st.rs b/esp8266/src/uart0/uart_int_st.rs index 11b17162cc..e5fe1019d6 100644 --- a/esp8266/src/uart0/uart_int_st.rs +++ b/esp8266/src/uart0/uart_int_st.rs @@ -78,7 +78,7 @@ impl R { RXFIFO_TOUT_INT_ST_R::new(((self.bits >> 8) & 1) != 0) } } -#[doc = "UART INTERRUPT STATEREGISTERUART_INT_RAW&UART_INT_ENA\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [uart_int_st](index.html) module"] +#[doc = "UART INTERRUPT STATEREGISTERUART_INT_RAW&UART_INT_ENA\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [uart_int_st](index.html) module"] pub struct UART_INT_ST_SPEC; impl crate::RegisterSpec for UART_INT_ST_SPEC { type Ux = u32; diff --git a/esp8266/src/uart1.rs b/esp8266/src/uart1.rs index e8ddd3f685..4620e40cb0 100644 --- a/esp8266/src/uart1.rs +++ b/esp8266/src/uart1.rs @@ -5,7 +5,7 @@ pub struct RegisterBlock { pub uart_fifo: UART_FIFO, #[doc = "0x04 - UART INTERRUPT RAW STATE"] pub uart_int_raw: UART_INT_RAW, - #[doc = "0x08 - UART INTERRUPT STATEREGISTERUART_INT_RAW&UART_INT_ENA"] + #[doc = "0x08 - UART INTERRUPT STATEREGISTERUART_INT_RAW&UART_INT_ENA"] pub uart_int_st: UART_INT_ST, #[doc = "0x0c - UART INTERRUPT ENABLE REGISTER"] pub uart_int_ena: UART_INT_ENA, @@ -43,7 +43,7 @@ pub type UART_INT_RAW = crate::Reg; pub mod uart_int_raw; #[doc = "UART_INT_ST (r) register accessor: an alias for `Reg`"] pub type UART_INT_ST = crate::Reg; -#[doc = "UART INTERRUPT STATEREGISTERUART_INT_RAW&UART_INT_ENA"] +#[doc = "UART INTERRUPT STATEREGISTERUART_INT_RAW&UART_INT_ENA"] pub mod uart_int_st; #[doc = "UART_INT_ENA (rw) register accessor: an alias for `Reg`"] pub type UART_INT_ENA = crate::Reg; diff --git a/esp8266/src/uart1/uart_int_st.rs b/esp8266/src/uart1/uart_int_st.rs index 11b17162cc..e5fe1019d6 100644 --- a/esp8266/src/uart1/uart_int_st.rs +++ b/esp8266/src/uart1/uart_int_st.rs @@ -78,7 +78,7 @@ impl R { RXFIFO_TOUT_INT_ST_R::new(((self.bits >> 8) & 1) != 0) } } -#[doc = "UART INTERRUPT STATEREGISTERUART_INT_RAW&UART_INT_ENA\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [uart_int_st](index.html) module"] +#[doc = "UART INTERRUPT STATEREGISTERUART_INT_RAW&UART_INT_ENA\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [uart_int_st](index.html) module"] pub struct UART_INT_ST_SPEC; impl crate::RegisterSpec for UART_INT_ST_SPEC { type Ux = u32; diff --git a/xtask/Cargo.lock b/xtask/Cargo.lock index bc8391cc14..41086ba71b 100644 --- a/xtask/Cargo.lock +++ b/xtask/Cargo.lock @@ -292,6 +292,15 @@ version = "0.3.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "fed44880c466736ef9a5c5b5facefb5ed0785676d0c02d612db14e54f0d84286" +[[package]] +name = "html-escape" +version = "0.2.13" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "6d1ad449764d627e22bfd7cd5e8868264fc9236e07c752972b4080cd351cb476" +dependencies = [ + "utf8-width", +] + [[package]] name = "humantime" version = "2.1.0" @@ -591,10 +600,10 @@ dependencies = [ [[package]] name = "svd2rust" version = "0.28.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "208592cbbe3726e9cafa9a802b9de2a7e959118fdb8b73ef90309f6b4d9cb86f" +source = "git+https://github.com/rust-embedded/svd2rust.git?rev=e6a6d150e480808b870a33a9032d25e3343bb656#e6a6d150e480808b870a33a9032d25e3343bb656" dependencies = [ "anyhow", + "html-escape", "inflections", "log", "proc-macro2", @@ -734,6 +743,12 @@ version = "0.1.10" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "c0edd1e5b14653f783770bce4a4dabb4a5108a5370a5f5d8cfe8710c361f6c8b" +[[package]] +name = "utf8-width" +version = "0.1.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "5190c9442dcdaf0ddd50f37420417d219ae5261bbf5db120d0f9bab996c9cba1" + [[package]] name = "utf8parse" version = "0.2.1" diff --git a/xtask/Cargo.toml b/xtask/Cargo.toml index fe2c84ba1c..852e8df05c 100644 --- a/xtask/Cargo.toml +++ b/xtask/Cargo.toml @@ -14,3 +14,6 @@ strum = { version = "0.24.1", features = ["derive"] } svd2rust = { version = "0.28.0", default-features = false } svdtools = "0.3.0" toml = "0.7.3" + +[patch.crates-io] +svd2rust = { git = "https://github.com/rust-embedded/svd2rust.git", rev = "e6a6d150e480808b870a33a9032d25e3343bb656" } diff --git a/xtask/src/main.rs b/xtask/src/main.rs index 1c1a3a1130..512fb6790b 100644 --- a/xtask/src/main.rs +++ b/xtask/src/main.rs @@ -2,7 +2,7 @@ use std::{ env, fs::{self, File}, io::Write, - path::PathBuf, + path::{Path, PathBuf}, process::{Command, Stdio}, }; @@ -92,7 +92,7 @@ fn main() -> Result<()> { Ok(()) } -fn patch_svd(chip: &str, path: &PathBuf) -> Result<()> { +fn patch_svd(chip: &str, path: &Path) -> Result<()> { let svd_path = path.join("svd"); let yaml_file = svd_path.join("patches").join(format!("{chip}.yaml")); process_file(&yaml_file)?; @@ -105,20 +105,28 @@ fn patch_svd(chip: &str, path: &PathBuf) -> Result<()> { Ok(()) } -fn generate_pac(chip: &str, path: &PathBuf) -> Result<()> { +fn generate_pac(chip: &str, path: &Path) -> Result<()> { let svd_file = path.join("svd").join(format!("{chip}.svd")); info!("generating PAC from '{}'", svd_file.display()); + let target = if get_build_target(path)?.contains("riscv") { + Target::RISCV + } else { + Target::XtensaLX + }; + let config = Config { - target: if get_build_target(path)?.contains("riscv") { - Target::RISCV - } else { - Target::XtensaLX - }, - output_dir: path.clone(), + target, + output_dir: path.to_path_buf(), const_generic: true, - ..Config::default() + ..match target { + Target::RISCV => Config { + interrupt_link_section: Some(".trap.rodata".to_owned()), + ..Config::default() + }, + _ => Config::default(), + } }; let input = fs::read_to_string(svd_file)?; @@ -176,7 +184,7 @@ fn build(path: &PathBuf) -> Result<()> { info!("building PAC using '{channel}' channel and targeting '{target}'"); Command::new("cargo") - .args(&[ + .args([ &format!("+{channel}"), "build", "-Z", @@ -192,21 +200,21 @@ fn build(path: &PathBuf) -> Result<()> { Ok(()) } -fn get_release_channel(path: &PathBuf) -> Result { +fn get_release_channel(path: &Path) -> Result { let toolchain_file = path.join("rust-toolchain.toml"); let channel = extract_toml_value(&toolchain_file, &["toolchain", "channel"])?; Ok(channel) } -fn get_build_target(path: &PathBuf) -> Result { +fn get_build_target(path: &Path) -> Result { let config_file = path.join(".cargo").join("config.toml"); let target = extract_toml_value(&config_file, &["build", "target"])?; Ok(target) } -fn extract_toml_value(path: &PathBuf, keys: &[&str]) -> Result { +fn extract_toml_value(path: &Path, keys: &[&str]) -> Result { let contents = fs::read_to_string(path)?; let value = contents.parse::()?; @@ -215,7 +223,7 @@ fn extract_toml_value(path: &PathBuf, keys: &[&str]) -> Result { item = item.get(key).unwrap(); } - let item = item.to_string().replace("\"", ""); + let item = item.to_string().replace('\"', ""); Ok(item) }