esp-rs · jessebraham · Feb 5, 2024 · Feb 5, 2024 · Feb 5, 2024
diff --git a/README.md b/README.md
@@ -92,10 +92,7 @@ Prior to opening a pull request, we ask that you please:
 
 ## MSRV
 
-The **M**inimum **S**upported **R**ust **V**ersions are:
-
-- `1.67.0` for RISC-V devices (**ESP32-C2/C3/C6**, **ESP32-H2**, **ESP32-S2/S3 RISC-V ULP coprocessors**)
-- `1.67.0` for Xtensa devices (**ESP32**, **ESP32-S2/S3**, **ESP8266**)
+The **M**inimum **S**upported **R**ust **V**ersion is `1.67.0` for all packages.
 
 Note that targeting the Xtensa ISA currently requires the use of the [esp-rs/rust] compiler fork, which can be installed using [esp-rs/espup].
 

diff --git a/esp8266/.cargo/config.toml b/esp8266/.cargo/config.toml
diff --git a/esp8266/Cargo.toml b/esp8266/Cargo.toml
diff --git a/esp8266/README.md b/esp8266/README.md
diff --git a/esp8266/build.rs b/esp8266/build.rs
diff --git a/esp8266/device.x b/esp8266/device.x
diff --git a/esp8266/rust-toolchain.toml b/esp8266/rust-toolchain.toml
diff --git a/esp8266/src/dport.rs b/esp8266/src/dport.rs
diff --git a/esp8266/src/dport/dport_ctl.rs b/esp8266/src/dport/dport_ctl.rs
diff --git a/esp8266/src/dport/edge_int_enable.rs b/esp8266/src/dport/edge_int_enable.rs