From b89932c64d858dea58229f22bf6ca4b61dcf9cdd Mon Sep 17 00:00:00 2001 From: "Dirk O. Kaar" Date: Thu, 29 Apr 2021 22:30:39 +0200 Subject: [PATCH 01/16] Pin has uint8_t, not int type. --- cores/esp8266/core_esp8266_waveform.h | 7 +++---- cores/esp8266/core_esp8266_waveform_phase.cpp | 5 +++-- cores/esp8266/core_esp8266_waveform_pwm.cpp | 17 ++++++++--------- 3 files changed, 14 insertions(+), 15 deletions(-) diff --git a/cores/esp8266/core_esp8266_waveform.h b/cores/esp8266/core_esp8266_waveform.h index d3d303f99f..040e737bf8 100644 --- a/cores/esp8266/core_esp8266_waveform.h +++ b/cores/esp8266/core_esp8266_waveform.h @@ -110,11 +110,10 @@ int stopWaveform(uint8_t pin); // Make sure the CB function has the IRAM_ATTR decorator. void setTimer1Callback(uint32_t (*fn)()); - // Internal-only calls, not for applications -extern void _setPWMFreq(uint32_t freq); -extern bool _stopPWM(uint8_t pin); -extern bool _setPWM(int pin, uint32_t val, uint32_t range); +void _setPWMFreq(uint32_t freq); +bool _stopPWM(uint8_t pin); +bool _setPWM(uint8_t pin, uint32_t val, uint32_t range); #ifdef __cplusplus } diff --git a/cores/esp8266/core_esp8266_waveform_phase.cpp b/cores/esp8266/core_esp8266_waveform_phase.cpp index 4240ccb3c1..966f4bb546 100644 --- a/cores/esp8266/core_esp8266_waveform_phase.cpp +++ b/cores/esp8266/core_esp8266_waveform_phase.cpp @@ -55,8 +55,8 @@ extern "C" void enablePhaseLockedWaveform (void) // No-op calls to override the PWM implementation extern "C" void _setPWMFreq_weak(uint32_t freq) { (void) freq; } -extern "C" IRAM_ATTR bool _stopPWM_weak(int pin) { (void) pin; return false; } -extern "C" bool _setPWM_weak(int pin, uint32_t val, uint32_t range) { (void) pin; (void) val; (void) range; return false; } +extern "C" IRAM_ATTR bool _stopPWM_weak(uint8_t pin) { (void) pin; return false; } +extern "C" bool _setPWM_weak(uint8_t pin, uint32_t val, uint32_t range) { (void) pin; (void) val; (void) range; return false; } // Timer is 80MHz fixed. 160MHz CPU frequency need scaling. @@ -116,6 +116,7 @@ static IRAM_ATTR void timer1Interrupt(); // Non-speed critical bits #pragma GCC optimize ("Os") +static void initTimer() __attribute__((noinline)); static void initTimer() { timer1_disable(); ETS_FRC_TIMER1_INTR_ATTACH(NULL, NULL); diff --git a/cores/esp8266/core_esp8266_waveform_pwm.cpp b/cores/esp8266/core_esp8266_waveform_pwm.cpp index f85ccb76aa..f232302b49 100644 --- a/cores/esp8266/core_esp8266_waveform_pwm.cpp +++ b/cores/esp8266/core_esp8266_waveform_pwm.cpp @@ -97,7 +97,7 @@ static WVFState wvfState; static IRAM_ATTR void timer1Interrupt(); static bool timerRunning = false; -static __attribute__((noinline)) void initTimer() { +static void initTimer() { if (!timerRunning) { timer1_disable(); ETS_FRC_TIMER1_INTR_ATTACH(NULL, NULL); @@ -169,8 +169,7 @@ static IRAM_ATTR void _notifyPWM(PWMState *p, bool idle) { } } -static void _addPWMtoList(PWMState &p, int pin, uint32_t val, uint32_t range); - +static void _addPWMtoList(PWMState &p, uint8_t pin, uint32_t val, uint32_t range); // Called when analogWriteFreq() changed to update the PWM total period extern void _setPWMFreq_weak(uint32_t freq) __attribute__((weak)); @@ -216,7 +215,7 @@ void _setPWMFreq(uint32_t freq) { // Helper routine to remove an entry from the state machine // and clean up any marked-off entries -static void _cleanAndRemovePWM(PWMState *p, int pin) { +static void _cleanAndRemovePWM(PWMState *p, uint8_t pin) { uint32_t leftover = 0; uint32_t in, out; for (in = 0, out = 0; in < p->cnt; in++) { @@ -265,7 +264,7 @@ IRAM_ATTR bool _stopPWM(uint8_t pin) { return _stopPWM_bound(pin); } -static void _addPWMtoList(PWMState &p, int pin, uint32_t val, uint32_t range) { +static void _addPWMtoList(PWMState &p, uint8_t pin, uint32_t val, uint32_t range) { // Stash the val and range so we can re-evaluate the fraction // should the user change PWM frequency. This allows us to // give as great a precision as possible. We know by construction @@ -311,8 +310,8 @@ static void _addPWMtoList(PWMState &p, int pin, uint32_t val, uint32_t range) { } // Called by analogWrite(1...99%) to set the PWM duty in clock cycles -extern bool _setPWM_weak(int pin, uint32_t val, uint32_t range) __attribute__((weak)); -bool _setPWM_weak(int pin, uint32_t val, uint32_t range) { +extern bool _setPWM_weak(uint8_t pin, uint32_t val, uint32_t range) __attribute__((weak)); +bool _setPWM_weak(uint8_t pin, uint32_t val, uint32_t range) { stopWaveform(pin); PWMState p; // Working copy p = pwmState; @@ -342,8 +341,8 @@ bool _setPWM_weak(int pin, uint32_t val, uint32_t range) { return true; } -static bool _setPWM_bound(int pin, uint32_t val, uint32_t range) __attribute__((weakref("_setPWM_weak"))); -bool _setPWM(int pin, uint32_t val, uint32_t range) { +static bool _setPWM_bound(uint8_t pin, uint32_t val, uint32_t range) __attribute__((weakref("_setPWM_weak"))); +bool _setPWM(uint8_t pin, uint32_t val, uint32_t range) { return _setPWM_bound(pin, val, range); } From 2776d16836f9356fb0847518219d04c29e47ffc8 Mon Sep 17 00:00:00 2001 From: "Dirk O. Kaar" Date: Thu, 29 Apr 2021 22:51:08 +0200 Subject: [PATCH 02/16] Can't image stopWaveform is called but PWM shall not stop. startWaveform already implied stopping PWM before. --- cores/esp8266/Tone.cpp | 5 ----- cores/esp8266/core_esp8266_waveform_pwm.cpp | 3 +++ cores/esp8266/core_esp8266_wiring_digital.cpp | 1 - 3 files changed, 3 insertions(+), 6 deletions(-) diff --git a/cores/esp8266/Tone.cpp b/cores/esp8266/Tone.cpp index b4dc93c642..601b1df51d 100644 --- a/cores/esp8266/Tone.cpp +++ b/cores/esp8266/Tone.cpp @@ -30,11 +30,6 @@ static void _startTone(uint8_t _pin, uint32_t high, uint32_t low, uint32_t durat return; } - // Stop any analogWrites (PWM) because they are a different generator - _stopPWM(_pin); - // If there's another Tone or startWaveform on this pin - // it will be changed on-the-fly (no need to stop it) - pinMode(_pin, OUTPUT); high = std::max(high, (uint32_t)microsecondsToClockCycles(25)); // new 20KHz maximum tone frequency, diff --git a/cores/esp8266/core_esp8266_waveform_pwm.cpp b/cores/esp8266/core_esp8266_waveform_pwm.cpp index f232302b49..a2664f98bf 100644 --- a/cores/esp8266/core_esp8266_waveform_pwm.cpp +++ b/cores/esp8266/core_esp8266_waveform_pwm.cpp @@ -435,6 +435,9 @@ IRAM_ATTR int stopWaveform_weak(uint8_t pin) { if (!timerRunning) { return false; } + + _stopPWM(pin); // Make sure there's no PWM live here + // If user sends in a pin >16 but <32, this will always point to a 0 bit // If they send >=32, then the shift will result in 0 and it will also return false uint32_t mask = 1< Date: Sun, 2 May 2021 11:50:10 +0200 Subject: [PATCH 03/16] let analogWrite coexist with open-drain mode --- cores/esp8266/core_esp8266_wiring_digital.cpp | 2 +- cores/esp8266/core_esp8266_wiring_pwm.cpp | 26 ++++++++++++------- libraries/Servo/src/Servo.cpp | 3 +-- 3 files changed, 18 insertions(+), 13 deletions(-) diff --git a/cores/esp8266/core_esp8266_wiring_digital.cpp b/cores/esp8266/core_esp8266_wiring_digital.cpp index 015c21bdbf..b04310dc74 100644 --- a/cores/esp8266/core_esp8266_wiring_digital.cpp +++ b/cores/esp8266/core_esp8266_wiring_digital.cpp @@ -82,7 +82,7 @@ extern void __pinMode(uint8_t pin, uint8_t mode) { } extern void IRAM_ATTR __digitalWrite(uint8_t pin, uint8_t val) { - stopWaveform(pin); // Disable any Tone or startWaveform on this pin + stopWaveform(pin); // Disable any Tone, startWaveform, or analogWrite on this pin if(pin < 16){ if(val) GPOS = (1 << pin); else GPOC = (1 << pin); diff --git a/cores/esp8266/core_esp8266_wiring_pwm.cpp b/cores/esp8266/core_esp8266_wiring_pwm.cpp index 5bd5416d70..8ab0f296a1 100644 --- a/cores/esp8266/core_esp8266_wiring_pwm.cpp +++ b/cores/esp8266/core_esp8266_wiring_pwm.cpp @@ -44,7 +44,14 @@ extern void __analogWriteFreq(uint32_t freq) { } extern void __analogWrite(uint8_t pin, int val) { - analogWriteMode(pin, val, false); + if (pin > 16) { + return; + } + bool openDrain = false; + if (analogMap & 1UL << pin) { + openDrain = GPC(pin) & (1 << GPCD); + } + analogWriteMode(pin, val, openDrain); } extern void __analogWriteMode(uint8_t pin, int val, bool openDrain) { @@ -59,23 +66,22 @@ extern void __analogWriteMode(uint8_t pin, int val, bool openDrain) { } if (analogMap & 1UL << pin) { - // Per the Arduino docs at https://www.arduino.cc/reference/en/language/functions/analog-io/analogwrite/ - // val: the duty cycle: between 0 (always off) and 255 (always on). - // So if val = 0 we have digitalWrite(LOW), if we have val==range we have digitalWrite(HIGH) - analogMap &= ~(1 << pin); + const bool isOpenDrain = GPC(pin) & (1 << GPCD); + if (isOpenDrain != openDrain) { + GPC(pin) ^= (1 << GPCD); + } } else { - if(openDrain) { - pinMode(pin, OUTPUT_OPEN_DRAIN); - } else { - pinMode(pin, OUTPUT); - } + pinMode(pin, openDrain ? OUTPUT_OPEN_DRAIN : OUTPUT); } uint32_t high = (analogPeriod * val) / analogScale; uint32_t low = analogPeriod - high; // Find the first GPIO being generated by checking GCC's find-first-set (returns 1 + the bit of the first 1 in an int32_t) int phaseReference = __builtin_ffs(analogMap) - 1; + // Per the Arduino docs at https://www.arduino.cc/reference/en/language/functions/analog-io/analogwrite/ + // val: the duty cycle: between 0 (always off) and 255 (always on). + // So if val = 0 we have digitalWrite(LOW), if we have val==range we have digitalWrite(HIGH) if (_setPWM(pin, val, analogScale)) { analogMap |= (1 << pin); } else if (startWaveformClockCycles(pin, high, low, 0, phaseReference, 0, true)) { diff --git a/libraries/Servo/src/Servo.cpp b/libraries/Servo/src/Servo.cpp index 1d19f62683..f5c410083b 100644 --- a/libraries/Servo/src/Servo.cpp +++ b/libraries/Servo/src/Servo.cpp @@ -116,8 +116,7 @@ void Servo::writeMicroseconds(int value) _servoMap &= ~(1 << _pin); // Find the first GPIO being generated by checking GCC's find-first-set (returns 1 + the bit of the first 1 in an int32_t) int phaseReference = __builtin_ffs(_servoMap) - 1; - if (startWaveform(_pin, _valueUs, REFRESH_INTERVAL - _valueUs, 0, phaseReference)) - { + if (startWaveform(_pin, _valueUs, REFRESH_INTERVAL - _valueUs, 0, phaseReference)) { _servoMap |= (1 << _pin); } } From 36b2bd3dd248cb2a011b83ace0784297603d41a1 Mon Sep 17 00:00:00 2001 From: "Dirk O. Kaar" Date: Sun, 2 May 2021 12:40:33 +0200 Subject: [PATCH 04/16] Don't force timer on PWM update as this is pulled by ISR, but only implemented on next PWM period begin anyway. --- cores/esp8266/core_esp8266_waveform_pwm.cpp | 45 +++++++++++---------- 1 file changed, 23 insertions(+), 22 deletions(-) diff --git a/cores/esp8266/core_esp8266_waveform_pwm.cpp b/cores/esp8266/core_esp8266_waveform_pwm.cpp index a2664f98bf..3402159ee9 100644 --- a/cores/esp8266/core_esp8266_waveform_pwm.cpp +++ b/cores/esp8266/core_esp8266_waveform_pwm.cpp @@ -128,7 +128,7 @@ static IRAM_ATTR void forceTimerInterrupt() { constexpr int maxPWMs = 8; // PWM machine state -typedef struct PWMState { +struct PWMState { uint32_t mask; // Bitmask of active pins uint32_t cnt; // How many entries uint32_t idx; // Where the state machine is along the list @@ -136,13 +136,12 @@ typedef struct PWMState { uint32_t delta[maxPWMs + 1]; uint32_t nextServiceCycle; // Clock cycle for next step struct PWMState *pwmUpdate; // Set by main code, cleared by ISR -} PWMState; +}; static PWMState pwmState; static uint32_t _pwmFreq = 1000; static uint32_t _pwmPeriod = microsecondsToClockCycles(1000000UL) / _pwmFreq; - // If there are no more scheduled activities, shut down Timer 1. // Otherwise, do nothing. static IRAM_ATTR void disableIdleTimer() { @@ -158,6 +157,7 @@ static IRAM_ATTR void disableIdleTimer() { // Wait for mailbox to be emptied (either busy or delay() as needed) static IRAM_ATTR void _notifyPWM(PWMState *p, bool idle) { p->pwmUpdate = nullptr; + MEMBARRIER(); pwmState.pwmUpdate = p; MEMBARRIER(); forceTimerInterrupt(); @@ -242,8 +242,7 @@ IRAM_ATTR bool _stopPWM_weak(uint8_t pin) { return false; // Pin not actually active } - PWMState p; // The working copy since we can't edit the one in use - p = pwmState; + PWMState p = pwmState; // The working copy since we can't edit the one in use // In _stopPWM we just clear the mask but keep everything else // untouched to save IRAM. The main startPWM will handle cleanup. @@ -264,7 +263,7 @@ IRAM_ATTR bool _stopPWM(uint8_t pin) { return _stopPWM_bound(pin); } -static void _addPWMtoList(PWMState &p, uint8_t pin, uint32_t val, uint32_t range) { +static void _addPWMtoList(PWMState& p, uint8_t pin, uint32_t val, uint32_t range) { // Stash the val and range so we can re-evaluate the fraction // should the user change PWM frequency. This allows us to // give as great a precision as possible. We know by construction @@ -278,7 +277,8 @@ static void _addPWMtoList(PWMState &p, uint8_t pin, uint32_t val, uint32_t range // Clip to sane values in the case we go from OK to not-OK when adjusting frequencies if (cc == 0) { cc = 1; - } else if (cc >= _pwmPeriod) { + } + else if (cc >= _pwmPeriod) { cc = _pwmPeriod - 1; } @@ -286,9 +286,10 @@ static void _addPWMtoList(PWMState &p, uint8_t pin, uint32_t val, uint32_t range // Starting up from scratch, special case 1st element and PWM period p.pin[0] = pin; p.delta[0] = cc; - // Final pin is never used: p.pin[1] = 0xff; + // Final pin is never used: p.pin[1] = 0xff; p.delta[1] = _pwmPeriod - cc; - } else { + } + else { uint32_t ttl = 0; uint32_t i; // Skip along until we're at the spot to insert @@ -532,39 +533,39 @@ static IRAM_ATTR void timer1Interrupt() { // PWM state machine implementation if (pwmState.cnt) { - int32_t cyclesToGo; + int32_t pwmCyclesToGo; do { - cyclesToGo = pwmState.nextServiceCycle - GetCycleCountIRQ(); - if (cyclesToGo < 0) { + pwmCyclesToGo = pwmState.nextServiceCycle - GetCycleCountIRQ(); + if (pwmCyclesToGo <= 0) { if (pwmState.idx == pwmState.cnt) { // Start of pulses, possibly copy new if (pwmState.pwmUpdate) { // Do the memory copy from temp to global and clear mailbox - pwmState = *(PWMState*)pwmState.pwmUpdate; + pwmState = *pwmState.pwmUpdate; } GPOS = pwmState.mask; // Set all active pins high if (pwmState.mask & (1<<16)) { GP16O = 1; } pwmState.idx = 0; - } else { + } + else { do { // Drop the pin at this edge - if (pwmState.mask & (1< Date: Sun, 2 May 2021 15:27:35 +0200 Subject: [PATCH 05/16] Correct shutdown sequence for phase-sync waveform generator in analogWrite. --- cores/esp8266/core_esp8266_wiring_pwm.cpp | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/cores/esp8266/core_esp8266_wiring_pwm.cpp b/cores/esp8266/core_esp8266_wiring_pwm.cpp index 8ab0f296a1..5fc6e026e8 100644 --- a/cores/esp8266/core_esp8266_wiring_pwm.cpp +++ b/cores/esp8266/core_esp8266_wiring_pwm.cpp @@ -83,9 +83,18 @@ extern void __analogWriteMode(uint8_t pin, int val, bool openDrain) { // val: the duty cycle: between 0 (always off) and 255 (always on). // So if val = 0 we have digitalWrite(LOW), if we have val==range we have digitalWrite(HIGH) if (_setPWM(pin, val, analogScale)) { - analogMap |= (1 << pin); - } else if (startWaveformClockCycles(pin, high, low, 0, phaseReference, 0, true)) { - analogMap |= (1 << pin); + if (val > 0 && val < analogScale) analogMap |= (1 << pin); + } else { + const bool detach = (val == 0 || val == analogScale); + // To go steady LOW or HIGH, let the waveform run into next duty cycle, if any. Then stop. + if (startWaveformClockCycles(pin, high, low, static_cast(detach), phaseReference, 0, true)) { + if (detach) { + delay((1000 + analogFreq) / analogFreq); + stopWaveform(pin); + } else { + analogMap |= (1 << pin); + } + } } } From 293f767b4ca6b0b3bbbe08defdd7ddf07282e127 Mon Sep 17 00:00:00 2001 From: "Dirk O. Kaar" Date: Mon, 3 May 2021 10:49:59 +0200 Subject: [PATCH 06/16] Correction to IRQ latency and ISR delta logic. --- cores/esp8266/core_esp8266_waveform_phase.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cores/esp8266/core_esp8266_waveform_phase.cpp b/cores/esp8266/core_esp8266_waveform_phase.cpp index 966f4bb546..1dd4a98643 100644 --- a/cores/esp8266/core_esp8266_waveform_phase.cpp +++ b/cores/esp8266/core_esp8266_waveform_phase.cpp @@ -309,7 +309,7 @@ static IRAM_ATTR void timer1Interrupt() { uint32_t now = ESP.getCycleCount(); uint32_t isrNextEventCcy = now; while (busyPins) { - if (static_cast(isrNextEventCcy - now) > IRQLATENCYCCYS) { + if (static_cast(isrNextEventCcy - now) > IRQLATENCYCCYS + DELTAIRQCCYS) { waveform.nextEventCcy = isrNextEventCcy; break; } From 50ded373f982119b7190c8b81ace55ba0e65ecdb Mon Sep 17 00:00:00 2001 From: "Dirk O. Kaar" Date: Mon, 3 May 2021 11:20:29 +0200 Subject: [PATCH 07/16] Early firing the ISR causes interruption to other waveforms, let it pick up new starts at next regular interval. --- cores/esp8266/core_esp8266_waveform_phase.cpp | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/cores/esp8266/core_esp8266_waveform_phase.cpp b/cores/esp8266/core_esp8266_waveform_phase.cpp index 1dd4a98643..3e3dae89f0 100644 --- a/cores/esp8266/core_esp8266_waveform_phase.cpp +++ b/cores/esp8266/core_esp8266_waveform_phase.cpp @@ -195,10 +195,7 @@ int startWaveformClockCycles_weak(uint8_t pin, uint32_t highCcys, uint32_t lowCc if (!waveform.timer1Running) { initTimer(); } - else if (T1V > IRQLATENCYCCYS) { - // Must not interfere if Timer is due shortly - timer1_write(IRQLATENCYCCYS); - } + // The ISR pulls updates on next PWM interval } else { wave.mode = WaveformMode::INFINITE; // turn off possible expiry to make update atomic from NMI From f17ba7fb39ce364c400bca0d4e6f62eac99cf8a3 Mon Sep 17 00:00:00 2001 From: "Dirk O. Kaar" Date: Mon, 3 May 2021 15:20:20 +0200 Subject: [PATCH 08/16] Stopping of the same pin always wins over starting. --- cores/esp8266/core_esp8266_waveform_phase.cpp | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/cores/esp8266/core_esp8266_waveform_phase.cpp b/cores/esp8266/core_esp8266_waveform_phase.cpp index 3e3dae89f0..c56bacabdf 100644 --- a/cores/esp8266/core_esp8266_waveform_phase.cpp +++ b/cores/esp8266/core_esp8266_waveform_phase.cpp @@ -78,7 +78,7 @@ constexpr int32_t DELTAIRQCCYS = ISCPUFREQ160MHZ ? enum class WaveformMode : uint8_t {INFINITE = 0, EXPIRES = 1, UPDATEEXPIRY = 2, INIT = 3}; // Waveform generator can create tones, PWM, and servos -typedef struct { +struct Waveform { uint32_t nextPeriodCcy; // ESP clock cycle when a period begins. If WaveformMode::INIT, temporarily holds positive phase offset ccy count uint32_t endDutyCcy; // ESP clock cycle when going from duty to off int32_t dutyCcys; // Set next off cycle at low->high to maintain phase @@ -88,7 +88,7 @@ typedef struct { WaveformMode mode; int8_t alignPhase; // < 0 no phase alignment, otherwise starts waveform in relative phase offset to given pin bool autoPwm; // perform PWM duty to idle cycle ratio correction under high load at the expense of precise timings -} Waveform; +}; namespace { @@ -116,7 +116,6 @@ static IRAM_ATTR void timer1Interrupt(); // Non-speed critical bits #pragma GCC optimize ("Os") -static void initTimer() __attribute__((noinline)); static void initTimer() { timer1_disable(); ETS_FRC_TIMER1_INTR_ATTACH(NULL, NULL); @@ -126,7 +125,7 @@ static void initTimer() { timer1_write(IRQLATENCYCCYS); // Cause an interrupt post-haste } -static void IRAM_ATTR deinitTimer() { +static IRAM_ATTR void deinitTimer() { ETS_FRC_TIMER1_NMI_INTR_ATTACH(NULL); timer1_disable(); timer1_isr_init(); @@ -195,7 +194,7 @@ int startWaveformClockCycles_weak(uint8_t pin, uint32_t highCcys, uint32_t lowCc if (!waveform.timer1Running) { initTimer(); } - // The ISR pulls updates on next PWM interval + // The ISR pulls updates on the next waveform interval } else { wave.mode = WaveformMode::INFINITE; // turn off possible expiry to make update atomic from NMI @@ -265,7 +264,7 @@ static IRAM_ATTR void timer1Interrupt() { const bool isCPU2X = CPU2X & 1; if ((waveform.toSetBits && !(waveform.enabled & waveform.toSetBits)) || waveform.toDisableBits) { // Handle enable/disable requests from main app. - waveform.enabled = (waveform.enabled & ~waveform.toDisableBits) | waveform.toSetBits; // Set the requested waveforms on/off + waveform.enabled = (waveform.enabled | waveform.toSetBits) & ~waveform.toDisableBits; // Set the requested waveforms on/off // Find the first GPIO being generated by checking GCC's find-first-set (returns 1 + the bit of the first 1 in an int32_t) waveform.toDisableBits = 0; } From 5de25bde5e3a947bc6f0f275ba6725451f5f8ef8 Mon Sep 17 00:00:00 2001 From: "Dirk O. Kaar" Date: Wed, 19 May 2021 10:17:54 +0200 Subject: [PATCH 09/16] Clean code. --- cores/esp8266/core_esp8266_wiring_pwm.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/cores/esp8266/core_esp8266_wiring_pwm.cpp b/cores/esp8266/core_esp8266_wiring_pwm.cpp index 5fc6e026e8..07eac4e907 100644 --- a/cores/esp8266/core_esp8266_wiring_pwm.cpp +++ b/cores/esp8266/core_esp8266_wiring_pwm.cpp @@ -83,7 +83,9 @@ extern void __analogWriteMode(uint8_t pin, int val, bool openDrain) { // val: the duty cycle: between 0 (always off) and 255 (always on). // So if val = 0 we have digitalWrite(LOW), if we have val==range we have digitalWrite(HIGH) if (_setPWM(pin, val, analogScale)) { - if (val > 0 && val < analogScale) analogMap |= (1 << pin); + if (val > 0 && val < analogScale) { + analogMap |= (1 << pin); + } } else { const bool detach = (val == 0 || val == analogScale); // To go steady LOW or HIGH, let the waveform run into next duty cycle, if any. Then stop. From 6dbd371a0324b160b81353a5d3af9f2db793d854 Mon Sep 17 00:00:00 2001 From: "Dirk O. Kaar" Date: Mon, 31 May 2021 17:57:42 +0200 Subject: [PATCH 10/16] Prevent initial bad clock drift calculation on timer init. --- cores/esp8266/core_esp8266_waveform_phase.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/cores/esp8266/core_esp8266_waveform_phase.cpp b/cores/esp8266/core_esp8266_waveform_phase.cpp index c56bacabdf..9d200fa56c 100644 --- a/cores/esp8266/core_esp8266_waveform_phase.cpp +++ b/cores/esp8266/core_esp8266_waveform_phase.cpp @@ -122,6 +122,7 @@ static void initTimer() { ETS_FRC_TIMER1_NMI_INTR_ATTACH(timer1Interrupt); timer1_enable(TIM_DIV1, TIM_EDGE, TIM_SINGLE); waveform.timer1Running = true; + waveform.nextEventCcy = ESP.getCycleCount() + IRQLATENCYCCYS; timer1_write(IRQLATENCYCCYS); // Cause an interrupt post-haste } @@ -229,6 +230,7 @@ IRAM_ATTR int stopWaveform_weak(uint8_t pin) { std::atomic_thread_fence(std::memory_order_release); // Must not interfere if Timer is due shortly if (T1V > IRQLATENCYCCYS) { + waveform.nextEventCcy = ESP.getCycleCount() + IRQLATENCYCCYS; timer1_write(IRQLATENCYCCYS); } while (waveform.toDisableBits) { From d8893b09c886c089e5bc7c6b8fb366c66c7fd2a2 Mon Sep 17 00:00:00 2001 From: "Dirk O. Kaar" Date: Sun, 6 Jun 2021 11:05:35 +0200 Subject: [PATCH 11/16] stopWaveform in _setPWM caused unconditional _stopPWM. --- cores/esp8266/core_esp8266_waveform_pwm.cpp | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/cores/esp8266/core_esp8266_waveform_pwm.cpp b/cores/esp8266/core_esp8266_waveform_pwm.cpp index 3402159ee9..5fd3925703 100644 --- a/cores/esp8266/core_esp8266_waveform_pwm.cpp +++ b/cores/esp8266/core_esp8266_waveform_pwm.cpp @@ -160,7 +160,9 @@ static IRAM_ATTR void _notifyPWM(PWMState *p, bool idle) { MEMBARRIER(); pwmState.pwmUpdate = p; MEMBARRIER(); - forceTimerInterrupt(); + if (idle) { + forceTimerInterrupt(); + } while (pwmState.pwmUpdate) { if (idle) { esp_yield(); @@ -313,7 +315,10 @@ static void _addPWMtoList(PWMState& p, uint8_t pin, uint32_t val, uint32_t range // Called by analogWrite(1...99%) to set the PWM duty in clock cycles extern bool _setPWM_weak(uint8_t pin, uint32_t val, uint32_t range) __attribute__((weak)); bool _setPWM_weak(uint8_t pin, uint32_t val, uint32_t range) { - stopWaveform(pin); + const uint32_t mask = 1<16 but <32, this will always point to a 0 bit // If they send >=32, then the shift will result in 0 and it will also return false - uint32_t mask = 1< Date: Sat, 10 Dec 2022 23:25:54 +0100 Subject: [PATCH 12/16] Prevent inlining of `initTimer()` --- cores/esp8266/core_esp8266_waveform_pwm.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cores/esp8266/core_esp8266_waveform_pwm.cpp b/cores/esp8266/core_esp8266_waveform_pwm.cpp index 5fd3925703..6c591366f5 100644 --- a/cores/esp8266/core_esp8266_waveform_pwm.cpp +++ b/cores/esp8266/core_esp8266_waveform_pwm.cpp @@ -97,7 +97,7 @@ static WVFState wvfState; static IRAM_ATTR void timer1Interrupt(); static bool timerRunning = false; -static void initTimer() { +static __attribute__((noinline)) void initTimer() { if (!timerRunning) { timer1_disable(); ETS_FRC_TIMER1_INTR_ATTACH(NULL, NULL); From a1ffcbdac6de2b6f237b4ea831014ee03087214d Mon Sep 17 00:00:00 2001 From: "Dirk O. Kaar" Date: Mon, 3 May 2021 11:30:03 +0200 Subject: [PATCH 13/16] Merge PWM code and updated generic phase-locking waveform code into unified ISR. --- cores/esp8266/core_esp8266_waveform.cpp | 732 ++++++++++++++++++ cores/esp8266/core_esp8266_waveform.h | 30 +- cores/esp8266/core_esp8266_waveform_phase.cpp | 443 ----------- cores/esp8266/core_esp8266_waveform_pwm.cpp | 675 ---------------- 4 files changed, 735 insertions(+), 1145 deletions(-) create mode 100644 cores/esp8266/core_esp8266_waveform.cpp delete mode 100644 cores/esp8266/core_esp8266_waveform_phase.cpp delete mode 100644 cores/esp8266/core_esp8266_waveform_pwm.cpp diff --git a/cores/esp8266/core_esp8266_waveform.cpp b/cores/esp8266/core_esp8266_waveform.cpp new file mode 100644 index 0000000000..66f20552f1 --- /dev/null +++ b/cores/esp8266/core_esp8266_waveform.cpp @@ -0,0 +1,732 @@ +/* + esp8266_waveform - General purpose waveform generation and control, + supporting outputs on all pins in parallel. + + Copyright (c) 2018 Earle F. Philhower, III. All rights reserved. + Copyright (c) 2020 Dirk O. Kaar. + + The core idea is to have a programmable waveform generator with a unique + high and low period (defined in microseconds or CPU clock cycles). TIMER1 + is set to 1-shot mode and is always loaded with the time until the next + edge of any live waveforms. + + Up to one waveform generator per pin supported. + + Each waveform generator is synchronized to the ESP clock cycle counter, not + the timer. This allows for removing interrupt jitter and delay as the + counter always increments once per 80MHz clock. Changes to a waveform are + contiguous and only take effect on the next waveform transition, + allowing for smooth transitions. + + This replaces older tone(), analogWrite(), and the Servo classes. + + Everywhere in the code where "ccy" or "ccys" is used, it means ESP.getCycleCount() + clock cycle count, or an interval measured in CPU clock cycles, but not + TIMER1 cycles (which may be 2 CPU clock cycles @ 160MHz). + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +#include "core_esp8266_waveform.h" +#include +#include "debug.h" +#include "ets_sys.h" +#include + +// Timer is 80MHz fixed. 160MHz CPU frequency need scaling. +constexpr bool ISCPUFREQ160MHZ = clockCyclesPerMicrosecond() == 160; +// Maximum delay between IRQs, Timer1, <= 2^23 / 80MHz +constexpr int32_t MAXIRQTICKSCCYS = microsecondsToClockCycles(10000); +// Maximum servicing time for any single IRQ +constexpr uint32_t ISRTIMEOUTCCYS = microsecondsToClockCycles(18); +// The latency between in-ISR rearming of the timer and the earliest firing +constexpr int32_t IRQLATENCYCCYS = microsecondsToClockCycles(2); +// The SDK and hardware take some time to actually get to our NMI code +constexpr int32_t DELTAIRQCCYS = ISCPUFREQ160MHZ ? + microsecondsToClockCycles(2) >> 1 : microsecondsToClockCycles(2); + +// for INFINITE, the NMI proceeds on the waveform without expiry deadline. +// for EXPIRES, the NMI expires the waveform automatically on the expiry ccy. +// for UPDATEEXPIRY, the NMI recomputes the exact expiry ccy and transitions to EXPIRES. +// for INIT, the NMI initializes nextPeriodCcy, and if expiryCcy != 0 includes UPDATEEXPIRY. +enum class WaveformMode : uint8_t {INFINITE = 0, EXPIRES = 1, UPDATEEXPIRY = 2, INIT = 3}; + +// Waveform generator can create tones, PWM, and servos +struct Waveform { + uint32_t nextPeriodCcy; // ESP clock cycle when a period begins. If WaveformMode::INIT, temporarily holds positive phase offset ccy count + uint32_t endDutyCcy; // ESP clock cycle when going from duty to off + int32_t dutyCcys; // Set next off cycle at low->high to maintain phase + int32_t adjDutyCcys; // Temporary correction for next period + int32_t periodCcys; // Set next phase cycle at low->high to maintain phase + uint32_t expiryCcy; // For time-limited waveform, the CPU clock cycle when this waveform must stop. If WaveformMode::UPDATE, temporarily holds relative ccy count + WaveformMode mode; + int8_t alignPhase; // < 0 no phase alignment, otherwise starts waveform in relative phase offset to given pin + bool autoPwm; // perform PWM duty to idle cycle ratio correction under high load at the expense of precise timings +}; + +namespace { + + static struct { + Waveform pins[17]; // State of all possible pins + uint32_t states = 0; // Is the pin high or low, updated in NMI so no access outside the NMI code + uint32_t enabled = 0; // Is it actively running, updated in NMI so no access outside the NMI code + + // Enable lock-free by only allowing updates to waveform.states and waveform.enabled from IRQ service routine + int32_t toSetBits = 0; // Message to the NMI handler to start/modify exactly one waveform + int32_t toDisableBits = 0; // Message to the NMI handler to disable exactly one pin from waveform generation + + uint32_t(*timer1CB)() = nullptr; + + bool timer1Running = false; + + uint32_t nextEventCcy; + } waveform; + +} + +// Interrupt on/off control +static IRAM_ATTR void timer1Interrupt(); + +// Non-speed critical bits +#pragma GCC optimize ("Os") + +// PWM implementation using special purpose state machine +// +// Keep an ordered list of pins with the delta in cycles between each +// element, with a terminal entry making up the remainder of the PWM +// period. With this method sum(all deltas) == PWM period clock cycles. +// +// At t=0 set all pins high and set the timeout for the 1st edge. +// On interrupt, if we're at the last element reset to t=0 state +// Otherwise, clear that pin down and set delay for next element +// and so forth. + +// The SDK sometimes is running at a different speed the the Arduino core +// so the ESP cycle counter is actually running at a variable speed. +// adjust(x) takes care of adjusting a delta clock cycle amount accordingly. +#if F_CPU == 80000000 +// shl if the core is at 160 MHz +#define adjust(x) ((x) << ( (CPU2X & 1) ? 1 : 0)) +#else +#define adjust(x) ((x) >> 0) +#endif + +constexpr int maxPWMs = 8; + +// PWM machine state +struct PWMState { + uint32_t mask; // Bitmask of active pins + uint32_t cnt; // How many entries + uint32_t idx; // Where the state machine is along the list + uint8_t pin[maxPWMs + 1]; + uint32_t delta[maxPWMs + 1]; + uint32_t nextServiceCycle; // Clock cycle for next step + struct PWMState* pwmUpdate; // Set by main code, cleared by ISR +}; + +static PWMState pwmState; +static uint32_t _pwmFreq = 1000; +static uint32_t _pwmPeriod = microsecondsToClockCycles(1000000UL) / _pwmFreq; + +static __attribute__((noinline)) void initTimer() { + timer1_disable(); + ETS_FRC_TIMER1_INTR_ATTACH(NULL, NULL); + ETS_FRC_TIMER1_NMI_INTR_ATTACH(timer1Interrupt); + timer1_enable(TIM_DIV1, TIM_EDGE, TIM_SINGLE); + waveform.timer1Running = true; + waveform.nextEventCcy = ESP.getCycleCount() + IRQLATENCYCCYS; + timer1_write(IRQLATENCYCCYS); // Cause an interrupt post-haste +} + +static void IRAM_ATTR deinitIdleTimer() { + if (!waveform.timer1Running || waveform.enabled || waveform.timer1CB || pwmState.cnt) { + return; + } + ETS_FRC_TIMER1_NMI_INTR_ATTACH(NULL); + timer1_disable(); + timer1_isr_init(); + waveform.timer1Running = false; +} + +static IRAM_ATTR void forceTimerTrigger() { + // Must not interfere if Timer is due shortly + if (T1V > IRQLATENCYCCYS) { + waveform.nextEventCcy = ESP.getCycleCount() + IRQLATENCYCCYS; + timer1_write(IRQLATENCYCCYS); + } +} + +extern "C" { + +// Notify the NMI that a new PWM state is available through the mailbox. +// Wait for mailbox to be emptied (either busy or delay() as needed) +static IRAM_ATTR void _notifyPWM(PWMState *p, bool idle) { + p->pwmUpdate = nullptr; + pwmState.pwmUpdate = p; + std::atomic_thread_fence(std::memory_order_release); + if (idle) { + forceTimerTrigger(); + } + while (pwmState.pwmUpdate) { + if (idle) { + esp_yield(); + } + std::atomic_thread_fence(std::memory_order_acquire); + } +} + +static void _addPWMtoList(PWMState& p, uint8_t pin, uint32_t val, uint32_t range) { + // Stash the val and range so we can re-evaluate the fraction + // should the user change PWM frequency. This allows us to + // give as great a precision as possible. We know by construction + // that the waveform for this pin will be inactive so we can borrow + // memory from that structure. + waveform.pins[pin].dutyCcys = val; // Numerator == high + waveform.pins[pin].periodCcys = range; // Denominator == low + + uint32_t cc = (_pwmPeriod * val) / range; + + // Clip to sane values in the case we go from OK to not-OK when adjusting frequencies + if (cc == 0) { + cc = 1; + } + else if (cc >= _pwmPeriod) { + cc = _pwmPeriod - 1; + } + + if (p.cnt == 0) { + // Starting up from scratch, special case 1st element and PWM period + p.pin[0] = pin; + p.delta[0] = cc; + // Final pin is never used: p.pin[1] = 0xff; + p.delta[1] = _pwmPeriod - cc; + } + else { + uint32_t ttl = 0; + uint32_t i; + // Skip along until we're at the spot to insert + for (i = 0; (i <= p.cnt) && (ttl + p.delta[i] < cc); i++) { + ttl += p.delta[i]; + } + // Shift everything out by one to make space for new edge + for (int32_t j = p.cnt; j >= (int)i; j--) { + p.pin[j + 1] = p.pin[j]; + p.delta[j + 1] = p.delta[j]; + } + int off = cc - ttl; // The delta from the last edge to the one we're inserting + p.pin[i] = pin; + p.delta[i] = off; // Add the delta to this new pin + p.delta[i + 1] -= off; // And subtract it from the follower to keep sum(deltas) constant + } + p.cnt++; + p.mask |= 1 << pin; +} + +// Called when analogWriteFreq() changed to update the PWM total period +void _setPWMFreq(uint32_t freq) { + _pwmFreq = freq; + + // Convert frequency into clock cycles + uint32_t cc = microsecondsToClockCycles(1000000UL) / freq; + + // Simple static adjustment to bring period closer to requested due to overhead + // Empirically determined as a constant PWM delay and a function of the number of PWMs +#if F_CPU == 80000000 + cc -= ((microsecondsToClockCycles(pwmState.cnt) * 13) >> 4) + 110; +#else + cc -= ((microsecondsToClockCycles(pwmState.cnt) * 10) >> 4) + 75; +#endif + + if (cc == _pwmPeriod) { + return; // No change + } + + _pwmPeriod = cc; + + if (pwmState.cnt) { + PWMState p; // The working copy since we can't edit the one in use + p.mask = 0; + p.cnt = 0; + for (uint32_t i = 0; i < pwmState.cnt; i++) { + auto pin = pwmState.pin[i]; + _addPWMtoList(p, pin, waveform.pins[pin].dutyCcys, waveform.pins[pin].periodCcys); + } + // Update and wait for mailbox to be emptied + if (!waveform.timer1Running) { + initTimer(); + } + _notifyPWM(&p, true); + deinitIdleTimer(); + } +} + +// Helper routine to remove an entry from the state machine +// and clean up any marked-off entries +static void _cleanAndRemovePWM(PWMState *p, uint8_t pin) { + uint32_t leftover = 0; + uint32_t in, out; + for (in = 0, out = 0; in < p->cnt; in++) { + if ((p->pin[in] != pin) && (p->mask & (1 << p->pin[in]))) { + p->pin[out] = p->pin[in]; + p->delta[out] = p->delta[in] + leftover; + leftover = 0; + out++; + } else { + leftover += p->delta[in]; + p->mask &= ~(1 << p->pin[in]); + } + } + p->cnt = out; + // Final pin is never used: p->pin[out] = 0xff; + p->delta[out] = p->delta[in] + leftover; +} + + +// Disable PWM on a specific pin (i.e. when a digitalWrite or analogWrite(0%/100%)) +IRAM_ATTR bool _stopPWM(uint8_t pin) { + if (!((1 << pin) & pwmState.mask)) { + return false; // Pin not actually active + } + + PWMState p = pwmState; // The working copy since we can't edit the one in use + + // In _stopPWM we just clear the mask but keep everything else + // untouched to save IRAM. The main startPWM will handle cleanup. + p.mask &= ~(1 << pin); + if (!p.mask) { + // If all have been stopped, then turn PWM off completely + p.cnt = 0; + } + + // Update and wait for mailbox to be emptied, no delay (could be in ISR) + _notifyPWM(&p, false); + // Possibly shut down the timer completely if we're done + deinitIdleTimer(); + return true; +} + +// Called by analogWrite(1...99%) to set the PWM duty in clock cycles +bool _setPWM(uint8_t pin, uint32_t val, uint32_t range) { + const uint32_t pinBit = 1UL << pin; + if (waveform.enabled & pinBit) { + stopWaveform(pin); + } + PWMState p; // Working copy + p = pwmState; + // Get rid of any entries for this pin + _cleanAndRemovePWM(&p, pin); + // And add it to the list, in order + if (p.cnt >= maxPWMs) { + return false; // No space left + } + + // Sanity check for all-on/off + uint32_t cc = (_pwmPeriod * val) / range; + if ((cc == 0) || (cc >= _pwmPeriod)) { + digitalWrite(pin, cc ? HIGH : LOW); + return true; + } + + _addPWMtoList(p, pin, val, range); + + // Set mailbox and wait for ISR to copy it over + if (!waveform.timer1Running) { + initTimer(); + } + _notifyPWM(&p, true); + deinitIdleTimer(); + + // Potentially recalculate the PWM period if we've added another pin + _setPWMFreq(_pwmFreq); + + return true; +} + +// Set a callback. Pass in NULL to stop it +void setTimer1Callback(uint32_t (*fn)()) { + waveform.timer1CB = fn; + std::atomic_thread_fence(std::memory_order_acq_rel); + if (!waveform.timer1Running && waveform.timer1CB) { + initTimer(); + } else { + deinitIdleTimer(); + } +} + +// Start up a waveform on a pin, or change the current one. Will change to the new +// waveform smoothly on next low->high transition. For immediate change, stopWaveform() +// first, then it will immediately begin. +int startWaveformClockCycles(uint8_t pin, uint32_t highCcys, uint32_t lowCcys, + uint32_t runTimeCcys, int8_t alignPhase, uint32_t phaseOffsetCcys, bool autoPwm) { + uint32_t periodCcys = highCcys + lowCcys; + if (periodCcys < MAXIRQTICKSCCYS) { + if (!highCcys) { + periodCcys = (MAXIRQTICKSCCYS / periodCcys) * periodCcys; + } + else if (!lowCcys) { + highCcys = periodCcys = (MAXIRQTICKSCCYS / periodCcys) * periodCcys; + } + } + // sanity checks, including mixed signed/unsigned arithmetic safety + if ((pin > 16) || isFlashInterfacePin(pin) || (alignPhase > 16) || + static_cast(periodCcys) <= 0 || + static_cast(highCcys) < 0 || static_cast(lowCcys) < 0) { + return false; + } + Waveform& wave = waveform.pins[pin]; + wave.dutyCcys = highCcys; + wave.adjDutyCcys = 0; + wave.periodCcys = periodCcys; + wave.autoPwm = autoPwm; + + _stopPWM(pin); // Make sure there's no PWM live here + + std::atomic_thread_fence(std::memory_order_acquire); + const uint32_t pinBit = 1UL << pin; + if (!(waveform.enabled & pinBit)) { + // wave.nextPeriodCcy and wave.endDutyCcy are initialized by the ISR + wave.nextPeriodCcy = phaseOffsetCcys; + wave.expiryCcy = runTimeCcys; // in WaveformMode::INIT, temporarily hold relative cycle count + wave.mode = WaveformMode::INIT; + wave.alignPhase = (alignPhase < 0) ? -1 : alignPhase; + if (!wave.dutyCcys) { + // If initially at zero duty cycle, force GPIO off + if (pin == 16) { + GP16O = 0; + } + else { + GPOC = pinBit; + } + } + std::atomic_thread_fence(std::memory_order_release); + waveform.toSetBits = 1UL << pin; + std::atomic_thread_fence(std::memory_order_release); + if (!waveform.timer1Running) { + initTimer(); + } + // The ISR pulls updates on the next waveform interval + } + else { + wave.mode = WaveformMode::INFINITE; // turn off possible expiry to make update atomic from NMI + std::atomic_thread_fence(std::memory_order_release); + wave.expiryCcy = runTimeCcys; // in WaveformMode::UPDATEEXPIRY, temporarily hold relative cycle count + if (runTimeCcys) { + wave.mode = WaveformMode::UPDATEEXPIRY; + std::atomic_thread_fence(std::memory_order_release); + waveform.toSetBits = 1UL << pin; + } + } + std::atomic_thread_fence(std::memory_order_acq_rel); + while (waveform.toSetBits) { + esp_yield(); // Wait for waveform to update + std::atomic_thread_fence(std::memory_order_acquire); + } + return true; +} + +int startWaveform(uint8_t pin, uint32_t timeHighUS, uint32_t timeLowUS, + uint32_t runTimeUS, int8_t alignPhase, uint32_t phaseOffsetUS, bool autoPwm) { + return startWaveformClockCycles(pin, + microsecondsToClockCycles(timeHighUS), microsecondsToClockCycles(timeLowUS), + microsecondsToClockCycles(runTimeUS), alignPhase, microsecondsToClockCycles(phaseOffsetUS), autoPwm); +} + +// Stops a waveform on a pin +IRAM_ATTR int stopWaveform(uint8_t pin) { + // Can't possibly need to stop anything if there is no timer active + if (!waveform.timer1Running) { + return false; + } + + _stopPWM(pin); // Make sure there's no PWM live here + + // If user sends in a pin >16 but <32, this will always point to a 0 bit + // If they send >=32, then the shift will result in 0 and it will also return false + std::atomic_thread_fence(std::memory_order_acquire); + const uint32_t pinBit = 1UL << pin; + if (waveform.enabled & pinBit) { + waveform.toDisableBits = 1UL << pin; + std::atomic_thread_fence(std::memory_order_release); + forceTimerTrigger(); + while (waveform.toDisableBits) { + /* no-op */ // Can't delay() since stopWaveform may be called from an IRQ + std::atomic_thread_fence(std::memory_order_acquire); + } + } + deinitIdleTimer(); + return true; +} + +}; + +// Speed critical bits +#pragma GCC optimize ("O2") + +// For dynamic CPU clock frequency switch in loop the scaling logic would have to be adapted. +// Using constexpr makes sure that the CPU clock frequency is compile-time fixed. +static inline IRAM_ATTR int32_t scaleCcys(const int32_t ccys, const bool isCPU2X) { + if (ISCPUFREQ160MHZ) { + return isCPU2X ? ccys : (ccys >> 1); + } + else { + return isCPU2X ? (ccys << 1) : ccys; + } +} + +static IRAM_ATTR void timer1Interrupt() { + const uint32_t isrStartCcy = ESP.getCycleCount(); + const bool isCPU2X = CPU2X & 1; + + int32_t clockDrift = isrStartCcy - waveform.nextEventCcy; + if ((waveform.toSetBits && !(waveform.enabled & waveform.toSetBits)) || waveform.toDisableBits) { + // Handle enable/disable requests from main app. + waveform.enabled = (waveform.enabled | waveform.toSetBits) & ~waveform.toDisableBits; // Set the requested waveforms on/off + // Find the first GPIO being generated by checking GCC's find-first-set (returns 1 + the bit of the first 1 in an int32_t) + waveform.toDisableBits = 0; + } + + if (waveform.toSetBits) { + const int toSetPin = __builtin_ffs(waveform.toSetBits) - 1; + Waveform& wave = waveform.pins[toSetPin]; + switch (wave.mode) { + case WaveformMode::INIT: + waveform.states &= ~waveform.toSetBits; // Clear the state of any just started + if (wave.alignPhase >= 0 && waveform.enabled & (1UL << wave.alignPhase)) { + wave.nextPeriodCcy = waveform.pins[wave.alignPhase].nextPeriodCcy + wave.nextPeriodCcy; + } + else { + wave.nextPeriodCcy = waveform.nextEventCcy; + } + if (!wave.expiryCcy) { + wave.mode = WaveformMode::INFINITE; + break; + } + // fall through + case WaveformMode::UPDATEEXPIRY: + // in WaveformMode::UPDATEEXPIRY, expiryCcy temporarily holds relative CPU cycle count + wave.expiryCcy = wave.nextPeriodCcy + scaleCcys(wave.expiryCcy, isCPU2X); + wave.mode = WaveformMode::EXPIRES; + break; + default: + break; + } + waveform.toSetBits = 0; + } + + // Exit the loop if the next event, if any, is sufficiently distant. + const uint32_t isrTimeoutCcy = isrStartCcy + ISRTIMEOUTCCYS; + uint32_t busyPins = waveform.enabled; + waveform.nextEventCcy = isrStartCcy + MAXIRQTICKSCCYS; + + uint32_t now = ESP.getCycleCount(); + uint32_t isrNextEventCcy = now; + + // PWM state machine implementation + if (!pwmState.cnt && pwmState.pwmUpdate) { + // Start up the PWM generator by copying from the mailbox + pwmState.cnt = 1; + pwmState.idx = 1; // Ensure copy this cycle, cause it to start at t=0 + pwmState.nextServiceCycle = now; // Do it this loop! + // No need for mem barrier here. Global must be written by IRQ exit + } + bool busyPWM = pwmState.cnt; + + do { + if (busyPWM) { + int32_t pwmCyclesToGo; + do { + pwmCyclesToGo = pwmState.nextServiceCycle - now; + if (pwmCyclesToGo <= 0) { + if (pwmState.idx == pwmState.cnt) { // Start of pulses, possibly copy new + if (pwmState.pwmUpdate) { + // Do the memory copy from temp to global and clear mailbox + pwmState = *pwmState.pwmUpdate; + } + GPOS = pwmState.mask; // Set all active pins high + if (pwmState.mask & (1 << 16)) { + GP16O = 1; + } + pwmState.idx = 0; + } + else { + do { + // Drop the pin at this edge + if (pwmState.mask & (1 << pwmState.pin[pwmState.idx])) { + GPOC = 1 << pwmState.pin[pwmState.idx]; + if (pwmState.pin[pwmState.idx] == 16) { + GP16O = 0; + } + } + pwmState.idx++; + // Any other pins at this same PWM value will have delta==0, drop them too. + } while (pwmState.delta[pwmState.idx] == 0); + } + // Preserve duty cycle over PWM period by using now+xxx instead of += delta + pwmCyclesToGo = adjust(pwmState.delta[pwmState.idx]); + pwmState.nextServiceCycle = now + pwmCyclesToGo; + } + now = ESP.getCycleCount(); + busyPWM = static_cast(isrTimeoutCcy - pwmState.nextServiceCycle) > 0; + // PWM can starve the generic waveform generator if pwmCyclesToGo remains below 100 + } while (busyPWM && pwmCyclesToGo < 100); + } + + if (busyPins) { + // on first loop iteration per ISR call, isrNextEventCcy == now, this is skipped + if (static_cast(isrNextEventCcy - now) > IRQLATENCYCCYS + DELTAIRQCCYS) { + waveform.nextEventCcy = isrNextEventCcy; + busyPins = 0; + } + else { + isrNextEventCcy = waveform.nextEventCcy; + uint32_t loopPins = busyPins; + while (loopPins) { + const int pin = __builtin_ffsl(loopPins) - 1; + const uint32_t pinBit = 1UL << pin; + loopPins ^= pinBit; + + Waveform& wave = waveform.pins[pin]; + + if (clockDrift) { + wave.endDutyCcy += clockDrift; + wave.nextPeriodCcy += clockDrift; + wave.expiryCcy += clockDrift; + } + + uint32_t waveNextEventCcy = (waveform.states & pinBit) ? wave.endDutyCcy : wave.nextPeriodCcy; + if (WaveformMode::EXPIRES == wave.mode && + static_cast(waveNextEventCcy - wave.expiryCcy) >= 0 && + static_cast(now - wave.expiryCcy) >= 0) { + // Disable any waveforms that are done + waveform.enabled ^= pinBit; + busyPins ^= pinBit; + } + else { + const int32_t overshootCcys = now - waveNextEventCcy; + if (overshootCcys >= 0) { + const int32_t periodCcys = scaleCcys(wave.periodCcys, isCPU2X); + if (waveform.states & pinBit) { + // active configuration and forward are 100% duty + if (wave.periodCcys == wave.dutyCcys) { + wave.nextPeriodCcy += periodCcys; + wave.endDutyCcy = wave.nextPeriodCcy; + } + else { + if (wave.autoPwm) { + wave.adjDutyCcys += overshootCcys; + } + waveform.states ^= pinBit; + if (16 == pin) { + GP16O = 0; + } + else { + GPOC = pinBit; + } + } + waveNextEventCcy = wave.nextPeriodCcy; + } + else { + wave.nextPeriodCcy += periodCcys; + if (!wave.dutyCcys) { + wave.endDutyCcy = wave.nextPeriodCcy; + } + else { + int32_t dutyCcys = scaleCcys(wave.dutyCcys, isCPU2X); + if (dutyCcys <= wave.adjDutyCcys) { + dutyCcys >>= 1; + wave.adjDutyCcys -= dutyCcys; + } + else if (wave.adjDutyCcys) { + dutyCcys -= wave.adjDutyCcys; + wave.adjDutyCcys = 0; + } + wave.endDutyCcy = now + dutyCcys; + if (static_cast(wave.endDutyCcy - wave.nextPeriodCcy) > 0) { + wave.endDutyCcy = wave.nextPeriodCcy; + } + waveform.states |= pinBit; + if (16 == pin) { + GP16O = 1; + } + else { + GPOS = pinBit; + } + } + waveNextEventCcy = wave.endDutyCcy; + } + + if (WaveformMode::EXPIRES == wave.mode && static_cast(waveNextEventCcy - wave.expiryCcy) > 0) { + waveNextEventCcy = wave.expiryCcy; + } + } + + if (static_cast(waveNextEventCcy - isrTimeoutCcy) >= 0) { + busyPins ^= pinBit; + if (static_cast(waveform.nextEventCcy - waveNextEventCcy) > 0) { + waveform.nextEventCcy = waveNextEventCcy; + } + } + else if (static_cast(isrNextEventCcy - waveNextEventCcy) > 0) { + isrNextEventCcy = waveNextEventCcy; + } + } + now = ESP.getCycleCount(); + } + clockDrift = 0; + } + } + } while (busyPWM || busyPins); + + int32_t callbackCcys = 0; + if (waveform.timer1CB) { + callbackCcys = scaleCcys(waveform.timer1CB(), isCPU2X); + } + now = ESP.getCycleCount(); + int32_t nextEventCcys = waveform.nextEventCcy - now; + // Account for unknown duration of timer1CB(). + if (waveform.timer1CB && nextEventCcys > callbackCcys) { + waveform.nextEventCcy = now + callbackCcys; + nextEventCcys = callbackCcys; + } + if (pwmState.cnt) { + const int32_t nextPwmServiceCcys = pwmState.nextServiceCycle - now; + if (nextEventCcys > nextPwmServiceCcys) + { + waveform.nextEventCcy = pwmState.nextServiceCycle; + nextEventCcys = nextPwmServiceCcys; + } + } + + // Timer is 80MHz fixed. 160MHz CPU frequency need scaling. + int32_t deltaIrqCcys = DELTAIRQCCYS; + int32_t irqLatencyCcys = IRQLATENCYCCYS; + if (isCPU2X) { + nextEventCcys >>= 1; + deltaIrqCcys >>= 1; + irqLatencyCcys >>= 1; + } + + // Firing timer too soon, the NMI occurs before ISR has returned. + if (nextEventCcys < irqLatencyCcys + deltaIrqCcys) { + waveform.nextEventCcy = now + IRQLATENCYCCYS + DELTAIRQCCYS; + nextEventCcys = irqLatencyCcys; + } + else { + nextEventCcys -= deltaIrqCcys; + } + + // Register access is fast and edge IRQ was configured before. + T1L = nextEventCcys; +} diff --git a/cores/esp8266/core_esp8266_waveform.h b/cores/esp8266/core_esp8266_waveform.h index 040e737bf8..47413ce9ef 100644 --- a/cores/esp8266/core_esp8266_waveform.h +++ b/cores/esp8266/core_esp8266_waveform.h @@ -2,8 +2,8 @@ esp8266_waveform - General purpose waveform generation and control, supporting outputs on all pins in parallel. - -- Default, PWM locked version -- - Copyright (c) 2018 Earle F. Philhower, III. All rights reserved. + Copyright (c) 2018-2020 Earle F. Philhower, III. All rights reserved. + Copyright (c) 2020-2021 Dirk O. Kaar. The core idea is to have a programmable waveform generator with a unique high and low period (defined in microseconds or CPU clock cycles). TIMER1 is @@ -20,33 +20,9 @@ This replaces older tone(), analogWrite(), and the Servo classes. - Everywhere in the code where "cycles" is used, it means ESP.getCycleCount() + Everywhere in the code where "cycles", "ccy" or "ccys" is used, it means ESP.getCycleCount() clock cycle count, or an interval measured in CPU clock cycles, but not TIMER1 cycles (which may be 2 CPU clock cycles @ 160MHz). - ---------- - - -- Phase locked version -- - Copyright (c) 2020 Dirk O. Kaar. - - The core idea is to have a programmable waveform generator with a unique - high and low period (defined in microseconds or CPU clock cycles). TIMER1 is - set to 1-shot mode and is always loaded with the time until the next edge - of any live waveforms. - - Up to one waveform generator per pin supported. - - Each waveform generator is synchronized to the ESP clock cycle counter, not the - timer. This allows for removing interrupt jitter and delay as the counter - always increments once per 80MHz clock. Changes to a waveform are - contiguous and only take effect on the next waveform transition, - allowing for smooth transitions. - - This replaces older tone(), analogWrite(), and the Servo classes. - - Everywhere in the code where "ccy" or "ccys" is used, it means ESP.getCycleCount() - clock cycle count, or an interval measured in CPU clock cycles, but not TIMER1 - cycles (which may be 2 CPU clock cycles @ 160MHz). - ---------- This library is free software; you can redistribute it and/or modify it under the terms of the GNU Lesser General Public diff --git a/cores/esp8266/core_esp8266_waveform_phase.cpp b/cores/esp8266/core_esp8266_waveform_phase.cpp deleted file mode 100644 index 9d200fa56c..0000000000 --- a/cores/esp8266/core_esp8266_waveform_phase.cpp +++ /dev/null @@ -1,443 +0,0 @@ -/* - esp8266_waveform - General purpose waveform generation and control, - supporting outputs on all pins in parallel. - - Copyright (c) 2018 Earle F. Philhower, III. All rights reserved. - Copyright (c) 2020 Dirk O. Kaar. - - The core idea is to have a programmable waveform generator with a unique - high and low period (defined in microseconds or CPU clock cycles). TIMER1 is - set to 1-shot mode and is always loaded with the time until the next edge - of any live waveforms. - - Up to one waveform generator per pin supported. - - Each waveform generator is synchronized to the ESP clock cycle counter, not the - timer. This allows for removing interrupt jitter and delay as the counter - always increments once per 80MHz clock. Changes to a waveform are - contiguous and only take effect on the next waveform transition, - allowing for smooth transitions. - - This replaces older tone(), analogWrite(), and the Servo classes. - - Everywhere in the code where "ccy" or "ccys" is used, it means ESP.getCycleCount() - clock cycle time, or an interval measured in clock cycles, but not TIMER1 - cycles (which may be 2 CPU clock cycles @ 160MHz). - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -*/ - -#include "core_esp8266_waveform.h" -#include -#include "debug.h" -#include "ets_sys.h" -#include - - -extern "C" void enablePhaseLockedWaveform (void) -{ - // Does nothing, added to app to enable linking these versions - // of the waveform functions instead of the default. - DEBUGV("Enabling phase locked waveform generator\n"); -} - -// No-op calls to override the PWM implementation -extern "C" void _setPWMFreq_weak(uint32_t freq) { (void) freq; } -extern "C" IRAM_ATTR bool _stopPWM_weak(uint8_t pin) { (void) pin; return false; } -extern "C" bool _setPWM_weak(uint8_t pin, uint32_t val, uint32_t range) { (void) pin; (void) val; (void) range; return false; } - - -// Timer is 80MHz fixed. 160MHz CPU frequency need scaling. -constexpr bool ISCPUFREQ160MHZ = clockCyclesPerMicrosecond() == 160; -// Maximum delay between IRQs, Timer1, <= 2^23 / 80MHz -constexpr int32_t MAXIRQTICKSCCYS = microsecondsToClockCycles(10000); -// Maximum servicing time for any single IRQ -constexpr uint32_t ISRTIMEOUTCCYS = microsecondsToClockCycles(18); -// The latency between in-ISR rearming of the timer and the earliest firing -constexpr int32_t IRQLATENCYCCYS = microsecondsToClockCycles(2); -// The SDK and hardware take some time to actually get to our NMI code -constexpr int32_t DELTAIRQCCYS = ISCPUFREQ160MHZ ? - microsecondsToClockCycles(2) >> 1 : microsecondsToClockCycles(2); - -// for INFINITE, the NMI proceeds on the waveform without expiry deadline. -// for EXPIRES, the NMI expires the waveform automatically on the expiry ccy. -// for UPDATEEXPIRY, the NMI recomputes the exact expiry ccy and transitions to EXPIRES. -// for INIT, the NMI initializes nextPeriodCcy, and if expiryCcy != 0 includes UPDATEEXPIRY. -enum class WaveformMode : uint8_t {INFINITE = 0, EXPIRES = 1, UPDATEEXPIRY = 2, INIT = 3}; - -// Waveform generator can create tones, PWM, and servos -struct Waveform { - uint32_t nextPeriodCcy; // ESP clock cycle when a period begins. If WaveformMode::INIT, temporarily holds positive phase offset ccy count - uint32_t endDutyCcy; // ESP clock cycle when going from duty to off - int32_t dutyCcys; // Set next off cycle at low->high to maintain phase - int32_t adjDutyCcys; // Temporary correction for next period - int32_t periodCcys; // Set next phase cycle at low->high to maintain phase - uint32_t expiryCcy; // For time-limited waveform, the CPU clock cycle when this waveform must stop. If WaveformMode::UPDATE, temporarily holds relative ccy count - WaveformMode mode; - int8_t alignPhase; // < 0 no phase alignment, otherwise starts waveform in relative phase offset to given pin - bool autoPwm; // perform PWM duty to idle cycle ratio correction under high load at the expense of precise timings -}; - -namespace { - - static struct { - Waveform pins[17]; // State of all possible pins - uint32_t states = 0; // Is the pin high or low, updated in NMI so no access outside the NMI code - uint32_t enabled = 0; // Is it actively running, updated in NMI so no access outside the NMI code - - // Enable lock-free by only allowing updates to waveform.states and waveform.enabled from IRQ service routine - int32_t toSetBits = 0; // Message to the NMI handler to start/modify exactly one waveform - int32_t toDisableBits = 0; // Message to the NMI handler to disable exactly one pin from waveform generation - - uint32_t(*timer1CB)() = nullptr; - - bool timer1Running = false; - - uint32_t nextEventCcy; - } waveform; - -} - -// Interrupt on/off control -static IRAM_ATTR void timer1Interrupt(); - -// Non-speed critical bits -#pragma GCC optimize ("Os") - -static void initTimer() { - timer1_disable(); - ETS_FRC_TIMER1_INTR_ATTACH(NULL, NULL); - ETS_FRC_TIMER1_NMI_INTR_ATTACH(timer1Interrupt); - timer1_enable(TIM_DIV1, TIM_EDGE, TIM_SINGLE); - waveform.timer1Running = true; - waveform.nextEventCcy = ESP.getCycleCount() + IRQLATENCYCCYS; - timer1_write(IRQLATENCYCCYS); // Cause an interrupt post-haste -} - -static IRAM_ATTR void deinitTimer() { - ETS_FRC_TIMER1_NMI_INTR_ATTACH(NULL); - timer1_disable(); - timer1_isr_init(); - waveform.timer1Running = false; -} - -extern "C" { - -// Set a callback. Pass in NULL to stop it -void setTimer1Callback_weak(uint32_t (*fn)()) { - waveform.timer1CB = fn; - std::atomic_thread_fence(std::memory_order_acq_rel); - if (!waveform.timer1Running && fn) { - initTimer(); - } else if (waveform.timer1Running && !fn && !waveform.enabled) { - deinitTimer(); - } -} - -// Start up a waveform on a pin, or change the current one. Will change to the new -// waveform smoothly on next low->high transition. For immediate change, stopWaveform() -// first, then it will immediately begin. -int startWaveformClockCycles_weak(uint8_t pin, uint32_t highCcys, uint32_t lowCcys, - uint32_t runTimeCcys, int8_t alignPhase, uint32_t phaseOffsetCcys, bool autoPwm) { - uint32_t periodCcys = highCcys + lowCcys; - if (periodCcys < MAXIRQTICKSCCYS) { - if (!highCcys) { - periodCcys = (MAXIRQTICKSCCYS / periodCcys) * periodCcys; - } - else if (!lowCcys) { - highCcys = periodCcys = (MAXIRQTICKSCCYS / periodCcys) * periodCcys; - } - } - // sanity checks, including mixed signed/unsigned arithmetic safety - if ((pin > 16) || isFlashInterfacePin(pin) || (alignPhase > 16) || - static_cast(periodCcys) <= 0 || - static_cast(highCcys) < 0 || static_cast(lowCcys) < 0) { - return false; - } - Waveform& wave = waveform.pins[pin]; - wave.dutyCcys = highCcys; - wave.adjDutyCcys = 0; - wave.periodCcys = periodCcys; - wave.autoPwm = autoPwm; - - std::atomic_thread_fence(std::memory_order_acquire); - const uint32_t pinBit = 1UL << pin; - if (!(waveform.enabled & pinBit)) { - // wave.nextPeriodCcy and wave.endDutyCcy are initialized by the ISR - wave.nextPeriodCcy = phaseOffsetCcys; - wave.expiryCcy = runTimeCcys; // in WaveformMode::INIT, temporarily hold relative cycle count - wave.mode = WaveformMode::INIT; - wave.alignPhase = (alignPhase < 0) ? -1 : alignPhase; - if (!wave.dutyCcys) { - // If initially at zero duty cycle, force GPIO off - if (pin == 16) { - GP16O = 0; - } - else { - GPOC = pinBit; - } - } - std::atomic_thread_fence(std::memory_order_release); - waveform.toSetBits = 1UL << pin; - std::atomic_thread_fence(std::memory_order_release); - if (!waveform.timer1Running) { - initTimer(); - } - // The ISR pulls updates on the next waveform interval - } - else { - wave.mode = WaveformMode::INFINITE; // turn off possible expiry to make update atomic from NMI - std::atomic_thread_fence(std::memory_order_release); - wave.expiryCcy = runTimeCcys; // in WaveformMode::UPDATEEXPIRY, temporarily hold relative cycle count - if (runTimeCcys) { - wave.mode = WaveformMode::UPDATEEXPIRY; - std::atomic_thread_fence(std::memory_order_release); - waveform.toSetBits = 1UL << pin; - } - } - std::atomic_thread_fence(std::memory_order_acq_rel); - while (waveform.toSetBits) { - esp_yield(); // Wait for waveform to update - std::atomic_thread_fence(std::memory_order_acquire); - } - return true; -} - -// Stops a waveform on a pin -IRAM_ATTR int stopWaveform_weak(uint8_t pin) { - // Can't possibly need to stop anything if there is no timer active - if (!waveform.timer1Running) { - return false; - } - // If user sends in a pin >16 but <32, this will always point to a 0 bit - // If they send >=32, then the shift will result in 0 and it will also return false - std::atomic_thread_fence(std::memory_order_acquire); - const uint32_t pinBit = 1UL << pin; - if (waveform.enabled & pinBit) { - waveform.toDisableBits = 1UL << pin; - std::atomic_thread_fence(std::memory_order_release); - // Must not interfere if Timer is due shortly - if (T1V > IRQLATENCYCCYS) { - waveform.nextEventCcy = ESP.getCycleCount() + IRQLATENCYCCYS; - timer1_write(IRQLATENCYCCYS); - } - while (waveform.toDisableBits) { - /* no-op */ // Can't delay() since stopWaveform may be called from an IRQ - std::atomic_thread_fence(std::memory_order_acquire); - } - } - if (!waveform.enabled && !waveform.timer1CB) { - deinitTimer(); - } - return true; -} - -}; - -// Speed critical bits -#pragma GCC optimize ("O2") - -// For dynamic CPU clock frequency switch in loop the scaling logic would have to be adapted. -// Using constexpr makes sure that the CPU clock frequency is compile-time fixed. -static inline IRAM_ATTR int32_t scaleCcys(const int32_t ccys, const bool isCPU2X) { - if (ISCPUFREQ160MHZ) { - return isCPU2X ? ccys : (ccys >> 1); - } - else { - return isCPU2X ? (ccys << 1) : ccys; - } -} - -static IRAM_ATTR void timer1Interrupt() { - const uint32_t isrStartCcy = ESP.getCycleCount(); - int32_t clockDrift = isrStartCcy - waveform.nextEventCcy; - const bool isCPU2X = CPU2X & 1; - if ((waveform.toSetBits && !(waveform.enabled & waveform.toSetBits)) || waveform.toDisableBits) { - // Handle enable/disable requests from main app. - waveform.enabled = (waveform.enabled | waveform.toSetBits) & ~waveform.toDisableBits; // Set the requested waveforms on/off - // Find the first GPIO being generated by checking GCC's find-first-set (returns 1 + the bit of the first 1 in an int32_t) - waveform.toDisableBits = 0; - } - - if (waveform.toSetBits) { - const int toSetPin = __builtin_ffs(waveform.toSetBits) - 1; - Waveform& wave = waveform.pins[toSetPin]; - switch (wave.mode) { - case WaveformMode::INIT: - waveform.states &= ~waveform.toSetBits; // Clear the state of any just started - if (wave.alignPhase >= 0 && waveform.enabled & (1UL << wave.alignPhase)) { - wave.nextPeriodCcy = waveform.pins[wave.alignPhase].nextPeriodCcy + wave.nextPeriodCcy; - } - else { - wave.nextPeriodCcy = waveform.nextEventCcy; - } - if (!wave.expiryCcy) { - wave.mode = WaveformMode::INFINITE; - break; - } - // fall through - case WaveformMode::UPDATEEXPIRY: - // in WaveformMode::UPDATEEXPIRY, expiryCcy temporarily holds relative CPU cycle count - wave.expiryCcy = wave.nextPeriodCcy + scaleCcys(wave.expiryCcy, isCPU2X); - wave.mode = WaveformMode::EXPIRES; - break; - default: - break; - } - waveform.toSetBits = 0; - } - - // Exit the loop if the next event, if any, is sufficiently distant. - const uint32_t isrTimeoutCcy = isrStartCcy + ISRTIMEOUTCCYS; - uint32_t busyPins = waveform.enabled; - waveform.nextEventCcy = isrStartCcy + MAXIRQTICKSCCYS; - - uint32_t now = ESP.getCycleCount(); - uint32_t isrNextEventCcy = now; - while (busyPins) { - if (static_cast(isrNextEventCcy - now) > IRQLATENCYCCYS + DELTAIRQCCYS) { - waveform.nextEventCcy = isrNextEventCcy; - break; - } - isrNextEventCcy = waveform.nextEventCcy; - uint32_t loopPins = busyPins; - while (loopPins) { - const int pin = __builtin_ffsl(loopPins) - 1; - const uint32_t pinBit = 1UL << pin; - loopPins ^= pinBit; - - Waveform& wave = waveform.pins[pin]; - - if (clockDrift) { - wave.endDutyCcy += clockDrift; - wave.nextPeriodCcy += clockDrift; - wave.expiryCcy += clockDrift; - } - - uint32_t waveNextEventCcy = (waveform.states & pinBit) ? wave.endDutyCcy : wave.nextPeriodCcy; - if (WaveformMode::EXPIRES == wave.mode && - static_cast(waveNextEventCcy - wave.expiryCcy) >= 0 && - static_cast(now - wave.expiryCcy) >= 0) { - // Disable any waveforms that are done - waveform.enabled ^= pinBit; - busyPins ^= pinBit; - } - else { - const int32_t overshootCcys = now - waveNextEventCcy; - if (overshootCcys >= 0) { - const int32_t periodCcys = scaleCcys(wave.periodCcys, isCPU2X); - if (waveform.states & pinBit) { - // active configuration and forward are 100% duty - if (wave.periodCcys == wave.dutyCcys) { - wave.nextPeriodCcy += periodCcys; - wave.endDutyCcy = wave.nextPeriodCcy; - } - else { - if (wave.autoPwm) { - wave.adjDutyCcys += overshootCcys; - } - waveform.states ^= pinBit; - if (16 == pin) { - GP16O = 0; - } - else { - GPOC = pinBit; - } - } - waveNextEventCcy = wave.nextPeriodCcy; - } - else { - wave.nextPeriodCcy += periodCcys; - if (!wave.dutyCcys) { - wave.endDutyCcy = wave.nextPeriodCcy; - } - else { - int32_t dutyCcys = scaleCcys(wave.dutyCcys, isCPU2X); - if (dutyCcys <= wave.adjDutyCcys) { - dutyCcys >>= 1; - wave.adjDutyCcys -= dutyCcys; - } - else if (wave.adjDutyCcys) { - dutyCcys -= wave.adjDutyCcys; - wave.adjDutyCcys = 0; - } - wave.endDutyCcy = now + dutyCcys; - if (static_cast(wave.endDutyCcy - wave.nextPeriodCcy) > 0) { - wave.endDutyCcy = wave.nextPeriodCcy; - } - waveform.states |= pinBit; - if (16 == pin) { - GP16O = 1; - } - else { - GPOS = pinBit; - } - } - waveNextEventCcy = wave.endDutyCcy; - } - - if (WaveformMode::EXPIRES == wave.mode && static_cast(waveNextEventCcy - wave.expiryCcy) > 0) { - waveNextEventCcy = wave.expiryCcy; - } - } - - if (static_cast(waveNextEventCcy - isrTimeoutCcy) >= 0) { - busyPins ^= pinBit; - if (static_cast(waveform.nextEventCcy - waveNextEventCcy) > 0) { - waveform.nextEventCcy = waveNextEventCcy; - } - } - else if (static_cast(isrNextEventCcy - waveNextEventCcy) > 0) { - isrNextEventCcy = waveNextEventCcy; - } - } - now = ESP.getCycleCount(); - } - clockDrift = 0; - } - - int32_t callbackCcys = 0; - if (waveform.timer1CB) { - callbackCcys = scaleCcys(waveform.timer1CB(), isCPU2X); - } - now = ESP.getCycleCount(); - int32_t nextEventCcys = waveform.nextEventCcy - now; - // Account for unknown duration of timer1CB(). - if (waveform.timer1CB && nextEventCcys > callbackCcys) { - waveform.nextEventCcy = now + callbackCcys; - nextEventCcys = callbackCcys; - } - - // Timer is 80MHz fixed. 160MHz CPU frequency need scaling. - int32_t deltaIrqCcys = DELTAIRQCCYS; - int32_t irqLatencyCcys = IRQLATENCYCCYS; - if (isCPU2X) { - nextEventCcys >>= 1; - deltaIrqCcys >>= 1; - irqLatencyCcys >>= 1; - } - - // Firing timer too soon, the NMI occurs before ISR has returned. - if (nextEventCcys < irqLatencyCcys + deltaIrqCcys) { - waveform.nextEventCcy = now + IRQLATENCYCCYS + DELTAIRQCCYS; - nextEventCcys = irqLatencyCcys; - } - else { - nextEventCcys -= deltaIrqCcys; - } - - // Register access is fast and edge IRQ was configured before. - T1L = nextEventCcys; -} diff --git a/cores/esp8266/core_esp8266_waveform_pwm.cpp b/cores/esp8266/core_esp8266_waveform_pwm.cpp deleted file mode 100644 index 6c591366f5..0000000000 --- a/cores/esp8266/core_esp8266_waveform_pwm.cpp +++ /dev/null @@ -1,675 +0,0 @@ -/* - esp8266_waveform - General purpose waveform generation and control, - supporting outputs on all pins in parallel. - - Copyright (c) 2018 Earle F. Philhower, III. All rights reserved. - - The core idea is to have a programmable waveform generator with a unique - high and low period (defined in microseconds or CPU clock cycles). TIMER1 - is set to 1-shot mode and is always loaded with the time until the next - edge of any live waveforms. - - Up to one waveform generator per pin supported. - - Each waveform generator is synchronized to the ESP clock cycle counter, not - the timer. This allows for removing interrupt jitter and delay as the - counter always increments once per 80MHz clock. Changes to a waveform are - contiguous and only take effect on the next waveform transition, - allowing for smooth transitions. - - This replaces older tone(), analogWrite(), and the Servo classes. - - Everywhere in the code where "cycles" is used, it means ESP.getCycleCount() - clock cycle count, or an interval measured in CPU clock cycles, but not - TIMER1 cycles (which may be 2 CPU clock cycles @ 160MHz). - - This library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - This library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with this library; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -*/ - - -#include -#include -#include "ets_sys.h" -#include "core_esp8266_waveform.h" -#include "user_interface.h" - - -extern "C" { - -// Maximum delay between IRQs -#define MAXIRQUS (10000) - -// Waveform generator can create tones, PWM, and servos -typedef struct { - uint32_t nextServiceCycle; // ESP cycle timer when a transition required - uint32_t expiryCycle; // For time-limited waveform, the cycle when this waveform must stop - uint32_t timeHighCycles; // Actual running waveform period (adjusted using desiredCycles) - uint32_t timeLowCycles; // - uint32_t desiredHighCycles; // Ideal waveform period to drive the error signal - uint32_t desiredLowCycles; // - uint32_t lastEdge; // Cycle when this generator last changed -} Waveform; - -class WVFState { -public: - Waveform waveform[17]; // State of all possible pins - uint32_t waveformState = 0; // Is the pin high or low, updated in NMI so no access outside the NMI code - uint32_t waveformEnabled = 0; // Is it actively running, updated in NMI so no access outside the NMI code - - // Enable lock-free by only allowing updates to waveformState and waveformEnabled from IRQ service routine - uint32_t waveformToEnable = 0; // Message to the NMI handler to start a waveform on a inactive pin - uint32_t waveformToDisable = 0; // Message to the NMI handler to disable a pin from waveform generation - - uint32_t waveformToChange = 0; // Mask of pin to change. One bit set in main app, cleared when effected in the NMI - uint32_t waveformNewHigh = 0; - uint32_t waveformNewLow = 0; - - uint32_t (*timer1CB)() = NULL; - - // Optimize the NMI inner loop by keeping track of the min and max GPIO that we - // are generating. In the common case (1 PWM) these may be the same pin and - // we can avoid looking at the other pins. - uint16_t startPin = 0; - uint16_t endPin = 0; -}; -static WVFState wvfState; - - -// Ensure everything is read/written to RAM -#define MEMBARRIER() { __asm__ volatile("" ::: "memory"); } - -// Non-speed critical bits -#pragma GCC optimize ("Os") - -// Interrupt on/off control -static IRAM_ATTR void timer1Interrupt(); -static bool timerRunning = false; - -static __attribute__((noinline)) void initTimer() { - if (!timerRunning) { - timer1_disable(); - ETS_FRC_TIMER1_INTR_ATTACH(NULL, NULL); - ETS_FRC_TIMER1_NMI_INTR_ATTACH(timer1Interrupt); - timer1_enable(TIM_DIV1, TIM_EDGE, TIM_SINGLE); - timerRunning = true; - timer1_write(microsecondsToClockCycles(10)); - } -} - -static IRAM_ATTR void forceTimerInterrupt() { - if (T1L > microsecondsToClockCycles(10)) { - T1L = microsecondsToClockCycles(10); - } -} - -// PWM implementation using special purpose state machine -// -// Keep an ordered list of pins with the delta in cycles between each -// element, with a terminal entry making up the remainder of the PWM -// period. With this method sum(all deltas) == PWM period clock cycles. -// -// At t=0 set all pins high and set the timeout for the 1st edge. -// On interrupt, if we're at the last element reset to t=0 state -// Otherwise, clear that pin down and set delay for next element -// and so forth. - -constexpr int maxPWMs = 8; - -// PWM machine state -struct PWMState { - uint32_t mask; // Bitmask of active pins - uint32_t cnt; // How many entries - uint32_t idx; // Where the state machine is along the list - uint8_t pin[maxPWMs + 1]; - uint32_t delta[maxPWMs + 1]; - uint32_t nextServiceCycle; // Clock cycle for next step - struct PWMState *pwmUpdate; // Set by main code, cleared by ISR -}; - -static PWMState pwmState; -static uint32_t _pwmFreq = 1000; -static uint32_t _pwmPeriod = microsecondsToClockCycles(1000000UL) / _pwmFreq; - -// If there are no more scheduled activities, shut down Timer 1. -// Otherwise, do nothing. -static IRAM_ATTR void disableIdleTimer() { - if (timerRunning && !wvfState.waveformEnabled && !pwmState.cnt && !wvfState.timer1CB) { - ETS_FRC_TIMER1_NMI_INTR_ATTACH(NULL); - timer1_disable(); - timer1_isr_init(); - timerRunning = false; - } -} - -// Notify the NMI that a new PWM state is available through the mailbox. -// Wait for mailbox to be emptied (either busy or delay() as needed) -static IRAM_ATTR void _notifyPWM(PWMState *p, bool idle) { - p->pwmUpdate = nullptr; - MEMBARRIER(); - pwmState.pwmUpdate = p; - MEMBARRIER(); - if (idle) { - forceTimerInterrupt(); - } - while (pwmState.pwmUpdate) { - if (idle) { - esp_yield(); - } - MEMBARRIER(); - } -} - -static void _addPWMtoList(PWMState &p, uint8_t pin, uint32_t val, uint32_t range); - -// Called when analogWriteFreq() changed to update the PWM total period -extern void _setPWMFreq_weak(uint32_t freq) __attribute__((weak)); -void _setPWMFreq_weak(uint32_t freq) { - _pwmFreq = freq; - - // Convert frequency into clock cycles - uint32_t cc = microsecondsToClockCycles(1000000UL) / freq; - - // Simple static adjustment to bring period closer to requested due to overhead - // Empirically determined as a constant PWM delay and a function of the number of PWMs -#if F_CPU == 80000000 - cc -= ((microsecondsToClockCycles(pwmState.cnt) * 13) >> 4) + 110; -#else - cc -= ((microsecondsToClockCycles(pwmState.cnt) * 10) >> 4) + 75; -#endif - - if (cc == _pwmPeriod) { - return; // No change - } - - _pwmPeriod = cc; - - if (pwmState.cnt) { - PWMState p; // The working copy since we can't edit the one in use - p.mask = 0; - p.cnt = 0; - for (uint32_t i = 0; i < pwmState.cnt; i++) { - auto pin = pwmState.pin[i]; - _addPWMtoList(p, pin, wvfState.waveform[pin].desiredHighCycles, wvfState.waveform[pin].desiredLowCycles); - } - // Update and wait for mailbox to be emptied - initTimer(); - _notifyPWM(&p, true); - disableIdleTimer(); - } -} -static void _setPWMFreq_bound(uint32_t freq) __attribute__((weakref("_setPWMFreq_weak"))); -void _setPWMFreq(uint32_t freq) { - _setPWMFreq_bound(freq); -} - - -// Helper routine to remove an entry from the state machine -// and clean up any marked-off entries -static void _cleanAndRemovePWM(PWMState *p, uint8_t pin) { - uint32_t leftover = 0; - uint32_t in, out; - for (in = 0, out = 0; in < p->cnt; in++) { - if ((p->pin[in] != pin) && (p->mask & (1<pin[in]))) { - p->pin[out] = p->pin[in]; - p->delta[out] = p->delta[in] + leftover; - leftover = 0; - out++; - } else { - leftover += p->delta[in]; - p->mask &= ~(1<pin[in]); - } - } - p->cnt = out; - // Final pin is never used: p->pin[out] = 0xff; - p->delta[out] = p->delta[in] + leftover; -} - - -// Disable PWM on a specific pin (i.e. when a digitalWrite or analogWrite(0%/100%)) -extern bool _stopPWM_weak(uint8_t pin) __attribute__((weak)); -IRAM_ATTR bool _stopPWM_weak(uint8_t pin) { - if (!((1<= _pwmPeriod) { - cc = _pwmPeriod - 1; - } - - if (p.cnt == 0) { - // Starting up from scratch, special case 1st element and PWM period - p.pin[0] = pin; - p.delta[0] = cc; - // Final pin is never used: p.pin[1] = 0xff; - p.delta[1] = _pwmPeriod - cc; - } - else { - uint32_t ttl = 0; - uint32_t i; - // Skip along until we're at the spot to insert - for (i=0; (i <= p.cnt) && (ttl + p.delta[i] < cc); i++) { - ttl += p.delta[i]; - } - // Shift everything out by one to make space for new edge - for (int32_t j = p.cnt; j >= (int)i; j--) { - p.pin[j + 1] = p.pin[j]; - p.delta[j + 1] = p.delta[j]; - } - int off = cc - ttl; // The delta from the last edge to the one we're inserting - p.pin[i] = pin; - p.delta[i] = off; // Add the delta to this new pin - p.delta[i + 1] -= off; // And subtract it from the follower to keep sum(deltas) constant - } - p.cnt++; - p.mask |= 1<= maxPWMs) { - return false; // No space left - } - - // Sanity check for all-on/off - uint32_t cc = (_pwmPeriod * val) / range; - if ((cc == 0) || (cc >= _pwmPeriod)) { - digitalWrite(pin, cc ? HIGH : LOW); - return true; - } - - _addPWMtoList(p, pin, val, range); - - // Set mailbox and wait for ISR to copy it over - initTimer(); - _notifyPWM(&p, true); - disableIdleTimer(); - - // Potentially recalculate the PWM period if we've added another pin - _setPWMFreq(_pwmFreq); - - return true; -} -static bool _setPWM_bound(uint8_t pin, uint32_t val, uint32_t range) __attribute__((weakref("_setPWM_weak"))); -bool _setPWM(uint8_t pin, uint32_t val, uint32_t range) { - return _setPWM_bound(pin, val, range); -} - -// Start up a waveform on a pin, or change the current one. Will change to the new -// waveform smoothly on next low->high transition. For immediate change, stopWaveform() -// first, then it will immediately begin. -extern int startWaveformClockCycles_weak(uint8_t pin, uint32_t timeHighCycles, uint32_t timeLowCycles, uint32_t runTimeCycles, int8_t alignPhase, uint32_t phaseOffsetUS, bool autoPwm) __attribute__((weak)); -int startWaveformClockCycles_weak(uint8_t pin, uint32_t timeHighCycles, uint32_t timeLowCycles, uint32_t runTimeCycles, - int8_t alignPhase, uint32_t phaseOffsetUS, bool autoPwm) { - (void) alignPhase; - (void) phaseOffsetUS; - (void) autoPwm; - - if ((pin > 16) || isFlashInterfacePin(pin) || (timeHighCycles == 0)) { - return false; - } - Waveform *wave = &wvfState.waveform[pin]; - wave->expiryCycle = runTimeCycles ? ESP.getCycleCount() + runTimeCycles : 0; - if (runTimeCycles && !wave->expiryCycle) { - wave->expiryCycle = 1; // expiryCycle==0 means no timeout, so avoid setting it - } - - _stopPWM(pin); // Make sure there's no PWM live here - - const uint32_t mask = 1<timeHighCycles = timeHighCycles; - wave->desiredHighCycles = timeHighCycles; - wave->timeLowCycles = timeLowCycles; - wave->desiredLowCycles = timeLowCycles; - wave->lastEdge = 0; - wave->nextServiceCycle = ESP.getCycleCount() + microsecondsToClockCycles(1); - wvfState.waveformToEnable |= mask; - MEMBARRIER(); - initTimer(); - forceTimerInterrupt(); - while (wvfState.waveformToEnable) { - esp_yield(); // Wait for waveform to update - MEMBARRIER(); - } - } - - return true; -} -static int startWaveformClockCycles_bound(uint8_t pin, uint32_t timeHighCycles, uint32_t timeLowCycles, uint32_t runTimeCycles, int8_t alignPhase, uint32_t phaseOffsetUS, bool autoPwm) __attribute__((weakref("startWaveformClockCycles_weak"))); -int startWaveformClockCycles(uint8_t pin, uint32_t timeHighCycles, uint32_t timeLowCycles, uint32_t runTimeCycles, int8_t alignPhase, uint32_t phaseOffsetUS, bool autoPwm) { - return startWaveformClockCycles_bound(pin, timeHighCycles, timeLowCycles, runTimeCycles, alignPhase, phaseOffsetUS, autoPwm); -} - - -// This version falls-thru to the proper startWaveformClockCycles call and is invariant across waveform generators -int startWaveform(uint8_t pin, uint32_t timeHighUS, uint32_t timeLowUS, uint32_t runTimeUS, - int8_t alignPhase, uint32_t phaseOffsetUS, bool autoPwm) { - return startWaveformClockCycles_bound(pin, - microsecondsToClockCycles(timeHighUS), microsecondsToClockCycles(timeLowUS), - microsecondsToClockCycles(runTimeUS), alignPhase, microsecondsToClockCycles(phaseOffsetUS), autoPwm); -} - -// Set a callback. Pass in NULL to stop it -extern void setTimer1Callback_weak(uint32_t (*fn)()) __attribute__((weak)); -void setTimer1Callback_weak(uint32_t (*fn)()) { - wvfState.timer1CB = fn; - if (fn) { - initTimer(); - forceTimerInterrupt(); - } - disableIdleTimer(); -} -static void setTimer1Callback_bound(uint32_t (*fn)()) __attribute__((weakref("setTimer1Callback_weak"))); -void setTimer1Callback(uint32_t (*fn)()) { - setTimer1Callback_bound(fn); -} - -// Stops a waveform on a pin -extern int stopWaveform_weak(uint8_t pin) __attribute__((weak)); -IRAM_ATTR int stopWaveform_weak(uint8_t pin) { - // Can't possibly need to stop anything if there is no timer active - if (!timerRunning) { - return false; - } - - _stopPWM(pin); // Make sure there's no PWM live here - - // If user sends in a pin >16 but <32, this will always point to a 0 bit - // If they send >=32, then the shift will result in 0 and it will also return false - const uint32_t mask = 1<> 0) -#endif - -// When the time to the next edge is greater than this, RTI and set another IRQ to minimize CPU usage -#define MINIRQTIME microsecondsToClockCycles(4) - -static IRAM_ATTR void timer1Interrupt() { - // Flag if the core is at 160 MHz, for use by adjust() - bool turbo = (*(uint32_t*)0x3FF00014) & 1 ? true : false; - - uint32_t nextEventCycle = GetCycleCountIRQ() + microsecondsToClockCycles(MAXIRQUS); - uint32_t timeoutCycle = GetCycleCountIRQ() + microsecondsToClockCycles(14); - - if (wvfState.waveformToEnable || wvfState.waveformToDisable) { - // Handle enable/disable requests from main app - wvfState.waveformEnabled = (wvfState.waveformEnabled & ~wvfState.waveformToDisable) | wvfState.waveformToEnable; // Set the requested waveforms on/off - wvfState.waveformState &= ~wvfState.waveformToEnable; // And clear the state of any just started - wvfState.waveformToEnable = 0; - wvfState.waveformToDisable = 0; - // No mem barrier. Globals must be written to RAM on ISR exit. - // Find the first GPIO being generated by checking GCC's find-first-set (returns 1 + the bit of the first 1 in an int32_t) - wvfState.startPin = __builtin_ffs(wvfState.waveformEnabled) - 1; - // Find the last bit by subtracting off GCC's count-leading-zeros (no offset in this one) - wvfState.endPin = 32 - __builtin_clz(wvfState.waveformEnabled); - } else if (!pwmState.cnt && pwmState.pwmUpdate) { - // Start up the PWM generator by copying from the mailbox - pwmState.cnt = 1; - pwmState.idx = 1; // Ensure copy this cycle, cause it to start at t=0 - pwmState.nextServiceCycle = GetCycleCountIRQ(); // Do it this loop! - // No need for mem barrier here. Global must be written by IRQ exit - } - - bool done = false; - if (wvfState.waveformEnabled || pwmState.cnt) { - do { - nextEventCycle = GetCycleCountIRQ() + microsecondsToClockCycles(MAXIRQUS); - - // PWM state machine implementation - if (pwmState.cnt) { - int32_t pwmCyclesToGo; - do { - pwmCyclesToGo = pwmState.nextServiceCycle - GetCycleCountIRQ(); - if (pwmCyclesToGo <= 0) { - if (pwmState.idx == pwmState.cnt) { // Start of pulses, possibly copy new - if (pwmState.pwmUpdate) { - // Do the memory copy from temp to global and clear mailbox - pwmState = *pwmState.pwmUpdate; - } - GPOS = pwmState.mask; // Set all active pins high - if (pwmState.mask & (1<<16)) { - GP16O = 1; - } - pwmState.idx = 0; - } - else { - do { - // Drop the pin at this edge - GPOC = 1<expiryCycle) { - int32_t expiryToGo = wave->expiryCycle - now; - if (expiryToGo < 0) { - // Done, remove! - if (i == 16) { - GP16O = 0; - } - GPOC = mask; - wvfState.waveformEnabled &= ~mask; - continue; - } - } - - // Check for toggles - int32_t cyclesToGo = wave->nextServiceCycle - now; - if (cyclesToGo < 0) { - uint32_t nextEdgeCycles; - uint32_t desired = 0; - uint32_t *timeToUpdate; - wvfState.waveformState ^= mask; - if (wvfState.waveformState & mask) { - if (i == 16) { - GP16O = 1; - } - GPOS = mask; - - if (wvfState.waveformToChange & mask) { - // Copy over next full-cycle timings - wave->timeHighCycles = wvfState.waveformNewHigh; - wave->desiredHighCycles = wvfState.waveformNewHigh; - wave->timeLowCycles = wvfState.waveformNewLow; - wave->desiredLowCycles = wvfState.waveformNewLow; - wave->lastEdge = 0; - wvfState.waveformToChange = 0; - } - if (wave->lastEdge) { - desired = wave->desiredLowCycles; - timeToUpdate = &wave->timeLowCycles; - } - nextEdgeCycles = wave->timeHighCycles; - } else { - if (i == 16) { - GP16O = 0; - } - GPOC = mask; - desired = wave->desiredHighCycles; - timeToUpdate = &wave->timeHighCycles; - nextEdgeCycles = wave->timeLowCycles; - } - if (desired) { - desired = adjust(desired); - int32_t err = desired - (now - wave->lastEdge); - if (abs(err) < desired) { // If we've lost > the entire phase, ignore this error signal - err /= 2; - *timeToUpdate += err; - } - } - nextEdgeCycles = adjust(nextEdgeCycles); - wave->nextServiceCycle = now + nextEdgeCycles; - wave->lastEdge = now; - } - nextEventCycle = earliest(nextEventCycle, wave->nextServiceCycle); - } - - // Exit the loop if we've hit the fixed runtime limit or the next event is known to be after that timeout would occur - uint32_t now = GetCycleCountIRQ(); - int32_t cycleDeltaNextEvent = nextEventCycle - now; - int32_t cyclesLeftTimeout = timeoutCycle - now; - done = (cycleDeltaNextEvent > MINIRQTIME) || (cyclesLeftTimeout < 0); - } while (!done); - } // if (wvfState.waveformEnabled) - - if (wvfState.timer1CB) { - nextEventCycle = earliest(nextEventCycle, GetCycleCountIRQ() + wvfState.timer1CB()); - } - - int32_t nextEventCycles = nextEventCycle - GetCycleCountIRQ(); - - if (nextEventCycles < MINIRQTIME) { - nextEventCycles = MINIRQTIME; - } - nextEventCycles -= DELTAIRQ; - - // Do it here instead of global function to save time and because we know it's edge-IRQ - T1L = nextEventCycles >> (turbo ? 1 : 0); -} - -}; From e662f2dce3ff12efd5b8322776e3ffa937461826 Mon Sep 17 00:00:00 2001 From: "Dirk O. Kaar" Date: Sat, 1 May 2021 15:15:58 +0200 Subject: [PATCH 14/16] Remove enablePhaseLockedWaveform(). --- cores/esp8266/core_esp8266_features.h | 4 ---- .../examples/FadePolledTimeout/FadePolledTimeout.ino | 7 ------- 2 files changed, 11 deletions(-) diff --git a/cores/esp8266/core_esp8266_features.h b/cores/esp8266/core_esp8266_features.h index 43ba31674e..7d58d15d83 100644 --- a/cores/esp8266/core_esp8266_features.h +++ b/cores/esp8266/core_esp8266_features.h @@ -123,9 +123,6 @@ inline int esp_get_cpu_freq_mhz() #endif -// Call this function in your setup() to cause the phase locked version of the generator to -// be linked in automatically. Otherwise, the default PWM locked version will be used. -void enablePhaseLockedWaveform(void); // Determine when the sketch runs on ESP8285 #if !defined(CORE_MOCK) @@ -136,7 +133,6 @@ inline bool esp_is_8285() return false; } #endif - #ifdef __cplusplus } #endif diff --git a/libraries/esp8266/examples/FadePolledTimeout/FadePolledTimeout.ino b/libraries/esp8266/examples/FadePolledTimeout/FadePolledTimeout.ino index 5ad731db3c..dd64f7aca4 100644 --- a/libraries/esp8266/examples/FadePolledTimeout/FadePolledTimeout.ino +++ b/libraries/esp8266/examples/FadePolledTimeout/FadePolledTimeout.ino @@ -32,13 +32,6 @@ void setup() { Serial.begin(115200); Serial.println(); - // This next line will cause the code to use the Phase-Locked waveform generator - // instead of the default PWM-Locked one. Comment it out to try the default version. - // For more information on choosing between the two options, see the following pull requests: - // Phase-Locked generator: https://github.com/esp8266/Arduino/pull/7022 - // PWM-Locked generator: https://github.com/esp8266/Arduino/pull/7231 - enablePhaseLockedWaveform(); - pinMode(LED_BUILTIN, OUTPUT); // Initialize the LED_BUILTIN pin as an output analogWriteRange(1000); From 87500880df719452bb5e88e4b5e8468bd72d83ae Mon Sep 17 00:00:00 2001 From: "Dirk O. Kaar" Date: Sat, 1 May 2021 15:41:38 +0200 Subject: [PATCH 15/16] Remove paranoid check. --- cores/esp8266/core_esp8266_waveform.cpp | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/cores/esp8266/core_esp8266_waveform.cpp b/cores/esp8266/core_esp8266_waveform.cpp index 66f20552f1..7a7c1de719 100644 --- a/cores/esp8266/core_esp8266_waveform.cpp +++ b/cores/esp8266/core_esp8266_waveform.cpp @@ -563,11 +563,9 @@ static IRAM_ATTR void timer1Interrupt() { else { do { // Drop the pin at this edge - if (pwmState.mask & (1 << pwmState.pin[pwmState.idx])) { - GPOC = 1 << pwmState.pin[pwmState.idx]; - if (pwmState.pin[pwmState.idx] == 16) { - GP16O = 0; - } + GPOC = 1 << pwmState.pin[pwmState.idx]; + if (pwmState.pin[pwmState.idx] == 16) { + GP16O = 0; } pwmState.idx++; // Any other pins at this same PWM value will have delta==0, drop them too. From 6bafed41dab706203ddd85a32d3ce8e26960d5b2 Mon Sep 17 00:00:00 2001 From: "Dirk O. Kaar" Date: Mon, 3 May 2021 10:58:24 +0200 Subject: [PATCH 16/16] Carry over a few insights from comparing to original waveform (phase-sync) branch. --- cores/esp8266/core_esp8266_waveform.cpp | 6 +++--- cores/esp8266/core_esp8266_waveform.h | 10 ++++------ cores/esp8266/core_esp8266_wiring_pwm.cpp | 17 +---------------- 3 files changed, 8 insertions(+), 25 deletions(-) diff --git a/cores/esp8266/core_esp8266_waveform.cpp b/cores/esp8266/core_esp8266_waveform.cpp index 7a7c1de719..0fc68cea82 100644 --- a/cores/esp8266/core_esp8266_waveform.cpp +++ b/cores/esp8266/core_esp8266_waveform.cpp @@ -41,7 +41,6 @@ #include "core_esp8266_waveform.h" #include -#include "debug.h" #include "ets_sys.h" #include @@ -150,7 +149,7 @@ static __attribute__((noinline)) void initTimer() { timer1_write(IRQLATENCYCCYS); // Cause an interrupt post-haste } -static void IRAM_ATTR deinitIdleTimer() { +static IRAM_ATTR void deinitIdleTimer() { if (!waveform.timer1Running || waveform.enabled || waveform.timer1CB || pwmState.cnt) { return; } @@ -174,8 +173,9 @@ extern "C" { // Wait for mailbox to be emptied (either busy or delay() as needed) static IRAM_ATTR void _notifyPWM(PWMState *p, bool idle) { p->pwmUpdate = nullptr; - pwmState.pwmUpdate = p; std::atomic_thread_fence(std::memory_order_release); + pwmState.pwmUpdate = p; + std::atomic_thread_fence(std::memory_order_acq_rel); if (idle) { forceTimerTrigger(); } diff --git a/cores/esp8266/core_esp8266_waveform.h b/cores/esp8266/core_esp8266_waveform.h index 47413ce9ef..9c3c46e0c3 100644 --- a/cores/esp8266/core_esp8266_waveform.h +++ b/cores/esp8266/core_esp8266_waveform.h @@ -56,9 +56,8 @@ extern "C" { // Setting autoPwm to true allows the wave generator to maintain PWM duty to idle cycle ratio // under load, for applications where frequency or duty cycle must not change, leave false. // Returns true or false on success or failure. -int startWaveform(uint8_t pin, uint32_t timeHighUS, uint32_t timeLowUS, uint32_t runTimeUS = 0, - // Following parameters are ignored unless in PhaseLocked mode - int8_t alignPhase = -1, uint32_t phaseOffsetUS = 0, bool autoPwm = false); +int startWaveform(uint8_t pin, uint32_t timeHighUS, uint32_t timeLowUS, + uint32_t runTimeUS = 0, int8_t alignPhase = -1, uint32_t phaseOffsetUS = 0, bool autoPwm = false); // Start or change a waveform of the specified high and low CPU clock cycles on specific pin. // If runtimeCycles > 0 then automatically stop it after that many CPU clock cycles, relative to the next @@ -68,9 +67,8 @@ int startWaveform(uint8_t pin, uint32_t timeHighUS, uint32_t timeLowUS, uint32_t // Setting autoPwm to true allows the wave generator to maintain PWM duty to idle cycle ratio // under load, for applications where frequency or duty cycle must not change, leave false. // Returns true or false on success or failure. -int startWaveformClockCycles(uint8_t pin, uint32_t timeHighCcys, uint32_t timeLowCcys, uint32_t runTimeCcys = 0, - // Following parameters are ignored unless in PhaseLocked mode - int8_t alignPhase = -1, uint32_t phaseOffsetCcys = 0, bool autoPwm = false); +int startWaveformClockCycles(uint8_t pin, uint32_t timeHighCcys, uint32_t timeLowCcys, + uint32_t runTimeCcys = 0, int8_t alignPhase = -1, uint32_t phaseOffsetCcys = 0, bool autoPwm = false); // Stop a waveform, if any, on the specified pin. // Returns true or false on success or failure. diff --git a/cores/esp8266/core_esp8266_wiring_pwm.cpp b/cores/esp8266/core_esp8266_wiring_pwm.cpp index 07eac4e907..7fba84df42 100644 --- a/cores/esp8266/core_esp8266_wiring_pwm.cpp +++ b/cores/esp8266/core_esp8266_wiring_pwm.cpp @@ -58,7 +58,6 @@ extern void __analogWriteMode(uint8_t pin, int val, bool openDrain) { if (pin > 16) { return; } - uint32_t analogPeriod = microsecondsToClockCycles(1000000UL) / analogFreq; if (val < 0) { val = 0; } else if (val > analogScale) { @@ -75,10 +74,7 @@ extern void __analogWriteMode(uint8_t pin, int val, bool openDrain) { else { pinMode(pin, openDrain ? OUTPUT_OPEN_DRAIN : OUTPUT); } - uint32_t high = (analogPeriod * val) / analogScale; - uint32_t low = analogPeriod - high; - // Find the first GPIO being generated by checking GCC's find-first-set (returns 1 + the bit of the first 1 in an int32_t) - int phaseReference = __builtin_ffs(analogMap) - 1; + // Per the Arduino docs at https://www.arduino.cc/reference/en/language/functions/analog-io/analogwrite/ // val: the duty cycle: between 0 (always off) and 255 (always on). // So if val = 0 we have digitalWrite(LOW), if we have val==range we have digitalWrite(HIGH) @@ -86,17 +82,6 @@ extern void __analogWriteMode(uint8_t pin, int val, bool openDrain) { if (val > 0 && val < analogScale) { analogMap |= (1 << pin); } - } else { - const bool detach = (val == 0 || val == analogScale); - // To go steady LOW or HIGH, let the waveform run into next duty cycle, if any. Then stop. - if (startWaveformClockCycles(pin, high, low, static_cast(detach), phaseReference, 0, true)) { - if (detach) { - delay((1000 + analogFreq) / analogFreq); - stopWaveform(pin); - } else { - analogMap |= (1 << pin); - } - } } }