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{ | ||
"cells": [ | ||
{ | ||
"cell_type": "markdown", | ||
"metadata": { | ||
"id": "" | ||
}, | ||
"source": [ | ||
"# **Initial setup**\n", | ||
"\n", | ||
"Install Bambu and required packages:" | ||
] | ||
}, | ||
{ | ||
"cell_type": "code", | ||
"execution_count": null, | ||
"metadata": { | ||
"id": "" | ||
}, | ||
"outputs": [], | ||
"source": [ | ||
"!echo \"deb http://ppa.launchpad.net/git-core/ppa/ubuntu $(cat /etc/os-release | grep UBUNTU_CODENAME | sed 's/.*=//g') main\" >> /etc/apt/sources.list.d/git-core.list\n", | ||
"!apt-key adv --keyserver keyserver.ubuntu.com --recv-keys A1715D88E1DF1F24\n", | ||
"!apt-get update\n", | ||
"!apt-get install -y --no-install-recommends build-essential ca-certificates gcc-multilib git iverilog verilator wget\n", | ||
"!wget https://release.bambuhls.eu/appimage/bambu-0.9.7.AppImage\n", | ||
"!chmod +x bambu-*.AppImage\n", | ||
"!ln -sf $PWD/bambu-*.AppImage /bin/bambu\n", | ||
"!ln -sf $PWD/bambu-*.AppImage /bin/spider\n", | ||
"!ln -sf $PWD/bambu-*.AppImage /bin/tree-panda-gcc\n", | ||
"!git clone --depth 1 --filter=blob:none --branch doc/bambu101 --sparse https://github.com/ferrandi/PandA-bambu.git\n", | ||
"%cd PandA-bambu\n", | ||
"!git sparse-checkout set documentation/bambu101\n", | ||
"%cd ..\n", | ||
"!mv PandA-bambu/documentation/bambu101/* ." | ||
] | ||
}, | ||
{ | ||
"cell_type": "markdown", | ||
"metadata": {}, | ||
"source": [ | ||
"# Integrate external IPs into an HLS generated design\n", | ||
"Bambu HLS offers the possibility to integrate RTL modules into the design generated through the High-Level Synthesis flow.\n", | ||
"Here we will run through a simple example to show how this is achieved in practice." | ||
] | ||
}, | ||
{ | ||
"cell_type": "markdown", | ||
"metadata": {}, | ||
"source": [ | ||
"## Sample application\n", | ||
"A sample application featuring four external IPs will be used.\n", | ||
"The file tree is explained in the following to identify each of the necessary bits:\n", | ||
"\n", | ||
"── IP_Integration<br>\n", | ||
"  ├── module_lib      : External IPs library<br>\n", | ||
"  │  ├── module_lib.h  : Library header declaring Verilog IPs C stub interfaces<br>\n", | ||
"  │  ├── module_lib.xml  : XML file describing Verilog IPs interfaces<br>\n", | ||
"  │  ├── module1.v    : Verilog IP implementation of module1<br>\n", | ||
"  │  ├── module2.v    : Verilog IP implementation of module2<br>\n", | ||
"  │  ├── printer1.v    : Verilog IP implementation of printer1<br>\n", | ||
"  │  ├── printer2.v    : Verilog IP implementation of printer2<br>\n", | ||
"  │  ├── module1.c    : C stub used to emulate module1 Verilog IP<br>\n", | ||
"  │  ├── module2.c    : C stub used to emulate module2 Verilog IP<br>\n", | ||
"  │  ├── printer1.c    : C stub used to emulate printer1 Verilog IP<br>\n", | ||
"  │  └── printer2.c    : C stub used to emulate printer2 Verilog IP<br>\n", | ||
"  ├── test.my_ip.xml    : XML testbench definition file<br>\n", | ||
"  └── top.c        : C application to feed into the HLS tool" | ||
] | ||
}, | ||
{ | ||
"cell_type": "markdown", | ||
"metadata": {}, | ||
"source": [ | ||
"## XML interface description\n", | ||
"The HLS tool needs an XML description of the interface of the external IPs to be integrated into the HLS generation flow.\n", | ||
"The user must define each external IP interface specifying module name, I/O ports, other IPs which may be used by the implementation, and the IP implementation.\n", | ||
"\n", | ||
"The definition of the library for current example is available in [module_lib/module_lib.xml](module_lib/module_lib.xml) along with the external IPs implementation files [module_lib/module1.v](module_lib/module1.v), [module_lib/module2.v](module_lib/module2.v), [module_lib/printer1.v](module_lib/printer1.v), [module_lib/printer2.v](module_lib/printer2.v)." | ||
] | ||
}, | ||
{ | ||
"cell_type": "markdown", | ||
"metadata": {}, | ||
"source": [ | ||
"## C stub for simulation\n", | ||
"Also a C definition of the external IPs is needed along with the Verilog implmenetation and the XML interface description.\n", | ||
"This is useful to generate the verification testebench results to be compared with the generated design simulation.\n", | ||
"\n", | ||
"C stub definition for external IPs of this example can be found in [module_lib/module1.c](module_lib/module1.c), [module_lib/module2.c](module_lib/module2.c), [module_lib/printer1.c](module_lib/printer1.c), [module_lib/printer2.c](IP_Integration/module_lib/printer2.c)." | ||
] | ||
}, | ||
{ | ||
"cell_type": "markdown", | ||
"metadata": {}, | ||
"source": [ | ||
"## Initializing the HLS tool\n", | ||
"To let the HLS tool know about external IPs all previously discussed files must be passed to the tool alongside standard command line options.\n", | ||
"\n", | ||
"The XML interface description is fed as a standard input file.\n", | ||
"\n", | ||
"The external IPs Verilog implementation files are passed through the --file-input-data command line option.\n", | ||
"\n", | ||
"The external IPs C stubs for simulation are passed through the --C-no-parse command line option to be used for simulation only." | ||
] | ||
}, | ||
{ | ||
"cell_type": "code", | ||
"execution_count": null, | ||
"metadata": {}, | ||
"outputs": [], | ||
"source": [ | ||
"%cd /content/IP_Integration\n", | ||
"!bambu top.c --top-fname=my_ip $PWD/module_lib/module_lib.xml --channels-type=MEM_ACC_11 --generate-tb=test.my_ip.xml --simulate --file-input-data=module_lib/module1.v,module_lib/module2.v,module_lib/printer1.v,module_lib/printer2.v --C-no-parse=module_lib/module1.c,module_lib/module2.c,module_lib/printer1.c,module_lib/printer2.c" | ||
] | ||
} | ||
], | ||
"metadata": { | ||
"colab": { | ||
"collapsed_sections": [], | ||
"name": "bambu.ipynb", | ||
"provenance": [], | ||
"toc_visible": true | ||
}, | ||
"kernelspec": { | ||
"display_name": "Python 3", | ||
"language": "python", | ||
"name": "python3" | ||
} | ||
}, | ||
"nbformat": 4, | ||
"nbformat_minor": 0 | ||
} |
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#include "module_lib.h" | ||
void module1(uint32_t input1, uint16_t input2, module1_output_t *outputs) | ||
{ | ||
outputs->output1 = input1 * input2; | ||
outputs->output2 = input1 + input2; | ||
outputs->output3 = (~input2) + 1; | ||
outputs->output4 = input2 | (((uint32_t)input2)<<16); | ||
} |
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