diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-g50.dts b/arch/arm/boot/dts/aspeed-bmc-opp-g50.dts
index 2c5675bfc904ee..aa80701734e9cb 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-g50.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-g50.dts
@@ -13,7 +13,7 @@
 
 	chosen {
 		stdout-path = &uart5;
-		bootargs = "console=ttyS4,38400 earlyprintk";
+		bootargs = "console=ttyS4,115200 earlyprintk";
 	};
 
 	memory {
@@ -68,6 +68,7 @@
 
 &uart5 {
 	status = "okay";
+	current-speed = <115200>;
 };
 
 &i2c0{
diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c
index b237f3fbb3dad7..0e108adcf1ac52 100644
--- a/arch/arm/mach-aspeed/aspeed.c
+++ b/arch/arm/mach-aspeed/aspeed.c
@@ -141,12 +141,6 @@ static void __init do_sthelens_setup(void)
 
         /* SCU config */
         writel(0x10CC5E80, AST_IO(AST_BASE_SCU | 0x0c));
-        /* We enable the UART clock divisor in the SCU's misc control
-         * register, as the baud rates in aspeed.dtb all assume that the
-         * divisor is active
-         */
-        reg = readl(AST_IO(AST_BASE_SCU | 0x2c));
-        writel(reg | 0x00001000, AST_IO(AST_BASE_SCU | 0x2c));
 
         //Disable host SPI mode  bit 12:13 = 00
         writel(0xFA1C84D6, AST_IO(AST_BASE_SCU | 0x70));