From 1a7740555391585c3c9b5d9119f54864cca74a89 Mon Sep 17 00:00:00 2001
From: elbiazo <elbiazo@icloud.com>
Date: Sun, 19 Nov 2023 00:28:25 -0500
Subject: [PATCH 1/4] fixing segmentation print

---
 src/segmentation.rs | 37 +++++++++++--------------------------
 1 file changed, 11 insertions(+), 26 deletions(-)

diff --git a/src/segmentation.rs b/src/segmentation.rs
index d11a44d0..e05227ce 100644
--- a/src/segmentation.rs
+++ b/src/segmentation.rs
@@ -44,6 +44,16 @@ impl SegmentSelector {
         self.bits >> 3
     }
 
+    /// Returns the requested privilege level of the selector.
+    pub fn rpl(&self) -> u16 {
+        self.bits & 0b11
+    }
+
+    /// Returns the table indicator (TI) bit.
+    pub fn ti(&self) -> u16 {
+        (self.bits >> 2) & 1
+    }
+
     /// Make a new segment selector from a untyped u16 value.
     pub const fn from_raw(bits: u16) -> SegmentSelector {
         SegmentSelector { bits }
@@ -52,37 +62,12 @@ impl SegmentSelector {
 
 impl fmt::Display for SegmentSelector {
     fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
-        let r0 = match self.contains(SegmentSelector::RPL_0) {
-            false => "",
-            true => "Ring 0 segment selector.",
-        };
-        let r1 = match self.contains(SegmentSelector::RPL_1) {
-            false => "",
-            true => "Ring 1 segment selector.",
-        };
-        let r2 = match self.contains(SegmentSelector::RPL_2) {
-            false => "",
-            true => "Ring 2 segment selector.",
-        };
-        let r3 = match self.contains(SegmentSelector::RPL_3) {
-            false => "",
-            true => "Ring 3 segment selector.",
-        };
         let tbl = match self.contains(SegmentSelector::TI_LDT) {
             false => "GDT Table",
             true => "LDT Table",
         };
 
-        write!(
-            f,
-            "Index {} in {}, {}{}{}{}",
-            self.bits >> 3,
-            tbl,
-            r0,
-            r1,
-            r2,
-            r3
-        )
+        write!(f, "Index {} in {}, RPL = {}", self.index(), tbl, self.rpl())
     }
 }
 

From 10d125a7020f2275a050f2e02eef3b5662937465 Mon Sep 17 00:00:00 2001
From: elbiazo <elbiazo@icloud.com>
Date: Wed, 29 Nov 2023 23:17:26 -0500
Subject: [PATCH 2/4] return ring enum instead of u16

---
 src/segmentation.rs | 19 ++++++++++++++++---
 1 file changed, 16 insertions(+), 3 deletions(-)

diff --git a/src/segmentation.rs b/src/segmentation.rs
index e05227ce..76d6db5f 100644
--- a/src/segmentation.rs
+++ b/src/segmentation.rs
@@ -1,5 +1,6 @@
 //! Functionality to manipulate segment registers, build segement
 //! descriptors and selectors.
+use _core::convert::TryInto;
 use bitflags::*;
 
 use core::arch::asm;
@@ -45,8 +46,14 @@ impl SegmentSelector {
     }
 
     /// Returns the requested privilege level of the selector.
-    pub fn rpl(&self) -> u16 {
-        self.bits & 0b11
+    pub fn rpl(&self) -> Ring {
+        match self.bits & 0b11 {
+            0b00 => Ring::Ring0,
+            0b01 => Ring::Ring1,
+            0b10 => Ring::Ring2,
+            0b11 => Ring::Ring3,
+            _ => unreachable!(),
+        }
     }
 
     /// Returns the table indicator (TI) bit.
@@ -67,7 +74,13 @@ impl fmt::Display for SegmentSelector {
             true => "LDT Table",
         };
 
-        write!(f, "Index {} in {}, RPL = {}", self.index(), tbl, self.rpl())
+        write!(
+            f,
+            "Index {} in {}, {:?} segment selector.",
+            self.index(),
+            tbl,
+            self.rpl()
+        )
     }
 }
 

From ba620cb4a8086c843f61b1e75943b4cdf8c6712a Mon Sep 17 00:00:00 2001
From: elbiazo <elbiazo@icloud.com>
Date: Fri, 29 Dec 2023 15:49:07 -0500
Subject: [PATCH 3/4] fix warnings

---
 src/lib.rs                   |  6 +++---
 src/segmentation.rs          |  2 +-
 src/x86_tests.code-workspace | 11 +++++++++++
 3 files changed, 15 insertions(+), 4 deletions(-)
 create mode 100644 src/x86_tests.code-workspace

diff --git a/src/lib.rs b/src/lib.rs
index 42d22bcb..c51c63c3 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -54,9 +54,9 @@ pub mod cpuid {
 
 #[cfg(not(test))]
 mod std {
-    pub use core::fmt;
-    pub use core::ops;
-    pub use core::option;
+    
+    
+    
 }
 
 #[cfg(all(test, feature = "vmtest"))]
diff --git a/src/segmentation.rs b/src/segmentation.rs
index 76d6db5f..336f4f93 100644
--- a/src/segmentation.rs
+++ b/src/segmentation.rs
@@ -1,6 +1,6 @@
 //! Functionality to manipulate segment registers, build segement
 //! descriptors and selectors.
-use _core::convert::TryInto;
+
 use bitflags::*;
 
 use core::arch::asm;
diff --git a/src/x86_tests.code-workspace b/src/x86_tests.code-workspace
new file mode 100644
index 00000000..90e359a1
--- /dev/null
+++ b/src/x86_tests.code-workspace
@@ -0,0 +1,11 @@
+{
+	"folders": [
+		{
+			"path": "../../x86_tests"
+		},
+		{
+			"path": ".."
+		}
+	],
+	"settings": {}
+}
\ No newline at end of file

From 1129ae4f3ad609872aed1581e07abcfdb09ba869 Mon Sep 17 00:00:00 2001
From: elbiazo <elbiazo@icloud.com>
Date: Fri, 29 Dec 2023 15:52:03 -0500
Subject: [PATCH 4/4] remove code workspace

---
 src/x86_tests.code-workspace | 11 -----------
 1 file changed, 11 deletions(-)
 delete mode 100644 src/x86_tests.code-workspace

diff --git a/src/x86_tests.code-workspace b/src/x86_tests.code-workspace
deleted file mode 100644
index 90e359a1..00000000
--- a/src/x86_tests.code-workspace
+++ /dev/null
@@ -1,11 +0,0 @@
-{
-	"folders": [
-		{
-			"path": "../../x86_tests"
-		},
-		{
-			"path": ".."
-		}
-	],
-	"settings": {}
-}
\ No newline at end of file