diff --git a/contents/hw_acceleration/hw_acceleration.qmd b/contents/hw_acceleration/hw_acceleration.qmd
index 77761964..fccdb2e2 100644
--- a/contents/hw_acceleration/hw_acceleration.qmd
+++ b/contents/hw_acceleration/hw_acceleration.qmd
@@ -1004,8 +1004,8 @@ The key benefits of applying ML to simulation and verification are faster design
 A key goal is designing hardware architectures optimized for performance, power, and efficiency. ML introduces new techniques to automate and improve architecture design space exploration for general-purpose and specialized hardware like ML accelerators. Some promising examples include:
 
 * **Architecture search for hardware:** Search techniques like evolutionary algorithms [@kao2020gamma], Bayesian optimization (@reagen2017case, @bhardwaj2020comprehensive), reinforcement learning (@kao2020confuciux, @krishnan2022multiagent) can automatically generate novel hardware architectures by mutating and mixing design attributes like cache size, number of parallel units, memory bandwidth, and so on. This allows for efficient navigation of large design spaces.
-* **Predictive modeling for optimization:** - ML models can be trained to predict hardware performance, power, and efficiency metrics for a given architecture. These become "surrogate models" [@krishnan2023archgym] for fast optimization and space exploration by substituting lengthy simulations.
-* **Specialized accelerator optimization:** - For specialized chips like tensor processing units for AI, automated architecture search techniques based on ML algorithms [@zhang2022fullstack] show promise for finding fast, efficient designs.
+* **Predictive modeling for optimization:** ML models can be trained to predict hardware performance, power, and efficiency metrics for a given architecture. These become "surrogate models" [@krishnan2023archgym] for fast optimization and space exploration by substituting lengthy simulations.
+* **Specialized accelerator optimization:** For specialized chips like tensor processing units for AI, automated architecture search techniques based on ML algorithms [@zhang2022fullstack] show promise for finding fast, efficient designs.
 
 The benefits of using ML include superior design space exploration, automated optimization, and reduced manual effort. Challenges include long training times for some techniques and local optima limitations. However, ML for hardware architecture holds great potential for unlocking performance and efficiency gains.
 
@@ -1017,7 +1017,7 @@ Once a hardware design is complete, it moves to manufacturing. However, variabil
 * **Process optimization:** Supervised learning models can be trained on process data to identify factors that lead to low yields. The models can then optimize parameters to improve yields, throughput, or consistency.
 * **Yield prediction:** By analyzing test data from fabricated designs using techniques like regression trees, ML models can predict yields early in production, allowing process adjustments.
 * **Defect detection:** Computer vision ML techniques can be applied to images of designs to identify defects invisible to the human eye. This enables precision quality control and root cause analysis.
-* **Proactive failure analysis:** - ML models can help predict, diagnose, and prevent issues that lead to downstream defects and failures by analyzing structured and unstructured process data.
+* **Proactive failure analysis:** ML models can help predict, diagnose, and prevent issues that lead to downstream defects and failures by analyzing structured and unstructured process data.
 
 Applying ML to manufacturing enables process optimization, real-time quality control, predictive maintenance, and higher yields. Challenges include managing complex manufacturing data and variations. But ML is poised to transform semiconductor manufacturing.