From 304716d62bc0c5b1046a65912fbc2179e930ad0f Mon Sep 17 00:00:00 2001
From: Evgeniy Tyurin <evgeniy.tyurin@intel.com>
Date: Mon, 26 Jun 2023 21:53:29 -0700
Subject: [PATCH] [SYCL][ESIMD][E2E] Remove old raw_send APIs from the tests

---
 sycl/test-e2e/ESIMD/histogram_raw_send.cpp |  8 --------
 sycl/test-e2e/ESIMD/vadd_raw_send.cpp      | 17 -----------------
 2 files changed, 25 deletions(-)

diff --git a/sycl/test-e2e/ESIMD/histogram_raw_send.cpp b/sycl/test-e2e/ESIMD/histogram_raw_send.cpp
index c471ca8d98431..f99720adc6e12 100644
--- a/sycl/test-e2e/ESIMD/histogram_raw_send.cpp
+++ b/sycl/test-e2e/ESIMD/histogram_raw_send.cpp
@@ -11,8 +11,6 @@
 // UNSUPPORTED: ze_debug
 // RUN: %{build} -o %t1.out
 // RUN: %{run} %t1.out
-// RUN: %{build} -DNEW_API -o %t2.out
-// RUN: %{run} %t2.out
 
 // The test checks raw send functionality with atomic write implementation
 // on SKL. It does not work on DG1 due to send instruction incompatibility.
@@ -87,15 +85,9 @@ ESIMD_INLINE void atomic_write(T *bins, simd<unsigned, n> offset,
   constexpr uint8_t numSrc1 = 0x1;
   constexpr uint8_t isEOT = 0;
   constexpr uint8_t isSendc = 0;
-#ifdef NEW_API
   experimental::esimd::raw_sends(oldDst, vAddr, src0, exDesc, desc, execSize,
                                  sfid, numSrc0, numSrc1, numDst, isEOT, isSendc,
                                  pred);
-#else
-  experimental::esimd::raw_sends_load(oldDst, vAddr, src0, exDesc, desc,
-                                      execSize, sfid, numSrc0, numSrc1, numDst,
-                                      isEOT, isSendc, pred);
-#endif
 }
 
 int main(int argc, char *argv[]) {
diff --git a/sycl/test-e2e/ESIMD/vadd_raw_send.cpp b/sycl/test-e2e/ESIMD/vadd_raw_send.cpp
index 300a572344a19..459378b40c418 100644
--- a/sycl/test-e2e/ESIMD/vadd_raw_send.cpp
+++ b/sycl/test-e2e/ESIMD/vadd_raw_send.cpp
@@ -11,8 +11,6 @@
 // XFAIL: esimd_emulator
 // RUN: %{build} -fno-sycl-esimd-force-stateless-mem -o %t1.out
 // RUN: %{run} %t1.out
-// RUN: %{build} -DNEW_API -fno-sycl-esimd-force-stateless-mem -o %t2.out
-// RUN: %{run} %t2.out
 
 // The test checks raw send functionality with block read/write implementation
 // on SKL. It does not work on DG1 due to send instruction incompatibility.
@@ -42,13 +40,8 @@ ESIMD_INLINE simd<T, N> dwaligned_block_read(AccessorTy acc,
   constexpr uint8_t sfid = 0x0;
   constexpr uint8_t numSrc0 = 0x1;
   constexpr uint8_t numDst = 0x2;
-#ifdef NEW_API
   return experimental::esimd::raw_send(oldDst, src0, exDesc, desc, execSize,
                                        sfid, numSrc0, numDst);
-#else
-  return experimental::esimd::raw_send_load(oldDst, src0, exDesc, desc,
-                                            execSize, sfid, numSrc0, numDst);
-#endif
 }
 
 template <typename T, int N, typename AccessorTy>
@@ -64,13 +57,8 @@ ESIMD_INLINE void block_write1(AccessorTy acc, unsigned int offset,
   constexpr uint8_t sfid = 0x0;
   constexpr uint8_t numSrc0 = 0x1;
   constexpr uint8_t numSrc1 = 0x1;
-#ifdef NEW_API
   return experimental::esimd::raw_sends(src0, data, exDesc, desc, execSize,
                                         sfid, numSrc0, numSrc1);
-#else
-  return experimental::esimd::raw_sends_store(src0, data, exDesc, desc,
-                                              execSize, sfid, numSrc0, numSrc1);
-#endif
 }
 
 template <typename T, int N, typename AccessorTy>
@@ -89,13 +77,8 @@ ESIMD_INLINE void block_write2(AccessorTy acc, unsigned int offset,
   constexpr uint8_t execSize = 0x83;
   constexpr uint8_t sfid = 0x0;
   constexpr uint8_t numSrc0 = 0x2;
-#ifdef NEW_API
   return experimental::esimd::raw_send(src0, exDesc, desc, execSize, sfid,
                                        numSrc0);
-#else
-  return experimental::esimd::raw_send_store(src0, exDesc, desc, execSize, sfid,
-                                             numSrc0);
-#endif
 }
 
 template <typename T> int test(queue q) {