diff --git a/sycl/include/sycl/ext/intel/experimental/esimd/math.hpp b/sycl/include/sycl/ext/intel/experimental/esimd/math.hpp
index 04d93061e02b5..a7462f7d3492b 100644
--- a/sycl/include/sycl/ext/intel/experimental/esimd/math.hpp
+++ b/sycl/include/sycl/ext/intel/experimental/esimd/math.hpp
@@ -1914,6 +1914,32 @@ ESIMD_INLINE RT esimd_ceil(const float &src0, const uint flags = 0) {
   return esimd_rndu<RT, 1U>(src0, flags);
 }
 
+/// Round to integral value using the round to zero rounding mode (vector
+/// version).
+/// \tparam RT element type of the return vector.
+/// \tparam SZ size of the input and returned vectors.
+/// @param src0 the input vector.
+/// @param flag enables/disables the saturation (off by default). Possible
+/// values: saturation_on/saturation_off.
+/// @return vector of rounded values.
+template <typename RT, int SZ>
+ESIMD_NODEBUG ESIMD_INLINE simd<RT, SZ> esimd_trunc(const simd<float, SZ> &src0,
+                                                    const uint flag = 0) {
+  return esimd_rndz<RT, SZ>(src0, flag);
+}
+
+/// Round to integral value using the round to zero rounding mode (scalar
+/// version).
+/// \tparam RT type of the return value.
+/// @param src0 the input operand.
+/// @param flag enables/disables the saturation (off by default). Possible
+/// values: saturation_on/saturation_off.
+/// @return rounded value.
+template <typename RT>
+ESIMD_NODEBUG ESIMD_INLINE RT esimd_trunc(float src0, const uint flag = 0) {
+  return esimd_rndz<RT, 1U>(src0, flag)[0];
+}
+
 /* esimd_atan2_fast - a fast atan2 implementation */
 /* vector input */
 template <int N>
diff --git a/sycl/test/esimd/esimd_math.cpp b/sycl/test/esimd/esimd_math.cpp
index e5b0b5e7d2d3e..de5d4cdfc01db 100644
--- a/sycl/test/esimd/esimd_math.cpp
+++ b/sycl/test/esimd/esimd_math.cpp
@@ -60,3 +60,15 @@ bool test_esimd_dp4() __attribute__((sycl_device)) {
   return (ret[0] == ret[1] && ret[1] == ret[2] && ret[2] == ret[3]) &&
          (ret[0] == 14.0f && ret[4] == 126.0f);
 }
+
+bool test_esimd_trunc() __attribute__((sycl_device)) {
+  simd<float, 16> vfa(1.4f);
+  simd<float, 16> vfr = esimd_trunc<float, 16>(vfa);
+  simd<short, 16> vsr = esimd_trunc<short, 16>(vfa);
+
+  float sfa = 2.8f;
+  float sfr = esimd_trunc<float>(sfa);
+  short ssr = esimd_trunc<short>(sfa);
+
+  return (vfr[0] == 1.f) && (vsr[0] == 1) && (sfr == 2.f) && (ssr == 2);
+}