diff --git a/sycl/doc/extensions/experimental/sycl_ext_oneapi_matrix.asciidoc b/sycl/doc/extensions/experimental/sycl_ext_oneapi_matrix/sycl_ext_oneapi_deprecated_matrix_no_use.asciidoc similarity index 100% rename from sycl/doc/extensions/experimental/sycl_ext_oneapi_matrix.asciidoc rename to sycl/doc/extensions/experimental/sycl_ext_oneapi_matrix/sycl_ext_oneapi_deprecated_matrix_no_use.asciidoc diff --git a/sycl/doc/extensions/experimental/sycl_ext_oneapi_matrix/sycl_ext_oneapi_matrix.asciidoc b/sycl/doc/extensions/experimental/sycl_ext_oneapi_matrix/sycl_ext_oneapi_matrix.asciidoc new file mode 100644 index 0000000000000..8cc6c46fb855c --- /dev/null +++ b/sycl/doc/extensions/experimental/sycl_ext_oneapi_matrix/sycl_ext_oneapi_matrix.asciidoc @@ -0,0 +1,651 @@ +# Matrix Programming Extension for DPC++: sycl_ext_oneapi_matrix +:source-highlighter: coderay +:coderay-linenums-mode: table +:dpcpp: pass:[DPC++] + +// This section needs to be after the document title. +:doctype: book +:toc2: +:toc: left +:encoding: utf-8 +:lang: en + +:blank: pass:[ +] + +// Set the default source code type in this document to C++, +// for syntax highlighting purposes. This is needed because +// docbook uses c++ and html5 uses cpp. +:language: {basebackend@docbook:c++:cpp} + + +== Notice + +Copyright (c) 2021-2021 Intel Corporation. All rights reserved. + +NOTE: Khronos(R) is a registered trademark and SYCL(TM) and SPIR(TM) are +trademarks of The Khronos Group Inc. OpenCL(TM) is a trademark of Apple Inc. +used by permission by Khronos. + +This extension is written against the SYCL 2020 revision 3 specification. All +references below to the "core SYCL specification" or to section numbers in the +SYCL specification refer to that revision. + + +**_NOTE:_** _This document describes the current design and API for the matrix +extension to {dpcpp}. This is an initial experimental version to try out functionality +and performance, and **future versions of this API may change in ways that are incompatible with this experimental version**. The current implementation provides support of the matrix interface on Intel(R) Advanced Matrix Extensions (AMX) and DPAS_ + +## Introduction +This document presents an ongoing work towards defining a unified matrix interface. This interface is intended to unify different tensor hardware: Intel AMX in CPUs, DPAS in Intel GPUs, Habana Gaudi and Goya tensor and gemm cores, Nvidia TPUs, IBM Power MMA. All these hardware provide low-level intrinsics or assembly to access and perform matrix operations. The goal is to provide a unified interface that is portable but also benefit from the maximum performance these different hardware can offer. + +## Feature test macro + +This extension provides a feature-test macro as described in the core SYCL +specification section 6.3.3 "Feature test macros". Therefore, an +implementation supporting this extension must predefine the macro +`SYCL_EXT_ONEAPI_MATRIX` to one of the values defined in the table below. +Applications can test for the existence of this macro to determine if the +implementation supports this feature, or applications can test the macro's +value to determine which of the extension's APIs the implementation supports. + +[frame="none",options="header"] +|====================== +|Value |Description +|1 |Initial extension JIT implementation on Intel AMX and DPAS. load, store, mad, fill, piece-wise operations, and the query interface are supported +|2 |joint matrix type has a new `use` parameter. `layout` on matrix is unused. JIT implementation on Intel AMX and DPAS. load, store, mad, fill, piece-wise operations, and the query interface are supported +|====================== + +## New `joint_matrix` class +We introduce a new class called `joint_matrix`. The user needs to specify the type of the elements, shape, the matrix use, the memory layout, and the memory scope of the matrix. This results into the following description: + +```c++ +namespace sycl::ext::oneapi::experimental::matrix { +template +struct joint_matrix { + joint_matrix(Group g) {} +}; +} +``` + +#### Shape +The same class `joint_matrix` should handle both cases where sizes are constant (GPU case) and when sizes are variables (CPU case). Note that a Intel AMX 2d tile register permits sizes up to 1024 (16rowsx64cols) bytes. The ability to define only one interface for both makes it possible to give the user a way to make use of the flexibility introduced by the CPU but at the same time save resources on the GPU. We use `sycl::dynamic_extent` to differentiate between static and dynamic sizes. + +IMPORTANT: In the current implementation, only the static extent is supported + +#### Use +Specifying the usage of the matrix: matrix left (A), matrix right (B) or accumuator (C) is required by backend implementations to reason about the layout of the matrix in regiters. + +```c++ +namespace sycl::ext::oneapi::experimental::matrix { +enum class matrix_use { + a, + b, + accumulator, +}; +} +``` + +IMPORTANT: In both AMX and DPAS support, `use` template parameter is required + + +#### Layout +Besides row major and column major layouts, `matrix_layout` is flexible enough to introduce customed layouts such as symmetric or tiled layouts. + +```c++ +namespace sycl::ext::oneapi::experimental::matrix { +enum class matrix_layout { + row_major, + col_major, + packed, + unused, +}; +} +``` + +IMPORTANT: In both AMX and DPAS support, layout template parameter is unused and will be ignored if specified + +#### Memory Scope +In this experimental API version, we used the terminology of `joint_matrix` instead of plain `matrix` to emphasis that the matrix is shared among a group of work items and is not private to each work item. The memory scope is added as an additional template parameter and is also part of the constructor arguments. + +IMPORTANT: In the current implementation, only the subgroup scope is supported + +When the group is a `sycl::sub_group`, a matrix is declared as follows: + +```c++ +joint_matrix tA(sg); +``` + + +## Matrix Operations and their Execution Scope +We define three new functions needed to perform the main and common operations on matrices namely, load, store, and the actual multiply and add operation. This set of functions can be easily extended if the tensor hardware implements new features. + +The base pointer determines the starting address of the matrix to be loaded/stored. `layout` determines whether the data are being read/written in a row (`row_major`), column major (`column_major`) fashion, or if the data has already been transformed into VNNI format (`packed`). `stride` describes the number of elements between consecutive rows for row major and packed layout, columns for column major layout. + +Note that for getting maximum performance on Intel AMX and DPAS, prepacking data in the memory is necessary. If users did not specify the packed layouts, transforms done by the implementation will be slow due to extra scatter/gather operations. Hence, we expose the `packed` layout to the user to specify that A or B have already been VNNIed. The packed or VNNI layout is introduced in `VNNI layout` section below. + +IMPORTANT: In the current AMX and DPAS implementation, the layout in the load of matrix B must be `packed_b` or `row_major`. Automatic VNNI transform is supported. The layout in the load of matrices A and C must be `row_major`, and the layout in the store of matrix C must also be `row_major`. + +Since the matrix functions are group operations (as defined in Section 4.17.3 of the SYCL specification), the matrix API has to be accessed by all the work-items in the group in a convergent control flow. The `Group` template argument can be a work-group or a subgroup. These functions will be called once by each work item in the group. + +To be aligned with the SYCL 2020 group algorithms, an additional group argument is added to the matrix operations to designate that these functions are collective operations. The {dpcpp} syntax is the following: + +IMPORTANT: In the current implementation, only the subgroup scope is supported. + +#### Load +```c++ +namespace sycl::ext::oneapi::experimental::matrix { + template + void joint_matrix_load(Group sg, joint_matrix &res, + multi_ptr src, size_t stride, matrix_layout memL); +} +``` +This function loads data from memory to the 2d tiles/registers of Intel AMX/DPAS. + + +#### Store +```c++ +namespace sycl::ext::oneapi::experimental::matrix { + template + void joint_matrix_store(Group sg, joint_matrix &res, + multi_ptr src, size_t stride, matrix_layout memL); +} +``` +This function stores the data from the 2d tiles back to memory. + +#### Multiply and Add + +```c++ +namespace sycl::ext::oneapi::experimental::matrix { + template + joint_matrix joint_matrix_mad(Group sg, joint_matrix A, + joint_matrix B, joint_matrix C); +} +``` +The matrix multiply and add function performs the multiply operation on the matrices `A` and `B`, accumulate the result with `C` and return the result. + + +#### Matrix Initialization: `joint_matrix_fill` +The current interface presented above assumes that all the matrices are directly loaded from memory. This new function called `joint_matrix_fill` makes it possible to multiply a matrix which is not directly loaded from memory but rather initialized directly in the register. On Intel AMX, if the initialization constant is zero, this would map to `_tile_zero` intrinsic: + +```c++ +namespace sycl::ext::oneapi::experimental::matrix { + template + void joint_matrix_fill(Group sg, joint_matrix &m, Tv v); +} +``` +IMPORTANT: In the current implementation, only the subgroup scope is supported. + +#### Element Indexing and Piece-Wise Operations +##### Background +Besides matrix multiply and add, this extension aims to make it possible to perform piece-wise operations on matrices in a SPMD manner. The mechanisms that are recommended to perform such piece-wise operations depend upon which of the following classes the operation falls into: + +Class 1- Element-wise operations where the same operation is performed on every element of the matrix, such that the operation can be performed without knowledge of the position of the element within the matrix. Activation functions or adding a constant value to every element of the matrix are two examples. + +Class 2- Piece-wise operations where the operation depends on the element index of the matrix or the operation takes multiple elements as operands (such as a sum of all elements in a row for example). Quantization that is needed for conversion between low precision types like `int8_t` and `fp32` uses piece-wise operations. + +// We explored multiple options to enable this feature in the matrix interface: 1) Allowing non-restrictive element indexing on the matrix elements would result into slow indexing on the GPU, 2) Operator overloading can represent only element-wise operations and not the operations on pieces (row, column, diagonal, etc) of the matrix. 3) Providing specific functions for these piece-wise operations can resolve some of the functions we know of today like the ones involved in quantization but it is not general to any problem that may occur in the future. + +##### Explicit conversion with mapping from SIMD to SPMD +The data elements in a joint_matrix are distributed or shared across the work-items in the Group in an implementation-defined way. There is no fixed allocation of matrix elements owned by a `joint_matrix` instance to the WIs comprising the group used to instantiate it. For instance, the matrix is a shared entity among the work items in the case of the AMX backend because the AMX tile that holds the matrix data is a 2d register that is shared among the work items. Therefore the partitioning among the WIs is implementation defined. However, it is necessary to allocate WIs to specific elements of the matrix. In order to be able to perform piece-wise operations in a general and efficient way, we provide a conversion function from the joint_matrix domain that is owned by a group of work items to the portion that is owned by each work item. This enables the WI to perform piece-wise operations on the matrix within the SYCL SPMD programming model. + +We introduce a new function `get_wi_data` that provides a view of the portion of the matrix that is owned by the current WI. So modifying `wi_data` means also modifying the joint matrix corresponding elements. The indexing provided inside the `wi_data` class acesses only the portion of the current WI and returns `wi_element`. This latter holds a reference to the original joint_matrix that `wi_data` was constructed from. Users can use the `=` operator to update the element of the `joint_matrix` represented by the `wi_element` after the element-wise operation. + +Using `get_wi_data`, it is not possible to know which portions of data are owned by each thread in the group as this is implementation defined and change from one backend to the other. For general piece-wise operations like sum of rows of a matrix, the WI data to joint matrix mapping coordinates information must be known to reason about the matrix view and extract the relevant piece. But for element-wise operations where the same operation is performed on all the elements of the matrix, having all the WIs in the group apply the operation inside a loop iterating over the `length` of `wi_data` guarantees the whole matrix element-wise operation. + +Therefore, this extension currently only supports class 1 of operations because the mapping between `get_wi_data` and `joint_matrix` elements is not required to be known for these operations. However, general piece-wise operations will be supported in the future as a new API will be provided to convey the mapping from `joint_matrix` domain to WI Domain (See Section "WI data to joint matrix mapping coordinates information for piece-wise operations for more information"). + +Also, note that `get_wi_data` cannot return a fixed size array length because the length of the WI portion is a runtime variable for the following reasons: + +1- The main compilation mode of SYCL is JIT compilation and partitioning among WIs is implementation defined. + +2- SG size is not fixed (like in the CUDA backend where warp size is always 32). + +3- AMX has the flexibility of allowing variable sizes on the matrix (`dynamic_extent`). + +In the case of CUDA backend which is SYCL AOT compiled and SG size = 32 known and fixed, the additional marray capability will be provided. + +The code listing below shows a synopsis of these new APIs. + +```c++ +namespace sycl::ext::oneapi::experimental::matrix { +template +struct joint_matrix { + wi_data get_wi_data(); +}; +template +class wi_data { + size_t length(); + wi_element operator[](size_t i); +}; +template +class wi_element { + operator T(); + wi_element &operator=(const T &rhs); +… +}; +} +``` + +In the following example `wi_data_c` is a reference to the WI owned portion of the joint matrix `matC`. As such `wi_data_c[i] OP rhs` updates the corresponding matrix element in the joint_matrix `matC`. +Vectorization along the subgroup dimension will get enabled automatically to vectorize the contiguous portion of the matrix. + + +```c++ +auto wi_data_c = matC.get_wi_data(); +for (int i = 0; i < wi_data_c.length(); i++) + wi_data_c[i] *= alpha; // Note that the indexing here "i" is in the vector owned by a WI, not in the matrix C +``` + +IMPORTANT: In the current implementation, only the subgroup scope is supported. + +IMPORTANT: The WI data to joint matrix mapping coordinates information is not implemented yet. + +IMPORTANT: Since the current tensorcores implementation is AOT, it is possible to know how many elements are owned by each WI at compile time. In this case, `wi_data` can be of type `marray`. An additional interface will be provided for the tensorcores AOT backend. + + +## VNNI/Packed Layout +Intel AMX and DPAS compute assumes register for B tile (src1) to be in VNNI format as they need 32bit of K-data in A and B to be contiguous in memory. +The VNNI blocking factor is 2 in the case of 16-bit types, and it is 4 in the case of 8-bit types. While the current implementation assumes that the matrix has been already packed by the user for performance reasons, the layout information is needed to inform the implementation about this transform. The following example illustrates how a matrix in `row_major` layout is transformed into the `packed_b` layout for a 16-bit type. + +#### Example 1: 16-bit elements + // Example of a 4 row x 4 column matrix using a 16-bit data element, in row-major layout. + // Element a1 is contiguous in memory with element b1, etc. + // --------------------------------- + // a1, b1, c1, d1 + // a2, b2, c2, d2 + // a3, b3, c3, d3 + // a4, b4, c4, d4 + // --------------------------------- + // The same matrix reformatted in packed_b layout. + // Here, packing of 2 elements is needed to form 32 bits. + // Element a1 is contiguous in memory with element a2, etc. + // --------------------------------- + // a1, a2, b1, b2, c1, c2, d1, d2 + // a3, a4, b3, b4, c3, c4, d3, d4 + +#### Example 2: 8-bit elements + + // Example of a 4 row x 4 column matrix using a 8-bit data element, in row-major layout. + // Element a1 is contiguous in memory with element b1, etc. + // --------------------------------- + // a1, b1, c1, d1 + // a2, b2, c2, d2 + // a3, b3, c3, d3 + // a4, b4, c4, d4 + // --------------------------------- + // The same matrix reformatted in packed_b layout. + // Here, packing of 4 elements is needed to form 32 bits. + // Elements a1, a2, a3, a4 are contiguous in memory, etc. + // --------------------------------- + // a1, a2, a3, a4, b1, b2, b3, b4, c1, c2, c3, c4, d1, d2, d3, d4 + + +## Example using int8_t type +```c++ +using namespace sycl::ext::oneapi::experimental::matrix; + +queue q; +range<2> G = {M/tM, N}; +range<2> L = {1, SG_SIZE}; +int8_t *memA = malloc_shared(M*K, q); +int8_t *memB = malloc_shared(K*N, q); +Int32_t *memC = malloc_shared(M*N, q); +// Assuming memB has already been VNNIed +q.parallel_for(nd_range<2>(G, L), [=](nd_item<2> item) + [[sycl::reqd_sub_group_size(SG_SIZE)]] { + const auto global_idx = item.get_global_id(0); + const auto global_idy = item.get_global_id(1); + const auto sg_startx = global_idx - item.get_local_id(0); + const auto sg_starty = global_idy - item.get_local_id(1); + sub_group sg = item.get_sub_group(); + joint_matrix tA(sg); + joint_matrix tB(sg); + joint_matrix tC(sg); + joint_matrix_fill(sg, tC, 0); + for (int k = 0; k < K; k += tk) { + joint_matrix_load(sg, tA, memA + sg_startx * tM * K + k, K, matrix_layout::row_major); + joint_matrix_load(sg, tB, memB + k * N + sg_starty/SG_SIZE*tN*4, N*4, matrix_layout::packed); // VNNI + tC = joint_matrix_mad(sg, tA, tB, tC); + } + auto wi_data_c = matC.get_wi_data(); + for (int i = 0; i < wi_data_c.length(); i++) + wi_data_c[i] *= alpha; // The indexing here "i" is in the vector owned by a WI, not in the matrix C + joint_matrix_store(sg, tC, memC + sg_startx * tM * N + sg_starty/SG_SIZE*tN, N, matrix_layout::row_major); +}).wait(); +``` + +== Query Interface +Intel AMX, DPAS and Nvidia TPUs support different sizes and types. +The query interface is used to validate user code and inform them about supported types, sizes, scope, and layouts by the implementation. +This also offers development and tuning productivity by both scientists and library developers. The query interface we are proposing here is a compile-time query, +so there will be no runtime errors. +The query interface proposed here consists of three functionalities: + +- Validation: at compile time, the validation functionality informs the user whether a specific combination is valid or not. This takes place when the user specifies all template parameters. + +- Default values: this provides a default shape if the user does not provide a specific combination. In this case, aliases to the `joint_matrix` type can be used, namely `joint_matrix_a/b/c` where no additional argument is needed. This form happens when the user specifies all template parameters except the sizes of the matrices (`tiles`) M, N, and K. + +- General query: the general query interface provides information about sizes, types, static/dynamic, and scopes that are supported by a specific TPU implementation. This is needed to avoid padding by the user, for tuning, and efficient code generation if used by a library. The general query return an array of `combinations` of `combination` type. Each combination includes the sizes and the types for the matrices A, B, and C. Note that for each TPU, the query returns `max_msize, max_nsize, max_ksize` or `msize, nsize, ksize` exclusively depending whether the implementation supports a continuous or discrete number of sizes. For example, Intel AMX implementation supports a continuous number of sizes so the `max_*` variant is applied and only the maximum number is returned. DPAS implementation, on the other hand, supports a discrete list of numbers so the `msize, nsize, ksize` variant is applied. This form takes place when users only specify the TPU they are interested in using. + +The table below provides a description for each of the member variables and type aliases in `tpu_params` class and the forms in which they are defined. + +[frame="none",options="header"] +|====================== +| Member/type alias in `tpu_params` | Forms they are defined in |Description +|`type_a`| validation, default values|type alias for the type of matrix A +|`type_b`| validation, default values|type alias for the type of matrix B +|`type_c`| validation, default values|type alias for the type of matrix C +|`defaultM`| validation, default values|when no sizes are provided by the user, indicates the suggested default size for M; usually this corresponds to the maximum size the implementation supports. In validation mode, where the user does provide sizes, this is the same value M that the user provides if M is supported by the implementation +|`defaultN`| validation, default values|when no sizes are provided by the user, indicates the suggested default size for N; usually this corresponds to the maximum size the implementation supports. In validation mode, where the user does provide sizes, this is the same value N that the user provides if N is supported by the implementation +|`defaultK`| validation, default values|when no sizes are provided by the user, indicates the suggested default size for K; usually this corresponds to the maximum size the implementation supports. In validation mode, where the user does provide sizes, this is the same value K that the user provides if K is supported by the implementation +|`joint_matrix_a`| validation, default values|type alias for `joint_matrix` for matrix A +|`joint_matrix_b`| validation, default values| type alias for `joint_matrix` for matrix B +|`joint_matrix_c`| validation, default values| type alias for `joint_matrix` for matrix C +|`dynamic_p`| validation, default values, general query| a boolean that indicates whether the implementation supports dynamic sizes (true) or not (false) +|numtiles| validation, default values, general query|indicates number of tiles in Intel AMX (does not apply to DPAS) +|scope| validation, default values, general query| indicates the memory and execution scope supported by the TPU implementation +|`combination` | validation, default values, general query|composes the types and sizes of A, B, C matrices allowed in one combination +|`max_msize`, `max_nsize`, `max_ksize`| validation, default values, general query| if the TPU implementation supports a continuous number of element sizes, each of these members is non-zero, and the TPU implementation supports all element sizes from 1 up to (and including) that number. By contrast, if the TPU implementation supports a discrete number of element sizes, each of these members has the value zero +|`msize`, `nsize`, `ksize`| validation, default values, general query| if the TPU implementation supports a discrete number of element sizes, each of these members is non-zero, and the value tells one of the supported element sizes. By contrast, if the TPU supports a continuous number of element sizes, each of these members has the value zero +|`atype`, `btype`, `ctype`| validation, default values, general query| indicates the types supported in the combination +|`combinations` | validation, default values, general query| tells the set of supported matrix sizes and types according to the template parameters that are provided. In the "general query" form, the user provides only the TPU type, so the combinations array contains all supported tile sizes and element types for that TPU. In the "default values" form, the user provides the TPU type and element types, so the combinations array contains only those supported matrix sizes and element types that match those element types on that TPU. In the "validation" form, the user provides the TPU type, element types, and element sizes so only this specific combination is returned in the combinations array. +|`num_combinations`| validation, default values, general query|indicates number of combinations supported by the TPU implementation which corresponds to the size of the `combinations` array +|====================== + + + + + + +```c++ +namespace sycl::ext::oneapi::experimental::matrix { + + +template +struct tpu_params; + +// Validation form: Valid or not +// Specialization when both types and sizes are given +template +struct tpu_params< + tpu::amx, Ta, Tb, Tc, M, N, K, + typename std::enable_if<( + !std::is_same_v && !std::is_same_v && + !std::is_same_v && M != 0 && N != 0 && K != 0)>::type> { + // Validate that parameters are supported + static_assert( + (M == 0 && N == 0 && K == 0) || + (is_combination_valid_amx(M, N, K)), + "Invalid parameters for Intel AMX, query valid types and maximum sizes " + "using: " + "tpu_params myparams; and then check out myparams.combinations array"); + + + using type_a = Ta; // this type alias is not available in the current implementation + using type_b = Tb; // this type alias is not available in the current implementation + using type_c = Tc; // this type alias is not available in the current implementation + + // if combination is valid, construct the matrices + + static constexpr std::size_t defaultM = (M != 0) ? M : 16; + static constexpr std::size_t defaultN = (N != 0) ? N : 16; + static constexpr std::size_t defaultK = + (K != 0) ? K : ((sizeof(Ta) == 1) ? 64 : 32); + + template + using joint_matrix_a = joint_matrix; + template + using joint_matrix_b = joint_matrix; + template + using joint_matrix_c = joint_matrix; + + static constexpr bool dynamic_p = false; // should be true in future implementations + // because Intel AMX hardware supports dynamic sizes + static constexpr uint32_t numtiles = 8; + static constexpr scope_t scope = scope_t::sub_group; + struct combination { + uint32_t max_msize; + uint32_t max_nsize; + uint32_t max_ksize; + uint32_t msize; + uint32_t nsize; + uint32_t ksize; + matrix_type atype; + matrix_type btype; + matrix_type ctype; + }; + // In this case, the combinations array contains only the combination that the user provided + static constexpr combination combinations[] = { + {16, 16, (sizeof(Ta) == 1) ? 64 : 32, M, N, K}}; + static constexpr int num_combinations = + sizeof(combinations) / sizeof(combination); +}; + +// Default values form: Sizes-only query +// Specialization for when only types are given, need to query only sizes +template +struct tpu_params && + !std::is_same_v && + !std::is_same_v)>::type> { + static_assert((are_types_valid_amx()), + "Invalid types for Intel AMX, supported types are int8_t, uint8_t, " + "and bf16 (Note that unsigned short should be used in the" + "DPC++ code to implement bf16) "); + + using type_a = Ta; // this type alias is not available in the current implementation + using type_b = Tb; // this type alias is not available in the current implementation + using type_c = Tc; // this type alias is not available in the current implementation + + // construct the matrices using the default sizes + static constexpr std::size_t defaultM = 16; + static constexpr std::size_t defaultN = 16; + static constexpr std::size_t defaultK = ((sizeof(Ta) == 1) ? 64 : 32); + + template + using joint_matrix_a = joint_matrix; + template + using joint_matrix_b = joint_matrix; + template + using joint_matrix_c = joint_matrix; + + static constexpr bool dynamic_p = false; // should be true in future implementations because + // Intel AMX hardware supports dynamic sizes + static constexpr uint32_t numtiles = 8; + static constexpr scope_t scope = scope_t::sub_group; + struct combination { + uint32_t max_msize; + uint32_t max_nsize; + uint32_t max_ksize; + uint32_t msize; + uint32_t nsize; + uint32_t ksize; + matrix_type atype; + matrix_type btype; + matrix_type ctype; + }; + // In this case, the combinations array contain only the combinations that correspond to the Ta, Tb, and Tc + // types that the user provided + static constexpr combination combinations[] = { + {16, 16, (sizeof(Ta) == 1) ? 64 : 32}}; + static constexpr int num_combinations = + sizeof(combinations) / sizeof(combination); +}; + +// General query form: +// types are not given, no default sizes and no implicit matrix construction +template +struct tpu_params { + static constexpr bool dynamic_p = false; // should be true in future implementations because + // Intel AMX hardware supports dynamic sizes + static constexpr uint32_t numtiles = 8; + static constexpr scope_t scope = scope_t::sub_group; + struct combination { + uint32_t max_msize; + uint32_t max_nsize; + uint32_t max_ksize; + uint32_t msize; + uint32_t nsize; + uint32_t ksize; + matrix_type atype; + matrix_type btype; + matrix_type ctype; + }; + + static constexpr combination combinations[] = { + {16, 16, 64, 0, 0, 0, matrix_type::sint8, matrix_type::sint8, matrix_type::sint32}, + {16, 16, 64, 0, 0, 0, matrix_type::sint8, matrix_type::uint8, matrix_type::sint32}, + {16, 16, 64, 0, 0, 0, matrix_type::uint8, matrix_type::sint8, matrix_type::sint32}, + {16, 16, 64, 0, 0, 0, matrix_type::uint8, matrix_type::uint8, matrix_type::sint32}, + {16, 16, 32, 0, 0,0, matrix_type::bf16, matrix_type::bf16, matrix_type::fp32}}; + static constexpr int num_combinations = + sizeof(combinations) / sizeof(combination); +}; + + +enum class tpu { + dpas, + amx +}; + +enum class matrix_type { + bf16, + fp16, + fp19, // tfloat32 + fp32, + fp64, + sint2, + sint4, + sint8, + sint16, + sint32, + sint64, + uint2, + uint4, + uint8, + uint16, + uint32, + uint64 +}; + +enum class scope_t { + sub_group, + work_group +}; +} +``` + + +=== Validation Example: +```c++ +// User can provide sizes besides the types and tpu_params can assert if they are supported or not +// in this case, an assertion will happens as 16 is not a supported size for M +using myparams = tpu_params; +size_t NDRangeM = M / myparams::defaultM; //Assertion would happen at this line +size_t NDRangeN = N / myparams::defaultN; +``` + +=== Default Values Example: +```c++ +using myparams = tpu_params_both; +// use this to construct the ranges on the host side +size_t NDRangeM = M / myparams::defaultM; +size_t NDRangeN = N / myparams::defaultN; +//if M,N,K do not multiply the default sizes, padding has to be done +// device code: the matrices are constructed using the default dimensions +myparams::joint_matrix_a sub_a(sg); +myparams::joint_matrix_b sub_b(sg); +myparams::joint_matrix_c sub_c(sg); + +``` + +=== General Query Example: +```c++ +constexpr int M = 1500; // with msize = 8 and msize = 4, + // M can be broken up to 125 sequence of 8-sized ops and remaining 500 using 125 sequence of 4-sized ops +tpu_params params; +constexpr int msize = break_dimension(params, M); +constexpr int msize_remainder = break_dimension_remainder(params, M); +constexpr int nsize = params.combinations[0].nsize; +constexpr int ksize = params.combinations[0].ksize; +// device code: +joint_matrix sub_a(sg); +joint_matrix sub_b(sg); +joint_matrix sub_c(sg); +//Remainder handling +``` + +## Future-looking API + +### Memory scope +The current experimental API uses `joint_` semantics to define the memory scope of the matrix. The long term solution is to use the proposed link:../supported/sycl_ext_oneapi_local_memory.asciidoc[`group_local_memory` extension] to allocate the matrix in local memory associated with a SYCL group as shown in the example below. + + +```c++ +multi_ptr, address_space::local_space> tA_ptr = group_local_memory>(sg); +``` +We did not utilize this extension for this matrix API version because sub-group local memory is not yet well defined in {dpcpp}. Moreover, the representation of this notion in LLVM IR and SPIR-V is not clear yet. + +### WI data to joint matrix mapping coordinates information for piece-wise operations +The indexing provided inside the `wi_data` class acesses only the portion of the current WI. It is not possible the location or coordinates of this portion in the original matrix. This coordinates mapping is implementation defined and change from one backend to the other. For general piece-wise operations like sum of rows of a matrix, the WI data to joint matrix mapping coordinates information is needed to reason about the matrix view. +With joint matrix, we want to write, as much as possible, one code to run on different backends. So if backend X states that a WI owns one exact row of the matrix for instance. Writing the following code will work only on that backend for that version of hardware. The hardware and implementations change, for instance, the same WI can own half of the row because SG size increased or hardware units increased. + +```c++ +auto data = C.get_wi_data(); +for (int i = 0; i < length; ++i) { + sum_of_local_rows[row] += data[i]; +} +``` + + + +We want to keep backward compatibility in the joint matrix code when implementations or hardware change. To that end, instead of hard-code this mapping, we write general backend and target-agnostic, especially in the JIT compilation mode of SYCL. This is possible by querying this mapping so code does not have to change from one version to the other. + +So for the mapping problem, since this mapping is implementation-defined, one of the proposals is to add runtime functions like: +```c++ +auto data = C.get_wi_data(); +for (int i = 0; i < length; ++i) { + auto row, col = data[i].get_coord(); + sum_of_local_rows[row] += data[i]; +} +``` + + +## Open Questions +- Besides row, col major and packed (VNNI) layout, what are the additional layouts that should absolutely be added? +- Are there alternative names for the `packed_a` and `packed_b` layouts that would be clearer to distinguish between the VNNI Layout in matrix A and VNNI layout in matrix B of a matrix multiply and add operation on Intel AMX? +-- Yes, this will be addressed in the next revision where `use` argument will be introduced to distinguish between right (B) , left (A), and accumulator matrix. +- Ronan Keryell: "It would be interesting to investigate whether providing also member functions would simplify the API. Provide both so it is possible to use the best one for each use case, while waiting for https://en.wikipedia.org/wiki/Uniform_Function_Call_Syntax to land into C++?" + +- In the future looking APIs, `get_wi_data` (that is currently under design) returns an owned object. Should this return a view object to make sure the original matrix C is changed after its slices are modified. + +## TODO List +- Add WI data to joint matrix mapping coordinates information for piece-wise operations. This will be added as part of the query or new methods to the 'get_wi_data' class. +- Change the names default sizes in the query from defaultM, defaultN, defaultK to M,N,K +- Change the type of `scope` in the query interface to be able to return more than one value. This will be useful in the event we support other scopes like workgroup besides subgroups +- Add a more realistic and complete example that shows the value of the general query + + +## Revision History + +[frame="none",options="header"] +|====================== +|Rev |Date |Author |Changes +|1 |2021-04-13 |Dounia Khaldi |Initial public working draft. +|2 |2021-10-05 |Dounia Khaldi |JIT implementation on both Intel AMX and DPAS +|3 |2022-05-16 |Dounia Khaldi |Add matrix fill and piece-wise operations support +|4 |2022-08-25 |Dounia Khaldi |Update the matrix spec by adding new matrix use parameter and remove reference to the AOT AMX initial implementation +|======================