diff --git a/esp-hal-common/src/lib.rs b/esp-hal-common/src/lib.rs
index dcde7b5d59d..44631d7dcf6 100644
--- a/esp-hal-common/src/lib.rs
+++ b/esp-hal-common/src/lib.rs
@@ -43,7 +43,6 @@ pub mod interrupt;
 pub mod prelude;
 pub mod pulse_control;
 pub mod rng;
-#[cfg(not(feature = "esp32c3"))]
 pub mod rtc_cntl;
 pub mod serial;
 pub mod spi;
@@ -58,7 +57,6 @@ pub use interrupt::*;
 pub use procmacros as macros;
 pub use pulse_control::PulseControl;
 pub use rng::Rng;
-#[cfg(not(feature = "esp32c3"))]
 pub use rtc_cntl::RtcCntl;
 pub use serial::Serial;
 pub use spi::Spi;
diff --git a/esp-hal-common/src/rtc_cntl.rs b/esp-hal-common/src/rtc_cntl.rs
index 82740fec5b0..2773f1f0daa 100644
--- a/esp-hal-common/src/rtc_cntl.rs
+++ b/esp-hal-common/src/rtc_cntl.rs
@@ -23,4 +23,24 @@ impl RtcCntl {
             .modify(|_, w| w.wdt_en().bit(enable).wdt_flashboot_mod_en().clear_bit());
         self.set_wdt_write_protection(true);
     }
+
+    #[cfg(any(feature = "esp32c3", feature = "esp32s3"))]
+    pub fn set_super_wdt_enable(&mut self, enable: bool) {
+        self.set_swd_write_protection(false);
+
+        self.rtc_cntl
+            .swd_conf
+            .write(|w| w.swd_auto_feed_en().bit(!enable));
+
+        self.set_swd_write_protection(true);
+    }
+
+    #[cfg(any(feature = "esp32c3", feature = "esp32s3"))]
+    fn set_swd_write_protection(&mut self, enable: bool) {
+        let wkey = if enable { 0u32 } else { 0x8F1D_312A };
+
+        self.rtc_cntl
+            .swd_wprotect
+            .write(|w| unsafe { w.swd_wkey().bits(wkey) });
+    }
 }
diff --git a/esp32c3-hal/examples/adc.rs b/esp32c3-hal/examples/adc.rs
index 6d0a24925c1..b84b7f43494 100644
--- a/esp32c3-hal/examples/adc.rs
+++ b/esp32c3-hal/examples/adc.rs
@@ -36,7 +36,7 @@ fn main() -> ! {
     let mut wdt1 = timer_group1.wdt;
 
     rtc_cntl.set_super_wdt_enable(false);
-    rtc_cntl.set_wdt_enable(false);
+    rtc_cntl.set_wdt_global_enable(false);
     wdt0.disable();
     wdt1.disable();
 
diff --git a/esp32c3-hal/examples/advanced_serial.rs b/esp32c3-hal/examples/advanced_serial.rs
index ac0e73066ad..ac9d78d903d 100644
--- a/esp32c3-hal/examples/advanced_serial.rs
+++ b/esp32c3-hal/examples/advanced_serial.rs
@@ -39,7 +39,7 @@ fn main() -> ! {
 
     // Disable watchdog timers
     rtc_cntl.set_super_wdt_enable(false);
-    rtc_cntl.set_wdt_enable(false);
+    rtc_cntl.set_wdt_global_enable(false);
     wdt0.disable();
     wdt1.disable();
 
diff --git a/esp32c3-hal/examples/blinky.rs b/esp32c3-hal/examples/blinky.rs
index ba263d9f55b..5a8e648e12a 100644
--- a/esp32c3-hal/examples/blinky.rs
+++ b/esp32c3-hal/examples/blinky.rs
@@ -33,7 +33,7 @@ fn main() -> ! {
     let mut wdt1 = timer_group1.wdt;
 
     rtc_cntl.set_super_wdt_enable(false);
-    rtc_cntl.set_wdt_enable(false);
+    rtc_cntl.set_wdt_global_enable(false);
     wdt0.disable();
     wdt1.disable();
 
diff --git a/esp32c3-hal/examples/gpio_interrupt.rs b/esp32c3-hal/examples/gpio_interrupt.rs
index 67980438c13..afb0af274e1 100644
--- a/esp32c3-hal/examples/gpio_interrupt.rs
+++ b/esp32c3-hal/examples/gpio_interrupt.rs
@@ -40,7 +40,7 @@ fn main() -> ! {
     let mut wdt1 = timer_group1.wdt;
 
     rtc_cntl.set_super_wdt_enable(false);
-    rtc_cntl.set_wdt_enable(false);
+    rtc_cntl.set_wdt_global_enable(false);
     wdt0.disable();
     wdt1.disable();
 
diff --git a/esp32c3-hal/examples/hello_rgb.rs b/esp32c3-hal/examples/hello_rgb.rs
index a4a3b41ec1d..ee34bbcbca0 100644
--- a/esp32c3-hal/examples/hello_rgb.rs
+++ b/esp32c3-hal/examples/hello_rgb.rs
@@ -46,7 +46,7 @@ fn main() -> ! {
 
     // Disable watchdogs
     rtc_cntl.set_super_wdt_enable(false);
-    rtc_cntl.set_wdt_enable(false);
+    rtc_cntl.set_wdt_global_enable(false);
     wdt0.disable();
 
     // Configure RMT peripheral globally
diff --git a/esp32c3-hal/examples/hello_world.rs b/esp32c3-hal/examples/hello_world.rs
index 712f36e8c78..bb1cd3edbe2 100644
--- a/esp32c3-hal/examples/hello_world.rs
+++ b/esp32c3-hal/examples/hello_world.rs
@@ -34,7 +34,7 @@ fn main() -> ! {
 
     // Disable watchdog timers
     rtc_cntl.set_super_wdt_enable(false);
-    rtc_cntl.set_wdt_enable(false);
+    rtc_cntl.set_wdt_global_enable(false);
     wdt0.disable();
     wdt1.disable();
 
diff --git a/esp32c3-hal/examples/i2c_display.rs b/esp32c3-hal/examples/i2c_display.rs
index b68ac834905..da244b1eaa8 100644
--- a/esp32c3-hal/examples/i2c_display.rs
+++ b/esp32c3-hal/examples/i2c_display.rs
@@ -48,7 +48,7 @@ fn main() -> ! {
 
     // Disable watchdog timers
     rtc_cntl.set_super_wdt_enable(false);
-    rtc_cntl.set_wdt_enable(false);
+    rtc_cntl.set_wdt_global_enable(false);
     wdt0.disable();
     wdt1.disable();
 
diff --git a/esp32c3-hal/examples/read_efuse.rs b/esp32c3-hal/examples/read_efuse.rs
index ebe2eb1058b..ac604f81c43 100644
--- a/esp32c3-hal/examples/read_efuse.rs
+++ b/esp32c3-hal/examples/read_efuse.rs
@@ -33,7 +33,7 @@ fn main() -> ! {
 
     // Disable watchdog timers
     rtc_cntl.set_super_wdt_enable(false);
-    rtc_cntl.set_wdt_enable(false);
+    rtc_cntl.set_wdt_global_enable(false);
     wdt0.disable();
     wdt1.disable();
 
diff --git a/esp32c3-hal/examples/serial_interrupts.rs b/esp32c3-hal/examples/serial_interrupts.rs
index fd5821465bb..c081c09fbc9 100644
--- a/esp32c3-hal/examples/serial_interrupts.rs
+++ b/esp32c3-hal/examples/serial_interrupts.rs
@@ -41,7 +41,7 @@ fn main() -> ! {
 
     // Disable watchdog timers
     rtc_cntl.set_super_wdt_enable(false);
-    rtc_cntl.set_wdt_enable(false);
+    rtc_cntl.set_wdt_global_enable(false);
     wdt0.disable();
     wdt1.disable();
 
diff --git a/esp32c3-hal/examples/spi_loopback.rs b/esp32c3-hal/examples/spi_loopback.rs
index f86c4b11d8b..b149b2ab0b6 100644
--- a/esp32c3-hal/examples/spi_loopback.rs
+++ b/esp32c3-hal/examples/spi_loopback.rs
@@ -49,7 +49,7 @@ fn main() -> ! {
     let mut serial0 = Serial::new(peripherals.UART0);
 
     rtc_cntl.set_super_wdt_enable(false);
-    rtc_cntl.set_wdt_enable(false);
+    rtc_cntl.set_wdt_global_enable(false);
     wdt0.disable();
     wdt1.disable();
 
diff --git a/esp32c3-hal/examples/systimer.rs b/esp32c3-hal/examples/systimer.rs
index 172d7e82873..3cbd9b3c60b 100644
--- a/esp32c3-hal/examples/systimer.rs
+++ b/esp32c3-hal/examples/systimer.rs
@@ -39,7 +39,7 @@ fn main() -> ! {
     let mut wdt1 = timer_group1.wdt;
 
     rtc_cntl.set_super_wdt_enable(false);
-    rtc_cntl.set_wdt_enable(false);
+    rtc_cntl.set_wdt_global_enable(false);
     wdt0.disable();
     wdt1.disable();
 
diff --git a/esp32c3-hal/examples/timer_interrupt.rs b/esp32c3-hal/examples/timer_interrupt.rs
index 8253d61641f..c86db34c2b0 100644
--- a/esp32c3-hal/examples/timer_interrupt.rs
+++ b/esp32c3-hal/examples/timer_interrupt.rs
@@ -40,7 +40,7 @@ fn main() -> ! {
     let mut wdt1 = timer_group1.wdt;
 
     rtc_cntl.set_super_wdt_enable(false);
-    rtc_cntl.set_wdt_enable(false);
+    rtc_cntl.set_wdt_global_enable(false);
     wdt0.disable();
     wdt1.disable();
 
diff --git a/esp32c3-hal/examples/usb_serial_jtag.rs b/esp32c3-hal/examples/usb_serial_jtag.rs
index 94df2728d13..daf44867b23 100644
--- a/esp32c3-hal/examples/usb_serial_jtag.rs
+++ b/esp32c3-hal/examples/usb_serial_jtag.rs
@@ -35,7 +35,7 @@ fn main() -> ! {
 
     // Disable watchdog timers
     rtc_cntl.set_super_wdt_enable(false);
-    rtc_cntl.set_wdt_enable(false);
+    rtc_cntl.set_wdt_global_enable(false);
     wdt0.disable();
     wdt1.disable();
 
diff --git a/esp32c3-hal/examples/watchdog.rs b/esp32c3-hal/examples/watchdog.rs
index 021b786ce08..b3d46b8e224 100644
--- a/esp32c3-hal/examples/watchdog.rs
+++ b/esp32c3-hal/examples/watchdog.rs
@@ -35,7 +35,7 @@ fn main() -> ! {
 
     // Disable watchdog timers
     rtc_cntl.set_super_wdt_enable(false);
-    rtc_cntl.set_wdt_enable(false);
+    rtc_cntl.set_wdt_global_enable(false);
     wdt0.start(2u64.secs());
     wdt1.disable();
 
diff --git a/esp32c3-hal/src/lib.rs b/esp32c3-hal/src/lib.rs
index 475076ee9b3..8824d7ad687 100644
--- a/esp32c3-hal/src/lib.rs
+++ b/esp32c3-hal/src/lib.rs
@@ -23,17 +23,17 @@ pub use esp_hal_common::{
     Delay,
     PulseControl,
     Rng,
+    RtcCntl,
     Serial,
     UsbSerialJtag,
 };
 #[cfg(feature = "direct-boot")]
 use riscv_rt::pre_init;
 
-pub use self::{gpio::IO, rtc_cntl::RtcCntl};
+pub use self::gpio::IO;
 
 pub mod adc;
 pub mod gpio;
-pub mod rtc_cntl;
 
 /// Common module for analog functions
 pub mod analog {
diff --git a/esp32c3-hal/src/rtc_cntl.rs b/esp32c3-hal/src/rtc_cntl.rs
deleted file mode 100644
index 3d6c0da2ec5..00000000000
--- a/esp32c3-hal/src/rtc_cntl.rs
+++ /dev/null
@@ -1,49 +0,0 @@
-use crate::pac::RTC_CNTL;
-
-pub struct RtcCntl {
-    rtc_cntl: RTC_CNTL,
-}
-
-impl RtcCntl {
-    pub fn new(rtc_cntl: RTC_CNTL) -> Self {
-        Self { rtc_cntl }
-    }
-
-    pub fn set_super_wdt_enable(&mut self, enable: bool) {
-        self.set_swd_write_protection(false);
-
-        self.rtc_cntl
-            .swd_conf
-            .write(|w| w.swd_auto_feed_en().bit(!enable));
-
-        self.set_swd_write_protection(true);
-    }
-
-    fn set_swd_write_protection(&mut self, enable: bool) {
-        let wkey = if enable { 0u32 } else { 0x8F1D_312A };
-
-        self.rtc_cntl
-            .swd_wprotect
-            .write(|w| unsafe { w.swd_wkey().bits(wkey) });
-    }
-
-    pub fn set_wdt_enable(&mut self, enable: bool) {
-        self.set_wdt_write_protection(false);
-
-        if !enable {
-            self.rtc_cntl.wdtconfig0.write(|w| unsafe { w.bits(0) });
-        } else {
-            self.rtc_cntl.wdtconfig0.write(|w| w.wdt_en().bit(enable));
-        }
-
-        self.set_wdt_write_protection(true);
-    }
-
-    fn set_wdt_write_protection(&mut self, enable: bool) {
-        let wkey = if enable { 0u32 } else { 0x50D8_3AA1 };
-
-        self.rtc_cntl
-            .wdtwprotect
-            .write(|w| unsafe { w.wdt_wkey().bits(wkey) });
-    }
-}