*** Pre-CBMEM romstage console overflowed, log truncated! ***
it()
[INFO ]  Timestamp - before RAM initialization: 221786287
[INFO ]  Intel ME early init
[INFO ]  Intel ME firmware is ready
[DEBUG]  ME: Requested 0MB UMA
[DEBUG]  Starting native Platform init
[DEBUG]  DMI: Running at X4 @ 5000MT/s
[DEBUG]  FMAP: area RW_MRC_CACHE found @ 20000 (65536 bytes)
[DEBUG]  Trying stored timings.
[DEBUG]  Starting Ivy Bridge RAM training (fast boot).
[DEBUG]  100MHz reference clock support: yes
[DEBUG]  PLL_REF100_CFG value: 0x7
[DEBUG]  Trying CAS 11, tCK 320.
[DEBUG]  Found compatible clock, CAS pair.
[DEBUG]  Selected DRAM frequency: 800 MHz
[DEBUG]  Selected CAS latency   : 11T
[DEBUG]  MPLL busy... done in 80 us
[DEBUG]  MPLL frequency is set at : 800 MHz
[DEBUG]  Done dimm mapping
[DEBUG]  Update PCI-E configuration space:
[DEBUG]  PCI(0, 0, 0)[a0] = 0
[DEBUG]  PCI(0, 0, 0)[a4] = 4
[DEBUG]  PCI(0, 0, 0)[bc] = 82a00000
[DEBUG]  PCI(0, 0, 0)[a8] = 7d600000
[DEBUG]  PCI(0, 0, 0)[ac] = 4
[DEBUG]  PCI(0, 0, 0)[b8] = 80000000
[DEBUG]  PCI(0, 0, 0)[b0] = 80a00000
[DEBUG]  PCI(0, 0, 0)[b4] = 80800000
[DEBUG]  Done memory map
[DEBUG]  Done io registers
[DEBUG]  t123: 1767, 6000, 7620
[NOTE ]  ME: Wrong mode : 2
[NOTE ]  ME: FWS2: 0x160a0140
[NOTE ]  ME:  Bist in progress: 0x0
[NOTE ]  ME:  ICC Status      : 0x0
[NOTE ]  ME:  Invoke MEBx     : 0x0
[NOTE ]  ME:  CPU replaced    : 0x0
[NOTE ]  ME:  MBP ready       : 0x0
[NOTE ]  ME:  MFS failure     : 0x1
[NOTE ]  ME:  Warm reset req  : 0x0
[NOTE ]  ME:  CPU repl valid  : 0x1
[NOTE ]  ME:  (Reserved)      : 0x0
[NOTE ]  ME:  FW update req   : 0x0
[NOTE ]  ME:  (Reserved)      : 0x0
[NOTE ]  ME:  Current state   : 0xa
[NOTE ]  ME:  Current PM event: 0x6
[NOTE ]  ME:  Progress code   : 0x1
[NOTE ]  PASSED! Tell ME that DRAM is ready
[NOTE ]  ME: ME is reporting as disabled, so not waiting for a response.
[NOTE ]  ME: FWS2: 0x160a0140
[NOTE ]  ME:  Bist in progress: 0x0
[NOTE ]  ME:  ICC Status      : 0x0
[NOTE ]  ME:  Invoke MEBx     : 0x0
[NOTE ]  ME:  CPU replaced    : 0x0
[NOTE ]  ME:  MBP ready       : 0x0
[NOTE ]  ME:  MFS failure     : 0x1
[NOTE ]  ME:  Warm reset req  : 0x0
[NOTE ]  ME:  CPU repl valid  : 0x1
[NOTE ]  ME:  (Reserved)      : 0x0
[NOTE ]  ME:  FW update req   : 0x0
[NOTE ]  ME:  (Reserved)      : 0x0
[NOTE ]  ME:  Current state   : 0xa
[NOTE ]  ME:  Current PM event: 0x6
[NOTE ]  ME:  Progress code   : 0x1
[NOTE ]  ME: Requested BIOS Action: No DID Ack received
[DEBUG]  ME: FW Partition Table      : OK
[DEBUG]  ME: Bringup Loader Failure  : NO
[DEBUG]  ME: Firmware Init Complete  : NO
[DEBUG]  ME: Manufacturing Mode      : YES
[DEBUG]  ME: Boot Options Present    : NO
[DEBUG]  ME: Update In Progress      : NO
[DEBUG]  ME: Current Working State   : Initializing
[DEBUG]  ME: Current Operation State : Bring up
[DEBUG]  ME: Current Operation Mode  : Debug or Disabled by AltDisableBit
[DEBUG]  ME: Error Code              : No Error
[DEBUG]  ME: Progress Phase          : BUP Phase
[DEBUG]  ME: Power Management Event  : Pseudo-global reset
[DEBUG]  ME: Progress Phase State    : Check to see if straps say ME DISABLED
[DEBUG]  memcfg DDR3 ref clock 133 MHz
[DEBUG]  memcfg DDR3 clock 1596 MHz
[DEBUG]  memcfg channel assignment: A: 0, B  1, C  2
[DEBUG]  memcfg channel[0] config (00620020):
[DEBUG]     ECC inactive
[DEBUG]     enhanced interleave mode on
[DEBUG]     rank interleave on
[DEBUG]     DIMMA 8192 MB width x8 dual rank, selected
[DEBUG]     DIMMB 0 MB width x8 single rank
[DEBUG]  memcfg channel[1] config (00620020):
[DEBUG]     ECC inactive
[DEBUG]     enhanced interleave mode on
[DEBUG]     rank interleave on
[DEBUG]     DIMMA 8192 MB width x8 dual rank, selected
[DEBUG]     DIMMB 0 MB width x8 single rank
[INFO ]  Timestamp - after RAM initialization: 257838130
[DEBUG]  CBMEM:
[DEBUG]  IMD: root @ 0x7ffff000 254 entries.
[DEBUG]  IMD: root @ 0x7fffec00 62 entries.
[DEBUG]  FMAP: area COREBOOT found @ 30200 (12385792 bytes)
[DEBUG]  External stage cache:
[DEBUG]  IMD: root @ 0x803ff000 254 entries.
[DEBUG]  IMD: root @ 0x803fec00 62 entries.
[DEBUG]  CBMEM entry for DIMM info: 0x7ff79000
[DEBUG]  SMM Memory Map
[DEBUG]  SMRAM       : 0x80000000 0x800000
[DEBUG]   Subregion 0: 0x80000000 0x300000
[DEBUG]   Subregion 1: 0x80300000 0x100000
[DEBUG]   Subregion 2: 0x80400000 0x400000
[DEBUG]  Normal boot
[INFO ]  CBFS: Found 'fallback/postcar' @0x4d0c0 size 0x9a9c in mcache @0xfeff1854
[INFO ]  VB2:vb2_digest_init() 39580 bytes, hash algo 1, HW acceleration unsupported
[DEBUG]  TPM: Digest of `CBFS: fallback/postcar` to PCR 2 logged
[DEBUG]  Loading module at 0x7ff69000 with entry 0x7ff69031. filesize: 0x91a0 memsize: 0xf4e0
[DEBUG]  Processing 559 relocs. Offset value of 0x7df69000
[INFO ]  Timestamp - end of romstage: 301617661
[DEBUG]  BS: romstage times (exec / console): total (unknown) / 0 ms


[NOTE ]  coreboot--TIMELESS--LESSTIME--Heads-v0.2.0-1937-g4a57c61 Thu Jan 01 00:00:00 UTC 1970 postcar starting (log level: 7)...
[INFO ]  Timestamp - start of postcar: 303642972
[INFO ]  Timestamp - end of postcar: 303651335
[DEBUG]  Normal boot
[INFO ]  Timestamp - starting to load ramstage: 303660575
[DEBUG]  FMAP: area COREBOOT found @ 30200 (12385792 bytes)
[INFO ]  CBFS: Found 'fallback/ramstage' @0x1d5c0 size 0x1fdcf in mcache @0x7ff7d0dc
[INFO ]  VB2:vb2_digest_init() 130511 bytes, hash algo 1, HW acceleration unsupported
[DEBUG]  TPM: Digest of `CBFS: fallback/ramstage` to PCR 2 logged
[INFO ]  Timestamp - starting LZMA decompress (ignore for x86): 343986304
[INFO ]  Timestamp - finished LZMA decompress (ignore for x86): 425258387
[DEBUG]  Loading module at 0x7ff0f000 with entry 0x7ff0f000. filesize: 0x42000 memsize: 0x58810
[DEBUG]  Processing 4942 relocs. Offset value of 0x7bf0f000
[INFO ]  Timestamp - finished loading ramstage: 425802322
[DEBUG]  BS: postcar times (exec / console): total (unknown) / 0 ms


[NOTE ]  coreboot--TIMELESS--LESSTIME--Heads-v0.2.0-1937-g4a57c61 Thu Jan 01 00:00:00 UTC 1970 ramstage starting (log level: 7)...
[INFO ]  Timestamp - start of ramstage: 425859528
[DEBUG]  Normal boot
[INFO ]  Timestamp - device enumeration: 425878717
[INFO ]  Enumerating buses...
[DEBUG]  Root Device scanning...
[DEBUG]  CPU_CLUSTER: 0 enabled
[DEBUG]  DOMAIN: 0000 enabled
[DEBUG]  DOMAIN: 0000 scanning...
[DEBUG]  PCI: pci_scan_bus for bus 00
[DEBUG]  PCI: 00:00.0 [8086/0154] enabled
[DEBUG]  PCI: 00:01.0 [8086/0151] disabled
[DEBUG]  PCI: 00:02.0 [8086/0166] enabled
[DEBUG]  PCI: 00:04.0 [8086/0153] enabled
[DEBUG]  PCI: 00:14.0 [8086/1e31] enabled
[DEBUG]  PCI: 00:16.0 [8086/1e3a] enabled
[DEBUG]  PCI: 00:16.1: Disabling device
[DEBUG]  PCI: 00:16.2: Disabling device
[DEBUG]  PCI: 00:16.3: Disabling device
[DEBUG]  PCI: 00:19.0 [8086/1502] enabled
[DEBUG]  PCI: 00:1a.0 [8086/1e2d] enabled
[DEBUG]  PCI: 00:1b.0 [8086/1e20] enabled
[INFO ]  PCH: PCIe Root Port coalescing is enabled
[DEBUG]  PCI: 00:1c.0 [8086/1e10] enabled
[DEBUG]  PCI: 00:1c.1 [8086/1e12] enabled
[DEBUG]  PCI: 00:1c.2 [8086/1e14] enabled
[DEBUG]  PCI: 00:1c.3: Disabling device
[DEBUG]  PCI: 00:1c.3 [8086/1e16] disabled
[DEBUG]  PCI: 00:1c.4: Disabling device
[DEBUG]  PCI: 00:1c.4: check set enabled
[DEBUG]  PCI: 00:1c.5: Disabling device
[DEBUG]  PCI: 00:1c.6: Disabling device
[DEBUG]  PCI: 00:1c.7: Disabling device
[DEBUG]  PCI: 00:1d.0 [8086/1e26] enabled
[DEBUG]  PCI: 00:1e.0: Disabling device
[DEBUG]  PCI: 00:1e.0 [8086/2448] disabled
[DEBUG]  PCI: 00:1f.0 [8086/1e55] enabled
[DEBUG]  PCI: 00:1f.2 [8086/1e01] enabled
[DEBUG]  PCI: 00:1f.3 [8086/1e22] enabled
[DEBUG]  PCI: 00:1f.5: Disabling device
[DEBUG]  PCI: 00:1f.5 [8086/1e09] disabled No operations
[DEBUG]  PCI: 00:1f.6 [8086/1e24] enabled
[WARN ]  PCI: Leftover static devices:
[WARN ]  PCI: 00:16.1
[WARN ]  PCI: 00:16.2
[WARN ]  PCI: 00:16.3
[WARN ]  PCI: 00:1c.4
[WARN ]  PCI: 00:1c.5
[WARN ]  PCI: 00:1c.6
[WARN ]  PCI: 00:1c.7
[WARN ]  PCI: Check your devicetree.cb.
[DEBUG]  PCI: 00:1c.0 scanning...
[DEBUG]  PCI: pci_scan_bus for bus 01
[DEBUG]  PCI: 01:00.0 [1180/e823] enabled
[INFO ]  Enabling Common Clock Configuration
[INFO ]  ASPM: Enabled L0s and L1
[INFO ]  PCIe: Max_Payload_Size adjusted to 128
[DEBUG]  PCI: 01:00.0: No LTR support
[DEBUG]  scan_bus: bus PCI: 00:1c.0 finished in 0 msecs
[DEBUG]  PCI: 00:1c.1 scanning...
[DEBUG]  PCI: pci_scan_bus for bus 02
[DEBUG]  PCI: 02:00.0 [168c/0030] enabled
[INFO ]  Enabling Common Clock Configuration
[INFO ]  ASPM: Enabled L0s and L1
[INFO ]  PCIe: Max_Payload_Size adjusted to 128
[DEBUG]  PCI: 02:00.0: No LTR support
[DEBUG]  scan_bus: bus PCI: 00:1c.1 finished in 0 msecs
[DEBUG]  PCI: 00:1c.2 scanning...
[DEBUG]  PCI: pci_scan_bus for bus 03
[DEBUG]  scan_bus: bus PCI: 00:1c.2 finished in 0 msecs
[DEBUG]  PCI: 00:1f.0 scanning...
[INFO ]  PMH7: ID 05 Revision 12
[DEBUG]  PNP: 00ff.1 enabled
[DEBUG]  PNP: 0c31.0 enabled
[INFO ]  H8: EC Firmware ID G2HT35WW-3.22, Version 4.01B
[INFO ]  H8: BDC detection not implemented. Assuming BDC installed
[INFO ]  H8: WWAN not installed
[DEBUG]  PNP: 00ff.2 enabled
[DEBUG]  scan_bus: bus PCI: 00:1f.0 finished in 2 msecs
[DEBUG]  PCI: 00:1f.3 scanning...
[DEBUG]  I2C: 01:54 enabled
[DEBUG]  bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled
[DEBUG]  bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled
[DEBUG]  bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled
[DEBUG]  bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled
[DEBUG]  bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled
[DEBUG]  bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled
[DEBUG]  bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled
[DEBUG]  bus: PCI: 00:1f.3[0]->scan_bus: bus PCI: 00:1f.3 finished in 0 msecs
[DEBUG]  scan_bus: bus DOMAIN: 0000 finished in 3 msecs
[DEBUG]  scan_bus: bus Root Device finished in 3 msecs
[INFO ]  done
[DEBUG]  BS: BS_DEV_ENUMERATE run times (exec / console): 4 / 0 ms
[DEBUG]  FMAP: area RW_MRC_CACHE found @ 20000 (65536 bytes)
[INFO ]  MRC: No data in cbmem for 'RW_MRC_CACHE'.
[DEBUG]  BM-LOCKDOWN: Enabling boot media protection scheme 'readonly' using CTRL...
[DEBUG]  flash size 0xc00000 bytes
[INFO ]  SF: Detected 00 0000 with sector size 0x100, total 0xc00000
[INFO ]  spi_flash_protect: FPR 0 is enabled for range 0x00000000-0x00bfffff
[INFO ]  BM-LOCKDOWN: Enabled bootmedia protection
[INFO ]  Timestamp - device configuration: 436504210
[DEBUG]  found VGA at PCI: 00:02.0
[DEBUG]  Setting up VGA for PCI: 00:02.0
[DEBUG]  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
[DEBUG]  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
[INFO ]  Allocating resources...
[INFO ]  Reading resources...
[DEBUG]  Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000.
[DEBUG]  TOUUD 0x47d600000 TOLUD 0x82a00000 TOM 0x400000000
[DEBUG]  MEBASE 0x7ffff00000
[DEBUG]  IGD decoded, subtracting 32M UMA and 2M GTT
[DEBUG]  TSEG base 0x80000000 size 8M
[INFO ]  Available memory below 4GB: 2048M
[INFO ]  Available memory above 4GB: 14294M
[ERROR]  PNP: 00ff.1 missing read_resources
[ERROR]  PNP: 00ff.2 missing read_resources
[INFO ]  Done reading resources.
[INFO ]  === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
[DEBUG]   PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG]   PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done
[DEBUG]   PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG]    PCI: 01:00.0 10 *  [0x0 - 0xff] mem
[DEBUG]   PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
[DEBUG]   PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG]   PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
[DEBUG]   PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG]   PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff done
[DEBUG]   PCI: 00:1c.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG]    PCI: 02:00.0 10 *  [0x0 - 0x1ffff] mem
[DEBUG]    PCI: 02:00.0 30 *  [0x20000 - 0x2ffff] mem
[DEBUG]   PCI: 00:1c.1 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
[DEBUG]   PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG]   PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
[DEBUG]   PCI: 00:1c.2 io: size: 0 align: 12 gran: 12 limit: ffff
[DEBUG]    NONE 18 *  [0x0 - 0x1fff] io
[DEBUG]   PCI: 00:1c.2 io: size: 2000 align: 12 gran: 12 limit: ffff done
[DEBUG]   PCI: 00:1c.2 mem: size: 0 align: 20 gran: 20 limit: ffffffff
[DEBUG]    NONE 10 *  [0x0 - 0x7fffff] mem
[DEBUG]   PCI: 00:1c.2 mem: size: 800000 align: 20 gran: 20 limit: ffffffff done
[DEBUG]   PCI: 00:1c.2 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
[DEBUG]    NONE 14 *  [0x0 - 0xfffffff] prefmem
[DEBUG]   PCI: 00:1c.2 prefmem: size: 10000000 align: 20 gran: 20 limit: ffffffffffffffff done
[INFO ]  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
[DEBUG]  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
[DEBUG]   update_constraints: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
[DEBUG]   update_constraints: PCI: 00:1f.0 10000200 base 00001600 limit 0000167b io (fixed)
[DEBUG]   update_constraints: PCI: 00:1f.0 10000300 base 000015e0 limit 000015eb io (fixed)
[DEBUG]   update_constraints: PNP: 00ff.1 77 base 000015e0 limit 000015ef io (fixed)
[DEBUG]   update_constraints: PCI: 00:1f.3 20 base 00000400 limit 0000041f io (fixed)
[INFO ]   DOMAIN: 0000: Resource ranges:
[INFO ]   * Base: 1000, Size: 5e0, Tag: 100
[INFO ]   * Base: 15f0, Size: 10, Tag: 100
[INFO ]   * Base: 167c, Size: e984, Tag: 100
[DEBUG]    PCI: 00:1c.2 1c *  [0x2000 - 0x3fff] limit: 3fff io
[DEBUG]    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io
[DEBUG]    PCI: 00:19.0 18 *  [0x1040 - 0x105f] limit: 105f io
[DEBUG]    PCI: 00:1f.2 20 *  [0x1060 - 0x107f] limit: 107f io
[DEBUG]    PCI: 00:1f.2 10 *  [0x1080 - 0x1087] limit: 1087 io
[DEBUG]    PCI: 00:1f.2 18 *  [0x1088 - 0x108f] limit: 108f io
[DEBUG]    PCI: 00:1f.2 14 *  [0x1090 - 0x1093] limit: 1093 io
[DEBUG]    PCI: 00:1f.2 1c *  [0x1094 - 0x1097] limit: 1097 io
[DEBUG]  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
[DEBUG]  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff
[DEBUG]   update_constraints: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed)
[DEBUG]   update_constraints: PCI: 00:00.0 03 base 00000000 limit 0009ffff mem (fixed)
[DEBUG]   update_constraints: PCI: 00:00.0 04 base 00100000 limit 7fffffff mem (fixed)
[DEBUG]   update_constraints: PCI: 00:00.0 05 base 100000000 limit 47d5fffff mem (fixed)
[DEBUG]   update_constraints: PCI: 00:00.0 06 base 80000000 limit 829fffff mem (fixed)
[DEBUG]   update_constraints: PCI: 00:00.0 07 base 000a0000 limit 000bffff mem (fixed)
[DEBUG]   update_constraints: PCI: 00:00.0 08 base 000c0000 limit 000fffff mem (fixed)
[DEBUG]   update_constraints: PCI: 00:00.0 09 base fed90000 limit fed90fff mem (fixed)
[DEBUG]   update_constraints: PCI: 00:00.0 0a base fed91000 limit fed91fff mem (fixed)
[DEBUG]   update_constraints: PCI: 00:1f.0 10000100 base ff000000 limit ffffffff mem (fixed)
[DEBUG]   update_constraints: PCI: 00:1f.0 03 base fec00000 limit fec00fff mem (fixed)
[DEBUG]   update_constraints: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed)
[INFO ]   DOMAIN: 0000: Resource ranges:
[INFO ]   * Base: 82a00000, Size: 6d600000, Tag: 200
[INFO ]   * Base: f4000000, Size: ac00000, Tag: 200
[INFO ]   * Base: fec01000, Size: 13f000, Tag: 200
[INFO ]   * Base: fed45000, Size: 4b000, Tag: 200
[INFO ]   * Base: fed92000, Size: 26e000, Tag: 200
[INFO ]   * Base: 47d600000, Size: b82a00000, Tag: 100200
[DEBUG]    PCI: 00:02.0 18 *  [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem
[DEBUG]    PCI: 00:02.0 10 *  [0x82c00000 - 0x82ffffff] limit: 82ffffff mem
[DEBUG]    PCI: 00:1c.2 20 *  [0x83000000 - 0x837fffff] limit: 837fffff mem
[DEBUG]    PCI: 00:1c.0 20 *  [0x82a00000 - 0x82afffff] limit: 82afffff mem
[DEBUG]    PCI: 00:1c.1 20 *  [0x82b00000 - 0x82bfffff] limit: 82bfffff mem
[DEBUG]    PCI: 00:19.0 10 *  [0x83800000 - 0x8381ffff] limit: 8381ffff mem
[DEBUG]    PCI: 00:14.0 10 *  [0x83820000 - 0x8382ffff] limit: 8382ffff mem
[DEBUG]    PCI: 00:04.0 10 *  [0x83830000 - 0x83837fff] limit: 83837fff mem
[DEBUG]    PCI: 00:1b.0 10 *  [0x83838000 - 0x8383bfff] limit: 8383bfff mem
[DEBUG]    PCI: 00:19.0 14 *  [0x8383c000 - 0x8383cfff] limit: 8383cfff mem
[DEBUG]    PCI: 00:1f.6 10 *  [0x8383d000 - 0x8383dfff] limit: 8383dfff mem
[DEBUG]    PCI: 00:1f.2 24 *  [0x8383e000 - 0x8383e7ff] limit: 8383e7ff mem
[DEBUG]    PCI: 00:1a.0 10 *  [0x8383f000 - 0x8383f3ff] limit: 8383f3ff mem
[DEBUG]    PCI: 00:1d.0 10 *  [0x83840000 - 0x838403ff] limit: 838403ff mem
[DEBUG]    PCI: 00:1f.3 10 *  [0x83841000 - 0x838410ff] limit: 838410ff mem
[DEBUG]    PCI: 00:16.0 10 *  [0x83842000 - 0x8384200f] limit: 8384200f mem
[DEBUG]    PCI: 00:1c.2 24 *  [0x47d600000 - 0x48d5fffff] limit: 48d5fffff prefmem
[DEBUG]  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff done
[DEBUG]  PCI: 00:1c.0 mem: base: 82a00000 size: 100000 align: 20 gran: 20 limit: 82afffff
[INFO ]   PCI: 00:1c.0: Resource ranges:
[INFO ]   * Base: 82a00000, Size: 100000, Tag: 200
[DEBUG]    PCI: 01:00.0 10 *  [0x82a00000 - 0x82a000ff] limit: 82a000ff mem
[DEBUG]  PCI: 00:1c.0 mem: base: 82a00000 size: 100000 align: 20 gran: 20 limit: 82afffff done
[DEBUG]  PCI: 00:1c.1 mem: base: 82b00000 size: 100000 align: 20 gran: 20 limit: 82bfffff
[INFO ]   PCI: 00:1c.1: Resource ranges:
[INFO ]   * Base: 82b00000, Size: 100000, Tag: 200
[DEBUG]    PCI: 02:00.0 10 *  [0x82b00000 - 0x82b1ffff] limit: 82b1ffff mem
[DEBUG]    PCI: 02:00.0 30 *  [0x82b20000 - 0x82b2ffff] limit: 82b2ffff mem
[DEBUG]  PCI: 00:1c.1 mem: base: 82b00000 size: 100000 align: 20 gran: 20 limit: 82bfffff done
[DEBUG]  PCI: 00:1c.2 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff
[INFO ]   PCI: 00:1c.2: Resource ranges:
[INFO ]   * Base: 2000, Size: 2000, Tag: 100
[DEBUG]    NONE 18 *  [0x2000 - 0x3fff] limit: 3fff io
[DEBUG]  PCI: 00:1c.2 io: base: 2000 size: 2000 align: 12 gran: 12 limit: 3fff done
[DEBUG]  PCI: 00:1c.2 prefmem: base: 47d600000 size: 10000000 align: 20 gran: 20 limit: 48d5fffff
[INFO ]   PCI: 00:1c.2: Resource ranges:
[INFO ]   * Base: 47d600000, Size: 10000000, Tag: 1200
[DEBUG]    NONE 14 *  [0x47d600000 - 0x48d5fffff] limit: 48d5fffff prefmem
[DEBUG]  PCI: 00:1c.2 prefmem: base: 47d600000 size: 10000000 align: 20 gran: 20 limit: 48d5fffff done
[DEBUG]  PCI: 00:1c.2 mem: base: 83000000 size: 800000 align: 20 gran: 20 limit: 837fffff
[INFO ]   PCI: 00:1c.2: Resource ranges:
[INFO ]   * Base: 83000000, Size: 800000, Tag: 200
[DEBUG]    NONE 10 *  [0x83000000 - 0x837fffff] limit: 837fffff mem
[DEBUG]  PCI: 00:1c.2 mem: base: 83000000 size: 800000 align: 20 gran: 20 limit: 837fffff done
[INFO ]  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
[DEBUG]  PCI: 00:02.0 10 <- [0x0000000082c00000 - 0x0000000082ffffff] size 0x00400000 gran 0x16 mem64
[DEBUG]  PCI: 00:02.0 18 <- [0x0000000090000000 - 0x000000009fffffff] size 0x10000000 gran 0x1c prefmem64
[DEBUG]  PCI: 00:02.0 20 <- [0x0000000000001000 - 0x000000000000103f] size 0x00000040 gran 0x06 io
[DEBUG]  PCI: 00:04.0 10 <- [0x0000000083830000 - 0x0000000083837fff] size 0x00008000 gran 0x0f mem64
[DEBUG]  PCI: 00:14.0 10 <- [0x0000000083820000 - 0x000000008382ffff] size 0x00010000 gran 0x10 mem64
[DEBUG]  PCI: 00:16.0 10 <- [0x0000000083842000 - 0x000000008384200f] size 0x00000010 gran 0x04 mem64
[DEBUG]  PCI: 00:19.0 10 <- [0x0000000083800000 - 0x000000008381ffff] size 0x00020000 gran 0x11 mem
[DEBUG]  PCI: 00:19.0 14 <- [0x000000008383c000 - 0x000000008383cfff] size 0x00001000 gran 0x0c mem
[DEBUG]  PCI: 00:19.0 18 <- [0x0000000000001040 - 0x000000000000105f] size 0x00000020 gran 0x05 io
[DEBUG]  PCI: 00:1a.0 10 <- [0x000000008383f000 - 0x000000008383f3ff] size 0x00000400 gran 0x0a mem
[DEBUG]  PCI: 00:1b.0 10 <- [0x0000000083838000 - 0x000000008383bfff] size 0x00004000 gran 0x0e mem64
[DEBUG]  PCI: 00:1c.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 01 io
[DEBUG]  PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
[DEBUG]  PCI: 00:1c.0 20 <- [0x0000000082a00000 - 0x0000000082afffff] size 0x00100000 gran 0x14 bus 01 mem
[DEBUG]  PCI: 01:00.0 10 <- [0x0000000082a00000 - 0x0000000082a000ff] size 0x00000100 gran 0x08 mem
[DEBUG]  PCI: 00:1c.1 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c bus 02 io
[DEBUG]  PCI: 00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem
[DEBUG]  PCI: 00:1c.1 20 <- [0x0000000082b00000 - 0x0000000082bfffff] size 0x00100000 gran 0x14 bus 02 mem
[DEBUG]  PCI: 02:00.0 10 <- [0x0000000082b00000 - 0x0000000082b1ffff] size 0x00020000 gran 0x11 mem64
[DEBUG]  PCI: 02:00.0 30 <- [0x0000000082b20000 - 0x0000000082b2ffff] size 0x00010000 gran 0x10 romem
[DEBUG]  PCI: 00:1c.2 1c <- [0x0000000000002000 - 0x0000000000003fff] size 0x00002000 gran 0x0c bus 03 io
[DEBUG]  PCI: 00:1c.2 24 <- [0x000000047d600000 - 0x000000048d5fffff] size 0x10000000 gran 0x14 bus 03 prefmem
[DEBUG]  PCI: 00:1c.2 20 <- [0x0000000083000000 - 0x00000000837fffff] size 0x00800000 gran 0x14 bus 03 mem
[DEBUG]  PCI: 00:1d.0 10 <- [0x0000000083840000 - 0x00000000838403ff] size 0x00000400 gran 0x0a mem
[ERROR]  PNP: 00ff.1 missing set_resources
[ERROR]  PNP: 00ff.2 missing set_resources
[DEBUG]  PCI: 00:1f.2 10 <- [0x0000000000001080 - 0x0000000000001087] size 0x00000008 gran 0x03 io
[DEBUG]  PCI: 00:1f.2 14 <- [0x0000000000001090 - 0x0000000000001093] size 0x00000004 gran 0x02 io
[DEBUG]  PCI: 00:1f.2 18 <- [0x0000000000001088 - 0x000000000000108f] size 0x00000008 gran 0x03 io
[DEBUG]  PCI: 00:1f.2 1c <- [0x0000000000001094 - 0x0000000000001097] size 0x00000004 gran 0x02 io
[DEBUG]  PCI: 00:1f.2 20 <- [0x0000000000001060 - 0x000000000000107f] size 0x00000020 gran 0x05 io
[DEBUG]  PCI: 00:1f.2 24 <- [0x000000008383e000 - 0x000000008383e7ff] size 0x00000800 gran 0x0b mem
[DEBUG]  PCI: 00:1f.3 10 <- [0x0000000083841000 - 0x00000000838410ff] size 0x00000100 gran 0x08 mem64
[DEBUG]  PCI: 00:1f.6 10 <- [0x000000008383d000 - 0x000000008383dfff] size 0x00001000 gran 0x0c mem64
[INFO ]  Done setting resources.
[INFO ]  Done allocating resources.
[DEBUG]  BS: BS_DEV_RESOURCES run times (exec / console): 2 / 0 ms
[INFO ]  Timestamp - device enable: 443843907
[INFO ]  Enabling resources...
[DEBUG]  PCI: 00:00.0 subsystem <- 8086/0154
[DEBUG]  PCI: 00:00.0 cmd <- 06
[DEBUG]  PCI: 00:02.0 subsystem <- 8086/0166
[DEBUG]  PCI: 00:02.0 cmd <- 03
[DEBUG]  PCI: 00:04.0 cmd <- 02
[DEBUG]  PCI: 00:14.0 subsystem <- 8086/1e31
[DEBUG]  PCI: 00:14.0 cmd <- 102
[DEBUG]  PCI: 00:16.0 subsystem <- 8086/1e3a
[DEBUG]  PCI: 00:16.0 cmd <- 02
[DEBUG]  PCI: 00:19.0 subsystem <- 17aa/21f3
[DEBUG]  PCI: 00:19.0 cmd <- 103
[DEBUG]  PCI: 00:1a.0 subsystem <- 8086/1e2d
[DEBUG]  PCI: 00:1a.0 cmd <- 102
[DEBUG]  PCI: 00:1b.0 subsystem <- 8086/1e20
[DEBUG]  PCI: 00:1b.0 cmd <- 102
[DEBUG]  PCI: 00:1c.0 bridge ctrl <- 0013
[DEBUG]  PCI: 00:1c.0 subsystem <- 8086/1e10
[DEBUG]  PCI: 00:1c.0 cmd <- 102
[DEBUG]  PCI: 00:1c.1 bridge ctrl <- 0013
[DEBUG]  PCI: 00:1c.1 subsystem <- 8086/1e12
[DEBUG]  PCI: 00:1c.1 cmd <- 102
[DEBUG]  PCI: 00:1c.2 bridge ctrl <- 0013
[DEBUG]  PCI: 00:1c.2 subsystem <- 8086/1e14
[DEBUG]  PCI: 00:1c.2 cmd <- 103
[DEBUG]  PCI: 00:1d.0 subsystem <- 8086/1e26
[DEBUG]  PCI: 00:1d.0 cmd <- 102
[DEBUG]  PCI: 00:1f.0 subsystem <- 8086/1e55
[DEBUG]  PCI: 00:1f.0 cmd <- 107
[DEBUG]  PCI: 00:1f.2 subsystem <- 8086/1e03
[DEBUG]  PCI: 00:1f.2 cmd <- 03
[DEBUG]  PCI: 00:1f.3 subsystem <- 8086/1e22
[DEBUG]  PCI: 00:1f.3 cmd <- 103
[DEBUG]  PCI: 00:1f.6 subsystem <- 8086/1e24
[DEBUG]  PCI: 00:1f.6 cmd <- 02
[DEBUG]  PCI: 01:00.0 subsystem <- 1180/e823
[DEBUG]  PCI: 01:00.0 cmd <- 02
[DEBUG]  PCI: 02:00.0 cmd <- 02
[INFO ]  done.
[INFO ]  Timestamp - device initialization: 444500159
[INFO ]  Initializing devices...
[DEBUG]  CPU_CLUSTER: 0 init
[DEBUG]  MTRR: Physical address space:
[DEBUG]  0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6
[DEBUG]  0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0
[DEBUG]  0x00000000000c0000 - 0x000000007fffffff size 0x7ff40000 type 6
[DEBUG]  0x0000000080000000 - 0x000000008fffffff size 0x10000000 type 0
[DEBUG]  0x0000000090000000 - 0x000000009fffffff size 0x10000000 type 1
[DEBUG]  0x00000000a0000000 - 0x00000000ffffffff size 0x60000000 type 0
[DEBUG]  0x0000000100000000 - 0x000000047d5fffff size 0x37d600000 type 6
[DEBUG]  0x000000047d600000 - 0x000000048d5fffff size 0x10000000 type 0
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x250 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x258 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x259 0x0000000000000000
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x268 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x269 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26a 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26b 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26c 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26d 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26e 0x0606060606060606
[DEBUG]  apic_id 0x0: MTRR: Fixed MSR 0x26f 0x0606060606060606
[DEBUG]  apic_id 0x0 setup mtrr for CPU physical address size: 36 bits
[DEBUG]  MTRR: default type WB/UC MTRR counts: 12/8.
[DEBUG]  MTRR: UC selected as default type.
[DEBUG]  MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
[DEBUG]  MTRR: 1 base 0x0000000090000000 mask 0x0000000ff0000000 type 1
[DEBUG]  MTRR: 2 base 0x0000000100000000 mask 0x0000000f00000000 type 6
[DEBUG]  MTRR: 3 base 0x0000000200000000 mask 0x0000000e00000000 type 6
[DEBUG]  MTRR: 4 base 0x0000000400000000 mask 0x0000000f80000000 type 6
[DEBUG]  MTRR: 5 base 0x000000047d600000 mask 0x0000000fffe00000 type 0
[DEBUG]  MTRR: 6 base 0x000000047d800000 mask 0x0000000fff800000 type 0
[DEBUG]  MTRR: 7 base 0x000000047e000000 mask 0x0000000ffe000000 type 0

[DEBUG]  MTRR check
[DEBUG]  Fixed MTRRs   : Enabled
[DEBUG]  Variable MTRRs: Enabled

[DEBUG]  CPU has 2 cores, 4 threads enabled.
[DEBUG]  Setting up SMI for CPU
[INFO ]  Will perform SMM setup.
[DEBUG]  FMAP: area COREBOOT found @ 30200 (12385792 bytes)
[INFO ]  CBFS: Found 'cpu_microcode_blob.bin' @0x16d80 size 0x6800 in mcache @0x7ff7d0ac
[INFO ]  VB2:vb2_digest_init() 26624 bytes, hash algo 1, HW acceleration unsupported
[DEBUG]  TPM: Digest of `CBFS: cpu_microcode_blob.bin` to PCR 2 logged
[DEBUG]  microcode: sig=0x306a9 pf=0x10 revision=0x21
[INFO ]  CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz.
[INFO ]  LAPIC 0x0 in XAPIC mode.
[DEBUG]  CPU: APIC: 00 enabled
[DEBUG]  CPU: APIC: 01 enabled
[DEBUG]  CPU: APIC: 02 enabled
[DEBUG]  CPU: APIC: 03 enabled
[DEBUG]  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178
[DEBUG]  Processing 16 relocs. Offset value of 0x00030000
[DEBUG]  Attempting to start 3 APs
[DEBUG]  Waiting for 10ms after sending INIT.
[DEBUG]  Waiting for SIPI to complete...
[DEBUG]  done.
[DEBUG]  Waiting for SIPI to complete...
[INFO ]  LAPIC 0x1 in XAPIC mode.
[DEBUG]  done.
[INFO ]  AP: slot 1 apic_id 1, MCU rev: 0x00000021
[INFO ]  LAPIC 0x3 in XAPIC mode.
[INFO ]  LAPIC 0x2 in XAPIC mode.
[INFO ]  AP: slot 2 apic_id 3, MCU rev: 0x00000021
[INFO ]  AP: slot 3 apic_id 2, MCU rev: 0x00000021
[DEBUG]  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1e8 memsize: 0x1e8
[DEBUG]  Processing 11 relocs. Offset value of 0x00038000
[DEBUG]  smm_module_setup_stub: stack_top = 0x80001000
[DEBUG]  smm_module_setup_stub: per cpu stack_size = 0x400
[DEBUG]  smm_module_setup_stub: runtime.start32_offset = 0x4c
[DEBUG]  smm_module_setup_stub: runtime.smm_size = 0x10000
[DEBUG]  SMM Module: stub loaded at 38000. Will call 0x7ff31c05
[DEBUG]  Installing permanent SMM handler to 0x80000000
[DEBUG]  FX_SAVE      [0x802ff800-0x80300000]
[DEBUG]  HANDLER      [0x802fe000-0x802ff4e8]

[DEBUG]  CPU 0
[DEBUG]    ss0        [0x802fdc00-0x802fe000]
[DEBUG]    stub0      [0x802f6000-0x802f61e8]

[DEBUG]  CPU 1
[DEBUG]    ss1        [0x802fd800-0x802fdc00]
[DEBUG]    stub1      [0x802f5c00-0x802f5de8]

[DEBUG]  CPU 2
[DEBUG]    ss2        [0x802fd400-0x802fd800]
[DEBUG]    stub2      [0x802f5800-0x802f59e8]

[DEBUG]  CPU 3
[DEBUG]    ss3        [0x802fd000-0x802fd400]
[DEBUG]    stub3      [0x802f5400-0x802f55e8]

[DEBUG]  stacks       [0x80000000-0x80001000]
[DEBUG]  Loading module at 0x802fe000 with entry 0x802fe308. filesize: 0x14d0 memsize: 0x14e8
[DEBUG]  Processing 66 relocs. Offset value of 0x802fe000
[DEBUG]  Loading module at 0x802f6000 with entry 0x802f6000. filesize: 0x1e8 memsize: 0x1e8
[DEBUG]  Processing 11 relocs. Offset value of 0x802f6000
[DEBUG]  smm_module_setup_stub: stack_top = 0x80001000
[DEBUG]  smm_module_setup_stub: per cpu stack_size = 0x400
[DEBUG]  smm_module_setup_stub: runtime.start32_offset = 0x4c
[DEBUG]  smm_module_setup_stub: runtime.smm_size = 0x300000
[DEBUG]  SMM Module: placing smm entry code at 802f5c00,  cpu # 0x1
[DEBUG]  SMM Module: placing smm entry code at 802f5800,  cpu # 0x2
[DEBUG]  SMM Module: placing smm entry code at 802f5400,  cpu # 0x3
[DEBUG]  SMM Module: stub loaded at 802f6000. Will call 0x802fe308
[INFO ]  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ee000, cpu = 0
[DEBUG]  In relocation handler: cpu 0
[DEBUG]  New SMBASE=0x802ee000 IEDBASE=0x80400000
[DEBUG]  Writing SMRR. base = 0x80000006, mask=0xff800800
[DEBUG]  Relocation complete.
[INFO ]  microcode: Update skipped, already up-to-date
[INFO ]  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802edc00, cpu = 1
[DEBUG]  In relocation handler: cpu 1
[DEBUG]  New SMBASE=0x802edc00 IEDBASE=0x80400000
[DEBUG]  Writing SMRR. base = 0x80000006, mask=0xff800800
[DEBUG]  Relocation complete.
[INFO ]  microcode: Update skipped, already up-to-date
[INFO ]  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ed400, cpu = 3
[DEBUG]  In relocation handler: cpu 3
[DEBUG]  New SMBASE=0x802ed400 IEDBASE=0x80400000
[DEBUG]  Writing SMRR. base = 0x80000006, mask=0xff800800
[DEBUG]  Relocation complete.
[INFO ]  microcode: Update skipped, already up-to-date
[INFO ]  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ed800, cpu = 2
[DEBUG]  In relocation handler: cpu 2
[DEBUG]  New SMBASE=0x802ed800 IEDBASE=0x80400000
[DEBUG]  Writing SMRR. base = 0x80000006, mask=0xff800800
[DEBUG]  Relocation complete.
[INFO ]  microcode: Update skipped, already up-to-date
[INFO ]  Initializing CPU #0
[DEBUG]  CPU: vendor Intel device 306a9
[DEBUG]  CPU: family 06, model 3a, stepping 09
[INFO ]  CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz.
[INFO ]  CPU: platform id 4
[INFO ]  CPU: cpuid(1) 0x306a9
[INFO ]  CPU: AES supported
[INFO ]  CPU: TXT supported
[INFO ]  CPU: VT supported
[DEBUG]  IA32_FEATURE_CONTROL already locked; VMX status: enabled
[DEBUG]  IA32_FEATURE_CONTROL already locked
[DEBUG]  cpu: energy policy set to 6
[DEBUG]  model_x06ax: frequency set to 2900
[INFO ]  Turbo is available but hidden
[INFO ]  Turbo is available and visible
[INFO ]  CPU #0 initialized
[INFO ]  Initializing CPU #1
[INFO ]  Initializing CPU #3
[INFO ]  Initializing CPU #2
[DEBUG]  CPU: vendor Intel device 306a9
[DEBUG]  CPU: family 06, model 3a, stepping 09
[DEBUG]  CPU: vendor Intel device 306a9
[DEBUG]  CPU: family 06, model 3a, stepping 09
[DEBUG]  CPU: vendor Intel device 306a9
[DEBUG]  CPU: family 06, model 3a, stepping 09
[INFO ]  CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz.
[INFO ]  CPU: platform id 4
[INFO ]  CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz.
[INFO ]  CPU: cpuid(1) 0x306a9
[INFO ]  CPU: platform id 4
[INFO ]  CPU: AES supported
[INFO ]  CPU: TXT supported
[INFO ]  CPU: VT supported
[INFO ]  CPU: cpuid(1) 0x306a9
[DEBUG]  IA32_FEATURE_CONTROL already locked; VMX status: enabled
[INFO ]  CPU: AES supported
[INFO ]  CPU: TXT supported
[INFO ]  CPU: VT supported
[DEBUG]  IA32_FEATURE_CONTROL already locked
[DEBUG]  IA32_FEATURE_CONTROL already locked; VMX status: enabled
[INFO ]  CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz.
[DEBUG]  IA32_FEATURE_CONTROL already locked
[INFO ]  CPU: platform id 4
[INFO ]  CPU: cpuid(1) 0x306a9
[INFO ]  CPU: AES supported
[INFO ]  CPU: TXT supported
[INFO ]  CPU: VT supported
[DEBUG]  IA32_FEATURE_CONTROL already locked; VMX status: enabled
[DEBUG]  IA32_FEATURE_CONTROL already locked
[DEBUG]  cpu: energy policy set to 6
[DEBUG]  model_x06ax: frequency set to 2900
[DEBUG]  cpu: energy policy set to 6
[INFO ]  CPU #3 initialized
[DEBUG]  model_x06ax: frequency set to 2900
[INFO ]  CPU #2 initialized
[DEBUG]  cpu: energy policy set to 6
[DEBUG]  model_x06ax: frequency set to 2900
[INFO ]  CPU #1 initialized
[INFO ]  bsp_do_flight_plan done after 9 msecs.
[DEBUG]  SMI_STS: 
[DEBUG]  GPE0_STS: GPIO15 GPIO14 GPIO11 GPIO9 GPIO7 GPIO5 GPIO4 GPIO3 GPIO0 
[DEBUG]  ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0 
[DEBUG]  TCO_STS: 
[DEBUG]  Locking SMM.
[DEBUG]  CPU_CLUSTER: 0 init finished in 42 msecs
[DEBUG]  PCI: 00:00.0 init
[DEBUG]  Disabling PEG12.
[DEBUG]  Disabling PEG11.
[DEBUG]  Disabling PEG10.
[DEBUG]  Disabling PEG60.
[DEBUG]  Disabling Device 7.
[DEBUG]  Disabling PEG IO clock.
[DEBUG]  Set BIOS_RESET_CPL
[DEBUG]  CPU TDP: 35 Watts
[DEBUG]  PCI: 00:00.0 init finished in 1 msecs
[DEBUG]  PCI: 00:02.0 init
[INFO ]  CBFS: Found 'vbt.bin' @0x4c280 size 0x599 in mcache @0x7ff7d1fc
[INFO ]  VB2:vb2_digest_init() 1433 bytes, hash algo 1, HW acceleration unsupported
[DEBUG]  TPM: Digest of `CBFS: vbt.bin` to PCR 2 logged
[INFO ]  Timestamp - starting LZMA decompress (ignore for x86): 573129369
[INFO ]  Timestamp - finished LZMA decompress (ignore for x86): 574240553
[INFO ]  Found a VBT of 4281 bytes after decompression
[INFO ]  GMA: Found VBT in CBFS
[INFO ]  GMA: Found valid VBT in CBFS
[DEBUG]  GT Power Management Init
[DEBUG]  IVB GT2 25W-35W Power Meter Weights
[DEBUG]  GT Power Management Init (post VBIOS)

[0.076480] CONFIG =>
[0.076480]   (Primary   =>
[0.076481]      (Port => HDMI1   ,
[0.076481]       Framebuffer =>
[0.076482]         (Width     => 1024,
[0.076482]          Height    => 768,
[0.076483]          Start_X   => 0,
[0.076483]          Start_Y   => 0,
[0.076484]          Stride    => 1024,
[0.076484]          V_Stride  => 768,
[0.076485]          Tiling    => Linear ,
[0.076485]          Rotation  => No_Rotation,
[0.076486]          Offset => 0x00000000,
[0.076486]          BPC    => 8),
[0.076487]       Mode =>
[0.076487]         (Dotclock           => 65000000,
[0.076488]          H_Visible          => 1024,
[0.076488]          H_Sync_Begin       => 1032,
[0.076489]          H_Sync_End         => 1176,
[0.076489]          H_Total            => 1344,
[0.076490]          V_Visible          => 768,
[0.076490]          V_Sync_Begin       => 771,
[0.076491]          V_Sync_End         => 777,
[0.076491]          V_Total            => 806,
[0.076492]          H_Sync_Active_High => False,
[0.076492]          V_Sync_Active_High => False,
[0.076493]          BPC                => 5)),
[0.076493]    Secondary =>
[0.076494]      (Port => LVDS    ,
[0.076494]       Framebuffer =>
[0.076494]         (Width     => 1024,
[0.076495]          Height    => 768,
[0.076495]          Start_X   => 0,
[0.076496]          Start_Y   => 0,
[0.076496]          Stride    => 1024,
[0.076497]          V_Stride  => 768,
[0.076497]          Tiling    => Linear ,
[0.076498]          Rotation  => No_Rotation,
[0.076498]          Offset => 0x00000000,
[0.076499]          BPC    => 8),
[0.076499]       Mode =>
[0.076499]         (Dotclock           => 69700000,
[0.076500]          H_Visible          => 1366,
[0.076500]          H_Sync_Begin       => 1414,
[0.076501]          H_Sync_End         => 1446,
[0.076501]          H_Total            => 1470,
[0.076502]          V_Visible          => 768,
[0.076502]          V_Sync_Begin       => 770,
[0.076503]          V_Sync_End         => 775,
[0.076503]          V_Total            => 790,
[0.076504]          H_Sync_Active_High => True,
[0.076504]          V_Sync_Active_High => False,
[0.076505]          BPC                => 5)),
[0.076505]    Tertiary  =>
[0.076506]      (Port => Disabled,
[0.076506]       Framebuffer =>
[0.076506]         (Width     => 1,
[0.076507]          Height    => 1,
[0.076507]          Start_X   => 0,
[0.076508]          Start_Y   => 0,
[0.076508]          Stride    => 1,
[0.076509]          V_Stride  => 1,
[0.076509]          Tiling    => Linear ,
[0.076510]          Rotation  => No_Rotation,
[0.076510]          Offset => 0x00000000,
[0.076511]          BPC    => 8),
[0.076511]       Mode =>
[0.076511]         (Dotclock           => 1000000,
[0.076512]          H_Visible          => 1,
[0.076512]          H_Sync_Begin       => 1,
[0.076513]          H_Sync_End         => 1,
[0.076513]          H_Total            => 1,
[0.076514]          V_Visible          => 1,
[0.076514]          V_Sync_Begin       => 1,
[0.076515]          V_Sync_End         => 1,
[0.076515]          V_Total            => 1,
[0.076516]          H_Sync_Active_High => False,
[0.076516]          V_Sync_Active_High => False,
[0.076517]          BPC                => 5)));
[INFO ]  framebuffer_info: bytes_per_line: 4096, bits_per_pixel: 32
[INFO ]                     x_res x y_res: 1024 x 768, size: 3145728 at 0x90000000
[DEBUG]  PCI: 00:02.0 init finished in 28 msecs
[DEBUG]  PCI: 00:04.0 init
[DEBUG]  PCI: 00:04.0 init finished in 0 msecs
[DEBUG]  PCI: 00:14.0 init
[DEBUG]  XHCI: Setting up controller.. done.
[DEBUG]  PCI: 00:14.0 init finished in 0 msecs
[DEBUG]  PCI: 00:16.0 init
[DEBUG]  ME: FW Partition Table      : OK
[DEBUG]  ME: Bringup Loader Failure  : NO
[DEBUG]  ME: Firmware Init Complete  : NO
[DEBUG]  ME: Manufacturing Mode      : YES
[DEBUG]  ME: Boot Options Present    : NO
[DEBUG]  ME: Update In Progress      : NO
[DEBUG]  ME: Current Working State   : Initializing
[DEBUG]  ME: Current Operation State : Bring up
[DEBUG]  ME: Current Operation Mode  : Debug or Disabled by AltDisableBit
[DEBUG]  ME: Error Code              : No Error
[DEBUG]  ME: Progress Phase          : BUP Phase
[DEBUG]  ME: Power Management Event  : Pseudo-global reset
[DEBUG]  ME: Progress Phase State    : Check to see if straps say ME DISABLED
[CRIT ]  intel_me_path: mbp is not ready!
[NOTE ]  ME: BIOS path: Error
[DEBUG]  ME: me_state=0, me_state_prev=0
[DEBUG]  PCI: 00:16.0 init finished in 0 msecs
[DEBUG]  PCI: 00:19.0 init
[DEBUG]  PCI: 00:19.0 init finished in 0 msecs
[DEBUG]  PCI: 00:1a.0 init
[DEBUG]  EHCI: Setting up controller.. done.
[DEBUG]  PCI: 00:1a.0 init finished in 0 msecs
[DEBUG]  PCI: 00:1b.0 init
[DEBUG]  Azalia: base = 0x83838000
[DEBUG]  Azalia: codec_mask = 09
[DEBUG]  azalia_audio: Initializing codec #3
[DEBUG]  azalia_audio: codec viddid: 80862806
[DEBUG]  azalia_audio: verb_size: 16
[DEBUG]  azalia_audio: verb loaded.
[DEBUG]  azalia_audio: Initializing codec #0
[DEBUG]  azalia_audio: codec viddid: 10ec0269
[DEBUG]  azalia_audio: verb_size: 76
[DEBUG]  azalia_audio: verb loaded.
[DEBUG]  PCI: 00:1b.0 init finished in 5 msecs
[DEBUG]  PCI: 00:1c.0 init
[DEBUG]  Initializing PCH PCIe bridge.
[DEBUG]  PCI: 00:1c.0 init finished in 0 msecs
[DEBUG]  PCI: 00:1c.1 init
[DEBUG]  Initializing PCH PCIe bridge.
[DEBUG]  PCI: 00:1c.1 init finished in 0 msecs
[DEBUG]  PCI: 00:1c.2 init
[DEBUG]  Initializing PCH PCIe bridge.
[DEBUG]  PCI: 00:1c.2 init finished in 0 msecs
[DEBUG]  PCI: 00:1d.0 init
[DEBUG]  EHCI: Setting up controller.. done.
[DEBUG]  PCI: 00:1d.0 init finished in 0 msecs
[DEBUG]  PCI: 00:1f.0 init
[DEBUG]  pch: lpc_init
[INFO ]  PCH: detected QM77, device id: 0x1e55, rev id 0x4
[DEBUG]  IOAPIC: Initializing IOAPIC at 0xfec00000
[DEBUG]  IOAPIC: 24 interrupts
[DEBUG]  IOAPIC: Clearing IOAPIC at 0xfec00000
[DEBUG]  IOAPIC: Bootstrap Processor Local APIC = 0x00
[INFO ]  Set power off after power failure.
[INFO ]  NMI sources disabled.
[DEBUG]  PantherPoint PM init
[DEBUG]  RTC: failed = 0x0
[DEBUG]  RTC Init
[DEBUG]  apm_control: Disabling ACPI.
[DEBUG]  APMC done.
[DEBUG]  pch_spi_init
[DEBUG]  PCI: 00:1f.0 init finished in 0 msecs
[DEBUG]  PCI: 00:1f.2 init
[DEBUG]  SATA: Initializing...
[DEBUG]  SATA: Controller in AHCI mode.
[DEBUG]  ABAR: 0x8383e000
[DEBUG]  PCI: 00:1f.2 init finished in 0 msecs
[DEBUG]  PCI: 00:1f.3 init
[DEBUG]  PCI: 00:1f.3 init finished in 0 msecs
[DEBUG]  PCI: 00:1f.6 init
[DEBUG]  PCI: 00:1f.6 init finished in 0 msecs
[DEBUG]  PCI: 01:00.0 init
[DEBUG]  PCI: 01:00.0 init finished in 0 msecs
[DEBUG]  PCI: 02:00.0 init
[DEBUG]  PCI: 02:00.0 init finished in 0 msecs
[DEBUG]  PNP: 00ff.2 init
[DEBUG]  Keyboard init...
[INFO ]  Keyboard controller output buffer result timeout
[DEBUG]  PS/2 keyboard initialized on primary channel
[DEBUG]  PNP: 00ff.2 init finished in 508 msecs
[DEBUG]  smbus: PCI: 00:1f.3[0]->I2C: 01:54 init
[DEBUG]  I2C: 01:54 init finished in 0 msecs
[DEBUG]  smbus: PCI: 00:1f.3[0]->I2C: 01:55 init
[DEBUG]  I2C: 01:55 init finished in 0 msecs
[DEBUG]  smbus: PCI: 00:1f.3[0]->I2C: 01:56 init
[DEBUG]  I2C: 01:56 init finished in 0 msecs
[DEBUG]  smbus: PCI: 00:1f.3[0]->I2C: 01:57 init
[DEBUG]  I2C: 01:57 init finished in 0 msecs
[DEBUG]  smbus: PCI: 00:1f.3[0]->I2C: 01:5c init
[DEBUG]  Locking EEPROM RFID
[DEBUG]  init EEPROM done
[DEBUG]  I2C: 01:5c init finished in 24 msecs
[DEBUG]  smbus: PCI: 00:1f.3[0]->I2C: 01:5d init
[DEBUG]  I2C: 01:5d init finished in 0 msecs
[DEBUG]  smbus: PCI: 00:1f.3[0]->I2C: 01:5e init
[DEBUG]  I2C: 01:5e init finished in 0 msecs
[DEBUG]  smbus: PCI: 00:1f.3[0]->I2C: 01:5f init
[DEBUG]  I2C: 01:5f init finished in 0 msecs
[INFO ]  Devices initialized
[DEBUG]  BS: BS_DEV_INIT run times (exec / console): 610 / 1 ms
[INFO ]  Found TPM ST33ZP24 by ST Microelectronics
[DEBUG]  TPM: Startup
[DEBUG]  TPM: command 0x99 returned 0x0
[DEBUG]  TPM: Asserting physical presence
[DEBUG]  TPM: command 0x4000000a returned 0x0
[DEBUG]  TPM: command 0x65 returned 0x0
[DEBUG]  TPM: flags disable=0, deactivated=0, nvlocked=1
[DEBUG]  TPM: Write digests cached in TPM log to PCR
[DEBUG]  TPM: Write digest for FMAP: FMAP into PCR 2
[DEBUG]  TPM: command 0x14 returned 0x0
[DEBUG]  TPM: Write digest for CBFS: bootblock into PCR 2
[DEBUG]  TPM: command 0x14 returned 0x0
[DEBUG]  TPM: Write digest for CBFS: fallback/romstage into PCR 2
[DEBUG]  TPM: command 0x14 returned 0x0
[DEBUG]  TPM: Write digest for CBFS: fallback/postcar into PCR 2
[DEBUG]  TPM: command 0x14 returned 0x0
[DEBUG]  TPM: Write digest for CBFS: fallback/ramstage into PCR 2
[DEBUG]  TPM: command 0x14 returned 0x0
[DEBUG]  TPM: Write digest for CBFS: cpu_microcode_blob.bin into PCR 2
[DEBUG]  TPM: command 0x14 returned 0x0
[DEBUG]  TPM: Write digest for CBFS: vbt.bin into PCR 2
[DEBUG]  TPM: command 0x14 returned 0x0
[INFO ]  TPM: setup succeeded
[DEBUG]  BS: BS_DEV_INIT exit times (exec / console): 103 / 0 ms
[INFO ]  Finalize devices...
[DEBUG]  PCI: 00:1f.0 final
[INFO ]  Devices finalized
[INFO ]  Timestamp - device setup done: 2577282889
[INFO ]  Timestamp - cbmem post: 2577287333
[INFO ]  Timestamp - write tables: 2577290241
[INFO ]  CBFS: Found 'fallback/dsdt.aml' @0x48980 size 0x38ba in mcache @0x7ff7d1d0
[INFO ]  VB2:vb2_digest_init() 14522 bytes, hash algo 1, HW acceleration unsupported
[DEBUG]  TPM: Extending digest for `CBFS: fallback/dsdt.aml` into PCR 2
[DEBUG]  TPM: command 0x14 returned 0x0
[DEBUG]  TPM: Digest of `CBFS: fallback/dsdt.aml` to PCR 2 measured
[WARN ]  CBFS: 'fallback/slic' not found.
[INFO ]  ACPI: Writing ACPI tables at 7fece000.
[DEBUG]  ACPI:    * FACS
[DEBUG]  ACPI:    * DSDT
[DEBUG]  ACPI:    * FADT
[DEBUG]  ACPI: added table 1/32, length now 40
[DEBUG]  ACPI:     * SSDT
[DEBUG]  Found 1 CPU(s) with 4 core(s) each.
[DEBUG]  PSS: 2901MHz power 35000 control 0x2400 status 0x2400
[DEBUG]  PSS: 2900MHz power 35000 control 0x1d00 status 0x1d00
[DEBUG]  PSS: 2400MHz power 27295 control 0x1800 status 0x1800
[DEBUG]  PSS: 2000MHz power 21703 control 0x1400 status 0x1400
[DEBUG]  PSS: 1600MHz power 16527 control 0x1000 status 0x1000
[DEBUG]  PSS: 1200MHz power 11795 control 0xc00 status 0xc00
[DEBUG]  PSS: 2901MHz power 35000 control 0x2400 status 0x2400
[DEBUG]  PSS: 2900MHz power 35000 control 0x1d00 status 0x1d00
[DEBUG]  PSS: 2400MHz power 27295 control 0x1800 status 0x1800
[DEBUG]  PSS: 2000MHz power 21703 control 0x1400 status 0x1400
[DEBUG]  PSS: 1600MHz power 16527 control 0x1000 status 0x1000
[DEBUG]  PSS: 1200MHz power 11795 control 0xc00 status 0xc00
[DEBUG]  PSS: 2901MHz power 35000 control 0x2400 status 0x2400
[DEBUG]  PSS: 2900MHz power 35000 control 0x1d00 status 0x1d00
[DEBUG]  PSS: 2400MHz power 27295 control 0x1800 status 0x1800
[DEBUG]  PSS: 2000MHz power 21703 control 0x1400 status 0x1400
[DEBUG]  PSS: 1600MHz power 16527 control 0x1000 status 0x1000
[DEBUG]  PSS: 1200MHz power 11795 control 0xc00 status 0xc00
[DEBUG]  PSS: 2901MHz power 35000 control 0x2400 status 0x2400
[DEBUG]  PSS: 2900MHz power 35000 control 0x1d00 status 0x1d00
[DEBUG]  PSS: 2400MHz power 27295 control 0x1800 status 0x1800
[DEBUG]  PSS: 2000MHz power 21703 control 0x1400 status 0x1400
[DEBUG]  PSS: 1600MHz power 16527 control 0x1000 status 0x1000
[DEBUG]  PSS: 1200MHz power 11795 control 0xc00 status 0xc00
[DEBUG]  PCI space above 4GB MMIO is at 0x47d600000, len = 0xb82a00000
[DEBUG]  Generating ACPI PIRQ entries
[INFO ]  \_SB_.PCI0.TPM: LPC TPM PNP: 0c31.0
[INFO ]  ACPI:    * H8
[INFO ]  H8: BDC detection not implemented. Assuming BDC installed
[INFO ]  H8: WWAN not installed
[DEBUG]  ACPI: added table 2/32, length now 44
[DEBUG]  ACPI:    * MCFG
[DEBUG]  ACPI: added table 3/32, length now 48
[DEBUG]  ACPI:    * TCPA
[DEBUG]  TCPA log created at 0x7febe000
[DEBUG]  ACPI: added table 4/32, length now 52
[DEBUG]  ACPI:    * MADT
[DEBUG]  IOAPIC: 24 interrupts
[DEBUG]  ACPI: added table 5/32, length now 56
[DEBUG]  current = 7fed3550
[DEBUG]  ACPI:     * DMAR
[DEBUG]  ACPI: added table 6/32, length now 60
[DEBUG]  current = 7fed3610
[DEBUG]  ACPI:    * HPET
[DEBUG]  ACPI: added table 7/32, length now 64
[INFO ]  ACPI: done.
[DEBUG]  ACPI tables: 22096 bytes.
[DEBUG]  smbios_write_tables: 7feb6000
[INFO ]  Create SMBIOS type 16
[INFO ]  Create SMBIOS type 17
[INFO ]  Create SMBIOS type 20
[DEBUG]  SMBIOS tables: 1118 bytes.
[DEBUG]  Writing table forward entry at 0x00000500
[DEBUG]  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 5fef
[DEBUG]  Writing coreboot table at 0x7fef2000
[DEBUG]   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
[DEBUG]   1. 0000000000001000-000000000009ffff: RAM
[DEBUG]   2. 00000000000a0000-00000000000fffff: RESERVED
[DEBUG]   3. 0000000000100000-000000007feb5fff: RAM
[DEBUG]   4. 000000007feb6000-000000007ff0efff: CONFIGURATION TABLES
[DEBUG]   5. 000000007ff0f000-000000007ff67fff: RAMSTAGE
[DEBUG]   6. 000000007ff68000-000000007fffffff: CONFIGURATION TABLES
[DEBUG]   7. 0000000080000000-00000000829fffff: RESERVED
[DEBUG]   8. 00000000f0000000-00000000f3ffffff: RESERVED
[DEBUG]   9. 00000000fed40000-00000000fed44fff: RESERVED
[DEBUG]  10. 00000000fed90000-00000000fed91fff: RESERVED
[DEBUG]  11. 0000000100000000-000000047d5fffff: RAM
[INFO ]  Setting up bootsplash in 1024x768@32
[INFO ]  CBFS: Found 'bootsplash.jpg' @0x3e4c0 size 0xa483 in mcache @0x7ff7d1a8
[INFO ]  VB2:vb2_digest_init() 42115 bytes, hash algo 1, HW acceleration unsupported
[DEBUG]  TPM: Extending digest for `CBFS: bootsplash.jpg` into PCR 2
[DEBUG]  TPM: command 0x14 returned 0x0
[DEBUG]  TPM: Digest of `CBFS: bootsplash.jpg` to PCR 2 measured
[DEBUG]  Bootsplash image resolution: 1024x768
[INFO ]  Bootsplash loaded
[DEBUG]  Wrote coreboot table at: 0x7fef2000, 0x414 bytes, checksum ce32
[DEBUG]  coreboot table: 1068 bytes.
[DEBUG]  IMD ROOT    0. 0x7ffff000 0x00001000
[DEBUG]  IMD SMALL   1. 0x7fffe000 0x00001000
[DEBUG]  CONSOLE     2. 0x7ff7e000 0x00080000
[DEBUG]  RO MCACHE   3. 0x7ff7d000 0x000003b0
[DEBUG]  TIME STAMP  4. 0x7ff7c000 0x00000910
[DEBUG]  TPM CB LOG  5. 0x7ff7a000 0x000019cc
[DEBUG]  MEM INFO    6. 0x7ff79000 0x000007a8
[DEBUG]  AFTER CAR   7. 0x7ff68000 0x00011000
[DEBUG]  RAMSTAGE    8. 0x7ff0e000 0x0005a000
[DEBUG]  SMM BACKUP  9. 0x7fefe000 0x00010000
[DEBUG]  IGD OPREGION10. 0x7fefa000 0x000030b8
[DEBUG]  COREBOOT   11. 0x7fef2000 0x00008000
[DEBUG]  ACPI       12. 0x7fece000 0x00024000
[DEBUG]  TCPA TCGLOG13. 0x7febe000 0x00010000
[DEBUG]  SMBIOS     14. 0x7feb6000 0x00008000
[DEBUG]  IMD small region:
[DEBUG]    IMD ROOT    0. 0x7fffec00 0x00000400
[DEBUG]    FMAP        1. 0x7fffeb20 0x000000e0
[DEBUG]    ROMSTAGE    2. 0x7fffeb00 0x00000004
[DEBUG]    ROMSTG STCK 3. 0x7fffea40 0x000000a8
[DEBUG]    ACPI GNVS   4. 0x7fffe940 0x00000100
[INFO ]  Timestamp - finalize chips: 2905004925
[DEBUG]  BS: BS_WRITE_TABLES run times (exec / console): 111 / 0 ms
[INFO ]  Timestamp - starting to load payload: 2905013297
[INFO ]  CBFS: Found 'fallback/payload' @0x56bc0 size 0x6b8655 in mcache @0x7ff7d298
[INFO ]  VB2:vb2_digest_init() 7046741 bytes, hash algo 1, HW acceleration unsupported
[DEBUG]  TPM: Extending digest for `CBFS: fallback/payload` into PCR 2
[DEBUG]  TPM: command 0x14 returned 0x0
[DEBUG]  TPM: Digest of `CBFS: fallback/payload` to PCR 2 measured
[DEBUG]  Checking segment from ROM address 0xff486dec
[DEBUG]  Checking segment from ROM address 0xff486e08
[DEBUG]  Checking segment from ROM address 0xff486e24
[DEBUG]  Checking segment from ROM address 0xff486e40
[DEBUG]  Checking segment from ROM address 0xff486e5c
[DEBUG]  Checking segment from ROM address 0xff486e78
[DEBUG]  Loading segment from ROM address 0xff486dec
[DEBUG]    data (compression=0)
[DEBUG]    New segment dstaddr 0x00090000 memsize 0x1080 srcaddr 0xff486e94 filesize 0x1080
[DEBUG]  Loading Segment: addr: 0x00090000 memsz: 0x0000000000001080 filesz: 0x0000000000001080
[DEBUG]  it's not compressed!
[DEBUG]  Loading segment from ROM address 0xff486e08
[DEBUG]    code (compression=0)
[DEBUG]    New segment dstaddr 0x01000000 memsize 0x25c3e0 srcaddr 0xff487f14 filesize 0x25c3e0
[DEBUG]  Loading Segment: addr: 0x01000000 memsz: 0x000000000025c3e0 filesz: 0x000000000025c3e0
[DEBUG]  it's not compressed!
[DEBUG]  Loading segment from ROM address 0xff486e24
[DEBUG]    code (compression=0)
[DEBUG]    New segment dstaddr 0x00040000 memsize 0x13c srcaddr 0xff6e42f4 filesize 0x13c
[DEBUG]  Loading Segment: addr: 0x00040000 memsz: 0x000000000000013c filesz: 0x000000000000013c
[DEBUG]  it's not compressed!
[DEBUG]  Loading segment from ROM address 0xff486e40
[DEBUG]    data (compression=0)
[DEBUG]    New segment dstaddr 0x00091000 memsize 0x11 srcaddr 0xff6e4430 filesize 0x11
[DEBUG]  Loading Segment: addr: 0x00091000 memsz: 0x0000000000000011 filesz: 0x0000000000000011
[DEBUG]  it's not compressed!
[DEBUG]  Loading segment from ROM address 0xff486e5c
[DEBUG]    data (compression=0)
[DEBUG]    New segment dstaddr 0x04000000 memsize 0x45b000 srcaddr 0xff6e4441 filesize 0x45b000
[DEBUG]  Loading Segment: addr: 0x04000000 memsz: 0x000000000045b000 filesz: 0x000000000045b000
[DEBUG]  it's not compressed!
[DEBUG]  Loading segment from ROM address 0xff486e78
[DEBUG]    Entry Point 0x00040000
[DEBUG]  BS: BS_PAYLOAD_LOAD run times (exec / console): 5885 / 0 ms
[INFO ]  coreboot TPM log measurements:

[INFO ]   PCR-2 3964868c3e32c845d2279b6276b5b980c79272f2 SHA1 [FMAP: FMAP]
[INFO ]   PCR-2 a100abf787bcaf942af791f869b5eb09e31bd287 SHA1 [CBFS: bootblock]
[INFO ]   PCR-2 8667529016d5783ea7ee40bf8288f872df107b0c SHA1 [CBFS: fallback/romstage]
[INFO ]   PCR-2 842e6d700bc0c0973c8d48a9ac848f5298ca64cf SHA1 [CBFS: fallback/postcar]
[INFO ]   PCR-2 08527eadfd1e7889cf985bf885c4de3605063513 SHA1 [CBFS: fallback/ramstage]
[INFO ]   PCR-2 8efffbbf487c06d4328ce4fbba2314554f2a2925 SHA1 [CBFS: cpu_microcode_blob.bin]
[INFO ]   PCR-2 c2335cc62820e8acd97f7b94ead60f73575cdf71 SHA1 [CBFS: vbt.bin]
[INFO ]   PCR-2 c2f1f569c134f0ef35bd4a1051ba75cecde72e4b SHA1 [CBFS: fallback/dsdt.aml]
[INFO ]   PCR-2 b688d567b0dfe1e1c6e4584289619a525b85cbd6 SHA1 [CBFS: bootsplash.jpg]
[INFO ]   PCR-2 b9d40e9fd373c8e595ca090634ef6454bf6f8b5d SHA1 [CBFS: fallback/payload]

[DEBUG]  ICH-NM10-PCH: watchdog disabled
[DEBUG]  Jumping to boot code at 0x00040000(0x7fef2000)
[INFO ]  Timestamp - selfboot jump: 19974813857