From 8542a5786b26857f3ef830ae9e72eec031df42d3 Mon Sep 17 00:00:00 2001
From: Dolu1990 <charles.papon.90@gmail.com>
Date: Thu, 25 Apr 2024 13:59:11 +0200
Subject: [PATCH] when --debug is used, a halted pin is added to VexRiscv for
 the user usages

---
 .../verilog/src/main/scala/vexriscv/GenCoreDefault.scala       | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/pythondata_cpu_vexriscv/verilog/src/main/scala/vexriscv/GenCoreDefault.scala b/pythondata_cpu_vexriscv/verilog/src/main/scala/vexriscv/GenCoreDefault.scala
index c5a013d..8c96e92 100644
--- a/pythondata_cpu_vexriscv/verilog/src/main/scala/vexriscv/GenCoreDefault.scala
+++ b/pythondata_cpu_vexriscv/verilog/src/main/scala/vexriscv/GenCoreDefault.scala
@@ -331,6 +331,9 @@ object GenCoreDefault{
             plugin.dBus.setAsDirectionLess()
             master(plugin.dBus.toWishbone()).setName("dBusWishbone")
           }
+          case plugin : DebugPlugin => {
+            out(CombInit(cpu.reflectBaseType("DebugPlugin_haltIt")).setName("halted"))
+          }
           case _ =>
         }
       }