From a34cdf8bb498dc2f5dd415542f8e83261d2eeb88 Mon Sep 17 00:00:00 2001 From: Kristina Brooks Date: Tue, 2 Oct 2018 16:32:32 +0000 Subject: [PATCH] [Arm builtins] Remove non-necessary IS check This patch removes the instruction set check to make the msr APSR_nzcvq, ip instruction only execute if Thumb2 is used. The APSR is a subset of the bits of the CPSR (B.1.3.3 of the Arm v7 A and R ARM [1]) and is only available for A and R profiles. However in section B.9.3.11 of the same document we see that: "In the A and R profiles, APSR_nzcvq is the same as CPSR_f" "ARM recommends the APSR forms when only the N, Z, C, V, Q, and GE[3:0] bits are being written." This patch also make those files assemble for Armv8-M Mainline architecture profile. The builtins were cross-compiled for Arm, Aarch64 and Armv6-M, Armv7-M and Armv7E-M targets. Cross-compiled tests were executed for Arm target. [1]: https://developer.arm.com/docs/ddi0406/latest/arm-architecture-reference-manual-armv7-a-and-armv7-r-edition Patch by hug-dev (Hugues de Valon). Differential Revision: https://reviews.llvm.org/D51854 git-svn-id: https://llvm.org/svn/llvm-project/compiler-rt/trunk@343601 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/builtins/arm/aeabi_cdcmp.S | 6 +----- lib/builtins/arm/aeabi_cfcmp.S | 6 +----- 2 files changed, 2 insertions(+), 10 deletions(-) diff --git a/lib/builtins/arm/aeabi_cdcmp.S b/lib/builtins/arm/aeabi_cdcmp.S index 87dd03dce9..adc2d55d90 100644 --- a/lib/builtins/arm/aeabi_cdcmp.S +++ b/lib/builtins/arm/aeabi_cdcmp.S @@ -55,7 +55,7 @@ DEFINE_COMPILERRT_FUNCTION(__aeabi_cdcmpeq) mov ip, #APSR_C msr APSR_nzcvq, ip #else - msr CPSR_f, #APSR_C + msr APSR_nzcvq, #APSR_C #endif JMP(lr) #endif @@ -115,11 +115,7 @@ DEFINE_COMPILERRT_FUNCTION(__aeabi_cdcmple) movne ip, #(APSR_C) 1: -#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) msr APSR_nzcvq, ip -#else - msr CPSR_f, ip -#endif pop {r0-r3} POP_PC() #endif diff --git a/lib/builtins/arm/aeabi_cfcmp.S b/lib/builtins/arm/aeabi_cfcmp.S index c5fee6b6a0..4b1de99768 100644 --- a/lib/builtins/arm/aeabi_cfcmp.S +++ b/lib/builtins/arm/aeabi_cfcmp.S @@ -55,7 +55,7 @@ DEFINE_COMPILERRT_FUNCTION(__aeabi_cfcmpeq) mov ip, #APSR_C msr APSR_nzcvq, ip #else - msr CPSR_f, #APSR_C + msr APSR_nzcvq, #APSR_C #endif JMP(lr) #endif @@ -115,11 +115,7 @@ DEFINE_COMPILERRT_FUNCTION(__aeabi_cfcmple) movne ip, #(APSR_C) 1: -#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) msr APSR_nzcvq, ip -#else - msr CPSR_f, ip -#endif pop {r0-r3} POP_PC() #endif