diff --git a/llvm/lib/TargetParser/AArch64TargetParser.cpp b/llvm/lib/TargetParser/AArch64TargetParser.cpp index bc20e4a35fa787..45ecc4f24c2afd 100644 --- a/llvm/lib/TargetParser/AArch64TargetParser.cpp +++ b/llvm/lib/TargetParser/AArch64TargetParser.cpp @@ -253,10 +253,11 @@ void AArch64::ExtensionSet::disable(ArchExtKind E) { disable(AEK_SM4); } - // sve2-aes was historically associated with both FEAT_SVE2 and FEAT_SVE_AES, the latter - // is now associated with sve-aes and sve2-aes has become shorthand for +sve2+sve-aes. - // For backwards compatibility, when we disable sve2-aes we must also disable sve-aes. - if(E == AEK_SVE2AES) + // sve2-aes was historically associated with both FEAT_SVE2 and FEAT_SVE_AES, + // the latter is now associated with sve-aes and sve2-aes has become shorthand + // for +sve2+sve-aes. For backwards compatibility, when we disable sve2-aes we + // must also disable sve-aes. + if (E == AEK_SVE2AES) disable(AEK_SVEAES); if (!Enabled.test(E)) diff --git a/llvm/test/MC/AArch64/SVE2/directive-arch-negative.s b/llvm/test/MC/AArch64/SVE2/directive-arch-negative.s index e71937caad6375..090d8af85825a3 100644 --- a/llvm/test/MC/AArch64/SVE2/directive-arch-negative.s +++ b/llvm/test/MC/AArch64/SVE2/directive-arch-negative.s @@ -11,6 +11,7 @@ aesd z23.b, z23.b, z13.b // CHECK: error: instruction requires: sve-aes // CHECK-NEXT: aesd z23.b, z23.b, z13.b +// nosve2-aes should disable sve-aes but not sve2. .arch armv9-a+sve2-aes+nosve2-aes aesd z23.b, z23.b, z13.b // CHECK: error: instruction requires: sve-aes diff --git a/llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s b/llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s index 62ee637c90d056..fbe84d0c95a435 100644 --- a/llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s +++ b/llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s @@ -12,6 +12,7 @@ aesd z23.b, z23.b, z13.b // CHECK: error: instruction requires: sve2 sve-aes // CHECK-NEXT: aesd z23.b, z23.b, z13.b +// nosve2-aes should disable sve-aes but not sve2. .arch_extension sve2-aes .arch_extension nosve2-aes aesd z23.b, z23.b, z13.b diff --git a/llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s b/llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s index 6856e0ef297244..a0c52cf29682a3 100644 --- a/llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s +++ b/llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s @@ -6,6 +6,7 @@ tbx z0.b, z1.b, z2.b // CHECK: error: instruction requires: sve2 or sme // CHECK-NEXT: tbx z0.b, z1.b, z2.b +// nosve2-aes should disable sve-aes but not sve2. .cpu generic+sve2-aes+nosve2-aes aesd z23.b, z23.b, z13.b // CHECK: error: instruction requires: sve-aes