Skip to content

Commit a56ca3a

Browse files
MaskRayMaskRay
committed
[test] Don't test initial ".text" in llvm-mc --disassemble output
This kludge will go away after #120185.
1 parent 417d2d7 commit a56ca3a

26 files changed

+12
-41
lines changed

‎llvm/test/MC/Disassembler/AArch64/armv8.6a-amvs.s‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -67,8 +67,7 @@
6767
[0xa0,0xdb,0x3c,0xd5]
6868
[0xc0,0xdb,0x3c,0xd5]
6969
[0xe0,0xdb,0x3c,0xd5]
70-
// CHECK: .text
71-
// CHECK-NEXT: msr S3_3_C13_C2_6, x0 // encoding: [0xc0,0xd2,0x1b,0xd5]
70+
// CHECK: msr S3_3_C13_C2_6, x0 // encoding: [0xc0,0xd2,0x1b,0xd5]
7271
// CHECK-NEXT: mrs x0, AMCG1IDR_EL0 // encoding: [0xc0,0xd2,0x3b,0xd5]
7372
// CHECK-NEXT: msr AMEVCNTVOFF00_EL2, x0 // encoding: [0x00,0xd8,0x1c,0xd5]
7473
// CHECK-NEXT: msr AMEVCNTVOFF01_EL2, x0 // encoding: [0x20,0xd8,0x1c,0xd5]
@@ -134,8 +133,7 @@
134133
// CHECK-NEXT: mrs x0, AMEVCNTVOFF113_EL2 // encoding: [0xa0,0xdb,0x3c,0xd5]
135134
// CHECK-NEXT: mrs x0, AMEVCNTVOFF114_EL2 // encoding: [0xc0,0xdb,0x3c,0xd5]
136135
// CHECK-NEXT: mrs x0, AMEVCNTVOFF115_EL2 // encoding: [0xe0,0xdb,0x3c,0xd5]
137-
// NOAMVS: .text
138-
// NOAMVS-NEXT: msr S3_3_C13_C2_6, x0 // encoding: [0xc0,0xd2,0x1b,0xd5]
136+
// NOAMVS: msr S3_3_C13_C2_6, x0 // encoding: [0xc0,0xd2,0x1b,0xd5]
139137
// NOAMVS-NEXT: mrs x0, S3_3_C13_C2_6 // encoding: [0xc0,0xd2,0x3b,0xd5]
140138
// NOAMVS-NEXT: msr S3_4_C13_C8_0, x0 // encoding: [0x00,0xd8,0x1c,0xd5]
141139
// NOAMVS-NEXT: msr S3_4_C13_C8_1, x0 // encoding: [0x20,0xd8,0x1c,0xd5]

‎llvm/test/MC/Disassembler/AArch64/armv8r-sysreg.txt‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -286,8 +286,7 @@
286286
[0xbe,0x6f,0x1c,0xd5]
287287
[0x20,0xd0,0x1c,0xd5]
288288

289-
// CHECK: .text
290-
// CHECK-NEXT: mrs x0, VSCTLR_EL2
289+
// CHECK: mrs x0, VSCTLR_EL2
291290
// CHECK-NEXT: mrs x0, MPUIR_EL1
292291
// CHECK-NEXT: mrs x0, MPUIR_EL2
293292
// CHECK-NEXT: mrs x0, PRENR_EL1

‎llvm/test/MC/Disassembler/AArch64/armv9.6a-lsui.txt‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -186,8 +186,7 @@
186186
[0x5f,0x34,0x20,0x59]
187187
[0xff,0x37,0x22,0x59]
188188

189-
# CHECK: .text
190-
# CHECK-NEXT: ldtxr x9, [sp]
189+
# CHECK: ldtxr x9, [sp]
191190
# CHECK-NEXT: ldtxr x9, [sp]
192191
# CHECK-NEXT: ldtxr x10, [x11]
193192
# CHECK-NEXT: ldtxr x10, [x11]

‎llvm/test/MC/Disassembler/AArch64/armv9.6a-occmo.txt‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5,8 +5,7 @@
55
[0x0d,0x7b,0x0b,0xd5]
66
[0xe1,0x7b,0x0b,0xd5]
77

8-
# CHECK: .text
9-
# CHECK-NEXT: dc civaoc, x12
8+
# CHECK: dc civaoc, x12
109
# CHECK-NEXT: dc cigdvaoc, x0
1110
# CHECK-NEXT: dc cvaoc, x13
1211
# CHECK-NEXT: dc cgdvaoc, x1

‎llvm/test/MC/Disassembler/AArch64/armv9.6a-pcdphint.txt‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,5 @@
44
[0x1f,0x96,0x01,0xd5]
55
[0x3f,0x96,0x01,0xd5]
66

7-
# CHECK: .text
8-
# CHECK-NEXT: stshh keep
7+
# CHECK: stshh keep
98
# CHECK-NEXT: stshh strm

‎llvm/test/MC/Disassembler/AArch64/armv9.6a-rme-gpc3.txt‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,6 @@
55
[0xa3,0x21,0x3e,0xd5]
66
[0xa4,0x21,0x1e,0xd5]
77

8-
# CHECK: .text
9-
# CHECK-NEXT: sys #6, c7, c0, #0
8+
# CHECK: sys #6, c7, c0, #0
109
# CHECK-NEXT: mrs x3, GPCBW_EL3
1110
# CHECK-NEXT: msr GPCBW_EL3, x4

‎llvm/test/MC/Disassembler/AArch64/armv9.6a-srmask.txt‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -51,8 +51,7 @@
5151
[0x23,0x14,0x1d,0xd5]
5252
[0xa3,0x14,0x18,0xd5]
5353

54-
# CHECK: .text
55-
# CHECK-NEXT: mrs x3, SCTLRMASK_EL1
54+
# CHECK: mrs x3, SCTLRMASK_EL1
5655
# CHECK-NEXT: mrs x3, SCTLRMASK_EL2
5756
# CHECK-NEXT: mrs x3, SCTLRMASK_EL12
5857
# CHECK-NEXT: mrs x3, CPACRMASK_EL1

‎llvm/test/MC/Disassembler/Mips/eva/valid_R6-eva.txt‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,5 @@
11
# RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips32r6 -mattr=eva | FileCheck %s
22
# RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips64r6 -mattr=eva | FileCheck %s
3-
# CHECK: .text
43
0x7c 0xff 0x7f 0x9b # CHECK: cachee 31, 255($7)
54
0x7c 0x80 0x80 0x1b # CHECK: cachee 0, -256($4)
65
0x7c 0x85 0xba 0x1b # CHECK: cachee 5, -140($4)

‎llvm/test/MC/Disassembler/Mips/eva/valid_preR6-eva.txt‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,6 @@
44
# RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips64r2 -mattr=eva | FileCheck %s
55
# RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips64r3 -mattr=eva | FileCheck %s
66
# RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips64r5 -mattr=eva | FileCheck %s
7-
# CHECK: .text
87
0x7c 0xff 0x7f 0x9b # CHECK: cachee 31, 255($7)
98
0x7c 0x80 0x80 0x1b # CHECK: cachee 0, -256($4)
109
0x7c 0x85 0xba 0x1b # CHECK: cachee 5, -140($4)

‎llvm/test/MC/Disassembler/Mips/mips1/valid-mips1-el.txt‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,4 @@
11
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -disassemble -mcpu=mips1 | FileCheck %s
2-
# CHECK: .text
32
0x85 0xc1 0x20 0x46 # CHECK: abs.d $f6, $f24
43
0x45 0x82 0x00 0x46 # CHECK: abs.s $f9, $f16
54
0x20 0xb8 0x45 0x02 # CHECK: add $23, $18, $5

0 commit comments

Comments
 (0)