[ValueTracking] Implement Known{Bits,NonZero,FPClass} for llvm.vector.reverse

Summary:
`llvm.vector.reverse` preserves each of the elements and thus elements
common to them.

Alive2 doesn't support the intrin yet, but the logic seems pretty
self-evident.

Closes #99013

Test Plan: 

Reviewers: 

Subscribers: 

Tasks: 

Tags: 


Differential Revision: https://phabricator.intern.facebook.com/D60251759

Author: goldsteinn

llvm/lib/Analysis/ValueTracking.cpp

@@ -1710,6 +1710,8 @@ static void computeKnownBitsFromOperator(const Operator *I,
         computeKnownBits(I->getOperand(1), Known2, Depth + 1, Q);
         Known = KnownBits::ssub_sat(Known, Known2);
         break;
+        // Vec reverse preserves bits from input vec.
+      case Intrinsic::vector_reverse:
         // for min/max/and/or reduce, any bit common to each element in the
         // input vec is set in the output.
       case Intrinsic::vector_reduce_and:
@@ -3090,6 +3092,8 @@ static bool isKnownNonZeroFromOperator(const Operator *I,
         return isNonZeroAdd(DemandedElts, Depth, Q, BitWidth,
                             II->getArgOperand(0), II->getArgOperand(1),
                             /*NSW=*/true, /* NUW=*/false);
+        // Vec reverse preserves zero/non-zero status from input vec.
+      case Intrinsic::vector_reverse:
         // umin/smin/smax/smin/or of all non-zero elements is always non-zero.
       case Intrinsic::vector_reduce_or:
       case Intrinsic::vector_reduce_umax:
@@ -5227,6 +5231,11 @@ void computeKnownFPClass(const Value *V, const APInt &DemandedElts,
         Known.SignBit.reset();
       break;
     }
+      // reverse preserves all characteristics of the input vec's element.
+    case Intrinsic::vector_reverse:
+      Known = computeKnownFPClass(II->getArgOperand(0), II->getFastMathFlags(),
+                                  InterestedClasses, Depth + 1, Q);
+      break;
     case Intrinsic::trunc:
     case Intrinsic::floor:
     case Intrinsic::ceil:

llvm/test/Analysis/ValueTracking/known-bits.ll

@@ -3,10 +3,7 @@
 
 define <4 x i1> @vec_reverse_known_bits(<4 x i8> %xx) {
 ; CHECK-LABEL: @vec_reverse_known_bits(
-; CHECK-NEXT:    [[X:%.*]] = or <4 x i8> [[XX:%.*]], <i8 -128, i8 -128, i8 -128, i8 -128>
-; CHECK-NEXT:    [[REV:%.*]] = call <4 x i8> @llvm.vector.reverse.v4i8(<4 x i8> [[X]])
-; CHECK-NEXT:    [[R:%.*]] = icmp slt <4 x i8> [[REV]], zeroinitializer
-; CHECK-NEXT:    ret <4 x i1> [[R]]
+; CHECK-NEXT:    ret <4 x i1> <i1 true, i1 true, i1 true, i1 true>
 ;
   %x = or <4 x i8> %xx, <i8 128, i8 128, i8 128, i8 128>
   %rev = call <4 x i8> @llvm.vector.reverse(<4 x i8> %x)

llvm/test/Analysis/ValueTracking/known-fpclass.ll

@@ -3,10 +3,7 @@
 
 define <4 x i1> @vector_reverse_fpclass(<4 x double> nofpclass(nzero nan) %x) {
 ; CHECK-LABEL: @vector_reverse_fpclass(
-; CHECK-NEXT:    [[X_ABS:%.*]] = call <4 x double> @llvm.fabs.v4f64(<4 x double> [[X:%.*]])
-; CHECK-NEXT:    [[OP:%.*]] = call <4 x double> @llvm.vector.reverse.v4f64(<4 x double> [[X_ABS]])
-; CHECK-NEXT:    [[CMP:%.*]] = fcmp oge <4 x double> [[OP]], zeroinitializer
-; CHECK-NEXT:    ret <4 x i1> [[CMP]]
+; CHECK-NEXT:    ret <4 x i1> <i1 true, i1 true, i1 true, i1 true>
 ;
   %x.abs = call <4 x double> @llvm.fabs.v4f64(<4 x double> %x)
   %op = call <4 x double> @llvm.vector.reverse(<4 x double> %x.abs)

llvm/test/Analysis/ValueTracking/known-non-zero.ll

@@ -1499,10 +1499,7 @@ define i1 @trunc_nsw_nuw_non_zero_fail(i8 %xx) {
 
 define <4 x i1> @vec_reverse_non_zero(<4 x i8> %xx) {
 ; CHECK-LABEL: @vec_reverse_non_zero(
-; CHECK-NEXT:    [[X:%.*]] = add nuw <4 x i8> [[XX:%.*]], <i8 1, i8 1, i8 1, i8 1>
-; CHECK-NEXT:    [[REV:%.*]] = call <4 x i8> @llvm.vector.reverse.v4i8(<4 x i8> [[X]])
-; CHECK-NEXT:    [[R:%.*]] = icmp eq <4 x i8> [[REV]], zeroinitializer
-; CHECK-NEXT:    ret <4 x i1> [[R]]
+; CHECK-NEXT:    ret <4 x i1> zeroinitializer
 ;
   %x = add nuw <4 x i8> %xx, <i8 1, i8 1, i8 1, i8 1>
   %rev = call <4 x i8> @llvm.vector.reverse(<4 x i8> %x)