From 547611c92ba49f46f0ffb3978b3bfab56baccc01 Mon Sep 17 00:00:00 2001 From: loongson-jvm Date: Wed, 11 Sep 2024 10:11:37 +0800 Subject: [PATCH] Update (2024.09.11, 5th) 34617: LA port of 8333354: ubsan: frame.inline.hpp:91:25: and src/hotspot/share/runtime/frame.inline.hpp:88:29: runtime error: member call on null pointer of type 'const struct SmallRegisterMap' 34616: LA port of 8336685: Shenandoah: Remove experimental incremental update mode --- .../c1/shenandoahBarrierSetC1_loongarch.cpp | 8 +------ ...henandoahBarrierSetAssembler_loongarch.cpp | 11 +--------- ...henandoahBarrierSetAssembler_loongarch.hpp | 5 +---- .../smallRegisterMap_loongarch.inline.hpp | 22 ++++++++----------- 4 files changed, 12 insertions(+), 34 deletions(-) diff --git a/src/hotspot/cpu/loongarch/gc/shenandoah/c1/shenandoahBarrierSetC1_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/shenandoah/c1/shenandoahBarrierSetC1_loongarch.cpp index 1fd8cff390423..5dc47a833a730 100644 --- a/src/hotspot/cpu/loongarch/gc/shenandoah/c1/shenandoahBarrierSetC1_loongarch.cpp +++ b/src/hotspot/cpu/loongarch/gc/shenandoah/c1/shenandoahBarrierSetC1_loongarch.cpp @@ -1,6 +1,6 @@ /* * Copyright (c) 2018, 2021, Red Hat, Inc. All rights reserved. - * Copyright (c) 2022, Loongson Technology. All rights reserved. + * Copyright (c) 2022, 2024, Loongson Technology. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -39,8 +39,6 @@ void LIR_OpShenandoahCompareAndSwap::emit_code(LIR_Assembler* masm) { Register cmpval = _cmp_value->as_register(); Register result = result_opr()->as_register(); - ShenandoahBarrierSet::assembler()->iu_barrier(masm->masm(), newval, SCR2); - if (UseCompressedOops) { Register tmp1 = _tmp1->as_register(); Register tmp2 = _tmp2->as_register(); @@ -107,10 +105,6 @@ LIR_Opr ShenandoahBarrierSetC1::atomic_xchg_at_resolved(LIRAccess& access, LIRIt value.load_item(); LIR_Opr value_opr = value.result(); - if (access.is_oop()) { - value_opr = iu_barrier(access.gen(), value_opr, access.access_emit_info(), access.decorators()); - } - assert(type == T_INT || is_reference_type(type) LP64_ONLY( || type == T_LONG ), "unexpected type"); LIR_Opr tmp = gen->new_register(T_INT); __ xchg(access.resolved_addr(), value_opr, result, tmp); diff --git a/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.cpp b/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.cpp index 3fc75ae74d051..a8651697d236b 100644 --- a/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.cpp +++ b/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.cpp @@ -48,7 +48,7 @@ void ShenandoahBarrierSetAssembler::arraycopy_prologue(MacroAssembler* masm, Dec Register src, Register dst, Register count, RegSet saved_regs) { if (is_oop) { bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0; - if ((ShenandoahSATBBarrier && !dest_uninitialized) || ShenandoahIUBarrier || ShenandoahLoadRefBarrier) { + if ((ShenandoahSATBBarrier && !dest_uninitialized) || ShenandoahLoadRefBarrier) { Label done; // Avoid calling runtime if count == 0 @@ -311,14 +311,6 @@ void ShenandoahBarrierSetAssembler::load_reference_barrier(MacroAssembler* masm, __ leave(); } -void ShenandoahBarrierSetAssembler::iu_barrier(MacroAssembler* masm, Register dst, Register tmp) { - if (ShenandoahIUBarrier) { - __ push_call_clobbered_registers(); - satb_write_barrier_pre(masm, noreg, dst, TREG, tmp, SCR1, true, false); - __ pop_call_clobbered_registers(); - } -} - // // Arguments: // @@ -409,7 +401,6 @@ void ShenandoahBarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet if (val == noreg) { BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), noreg, noreg, noreg, noreg); } else { - iu_barrier(masm, val, tmp1); BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp3, 0), val, noreg, noreg, noreg); } } diff --git a/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.hpp b/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.hpp index 133bbbb0b8978..06a9c77cbd378 100644 --- a/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.hpp +++ b/src/hotspot/cpu/loongarch/gc/shenandoah/shenandoahBarrierSetAssembler_loongarch.hpp @@ -1,6 +1,6 @@ /* * Copyright (c) 2018, 2021, Red Hat, Inc. All rights reserved. - * Copyright (c) 2022, 2023, Loongson Technology. All rights reserved. + * Copyright (c) 2022, 2024, Loongson Technology. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -61,9 +61,6 @@ class ShenandoahBarrierSetAssembler: public BarrierSetAssembler { void load_reference_barrier(MacroAssembler* masm, Register dst, Address load_addr, DecoratorSet decorators); public: - - void iu_barrier(MacroAssembler* masm, Register dst, Register tmp); - virtual NMethodPatchingType nmethod_patching_type() { return NMethodPatchingType::conc_data_patch; } #ifdef COMPILER1 diff --git a/src/hotspot/cpu/loongarch/smallRegisterMap_loongarch.inline.hpp b/src/hotspot/cpu/loongarch/smallRegisterMap_loongarch.inline.hpp index ebd11807b24f1..7417ece8f8e55 100644 --- a/src/hotspot/cpu/loongarch/smallRegisterMap_loongarch.inline.hpp +++ b/src/hotspot/cpu/loongarch/smallRegisterMap_loongarch.inline.hpp @@ -1,6 +1,6 @@ /* * Copyright (c) 2019, 2022, Oracle and/or its affiliates. All rights reserved. - * Copyright (c) 2022, Loongson Technology. All rights reserved. + * Copyright (c) 2022, 2024, Loongson Technology. All rights reserved. * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. * * This code is free software; you can redistribute it and/or modify it @@ -31,8 +31,15 @@ // Java frames don't have callee saved registers (except for FP), so we can use a smaller RegisterMap class SmallRegisterMap { + constexpr SmallRegisterMap() = default; + ~SmallRegisterMap() = default; + NONCOPYABLE(SmallRegisterMap); + public: - static constexpr SmallRegisterMap* instance = nullptr; + static const SmallRegisterMap* instance() { + static constexpr SmallRegisterMap the_instance{}; + return &the_instance; + } private: static void assert_is_fp(VMReg r) NOT_DEBUG_RETURN DEBUG_ONLY({ assert (r == FP->as_VMReg() || r == FP->as_VMReg()->next(), "Reg: %s", r->name()); }) @@ -49,17 +56,6 @@ class SmallRegisterMap { return map; } - SmallRegisterMap() {} - - SmallRegisterMap(const RegisterMap* map) { - #ifdef ASSERT - for(int i = 0; i < RegisterMap::reg_count; i++) { - VMReg r = VMRegImpl::as_VMReg(i); - if (map->location(r, (intptr_t*)nullptr) != nullptr) assert_is_fp(r); - } - #endif - } - inline address location(VMReg reg, intptr_t* sp) const { assert_is_fp(reg); return (address)(sp - 2);