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fix compile error for ESP-IDF v5.4? ( #635 )
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lovyan03 committed Nov 6, 2024
1 parent 894e434 commit 39fd9ae
Showing 1 changed file with 18 additions and 7 deletions.
25 changes: 18 additions & 7 deletions src/lgfx/v1/platforms/esp32s3/Bus_RGB.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -156,14 +156,18 @@ namespace lgfx
static constexpr const uint8_t rgb332sig_tbl[] = { 1, 0, 1, 0, 1, 2, 3, 4, 2, 3, 4, 5, 6, 5, 6, 7 };
static constexpr const uint8_t rgb565sig_tbl[] = { 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7 };
auto tbl = (pixel_bytes == 2) ? rgb565sig_tbl : rgb332sig_tbl;
auto sigs = lcd_periph_signals.panels[_cfg.port];
#if SOC_LCDCAM_RGB_LCD_SUPPORTED
auto sigs = &lcd_periph_rgb_signals.panels[_cfg.port];
#else
auto sigs = &lcd_periph_signals.panels[_cfg.port];
#endif
for (size_t i = 0; i < 16; i++) {
_gpio_pin_sig(_cfg.pin_data[i], sigs.data_sigs[tbl[i]]);
_gpio_pin_sig(_cfg.pin_data[i], sigs->data_sigs[tbl[i]]);
}
_gpio_pin_sig(_cfg.pin_henable, sigs.de_sig);
_gpio_pin_sig(_cfg.pin_hsync, sigs.hsync_sig);
_gpio_pin_sig(_cfg.pin_vsync, sigs.vsync_sig);
_gpio_pin_sig(_cfg.pin_pclk, sigs.pclk_sig);
_gpio_pin_sig(_cfg.pin_henable, sigs->de_sig);
_gpio_pin_sig(_cfg.pin_hsync, sigs->hsync_sig);
_gpio_pin_sig(_cfg.pin_vsync, sigs->vsync_sig);
_gpio_pin_sig(_cfg.pin_pclk, sigs->pclk_sig);
}

// periph_module_enable(lcd_periph_signals.panels[_cfg.port].module);
Expand Down Expand Up @@ -304,7 +308,14 @@ namespace lgfx
dev->lc_dma_int_ena.val = 1;

int isr_flags = ESP_INTR_FLAG_INTRDISABLED | ESP_INTR_FLAG_SHARED;
esp_intr_alloc_intrstatus(lcd_periph_signals.panels[_cfg.port].irq_id, isr_flags,

#if SOC_LCDCAM_RGB_LCD_SUPPORTED
auto sigs = &lcd_periph_rgb_signals.panels[_cfg.port];
#else
auto sigs = &lcd_periph_signals.panels[_cfg.port];
#endif

esp_intr_alloc_intrstatus(sigs->irq_id, isr_flags,
(uint32_t)&dev->lc_dma_int_st,
LCD_LL_EVENT_VSYNC_END, lcd_default_isr_handler, this, &_intr_handle);
esp_intr_enable(_intr_handle);
Expand Down

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