diff --git a/src/coreclr/jit/codegencommon.cpp b/src/coreclr/jit/codegencommon.cpp
index 3a05ac9799354..8119a50baa7a0 100644
--- a/src/coreclr/jit/codegencommon.cpp
+++ b/src/coreclr/jit/codegencommon.cpp
@@ -4055,15 +4055,9 @@ void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg,
                 continue;
             }
 
-            // Locals that are (only) in registers to begin with do not need
-            // their stack home zeroed. Their register will be zeroed later in
-            // the prolog.
-            if (varDsc->lvIsInReg() && !varDsc->lvLiveInOutOfHndlr)
-            {
-                continue;
-            }
-
-            noway_assert(varDsc->lvOnFrame);
+            // TODO-Review: I'm not sure that we're correctly handling the mustInit case for
+            // partially-enregistered vars in the case where we don't use a block init.
+            noway_assert(varDsc->lvIsInReg() || varDsc->lvOnFrame);
 
             // lvMustInit can only be set for GC types or TYP_STRUCT types
             // or when compInitMem is true
@@ -4072,6 +4066,11 @@ void CodeGen::genZeroInitFrame(int untrLclHi, int untrLclLo, regNumber initReg,
             noway_assert(varTypeIsGC(varDsc->TypeGet()) || (varDsc->TypeGet() == TYP_STRUCT) ||
                          compiler->info.compInitMem || compiler->opts.compDbgCode);
 
+            if (!varDsc->lvOnFrame)
+            {
+                continue;
+            }
+
             if ((varDsc->TypeGet() == TYP_STRUCT) && !compiler->info.compInitMem &&
                 (varDsc->lvExactSize() >= TARGET_POINTER_SIZE))
             {