diff --git a/boot/zephyr/CMakeLists.txt b/boot/zephyr/CMakeLists.txt
index 1599625435..708818aae4 100644
--- a/boot/zephyr/CMakeLists.txt
+++ b/boot/zephyr/CMakeLists.txt
@@ -536,6 +536,10 @@ if((CONFIG_BOOT_SWAP_USING_SCRATCH OR CONFIG_BOOT_SWAP_USING_MOVE OR CONFIG_BOOT
   zephyr_library_sources(flash_check.c)
 endif()
 
+if(CONFIG_BOOT_RAM_LOAD)
+  zephyr_library_sources(ram_load.c)
+endif()
+
 if(SYSBUILD)
   if(CONFIG_SINGLE_APPLICATION_SLOT OR CONFIG_BOOT_FIRMWARE_LOADER OR CONFIG_BOOT_SWAP_USING_SCRATCH OR CONFIG_BOOT_SWAP_USING_MOVE OR CONFIG_BOOT_SWAP_USING_OFFSET OR CONFIG_BOOT_UPGRADE_ONLY OR CONFIG_BOOT_DIRECT_XIP OR CONFIG_BOOT_RAM_LOAD)
     # TODO: RAM LOAD support
diff --git a/boot/zephyr/boards/stm32n6570_dk_stm32n657xx_fsbl.conf b/boot/zephyr/boards/stm32n6570_dk_stm32n657xx_fsbl.conf
new file mode 100644
index 0000000000..85179cc957
--- /dev/null
+++ b/boot/zephyr/boards/stm32n6570_dk_stm32n657xx_fsbl.conf
@@ -0,0 +1,3 @@
+CONFIG_STM32_MEMMAP=y
+CONFIG_BOOT_MAX_IMG_SECTORS_AUTO=n
+CONFIG_BOOT_MAX_IMG_SECTORS=4096
diff --git a/boot/zephyr/flash_map_extended.c b/boot/zephyr/flash_map_extended.c
index 3b95b1fd72..6acf76f462 100644
--- a/boot/zephyr/flash_map_extended.c
+++ b/boot/zephyr/flash_map_extended.c
@@ -20,7 +20,24 @@
 
 BOOT_LOG_MODULE_DECLARE(mcuboot);
 
-#if (!defined(CONFIG_XTENSA) && DT_HAS_CHOSEN(zephyr_flash_controller))
+#if defined(CONFIG_STM32_MEMMAP)
+/* MEMORY MAPPED for XiP on external NOR flash takes the sspi-nor or ospi-nor or qspi-nor device */
+#define FLASH_DEVICE_ID SPI_FLASH_0_ID
+#if DT_NODE_HAS_STATUS(DT_INST(0, st_stm32_xspi_nor), okay)
+#define DT_DRV_COMPAT st_stm32_xspi_nor
+#define FLASH_DEVICE_NODE DT_INST(0, st_stm32_xspi_nor)
+#define FLASH_DEVICE_BASE DT_REG_ADDR_BY_IDX(DT_INST_PARENT(0), 1)
+#elif DT_NODE_HAS_STATUS(DT_INST(0, st_stm32_ospi_nor), okay)
+#define FLASH_DEVICE_NODE DT_INST(0, st_stm32_ospi_nor)
+#define FLASH_DEVICE_BASE DT_REG_ADDR(DT_INST(0, st_stm32_ospi_nor))
+#elif DT_NODE_HAS_STATUS(DT_INST(0, st_stm32_qspi_nor), okay)
+#define FLASH_DEVICE_NODE DT_INST(0, st_stm32_qspi_nor)
+#define FLASH_DEVICE_BASE DT_REG_ADDR(DT_INST(0, st_stm32_qspi_nor))
+#else
+#error "FLASH_DEVICE_NODE could not be determined"
+#endif
+
+#elif (!defined(CONFIG_XTENSA) && DT_HAS_CHOSEN(zephyr_flash_controller))
 #define FLASH_DEVICE_ID SOC_FLASH_0_ID
 #define FLASH_DEVICE_BASE CONFIG_FLASH_BASE_ADDRESS
 #define FLASH_DEVICE_NODE DT_CHOSEN(zephyr_flash_controller)
diff --git a/boot/zephyr/include/mcuboot_config/mcuboot_config.h b/boot/zephyr/include/mcuboot_config/mcuboot_config.h
index fd003565a1..1d0acd0098 100644
--- a/boot/zephyr/include/mcuboot_config/mcuboot_config.h
+++ b/boot/zephyr/include/mcuboot_config/mcuboot_config.h
@@ -134,6 +134,10 @@
 #define IMAGE_EXECUTABLE_RAM_SIZE CONFIG_BOOT_IMAGE_EXECUTABLE_RAM_SIZE
 #endif
 
+#ifdef CONFIG_SOC_SERIES_STM32N6X
+#define MULTIPLE_EXECUTABLE_RAM_REGIONS
+#endif
+
 #ifdef CONFIG_LOG
 #define MCUBOOT_HAVE_LOGGING 1
 #endif
diff --git a/boot/zephyr/ram_load.c b/boot/zephyr/ram_load.c
new file mode 100644
index 0000000000..92d521d809
--- /dev/null
+++ b/boot/zephyr/ram_load.c
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2025 STMicroelectonics
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "../bootutil/include/bootutil/bootutil.h"
+#include "../bootutil/include/bootutil/ramload.h"
+
+#include <zephyr/devicetree.h>
+
+#ifdef MULTIPLE_EXECUTABLE_RAM_REGIONS
+int boot_get_image_exec_ram_info(uint32_t image_id,
+                                 uint32_t *exec_ram_start,
+                                 uint32_t *exec_ram_size)
+{
+
+#ifdef CONFIG_SOC_SERIES_STM32N6X
+    *exec_ram_start = DT_PROP_BY_IDX(DT_NODELABEL(axisram1), reg, 0);
+    *exec_ram_size = DT_PROP_BY_IDX(DT_NODELABEL(axisram1), reg, 1);
+#endif
+
+    return 0;
+}
+#endif /* MULTIPLE_EXECUTABLE_RAM_REGIONS */