From 1d3d70986f97dcc1fce13beddd32b87fef40892d Mon Sep 17 00:00:00 2001 From: James An <94036556+jamesan47@users.noreply.github.com> Date: Tue, 5 Sep 2023 21:42:59 -0700 Subject: [PATCH 01/15] Update cisco-8000.ini (#16387) Why I did it Common Release Notes for 8102-64H, T0/DualTor, and 8101-32FH Fix for an issue where drop counters were incrementing twice for packets with invalid tag Fix for the ECC errors reported in SR 695600099 Fix for fwutil show updates failure How I did it Update platform version to 202205.2.2.11 --- platform/checkout/cisco-8000.ini | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/platform/checkout/cisco-8000.ini b/platform/checkout/cisco-8000.ini index 6abc5f72eb4f..e6ceacf358bc 100644 --- a/platform/checkout/cisco-8000.ini +++ b/platform/checkout/cisco-8000.ini @@ -1,3 +1,3 @@ [module] repo=git@github.com:Cisco-8000-sonic/platform-cisco-8000.git -ref=202205.2.2.10 +ref=202205.2.2.11 From 8cac746a0334273f95046130556e6864fcbd0109 Mon Sep 17 00:00:00 2001 From: mssonicbld <79238446+mssonicbld@users.noreply.github.com> Date: Wed, 6 Sep 2023 12:47:55 +0800 Subject: [PATCH 02/15] Fix openconfig_acl.py (#16303) (#16345) How I did it Fix the regex for L4 port range in openconfig_acl.py. How to verify it Build image and install on Arista-720DT DUT, then try the repro steps in #16189 and confirmed the ACL rule be setup correctly: Co-authored-by: Zhijian Li --- src/sonic-config-engine/openconfig_acl.py | 32 +++++++++++------------ 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/src/sonic-config-engine/openconfig_acl.py b/src/sonic-config-engine/openconfig_acl.py index 5939bce44d6a..1cc9909e65b3 100644 --- a/src/sonic-config-engine/openconfig_acl.py +++ b/src/sonic-config-engine/openconfig_acl.py @@ -2353,9 +2353,9 @@ def __init__(self, *args, **kwargs): self._path_helper = False self._extmethods = False - self.__source_port = YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True) + self.__source_port = YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})\\.\\.(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True) self.__tcp_flags = YANGDynClass(unique=True, base=TypedListType(allowed_type=RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'TCP_FIN': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'TCP_ACK': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'TCP_URG': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_RST': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_SYN': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'TCP_ECE': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_ACK': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'TCP_SYN': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_CWR': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'TCP_CWR': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_URG': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'TCP_RST': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_FIN': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_ECE': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'TCP_PSH': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_PSH': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}},)), is_leaf=False, yang_name="tcp-flags", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=True) - self.__destination_port = YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True) + self.__destination_port = YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})\\.\\.(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True) load = kwargs.pop("load", None) if args: @@ -2405,12 +2405,12 @@ def _set_source_port(self, v, load=False): if hasattr(v, "_utype"): v = v._utype(v) try: - t = YANGDynClass(v,base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True) + t = YANGDynClass(v,base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})\\.\\.(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True) except (TypeError, ValueError): raise ValueError({ 'error-string': """source_port must be of a type compatible with oc-pkt-match-types:port-num-range""", 'defined-type': "oc-pkt-match-types:port-num-range", - 'generated-type': """YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True)""", + 'generated-type': """YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})\\.\\.(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True)""", }) self.__source_port = t @@ -2418,7 +2418,7 @@ def _set_source_port(self, v, load=False): self._set() def _unset_source_port(self): - self.__source_port = YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True) + self.__source_port = YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})\\.\\.(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True) def _get_destination_port(self): @@ -2442,12 +2442,12 @@ def _set_destination_port(self, v, load=False): if hasattr(v, "_utype"): v = v._utype(v) try: - t = YANGDynClass(v,base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True) + t = YANGDynClass(v,base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})\\.\\.(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True) except (TypeError, ValueError): raise ValueError({ 'error-string': """destination_port must be of a type compatible with oc-pkt-match-types:port-num-range""", 'defined-type': "oc-pkt-match-types:port-num-range", - 'generated-type': """YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True)""", + 'generated-type': """YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})\\.\\.(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True)""", }) self.__destination_port = t @@ -2455,7 +2455,7 @@ def _set_destination_port(self, v, load=False): self._set() def _unset_destination_port(self): - self.__destination_port = YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True) + self.__destination_port = YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})\\.\\.(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=True) def _get_tcp_flags(self): @@ -2522,9 +2522,9 @@ def __init__(self, *args, **kwargs): self._path_helper = False self._extmethods = False - self.__source_port = YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False) + self.__source_port = YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})\\.\\.(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False) self.__tcp_flags = YANGDynClass(unique=True, base=TypedListType(allowed_type=RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'TCP_FIN': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'TCP_ACK': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'TCP_URG': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_RST': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_SYN': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'TCP_ECE': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_ACK': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'TCP_SYN': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_CWR': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'TCP_CWR': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_URG': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'TCP_RST': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_FIN': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_ECE': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'TCP_PSH': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}, u'oc-pkt-match-types:TCP_PSH': {u'@namespace': u'http://openconfig.net/yang/packet-match-types', u'@module': u'openconfig-packet-match-types'}},)), is_leaf=False, yang_name="tcp-flags", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='identityref', is_config=False) - self.__destination_port = YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False) + self.__destination_port = YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})\\.\\.(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False) load = kwargs.pop("load", None) if args: @@ -2574,12 +2574,12 @@ def _set_source_port(self, v, load=False): if hasattr(v, "_utype"): v = v._utype(v) try: - t = YANGDynClass(v,base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False) + t = YANGDynClass(v,base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})\\.\\.(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False) except (TypeError, ValueError): raise ValueError({ 'error-string': """source_port must be of a type compatible with oc-pkt-match-types:port-num-range""", 'defined-type': "oc-pkt-match-types:port-num-range", - 'generated-type': """YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False)""", + 'generated-type': """YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})\\.\\.(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False)""", }) self.__source_port = t @@ -2587,7 +2587,7 @@ def _set_source_port(self, v, load=False): self._set() def _unset_source_port(self): - self.__source_port = YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False) + self.__source_port = YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})\\.\\.(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="source-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False) def _get_destination_port(self): @@ -2611,12 +2611,12 @@ def _set_destination_port(self, v, load=False): if hasattr(v, "_utype"): v = v._utype(v) try: - t = YANGDynClass(v,base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False) + t = YANGDynClass(v,base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})\\.\\.(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False) except (TypeError, ValueError): raise ValueError({ 'error-string': """destination_port must be of a type compatible with oc-pkt-match-types:port-num-range""", 'defined-type': "oc-pkt-match-types:port-num-range", - 'generated-type': """YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False)""", + 'generated-type': """YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})\\.\\.(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False)""", }) self.__destination_port = t @@ -2624,7 +2624,7 @@ def _set_destination_port(self, v, load=False): self._set() def _unset_destination_port(self): - self.__destination_port = YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)\\.\\.(6[0-5][0-5][0-3][0-5]|[0-5]?[0-9]?[0-9]?[0-9]?[0-9]?)$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False) + self.__destination_port = YANGDynClass(base=[RestrictedClassType(base_type=six.text_type, restriction_dict={u'pattern': u'^(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})\\.\\.(6553[0-5]|655[0-2][0-9]|65[0-4][0-9]{2}|6[0-4][0-9]{3}|[0-5][0-9]{4}|[0-9]{1,4})$'}),RestrictedClassType(base_type=RestrictedClassType(base_type=int, restriction_dict={'range': ['0..65535']},int_size=16), restriction_dict={u'range': [u'0..65535']}),RestrictedClassType(base_type=six.text_type, restriction_type="dict_key", restriction_arg={u'ANY': {}},),], is_leaf=True, yang_name="destination-port", parent=self, path_helper=self._path_helper, extmethods=self._extmethods, register_paths=True, namespace='http://openconfig.net/yang/acl', defining_module='openconfig-acl', yang_type='oc-pkt-match-types:port-num-range', is_config=False) def _get_tcp_flags(self): From a9564286b298bdeffa437c882b77810f3adaa757 Mon Sep 17 00:00:00 2001 From: mssonicbld <79238446+mssonicbld@users.noreply.github.com> Date: Wed, 6 Sep 2023 12:48:11 +0800 Subject: [PATCH 03/15] [submodule] Update submodule sonic-platform-daemons to the latest HEAD automatically (#16390) src/sonic-platform-daemons * 0258ecf - (HEAD -> 202205, origin/202205) [pmon][chassis][voq] Chassis DB cleanup when module is down (#394) (9 hours ago) [vganesan-nokia] From d5e2c0004f6bd961ac539cf113cac6b36b4c423c Mon Sep 17 00:00:00 2001 From: mssonicbld <79238446+mssonicbld@users.noreply.github.com> Date: Wed, 6 Sep 2023 12:52:38 +0800 Subject: [PATCH 04/15] Assign the higher metric value for Ipv6 default route learnt via RA message (#16367) (#16440) * Fix the Loopback0 IPv6 address of LC's in chassis not reachable from peer device's * Assign the metric vaule for Ipv6 default route learnt via RA message to higher value so that BGP learnt default route is higher priority. Signed-off-by: Abhishek Dosi Co-authored-by: abdosi <58047199+abdosi@users.noreply.github.com> --- files/dhcp/90-dhcp6-systcl.conf.j2 | 1 + 1 file changed, 1 insertion(+) diff --git a/files/dhcp/90-dhcp6-systcl.conf.j2 b/files/dhcp/90-dhcp6-systcl.conf.j2 index addb94675258..13ad9bead9c7 100644 --- a/files/dhcp/90-dhcp6-systcl.conf.j2 +++ b/files/dhcp/90-dhcp6-systcl.conf.j2 @@ -5,3 +5,4 @@ net.ipv6.conf.eth0.accept_ra = 0 net.ipv6.conf.eth0.accept_ra_defrtr = 1 net.ipv6.conf.eth0.accept_ra = 1 {% endif %} +net.ipv6.conf.eth0.ra_defrtr_metric=1996489704 From 89f091eded92dbe100d2ec8cebd1e01ee1a17f49 Mon Sep 17 00:00:00 2001 From: mssonicbld <79238446+mssonicbld@users.noreply.github.com> Date: Wed, 6 Sep 2023 12:53:08 +0800 Subject: [PATCH 05/15] [Mellanox] set select timeout to no more than 1 sec to make sure fast shutdown (#13611) (#16449) - Why I did it Commit sonic-net/sonic-platform-daemons@153ea47 changed SfpStateUpdateTask from Process to Thread. In this commit, it raises an exception in SfpStateUpdateTask to make shutdown flow fast. But it does not work on Nvidia platform as Nvidia platform is passing timeout parameter of get_change_event to select. Linux select function can not be interrupted by a Python exception. There is no such issue on Nvidia platform before that commit. However, in order to comply with the commit and make shutdown flow fast, we decided to change Nvidia platform API implementation. To fix issue #13591. - How I did it The select call in get_change_event should use no more than 1 second as timeout parameter. Outside the select call, add a while loop to make sure timeout parameter of get_change_event work as expected - How to verify it Manual test Co-authored-by: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com> --- .../sonic_platform/chassis.py | 24 +++++++++++-------- 1 file changed, 14 insertions(+), 10 deletions(-) diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py index e13b90d6c0ca..17d66b2e8f64 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/chassis.py @@ -31,10 +31,10 @@ from . import utils from .device_data import DeviceDataManager import re + import time except ImportError as e: raise ImportError (str(e) + "- required module not found") -MAX_SELECT_DELAY = 3600 RJ45_TYPE = "RJ45" @@ -387,26 +387,30 @@ def get_change_event(self, timeout=0): self.sfp_event.initialize() wait_for_ever = (timeout == 0) + # select timeout should be no more than 1000ms to ensure fast shutdown flow + select_timeout = 1000.0 if timeout >= 1000 else float(timeout) port_dict = {} error_dict = {} - if wait_for_ever: - timeout = MAX_SELECT_DELAY - while True: - status = self.sfp_event.check_sfp_status(port_dict, error_dict, timeout) - if bool(port_dict): + begin = time.time() + while True: + status = self.sfp_event.check_sfp_status(port_dict, error_dict, select_timeout) + if bool(port_dict): + break + + if not wait_for_ever: + elapse = time.time() - begin + if elapse * 1000 > timeout: break - else: - status = self.sfp_event.check_sfp_status(port_dict, error_dict, timeout) if status: if port_dict: self.reinit_sfps(port_dict) - result_dict = {'sfp':port_dict} + result_dict = {'sfp': port_dict} if error_dict: result_dict['sfp_error'] = error_dict return True, result_dict else: - return True, {'sfp':{}} + return True, {'sfp': {}} def reinit_sfps(self, port_dict): """ From 07955af2ed11fe827742e2f29ada7d6674df7d53 Mon Sep 17 00:00:00 2001 From: mssonicbld <79238446+mssonicbld@users.noreply.github.com> Date: Wed, 6 Sep 2023 12:54:50 +0800 Subject: [PATCH 06/15] [ci/build]: Upgrade SONiC package versions (#16316) --- files/build/versions/default/versions-git | 14 ++++++------- files/build/versions/default/versions-mirror | 20 +++++++++---------- files/build/versions/default/versions-web | 6 +++--- .../docker-fpm-frr/versions-deb-bullseye | 2 +- .../versions-deb-bullseye | 2 +- .../versions-deb-bullseye | 14 ++++++------- .../versions-deb-bullseye-armhf | 2 +- .../sonic-slave-buster/versions-deb-buster | 2 +- .../versions/host-image/versions-deb-bullseye | 8 ++++---- 9 files changed, 35 insertions(+), 35 deletions(-) diff --git a/files/build/versions/default/versions-git b/files/build/versions/default/versions-git index dc5c78640e45..0eb232775ffa 100644 --- a/files/build/versions/default/versions-git +++ b/files/build/versions/default/versions-git @@ -1,24 +1,24 @@ -https://chromium.googlesource.com/chromium/tools/depot_tools.git==b8164180d2c339940c99db74344c865e67ca064d +https://chromium.googlesource.com/chromium/tools/depot_tools.git==6715758ed9edd09608215e9759afed741e1488b4 https://github.com/aristanetworks/swi-tools.git==b5f087e4774168bf536360d43c9c509c8f14ad9f https://github.com/CESNET/libyang.git==8b0b910a2dcb7360cb5b0aaefbd1338271d50946 https://github.com/daveolson53/audisp-tacplus.git==559c9f22edd4f2dea0ecedffb3ad9502b12a75b6 https://github.com/daveolson53/libnss-tacplus.git==19008ab68d9d504aa58eb34d5f564755a1613b8b https://github.com/dyninc/OpenBFDD.git==e35f43ad8d2b3f084e96a84c392528a90d05a287 -https://github.com/flashrom/flashrom.git==d534100c0503bc9ff47d95456ceabbe644929b5d -https://github.com/FreeRADIUS/freeradius-server.git==65cfcde28ffee5cfb246c43c33f9271473515f87 +https://github.com/flashrom/flashrom.git==761746754484843c41a2fc1d672e8848cc7afa6a +https://github.com/FreeRADIUS/freeradius-server.git==bdbaffa3d475185eb8e2fbb7c84d733c6486003d https://github.com/FreeRADIUS/pam_radius.git==7d75a319e43d5e234b93f89cd461a11861d07b95 https://github.com/jeroennijhof/pam_tacplus.git==4284d9016e64def2bb81d5f50f96dc3b59bfdc39 https://github.com/jpirko/libteam.git==7cb5de8b01be132bd4150eff460bfd83296414b6 https://github.com/lguohan/gnxi.git==b85e4ab565df4472fdcfcded2a53e6bf57aa493f https://github.com/Marvell-switching/mrvl-prestera.git==63118c2a6b627e543f5556baa27eee1ec6cd7a2b https://github.com/Mellanox/libpsample.git==62bb27d9a49424e45191eee81df7ce0d8c74e774 -https://github.com/opencomputeproject/SAI.git==f5e1591e80fd1e92212aeddc688b38c1862331e3 +https://github.com/opencomputeproject/SAI.git==4cb229c2d55cbe36c2ac10204d1fe4476f4937bd https://github.com/p4lang/scapy-vxlan.git==85ffe83da156568ee47a0750f638227e6e1d7479 -https://github.com/sflow/host-sflow==b9a0015e65f4e0274b9a4904f141867cf2f8ef97 +https://github.com/sflow/host-sflow==3b1463ae0732a1c264e2f79592aed9e5856f8dc1 https://github.com/sflow/sflowtool==219ab50bcfd9d9e714ff169eec31b2625933acb5 -https://github.com/thom311/libnl==0f60ab3917dae704b6bc889b45a25e932f4cbc3a +https://github.com/thom311/libnl==052a97cb6554386c70d531e7c1b34a6afa1dbeb0 https://salsa.debian.org/debian/libteam.git==48142125234a665ad5367b724af36a58fb484d3d https://salsa.debian.org/kernel-team/ethtool/==d0578651310379629399dde060577d4b9b0bcab1 https://salsa.debian.org/kernel-team/initramfs-tools.git==cf964bfb4362019fd7fba1e839e403ff950dca8e https://salsa.debian.org/sk-guest/monit.git==c9da7ebb1f35dfba17b50b5969a6e75e29cbec0d -https://salsa.debian.org/ssh-team/openssh.git==d9a514f93f17d22766cfe760e25254ef13cb5eb1 \ No newline at end of file +https://salsa.debian.org/ssh-team/openssh.git==2b4ef335ae2ef4e1fe846b92c7047754aa706539 \ No newline at end of file diff --git a/files/build/versions/default/versions-mirror b/files/build/versions/default/versions-mirror index 129e2d21f545..05568afef756 100644 --- a/files/build/versions/default/versions-mirror +++ b/files/build/versions/default/versions-mirror @@ -1,15 +1,15 @@ deb.nodesource.com_node%5f14.x_dists_bullseye==2023-02-17T00:35:28Z deb.nodesource.com_node%5f14.x_dists_buster==2023-02-17T00:35:28Z -debian==20230827T000225Z -debian-security==20230827T000228Z +debian==20230905T000218Z +debian-security==20230905T000208Z download.docker.com_linux_debian_dists_bullseye==2023-07-31T14:38:46Z download.docker.com_linux_debian_dists_buster==2023-07-31T14:38:46Z packages.microsoft.com_repos_sonic-dev_dists_jessie==2022-10-31T19:34:29Z -packages.trafficmanager.net_snapshot_debian-security_20230827T000228Z_dists_bullseye-security==2023-08-26T20:02:54Z -packages.trafficmanager.net_snapshot_debian-security_20230827T000228Z_dists_buster_updates==2023-08-26T20:02:54Z -packages.trafficmanager.net_snapshot_debian_20230827T000225Z_dists_bullseye==2023-06-10T08:52:21Z -packages.trafficmanager.net_snapshot_debian_20230827T000225Z_dists_bullseye-backports==2023-08-26T20:19:59Z -packages.trafficmanager.net_snapshot_debian_20230827T000225Z_dists_bullseye-updates==2023-08-26T20:19:59Z -packages.trafficmanager.net_snapshot_debian_20230827T000225Z_dists_buster==2023-06-10T08:53:33Z -packages.trafficmanager.net_snapshot_debian_20230827T000225Z_dists_buster-backports==2023-08-26T20:19:59Z -packages.trafficmanager.net_snapshot_debian_20230827T000225Z_dists_buster-updates==2023-06-10T08:55:10Z \ No newline at end of file +packages.trafficmanager.net_snapshot_debian-security_20230905T000208Z_dists_bullseye-security==2023-09-04T19:44:45Z +packages.trafficmanager.net_snapshot_debian-security_20230905T000208Z_dists_buster_updates==2023-09-04T19:44:45Z +packages.trafficmanager.net_snapshot_debian_20230905T000218Z_dists_bullseye==2023-06-10T08:52:21Z +packages.trafficmanager.net_snapshot_debian_20230905T000218Z_dists_bullseye-backports==2023-09-04T20:16:10Z +packages.trafficmanager.net_snapshot_debian_20230905T000218Z_dists_bullseye-updates==2023-09-04T20:16:09Z +packages.trafficmanager.net_snapshot_debian_20230905T000218Z_dists_buster==2023-06-10T08:53:33Z +packages.trafficmanager.net_snapshot_debian_20230905T000218Z_dists_buster-backports==2023-09-04T20:16:10Z +packages.trafficmanager.net_snapshot_debian_20230905T000218Z_dists_buster-updates==2023-06-10T08:55:10Z \ No newline at end of file diff --git a/files/build/versions/default/versions-web b/files/build/versions/default/versions-web index a1c5e90d8fe6..5af29e1ad41f 100644 --- a/files/build/versions/default/versions-web +++ b/files/build/versions/default/versions-web @@ -32,7 +32,7 @@ https://deb.debian.org/debian/pool/main/k/kdump-tools/kdump-tools_1.6.8.4.tar.xz https://deb.nodesource.com/gpgkey/nodesource.gpg.key==003b51a89a133b5db4cca98b2dea3117 https://deb.nodesource.com/node_14.x/dists/bullseye/Release==6b7d50c433d129d4c6fd95bdf56070fa https://deb.nodesource.com/node_14.x/dists/buster/Release==42875141604382f0abb4d047f645dfe1 -https://deb.nodesource.com/setup_14.x==472c9614e7c6dd029f205890ed356a22 +https://deb.nodesource.com/setup_14.x==c30873f4a513bb935afaf8f65e7de9e1 https://download.docker.com/linux/debian/gpg==1afae06b34a13c1b3d9cb61a26285a15 https://github.com/aristanetworks/sonic-firmware/raw/446f30ccd8626f904d89d5798da7294948e090a6/phy/phy-credo_1.0_amd64.deb==6c3d6c32477615cbe049b9161ce15bd5 https://github.com/barefootnetworks/sonic-release-pkgs/raw/dev/bfnplatform_20220408_sai_1.9.1_deb10.deb==890a53ca1374dfcf8c12091d74fd2ef8 @@ -67,7 +67,7 @@ https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/sd https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/sdk-4.5.4206-bullseye-amd64/sxd-libs_1.mlnx.4.5.4206_amd64.deb==e641d556c8a63be9c835fd7da5fda49d https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/sdk-4.5.4206-bullseye-amd64/wjh-libs-dev_1.mlnx.4.5.4206_amd64.deb==dbb74e081196bcb66f31c579974dcbec https://github.com/Mellanox/Spectrum-SDK-Drivers-SONiC-Bins/releases/download/sdk-4.5.4206-bullseye-amd64/wjh-libs_1.mlnx.4.5.4206_amd64.deb==b1d66ada73cd89ab967d387a2343e3c3 -https://github.com/Mellanox/Spectrum-SDK-Drivers/archive/refs/heads/4.5.4206.zip==3133c519712be3804bc2c6a8085945cb +https://github.com/Mellanox/Spectrum-SDK-Drivers/archive/refs/heads/4.5.4206.zip==4023e1caab572dfd1c80f9a9ed1087cc https://github.com/nanomsg/nanomsg/archive/1.0.0.tar.gz==6f56ef28c93cee644e8c4aaaef7cfb55 https://launchpad.net/debian/+archive/primary/+sourcefiles/bash/5.1-2/bash_5.1-2.debian.tar.xz==9d0cbd5f463f461c840c95f62a64d61b https://launchpad.net/debian/+archive/primary/+sourcefiles/bash/5.1-2/bash_5.1-2.dsc==be44c5a9fc12fb567a486f54b842dd9e @@ -149,7 +149,7 @@ https://sonicstorage.blob.core.windows.net/public/fips/bullseye/0.8/arm64/symcry https://sonicstorage.blob.core.windows.net/public/sai/bcmpai/REL_3.8/3.8/libsaibroncos_3.8_amd64.deb==f7c3f0ed8c97c2572e3c2e59faaae4a8 https://sonicstorage.blob.core.windows.net/public/sai/bcmsai/REL_7.0_202205/7.1.54.4-3/libsaibcm-dev_7.1.54.4-3_amd64.deb==f24f6dd832601f2fd17cde874863215b https://sonicstorage.blob.core.windows.net/public/sai/bcmsai/REL_7.0_202205/7.1.54.4-3/libsaibcm_7.1.54.4-3_amd64.deb==65c8916ec6b4355be4b5f8a9b3526c6c -https://sonicstorage.blob.core.windows.net/public/sai/bcmsai/REL_7.0_202205/7.1.54.4/libsaibcm_dnx_7.1.54.4_amd64.deb==fd1df3f08d48e8dd7c68dddfbe828fac +https://sonicstorage.blob.core.windows.net/public/sai/bcmsai/REL_7.0_202205/7.1.60.4/libsaibcm_dnx_7.1.60.4_amd64.deb==3c9c74a2b25997c6665b3cffac015129 https://storage.googleapis.com/golang/go1.14.2.linux-amd64.tar.gz==856d248e3ea8a287d13e5f6afd086282 https://storage.googleapis.com/golang/go1.14.2.linux-arm64.tar.gz==e5f79b403701e00f20d13f0ea561b064 https://storage.googleapis.com/golang/go1.14.2.linux-armv6l.tar.gz==04467414e783b18de4278e9f24baf4be \ No newline at end of file diff --git a/files/build/versions/dockers/docker-fpm-frr/versions-deb-bullseye b/files/build/versions/dockers/docker-fpm-frr/versions-deb-bullseye index 3ff04f1db4df..8bdc9a32b99f 100644 --- a/files/build/versions/dockers/docker-fpm-frr/versions-deb-bullseye +++ b/files/build/versions/dockers/docker-fpm-frr/versions-deb-bullseye @@ -19,7 +19,7 @@ libgpm2==1.20.7-8 libhiredis0.14-dbgsym==0.14.1-1 libicu67==67.1-7 libipt2==2.0.3-1 -libjson-c5==0.15-2 +libjson-c5==0.15-2+deb11u1 libmpfr6==4.1.0-3 libpci3==1:3.7.0-5 libpopt0==1.18-2 diff --git a/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye b/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye index e13add5aaaf5..813185434d32 100644 --- a/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye +++ b/files/build/versions/dockers/docker-syncd-brcm-dnx/versions-deb-bullseye @@ -17,7 +17,7 @@ libicu67==67.1-7 libipt2==2.0.3-1 libkmod2==28-1 libmpfr6==4.1.0-3 -libsaibcm==7.1.54.4 +libsaibcm==7.1.60.4 libsaimetadata==1.0.0 libsaimetadata-dbg==1.0.0 libsairedis==1.0.0 diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye index 55f9cad5dd34..492d8a5c58da 100644 --- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye +++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye @@ -116,7 +116,7 @@ exim4-config==4.94.2-7 exim4-daemon-light==4.94.2-7 expat==2.2.10-2+deb11u5 fakeroot==1.25.3-1.1 -file==1:5.39-3 +file==1:5.39-3+deb11u1 flex==2.6.4-8 fontconfig==2.13.1-4.2 fontconfig-config==2.13.1-4.2 @@ -725,8 +725,8 @@ libjs-popper.js==1.16.1+ds-3 libjs-sizzle==2.3.5+ds-2 libjs-sphinxdoc==3.4.3-2 libjs-underscore==1.9.1~dfsg-3 -libjson-c-dev==0.15-2 -libjson-c5==0.15-2 +libjson-c-dev==0.15-2+deb11u1 +libjson-c5==0.15-2+deb11u1 libjson-glib-1.0-0==1.6.2-1 libjson-glib-1.0-common==1.6.2-1 libjson-maybexs-perl==1.004003-1 @@ -780,8 +780,8 @@ liblwp-protocol-https-perl==6.10-1 liblzma-dev==5.2.5-2.1~deb11u1 liblzo2-2==2.10-2 liblzo2-dev==2.10-2 -libmagic-mgc==1:5.39-3 -libmagic1==1:5.39-3 +libmagic-mgc==1:5.39-3+deb11u1 +libmagic1==1:5.39-3+deb11u1 libmagickcore-6.q16-6==8:6.9.11.60+dfsg-1.3+deb11u1 libmagickcore-6.q16-6-extra==8:6.9.11.60+dfsg-1.3+deb11u1 libmagickwand-6.q16-6==8:6.9.11.60+dfsg-1.3+deb11u1 @@ -1045,8 +1045,8 @@ librhash0==1.4.1-2 librole-tiny-perl==2.002004-1 librrd-dev==1.7.2-3+b7 librrd8==1.7.2-3+b7 -librsvg2-2==2.50.3+dfsg-1 -librsvg2-common==2.50.3+dfsg-1 +librsvg2-2==2.50.3+dfsg-1+deb11u1 +librsvg2-common==2.50.3+dfsg-1+deb11u1 librtmp1==2.4+20151223.gitfa8646d.1-2+b2 librubberband2==1.9.0-1 libruby2.7==2.7.4-1+deb11u1 diff --git a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf index 792c04c25dec..32bc5610c414 100644 --- a/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf +++ b/files/build/versions/dockers/sonic-slave-bullseye/versions-deb-bullseye-armhf @@ -6,7 +6,7 @@ dvipng==1.15-1.1 faketime==0.9.8-9 gir1.2-nautilus-3.0==3.38.2-1+deb11u1 gir1.2-poppler-0.18==20.09.0-3.1+deb11u1 -gir1.2-rsvg-2.0==2.50.3+dfsg-1 +gir1.2-rsvg-2.0==2.50.3+dfsg-1+deb11u1 golang-1.15-go==1.15.15-1~deb11u4 golang-1.15-src==1.15.15-1~deb11u4 libclang-11-dev==1:11.0.1-2 diff --git a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster index e26dc94357e4..0b5940ecd95c 100644 --- a/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster +++ b/files/build/versions/dockers/sonic-slave-buster/versions-deb-buster @@ -180,7 +180,7 @@ gsfonts==1:8.11+urwcyr1.0.7~pre44-4.4 gstreamer1.0-libav==1.15.0.1+git20180723+db823502-2+deb10u1 gstreamer1.0-plugins-base==1.14.4-2+deb10u2 gstreamer1.0-plugins-good==1.14.4-1+deb10u3 -gstreamer1.0-plugins-ugly==1.14.4-1+deb10u1 +gstreamer1.0-plugins-ugly==1.14.4-1+deb10u2 gstreamer1.0-x==1.14.4-2+deb10u2 gtk-update-icon-cache==3.24.5-1 guile-2.0-libs==2.0.13+1-5.1 diff --git a/files/build/versions/host-image/versions-deb-bullseye b/files/build/versions/host-image/versions-deb-bullseye index efccdc2207f6..49be35e23fc6 100644 --- a/files/build/versions/host-image/versions-deb-bullseye +++ b/files/build/versions/host-image/versions-deb-bullseye @@ -39,7 +39,7 @@ eatmydata==105-9 ebtables==2.0.11-4+b1 efibootmgr==17-1 fdisk==2.36.1-8+deb11u1 -file==1:5.39-3 +file==1:5.39-3+deb11u1 firmware-amd-graphics==20210315-3 firmware-linux-nonfree==20210315-3 firmware-misc-nonfree==20210315-3 @@ -185,7 +185,7 @@ libjq1==1.6-2.1 libjs-jquery==3.5.1+dfsg+~3.5.5-7 libjs-sphinxdoc==3.4.3-2 libjs-underscore==1.9.1~dfsg-3 -libjson-c5==0.15-2 +libjson-c5==0.15-2+deb11u1 libklibc==2.0.8-6.1 libkmod2==28-1 libksba8==1.5.0-3+deb11u2 @@ -193,8 +193,8 @@ libldap-2.4-2==2.4.57+dfsg-3+deb11u1 liblognorm5==2.0.5-1.1 liblsan0==10.2.1-6 liblzo2-2==2.10-2 -libmagic-mgc==1:5.39-3 -libmagic1==1:5.39-3 +libmagic-mgc==1:5.39-3+deb11u1 +libmagic1==1:5.39-3+deb11u1 libmd0==1.0.3-3 libmnl0==1.0.4-3 libmount-dev==2.36.1-8+deb11u1 From 0fe5c9fc7d361e7661210b74ebb7d9a9acf0b5b5 Mon Sep 17 00:00:00 2001 From: mssonicbld <79238446+mssonicbld@users.noreply.github.com> Date: Thu, 7 Sep 2023 00:49:58 +0800 Subject: [PATCH 07/15] [platform]: Disable interrupt for intel i2c-i801 driver (#16309) (#16457) On S6100 we are seeing almost 100K interrupts per second on intels i801 SMBUS controller which affects systems performance. We now disable the i801 driver interrupt and instead enable polling Microsoft ADO (number only): 24910530 How I did it Disable the interrupt by passing the interrupt disable feature argument to i2c-i801 driver How to verify it This fix is NOT applicable for ARM based platforms. Applicable only for intel based platforms:- - On SN2700 its already disabled in Mellanox hw-mgmt - Celestica DX010 and E1031 - Dell S6100 verified the interrupts are no longer incrementing. - Arista 7260CX3 Signed-off-by: Prince George Co-authored-by: Prince George <45705344+prgeor@users.noreply.github.com> --- device/celestica/x86_64-cel_e1031-r0/installer.conf | 2 +- device/celestica/x86_64-cel_seastone-r0/installer.conf | 2 +- device/dell/x86_64-dell_s6100_c2538-r0/installer.conf | 2 +- files/Aboot/boot0.j2 | 1 + 4 files changed, 4 insertions(+), 3 deletions(-) diff --git a/device/celestica/x86_64-cel_e1031-r0/installer.conf b/device/celestica/x86_64-cel_e1031-r0/installer.conf index 4da96f0604f1..39d9a84c242b 100644 --- a/device/celestica/x86_64-cel_e1031-r0/installer.conf +++ b/device/celestica/x86_64-cel_e1031-r0/installer.conf @@ -1,4 +1,4 @@ CONSOLE_PORT=0x2f8 CONSOLE_DEV=1 CONSOLE_SPEED=9600 -ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich processor.max_cstate=1 intel_idle.max_cstate=0" +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich processor.max_cstate=1 intel_idle.max_cstate=0 i2c-i801.disable_features=0x10" \ No newline at end of file diff --git a/device/celestica/x86_64-cel_seastone-r0/installer.conf b/device/celestica/x86_64-cel_seastone-r0/installer.conf index 456a3ae8f4eb..ae006d821862 100644 --- a/device/celestica/x86_64-cel_seastone-r0/installer.conf +++ b/device/celestica/x86_64-cel_seastone-r0/installer.conf @@ -1,3 +1,3 @@ CONSOLE_PORT=0x3f8 CONSOLE_DEV=0 -ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich" \ No newline at end of file +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich i2c-i801.disable_features=0x10" \ No newline at end of file diff --git a/device/dell/x86_64-dell_s6100_c2538-r0/installer.conf b/device/dell/x86_64-dell_s6100_c2538-r0/installer.conf index be208a15c691..6ce0ab077f03 100644 --- a/device/dell/x86_64-dell_s6100_c2538-r0/installer.conf +++ b/device/dell/x86_64-dell_s6100_c2538-r0/installer.conf @@ -1,3 +1,3 @@ CONSOLE_PORT=0x2f8 CONSOLE_DEV=1 -ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich,wdat_wdt acpi_no_watchdog=1 nos-config-part=/dev/sda12 logs_inram=on" \ No newline at end of file +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="module_blacklist=gpio_ich,wdat_wdt acpi_no_watchdog=1 nos-config-part=/dev/sda12 logs_inram=on i2c-i801.disable_features=0x10" \ No newline at end of file diff --git a/files/Aboot/boot0.j2 b/files/Aboot/boot0.j2 index b00ff199e13c..f32081d3a604 100644 --- a/files/Aboot/boot0.j2 +++ b/files/Aboot/boot0.j2 @@ -504,6 +504,7 @@ write_platform_specific_cmdline() { aboot_machine=arista_7260cx3_64 flash_size=28000 cmdline_add logs_inram=on + cmdline_add i2c-i801.disable_features=0x10 fi if [ "$sid" = "Alhambra" ]; then aboot_machine=arista_7170_64c From 624a5d489f4c9794d1db02622960a1ad31174fa7 Mon Sep 17 00:00:00 2001 From: mssonicbld <79238446+mssonicbld@users.noreply.github.com> Date: Thu, 7 Sep 2023 07:08:27 +0800 Subject: [PATCH 08/15] [Mellanox] Revise label name and fix typo in sensor.conf of 4600C (#16271) (#16467) - Why I did it Revise lable name and fix typo in sensor.conf of 4600C - How I did it Revise lable name and fix typo in sensor.conf of 4600C - How to verify it Manual test sonic-mgmt test_sensors.py Co-authored-by: Junchao-Mellanox <57339448+Junchao-Mellanox@users.noreply.github.com> --- .../sensors_respin.conf | 206 +++++++++--------- 1 file changed, 105 insertions(+), 101 deletions(-) diff --git a/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf b/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf index e6890eb1cf10..caaa42ac04c3 100644 --- a/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf +++ b/device/mellanox/x86_64-mlnx_msn4600c-r0/sensors_respin.conf @@ -1,5 +1,5 @@ ## -## Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. +## Copyright (c) 2022 - 2023 NVIDIA CORPORATION & AFFILIATES. ## Apache-2.0 ## ## Licensed under the Apache License, Version 2.0 (the "License"); @@ -34,19 +34,19 @@ bus "i2c-15" "i2c-1-mux (chan_id 6)" bus "i2c-5" "i2c-1-mux (chan_id 4)" chip "xdpe12284-i2c-*-62" label in1 "PMIC-1 PSU 12V Rail (in1)" - ignore in2 + ignore in2 label in3 "PMIC-1 ASIC VCORE_MAIN Rail (out1)" - ignore in4 + ignore in4 label temp1 "PMIC-1 ASIC VCORE_MAIN Temp 1" - ignore temp2 + ignore temp2 label power1 "PMIC-1 12V ASIC VCORE_MAIN Rail Pwr (in)" - ignore power2 + ignore power2 label power3 "PMIC-1 ASIC VCORE_MAIN Rail Pwr (out1)" - ignore power4 + ignore power4 label curr1 "PMIC-1 12V ASIC VCORE_MAIN Rail Curr (in1)" - ignore curr2 + ignore curr2 label curr3 "PMIC-1 ASIC VCORE_MAIN Rail Curr (out1)" - ignore curr4 + ignore curr4 chip "xdpe12284-i2c-*-64" label in1 "PMIC-2 PSU 12V Rail (in1)" label in2 "PMIC-2 PSU 12V Rail (in2)" @@ -55,7 +55,7 @@ bus "i2c-5" "i2c-1-mux (chan_id 4)" label temp1 "PMIC-2 ASIC 1.8V_MAIN Temp 1" label temp2 "PMIC-2 ASIC 1.2V_MAIN Temp 2" label power1 "PMIC-2 12V ASIC 1.8V_1.2V_MAIN Rail Pwr (in)" - ignore power2 + ignore power2 label power3 "PMIC-2 ASIC 1.8V_MAIN Rail Pwr (out1)" label power4 "PMIC-2 ASIC 1.2V_MAIN Rail Pwr (out2)" label curr1 "PMIC-2 12V ASIC 1.8V_MAIN Rail Curr (in1)" @@ -64,92 +64,92 @@ bus "i2c-5" "i2c-1-mux (chan_id 4)" label curr4 "PMIC-2 ASIC 1.2V_MAIN Rail Curr (out2)" chip "xdpe12284-i2c-*-66" label in1 "PMIC-3 PSU 12V Rail (in1)" - label in2 "PMIC-2 PSU 12V Rail (in2)" + label in2 "PMIC-3 PSU 12V Rail (in2)" label in3 "PMIC-3 ASIC VCORE_T0_1 Rail (out1)" label in4 "PMIC-3 ASIC 1.8V_T0_1 Rail (out2)" label temp1 "PMIC-3 ASIC VCORE_T0_1 Temp 1" label temp2 "PMIC-3 ASIC 1.8V_T0_1 Temp 2" label power1 "PMIC-3 12V ASIC VCORE_1.8V_T0_1 Rail Pwr (in) " - ignore power2 - label power3 "PMIC-2 ASIC VCORE_T0_1 Rail Pwr (out1)" - label power4 "PMIC-2 ASIC 1.8V_T0_1 Rail Pwr (out2)" - label curr1 "PMIC-2 12V ASIC VCORE_T0_1 Rail Curr (in1)" - label curr2 "PMIC-2 12V ASIC 1.8V_T0_1 Rail Curr (in2)" - label curr3 "PMIC-2 ASIC VCORE_T0_1 Rail Curr (out1)" - label curr4 "PMIC-2 ASIC 1.8V_T0_1 Rail Curr (out2)" + ignore power2 + label power3 "PMIC-3 ASIC VCORE_T0_1 Rail Pwr (out1)" + label power4 "PMIC-3 ASIC 1.8V_T0_1 Rail Pwr (out2)" + label curr1 "PMIC-3 12V ASIC VCORE_T0_1 Rail Curr (in1)" + label curr2 "PMIC-3 12V ASIC 1.8V_T0_1 Rail Curr (in2)" + label curr3 "PMIC-3 ASIC VCORE_T0_1 Rail Curr (out1)" + label curr4 "PMIC-3 ASIC 1.8V_T0_1 Rail Curr (out2)" chip "xdpe12284-i2c-*-68" - label in1 "PMIC-3 PSU 12V Rail (in1)" - label in2 "PMIC-2 PSU 12V Rail (in2)" - label in3 "PMIC-3 ASIC VCORE_T2_3 Rail (out1)" - label in4 "PMIC-3 ASIC 1.8V_T2_3 Rail (out2)" - label temp1 "PMIC-3 ASIC VCORE_T2_3 Temp 1" - label temp2 "PMIC-3 ASIC 1.8V_T2_3 Temp 2" - label power1 "PMIC-3 12V ASIC VCORE_1.8V_T2_3 Rail Pwr (in) " - ignore power2 - label power3 "PMIC-2 ASIC VCORE_T2_3 Rail Pwr (out1)" - label power4 "PMIC-2 ASIC 1.8V_T2_3 Rail Pwr (out2)" - label curr1 "PMIC-2 12V ASIC VCORE_T2_3 Rail Curr (in1)" - label curr2 "PMIC-2 12V ASIC 1.8V_T2_3 Rail Curr (in2)" - label curr3 "PMIC-2 ASIC VCORE_T2_3 Rail Curr (out1)" - label curr4 "PMIC-2 ASIC 1.8V_T2_3 Rail Curr (out2)" + label in1 "PMIC-4 PSU 12V Rail (in1)" + label in2 "PMIC-4 PSU 12V Rail (in2)" + label in3 "PMIC-4 ASIC VCORE_T2_3 Rail (out1)" + label in4 "PMIC-4 ASIC 1.8V_T2_3 Rail (out2)" + label temp1 "PMIC-4 ASIC VCORE_T2_3 Temp 1" + label temp2 "PMIC-4 ASIC 1.8V_T2_3 Temp 2" + label power1 "PMIC-4 12V ASIC VCORE_1.8V_T2_3 Rail Pwr (in) " + ignore power2 + label power3 "PMIC-4 ASIC VCORE_T2_3 Rail Pwr (out1)" + label power4 "PMIC-4 ASIC 1.8V_T2_3 Rail Pwr (out2)" + label curr1 "PMIC-4 12V ASIC VCORE_T2_3 Rail Curr (in1)" + label curr2 "PMIC-4 12V ASIC 1.8V_T2_3 Rail Curr (in2)" + label curr3 "PMIC-4 ASIC VCORE_T2_3 Rail Curr (out1)" + label curr4 "PMIC-4 ASIC 1.8V_T2_3 Rail Curr (out2)" chip "xdpe12284-i2c-*-6a" - label in1 "PMIC-3 PSU 12V Rail (in1)" - label in2 "PMIC-2 PSU 12V Rail (in2)" - label in3 "PMIC-3 ASIC VCORE_T4_5 Rail (out1)" - label in4 "PMIC-3 ASIC 1.8V_T4_5 Rail (out2)" - label temp1 "PMIC-3 ASIC VCORE_T4_5 Temp 1" - label temp2 "PMIC-3 ASIC 1.8V_T4_5 Temp 2" - label power1 "PMIC-3 12V ASIC VCORE_1.8V_T4_5 Rail Pwr (in) " - ignore power2 - label power3 "PMIC-2 ASIC VCORE_T4_5 Rail Pwr (out1)" - label power4 "PMIC-2 ASIC 1.8V_T4_5 Rail Pwr (out2)" - label curr1 "PMIC-2 12V ASIC VCORE_T4_5 Rail Curr (in1)" - label curr2 "PMIC-2 12V ASIC 1.8V_T4_5 Rail Curr (in2)" - label curr3 "PMIC-2 ASIC VCORE_T4_5 Rail Curr (out1)" - label curr4 "PMIC-2 ASIC 1.8V_T4_5 Rail Curr (out2)" + label in1 "PMIC-5 PSU 12V Rail (in1)" + label in2 "PMIC-5 PSU 12V Rail (in2)" + label in3 "PMIC-5 ASIC VCORE_T4_5 Rail (out1)" + label in4 "PMIC-5 ASIC 1.8V_T4_5 Rail (out2)" + label temp1 "PMIC-5 ASIC VCORE_T4_5 Temp 1" + label temp2 "PMIC-5 ASIC 1.8V_T4_5 Temp 2" + label power1 "PMIC-5 12V ASIC VCORE_1.8V_T4_5 Rail Pwr (in) " + ignore power2 + label power3 "PMIC-5 ASIC VCORE_T4_5 Rail Pwr (out1)" + label power4 "PMIC-5 ASIC 1.8V_T4_5 Rail Pwr (out2)" + label curr1 "PMIC-5 12V ASIC VCORE_T4_5 Rail Curr (in1)" + label curr2 "PMIC-5 12V ASIC 1.8V_T4_5 Rail Curr (in2)" + label curr3 "PMIC-5 ASIC VCORE_T4_5 Rail Curr (out1)" + label curr4 "PMIC-5 ASIC 1.8V_T4_5 Rail Curr (out2)" chip "xdpe12284-i2c-*-6c" - label in1 "PMIC-3 PSU 12V Rail (in1)" - label in2 "PMIC-2 PSU 12V Rail (in2)" - label in3 "PMIC-3 ASIC VCORE_T6_7 Rail (out1)" - label in4 "PMIC-3 ASIC 1.8V_T6_7 Rail (out2)" - label temp1 "PMIC-3 ASIC VCORE_T6_7 Temp 1" - label temp2 "PMIC-3 ASIC 1.8V_T6_7 Temp 2" - label power1 "PMIC-3 12V ASIC VCORE_1.8V_T6_7 Rail Pwr (in) " - ignore power2 - label power3 "PMIC-2 ASIC VCORE_T6_7 Rail Pwr (out1)" - label power4 "PMIC-2 ASIC 1.8V_T6_7 Rail Pwr (out2)" - label curr1 "PMIC-2 12V ASIC VCORE_T6_7 Rail Curr (in1)" - label curr2 "PMIC-2 12V ASIC 1.8V_T6_7 Rail Curr (in2)" - label curr3 "PMIC-2 ASIC VCORE_T6_7 Rail Curr (out1)" - label curr4 "PMIC-2 ASIC 1.8V_T6_7 Rail Curr (out2)" + label in1 "PMIC-6 PSU 12V Rail (in1)" + label in2 "PMIC-6 PSU 12V Rail (in2)" + label in3 "PMIC-6 ASIC VCORE_T6_7 Rail (out1)" + label in4 "PMIC-6 ASIC 1.8V_T6_7 Rail (out2)" + label temp1 "PMIC-6 ASIC VCORE_T6_7 Temp 1" + label temp2 "PMIC-6 ASIC 1.8V_T6_7 Temp 2" + label power1 "PMIC-6 12V ASIC VCORE_1.8V_T6_7 Rail Pwr (in) " + ignore power2 + label power3 "PMIC-6 ASIC VCORE_T6_7 Rail Pwr (out1)" + label power4 "PMIC-6 ASIC 1.8V_T6_7 Rail Pwr (out2)" + label curr1 "PMIC-6 12V ASIC VCORE_T6_7 Rail Curr (in1)" + label curr2 "PMIC-6 12V ASIC 1.8V_T6_7 Rail Curr (in2)" + label curr3 "PMIC-6 ASIC VCORE_T6_7 Rail Curr (out1)" + label curr4 "PMIC-6 ASIC 1.8V_T6_7 Rail Curr (out2)" chip "xdpe12284-i2c-*-6e" - label in1 "PMIC-3 PSU 12V Rail (in1)" - label in2 "PMIC-2 PSU 12V Rail (in2)" - label in3 "PMIC-3 ASIC 1.2V_T0_3 Rail (out1)" - label in4 "PMIC-3 ASIC 1.2V_T4_7 Rail (out2)" - label temp1 "PMIC-3 ASIC 1.2V_T0_3 Temp 1" - label temp2 "PMIC-3 ASIC 1.2V_T4_7 Temp 2" - label power1 "PMIC-3 12V ASIC 1.2V_T0_3_T4_7 Rail Pwr (in) " - ignore power2 - label power3 "PMIC-2 ASIC 1.2V_T0_3 Rail Pwr (out1)" - label power4 "PMIC-2 ASIC 1.2V_T4_7 Rail Pwr (out2)" - label curr1 "PMIC-2 12V ASIC 1.2V_T0_3 Rail Curr (in1)" - label curr2 "PMIC-2 12V ASIC 1.2V_T4_7 Rail Curr (in2)" - label curr3 "PMIC-2 ASIC 1.2V_T0_3 Rail Curr (out1)" - label curr4 "PMIC-2 ASIC 1.2V_T4_7 Rail Curr (out2)" + label in1 "PMIC-7 PSU 12V Rail (in1)" + label in2 "PMIC-7 PSU 12V Rail (in2)" + label in3 "PMIC-7 ASIC 1.2V_T0_3 Rail (out1)" + label in4 "PMIC-7 ASIC 1.2V_T4_7 Rail (out2)" + label temp1 "PMIC-7 ASIC 1.2V_T0_3 Temp 1" + label temp2 "PMIC-7 ASIC 1.2V_T4_7 Temp 2" + label power1 "PMIC-7 12V ASIC 1.2V_T0_3_T4_7 Rail Pwr (in) " + ignore power2 + label power3 "PMIC-7 ASIC 1.2V_T0_3 Rail Pwr (out1)" + label power4 "PMIC-7 ASIC 1.2V_T4_7 Rail Pwr (out2)" + label curr1 "PMIC-7 12V ASIC 1.2V_T0_3 Rail Curr (in1)" + label curr2 "PMIC-7 12V ASIC 1.2V_T4_7 Rail Curr (in2)" + label curr3 "PMIC-7 ASIC 1.2V_T0_3 Rail Curr (out1)" + label curr4 "PMIC-7 ASIC 1.2V_T4_7 Rail Curr (out2)" bus "i2c-15" "i2c-1-mux (chan_id 6)" chip "tps53679-i2c-*-58" label in1 "PMIC-8 PSU 12V Rail (in1)" label in2 "PMIC-8 PSU 12V Rail (in2)" - label in3 "PMIC-8 COMEX 1.8V Rail (out)" - label in4 "PMIC-8 COMEX 1.05V Rail (out)" + label in3 "PMIC-8 COMEX 1.8V Rail (out1)" + label in4 "PMIC-8 COMEX 1.05V Rail (out2)" label temp1 "PMIC-8 Temp 1" label temp2 "PMIC-8 Temp 2" - label power1 "PMIC-8 COMEX 1.8V Rail Pwr (out)" - label power2 "PMIC-8 COMEX 1.05V Rail Pwr (out)" - label curr1 "PMIC-8 COMEX 1.8V Rail Curr (out)" - label curr2 "PMIC-8 COMEX 1.05V Rail Curr (out)" + label power1 "PMIC-8 COMEX 1.8V Rail Pwr (out1)" + label power2 "PMIC-8 COMEX 1.05V Rail Pwr (out2)" + label curr1 "PMIC-8 COMEX 1.8V Rail Curr (out1)" + label curr2 "PMIC-8 COMEX 1.05V Rail Curr (out2)" chip "tps53679-i2c-*-61" label in1 "PMIC-9 PSU 12V Rail (in1)" label in2 "PMIC-9 PSU 12V Rail (in2)" @@ -157,35 +157,35 @@ bus "i2c-15" "i2c-1-mux (chan_id 6)" ignore in4 label temp1 "PMIC-9 Temp 1" label temp2 "PMIC-9 Temp 2" - label power1 "PMIC-9 COMEX 1.2V Rail Pwr (out)" - ignore power2 - label curr1 "PMIC-9 COMEX 1.2V Rail Curr (out)" - ignore curr2 + label power1 "PMIC-9 COMEX 1.2V Rail Pwr (out1)" + ignore power2 + label curr1 "PMIC-9 COMEX 1.2V Rail Curr (out1)" + ignore curr2 chip "mp2975-i2c-*-6a" - label in1 "PMIC-3 PSU 12V Rail (in1)" - label in2 "PMIC-3 COMEX 1.8V Rail (out)" - label in3 "PMIC-3 COMEX 1.05V Rail (out)" - label temp1 "PMIC-3 Temp 1" - label power1 "PMIC-3 COMEX 12V Rail Pwr (in)" - label power2 "PMIC-3 COMEX 1.8V Rail Pwr (out)" - label power3 "PMIC-3 COMEX 1.05V Rail Pwr (out)" - label curr1 "PMIC-3 COMEX 12V Rail Curr (in)" - label curr2 "PMIC-3 COMEX 1.8V Rail Curr (out)" + label in1 "PMIC-8 PSU 12V Rail (in1)" + label in2 "PMIC-8 COMEX 1.8V Rail (out)" + label in3 "PMIC-8 COMEX 1.05V Rail (out)" + label temp1 "PMIC-8 Temp 1" + label power1 "PMIC-8 COMEX 12V Rail Pwr (in)" + label power2 "PMIC-8 COMEX 1.8V Rail Pwr (out)" + label power3 "PMIC-8 COMEX 1.05V Rail Pwr (out)" + label curr1 "PMIC-8 COMEX 12V Rail Curr (in)" + label curr2 "PMIC-8 COMEX 1.8V Rail Curr (out)" ignore curr3 ignore curr4 - label curr5 "PMIC-3 COMEX 1.05V Rail Curr (out)" + label curr5 "PMIC-8 COMEX 1.05V Rail Curr (out)" ignore curr6 chip "mp2975-i2c-*-61" - label in1 "PMIC-4 PSU 12V Rail (in1)" - label in2 "PMIC-4 COMEX 1.2V Rail (out)" - label temp1 "PMIC-4 Temp 1" - label temp2 "PMIC-4 Temp 2" - label power1 "PMIC-4 COMEX 12V Rail Pwr (in)" - label power2 "PMIC-4 COMEX 1.2V Rail Pwr (out)" - label curr1 "PMIC-4 COMEX 12V Rail Curr (in)" - label curr2 "PMIC-4 COMEX 1.2V Rail Curr (out)" + label in1 "PMIC-9 PSU 12V Rail (in1)" + label in2 "PMIC-9 COMEX 1.2V Rail (out)" + label temp1 "PMIC-9 Temp 1" + label temp2 "PMIC-9 Temp 2" + label power1 "PMIC-9 COMEX 12V Rail Pwr (in)" + label power2 "PMIC-9 COMEX 1.2V Rail Pwr (out)" + label curr1 "PMIC-9 COMEX 12V Rail Curr (in)" + label curr2 "PMIC-9 COMEX 1.2V Rail Curr (out)" ignore curr3 # Power supplies @@ -195,6 +195,8 @@ bus "i2c-4" "i2c-1-mux (chan_id 3)" ignore in2 label in3 "PSU-1(L) 12V Rail (out)" label fan1 "PSU-1(L) Fan 1" + ignore fan2 + ignore fan3 label temp1 "PSU-1(L) Temp 1" label temp2 "PSU-1(L) Temp 2" label temp3 "PSU-1(L) Temp 3" @@ -210,6 +212,8 @@ bus "i2c-4" "i2c-1-mux (chan_id 3)" ignore in2 label in3 "PSU-2(R) 12V Rail (out)" label fan1 "PSU-2(R) Fan 1" + ignore fan2 + ignore fan3 label temp1 "PSU-2(R) Temp 1" label temp2 "PSU-2(R) Temp 2" label temp3 "PSU-2(R) Temp 3" From 4adaa2854e141a655ed430ebed53647495a9c776 Mon Sep 17 00:00:00 2001 From: mssonicbld <79238446+mssonicbld@users.noreply.github.com> Date: Thu, 7 Sep 2023 07:08:47 +0800 Subject: [PATCH 09/15] [minigraph-parser] Update the definition of acl table type BMCDATA and BMCDATAV6 (#16249) (#16473) Why I did it According to ACL-Table-Type-HLD, the value type of MATCHES, ACTIONS and BIND_POINTS should be list instead of string. Opening this PR to update the definition of BMCDATA and BMCDATAV6. How I did it Update the definition of BMCDATA and BMCDATAV6 in minigraph-parser. How to verify it Verified by UT and build SONiC image. Co-authored-by: Zhijian Li --- src/sonic-config-engine/minigraph.py | 12 ++++++------ src/sonic-config-engine/tests/test_minigraph_case.py | 12 ++++++------ 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/src/sonic-config-engine/minigraph.py b/src/sonic-config-engine/minigraph.py index a95b2698de14..b959a877d50e 100644 --- a/src/sonic-config-engine/minigraph.py +++ b/src/sonic-config-engine/minigraph.py @@ -53,14 +53,14 @@ # Defination of custom acl table types acl_table_type_defination = { 'BMCDATA': { - "ACTIONS": "PACKET_ACTION,COUNTER", - "BIND_POINTS": "PORT", - "MATCHES": "SRC_IP,DST_IP,ETHER_TYPE,IP_TYPE,IP_PROTOCOL,IN_PORTS,L4_SRC_PORT,L4_DST_PORT,L4_SRC_PORT_RANGE,L4_DST_PORT_RANGE", + "ACTIONS": ["PACKET_ACTION", "COUNTER"], + "BIND_POINTS": ["PORT"], + "MATCHES": ["SRC_IP", "DST_IP", "ETHER_TYPE", "IP_TYPE", "IP_PROTOCOL", "IN_PORTS", "L4_SRC_PORT", "L4_DST_PORT", "L4_SRC_PORT_RANGE", "L4_DST_PORT_RANGE"] }, 'BMCDATAV6': { - "ACTIONS": "PACKET_ACTION,COUNTER", - "BIND_POINTS": "PORT", - "MATCHES": "SRC_IPV6,DST_IPV6,ETHER_TYPE,IP_TYPE,IP_PROTOCOL,IN_PORTS,L4_SRC_PORT,L4_DST_PORT,L4_SRC_PORT_RANGE,L4_DST_PORT_RANGE", + "ACTIONS": ["PACKET_ACTION", "COUNTER"], + "BIND_POINTS": ["PORT"], + "MATCHES": ["SRC_IPV6", "DST_IPV6", "ETHER_TYPE", "IP_TYPE", "IP_PROTOCOL", "IN_PORTS", "L4_SRC_PORT", "L4_DST_PORT", "L4_SRC_PORT_RANGE", "L4_DST_PORT_RANGE"] } } diff --git a/src/sonic-config-engine/tests/test_minigraph_case.py b/src/sonic-config-engine/tests/test_minigraph_case.py index 43f92ccdc996..2683a0fb05fb 100644 --- a/src/sonic-config-engine/tests/test_minigraph_case.py +++ b/src/sonic-config-engine/tests/test_minigraph_case.py @@ -498,14 +498,14 @@ def test_minigraph_acl_attach_to_ports(self): def test_minigraph_acl_type_bmcdata(self): expected_acl_type_bmcdata = { - "ACTIONS": "PACKET_ACTION,COUNTER", - "BIND_POINTS": "PORT", - "MATCHES": "SRC_IP,DST_IP,ETHER_TYPE,IP_TYPE,IP_PROTOCOL,IN_PORTS,L4_SRC_PORT,L4_DST_PORT,L4_SRC_PORT_RANGE,L4_DST_PORT_RANGE", + "ACTIONS": ["PACKET_ACTION", "COUNTER"], + "BIND_POINTS": ["PORT"], + "MATCHES": ["SRC_IP", "DST_IP", "ETHER_TYPE", "IP_TYPE", "IP_PROTOCOL", "IN_PORTS", "L4_SRC_PORT", "L4_DST_PORT", "L4_SRC_PORT_RANGE", "L4_DST_PORT_RANGE"], } expected_acl_type_bmcdatav6 = { - "ACTIONS": "PACKET_ACTION,COUNTER", - "BIND_POINTS": "PORT", - "MATCHES": "SRC_IPV6,DST_IPV6,ETHER_TYPE,IP_TYPE,IP_PROTOCOL,IN_PORTS,L4_SRC_PORT,L4_DST_PORT,L4_SRC_PORT_RANGE,L4_DST_PORT_RANGE", + "ACTIONS": ["PACKET_ACTION", "COUNTER"], + "BIND_POINTS": ["PORT"], + "MATCHES": ["SRC_IPV6", "DST_IPV6", "ETHER_TYPE", "IP_TYPE", "IP_PROTOCOL", "IN_PORTS", "L4_SRC_PORT", "L4_DST_PORT", "L4_SRC_PORT_RANGE", "L4_DST_PORT_RANGE"], } expected_acl_table_bmc_acl_northbound = { 'policy_desc': 'BMC_ACL_NORTHBOUND', From 86b4d38bd31d087fa45a4e6848fa7823d47059e6 Mon Sep 17 00:00:00 2001 From: mssonicbld <79238446+mssonicbld@users.noreply.github.com> Date: Thu, 7 Sep 2023 07:09:17 +0800 Subject: [PATCH 10/15] [YANG SONIC-ACL] Fix Yang definition of ACL_TABLE_TYPE (#16247) (#16472) How I did it Update Yang definition of ACL_TABLE_TYPE. Update existing testcase. Add new testcase to cover lowercase key scenario. How to verify it Verified by building sonic_yang_models-1.0-py3-none-any.whl. While building the target package, unit tests were run and passed. Co-authored-by: Zhijian Li --- .../tests/files/sample_config_db.json | 6 +- .../tests/yang_model_tests/test_yang_model.py | 1 + .../tests/yang_model_tests/tests/acl.json | 8 ++- .../yang_model_tests/tests_config/acl.json | 63 ++++++++++++++++--- .../yang-templates/sonic-acl.yang.j2 | 6 +- 5 files changed, 69 insertions(+), 15 deletions(-) diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json index 25028b429cac..2004ce4ba033 100644 --- a/src/sonic-yang-models/tests/files/sample_config_db.json +++ b/src/sonic-yang-models/tests/files/sample_config_db.json @@ -1965,16 +1965,16 @@ }, "ACL_TABLE_TYPE": { "CUSTOM_L3": { - "matches": [ + "MATCHES": [ "IN_PORTS", "OUT_PORTS", "SRC_IP" ], - "actions": [ + "ACTIONS": [ "PACKET_ACTION", "MIRROR_INGRESS_ACTION" ], - "bind_points": [ + "BIND_POINTS": [ "PORT", "LAG" ] diff --git a/src/sonic-yang-models/tests/yang_model_tests/test_yang_model.py b/src/sonic-yang-models/tests/yang_model_tests/test_yang_model.py index 355c9086a6fb..d776f479cd37 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/test_yang_model.py +++ b/src/sonic-yang-models/tests/yang_model_tests/test_yang_model.py @@ -48,6 +48,7 @@ def initTest(self): 'Range': ['does not satisfy', 'range'], 'MinElements': ['Too few'], 'MaxElements': ['Too many'], + 'UnknownElement': ['Unknown element'], 'None': [] } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json b/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json index 0f0d11a529ac..2ad165e421f4 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/acl.json @@ -98,14 +98,18 @@ "eStrKey": "MinElements" }, "ACL_TABLE_CUSTOM_TABLE_TYPE_NO_ACTIONS": { - "desc": "ACL_TABLE LOAD TABLE TYPE SUCCESSFULLY WITH NO ACTIONS.", + "desc": "ACL_TABLE LOAD TABLE TYPE WITH NO ACTIONS.", "eStrKey" : "Verify", "verify": { "xpath": "/sonic-acl:sonic-acl/ACL_TABLE_TYPE/ACL_TABLE_TYPE_LIST[ACL_TABLE_TYPE_NAME='CUSTOM_L3']/ACL_TABLE_TYPE_NAME", - "key": "sonic-acl:actions", + "key": "sonic-acl:ACTIONS", "value": [""] } }, + "ACL_TABLE_CUSTOM_TABLE_TYPE_LOWERCASE_KEY": { + "desc": "ACL_TABLE LOAD TABLE TYPE WITH KEY ACTIONS/BIND_POINTS/MATCHES WRITTEN IN LOWERCASE.", + "eStrKey": "UnknownElement" + }, "ACL_TABLE_L2_ACL_FIELDS": { "desc": "Configure L2 ACL with proper rule fields" }, diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json index 11633164a166..381b27cf8077 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/acl.json @@ -723,14 +723,14 @@ "ACL_TABLE_TYPE_LIST": [ { "ACL_TABLE_TYPE_NAME": "CUSTOM_L3", - "matches": [ + "MATCHES": [ "SRC_IP", "IN_PORTS" ], - "actions": [ + "ACTIONS": [ "PACKET_ACTION" ], - "bind_points": [ + "BIND_POINTS": [ "PORT" ] } @@ -772,10 +772,10 @@ "ACL_TABLE_TYPE_LIST": [ { "ACL_TABLE_TYPE_NAME": "CUSTOM_L3", - "actions": [ + "ACTIONS": [ "PACKET_ACTION" ], - "bind_points": [ + "BIND_POINTS": [ "PORT" ] } @@ -817,11 +817,11 @@ "ACL_TABLE_TYPE_LIST": [ { "ACL_TABLE_TYPE_NAME": "CUSTOM_L3", - "matches": [ + "MATCHES": [ "SRC_IP", "IN_PORTS" ], - "actions": [ + "ACTIONS": [ "PACKET_ACTION" ] } @@ -845,6 +845,52 @@ } }, "ACL_TABLE_CUSTOM_TABLE_TYPE_NO_ACTIONS": { + "sonic-acl:sonic-acl": { + "sonic-acl:ACL_TABLE": { + "ACL_TABLE_LIST": [ + { + "ACL_TABLE_NAME": "NO-NSW-PACL-V6", + "policy_desc": "Filter IPv6", + "ports": [ + "Ethernet0" + ], + "stage": "EGRESS", + "type": "CUSTOM_L3" + } + ] + }, + "sonic-acl:ACL_TABLE_TYPE": { + "ACL_TABLE_TYPE_LIST": [ + { + "ACL_TABLE_TYPE_NAME": "CUSTOM_L3", + "MATCHES": [ + "SRC_IP", + "IN_PORTS" + ], + "BIND_POINTS": [ + "PORT" + ] + } + ] + } + }, + "sonic-port:sonic-port": { + "sonic-port:PORT": { + "PORT_LIST": [ + { + "admin_status": "up", + "alias": "eth0", + "description": "Ethernet0", + "lanes": "0,1,2,3", + "mtu": 9000, + "name": "Ethernet0", + "speed": 25000 + } + ] + } + } + }, + "ACL_TABLE_CUSTOM_TABLE_TYPE_LOWERCASE_KEY": { "sonic-acl:sonic-acl": { "sonic-acl:ACL_TABLE": { "ACL_TABLE_LIST": [ @@ -867,6 +913,9 @@ "SRC_IP", "IN_PORTS" ], + "actions": [ + "PACKET_ACTION" + ], "bind_points": [ "PORT" ] diff --git a/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2 b/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2 index f48d551e1bb8..a7dab2ecf382 100644 --- a/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2 +++ b/src/sonic-yang-models/yang-templates/sonic-acl.yang.j2 @@ -281,17 +281,17 @@ module sonic-acl { type string; } - leaf-list matches { + leaf-list MATCHES { type string; min-elements 1; } - leaf-list actions { + leaf-list ACTIONS { type string; default ""; } - leaf-list bind_points { + leaf-list BIND_POINTS { type enumeration { enum PORT; enum LAG; From 95f9f449587cb0bbefb29d5d493d14636de4be92 Mon Sep 17 00:00:00 2001 From: mssonicbld <79238446+mssonicbld@users.noreply.github.com> Date: Thu, 7 Sep 2023 07:09:40 +0800 Subject: [PATCH 11/15] [YANG][vlan-sub-interface] Add `vlan` field (#15838) (#16469) * [YANG][vlan-sub-interface] Add `vlan` field * Fix typo * Fix UT --------- Signed-off-by: Longxiang Lyu Co-authored-by: Longxiang Lyu <35479537+lolyu@users.noreply.github.com> --- .../tests/files/sample_config_db.json | 6 ++- .../tests/vlan_sub_interface.json | 4 ++ .../tests_config/vlan_sub_interface.json | 44 +++++++++++++++++-- .../yang-models/sonic-vlan-sub-interface.yang | 14 ++++++ 4 files changed, 62 insertions(+), 6 deletions(-) diff --git a/src/sonic-yang-models/tests/files/sample_config_db.json b/src/sonic-yang-models/tests/files/sample_config_db.json index 2004ce4ba033..c9237f8f19e6 100644 --- a/src/sonic-yang-models/tests/files/sample_config_db.json +++ b/src/sonic-yang-models/tests/files/sample_config_db.json @@ -996,12 +996,14 @@ "Ethernet12.10|10.0.1.56/31": {}, "Ethernet12.10|fc00::1:71/126": {}, "Po0003.10": { - "admin_status": "up" + "admin_status": "up", + "vlan": "10" }, "Po0003.10|10.0.1.58/31": {}, "Po0003.10|fc00::1:75/126": {}, "Eth120.10": { - "admin_status": "up" + "admin_status": "up", + "vlan": "10" }, "Eth120.10|10.0.1.60/31": {}, "Eth120.10|fc00::1:79/126": {} diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/vlan_sub_interface.json b/src/sonic-yang-models/tests/yang_model_tests/tests/vlan_sub_interface.json index b91c8a94f386..52b3968d5d9f 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests/vlan_sub_interface.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/vlan_sub_interface.json @@ -55,5 +55,9 @@ "desc": "INCORRECT LOOPBACK ACTION IN VLAN_SUB_INTERFACE TABLE.", "eStrKey" : "Pattern", "eStr": ["drop|forward"] + }, + "VLAN_SUB_INTERFACE_SHORT_NAME_FORMAT_VLAN_CHECK_MUST_CONDITION_FALSE_TEST": { + "desc": "Configure valid short name format vlan sub interface vlan must check condition false.", + "eStrKey": "Must" } } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan_sub_interface.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan_sub_interface.json index 6f200ef4b7ea..bb3ba554e4eb 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan_sub_interface.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/vlan_sub_interface.json @@ -36,7 +36,8 @@ "sonic-vlan-sub-interface:VLAN_SUB_INTERFACE": { "VLAN_SUB_INTERFACE_LIST": [ { - "name": "Eth8.10" + "name": "Eth8.10", + "vlan": 10 } ], "VLAN_SUB_INTERFACE_IPPREFIX_LIST": [ @@ -132,7 +133,8 @@ "sonic-vlan-sub-interface:VLAN_SUB_INTERFACE": { "VLAN_SUB_INTERFACE_LIST": [ { - "name": "Eth8.10" + "name": "Eth8.10", + "vlan": 10 } ], "VLAN_SUB_INTERFACE_IPPREFIX_LIST": [ @@ -164,7 +166,8 @@ "sonic-vlan-sub-interface:VLAN_SUB_INTERFACE": { "VLAN_SUB_INTERFACE_LIST": [ { - "name": "Po0001.10" + "name": "Po0001.10", + "vlan": 10 } ], "VLAN_SUB_INTERFACE_IPPREFIX_LIST": [ @@ -305,7 +308,8 @@ "sonic-vlan-sub-interface:VLAN_SUB_INTERFACE": { "VLAN_SUB_INTERFACE_LIST": [ { - "name": "Po0002.10" + "name": "Po0002.10", + "vlan": 10 } ], "VLAN_SUB_INTERFACE_IPPREFIX_LIST": [ @@ -533,5 +537,37 @@ ] } } + }, + "VLAN_SUB_INTERFACE_SHORT_NAME_FORMAT_VLAN_CHECK_MUST_CONDITION_FALSE_TEST": { + "sonic-vlan-sub-interface:sonic-vlan-sub-interface": { + "sonic-vlan-sub-interface:VLAN_SUB_INTERFACE": { + "VLAN_SUB_INTERFACE_LIST": [ + { + "name": "Eth8.10" + } + ], + "VLAN_SUB_INTERFACE_IPPREFIX_LIST": [ + { + "name": "Eth8.10", + "ip-prefix": "10.0.0.1/30" + } + ] + } + }, + "sonic-port:sonic-port": { + "sonic-port:PORT": { + "PORT_LIST": [ + { + "name": "Ethernet8", + "admin_status": "up", + "alias": "Ethernet8/1", + "description": "Ethernet8", + "lanes": "45,46,47,48", + "mtu": 9000, + "speed": 100000 + } + ] + } + } } } diff --git a/src/sonic-yang-models/yang-models/sonic-vlan-sub-interface.yang b/src/sonic-yang-models/yang-models/sonic-vlan-sub-interface.yang index bc13113ef53e..fd074b78ba2c 100644 --- a/src/sonic-yang-models/yang-models/sonic-vlan-sub-interface.yang +++ b/src/sonic-yang-models/yang-models/sonic-vlan-sub-interface.yang @@ -37,6 +37,14 @@ module sonic-vlan-sub-interface { description "VLAN_SUB_INTERFACE part of config_db.json with vrf"; + // encap vlan is mandatory for short name subinterfaces + must "(substring-before(name, '.') = /port:sonic-port/port:PORT/port:PORT_LIST/port:name) or " + + "(substring-before(name, '.') = /lag:sonic-portchannel/lag:PORTCHANNEL/lag:PORTCHANNEL_LIST/lag:name) or " + + "vlan" + { + error-message "Must condition not satisfied, no encap vlan provided for short-name format vlan sub interface"; + } + key "name"; leaf name { @@ -70,6 +78,12 @@ module sonic-vlan-sub-interface { description "Packet action when a packet ingress and gets routed on the same IP interface"; type stypes:loopback_action; } + + leaf vlan { + type uint16 { + range 1..4094; + } + } } list VLAN_SUB_INTERFACE_IPPREFIX_LIST { From f2f8f5f7a917fce6832ded81739984ff31bee0f1 Mon Sep 17 00:00:00 2001 From: mssonicbld <79238446+mssonicbld@users.noreply.github.com> Date: Thu, 7 Sep 2023 07:10:06 +0800 Subject: [PATCH 12/15] [submodule] Update submodule linkmgrd to the latest HEAD automatically (#16474) src/linkmgrd * 4bf3ebb - (HEAD -> 202205, origin/202205) [active-standby] Fix extra toggle observed in `config reload` (#216) (53 minutes ago) [Longxiang Lyu] --- src/linkmgrd | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/linkmgrd b/src/linkmgrd index 6ce71bab9eb4..4bf3ebbe64d9 160000 --- a/src/linkmgrd +++ b/src/linkmgrd @@ -1 +1 @@ -Subproject commit 6ce71bab9eb4762618016de69a3d18506164aac3 +Subproject commit 4bf3ebbe64d906e43f035448b28e557bc41cfc8b From 7f35f4c200877f263cfbfea107ed2155492b7342 Mon Sep 17 00:00:00 2001 From: mssonicbld <79238446+mssonicbld@users.noreply.github.com> Date: Thu, 7 Sep 2023 07:10:36 +0800 Subject: [PATCH 13/15] [submodule] Update submodule sonic-utilities to the latest HEAD automatically (#16476) src/sonic-utilities * 03292ffe - (HEAD -> 202205, origin/202205) Fix show acl table for masic (#2937) (6 minutes ago) [Arvindsrinivasan Lakshmi Narasimhan] * 627a2f59 - [Techsupport] Update the message seen during the lock acquisition failure (#2897) (55 minutes ago) [Vivek] --- src/sonic-utilities | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sonic-utilities b/src/sonic-utilities index 1ed5b5a9ce90..03292ffe5725 160000 --- a/src/sonic-utilities +++ b/src/sonic-utilities @@ -1 +1 @@ -Subproject commit 1ed5b5a9ce90e0bd02f23e6b6c8f50aaa96d9aab +Subproject commit 03292ffe5725ee7f63e20545f8aee70e30adef26 From 7a9c05c1e71f0f8390c2f95fa37a602daa31bb27 Mon Sep 17 00:00:00 2001 From: mssonicbld <79238446+mssonicbld@users.noreply.github.com> Date: Thu, 7 Sep 2023 07:31:18 +0800 Subject: [PATCH 14/15] [yang] Add Bmc to Device Neighbor Metadata element type list (#16188) (#16470) Bmc is a valid neighbor type in minigraph, however it was missing from the YANG model definition. Usually, the Bmc type device can be neighbor of BmcMgmtToRRouter. This PR is to introduce this type. Co-authored-by: Yaqiang Zhu --- .../tests/device_neighbor_metadata.json | 7 +++++ .../device_neighbor_metadata.json | 26 +++++++++++++++++++ .../sonic-device_neighbor_metadata.yang | 2 +- 3 files changed, 34 insertions(+), 1 deletion(-) diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests/device_neighbor_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests/device_neighbor_metadata.json index 2943a53d1b91..404856159a44 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests/device_neighbor_metadata.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests/device_neighbor_metadata.json @@ -9,6 +9,13 @@ "DEVICE_NEIGHBOR_METADATA_TYPE_CORRECT_PATTERN": { "desc": "DEVICE_NEIGHBOR_METADATA correct value for Type field" }, + "DEVICE_NEIGHBOR_METADATA_TYPE_INCORRECT_PATTERN_BMC": { + "desc": "DEVICE_NEIGHBOR_METADATA_TYPE_INCORRECT_PATTERN pattern failure with IncorrectTypeBmc.", + "eStrKey" : "Pattern" + }, + "DEVICE_NEIGHBOR_METADATA_TYPE_CORRECT_PATTERN_BMC": { + "desc": "DEVICE_NEIGHBOR_METADATA correct value for type field for Bmc" + }, "DEVICE_NEIGHBOR_METADATA_TYPE_NOT_PROVISIONED_PATTERN": { "desc": "DEVICE_NEIGHBOR_METADATA value as not-provisioned for Type field" } diff --git a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_neighbor_metadata.json b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_neighbor_metadata.json index ecc0c35d2208..82faf0815f56 100644 --- a/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_neighbor_metadata.json +++ b/src/sonic-yang-models/tests/yang_model_tests/tests_config/device_neighbor_metadata.json @@ -25,6 +25,32 @@ } } }, + "DEVICE_NEIGHBOR_METADATA_TYPE_INCORRECT_PATTERN_BMC": { + "sonic-device_neighbor_metadata:sonic-device_neighbor_metadata": { + "sonic-device_neighbor_metadata:DEVICE_NEIGHBOR_METADATA": { + "DEVICE_NEIGHBOR_METADATA_LIST": [ + { + "name": "Ethernet116", + "hwsku": "DUMMY_BMC_SKU", + "type": "IncorrectTypeBmc" + } + ] + } + } + }, + "DEVICE_NEIGHBOR_METADATA_TYPE_CORRECT_PATTERN_BMC": { + "sonic-device_neighbor_metadata:sonic-device_neighbor_metadata": { + "sonic-device_neighbor_metadata:DEVICE_NEIGHBOR_METADATA": { + "DEVICE_NEIGHBOR_METADATA_LIST": [ + { + "name": "Ethernet116", + "hwsku": "DUMMY_BMC_SKU", + "type": "Bmc" + } + ] + } + } + }, "DEVICE_NEIGHBOR_METADATA_TYPE_NOT_PROVISIONED_PATTERN": { "sonic-device_neighbor_metadata:sonic-device_neighbor_metadata": { "sonic-device_neighbor_metadata:DEVICE_NEIGHBOR_METADATA": { diff --git a/src/sonic-yang-models/yang-models/sonic-device_neighbor_metadata.yang b/src/sonic-yang-models/yang-models/sonic-device_neighbor_metadata.yang index 0b8a5ad1ee57..594c4a8c2c2c 100644 --- a/src/sonic-yang-models/yang-models/sonic-device_neighbor_metadata.yang +++ b/src/sonic-yang-models/yang-models/sonic-device_neighbor_metadata.yang @@ -83,7 +83,7 @@ module sonic-device_neighbor_metadata { leaf type { description "Network element type"; type string { - pattern "ToRRouter|LeafRouter|SpineChassisFrontendRouter|ChassisBackendRouter|ASIC|Asic|Supervior|MgmtToRRouter|MgmtLeafRouter|SpineRouter|BackEndToRRouter|BackEndLeafRouter|EPMS|MgmtTsToR|BmcMgmtToRRouter|Server|MiniPower|SmartCable|Ixia|not-provisioned"; + pattern "ToRRouter|LeafRouter|SpineChassisFrontendRouter|ChassisBackendRouter|ASIC|Asic|Supervior|MgmtToRRouter|MgmtLeafRouter|SpineRouter|BackEndToRRouter|BackEndLeafRouter|EPMS|MgmtTsToR|BmcMgmtToRRouter|Server|Bmc|MiniPower|SmartCable|Ixia|not-provisioned"; } } From 70ff54ccc460e6fbb5c5b85aa19d420bd63bb83d Mon Sep 17 00:00:00 2001 From: mssonicbld <79238446+mssonicbld@users.noreply.github.com> Date: Thu, 7 Sep 2023 08:58:58 +0800 Subject: [PATCH 15/15] [submodule] Update submodule sonic-platform-common to the latest HEAD automatically (#16475) src/sonic-platform-common * 6a38e71 - (HEAD -> 202205, origin/202205) Default implementation of under/over speed checks (#382) (10 minutes ago) [spilkey-cisco] * 9f2f61d - Convert the tx/rx power unit to the dBm unit (#377) (11 minutes ago) [ChiouRung Haung] --- src/sonic-platform-common | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sonic-platform-common b/src/sonic-platform-common index b41db16c3cca..6a38e71592b6 160000 --- a/src/sonic-platform-common +++ b/src/sonic-platform-common @@ -1 +1 @@ -Subproject commit b41db16c3cca49adc92b0e6a9787983ae2f0dd88 +Subproject commit 6a38e71592b622dddccdfb5567fbde83cad19e6a