From aa0edb027d1ee5d14f7cde6faeb37c443105f8bc Mon Sep 17 00:00:00 2001 From: Andriy Yurkiv <70649192+ayurkiv-nvda@users.noreply.github.com> Date: Mon, 18 Mar 2024 23:32:24 +0200 Subject: [PATCH] [Mellanox] Support DSCP remapping in Dual-ToR topo for SN4700-O8V48, update buffers for t0 (#18293) * [Mellanox] Support DSCP remapping in Dual-ToR topo for SN4700-O8V48, update buffers for t0 Signed-off-by: Andriy Yurkiv * [Mellanox] Support DSCP remapping in Dual-ToR topo for SN4700-O8V48, update buffers for t0 (fixes after recalculation) Signed-off-by: Andriy Yurkiv --------- Signed-off-by: Andriy Yurkiv --- .../buffers_defaults_t0.j2 | 17 ++++++++++++++++- .../Mellanox-SN4700-O8V48/qos.json.j2 | 2 +- 2 files changed, 17 insertions(+), 2 deletions(-) diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_defaults_t0.j2 index 02de15759cff..beaa88723b79 100644 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_defaults_t0.j2 +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/buffers_defaults_t0.j2 @@ -1,5 +1,5 @@ {# - Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. Apache-2.0 Licensed under the Apache License, Version 2.0 (the "License"); @@ -14,10 +14,17 @@ limitations under the License. #} {% set default_cable = '5m' %} +{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%} +{% set ingress_lossless_pool_size = '48168960' %} +{% set ingress_lossless_pool_xoff = '5218304' %} +{% set egress_lossless_pool_size = '60817392' %} +{% set egress_lossy_pool_size = '48168960' %} +{%- else -%} {% set ingress_lossless_pool_size = '49946624' %} {% set ingress_lossless_pool_xoff = '4063232' %} {% set egress_lossless_pool_size = '60817392' %} {% set egress_lossy_pool_size = '49946624' %} +{%- endif -%} {% import 'buffers_defaults_objects.j2' as defs with context %} @@ -29,10 +36,18 @@ {{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} {%- endmacro %} +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + {%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} {{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} {%- endmacro %} +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + {%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} {{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} {%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/qos.json.j2 index eccf286dc879..48221aa2b3de 120000 --- a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/qos.json.j2 +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8V48/qos.json.j2 @@ -1 +1 @@ -../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 \ No newline at end of file +../../x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2 \ No newline at end of file