From a975d40eaacf26d41c8b4a830f21c17cf12dbe53 Mon Sep 17 00:00:00 2001 From: Christophe Alexandre Date: Thu, 2 May 2024 19:02:41 +0200 Subject: [PATCH] Update Makefile --- designs/arm_core/Makefile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/designs/arm_core/Makefile b/designs/arm_core/Makefile index 4151571..11ca87a 100644 --- a/designs/arm_core/Makefile +++ b/designs/arm_core/Makefile @@ -24,7 +24,7 @@ arm_core_netlist.v: src/arm_core.v arm_core_snl/snl.mf: arm_core_netlist.v export PYTHONPATH=${SET_PYTHONPATH}; \ - ${PYTHON_ENV} ${NAJA_EDIT} -f verilog -t snl -i $< -o arm_core_snl -p ${PRIMITIVES} + ${PYTHON_ENV} ${NAJA_EDIT} -f verilog -t snl -i $< -o arm_core_snl -p ${PRIMITIVES}/xilinx.py edges.list: arm_core_snl/snl.mf gen_edge_list.py export PYTHONPATH=${SET_PYTHONPATH}; \ @@ -32,11 +32,11 @@ edges.list: arm_core_snl/snl.mf gen_edge_list.py arm_core_snl.v primitives.v: arm_core_netlist.v export PYTHONPATH=${SET_PYTHONPATH}; \ - ${NAJA_EDIT} -f verilog -t verilog -p ${PRIMITIVES} -i arm_core_netlist.v -o arm_core_snl.v -d primitives.v + ${NAJA_EDIT} -f verilog -t verilog -p ${PRIMITIVES}/xilinx.py -i arm_core_netlist.v -o arm_core_snl.v -d primitives.v arm_core_snl_error.v: arm_core_netlist.v src/add_error.py export PYTHONPATH=${SET_PYTHONPATH}; \ - ${NAJA_EDIT} -e src/add_error.py -f verilog -t verilog -p ${PRIMITIVES} -i arm_core_netlist.v -o arm_core_snl_error.v -d primitives.v + ${NAJA_EDIT} -e src/add_error.py -f verilog -t verilog -p ${PRIMITIVES}/xilinx.py -i arm_core_netlist.v -o arm_core_snl_error.v -d primitives.v clean: -rm arm_core_snl.v primitives.v arm_core_netlist.v