From 4874db72b32aeeaf50166bd4dbc6b4da18750ed5 Mon Sep 17 00:00:00 2001 From: Anna Henningsen Date: Fri, 3 Apr 2020 04:13:23 +0200 Subject: [PATCH] deps: fix zlib compilation for CPUs without SIMD features MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix the compile flags so that zlib can run on CPUs that do not have SSSE3/SSE4.2/etc. Do not compile zlib with flags that indicate that those features are available, and instead enable them selectively for functions that use them. There are probably better way to do this, e.g. through gyp file modifications as suggested in the issue. However, this patch should do just fine until that happens. Fixes: https://github.com/nodejs/node/issues/32553 PR-URL: https://github.com/nodejs/node/pull/32627 Reviewed-By: Gireesh Punathil Reviewed-By: Ben Noordhuis Reviewed-By: Tobias Nießen Reviewed-By: James M Snell --- deps/zlib/adler32_simd.c | 4 ++++ deps/zlib/crc32_simd.c | 4 ++++ deps/zlib/crc_folding.c | 12 ++++++++++++ deps/zlib/zlib.gyp | 14 -------------- 4 files changed, 20 insertions(+), 14 deletions(-) diff --git a/deps/zlib/adler32_simd.c b/deps/zlib/adler32_simd.c index 1354915cc099ad..f8b07297b93840 100644 --- a/deps/zlib/adler32_simd.c +++ b/deps/zlib/adler32_simd.c @@ -50,9 +50,13 @@ #define NMAX 5552 #if defined(ADLER32_SIMD_SSSE3) +#ifndef __GNUC__ +#define __attribute__() +#endif #include +__attribute__((target("ssse3"))) uint32_t ZLIB_INTERNAL adler32_simd_( /* SSSE3 */ uint32_t adler, const unsigned char *buf, diff --git a/deps/zlib/crc32_simd.c b/deps/zlib/crc32_simd.c index c8e5592f38ef1e..27481847e97b90 100644 --- a/deps/zlib/crc32_simd.c +++ b/deps/zlib/crc32_simd.c @@ -8,6 +8,9 @@ #include "crc32_simd.h" #if defined(CRC32_SIMD_SSE42_PCLMUL) +#ifndef __GNUC__ +#define __attribute__() +#endif /* * crc32_sse42_simd_(): compute the crc32 of the buffer, where the buffer @@ -21,6 +24,7 @@ #include #include +__attribute__((target("sse4.2,pclmul"))) uint32_t ZLIB_INTERNAL crc32_sse42_simd_( /* SSE4.2+PCLMUL */ const unsigned char *buf, z_size_t len, diff --git a/deps/zlib/crc_folding.c b/deps/zlib/crc_folding.c index 48d77744aaf47d..54f4b5c9401089 100644 --- a/deps/zlib/crc_folding.c +++ b/deps/zlib/crc_folding.c @@ -23,6 +23,10 @@ #include #include +#ifndef __GNUC__ +#define __attribute__() +#endif + #define CRC_LOAD(s) \ do { \ __m128i xmm_crc0 = _mm_loadu_si128((__m128i *)s->crc0 + 0);\ @@ -39,6 +43,7 @@ _mm_storeu_si128((__m128i *)s->crc0 + 4, xmm_crc_part);\ } while (0); +__attribute__((target("sse4.2,pclmul"))) ZLIB_INTERNAL void crc_fold_init(deflate_state *const s) { CRC_LOAD(s) @@ -53,6 +58,7 @@ ZLIB_INTERNAL void crc_fold_init(deflate_state *const s) s->strm->adler = 0; } +__attribute__((target("sse4.2,pclmul"))) local void fold_1(deflate_state *const s, __m128i *xmm_crc0, __m128i *xmm_crc1, __m128i *xmm_crc2, __m128i *xmm_crc3) @@ -79,6 +85,7 @@ local void fold_1(deflate_state *const s, *xmm_crc3 = _mm_castps_si128(ps_res); } +__attribute__((target("sse4.2,pclmul"))) local void fold_2(deflate_state *const s, __m128i *xmm_crc0, __m128i *xmm_crc1, __m128i *xmm_crc2, __m128i *xmm_crc3) @@ -113,6 +120,7 @@ local void fold_2(deflate_state *const s, *xmm_crc3 = _mm_castps_si128(ps_res31); } +__attribute__((target("sse4.2,pclmul"))) local void fold_3(deflate_state *const s, __m128i *xmm_crc0, __m128i *xmm_crc1, __m128i *xmm_crc2, __m128i *xmm_crc3) @@ -153,6 +161,7 @@ local void fold_3(deflate_state *const s, *xmm_crc3 = _mm_castps_si128(ps_res32); } +__attribute__((target("sse4.2,pclmul"))) local void fold_4(deflate_state *const s, __m128i *xmm_crc0, __m128i *xmm_crc1, __m128i *xmm_crc2, __m128i *xmm_crc3) @@ -219,6 +228,7 @@ local const unsigned zalign(32) pshufb_shf_table[60] = { 0x0201008f,0x06050403,0x0a090807,0x0e0d0c0b /* shl 1 (16 -15)/shr15*/ }; +__attribute__((target("sse4.2,pclmul"))) local void partial_fold(deflate_state *const s, const size_t len, __m128i *xmm_crc0, __m128i *xmm_crc1, __m128i *xmm_crc2, __m128i *xmm_crc3, @@ -269,6 +279,7 @@ local void partial_fold(deflate_state *const s, const size_t len, *xmm_crc3 = _mm_castps_si128(ps_res); } +__attribute__((target("sse4.2,pclmul"))) ZLIB_INTERNAL void crc_fold_copy(deflate_state *const s, unsigned char *dst, const unsigned char *src, long len) { @@ -425,6 +436,7 @@ local const unsigned zalign(16) crc_mask2[4] = { 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF }; +__attribute__((target("sse4.2,pclmul"))) unsigned ZLIB_INTERNAL crc_fold_512to32(deflate_state *const s) { const __m128i xmm_mask = _mm_load_si128((__m128i *)crc_mask); diff --git a/deps/zlib/zlib.gyp b/deps/zlib/zlib.gyp index c73b9adba902de..6f5a8ce3464b31 100644 --- a/deps/zlib/zlib.gyp +++ b/deps/zlib/zlib.gyp @@ -91,20 +91,6 @@ 'x86.c', ], 'conditions': [ - ['OS!="win" or llvm_version!="0.0"', { - 'cflags': [ - '-mssse3', - '-msse4.2', - '-mpclmul', - ], - 'xcode_settings': { - 'OTHER_CFLAGS': [ - '-mssse3', - '-msse4.2', - '-mpclmul', - ], - }, - }], ['target_arch=="x64"', { 'defines': [ 'INFLATE_CHUNK_READ_64LE' ], }],