From eec726df6dfef1b7d050cf0ccf6f09efce1c5625 Mon Sep 17 00:00:00 2001
From: TomAFrench <tom@tomfren.ch>
Date: Wed, 7 Feb 2024 16:54:21 +0000
Subject: [PATCH] chore: add assertion to catch regressions

---
 .../src/ssa/acir_gen/acir_ir/generated_acir.rs              | 4 ++++
 compiler/noirc_evaluator/src/ssa/acir_gen/mod.rs            | 6 +++++-
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/compiler/noirc_evaluator/src/ssa/acir_gen/acir_ir/generated_acir.rs b/compiler/noirc_evaluator/src/ssa/acir_gen/acir_ir/generated_acir.rs
index b86fc4eeb5f..bb06dcda531 100644
--- a/compiler/noirc_evaluator/src/ssa/acir_gen/acir_ir/generated_acir.rs
+++ b/compiler/noirc_evaluator/src/ssa/acir_gen/acir_ir/generated_acir.rs
@@ -74,6 +74,10 @@ impl GeneratedAcir {
         }
     }
 
+    pub(crate) fn opcodes(&self) -> &[AcirOpcode] {
+        &self.opcodes
+    }
+    
     pub(crate) fn take_opcodes(&mut self) -> Vec<AcirOpcode> {
         std::mem::take(&mut self.opcodes)
     }
diff --git a/compiler/noirc_evaluator/src/ssa/acir_gen/mod.rs b/compiler/noirc_evaluator/src/ssa/acir_gen/mod.rs
index d9eeb0d22b2..d60a8d16dd1 100644
--- a/compiler/noirc_evaluator/src/ssa/acir_gen/mod.rs
+++ b/compiler/noirc_evaluator/src/ssa/acir_gen/mod.rs
@@ -241,7 +241,11 @@ impl Context {
         }
 
         warnings.extend(self.convert_ssa_return(entry_block.unwrap_terminator(), dfg)?);
-        Ok(self.acir_context.finish(input_witness, warnings))
+        let generated_acir = self.acir_context.finish(input_witness, warnings);
+
+        assert_eq!(generated_acir.opcodes().len(), 1, "Unconstrained programs should only generate a single opcode but multiple were emitted");
+
+        Ok(generated_acir)
     }
 
     fn convert_brillig_main(