diff --git a/boards/ezurio/bl54l15_dvk/nrf54l_10_15_cpuapp_common.dtsi b/boards/ezurio/bl54l15_dvk/nrf54l_10_15_cpuapp_common.dtsi index 8671beb29cf6..eeeff6b7ec0e 100644 --- a/boards/ezurio/bl54l15_dvk/nrf54l_10_15_cpuapp_common.dtsi +++ b/boards/ezurio/bl54l15_dvk/nrf54l_10_15_cpuapp_common.dtsi @@ -92,6 +92,14 @@ status = "okay"; }; +&xo { + status = "okay"; +}; + +&lfclk { + status = "okay"; +}; + &spi00 { status = "okay"; cs-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; diff --git a/boards/ezurio/bl54l15u_dvk/nrf54l15_cpuapp_common.dtsi b/boards/ezurio/bl54l15u_dvk/nrf54l15_cpuapp_common.dtsi index e630abab4a9c..1c0bae280071 100644 --- a/boards/ezurio/bl54l15u_dvk/nrf54l15_cpuapp_common.dtsi +++ b/boards/ezurio/bl54l15u_dvk/nrf54l15_cpuapp_common.dtsi @@ -92,6 +92,14 @@ status = "okay"; }; +&xo { + status = "okay"; +}; + +&lfclk { + status = "okay"; +}; + &spi00 { status = "okay"; cs-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; diff --git a/boards/native/nrf_bsim/nrf54l15bsim_nrf54l15_cpuapp.dts b/boards/native/nrf_bsim/nrf54l15bsim_nrf54l15_cpuapp.dts index 35a052b78081..a1c2f4bd4d15 100644 --- a/boards/native/nrf_bsim/nrf54l15bsim_nrf54l15_cpuapp.dts +++ b/boards/native/nrf_bsim/nrf54l15bsim_nrf54l15_cpuapp.dts @@ -135,3 +135,11 @@ &clock { status = "okay"; }; + +&xo { + status = "okay"; +}; + +&lfclk { + status = "okay"; +}; diff --git a/boards/native/nrf_bsim/nrf54lm20bsim_nrf54lm20a_cpuapp.dts b/boards/native/nrf_bsim/nrf54lm20bsim_nrf54lm20a_cpuapp.dts index bd424f2e15ec..0c1cb31e55a8 100644 --- a/boards/native/nrf_bsim/nrf54lm20bsim_nrf54lm20a_cpuapp.dts +++ b/boards/native/nrf_bsim/nrf54lm20bsim_nrf54lm20a_cpuapp.dts @@ -142,3 +142,15 @@ &clock { status = "okay"; }; + +&xo { + status = "okay"; +}; + +&lfclk { + status = "okay"; +}; + +&xo24m { + status = "okay"; +}; diff --git a/boards/native/nrf_bsim/soc/soc_secure.h b/boards/native/nrf_bsim/soc/soc_secure.h index 06e9cc64993c..e2be9dc0603c 100644 --- a/boards/native/nrf_bsim/soc/soc_secure.h +++ b/boards/native/nrf_bsim/soc/soc_secure.h @@ -12,7 +12,7 @@ #include -#include +#include #include static inline void soc_secure_read_deviceid(uint32_t deviceid[2]) diff --git a/boards/nordic/nrf54h20dk/board.yml b/boards/nordic/nrf54h20dk/board.yml index 2d3d40c20e0b..1a505729f99c 100644 --- a/boards/nordic/nrf54h20dk/board.yml +++ b/boards/nordic/nrf54h20dk/board.yml @@ -14,3 +14,43 @@ board: default: "0.9.0" revisions: - name: "0.9.0" +runners: + run_once: + '--recover': + - runners: + - nrfutil + run: first + groups: + - boards: + - nrf54h20dk@0.9.0/nrf54h20/cpuapp + - nrf54h20dk@0.9.0/nrf54h20/cpurad + - nrf54h20dk@0.9.0/nrf54h20/cpuppr + - nrf54h20dk@0.9.0/nrf54h20/cpuppr/xip + - nrf54h20dk@0.9.0/nrf54h20/cpuflpr + - nrf54h20dk@0.9.0/nrf54h20/cpuflpr/xip + '--erase': + - runners: + - jlink + - nrfutil + run: first + groups: + - boards: + - nrf54h20dk@0.9.0/nrf54h20/cpuapp + - nrf54h20dk@0.9.0/nrf54h20/cpurad + - nrf54h20dk@0.9.0/nrf54h20/cpuppr + - nrf54h20dk@0.9.0/nrf54h20/cpuppr/xip + - nrf54h20dk@0.9.0/nrf54h20/cpuflpr + - nrf54h20dk@0.9.0/nrf54h20/cpuflpr/xip + '--reset': + - runners: + - jlink + - nrfutil + run: last + groups: + - boards: + - nrf54h20dk@0.9.0/nrf54h20/cpuapp + - nrf54h20dk@0.9.0/nrf54h20/cpurad + - nrf54h20dk@0.9.0/nrf54h20/cpuppr + - nrf54h20dk@0.9.0/nrf54h20/cpuppr/xip + - nrf54h20dk@0.9.0/nrf54h20/cpuflpr + - nrf54h20dk@0.9.0/nrf54h20/cpuflpr/xip diff --git a/boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi b/boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi index f3c1d924d27c..4b7409cbeaf0 100644 --- a/boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi +++ b/boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi @@ -101,6 +101,14 @@ status = "okay"; }; +&xo { + status = "okay"; +}; + +&lfclk { + status = "okay"; +}; + &gpregret1 { status = "okay"; diff --git a/boards/nordic/nrf54l15dk/pre_dt_board.cmake b/boards/nordic/nrf54l15dk/pre_dt_board.cmake new file mode 100644 index 000000000000..d675eacdcb14 --- /dev/null +++ b/boards/nordic/nrf54l15dk/pre_dt_board.cmake @@ -0,0 +1,6 @@ +# Copyright (c) 2025 Nordic Semiconductor +# SPDX-License-Identifier: Apache-2.0 + +# Suppress "unique_unit_address_if_enabled" to handle the following overlaps: +# - power@X010e000 & clock@X010e000 & xo@X010e000 & lfclk@X010e000 +list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled") diff --git a/boards/nordic/nrf54lm20dk/nrf54lm20a_cpuapp_common.dtsi b/boards/nordic/nrf54lm20dk/nrf54lm20a_cpuapp_common.dtsi index 0ee33f1fd45b..5985ea8e4064 100644 --- a/boards/nordic/nrf54lm20dk/nrf54lm20a_cpuapp_common.dtsi +++ b/boards/nordic/nrf54lm20dk/nrf54lm20a_cpuapp_common.dtsi @@ -130,6 +130,18 @@ status = "okay"; }; +&xo { + status = "okay"; +}; + +&lfclk { + status = "okay"; +}; + +&xo24m { + status = "okay"; +}; + &ieee802154 { status = "okay"; }; diff --git a/boards/panasonic/panb611evb/panb611evb_nrf54l15_cpuapp_common.dtsi b/boards/panasonic/panb611evb/panb611evb_nrf54l15_cpuapp_common.dtsi index ba978a541286..1a6b2f6050cc 100644 --- a/boards/panasonic/panb611evb/panb611evb_nrf54l15_cpuapp_common.dtsi +++ b/boards/panasonic/panb611evb/panb611evb_nrf54l15_cpuapp_common.dtsi @@ -91,6 +91,14 @@ status = "okay"; }; +&xo { + status = "okay"; +}; + +&lfclk { + status = "okay"; +}; + &spi00 { status = "okay"; cs-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; diff --git a/boards/raytac/an54l15q_db/raytac_an54l15q_db_cpuapp_common.dtsi b/boards/raytac/an54l15q_db/raytac_an54l15q_db_cpuapp_common.dtsi index 952a8f6d7aeb..680329d3f6d3 100644 --- a/boards/raytac/an54l15q_db/raytac_an54l15q_db_cpuapp_common.dtsi +++ b/boards/raytac/an54l15q_db/raytac_an54l15q_db_cpuapp_common.dtsi @@ -92,6 +92,14 @@ status = "okay"; }; +&xo { + status = "okay"; +}; + +&lfclk { + status = "okay"; +}; + &spi00 { status = "okay"; cs-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; diff --git a/boards/we/ophelia4ev/ophelia4ev_nrf54l15_cpuapp.dts b/boards/we/ophelia4ev/ophelia4ev_nrf54l15_cpuapp.dts index 2380fcd5b8d3..15abb061895b 100644 --- a/boards/we/ophelia4ev/ophelia4ev_nrf54l15_cpuapp.dts +++ b/boards/we/ophelia4ev/ophelia4ev_nrf54l15_cpuapp.dts @@ -99,6 +99,14 @@ status = "okay"; }; +&xo { + status = "okay"; +}; + +&lfclk { + status = "okay"; +}; + &spi00 { status = "okay"; diff --git a/drivers/adc/adc_nrfx_saadc.c b/drivers/adc/adc_nrfx_saadc.c index 06035e2c3c5d..158757af9842 100644 --- a/drivers/adc/adc_nrfx_saadc.c +++ b/drivers/adc/adc_nrfx_saadc.c @@ -6,9 +6,7 @@ #include "adc_context.h" #include -#include -#include -#include +#include #include #include #include @@ -18,91 +16,22 @@ LOG_MODULE_REGISTER(adc_nrfx_saadc, CONFIG_ADC_LOG_LEVEL); #define DT_DRV_COMPAT nordic_nrf_saadc -#if (NRF_SAADC_HAS_AIN_AS_PIN) - -#if defined(CONFIG_NRF_PLATFORM_HALTIUM) -static const uint32_t saadc_psels[NRF_SAADC_AIN13 + 1] = { - [NRF_SAADC_AIN0] = NRF_PIN_PORT_TO_PIN_NUMBER(0U, 1), - [NRF_SAADC_AIN1] = NRF_PIN_PORT_TO_PIN_NUMBER(1U, 1), - [NRF_SAADC_AIN2] = NRF_PIN_PORT_TO_PIN_NUMBER(2U, 1), - [NRF_SAADC_AIN3] = NRF_PIN_PORT_TO_PIN_NUMBER(3U, 1), - [NRF_SAADC_AIN4] = NRF_PIN_PORT_TO_PIN_NUMBER(4U, 1), - [NRF_SAADC_AIN5] = NRF_PIN_PORT_TO_PIN_NUMBER(5U, 1), - [NRF_SAADC_AIN6] = NRF_PIN_PORT_TO_PIN_NUMBER(6U, 1), - [NRF_SAADC_AIN7] = NRF_PIN_PORT_TO_PIN_NUMBER(7U, 1), - [NRF_SAADC_AIN8] = NRF_PIN_PORT_TO_PIN_NUMBER(0U, 9), - [NRF_SAADC_AIN9] = NRF_PIN_PORT_TO_PIN_NUMBER(1U, 9), - [NRF_SAADC_AIN10] = NRF_PIN_PORT_TO_PIN_NUMBER(2U, 9), - [NRF_SAADC_AIN11] = NRF_PIN_PORT_TO_PIN_NUMBER(3U, 9), - [NRF_SAADC_AIN12] = NRF_PIN_PORT_TO_PIN_NUMBER(4U, 9), - [NRF_SAADC_AIN13] = NRF_PIN_PORT_TO_PIN_NUMBER(5U, 9), -}; -#elif defined(CONFIG_SOC_NRF54L05) || defined(CONFIG_SOC_NRF54L10) || defined(CONFIG_SOC_NRF54L15) -static const uint32_t saadc_psels[NRF_SAADC_DVDD + 1] = { - [NRF_SAADC_AIN0] = NRF_PIN_PORT_TO_PIN_NUMBER(4U, 1), - [NRF_SAADC_AIN1] = NRF_PIN_PORT_TO_PIN_NUMBER(5U, 1), - [NRF_SAADC_AIN2] = NRF_PIN_PORT_TO_PIN_NUMBER(6U, 1), - [NRF_SAADC_AIN3] = NRF_PIN_PORT_TO_PIN_NUMBER(7U, 1), - [NRF_SAADC_AIN4] = NRF_PIN_PORT_TO_PIN_NUMBER(11U, 1), - [NRF_SAADC_AIN5] = NRF_PIN_PORT_TO_PIN_NUMBER(12U, 1), - [NRF_SAADC_AIN6] = NRF_PIN_PORT_TO_PIN_NUMBER(13U, 1), - [NRF_SAADC_AIN7] = NRF_PIN_PORT_TO_PIN_NUMBER(14U, 1), - [NRF_SAADC_VDD] = NRF_SAADC_INPUT_VDD, - [NRF_SAADC_AVDD] = NRF_SAADC_INPUT_AVDD, - [NRF_SAADC_DVDD] = NRF_SAADC_INPUT_DVDD, -}; -#elif defined(NRF54LM20A_ENGA_XXAA) -static const uint32_t saadc_psels[NRF_SAADC_DVDD + 1] = { - [NRF_SAADC_AIN0] = NRF_PIN_PORT_TO_PIN_NUMBER(0U, 1), - [NRF_SAADC_AIN1] = NRF_PIN_PORT_TO_PIN_NUMBER(31U, 1), - [NRF_SAADC_AIN2] = NRF_PIN_PORT_TO_PIN_NUMBER(30U, 1), - [NRF_SAADC_AIN3] = NRF_PIN_PORT_TO_PIN_NUMBER(29U, 1), - [NRF_SAADC_AIN4] = NRF_PIN_PORT_TO_PIN_NUMBER(6U, 1), - [NRF_SAADC_AIN5] = NRF_PIN_PORT_TO_PIN_NUMBER(5U, 1), - [NRF_SAADC_AIN6] = NRF_PIN_PORT_TO_PIN_NUMBER(4U, 1), - [NRF_SAADC_AIN7] = NRF_PIN_PORT_TO_PIN_NUMBER(3U, 1), - [NRF_SAADC_VDD] = NRF_SAADC_INPUT_VDD, - [NRF_SAADC_AVDD] = NRF_SAADC_INPUT_AVDD, - [NRF_SAADC_DVDD] = NRF_SAADC_INPUT_DVDD, -}; -#elif defined(NRF54LV10A_ENGA_XXAA) -static const uint32_t saadc_psels[NRF_SAADC_AIN7 + 1] = { - [NRF_SAADC_AIN0] = NRF_PIN_PORT_TO_PIN_NUMBER(0U, 1), - [NRF_SAADC_AIN1] = NRF_PIN_PORT_TO_PIN_NUMBER(1U, 1), - [NRF_SAADC_AIN2] = NRF_PIN_PORT_TO_PIN_NUMBER(2U, 1), - [NRF_SAADC_AIN3] = NRF_PIN_PORT_TO_PIN_NUMBER(3U, 1), - [NRF_SAADC_AIN4] = NRF_PIN_PORT_TO_PIN_NUMBER(7U, 1), - [NRF_SAADC_AIN5] = NRF_PIN_PORT_TO_PIN_NUMBER(10U, 1), - [NRF_SAADC_AIN6] = NRF_PIN_PORT_TO_PIN_NUMBER(11U, 1), - [NRF_SAADC_AIN7] = NRF_PIN_PORT_TO_PIN_NUMBER(12U, 1), -}; -#elif defined(NRF54LS05B_ENGA_XXAA) -static const uint32_t saadc_psels[NRF_SAADC_AIN3 + 1] = { - [NRF_SAADC_AIN0] = NRF_PIN_PORT_TO_PIN_NUMBER(4U, 1), - [NRF_SAADC_AIN1] = NRF_PIN_PORT_TO_PIN_NUMBER(5U, 1), - [NRF_SAADC_AIN2] = NRF_PIN_PORT_TO_PIN_NUMBER(6U, 1), - [NRF_SAADC_AIN3] = NRF_PIN_PORT_TO_PIN_NUMBER(7U, 1), -}; +BUILD_ASSERT((NRF_SAADC_AIN0 == NRFX_ANALOG_EXTERNAL_AIN0) && + (NRF_SAADC_AIN1 == NRFX_ANALOG_EXTERNAL_AIN1) && + (NRF_SAADC_AIN2 == NRFX_ANALOG_EXTERNAL_AIN2) && + (NRF_SAADC_AIN3 == NRFX_ANALOG_EXTERNAL_AIN3) && + (NRF_SAADC_AIN4 == NRFX_ANALOG_EXTERNAL_AIN4) && + (NRF_SAADC_AIN5 == NRFX_ANALOG_EXTERNAL_AIN5) && + (NRF_SAADC_AIN6 == NRFX_ANALOG_EXTERNAL_AIN6) && + (NRF_SAADC_AIN7 == NRFX_ANALOG_EXTERNAL_AIN7) && +#if NRF_SAADC_HAS_INPUT_VDDHDIV5 + (NRF_SAADC_VDDHDIV5 == NRFX_ANALOG_INTERNAL_VDDHDIV5) && #endif - -#else -BUILD_ASSERT((NRF_SAADC_AIN0 == NRF_SAADC_INPUT_AIN0) && - (NRF_SAADC_AIN1 == NRF_SAADC_INPUT_AIN1) && - (NRF_SAADC_AIN2 == NRF_SAADC_INPUT_AIN2) && - (NRF_SAADC_AIN3 == NRF_SAADC_INPUT_AIN3) && - (NRF_SAADC_AIN4 == NRF_SAADC_INPUT_AIN4) && - (NRF_SAADC_AIN5 == NRF_SAADC_INPUT_AIN5) && - (NRF_SAADC_AIN6 == NRF_SAADC_INPUT_AIN6) && - (NRF_SAADC_AIN7 == NRF_SAADC_INPUT_AIN7) && -#if defined(SAADC_CH_PSELP_PSELP_VDDHDIV5) - (NRF_SAADC_VDDHDIV5 == NRF_SAADC_INPUT_VDDHDIV5) && -#endif -#if defined(SAADC_CH_PSELP_PSELP_VDD) - (NRF_SAADC_VDD == NRF_SAADC_INPUT_VDD) && +#if NRF_SAADC_HAS_INPUT_VDD + (NRF_SAADC_VDD == NRFX_ANALOG_INTERNAL_VDD) && #endif 1, - "Definitions from nrf-adc.h do not match those from nrf_saadc.h"); -#endif + "Definitions from nrf-saadc.h do not match those from nrfx_analog_common.h"); struct driver_data { struct adc_context ctx; @@ -184,86 +113,46 @@ static int acq_time_set(nrf_saadc_channel_config_t *ch_cfg, uint16_t acquisition return 0; } -static int input_assign(nrf_saadc_input_t *pin_p, - nrf_saadc_input_t *pin_n, - const struct adc_channel_cfg *channel_cfg) -{ -#if (NRF_SAADC_HAS_AIN_AS_PIN) - if (channel_cfg->input_positive > ARRAY_SIZE(saadc_psels) || - channel_cfg->input_positive < NRF_SAADC_AIN0) { - LOG_ERR("Invalid analog positive input number: %d", channel_cfg->input_positive); - return -EINVAL; - } - - *pin_p = saadc_psels[channel_cfg->input_positive]; - - if (channel_cfg->differential) { - if (channel_cfg->input_negative > ARRAY_SIZE(saadc_psels) || - (IS_ENABLED(CONFIG_NRF_PLATFORM_HALTIUM) && - (channel_cfg->input_positive > NRF_SAADC_AIN7) != - (channel_cfg->input_negative > NRF_SAADC_AIN7))) { - LOG_ERR("Invalid analog negative input number: %d", - channel_cfg->input_negative); - return -EINVAL; - } - *pin_n = channel_cfg->input_negative == NRF_SAADC_GND ? - NRF_SAADC_INPUT_DISABLED : - saadc_psels[channel_cfg->input_negative]; - } else { - *pin_n = NRF_SAADC_INPUT_DISABLED; - } -#else - *pin_p = channel_cfg->input_positive; - *pin_n = (channel_cfg->differential && (channel_cfg->input_negative != NRF_SAADC_GND)) - ? channel_cfg->input_negative - : NRF_SAADC_INPUT_DISABLED; -#endif - LOG_DBG("ADC positive input: %d", *pin_p); - LOG_DBG("ADC negative input: %d", *pin_n); - - return 0; -} - static int gain_set(nrf_saadc_channel_config_t *ch_cfg, enum adc_gain gain) { #if NRF_SAADC_HAS_CH_GAIN switch (gain) { -#if defined(SAADC_CH_CONFIG_GAIN_Gain1_6) +#if NRF_SAADC_HAS_GAIN_1_6 case ADC_GAIN_1_6: ch_cfg->gain = NRF_SAADC_GAIN1_6; break; #endif -#if defined(SAADC_CH_CONFIG_GAIN_Gain1_5) +#if NRF_SAADC_HAS_GAIN_1_5 case ADC_GAIN_1_5: ch_cfg->gain = NRF_SAADC_GAIN1_5; break; #endif -#if defined(SAADC_CH_CONFIG_GAIN_Gain1_4) || defined(SAADC_CH_CONFIG_GAIN_Gain2_8) +#if NRF_SAADC_HAS_GAIN_1_4 case ADC_GAIN_1_4: ch_cfg->gain = NRF_SAADC_GAIN1_4; break; #endif -#if defined(SAADC_CH_CONFIG_GAIN_Gain2_7) +#if NRF_SAADC_HAS_GAIN_2_7 case ADC_GAIN_2_7: ch_cfg->gain = NRF_SAADC_GAIN2_7; break; #endif -#if defined(SAADC_CH_CONFIG_GAIN_Gain1_3) || defined(SAADC_CH_CONFIG_GAIN_Gain2_6) +#if NRF_SAADC_HAS_GAIN_1_3 case ADC_GAIN_1_3: ch_cfg->gain = NRF_SAADC_GAIN1_3; break; #endif -#if defined(SAADC_CH_CONFIG_GAIN_Gain2_5) +#if NRF_SAADC_HAS_GAIN_2_5 case ADC_GAIN_2_5: ch_cfg->gain = NRF_SAADC_GAIN2_5; break; #endif -#if defined(SAADC_CH_CONFIG_GAIN_Gain1_2) || defined(SAADC_CH_CONFIG_GAIN_Gain2_4) +#if NRF_SAADC_HAS_GAIN_1_2 case ADC_GAIN_1_2: ch_cfg->gain = NRF_SAADC_GAIN1_2; break; #endif -#if defined(SAADC_CH_CONFIG_GAIN_Gain2_3) +#if NRF_SAADC_HAS_GAIN_2_3 case ADC_GAIN_2_3: ch_cfg->gain = NRF_SAADC_GAIN2_3; break; @@ -274,7 +163,7 @@ static int gain_set(nrf_saadc_channel_config_t *ch_cfg, enum adc_gain gain) case ADC_GAIN_2: ch_cfg->gain = NRF_SAADC_GAIN2; break; -#if defined(SAADC_CH_CONFIG_GAIN_Gain4) +#if NRF_SAADC_HAS_GAIN_4 case ADC_GAIN_4: ch_cfg->gain = NRF_SAADC_GAIN4; break; @@ -282,7 +171,7 @@ static int gain_set(nrf_saadc_channel_config_t *ch_cfg, enum adc_gain gain) default: #else if (gain != ADC_GAIN_1) { -#endif /* defined(NRF_SAADC_HAS_CH_GAIN) */ +#endif /* NRF_SAADC_HAS_CH_GAIN */ LOG_ERR("Selected ADC gain is not valid"); return -EINVAL; } @@ -293,17 +182,17 @@ static int gain_set(nrf_saadc_channel_config_t *ch_cfg, enum adc_gain gain) static int reference_set(nrf_saadc_channel_config_t *ch_cfg, enum adc_reference reference) { switch (reference) { -#if defined(SAADC_CH_CONFIG_REFSEL_Internal) +#if NRF_SAADC_HAS_REFERENCE_INTERNAL case ADC_REF_INTERNAL: ch_cfg->reference = NRF_SAADC_REFERENCE_INTERNAL; break; #endif -#if defined(SAADC_CH_CONFIG_REFSEL_VDD1_4) +#if NRF_SAADC_HAS_REFERENCE_VDD4 case ADC_REF_VDD_1_4: ch_cfg->reference = NRF_SAADC_REFERENCE_VDD4; break; #endif -#if defined(SAADC_CH_CONFIG_REFSEL_External) +#if NRF_SAADC_HAS_REFERENCE_EXTERNAL case ADC_REF_EXTERNAL0: ch_cfg->reference = NRF_SAADC_REFERENCE_EXTERNAL; break; @@ -333,6 +222,11 @@ static int adc_nrfx_channel_setup(const struct device *dev, #endif }, .channel_index = channel_cfg->channel_id, + .pin_p = channel_cfg->input_positive, + .pin_n = (channel_cfg->differential && + (channel_cfg->input_negative != NRF_SAADC_GND)) + ? channel_cfg->input_negative + : NRF_SAADC_AIN_DISABLED, }; if (channel_cfg->channel_id >= SAADC_CH_NUM) { @@ -342,11 +236,6 @@ static int adc_nrfx_channel_setup(const struct device *dev, ch_cfg = &cfg.channel_config; - err = input_assign(&cfg.pin_p, &cfg.pin_n, channel_cfg); - if (err != 0) { - return err; - } - err = gain_set(ch_cfg, channel_cfg->gain); if (err != 0) { return err; @@ -803,38 +692,9 @@ static DEVICE_API(adc, adc_nrfx_driver_api) = { #ifdef CONFIG_ADC_ASYNC .read_async = adc_nrfx_read_async, #endif -#if defined(NRF54LV10A_ENGA_XXAA) - .ref_internal = 1300, -#elif defined(CONFIG_SOC_COMPATIBLE_NRF54LX) - .ref_internal = 900, -#elif defined(CONFIG_NRF_PLATFORM_HALTIUM) - .ref_internal = 1024, -#else - .ref_internal = 600, -#endif + .ref_internal = NRFX_SAADC_REF_INTERNAL_VALUE, }; -#if defined(CONFIG_NRF_PLATFORM_HALTIUM) -/* AIN8-AIN14 inputs are on 3v3 GPIO port and they cannot be mixed with other - * analog inputs (from 1v8 ports) in differential mode. - */ -#define CH_IS_3V3(val) (val >= NRF_SAADC_AIN8) - -#define MIXED_3V3_1V8_INPUTS(node) \ - (DT_NODE_HAS_PROP(node, zephyr_input_negative) && \ - (CH_IS_3V3(DT_PROP_OR(node, zephyr_input_negative, 0)) != \ - CH_IS_3V3(DT_PROP_OR(node, zephyr_input_positive, 0)))) -#else -#define MIXED_3V3_1V8_INPUTS(node) false -#endif - -#define VALIDATE_CHANNEL_CONFIG(node) \ - BUILD_ASSERT(MIXED_3V3_1V8_INPUTS(node) == false, \ - "1v8 inputs cannot be mixed with 3v3 inputs"); - -/* Validate configuration of all channels. */ -DT_FOREACH_CHILD(DT_DRV_INST(0), VALIDATE_CHANNEL_CONFIG) - NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(DT_DRV_INST(0)); DEVICE_DT_INST_DEFINE(0, init_saadc, NULL, NULL, NULL, POST_KERNEL, diff --git a/drivers/audio/Kconfig.dmic_pdm_nrfx b/drivers/audio/Kconfig.dmic_pdm_nrfx index 51a56bebb54d..9f45144effa9 100644 --- a/drivers/audio/Kconfig.dmic_pdm_nrfx +++ b/drivers/audio/Kconfig.dmic_pdm_nrfx @@ -5,9 +5,7 @@ config AUDIO_DMIC_NRFX_PDM bool "nRF PDM nrfx driver" default y depends on DT_HAS_NORDIC_NRF_PDM_ENABLED - select NRFX_PDM0 if HAS_HW_NRF_PDM0 - select NRFX_PDM20 if HAS_HW_NRF_PDM20 - select NRFX_PDM21 if HAS_HW_NRF_PDM21 + select NRFX_PDM select PINCTRL help Enable support for nrfx PDM driver for nRF MCU series. diff --git a/drivers/audio/dmic_nrfx_pdm.c b/drivers/audio/dmic_nrfx_pdm.c index c2c80a7414c1..4afba3d6168f 100644 --- a/drivers/audio/dmic_nrfx_pdm.c +++ b/drivers/audio/dmic_nrfx_pdm.c @@ -4,6 +4,8 @@ * SPDX-License-Identifier: Apache-2.0 */ +#define DT_DRV_COMPAT nordic_nrf_pdm + #include #include #include @@ -21,7 +23,6 @@ LOG_MODULE_REGISTER(dmic_nrfx_pdm, CONFIG_AUDIO_DMIC_LOG_LEVEL); #if CONFIG_SOC_SERIES_NRF54HX #define DMIC_NRFX_CLOCK_FREQ MHZ(16) -#define DMIC_NRFX_CLOCK_FACTOR 8192 #define DMIC_NRFX_AUDIO_CLOCK_FREQ DT_PROP_OR(NODE_AUDIOPLL, frequency, 0) #elif DT_NODE_HAS_STATUS_OKAY(NODE_AUDIO_AUXPLL) #define DMIC_NRFX_AUDIO_CLOCK_FREQ DT_PROP(NODE_AUDIO_AUXPLL, nordic_frequency) @@ -31,13 +32,12 @@ BUILD_ASSERT((DMIC_NRFX_AUDIO_CLOCK_FREQ == NRF_AUXPLL_FREQ_DIV_AUDIO_48K) || #define DMIC_NRFX_CLOCK_FREQ MHZ(32) #else #define DMIC_NRFX_CLOCK_FREQ MHZ(32) -#define DMIC_NRFX_CLOCK_FACTOR 4096 #define DMIC_NRFX_AUDIO_CLOCK_FREQ DT_PROP_OR(DT_NODELABEL(aclk), clock_frequency, \ DT_PROP_OR(DT_NODELABEL(clock), hfclkaudio_frequency, 0)) #endif struct dmic_nrfx_pdm_drv_data { - const nrfx_pdm_t *pdm; + nrfx_pdm_t pdm; #if CONFIG_CLOCK_CONTROL_NRFS_AUDIOPLL || DT_NODE_HAS_STATUS_OKAY(NODE_AUDIO_AUXPLL) const struct device *audiopll_dev; #elif CONFIG_CLOCK_CONTROL_NRF @@ -75,7 +75,7 @@ static void free_buffer(struct dmic_nrfx_pdm_drv_data *drv_data, void *buffer) static void stop_pdm(struct dmic_nrfx_pdm_drv_data *drv_data) { drv_data->stopping = true; - nrfx_pdm_stop(drv_data->pdm); + nrfx_pdm_stop(&drv_data->pdm); } static int request_clock(struct dmic_nrfx_pdm_drv_data *drv_data) @@ -116,7 +116,7 @@ static void event_handler(const struct device *dev, const nrfx_pdm_evt_t *evt) if (evt->buffer_requested) { void *buffer; - nrfx_err_t err; + int err; ret = k_mem_slab_alloc(drv_data->mem_slab, &mem_slab_buffer, K_NO_WAIT); if (ret < 0) { @@ -138,9 +138,9 @@ static void event_handler(const struct device *dev, const nrfx_pdm_evt_t *evt) stop_pdm(drv_data); return; } - err = nrfx_pdm_buffer_set(drv_data->pdm, buffer, drv_data->block_size / 2); - if (err != NRFX_SUCCESS) { - LOG_ERR("Failed to set buffer: 0x%08x", err); + err = nrfx_pdm_buffer_set(&drv_data->pdm, buffer, drv_data->block_size / 2); + if (err != 0) { + LOG_ERR("Failed to set buffer: %d", err); stop = true; } } @@ -202,220 +202,6 @@ static void event_handler(const struct device *dev, const nrfx_pdm_evt_t *evt) } } -static bool is_in_freq_range(uint32_t freq, const struct dmic_cfg *pdm_cfg) -{ - return freq >= pdm_cfg->io.min_pdm_clk_freq && freq <= pdm_cfg->io.max_pdm_clk_freq; -} - -static bool is_better(uint32_t freq, - uint8_t ratio, - uint32_t req_rate, - uint32_t *best_diff, - uint32_t *best_rate, - uint32_t *best_freq) -{ - uint32_t act_rate = freq / ratio; - uint32_t diff = act_rate >= req_rate ? (act_rate - req_rate) - : (req_rate - act_rate); - - LOG_DBG("Freq %u, ratio %u, act_rate %u", freq, ratio, act_rate); - - if (diff < *best_diff) { - *best_diff = diff; - *best_rate = act_rate; - *best_freq = freq; - return true; - } - - return false; -} - -static bool check_pdm_frequencies(const struct dmic_nrfx_pdm_drv_cfg *drv_cfg, - nrfx_pdm_config_t *config, - const struct dmic_cfg *pdm_cfg, - uint8_t ratio, - uint32_t *best_diff, - uint32_t *best_rate, - uint32_t *best_freq) -{ - uint32_t req_rate = pdm_cfg->streams[0].pcm_rate; - bool better_found = false; - const uint32_t src_freq = - (NRF_PDM_HAS_SELECTABLE_CLOCK && drv_cfg->clk_src == ACLK) - ? DMIC_NRFX_AUDIO_CLOCK_FREQ - : DMIC_NRFX_CLOCK_FREQ; -#if NRF_PDM_HAS_PRESCALER - uint32_t req_freq = req_rate * ratio; - uint32_t prescaler = src_freq / req_freq; - uint32_t act_freq = src_freq / prescaler; - - if (is_in_freq_range(act_freq, pdm_cfg) && - is_better(act_freq, ratio, req_rate, best_diff, best_rate, best_freq)) { - config->prescaler = prescaler; - - better_found = true; - } - - /* Stop if an exact rate match is found. */ - if (*best_diff == 0) { - return true; - } - - /* Prescaler value is rounded down by default, - * thus value rounded up should be checked as well. - */ - prescaler += 1; - act_freq = src_freq / prescaler; - - if (is_in_freq_range(act_freq, pdm_cfg) && - is_better(act_freq, ratio, req_rate, best_diff, best_rate, best_freq)) { - config->prescaler = prescaler; - - better_found = true; - } -#else - if (IS_ENABLED(CONFIG_SOC_SERIES_NRF53X) || IS_ENABLED(CONFIG_SOC_SERIES_NRF54HX)) { - uint32_t req_freq = req_rate * ratio; - /* As specified in the nRF5340 PS: - * - * PDMCLKCTRL = 4096 * floor(f_pdm * 1048576 / - * (f_source + f_pdm / 2)) - * f_actual = f_source / floor(1048576 * 4096 / PDMCLKCTRL) - */ - uint32_t clk_factor = (uint32_t)((req_freq * 1048576ULL) / - (src_freq + req_freq / 2)); - uint32_t act_freq = src_freq / (1048576 / clk_factor); - - if (is_in_freq_range(act_freq, pdm_cfg) && - is_better(act_freq, ratio, req_rate, best_diff, best_rate, best_freq)) { - config->clock_freq = clk_factor * DMIC_NRFX_CLOCK_FACTOR; - - better_found = true; - } - } else { /* -> !IS_ENABLED(CONFIG_SOC_SERIES_NRF53X)) */ - static const struct { - uint32_t freq_val; - nrf_pdm_freq_t freq_enum; - } freqs[] = { - { 1000000, NRF_PDM_FREQ_1000K }, - { 1032000, NRF_PDM_FREQ_1032K }, - { 1067000, NRF_PDM_FREQ_1067K }, -#if defined(PDM_PDMCLKCTRL_FREQ_1231K) - { 1231000, NRF_PDM_FREQ_1231K }, -#endif -#if defined(PDM_PDMCLKCTRL_FREQ_1280K) - { 1280000, NRF_PDM_FREQ_1280K }, -#endif -#if defined(PDM_PDMCLKCTRL_FREQ_1333K) - { 1333000, NRF_PDM_FREQ_1333K } -#endif - }; - - for (int i = 0; i < ARRAY_SIZE(freqs); ++i) { - uint32_t freq_val = freqs[i].freq_val; - - if (freq_val < pdm_cfg->io.min_pdm_clk_freq) { - continue; - } - if (freq_val > pdm_cfg->io.max_pdm_clk_freq) { - break; - } - - if (is_better(freq_val, ratio, req_rate, - best_diff, best_rate, best_freq)) { - config->clock_freq = freqs[i].freq_enum; - - /* Stop if an exact rate match is found. */ - if (*best_diff == 0) { - return true; - } - - better_found = true; - } - - /* Since frequencies are in ascending order, stop - * checking next ones for the current ratio after - * resulting PCM rate goes above the one requested. - */ - if ((freq_val / ratio) > req_rate) { - break; - } - } - } -#endif /* NRF_PDM_HAS_PRESCALER */ - - return better_found; -} - -/* Finds clock settings that give the PCM output rate closest to that requested, - * taking into account the hardware limitations. - */ -static bool find_suitable_clock(const struct dmic_nrfx_pdm_drv_cfg *drv_cfg, - nrfx_pdm_config_t *config, - const struct dmic_cfg *pdm_cfg) -{ - uint32_t best_diff = UINT32_MAX; - uint32_t best_rate; - uint32_t best_freq; - -#if NRF_PDM_HAS_RATIO_CONFIG - static const struct { - uint8_t ratio_val; - nrf_pdm_ratio_t ratio_enum; - } ratios[] = { -#if defined(PDM_RATIO_RATIO_Ratio32) - { 32, NRF_PDM_RATIO_32X }, -#endif -#if defined(PDM_RATIO_RATIO_Ratio48) - { 48, NRF_PDM_RATIO_48X }, -#endif -#if defined(PDM_RATIO_RATIO_Ratio50) - { 50, NRF_PDM_RATIO_50X }, -#endif - { 64, NRF_PDM_RATIO_64X }, - { 80, NRF_PDM_RATIO_80X }, -#if defined(PDM_RATIO_RATIO_Ratio96) - { 96, NRF_PDM_RATIO_96X }, -#endif -#if defined(PDM_RATIO_RATIO_Ratio100) - { 100, NRF_PDM_RATIO_100X }, -#endif -#if defined(PDM_RATIO_RATIO_Ratio128) - { 128, NRF_PDM_RATIO_128X } -#endif - }; - - for (int r = 0; best_diff != 0 && r < ARRAY_SIZE(ratios); ++r) { - uint8_t ratio = ratios[r].ratio_val; - - if (check_pdm_frequencies(drv_cfg, config, pdm_cfg, ratio, - &best_diff, &best_rate, &best_freq)) { - config->ratio = ratios[r].ratio_enum; - - /* Look no further if a configuration giving the exact - * PCM rate is found. - */ - if (best_diff == 0) { - break; - } - } - } -#else - uint8_t ratio = 64; - - (void)check_pdm_frequencies(drv_cfg, config, pdm_cfg, ratio, - &best_diff, &best_rate, &best_freq); -#endif - - if (best_diff == UINT32_MAX) { - return false; - } - - LOG_INF("PDM clock frequency: %u, actual PCM rate: %u", - best_freq, best_rate); - return true; -} - static int dmic_nrfx_pdm_configure(const struct device *dev, struct dmic_cfg *config) { @@ -425,7 +211,7 @@ static int dmic_nrfx_pdm_configure(const struct device *dev, struct pcm_stream_cfg *stream = &config->streams[0]; uint32_t def_map, alt_map; nrfx_pdm_config_t nrfx_cfg; - nrfx_err_t err; + int err; if (drv_data->active) { LOG_ERR("Cannot configure device while it is active"); @@ -471,7 +257,7 @@ static int dmic_nrfx_pdm_configure(const struct device *dev, /* If either rate or width is 0, the stream is to be disabled. */ if (stream->pcm_rate == 0 || stream->pcm_width == 0) { if (drv_data->configured) { - nrfx_pdm_uninit(drv_data->pdm); + nrfx_pdm_uninit(&drv_data->pdm); drv_data->configured = false; } @@ -499,19 +285,28 @@ static int dmic_nrfx_pdm_configure(const struct device *dev, ? NRF_PDM_MCLKSRC_ACLK : NRF_PDM_MCLKSRC_PCLK32M; #endif - if (!find_suitable_clock(drv_cfg, &nrfx_cfg, config)) { + nrfx_pdm_output_t output_config = { + .base_clock_freq = (NRF_PDM_HAS_SELECTABLE_CLOCK && drv_cfg->clk_src == ACLK) + ? DMIC_NRFX_AUDIO_CLOCK_FREQ + : DMIC_NRFX_CLOCK_FREQ, + .sampling_rate = config->streams[0].pcm_rate, + .output_freq_min = config->io.min_pdm_clk_freq, + .output_freq_max = config->io.max_pdm_clk_freq + }; + + if (nrfx_pdm_prescalers_calc(&output_config, &nrfx_cfg.prescalers) != 0) { LOG_ERR("Cannot find suitable PDM clock configuration."); return -EINVAL; } if (drv_data->configured) { - nrfx_pdm_uninit(drv_data->pdm); + nrfx_pdm_uninit(&drv_data->pdm); drv_data->configured = false; } - err = nrfx_pdm_init(drv_data->pdm, &nrfx_cfg, drv_cfg->event_handler); - if (err != NRFX_SUCCESS) { - LOG_ERR("Failed to initialize PDM: 0x%08x", err); + err = nrfx_pdm_init(&drv_data->pdm, &nrfx_cfg, drv_cfg->event_handler); + if (err != 0) { + LOG_ERR("Failed to initialize PDM: %d", err); return -EIO; } @@ -532,15 +327,15 @@ static int dmic_nrfx_pdm_configure(const struct device *dev, static int start_transfer(struct dmic_nrfx_pdm_drv_data *drv_data) { - nrfx_err_t err; + int err; int ret; - err = nrfx_pdm_start(drv_data->pdm); - if (err == NRFX_SUCCESS) { + err = nrfx_pdm_start(&drv_data->pdm); + if (err == 0) { return 0; } - LOG_ERR("Failed to start PDM: 0x%08x", err); + LOG_ERR("Failed to start PDM: %d", err); ret = -EIO; ret = release_clock(drv_data); @@ -617,7 +412,7 @@ static int dmic_nrfx_pdm_trigger(const struct device *dev, case DMIC_TRIGGER_STOP: if (drv_data->active) { drv_data->stopping = true; - nrfx_pdm_stop(drv_data->pdm); + nrfx_pdm_stop(&drv_data->pdm); } break; @@ -700,80 +495,60 @@ static const struct _dmic_ops dmic_ops = { .read = dmic_nrfx_pdm_read, }; -#define PDM(idx) DT_NODELABEL(pdm##idx) -#define PDM_CLK_SRC(idx) DT_STRING_TOKEN(PDM(idx), clock_source) - -#define PDM_NRFX_DEVICE(idx) \ - static void *rx_msgs##idx[DT_PROP(PDM(idx), queue_size)]; \ - static void *mem_slab_msgs##idx[DT_PROP(PDM(idx), queue_size)]; \ - static struct dmic_nrfx_pdm_drv_data dmic_nrfx_pdm_data##idx; \ - static const nrfx_pdm_t dmic_nrfx_pdm##idx = NRFX_PDM_INSTANCE(idx); \ - static int pdm_nrfx_init##idx(const struct device *dev) \ - { \ - IRQ_CONNECT(DT_IRQN(PDM(idx)), DT_IRQ(PDM(idx), priority), \ - nrfx_isr, nrfx_pdm_##idx##_irq_handler, 0); \ - const struct dmic_nrfx_pdm_drv_cfg *drv_cfg = dev->config; \ - int err = pinctrl_apply_state(drv_cfg->pcfg, \ - PINCTRL_STATE_DEFAULT); \ - if (err < 0) { \ - return err; \ - } \ - dmic_nrfx_pdm_data##idx.pdm = &dmic_nrfx_pdm##idx; \ - k_msgq_init(&dmic_nrfx_pdm_data##idx.rx_queue, \ - (char *)rx_msgs##idx, sizeof(void *), \ - ARRAY_SIZE(rx_msgs##idx)); \ - k_msgq_init(&dmic_nrfx_pdm_data##idx.mem_slab_queue, \ - (char *)mem_slab_msgs##idx, sizeof(void *), \ - ARRAY_SIZE(mem_slab_msgs##idx)); \ - init_clock_manager(dev); \ - return 0; \ - } \ - static void event_handler##idx(const nrfx_pdm_evt_t *evt) \ - { \ - event_handler(DEVICE_DT_GET(PDM(idx)), evt); \ - } \ - PINCTRL_DT_DEFINE(PDM(idx)); \ - static const struct dmic_nrfx_pdm_drv_cfg dmic_nrfx_pdm_cfg##idx = { \ - .event_handler = event_handler##idx, \ - .nrfx_def_cfg = NRFX_PDM_DEFAULT_CONFIG(0, 0), \ - .nrfx_def_cfg.skip_gpio_cfg = true, \ - .nrfx_def_cfg.skip_psel_cfg = true, \ - .pcfg = PINCTRL_DT_DEV_CONFIG_GET(PDM(idx)), \ - .clk_src = PDM_CLK_SRC(idx), \ - .mem_reg = DMM_DEV_TO_REG(PDM(idx)), \ - }; \ - NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(PDM(idx)); \ - BUILD_ASSERT(PDM_CLK_SRC(idx) != ACLK || \ - NRF_PDM_HAS_SELECTABLE_CLOCK, \ - "Clock source ACLK is not available."); \ - BUILD_ASSERT(PDM_CLK_SRC(idx) != ACLK || \ - DT_NODE_HAS_PROP(DT_NODELABEL(clock), \ - hfclkaudio_frequency) || \ - DT_NODE_HAS_PROP(DT_NODELABEL(aclk), \ - clock_frequency) || \ - DT_NODE_HAS_PROP(NODE_AUDIOPLL, \ - frequency) || \ - DT_NODE_HAS_PROP(NODE_AUDIO_AUXPLL, \ - nordic_frequency), \ - "Clock source ACLK requires one following defined frequency "\ - "properties: " \ - "hfclkaudio-frequency in the nordic,nrf-clock node, " \ - "clock-frequency in the aclk node, " \ - "frequency in the audiopll node, " \ - "nordic-frequency in the audio_auxpll node"); \ - DEVICE_DT_DEFINE(PDM(idx), pdm_nrfx_init##idx, NULL, \ - &dmic_nrfx_pdm_data##idx, &dmic_nrfx_pdm_cfg##idx, \ - POST_KERNEL, CONFIG_AUDIO_DMIC_INIT_PRIORITY, \ - &dmic_ops); - -#ifdef CONFIG_HAS_HW_NRF_PDM0 -PDM_NRFX_DEVICE(0); -#endif - -#ifdef CONFIG_HAS_HW_NRF_PDM20 -PDM_NRFX_DEVICE(20); -#endif - -#ifdef CONFIG_HAS_HW_NRF_PDM21 -PDM_NRFX_DEVICE(21); -#endif +#define PDM_CLK_SRC(inst) DT_STRING_TOKEN(DT_DRV_INST(inst), clock_source) + +#define PDM_NRFX_DEVICE(inst) \ + static void *rx_msgs##inst[DT_INST_PROP(inst, queue_size)]; \ + static void *mem_slab_msgs##inst[DT_INST_PROP(inst, queue_size)]; \ + static struct dmic_nrfx_pdm_drv_data dmic_nrfx_pdm_data##inst = { \ + .pdm = NRFX_PDM_INSTANCE(DT_INST_REG_ADDR(inst)), \ + }; \ + static int pdm_nrfx_init##inst(const struct device *dev) \ + { \ + IRQ_CONNECT(DT_INST_IRQN(inst), DT_INST_IRQ(inst, priority), nrfx_pdm_irq_handler, \ + &dmic_nrfx_pdm_data##inst.pdm, 0); \ + const struct dmic_nrfx_pdm_drv_cfg *drv_cfg = dev->config; \ + int err = pinctrl_apply_state(drv_cfg->pcfg, PINCTRL_STATE_DEFAULT); \ + if (err < 0) { \ + return err; \ + } \ + k_msgq_init(&dmic_nrfx_pdm_data##inst.rx_queue, (char *)rx_msgs##inst, \ + sizeof(void *), ARRAY_SIZE(rx_msgs##inst)); \ + k_msgq_init(&dmic_nrfx_pdm_data##inst.mem_slab_queue, (char *)mem_slab_msgs##inst, \ + sizeof(void *), ARRAY_SIZE(mem_slab_msgs##inst)); \ + init_clock_manager(dev); \ + return 0; \ + } \ + static void event_handler##inst(const nrfx_pdm_evt_t *evt) \ + { \ + event_handler(DEVICE_DT_INST_GET(inst), evt); \ + } \ + PINCTRL_DT_INST_DEFINE(inst); \ + static const struct dmic_nrfx_pdm_drv_cfg dmic_nrfx_pdm_cfg##inst = { \ + .event_handler = event_handler##inst, \ + .nrfx_def_cfg = NRFX_PDM_DEFAULT_CONFIG(0, 0), \ + .nrfx_def_cfg.skip_gpio_cfg = true, \ + .nrfx_def_cfg.skip_psel_cfg = true, \ + .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \ + .clk_src = PDM_CLK_SRC(inst), \ + .mem_reg = DMM_DEV_TO_REG(DT_DRV_INST(inst)), \ + }; \ + NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(DT_DRV_INST(inst)); \ + BUILD_ASSERT(PDM_CLK_SRC(inst) != ACLK || NRF_PDM_HAS_SELECTABLE_CLOCK, \ + "Clock source ACLK is not available."); \ + BUILD_ASSERT(PDM_CLK_SRC(inst) != ACLK || \ + DT_NODE_HAS_PROP(DT_NODELABEL(clock), hfclkaudio_frequency) || \ + DT_NODE_HAS_PROP(DT_NODELABEL(aclk), clock_frequency) || \ + DT_NODE_HAS_PROP(NODE_AUDIOPLL, frequency) || \ + DT_NODE_HAS_PROP(NODE_AUDIO_AUXPLL, nordic_frequency), \ + "Clock source ACLK requires one following defined frequency " \ + "properties: " \ + "hfclkaudio-frequency in the nordic,nrf-clock node, " \ + "clock-frequency in the aclk node, " \ + "frequency in the audiopll node, " \ + "nordic-frequency in the audio_auxpll node"); \ + DEVICE_DT_INST_DEFINE(inst, pdm_nrfx_init##inst, NULL, &dmic_nrfx_pdm_data##inst, \ + &dmic_nrfx_pdm_cfg##inst, POST_KERNEL, \ + CONFIG_AUDIO_DMIC_INIT_PRIORITY, &dmic_ops); + +DT_INST_FOREACH_STATUS_OKAY(PDM_NRFX_DEVICE) diff --git a/drivers/clock_control/CMakeLists.txt b/drivers/clock_control/CMakeLists.txt index f649af13c46e..3dfd7325621c 100644 --- a/drivers/clock_control/CMakeLists.txt +++ b/drivers/clock_control/CMakeLists.txt @@ -58,8 +58,14 @@ zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_FLL16M clock_cont zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF54H_HFXO clock_control_nrf54h_hfxo.c) zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_HSFLL_LOCAL clock_control_nrf_hsfll_local.c) zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_IRON_HSFLL_LOCAL clock_control_nrf_iron_hsfll_local.c) -zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_LFCLK clock_control_nrf_lfclk.c) +zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRFS_LFCLK clock_control_nrfs_lfclk.c) zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_AUXPLL clock_control_nrf_auxpll.c) +zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_HFCLK clock_control_nrf_hfclk.c) +zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_XO clock_control_nrf_xo.c) +zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_LFCLK clock_control_nrf_lfclk.c) +zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_HFCLK192M clock_control_nrf_hfclk192m.c) +zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_XO24M clock_control_nrf_xo24m.c) +zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_NRF_COMMON clock_control_nrf_common.c) zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_BOUFFALOLAB_BL60X clock_control_bl60x.c) zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_BOUFFALOLAB_BL61X clock_control_bl61x.c) zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_BOUFFALOLAB_BL70X clock_control_bl70x.c) @@ -129,3 +135,5 @@ endif() zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_AST10X0 clock_control_ast10x0.c) zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_MAX32 clock_control_max32.c) zephyr_library_sources_ifdef(CONFIG_CLOCK_CONTROL_WCH_RCC clock_control_wch_rcc.c) + +zephyr_linker_sources(SECTIONS clock_control_nrf_irq_handlers.ld) diff --git a/drivers/clock_control/Kconfig.nrf b/drivers/clock_control/Kconfig.nrf index a051ebd62b02..7dfc798f30a8 100644 --- a/drivers/clock_control/Kconfig.nrf +++ b/drivers/clock_control/Kconfig.nrf @@ -307,21 +307,54 @@ config CLOCK_CONTROL_NRF_IRON_HSFLL_LOCAL_DVFS_TIMEOUT_MS endif # CLOCK_CONTROL_NRF_IRON_HSFLL_LOCAL -config CLOCK_CONTROL_NRF_LFCLK +config CLOCK_CONTROL_NRFS_LFCLK bool "NRF LFCLK driver support" - depends on DT_HAS_NORDIC_NRF_LFCLK_ENABLED + depends on DT_HAS_NORDIC_NRFS_LFCLK_ENABLED select NRFS select NRFS_CLOCK_SERVICE_ENABLED select CLOCK_CONTROL_NRF2_COMMON default y -if CLOCK_CONTROL_NRF_LFCLK +if CLOCK_CONTROL_NRFS_LFCLK -config CLOCK_CONTROL_NRF_LFCLK_CLOCK_TIMEOUT_MS +config CLOCK_CONTROL_NRFS_LFCLK_CLOCK_TIMEOUT_MS int "Timeout waiting for nrfs clock service callback in milliseconds" default 1000 -endif # CLOCK_CONTROL_NRF_LFCLK +endif # CLOCK_CONTROL_NRFS_LFCLK + +config CLOCK_CONTROL_NRF_COMMON + bool + +config CLOCK_CONTROL_NRF_HFCLK + bool "NRF HFCLK driver support" + depends on DT_HAS_NORDIC_NRF_CLOCK_HFCLK_ENABLED + select CLOCK_CONTROL_NRF_COMMON + default y + +config CLOCK_CONTROL_NRF_XO + bool "NRF XO driver support" + depends on DT_HAS_NORDIC_NRF_CLOCK_XO_ENABLED + select CLOCK_CONTROL_NRF_COMMON + default y + +config CLOCK_CONTROL_NRF_LFCLK + bool "NRF LFCLK driver support" + depends on DT_HAS_NORDIC_NRF_CLOCK_LFCLK_ENABLED + select CLOCK_CONTROL_NRF_COMMON + default y + +config CLOCK_CONTROL_NRF_HFCLK192M + bool "NRF HFCLK192M driver support" + depends on DT_HAS_NORDIC_NRF_CLOCK_HFCLK192M_ENABLED + select CLOCK_CONTROL_NRF_COMMON + default y + +config CLOCK_CONTROL_NRF_XO24M + bool "NRF XO242M driver support" + depends on DT_HAS_NORDIC_NRF_CLOCK_XO24M_ENABLED + select CLOCK_CONTROL_NRF_COMMON + default y config CLOCK_CONTROL_NRF_AUXPLL bool "nRF Auxiliary PLL driver" diff --git a/drivers/clock_control/clock_control_nrf.c b/drivers/clock_control/clock_control_nrf.c index caa7aadff613..15f63180c652 100644 --- a/drivers/clock_control/clock_control_nrf.c +++ b/drivers/clock_control/clock_control_nrf.c @@ -10,11 +10,11 @@ #include #include #include "nrf_clock_calibration.h" +#include "clock_control_nrf_common.h" #include #include #include #include -#include LOG_MODULE_REGISTER(clock_control, CONFIG_CLOCK_CONTROL_LOG_LEVEL); @@ -317,7 +317,7 @@ static void hfclk_start(void) hf_start_tstamp = k_uptime_get(); } - nrfx_clock_hfclk_start(); + nrfx_clock_start(NRF_CLOCK_DOMAIN_HFCLK); } static void hfclk_stop(void) @@ -326,7 +326,7 @@ static void hfclk_stop(void) hf_stop_tstamp = k_uptime_get(); } - nrfx_clock_hfclk_stop(); + nrfx_clock_stop(NRF_CLOCK_DOMAIN_HFCLK); } #if NRF_CLOCK_HAS_HFCLK24M @@ -421,47 +421,6 @@ static void generic_hfclk_stop(void) irq_unlock(key); } - -void z_nrf_clock_bt_ctlr_hf_request(void) -{ - if (atomic_or(&hfclk_users, HF_USER_BT) & HF_USER_GENERIC) { - /* generic request already activated clock. */ - return; - } - - hfclk_start(); -} - -void z_nrf_clock_bt_ctlr_hf_release(void) -{ - /* It's not enough to use only atomic_and() here for synchronization, - * see the explanation in generic_hfclk_stop(). - */ - unsigned int key = irq_lock(); - - hfclk_users &= ~HF_USER_BT; - /* Skip stopping if generic is still requesting the clock. */ - if (!(hfclk_users & HF_USER_GENERIC)) { - struct nrf_clock_control_sub_data *sub_data = - get_sub_data(CLOCK_DEVICE, CLOCK_CONTROL_NRF_TYPE_HFCLK); - - /* State needs to be set to OFF as BT API does not call stop API which - * normally setting this state. - */ - sub_data->flags = CLOCK_CONTROL_STATUS_OFF; - hfclk_stop(); - } - - irq_unlock(key); -} - -#if DT_NODE_EXISTS(DT_NODELABEL(hfxo)) -uint32_t z_nrf_clock_bt_ctlr_hf_get_startup_time_us(void) -{ - return DT_PROP(DT_NODELABEL(hfxo), startup_time_us); -} -#endif - static int stop(const struct device *dev, clock_control_subsys_t subsys, uint32_t ctx) { @@ -579,129 +538,6 @@ static void onoff_start(struct onoff_manager *mgr, } } -/** @brief Wait for LF clock availability or stability. - * - * If LF clock source is SYNTH or RC then there is no distinction between - * availability and stability. In case of XTAL source clock, system is initially - * starting RC and then seamlessly switches to XTAL. Running RC means clock - * availability and running target source means stability, That is because - * significant difference in startup time (<1ms vs >200ms). - * - * In order to get event/interrupt when RC is ready (allowing CPU sleeping) two - * stage startup sequence is used. Initially, LF source is set to RC and when - * LFSTARTED event is handled it is reconfigured to the target source clock. - * This approach is implemented in nrfx_clock driver and utilized here. - * - * @param mode Start mode. - */ -static void lfclk_spinwait(enum nrf_lfclk_start_mode mode) -{ - static const nrf_clock_domain_t d = NRF_CLOCK_DOMAIN_LFCLK; - static const nrf_clock_lfclk_t target_type = - /* For sources XTAL, EXT_LOW_SWING, and EXT_FULL_SWING, - * NRF_CLOCK_LFCLK_XTAL is returned as the type of running clock. - */ - (IS_ENABLED(CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL) || - IS_ENABLED(CONFIG_CLOCK_CONTROL_NRF_K32SRC_EXT_LOW_SWING) || - IS_ENABLED(CONFIG_CLOCK_CONTROL_NRF_K32SRC_EXT_FULL_SWING)) - ? NRF_CLOCK_LFCLK_XTAL - : CLOCK_CONTROL_NRF_K32SRC; - nrf_clock_lfclk_t type; - - if ((mode == CLOCK_CONTROL_NRF_LF_START_AVAILABLE) && - (target_type == NRF_CLOCK_LFCLK_XTAL) && - (nrf_clock_lf_srccopy_get(NRF_CLOCK) == CLOCK_CONTROL_NRF_K32SRC)) { - /* If target clock source is using XTAL then due to two-stage - * clock startup sequence, RC might already be running. - * It can be determined by checking current LFCLK source. If it - * is set to the target clock source then it means that RC was - * started. - */ - return; - } - - bool isr_mode = k_is_in_isr() || k_is_pre_kernel(); - int key = isr_mode ? irq_lock() : 0; - - if (!isr_mode) { - nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_LF_STARTED_MASK); - } - - while (!(nrfx_clock_is_running(d, (void *)&type) - && ((type == target_type) - || (mode == CLOCK_CONTROL_NRF_LF_START_AVAILABLE)))) { - /* Synth source start is almost instant and LFCLKSTARTED may - * happen before calling idle. That would lead to deadlock. - */ - if (!IS_ENABLED(CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH)) { - if (isr_mode || !IS_ENABLED(CONFIG_MULTITHREADING)) { - k_cpu_atomic_idle(key); - } else { - k_msleep(1); - } - } - - /* Clock interrupt is locked, LFCLKSTARTED is handled here. */ - if ((target_type == NRF_CLOCK_LFCLK_XTAL) - && (nrf_clock_lf_src_get(NRF_CLOCK) == NRF_CLOCK_LFCLK_RC) - && nrf_clock_event_check(NRF_CLOCK, - NRF_CLOCK_EVENT_LFCLKSTARTED)) { - nrf_clock_event_clear(NRF_CLOCK, - NRF_CLOCK_EVENT_LFCLKSTARTED); - nrf_clock_lf_src_set(NRF_CLOCK, - CLOCK_CONTROL_NRF_K32SRC); - - /* Clear pending interrupt, otherwise new clock event - * would not wake up from idle. - */ - NVIC_ClearPendingIRQ(DT_INST_IRQN(0)); - nrf_clock_task_trigger(NRF_CLOCK, - NRF_CLOCK_TASK_LFCLKSTART); - } - } - - if (isr_mode) { - irq_unlock(key); - } else { - nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_LF_STARTED_MASK); - } -} - -void z_nrf_clock_control_lf_on(enum nrf_lfclk_start_mode start_mode) -{ - static atomic_t on; - static struct onoff_client cli; - - if (atomic_set(&on, 1) == 0) { - int err; - struct onoff_manager *mgr = - get_onoff_manager(CLOCK_DEVICE, - CLOCK_CONTROL_NRF_TYPE_LFCLK); - - sys_notify_init_spinwait(&cli.notify); - err = onoff_request(mgr, &cli); - __ASSERT_NO_MSG(err >= 0); - } - - /* In case of simulated board leave immediately. */ - if (IS_ENABLED(CONFIG_SOC_SERIES_BSIM_NRFXX)) { - return; - } - - switch (start_mode) { - case CLOCK_CONTROL_NRF_LF_START_AVAILABLE: - case CLOCK_CONTROL_NRF_LF_START_STABLE: - lfclk_spinwait(start_mode); - break; - - case CLOCK_CONTROL_NRF_LF_START_NOWAIT: - break; - - default: - __ASSERT_NO_MSG(false); - } -} - static void clock_event_handler(nrfx_clock_evt_type_t event) { const struct device *dev = CLOCK_DEVICE; @@ -811,9 +647,7 @@ static int clk_init(const struct device *dev) #if NRF_LFRC_HAS_CALIBRATION IRQ_CONNECT(LFRC_IRQn, DT_INST_IRQ(0, priority), nrfx_isr, nrfx_power_clock_irq_handler, 0); #endif - - IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority), - nrfx_isr, nrfx_power_clock_irq_handler, 0); + clock_control_nrf_common_connect_irq(); nrfx_err = nrfx_clock_init(clock_event_handler); if (nrfx_err != NRFX_SUCCESS) { diff --git a/drivers/clock_control/clock_control_nrf_common.c b/drivers/clock_control/clock_control_nrf_common.c new file mode 100644 index 000000000000..8c7b5aab17f1 --- /dev/null +++ b/drivers/clock_control/clock_control_nrf_common.c @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2025 Nordic Semiconductor ASA + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "clock_control_nrf_common.h" +#include +#include + +#if NRFX_CHECK(NRFX_POWER_ENABLED) +#include +#endif + +#define DT_DRV_COMPAT nordic_nrf_clock + +static bool irq_connected; + +static void clock_irq_handler(void) +{ +#if NRFX_CHECK(NRFX_POWER_ENABLED) + nrfx_power_irq_handler(); +#endif + + STRUCT_SECTION_FOREACH(clock_control_nrf_irq_handler, irq) { + irq->handler(); + } + + /* temporary fix, it will be removed when all the clocks are moved to their files */ + nrfx_clock_irq_handler(); +} + +void clock_control_nrf_common_connect_irq(void) +{ + if (irq_connected) { + return; + } + irq_connected = true; + +#if NRF_LFRC_HAS_CALIBRATION + IRQ_CONNECT(LFRC_IRQn, DT_INST_IRQ(0, priority), nrfx_isr, clock_irq_handler, 0); +#endif + + IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority), nrfx_isr, clock_irq_handler, 0); +} diff --git a/drivers/clock_control/clock_control_nrf_common.h b/drivers/clock_control/clock_control_nrf_common.h new file mode 100644 index 000000000000..4d8e08b7bc8c --- /dev/null +++ b/drivers/clock_control/clock_control_nrf_common.h @@ -0,0 +1,20 @@ +/* + * Copyright (c) 2025 Nordic Semiconductor ASA + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef CLOCK_CONTROL_NRF_COMMON_H__ +#define CLOCK_CONTROL_NRF_COMMON_H__ + +struct clock_control_nrf_irq_handler { + void (*handler)(void); /* Clock interrupt handler */ +}; + +#define CLOCK_CONTROL_NRF_IRQ_HANDLERS_ITERABLE(name, _a) \ + STRUCT_SECTION_ITERABLE(clock_control_nrf_irq_handler, name) = { \ + .handler = _a, \ + } + +void clock_control_nrf_common_connect_irq(void); + +#endif /* CLOCK_CONTROL_NRF_COMMON_H__ */ diff --git a/drivers/clock_control/clock_control_nrf_hfclk.c b/drivers/clock_control/clock_control_nrf_hfclk.c new file mode 100644 index 000000000000..b935a54a4369 --- /dev/null +++ b/drivers/clock_control/clock_control_nrf_hfclk.c @@ -0,0 +1,446 @@ +/* + * Copyright (c) 2025 Nordic Semiconductor ASA + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include +#include "nrf_clock_calibration.h" +#include +#include +#include +#include +#include +#include "clock_control_nrf_common.h" + +LOG_MODULE_REGISTER(clock_control_hfclk, CONFIG_CLOCK_CONTROL_LOG_LEVEL); + +#define DT_DRV_COMPAT nordic_nrf_clock_hfclk + +#define CLOCK_DEVICE_HFCLK DEVICE_DT_GET(DT_NODELABEL(hfclk)) + +#define CTX_ONOFF BIT(6) +#define CTX_API BIT(7) +#define CTX_MASK (CTX_ONOFF | CTX_API) + +#define STATUS_MASK 0x7 +#define GET_STATUS(flags) (flags & STATUS_MASK) +#define GET_CTX(flags) (flags & CTX_MASK) + +/* Used only by HF clock */ +#define HF_USER_BT BIT(0) +#define HF_USER_GENERIC BIT(1) + +/* Helper logging macros which prepends hfclk name to the log. */ +#ifdef CONFIG_LOG +#define CLOCK_LOG(lvl, dev, ...) \ + LOG_##lvl("%s: " GET_ARG_N(1, __VA_ARGS__), \ + "hfclk" COND_CODE_0(NUM_VA_ARGS_LESS_1(__VA_ARGS__), \ + (), (, GET_ARGS_LESS_N(1, __VA_ARGS__)))) +#else +#define CLOCK_LOG(...) +#endif + +#define ERR(dev, ...) CLOCK_LOG(ERR, dev, __VA_ARGS__) +#define WRN(dev, ...) CLOCK_LOG(WRN, dev, __VA_ARGS__) +#define INF(dev, ...) CLOCK_LOG(INF, dev, __VA_ARGS__) +#define DBG(dev, ...) CLOCK_LOG(DBG, dev, __VA_ARGS__) + +typedef void (*clk_ctrl_func_t)(void); + +typedef struct { + struct onoff_manager mgr; + clock_control_cb_t cb; + void *user_data; + uint32_t flags; +} hfclk_data_t; + +typedef struct { + clk_ctrl_func_t start; /* Clock start function */ + clk_ctrl_func_t stop; /* Clock stop function */ +#ifdef CONFIG_LOG + const char *name; +#endif +} hfclk_config_t; + +static atomic_t hfclk_users; +static uint64_t hf_start_tstamp; +static uint64_t hf_stop_tstamp; + +static int set_starting_state(uint32_t *flags, uint32_t ctx) +{ + int err = 0; + unsigned int key = irq_lock(); + uint32_t current_ctx = GET_CTX(*flags); + + if ((*flags & (STATUS_MASK)) == CLOCK_CONTROL_STATUS_OFF) { + *flags = CLOCK_CONTROL_STATUS_STARTING | ctx; + } else if (current_ctx != ctx) { + err = -EPERM; + } else { + err = -EALREADY; + } + + irq_unlock(key); + + return err; +} + +static int async_start(const struct device *dev, clock_control_cb_t cb, void *user_data, + uint32_t ctx) +{ + int err; + + err = set_starting_state(&((hfclk_data_t *)dev->data)->flags, ctx); + if (err < 0) { + return err; + } + + ((hfclk_data_t *)dev->data)->cb = cb; + ((hfclk_data_t *)dev->data)->user_data = user_data; + + ((hfclk_config_t *)dev->config)->start(); + + return 0; +} + +static int set_off_state(uint32_t *flags, uint32_t ctx) +{ + int err = 0; + unsigned int key = irq_lock(); + uint32_t current_ctx = GET_CTX(*flags); + + if ((current_ctx != 0) && (current_ctx != ctx)) { + err = -EPERM; + } else { + *flags = CLOCK_CONTROL_STATUS_OFF; + } + + irq_unlock(key); + + return err; +} + +static void hfclk_start(void) +{ + if (IS_ENABLED(CONFIG_CLOCK_CONTROL_NRF_SHELL)) { + hf_start_tstamp = k_uptime_get(); + } + + nrfx_clock_hfclk_start(); +} + +static void hfclk_stop(void) +{ + if (IS_ENABLED(CONFIG_CLOCK_CONTROL_NRF_SHELL)) { + hf_stop_tstamp = k_uptime_get(); + } + + nrfx_clock_hfclk_stop(); +} + +static int stop(const struct device *dev, uint32_t ctx) +{ + int err; + + err = set_off_state(&((hfclk_data_t *)dev->data)->flags, ctx); + if (err < 0) { + return err; + } + + ((hfclk_config_t *)dev->config)->stop(); + + return 0; +} + +static void onoff_started_callback(const struct device *dev, clock_control_subsys_t sys, + void *user_data) +{ + ARG_UNUSED(sys); + + onoff_notify_fn notify = user_data; + + notify(&((hfclk_data_t *)dev->data)->mgr, 0); +} + +static void onoff_start(struct onoff_manager *mgr, onoff_notify_fn notify) +{ + int err; + + err = async_start(CLOCK_DEVICE_HFCLK, onoff_started_callback, notify, CTX_ONOFF); + if (err < 0) { + notify(mgr, err); + } +} + +static void onoff_stop(struct onoff_manager *mgr, onoff_notify_fn notify) +{ + int res; + + res = stop(CLOCK_DEVICE_HFCLK, CTX_ONOFF); + notify(mgr, res); +} + +static void set_on_state(uint32_t *flags) +{ + unsigned int key = irq_lock(); + + *flags = CLOCK_CONTROL_STATUS_ON | GET_CTX(*flags); + irq_unlock(key); +} + +static void clkstarted_handle(const struct device *dev) +{ + clock_control_cb_t callback = ((hfclk_data_t *)dev->data)->cb; + + ((hfclk_data_t *)dev->data)->cb = NULL; + set_on_state(&((hfclk_data_t *)dev->data)->flags); + DBG(dev, "Clock started"); + + if (callback) { + callback(dev, NULL, ((hfclk_data_t *)dev->data)->user_data); + } +} + +static void clock_event_handler(void) +{ + const struct device *dev = CLOCK_DEVICE_HFCLK; + + /* Check needed due to anomaly 201: + * HFCLKSTARTED may be generated twice. + */ + if (GET_STATUS(((hfclk_data_t *)dev->data)->flags) == CLOCK_CONTROL_STATUS_STARTING) { + clkstarted_handle(dev); + } +} + +static void generic_hfclk_start(void) +{ + nrf_clock_hfclk_t type; + bool already_started = false; + unsigned int key = irq_lock(); + + hfclk_users |= HF_USER_GENERIC; + if (hfclk_users & HF_USER_BT) { + (void)nrfx_clock_hfclk_running_check(&type); + if (type == NRF_CLOCK_HFCLK_HIGH_ACCURACY) { + already_started = true; + /* Set on state in case clock interrupt comes and we + * want to avoid handling that. + */ + + set_on_state(&((hfclk_data_t *)CLOCK_DEVICE_HFCLK->data)->flags); + } + } + + irq_unlock(key); + + if (already_started) { + /* Clock already started by z_nrf_clock_bt_ctlr_hf_request */ + clkstarted_handle(CLOCK_DEVICE_HFCLK); + return; + } + + hfclk_start(); +} + +static void generic_hfclk_stop(void) +{ + /* It's not enough to use only atomic_and() here for synchronization, + * as the thread could be preempted right after that function but + * before hfclk_stop() is called and the preempting code could request + * the HFCLK again. Then, the HFCLK would be stopped inappropriately + * and hfclk_user would be left with an incorrect value. + */ + unsigned int key = irq_lock(); + + hfclk_users &= ~HF_USER_GENERIC; + /* Skip stopping if BT is still requesting the clock. */ + if (!(hfclk_users & HF_USER_BT)) { + hfclk_stop(); + } + + irq_unlock(key); +} + +static void blocking_start_callback(const struct device *dev, clock_control_subsys_t subsys, + void *user_data) +{ + struct k_sem *sem = user_data; + + k_sem_give(sem); +} + +void z_nrf_clock_bt_ctlr_hf_request(void) +{ + if (atomic_or(&hfclk_users, HF_USER_BT) & HF_USER_GENERIC) { + /* generic request already activated clock. */ + return; + } + + hfclk_start(); +} + +void z_nrf_clock_bt_ctlr_hf_release(void) +{ + /* It's not enough to use only atomic_and() here for synchronization, + * see the explanation in generic_hfclk_stop(). + */ + unsigned int key = irq_lock(); + + hfclk_users &= ~HF_USER_BT; + /* Skip stopping if generic is still requesting the clock. */ + if (!(hfclk_users & HF_USER_GENERIC)) { + + /* State needs to be set to OFF as BT API does not call stop API which + * normally setting this state. + */ + ((hfclk_data_t *)CLOCK_DEVICE_HFCLK->data)->flags = CLOCK_CONTROL_STATUS_OFF; + hfclk_stop(); + } + + irq_unlock(key); +} + +#if DT_NODE_EXISTS(DT_NODELABEL(hfxo)) +uint32_t z_nrf_clock_bt_ctlr_hf_get_startup_time_us(void) +{ + return DT_PROP(DT_NODELABEL(hfxo), startup_time_us); +} +#endif + +static int api_start(const struct device *dev, clock_control_subsys_t subsys, clock_control_cb_t cb, + void *user_data) +{ + ARG_UNUSED(subsys); + + return async_start(dev, cb, user_data, CTX_API); +} + +static int api_blocking_start(const struct device *dev, + clock_control_subsys_t subsys) +{ + struct k_sem sem = Z_SEM_INITIALIZER(sem, 0, 1); + int err; + + if (!IS_ENABLED(CONFIG_MULTITHREADING)) { + return -ENOTSUP; + } + + err = api_start(dev, subsys, blocking_start_callback, &sem); + if (err < 0) { + return err; + } + + return k_sem_take(&sem, K_MSEC(500)); +} + +static int api_stop(const struct device *dev, clock_control_subsys_t subsys) +{ + ARG_UNUSED(subsys); + + return stop(dev, CTX_API); +} + +static enum clock_control_status api_get_status(const struct device *dev, + clock_control_subsys_t subsys) +{ + ARG_UNUSED(subsys); + + return GET_STATUS(((hfclk_data_t *)dev->data)->flags); +} + +static int api_request(const struct device *dev, + const struct nrf_clock_spec *spec, + struct onoff_client *cli) +{ + hfclk_data_t *dev_data = dev->data; + + ARG_UNUSED(spec); + + return onoff_request(&dev_data->mgr, cli); +} + +static int api_release(const struct device *dev, + const struct nrf_clock_spec *spec) +{ + hfclk_data_t *dev_data = dev->data; + + ARG_UNUSED(spec); + + return onoff_release(&dev_data->mgr); +} + +static int api_cancel_or_release(const struct device *dev, + const struct nrf_clock_spec *spec, + struct onoff_client *cli) +{ + hfclk_data_t *dev_data = dev->data; + + ARG_UNUSED(spec); + + return onoff_cancel_or_release(&dev_data->mgr, cli); +} + +static int clk_init(const struct device *dev) +{ + nrfx_err_t nrfx_err; + int err; + static const struct onoff_transitions transitions = { + .start = onoff_start, + .stop = onoff_stop + }; + + clock_control_nrf_common_connect_irq(); + + nrfx_err = nrfx_clock_hfclk_init(clock_event_handler); + if (nrfx_err != NRFX_SUCCESS) { + return -EIO; + } + + if (IS_ENABLED(CONFIG_CLOCK_CONTROL_NRF_DRIVER_CALIBRATION)) { + hfclk_data_t *data = ((hfclk_data_t *)dev->data); + + z_nrf_clock_calibration_init(&data->mgr); + } + + err = onoff_manager_init(&((hfclk_data_t *)dev->data)->mgr, + &transitions); + if (err < 0) { + return err; + } + + ((hfclk_data_t *)dev->data)->flags = CLOCK_CONTROL_STATUS_OFF; + + return 0; +} + +CLOCK_CONTROL_NRF_IRQ_HANDLERS_ITERABLE(clock_control_nrf_hfclk, + &nrfx_clock_hfclk_irq_handler); + +static DEVICE_API(nrf_clock_control, clock_control_api) = { + .std_api = { + .on = api_blocking_start, + .off = api_stop, + .async_on = api_start, + .get_status = api_get_status, + }, + .request = api_request, + .release = api_release, + .cancel_or_release = api_cancel_or_release, +}; + +static hfclk_data_t data; + +static const hfclk_config_t config = { + .start = generic_hfclk_start, + .stop = generic_hfclk_stop, + IF_ENABLED(CONFIG_LOG, (.name = "hfclk",)) +}; + +DEVICE_DT_DEFINE(DT_NODELABEL(hfclk), clk_init, NULL, + &data, &config, + PRE_KERNEL_1, CONFIG_CLOCK_CONTROL_INIT_PRIORITY, + &clock_control_api); diff --git a/drivers/clock_control/clock_control_nrf_hfclk192m.c b/drivers/clock_control/clock_control_nrf_hfclk192m.c new file mode 100644 index 000000000000..ca56d4f20cd3 --- /dev/null +++ b/drivers/clock_control/clock_control_nrf_hfclk192m.c @@ -0,0 +1,337 @@ +/* + * Copyright (c) 2016-2020 Nordic Semiconductor ASA + * Copyright (c) 2016 Vinayak Kariappa Chettimada + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include +#include "nrf_clock_calibration.h" +#include "clock_control_nrf_common.h" +#include +#include +#include +#include +#include + +LOG_MODULE_REGISTER(clock_control_hfclk192m, CONFIG_CLOCK_CONTROL_LOG_LEVEL); + +#define DT_DRV_COMPAT nordic_nrf_clock_hfclk192m + +#define CLOCK_DEVICE_HFCLK192M DEVICE_DT_GET(DT_NODELABEL(hfclk192m)) + +#define CTX_ONOFF BIT(6) +#define CTX_API BIT(7) +#define CTX_MASK (CTX_ONOFF | CTX_API) + +#define STATUS_MASK 0x7 +#define GET_STATUS(flags) (flags & STATUS_MASK) +#define GET_CTX(flags) (flags & CTX_MASK) + +/* Helper logging macros. */ +#ifdef CONFIG_LOG +#define CLOCK_LOG(lvl, dev, ...) \ + LOG_##lvl("%s: " GET_ARG_N(1, __VA_ARGS__), \ + "hfclk192m" \ + COND_CODE_0(NUM_VA_ARGS_LESS_1(__VA_ARGS__),\ + (), (, GET_ARGS_LESS_N(1, __VA_ARGS__)))) +#else +#define CLOCK_LOG(...) +#endif + +#define ERR(dev, ...) CLOCK_LOG(ERR, dev, __VA_ARGS__) +#define WRN(dev, ...) CLOCK_LOG(WRN, dev, __VA_ARGS__) +#define INF(dev, ...) CLOCK_LOG(INF, dev, __VA_ARGS__) +#define DBG(dev, ...) CLOCK_LOG(DBG, dev, __VA_ARGS__) + +typedef void (*clk_ctrl_func_t)(void); + +typedef struct { + struct onoff_manager mgr; + clock_control_cb_t cb; + void *user_data; + uint32_t flags; +} hfclk192m_data_t; + +typedef struct { + clk_ctrl_func_t start; /* Clock start function */ + clk_ctrl_func_t stop; /* Clock stop function */ +} hfclk192m_config_t; + +static int set_off_state(uint32_t *flags, uint32_t ctx) +{ + int err = 0; + unsigned int key = irq_lock(); + uint32_t current_ctx = GET_CTX(*flags); + + if ((current_ctx != 0) && (current_ctx != ctx)) { + err = -EPERM; + } else { + *flags = CLOCK_CONTROL_STATUS_OFF; + } + + irq_unlock(key); + + return err; +} + +static int set_starting_state(uint32_t *flags, uint32_t ctx) +{ + int err = 0; + unsigned int key = irq_lock(); + uint32_t current_ctx = GET_CTX(*flags); + + if ((*flags & (STATUS_MASK)) == CLOCK_CONTROL_STATUS_OFF) { + *flags = CLOCK_CONTROL_STATUS_STARTING | ctx; + } else if (current_ctx != ctx) { + err = -EPERM; + } else { + err = -EALREADY; + } + + irq_unlock(key); + + return err; +} + +static void set_on_state(uint32_t *flags) +{ + unsigned int key = irq_lock(); + + *flags = CLOCK_CONTROL_STATUS_ON | GET_CTX(*flags); + irq_unlock(key); +} + +static void clkstarted_handle(const struct device *dev) +{ + clock_control_cb_t callback = ((hfclk192m_data_t *)dev->data)->cb; + + ((hfclk192m_data_t *)dev->data)->cb = NULL; + set_on_state(&((hfclk192m_data_t *)dev->data)->flags); + DBG(dev, "Clock started"); + + if (callback) { + callback(dev, NULL, (hfclk192m_data_t *)dev->data)->user_data); + } +} + +static void hfclk192m_start(void) +{ + nrfx_clock_hfclk192m_start(); +} + +static void hfclk192m_stop(void) +{ + nrfx_clock_hfclk192m_stop(); +} + +static int stop(const struct device *dev, uint32_t ctx) +{ + int err; + + err = set_off_state(&((hfclk192m_data_t *)dev->data)->flags, ctx); + if (err < 0) { + return err; + } + + ((hfclk192m_config_t *)dev->config)->stop(); + + return 0; +} + +static int async_start(const struct device *dev, clock_control_cb_t cb, void *user_data, + uint32_t ctx) +{ + int err; + + err = set_starting_state(&((hfclk192m_data_t *)dev->data)->flags, ctx); + if (err < 0) { + return err; + } + + ((hfclk192m_data_t *)dev->data)->cb = cb; + ((hfclk192m_data_t *)dev->data)->user_data = user_data; + + ((hfclk192m_config_t *)dev->config)->start(); + + return 0; +} + +static void blocking_start_callback(const struct device *dev, + clock_control_subsys_t subsys, + void *user_data) +{ + ARG_UNUSED(subsys); + + struct k_sem *sem = user_data; + + k_sem_give(sem); +} + +static void onoff_stop(struct onoff_manager *mgr, + onoff_notify_fn notify) +{ + int res; + + res = stop(CLOCK_DEVICE_HFCLK192M, CTX_ONOFF); + notify(mgr, res); +} + +static void onoff_started_callback(const struct device *dev, + clock_control_subsys_t sys, + void *user_data) +{ + ARG_UNUSED(sys); + + onoff_notify_fn notify = user_data; + + notify(&((hfclk192m_data_t *)dev->data)->mgr, 0); +} + +static void onoff_start(struct onoff_manager *mgr, + onoff_notify_fn notify) +{ + int err; + + err = async_start(CLOCK_DEVICE_HFCLK192M, onoff_started_callback, notify, CTX_ONOFF); + if (err < 0) { + notify(mgr, err); + } +} + +static void clock_event_handler(void) +{ + const struct device *dev = CLOCK_DEVICE_HFCLK192M; + + clkstarted_handle(dev); +} + +static int api_start(const struct device *dev, clock_control_subsys_t subsys, + clock_control_cb_t cb, void *user_data) +{ + ARG_UNUSED(subsys); + + return async_start(dev, cb, user_data, CTX_API); +} + +static int api_blocking_start(const struct device *dev, + clock_control_subsys_t subsys) +{ + struct k_sem sem = Z_SEM_INITIALIZER(sem, 0, 1); + int err; + + if (!IS_ENABLED(CONFIG_MULTITHREADING)) { + return -ENOTSUP; + } + + err = api_start(dev, subsys, blocking_start_callback, &sem); + if (err < 0) { + return err; + } + + return k_sem_take(&sem, K_MSEC(500)); +} + +static int api_stop(const struct device *dev, clock_control_subsys_t subsys) +{ + ARG_UNUSED(subsys); + + return stop(dev, CTX_API); +} + +static enum clock_control_status api_get_status(const struct device *dev, + clock_control_subsys_t subsys) +{ + ARG_UNUSED(subsys); + + return GET_STATUS(((hfclk192m_data_t *)dev->data)->flags); +} + +static int api_request(const struct device *dev, + const struct nrf_clock_spec *spec, + struct onoff_client *cli) +{ + hfclk192m_data_t *dev_data = dev->data; + + ARG_UNUSED(spec); + + return onoff_request(&dev_data->mgr, cli); +} + +static int api_release(const struct device *dev, + const struct nrf_clock_spec *spec) +{ + hfclk192m_data_t *dev_data = dev->data; + + ARG_UNUSED(spec); + + return onoff_release(&dev_data->mgr); +} + +static int api_cancel_or_release(const struct device *dev, + const struct nrf_clock_spec *spec, + struct onoff_client *cli) +{ + hfclk192m_data_t *dev_data = dev->data; + + ARG_UNUSED(spec); + + return onoff_cancel_or_release(&dev_data->mgr, cli); +} + +static int clk_init(const struct device *dev) +{ + nrfx_err_t nrfx_err; + int err; + static const struct onoff_transitions transitions = { + .start = onoff_start, + .stop = onoff_stop + }; + + clock_control_nrf_common_connect_irq(); + + nrfx_err = nrfx_clock_hfclk192m_init(clock_event_handler); + if (nrfx_err != NRFX_SUCCESS) { + return -EIO; + } + + err = onoff_manager_init(&((hfclk192m_data_t *)dev->data)->mgr, + &transitions); + if (err < 0) { + return err; + } + + ((hfclk192m_data_t *)dev->data)->flags = CLOCK_CONTROL_STATUS_OFF; + + return 0; +} + +CLOCK_CONTROL_NRF_IRQ_HANDLERS_ITERABLE(clock_control_nrf_hfclk192m, + &nrfx_clock_hfclk192m_irq_handler); + +static DEVICE_API(nrf_clock_control, clock_control_api) = { + .std_api = { + .on = api_blocking_start, + .off = api_stop, + .async_on = api_start, + .get_status = api_get_status, + }, + .request = api_request, + .release = api_release, + .cancel_or_release = api_cancel_or_release, +}; + +static hfclk192m_data_t data; + +static const hfclk192m_config_t config = { + .start = hfclk192m_start, + .stop = hfclk192m_stop, +}; + +DEVICE_DT_DEFINE(DT_NODELABEL(hfclk192m), clk_init, NULL, + &data, &config, + PRE_KERNEL_1, CONFIG_CLOCK_CONTROL_INIT_PRIORITY, + &clock_control_api); diff --git a/drivers/clock_control/clock_control_nrf_irq_handlers.ld b/drivers/clock_control/clock_control_nrf_irq_handlers.ld new file mode 100644 index 000000000000..0836263fa577 --- /dev/null +++ b/drivers/clock_control/clock_control_nrf_irq_handlers.ld @@ -0,0 +1,2 @@ +#include +ITERABLE_SECTION_ROM(clock_control_nrf_irq_handler, Z_LINK_ITERABLE_SUBALIGN) diff --git a/drivers/clock_control/clock_control_nrf_lfclk.c b/drivers/clock_control/clock_control_nrf_lfclk.c index 9551fb4e6361..a8930b9d43b8 100644 --- a/drivers/clock_control/clock_control_nrf_lfclk.c +++ b/drivers/clock_control/clock_control_nrf_lfclk.c @@ -1,436 +1,525 @@ /* - * Copyright (c) 2024 Nordic Semiconductor ASA + * Copyright (c) 2016-2025 Nordic Semiconductor ASA + * Copyright (c) 2016 Vinayak Kariappa Chettimada + * * SPDX-License-Identifier: Apache-2.0 */ -#define DT_DRV_COMPAT nordic_nrf_lfclk - -#include "clock_control_nrf2_common.h" -#include +#include +#include +#include #include -#include -#include - +#include "nrf_clock_calibration.h" +#include "clock_control_nrf_common.h" +#include #include -LOG_MODULE_DECLARE(clock_control_nrf2, CONFIG_CLOCK_CONTROL_LOG_LEVEL); - -BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) == 1, - "multiple instances not supported"); +#include +#include +#include + +LOG_MODULE_REGISTER(clock_control_lfclk, CONFIG_CLOCK_CONTROL_LOG_LEVEL); + +#define DT_DRV_COMPAT nordic_nrf_clock_lfclk + +#define CTX_ONOFF BIT(6) +#define CTX_API BIT(7) +#define CTX_MASK (CTX_ONOFF | CTX_API) + +#define STATUS_MASK 0x7 +#define GET_STATUS(flags) (flags & STATUS_MASK) +#define GET_CTX(flags) (flags & CTX_MASK) + +/* Helper logging macros which prepends subsys name to the log. */ +#ifdef CONFIG_LOG +#define CLOCK_LOG(lvl, dev, ...) \ + LOG_##lvl("%s: " GET_ARG_N(1, __VA_ARGS__), \ + "lfclk" \ + COND_CODE_0(NUM_VA_ARGS_LESS_1(__VA_ARGS__),\ + (), (, GET_ARGS_LESS_N(1, __VA_ARGS__)))) +#else +#define CLOCK_LOG(...) +#endif + +#define ERR(dev, ...) CLOCK_LOG(ERR, dev, __VA_ARGS__) +#define WRN(dev, ...) CLOCK_LOG(WRN, dev, __VA_ARGS__) +#define INF(dev, ...) CLOCK_LOG(INF, dev, __VA_ARGS__) +#define DBG(dev, ...) CLOCK_LOG(DBG, dev, __VA_ARGS__) + +#define CLOCK_DEVICE_LFCLK DEVICE_DT_GET_ONE(nordic_nrf_clock_lfclk) +#if NRF_CLOCK_HAS_HFCLK +#define CLOCK_DEVICE_HF DEVICE_DT_GET_ONE(nordic_nrf_clock_hfclk) +#else /* NRF_CLOCK_HAS_XO */ +#define CLOCK_DEVICE_HF DEVICE_DT_GET_ONE(nordic_nrf_clock_xo) +#endif + +typedef void (*clk_ctrl_func_t)(void); + +typedef struct { + struct onoff_manager mgr; + clock_control_cb_t cb; + void *user_data; + uint32_t flags; +} lfclk_data_t; + +typedef struct { + clk_ctrl_func_t start; /* Clock start function */ + clk_ctrl_func_t stop; /* Clock stop function */ +#ifdef CONFIG_LOG + const char *name; +#endif +} lfclk_config_t; + +#if CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH +/* Client to request HFXO to synthesize low frequency clock. */ +static struct onoff_client lfsynth_cli; +#endif + +static int set_off_state(uint32_t *flags, uint32_t ctx) +{ + int err = 0; + unsigned int key = irq_lock(); + uint32_t current_ctx = GET_CTX(*flags); -#define LFCLK_HFXO_NODE DT_INST_PHANDLE_BY_NAME(0, clocks, hfxo) + if ((current_ctx != 0) && (current_ctx != ctx)) { + err = -EPERM; + } else { + *flags = CLOCK_CONTROL_STATUS_OFF; + } -#define LFCLK_LFRC_ACCURACY DT_INST_PROP(0, lfrc_accuracy_ppm) -#define LFCLK_HFXO_ACCURACY DT_PROP(LFCLK_HFXO_NODE, accuracy_ppm) -#define LFCLK_LFLPRC_STARTUP_TIME_US DT_INST_PROP(0, lflprc_startup_time_us) -#define LFCLK_LFRC_STARTUP_TIME_US DT_INST_PROP(0, lfrc_startup_time_us) + irq_unlock(key); -#define LFCLK_MAX_OPTS 4 -#define LFCLK_DEF_OPTS 2 + return err; +} -#define NRFS_CLOCK_TIMEOUT K_MSEC(CONFIG_CLOCK_CONTROL_NRF_LFCLK_CLOCK_TIMEOUT_MS) +static int set_starting_state(uint32_t *flags, uint32_t ctx) +{ + int err = 0; + unsigned int key = irq_lock(); + uint32_t current_ctx = GET_CTX(*flags); + + if ((*flags & (STATUS_MASK)) == CLOCK_CONTROL_STATUS_OFF) { + *flags = CLOCK_CONTROL_STATUS_STARTING | ctx; + } else if (current_ctx != ctx) { + err = -EPERM; + } else { + err = -EALREADY; + } -#define BICR (NRF_BICR_Type *)DT_REG_ADDR(DT_NODELABEL(bicr)) + irq_unlock(key); -/* Clock options sorted from highest to lowest power consumption. - * - Clock synthesized from a high frequency clock - * - Internal RC oscillator - * - External clock. These are inserted into the list at driver initialization. - * Set to one of the following: - * - XTAL. Low or High precision - * - External sine or square wave - */ -static struct clock_options { - uint16_t accuracy : 15; - uint16_t precision : 1; - nrfs_clock_src_t src; -} clock_options[LFCLK_MAX_OPTS] = { - { - /* NRFS will request FLL16M use HFXO in bypass mode if SYNTH src is used */ - .accuracy = LFCLK_HFXO_ACCURACY, - .precision = 1, - .src = NRFS_CLOCK_SRC_LFCLK_SYNTH, - }, - { - .accuracy = LFCLK_LFRC_ACCURACY, - .precision = 0, - .src = NRFS_CLOCK_SRC_LFCLK_LFRC, - }, - /* Remaining options are populated on lfclk_init */ -}; + return err; +} -struct lfclk_dev_data { - STRUCT_CLOCK_CONFIG(lfclk, ARRAY_SIZE(clock_options)) clk_cfg; - struct k_timer timer; - uint16_t max_accuracy; - uint8_t clock_options_cnt; - uint32_t hfxo_startup_time_us; - uint32_t lfxo_startup_time_us; -}; +static void set_on_state(uint32_t *flags) +{ + unsigned int key = irq_lock(); -struct lfclk_dev_config { - uint32_t fixed_frequency; -}; + *flags = CLOCK_CONTROL_STATUS_ON | GET_CTX(*flags); + irq_unlock(key); +} -static int lfosc_get_accuracy(uint16_t *accuracy) +static void clkstarted_handle(const struct device *dev) { - switch (nrf_bicr_lfosc_accuracy_get(BICR)) { - case NRF_BICR_LFOSC_ACCURACY_500PPM: - *accuracy = 500U; - break; - case NRF_BICR_LFOSC_ACCURACY_250PPM: - *accuracy = 250U; - break; - case NRF_BICR_LFOSC_ACCURACY_150PPM: - *accuracy = 150U; - break; - case NRF_BICR_LFOSC_ACCURACY_100PPM: - *accuracy = 100U; - break; - case NRF_BICR_LFOSC_ACCURACY_75PPM: - *accuracy = 75U; - break; - case NRF_BICR_LFOSC_ACCURACY_50PPM: - *accuracy = 50U; - break; - case NRF_BICR_LFOSC_ACCURACY_30PPM: - *accuracy = 30U; - break; - case NRF_BICR_LFOSC_ACCURACY_20PPM: - *accuracy = 20U; - break; - default: - return -EINVAL; + clock_control_cb_t callback = ((lfclk_data_t *)dev->data)->cb; + void *user_data = ((lfclk_data_t *)dev->data)->user_data; + + ((lfclk_data_t *)dev->data)->cb = NULL; + set_on_state(&((lfclk_data_t *)dev->data)->flags); + DBG(dev, "Clock started"); + + if (callback) { + callback(dev, NULL, user_data); } +} - return 0; +static inline void anomaly_132_workaround(void) +{ +#if (CONFIG_NRF52_ANOMALY_132_DELAY_US - 0) + static bool once; + + if (!once) { + k_busy_wait(CONFIG_NRF52_ANOMALY_132_DELAY_US); + once = true; + } +#endif } -static void clock_evt_handler(nrfs_clock_evt_t const *p_evt, void *context) +static void lfclk_start(void) { - struct lfclk_dev_data *dev_data = context; - int status = 0; + if (IS_ENABLED(CONFIG_NRF52_ANOMALY_132_WORKAROUND)) { + anomaly_132_workaround(); + } + +#if CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH + sys_notify_init_spinwait(&lfsynth_cli.notify); - k_timer_stop(&dev_data->timer); + (void)nrf_clock_control_request(CLOCK_DEVICE_HF, NULL, &lfsynth_cli); +#endif + + nrfx_clock_lfclk_start(); +} - if (p_evt->type == NRFS_CLOCK_EVT_REJECT) { - status = -ENXIO; +static void lfclk_stop(void) +{ + if (IS_ENABLED(CONFIG_CLOCK_CONTROL_NRF_DRIVER_CALIBRATION)) { + z_nrf_clock_calibration_lfclk_stopped(); } - clock_config_update_end(&dev_data->clk_cfg, status); + nrfx_clock_lfclk_stop(); + +#if CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH + + (void)nrf_clock_control_cancel_or_release(CLOCK_DEVICE_HF, NULL, &lfsynth_cli); +#endif } -static void lfclk_update_timeout_handler(struct k_timer *timer) +static int stop(const struct device *dev, uint32_t ctx) { - struct lfclk_dev_data *dev_data = - CONTAINER_OF(timer, struct lfclk_dev_data, timer); + int err; - clock_config_update_end(&dev_data->clk_cfg, -ETIMEDOUT); + err = set_off_state(&((lfclk_data_t *)dev->data)->flags, ctx); + if (err < 0) { + return err; + } + + ((lfclk_config_t *)dev->config)->stop(); + + return 0; } -static void lfclk_work_handler(struct k_work *work) +static void blocking_start_callback(const struct device *dev, + clock_control_subsys_t subsys, + void *user_data) { - struct lfclk_dev_data *dev_data = - CONTAINER_OF(work, struct lfclk_dev_data, clk_cfg.work); - uint8_t to_activate_idx; - nrfs_err_t err; + struct k_sem *sem = user_data; - to_activate_idx = clock_config_update_begin(work); + k_sem_give(sem); +} - err = nrfs_clock_lfclk_src_set(clock_options[to_activate_idx].src, - dev_data); - if (err != NRFS_SUCCESS) { - clock_config_update_end(&dev_data->clk_cfg, -EIO); - } else { - k_timer_start(&dev_data->timer, NRFS_CLOCK_TIMEOUT, K_NO_WAIT); +static int async_start(const struct device *dev, clock_control_cb_t cb, void *user_data, + uint32_t ctx) +{ + int err; + + err = set_starting_state(&((lfclk_data_t *)dev->data)->flags, ctx); + if (err < 0) { + return err; } + + ((lfclk_data_t *)dev->data)->cb = cb; + ((lfclk_data_t *)dev->data)->user_data = user_data; + + ((lfclk_config_t *)dev->config)->start(); + + return 0; } -static int lfclk_resolve_spec_to_idx(const struct device *dev, - const struct nrf_clock_spec *req_spec) +/** @brief Wait for LF clock availability or stability. + * + * If LF clock source is SYNTH or RC then there is no distinction between + * availability and stability. In case of XTAL source clock, system is initially + * starting RC and then seamlessly switches to XTAL. Running RC means clock + * availability and running target source means stability, That is because + * significant difference in startup time (<1ms vs >200ms). + * + * In order to get event/interrupt when RC is ready (allowing CPU sleeping) two + * stage startup sequence is used. Initially, LF source is set to RC and when + * LFSTARTED event is handled it is reconfigured to the target source clock. + * This approach is implemented in nrfx_clock driver and utilized here. + * + * @param mode Start mode. + */ +static void lfclk_spinwait(enum nrf_lfclk_start_mode mode) { - struct lfclk_dev_data *dev_data = dev->data; - const struct lfclk_dev_config *dev_config = dev->config; - uint16_t req_accuracy; - - if (req_spec->frequency > dev_config->fixed_frequency) { - LOG_ERR("invalid frequency"); - return -EINVAL; + static const nrf_clock_lfclk_t target_type = + /* For sources XTAL, EXT_LOW_SWING, and EXT_FULL_SWING, + * NRF_CLOCK_LFCLK_XTAL is returned as the type of running clock. + */ + (IS_ENABLED(CONFIG_CLOCK_CONTROL_NRF_K32SRC_XTAL) || + IS_ENABLED(CONFIG_CLOCK_CONTROL_NRF_K32SRC_EXT_LOW_SWING) || + IS_ENABLED(CONFIG_CLOCK_CONTROL_NRF_K32SRC_EXT_FULL_SWING)) + ? NRF_CLOCK_LFCLK_XTAL + : CLOCK_CONTROL_NRF_K32SRC; + nrf_clock_lfclk_t type; + + if ((mode == CLOCK_CONTROL_NRF_LF_START_AVAILABLE) && + (target_type == NRF_CLOCK_LFCLK_XTAL) && + (nrf_clock_lf_srccopy_get(NRF_CLOCK) == CLOCK_CONTROL_NRF_K32SRC)) { + /* If target clock source is using XTAL then due to two-stage + * clock startup sequence, RC might already be running. + * It can be determined by checking current LFCLK source. If it + * is set to the target clock source then it means that RC was + * started. + */ + return; } - req_accuracy = req_spec->accuracy == NRF_CLOCK_CONTROL_ACCURACY_MAX - ? dev_data->max_accuracy - : req_spec->accuracy; + bool isr_mode = k_is_in_isr() || k_is_pre_kernel(); + int key = isr_mode ? irq_lock() : 0; + + if (!isr_mode) { + nrf_clock_int_disable(NRF_CLOCK, NRF_CLOCK_INT_LF_STARTED_MASK); + } - for (int i = dev_data->clock_options_cnt - 1; i >= 0; --i) { - /* Iterate to a more power hungry and accurate clock source - * If the requested accuracy is higher (lower ppm) than what - * the clock source can provide. - * - * In case of an accuracy of 0 (don't care), do not check accuracy. + while (!(nrfx_clock_lfclk_running_check((void *)&type) + && ((type == target_type) + || (mode == CLOCK_CONTROL_NRF_LF_START_AVAILABLE)))) { + /* Synth source start is almost instant and LFCLKSTARTED may + * happen before calling idle. That would lead to deadlock. */ - if ((req_accuracy != 0 && req_accuracy < clock_options[i].accuracy) || - (req_spec->precision > clock_options[i].precision)) { - continue; + if (!IS_ENABLED(CONFIG_CLOCK_CONTROL_NRF_K32SRC_SYNTH)) { + if (isr_mode || !IS_ENABLED(CONFIG_MULTITHREADING)) { + k_cpu_atomic_idle(key); + } else { + k_msleep(1); + } } - return i; + /* Clock interrupt is locked, LFCLKSTARTED is handled here. */ + if ((target_type == NRF_CLOCK_LFCLK_XTAL) + && (nrf_clock_lf_src_get(NRF_CLOCK) == NRF_CLOCK_LFCLK_RC) + && nrf_clock_event_check(NRF_CLOCK, + NRF_CLOCK_EVENT_LFCLKSTARTED)) { + nrf_clock_event_clear(NRF_CLOCK, + NRF_CLOCK_EVENT_LFCLKSTARTED); + nrf_clock_lf_src_set(NRF_CLOCK, + CLOCK_CONTROL_NRF_K32SRC); + + /* Clear pending interrupt, otherwise new clock event + * would not wake up from idle. + */ + NVIC_ClearPendingIRQ(DT_INST_IRQN(0)); + nrf_clock_task_trigger(NRF_CLOCK, + NRF_CLOCK_TASK_LFCLKSTART); + } } - LOG_ERR("invalid accuracy or precision"); - return -EINVAL; + if (isr_mode) { + irq_unlock(key); + } else { + nrf_clock_int_enable(NRF_CLOCK, NRF_CLOCK_INT_LF_STARTED_MASK); + } } -static void lfclk_get_spec_by_idx(const struct device *dev, - uint8_t idx, - struct nrf_clock_spec *spec) +static void clock_event_handler(nrfx_clock_lfclk_evt_type_t event) { - const struct lfclk_dev_config *dev_config = dev->config; + const struct device *dev = CLOCK_DEVICE_LFCLK; - spec->frequency = dev_config->fixed_frequency; - spec->accuracy = clock_options[idx].accuracy; - spec->precision = clock_options[idx].precision; + switch (event) { + case NRFX_CLOCK_LFCLK_EVT_LFCLK_STARTED: + if (IS_ENABLED(CONFIG_CLOCK_CONTROL_NRF_DRIVER_CALIBRATION)) { + z_nrf_clock_calibration_lfclk_started(); + } + clkstarted_handle(dev); + break; +#if NRF_CLOCK_HAS_CALIBRATION || NRF_LFRC_HAS_CALIBRATION + case NRFX_CLOCK_LFCLK_EVT_CAL_DONE: + if (IS_ENABLED(CONFIG_CLOCK_CONTROL_NRF_DRIVER_CALIBRATION)) { + z_nrf_clock_calibration_done_handler(); + } else { + /* Should not happen when calibration is disabled. */ + __ASSERT_NO_MSG(false); + } + break; +#endif + default: + __ASSERT_NO_MSG(0); + break; + } } -static struct onoff_manager *lfclk_get_mgr_by_idx(const struct device *dev, uint8_t idx) +static void onoff_started_callback(const struct device *dev, + clock_control_subsys_t sys, + void *user_data) { - struct lfclk_dev_data *dev_data = dev->data; + onoff_notify_fn notify = user_data; - return &dev_data->clk_cfg.onoff[idx].mgr; + notify(&((lfclk_data_t *)dev->data)->mgr, 0); } -static int lfclk_get_startup_time_by_idx(const struct device *dev, - uint8_t idx, - uint32_t *startup_time_us) +static void onoff_start(struct onoff_manager *mgr, onoff_notify_fn notify) { - struct lfclk_dev_data *dev_data = dev->data; - nrfs_clock_src_t src = clock_options[idx].src; - - switch (src) { - case NRFS_CLOCK_SRC_LFCLK_LFLPRC: - *startup_time_us = LFCLK_LFLPRC_STARTUP_TIME_US; - return 0; - - case NRFS_CLOCK_SRC_LFCLK_LFRC: - *startup_time_us = LFCLK_LFRC_STARTUP_TIME_US; - return 0; - - case NRFS_CLOCK_SRC_LFCLK_XO_PIXO: - case NRFS_CLOCK_SRC_LFCLK_XO_PIERCE: - case NRFS_CLOCK_SRC_LFCLK_XO_EXT_SINE: - case NRFS_CLOCK_SRC_LFCLK_XO_EXT_SQUARE: - case NRFS_CLOCK_SRC_LFCLK_XO_PIERCE_HP: - case NRFS_CLOCK_SRC_LFCLK_XO_EXT_SINE_HP: - *startup_time_us = dev_data->lfxo_startup_time_us; - return 0; - - case NRFS_CLOCK_SRC_LFCLK_SYNTH: - *startup_time_us = dev_data->hfxo_startup_time_us; - return 0; + int err; - default: - break; + err = async_start(CLOCK_DEVICE_LFCLK, onoff_started_callback, + notify, CTX_ONOFF); + if (err < 0) { + notify(mgr, err); } - - return -EINVAL; } -static struct onoff_manager *lfclk_find_mgr_by_spec(const struct device *dev, - const struct nrf_clock_spec *spec) +static void onoff_stop(struct onoff_manager *mgr, + onoff_notify_fn notify) { - int idx; + int res; - if (!spec) { - return lfclk_get_mgr_by_idx(dev, 0); - } - - idx = lfclk_resolve_spec_to_idx(dev, spec); - return idx < 0 ? NULL : lfclk_get_mgr_by_idx(dev, idx); + res = stop(CLOCK_DEVICE_LFCLK, CTX_ONOFF); + notify(mgr, res); } -static int api_request_lfclk(const struct device *dev, - const struct nrf_clock_spec *spec, - struct onoff_client *cli) +void z_nrf_clock_control_lf_on(enum nrf_lfclk_start_mode start_mode) { - struct onoff_manager *mgr = lfclk_find_mgr_by_spec(dev, spec); + static atomic_t on; + static struct onoff_client cli; + + if (atomic_set(&on, 1) == 0) { + int err; + struct onoff_manager *mgr = &((lfclk_data_t *)CLOCK_DEVICE_LFCLK->data)->mgr; - if (mgr) { - return clock_config_request(mgr, cli); + sys_notify_init_spinwait(&cli.notify); + err = onoff_request(mgr, &cli); + __ASSERT_NO_MSG(err >= 0); } - return -EINVAL; -} + /* In case of simulated board leave immediately. */ + if (IS_ENABLED(CONFIG_SOC_SERIES_BSIM_NRFXX)) { + return; + } -static int api_release_lfclk(const struct device *dev, - const struct nrf_clock_spec *spec) -{ - struct onoff_manager *mgr = lfclk_find_mgr_by_spec(dev, spec); + switch (start_mode) { + case CLOCK_CONTROL_NRF_LF_START_AVAILABLE: + case CLOCK_CONTROL_NRF_LF_START_STABLE: + lfclk_spinwait(start_mode); + break; - if (mgr) { - return onoff_release(mgr); + case CLOCK_CONTROL_NRF_LF_START_NOWAIT: + break; + + default: + __ASSERT_NO_MSG(false); } +} - return -EINVAL; +static int api_start(const struct device *dev, clock_control_subsys_t subsys, clock_control_cb_t cb, + void *user_data) +{ + ARG_UNUSED(subsys); + + return async_start(dev, cb, user_data, CTX_API); } -static int api_cancel_or_release_lfclk(const struct device *dev, - const struct nrf_clock_spec *spec, - struct onoff_client *cli) +static int api_blocking_start(const struct device *dev, + clock_control_subsys_t subsys) { - struct onoff_manager *mgr = lfclk_find_mgr_by_spec(dev, spec); + struct k_sem sem = Z_SEM_INITIALIZER(sem, 0, 1); + int err; - if (mgr) { - return onoff_cancel_or_release(mgr, cli); + if (!IS_ENABLED(CONFIG_MULTITHREADING)) { + return -ENOTSUP; } - return -EINVAL; -} + err = api_start(dev, subsys, blocking_start_callback, &sem); + if (err < 0) { + return err; + } + return k_sem_take(&sem, K_MSEC(500)); +} -static int api_resolve(const struct device *dev, - const struct nrf_clock_spec *req_spec, - struct nrf_clock_spec *res_spec) +static int api_stop(const struct device *dev, clock_control_subsys_t subsys) { - int idx; + ARG_UNUSED(subsys); - idx = lfclk_resolve_spec_to_idx(dev, req_spec); - if (idx < 0) { - return -EINVAL; - } + return stop(dev, CTX_API); +} - lfclk_get_spec_by_idx(dev, idx, res_spec); - return 0; +static enum clock_control_status api_get_status(const struct device *dev, + clock_control_subsys_t subsys) +{ + ARG_UNUSED(subsys); + + return GET_STATUS(((lfclk_data_t *)dev->data)->flags); } -static int api_get_startup_time(const struct device *dev, - const struct nrf_clock_spec *spec, - uint32_t *startup_time_us) +static int api_request(const struct device *dev, + const struct nrf_clock_spec *spec, + struct onoff_client *cli) { - int idx; + lfclk_data_t *dev_data = dev->data; - idx = lfclk_resolve_spec_to_idx(dev, spec); - if (idx < 0) { - return -EINVAL; - } + ARG_UNUSED(spec); - return lfclk_get_startup_time_by_idx(dev, idx, startup_time_us); + return onoff_request(&dev_data->mgr, cli); } -static int api_get_rate_lfclk(const struct device *dev, - clock_control_subsys_t sys, - uint32_t *rate) +static int api_release(const struct device *dev, + const struct nrf_clock_spec *spec) { - ARG_UNUSED(sys); + lfclk_data_t *dev_data = dev->data; - const struct lfclk_dev_config *dev_config = dev->config; + ARG_UNUSED(spec); - *rate = dev_config->fixed_frequency; - - return 0; + return onoff_release(&dev_data->mgr); } -static int lfclk_init(const struct device *dev) +static int api_cancel_or_release(const struct device *dev, + const struct nrf_clock_spec *spec, + struct onoff_client *cli) { - struct lfclk_dev_data *dev_data = dev->data; - nrf_bicr_lfosc_mode_t lfosc_mode; - nrfs_err_t res; + lfclk_data_t *dev_data = dev->data; - res = nrfs_clock_init(clock_evt_handler); - if (res != NRFS_SUCCESS) { - return -EIO; - } + ARG_UNUSED(spec); - dev_data->clock_options_cnt = LFCLK_DEF_OPTS; + return onoff_cancel_or_release(&dev_data->mgr, cli); +} - lfosc_mode = nrf_bicr_lfosc_mode_get(BICR); +static int clk_init(const struct device *dev) +{ + nrfx_err_t nrfx_err; + int err; + static const struct onoff_transitions transitions = { + .start = onoff_start, + .stop = onoff_stop + }; - if (lfosc_mode == NRF_BICR_LFOSC_MODE_UNCONFIGURED || - lfosc_mode == NRF_BICR_LFOSC_MODE_DISABLED) { - dev_data->max_accuracy = LFCLK_HFXO_ACCURACY; - } else { - int ret; + clock_control_nrf_common_connect_irq(); - ret = lfosc_get_accuracy(&dev_data->max_accuracy); - if (ret < 0) { - LOG_ERR("LFOSC enabled with invalid accuracy"); - return ret; - } + nrfx_err = nrfx_clock_lfclk_init(clock_event_handler); + if (nrfx_err != NRFX_SUCCESS) { + return -EIO; + } - switch (lfosc_mode) { - case NRF_BICR_LFOSC_MODE_CRYSTAL: - clock_options[LFCLK_MAX_OPTS - 1].accuracy = dev_data->max_accuracy; - clock_options[LFCLK_MAX_OPTS - 1].precision = 0; - clock_options[LFCLK_MAX_OPTS - 1].src = NRFS_CLOCK_SRC_LFCLK_XO_PIERCE; - - clock_options[LFCLK_MAX_OPTS - 2].accuracy = dev_data->max_accuracy; - clock_options[LFCLK_MAX_OPTS - 2].precision = 1; - clock_options[LFCLK_MAX_OPTS - 2].src = NRFS_CLOCK_SRC_LFCLK_XO_PIERCE_HP; - - dev_data->clock_options_cnt += 2; - break; - case NRF_BICR_LFOSC_MODE_EXTSINE: - clock_options[LFCLK_MAX_OPTS - 1].accuracy = dev_data->max_accuracy; - clock_options[LFCLK_MAX_OPTS - 1].precision = 0; - clock_options[LFCLK_MAX_OPTS - 1].src = NRFS_CLOCK_SRC_LFCLK_XO_EXT_SINE; - - clock_options[LFCLK_MAX_OPTS - 2].accuracy = dev_data->max_accuracy; - clock_options[LFCLK_MAX_OPTS - 2].precision = 1; - clock_options[LFCLK_MAX_OPTS - 2].src = NRFS_CLOCK_SRC_LFCLK_XO_EXT_SINE_HP; - - dev_data->clock_options_cnt += 2; - break; - case NRF_BICR_LFOSC_MODE_EXTSQUARE: - clock_options[LFCLK_MAX_OPTS - 2].accuracy = dev_data->max_accuracy; - clock_options[LFCLK_MAX_OPTS - 2].precision = 0; - clock_options[LFCLK_MAX_OPTS - 2].src = NRFS_CLOCK_SRC_LFCLK_XO_EXT_SQUARE; - - dev_data->clock_options_cnt += 1; - break; - default: - LOG_ERR("Unexpected LFOSC mode"); - return -EINVAL; - } + if (IS_ENABLED(CONFIG_CLOCK_CONTROL_NRF_DRIVER_CALIBRATION)) { + lfclk_data_t *data = ((lfclk_data_t *)dev->data); - dev_data->lfxo_startup_time_us = nrf_bicr_lfosc_startup_time_ms_get(BICR) - * USEC_PER_MSEC; - if (dev_data->lfxo_startup_time_us == NRF_BICR_LFOSC_STARTUP_TIME_UNCONFIGURED) { - LOG_ERR("BICR LFXO startup time invalid"); - return -ENODEV; - } + z_nrf_clock_calibration_init(&data->mgr); } - dev_data->hfxo_startup_time_us = nrf_bicr_hfxo_startup_time_us_get(BICR); - if (dev_data->hfxo_startup_time_us == NRF_BICR_HFXO_STARTUP_TIME_UNCONFIGURED) { - LOG_ERR("BICR HFXO startup time invalid"); - return -ENODEV; + err = onoff_manager_init(&((lfclk_data_t *)dev->data)->mgr, &transitions); + if (err < 0) { + return err; } - k_timer_init(&dev_data->timer, lfclk_update_timeout_handler, NULL); + ((lfclk_data_t *)dev->data)->flags = CLOCK_CONTROL_STATUS_OFF; - return clock_config_init(&dev_data->clk_cfg, - ARRAY_SIZE(dev_data->clk_cfg.onoff), - lfclk_work_handler); + return 0; } -static DEVICE_API(nrf_clock_control, lfclk_drv_api) = { +CLOCK_CONTROL_NRF_IRQ_HANDLERS_ITERABLE(clock_control_nrf_lfclk, &nrfx_clock_lfclk_irq_handler); + +static DEVICE_API(nrf_clock_control, clock_control_api) = { .std_api = { - .on = api_nosys_on_off, - .off = api_nosys_on_off, - .get_rate = api_get_rate_lfclk, + .on = api_blocking_start, + .off = api_stop, + .async_on = api_start, + .get_status = api_get_status, }, - .request = api_request_lfclk, - .release = api_release_lfclk, - .cancel_or_release = api_cancel_or_release_lfclk, - .resolve = api_resolve, - .get_startup_time = api_get_startup_time, + .request = api_request, + .release = api_release, + .cancel_or_release = api_cancel_or_release, }; -static struct lfclk_dev_data lfclk_data; +static lfclk_data_t data; + +static const lfclk_config_t config = { + + .start = lfclk_start, + .stop = lfclk_stop, + IF_ENABLED(CONFIG_LOG, (.name = "lfclk",)) -static const struct lfclk_dev_config lfclk_config = { - .fixed_frequency = DT_INST_PROP(0, clock_frequency), }; -DEVICE_DT_INST_DEFINE(0, lfclk_init, NULL, - &lfclk_data, &lfclk_config, - PRE_KERNEL_1, CONFIG_CLOCK_CONTROL_INIT_PRIORITY, - &lfclk_drv_api); +DEVICE_DT_DEFINE(DT_NODELABEL(lfclk), clk_init, NULL, + &data, &config, + PRE_KERNEL_1, CONFIG_CLOCK_CONTROL_INIT_PRIORITY, + &clock_control_api); diff --git a/drivers/clock_control/clock_control_nrf_xo.c b/drivers/clock_control/clock_control_nrf_xo.c new file mode 100644 index 000000000000..38a0a6d97b97 --- /dev/null +++ b/drivers/clock_control/clock_control_nrf_xo.c @@ -0,0 +1,570 @@ +/* + * Copyright (c) 2016-2025 Nordic Semiconductor ASA + * Copyright (c) 2016 Vinayak Kariappa Chettimada + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include +#include "nrf_clock_calibration.h" +#include +#include +#include +#include +#include +#include "clock_control_nrf_common.h" + +LOG_MODULE_REGISTER(clock_control_xo, CONFIG_CLOCK_CONTROL_LOG_LEVEL); + +#define DT_DRV_COMPAT nordic_nrf_clock_xo + +#define CLOCK_DEVICE_XO DEVICE_DT_GET(DT_NODELABEL(xo)) + +#define CTX_ONOFF BIT(6) +#define CTX_API BIT(7) +#define CTX_MASK (CTX_ONOFF | CTX_API) + +#define STATUS_MASK 0x7 +#define GET_STATUS(flags) (flags & STATUS_MASK) +#define GET_CTX(flags) (flags & CTX_MASK) + +/* Used only by HF clock */ +#define XO_USER_BT BIT(0) +#define XO_USER_GENERIC BIT(1) + +/* Helper logging macros which prepends subsys name to the log. */ +#ifdef CONFIG_LOG +#define CLOCK_LOG(lvl, dev, ...) \ + LOG_##lvl("%s: " GET_ARG_N(1, __VA_ARGS__), \ + "xo" \ + COND_CODE_0(NUM_VA_ARGS_LESS_1(__VA_ARGS__),\ + (), (, GET_ARGS_LESS_N(1, __VA_ARGS__)))) +#else +#define CLOCK_LOG(...) +#endif + +#define ERR(dev, ...) CLOCK_LOG(ERR, dev, __VA_ARGS__) +#define WRN(dev, ...) CLOCK_LOG(WRN, dev, __VA_ARGS__) +#define INF(dev, ...) CLOCK_LOG(INF, dev, __VA_ARGS__) +#define DBG(dev, ...) CLOCK_LOG(DBG, dev, __VA_ARGS__) + +typedef void (*clk_ctrl_xo_func_t)(void); + +typedef struct { + struct onoff_manager mgr; + clock_control_cb_t cb; + void *user_data; + uint32_t flags; +} xo_data_t; + +typedef struct { + clk_ctrl_xo_func_t start; /* Clock start function */ + clk_ctrl_xo_func_t stop; /* Clock stop function */ +#ifdef CONFIG_LOG + const char *name; +#endif +} xo_config_t; + +static atomic_t xo_users; +static uint64_t xo_start_tstamp; +static uint64_t xo_stop_tstamp; + +static int set_starting_state(uint32_t *flags, uint32_t ctx) +{ + int err = 0; + unsigned int key = irq_lock(); + uint32_t current_ctx = GET_CTX(*flags); + + if ((*flags & (STATUS_MASK)) == CLOCK_CONTROL_STATUS_OFF) { + *flags = CLOCK_CONTROL_STATUS_STARTING | ctx; + } else if (current_ctx != ctx) { + err = -EPERM; + } else { + err = -EALREADY; + } + + irq_unlock(key); + + return err; +} + +static int async_start(const struct device *dev, clock_control_cb_t cb, + void *user_data, uint32_t ctx) +{ + int err; + + err = set_starting_state(&((xo_data_t *)dev->data)->flags, ctx); + if (err < 0) { + return err; + } + + ((xo_data_t *)dev->data)->cb = cb; + ((xo_data_t *)dev->data)->user_data = user_data; + + ((xo_config_t *)dev->config)->start(); + + return 0; +} + +static int set_off_state(uint32_t *flags, uint32_t ctx) +{ + int err = 0; + unsigned int key = irq_lock(); + uint32_t current_ctx = GET_CTX(*flags); + + if ((current_ctx != 0) && (current_ctx != ctx)) { + err = -EPERM; + } else { + *flags = CLOCK_CONTROL_STATUS_OFF; + } + + irq_unlock(key); + + return err; +} + +static void set_on_state(uint32_t *flags) +{ + unsigned int key = irq_lock(); + + *flags = CLOCK_CONTROL_STATUS_ON | GET_CTX(*flags); + irq_unlock(key); +} + +static int stop(const struct device *dev, uint32_t ctx) +{ + int err; + + err = set_off_state(&((xo_data_t *)dev->data)->flags, ctx); + if (err < 0) { + return err; + } + + ((xo_config_t *)dev->config)->stop(); + + return 0; +} + +static void xo_start(void) +{ + if (IS_ENABLED(CONFIG_CLOCK_CONTROL_NRF_SHELL)) { + xo_start_tstamp = k_uptime_get(); + } + + nrfx_clock_xo_start(); +} + +static void xo_stop(void) +{ + if (IS_ENABLED(CONFIG_CLOCK_CONTROL_NRF_SHELL)) { + xo_stop_tstamp = k_uptime_get(); + } + + nrfx_clock_xo_stop(); +} + +#ifdef CONFIG_CLOCK_CONTROL_NRF_HFINT_CALIBRATION + +static void nrf54l_errata_30_workaround(void) +{ + while (FIELD_GET(CLOCK_XO_STAT_STATE_Msk, NRF_CLOCK->XO.STAT) != + CLOCK_XO_STAT_STATE_Running) { + } + const uint32_t higher_bits = *((volatile uint32_t *)0x50120820UL) & 0xFFFFFFC0; + *((volatile uint32_t *)0x50120864UL) = 1 | BIT(31); + *((volatile uint32_t *)0x50120848UL) = 1; + uint32_t off_abs = 24; + + while (off_abs >= 24) { + *((volatile uint32_t *)0x50120844UL) = 1; + while (((*((volatile uint32_t *)0x50120840UL)) & (1 << 16)) != 0) { + } + const uint32_t current_cal = *((volatile uint32_t *)0x50120820UL) & 0x3F; + const uint32_t cal_result = *((volatile uint32_t *)0x50120840UL) & 0x7FF; + int32_t off = 1024 - cal_result; + + off_abs = (off < 0) ? -off : off; + + if (off >= 24 && current_cal < 0x3F) { + *((volatile uint32_t *)0x50120820UL) = higher_bits | (current_cal + 1); + } else if (off <= -24 && current_cal > 0) { + *((volatile uint32_t *)0x50120820UL) = higher_bits | (current_cal - 1); + } + } + + *((volatile uint32_t *)0x50120848UL) = 0; + *((volatile uint32_t *)0x50120864UL) = 0; +} + +#if CONFIG_CLOCK_CONTROL_NRF_HFINT_CALIBRATION_PERIOD + +static struct onoff_client hf_cal_cli; + +static void calibration_finished_callback(struct onoff_manager *mgr, + struct onoff_client *cli, + uint32_t state, + int res) +{ + (void)onoff_cancel_or_release(mgr, cli); +} + +static void calibration_handler(struct k_timer *timer) +{ + nrf_clock_xo_t clk_src; + + bool ret = nrfx_clock_xo_running_check(&clk_src); + + if (ret && (clk_src == NRF_CLOCK_HFCLK_HIGH_ACCURACY)) { + return; + } + + sys_notify_init_callback(&hf_cal_cli.notify, calibration_finished_callback); + (void)onoff_request(&((xo_data_t *)CLOCK_DEVICE_XO->data)->mgr, &hf_cal_cli); +} + +static K_TIMER_DEFINE(calibration_timer, calibration_handler, NULL); + +static int calibration_init(void) +{ + k_timer_start(&calibration_timer, + K_NO_WAIT, + K_MSEC(CONFIG_CLOCK_CONTROL_NRF_HFINT_CALIBRATION_PERIOD)); + + return 0; +} + +SYS_INIT(calibration_init, APPLICATION, 0); + +#endif /* CONFIG_CLOCK_CONTROL_NRF_HFINT_CALIBRATION_PERIOD */ +#endif /* CONFIG_CLOCK_CONTROL_NRF_HFINT_CALIBRATION */ + +static void clkstarted_handle(const struct device *dev) +{ +#if CONFIG_CLOCK_CONTROL_NRF_HFINT_CALIBRATION + if (nrf54l_errata_30()) { + nrf54l_errata_30_workaround(); + } +#endif + + clock_control_cb_t callback = ((xo_data_t *)dev->data)->cb; + void *user_data = ((xo_data_t *)dev->data)->user_data; + + ((xo_data_t *)dev->data)->cb = NULL; + set_on_state(&((xo_data_t *)dev->data)->flags); + DBG(dev, "Clock started"); + + if (callback) { + callback(dev, NULL, user_data); + } +} + +static void generic_xo_start(void) +{ + nrf_clock_hfclk_t type; + bool already_started = false; + unsigned int key = irq_lock(); + + xo_users |= XO_USER_GENERIC; + if (xo_users & XO_USER_BT) { + (void)nrfx_clock_xo_running_check(&type); + if (type == NRF_CLOCK_HFCLK_HIGH_ACCURACY) { + already_started = true; + /* Set on state in case clock interrupt comes and we + * want to avoid handling that. + */ + set_on_state( + &((xo_data_t *)CLOCK_DEVICE_XO->data)->flags); + } + } + + irq_unlock(key); + + if (already_started) { + /* Clock already started by z_nrf_clock_bt_ctlr_hf_request */ + clkstarted_handle(CLOCK_DEVICE_XO); + return; + } + + xo_start(); +} + +static void generic_xo_stop(void) +{ + /* It's not enough to use only atomic_and() here for synchronization, + * as the thread could be preempted right after that function but + * before xo_stop() is called and the preempting code could request + * the XO again. Then, the XO would be stopped inappropriately + * and xo_user would be left with an incorrect value. + */ + unsigned int key = irq_lock(); + + xo_users &= ~XO_USER_GENERIC; + /* Skip stopping if BT is still requesting the clock. */ + if (!(xo_users & XO_USER_BT)) { + xo_stop(); + } + + irq_unlock(key); +} + +static void onoff_started_callback(const struct device *dev, + clock_control_subsys_t sys, + void *user_data) +{ + ARG_UNUSED(sys); + + onoff_notify_fn notify = user_data; + + notify(&(((xo_data_t *)dev->data)->mgr), 0); +} + + +static void onoff_start(struct onoff_manager *mgr, + onoff_notify_fn notify) +{ + int err; + + err = async_start(CLOCK_DEVICE_XO, onoff_started_callback, notify, CTX_ONOFF); + if (err < 0) { + notify(mgr, err); + } +} + +static void onoff_stop(struct onoff_manager *mgr, + onoff_notify_fn notify) +{ + int res; + + res = stop(CLOCK_DEVICE_XO, CTX_ONOFF); + notify(mgr, res); +} + +static void clock_event_handler(nrfx_clock_xo_evt_type_t event) +{ + const struct device *dev = CLOCK_DEVICE_XO; + + switch (event) { +#if NRF_CLOCK_HAS_XO_TUNE + case NRFX_CLOCK_XO_EVT_XO_TUNED: + clkstarted_handle(dev); + break; + case NRFX_CLOCK_XO_EVT_XO_TUNE_ERROR: + case NRFX_CLOCK_XO_EVT_XO_TUNE_FAILED: + /* No processing needed. */ + break; + case NRFX_CLOCK_XO_EVT_HFCLK_STARTED: + /* HFCLK is stable after XOTUNED event. + * HFCLK_STARTED means only that clock has been started. + */ + break; +#else + /* HFCLK started should be used only if tune operation is done implicitly. */ + case NRFX_CLOCK_XO_EVT_HFCLK_STARTED: + { + /* Check needed due to anomaly 201: + * HFCLKSTARTED may be generated twice. + */ + if (GET_STATUS(((xo_data_t *)dev->data)->flags) + == CLOCK_CONTROL_STATUS_STARTING) { + clkstarted_handle(dev); + } + + break; + } +#endif + +#if NRF_CLOCK_HAS_PLL + case NRFX_CLOCK_XO_EVT_PLL_STARTED: + /* No processing needed. */ + break; +#endif + default: + __ASSERT_NO_MSG(0); + break; + } +} + +static void blocking_start_callback(const struct device *dev, + clock_control_subsys_t subsys, + void *user_data) +{ + ARG_UNUSED(dev); + ARG_UNUSED(subsys); + + struct k_sem *sem = user_data; + + k_sem_give(sem); +} + +void z_nrf_clock_bt_ctlr_hf_request(void) +{ + if (atomic_or(&xo_users, XO_USER_BT) & XO_USER_GENERIC) { + /* generic request already activated clock. */ + return; + } + + xo_start(); +} + +void z_nrf_clock_bt_ctlr_hf_release(void) +{ + /* It's not enough to use only atomic_and() here for synchronization, + * see the explanation in generic_hfclk_stop(). + */ + unsigned int key = irq_lock(); + + xo_users &= ~XO_USER_BT; + /* Skip stopping if generic is still requesting the clock. */ + if (!(xo_users & XO_USER_GENERIC)) { + + /* State needs to be set to OFF as BT API does not call stop API which + * normally setting this state. + */ + ((xo_data_t *)CLOCK_DEVICE_XO->data)->flags = CLOCK_CONTROL_STATUS_OFF; + xo_stop(); + } + + irq_unlock(key); +} + +#if DT_NODE_EXISTS(DT_NODELABEL(hfxo)) +uint32_t z_nrf_clock_bt_ctlr_hf_get_startup_time_us(void) +{ + return DT_PROP(DT_NODELABEL(hfxo), startup_time_us); +} +#endif + +static int api_start(const struct device *dev, clock_control_subsys_t subsys, + clock_control_cb_t cb, void *user_data) +{ + ARG_UNUSED(subsys); + + return async_start(dev, cb, user_data, CTX_API); +} + +static int api_blocking_start(const struct device *dev, + clock_control_subsys_t subsys) +{ + struct k_sem sem = Z_SEM_INITIALIZER(sem, 0, 1); + int err; + + if (!IS_ENABLED(CONFIG_MULTITHREADING)) { + return -ENOTSUP; + } + + err = api_start(dev, subsys, blocking_start_callback, &sem); + if (err < 0) { + return err; + } + + return k_sem_take(&sem, K_MSEC(500)); +} + +static int api_stop(const struct device *dev, clock_control_subsys_t subsys) +{ + ARG_UNUSED(subsys); + + return stop(dev, CTX_API); +} + +static enum clock_control_status api_get_status(const struct device *dev, + clock_control_subsys_t subsys) +{ + return GET_STATUS(((xo_data_t *)dev->data)->flags); +} + +static int api_request(const struct device *dev, + const struct nrf_clock_spec *spec, + struct onoff_client *cli) +{ + xo_data_t *dev_data = dev->data; + + ARG_UNUSED(spec); + + return onoff_request(&dev_data->mgr, cli); +} + +static int api_release(const struct device *dev, + const struct nrf_clock_spec *spec) +{ + xo_data_t *dev_data = dev->data; + + ARG_UNUSED(spec); + + return onoff_release(&dev_data->mgr); +} + +static int api_cancel_or_release(const struct device *dev, + const struct nrf_clock_spec *spec, + struct onoff_client *cli) +{ + xo_data_t *dev_data = dev->data; + + ARG_UNUSED(spec); + + return onoff_cancel_or_release(&dev_data->mgr, cli); +} + +static int clk_init(const struct device *dev) +{ + nrfx_err_t nrfx_err; + int err; + static const struct onoff_transitions transitions = { + .start = onoff_start, + .stop = onoff_stop + }; + + clock_control_nrf_common_connect_irq(); + + nrfx_err = nrfx_clock_xo_init(clock_event_handler); + if (nrfx_err != NRFX_SUCCESS) { + return -EIO; + } + + if (IS_ENABLED(CONFIG_CLOCK_CONTROL_NRF_DRIVER_CALIBRATION)) { + xo_data_t *data = ((xo_data_t *)dev->data); + + z_nrf_clock_calibration_init(&data->mgr); + } + + err = onoff_manager_init(&((xo_data_t *)dev->data)->mgr, + &transitions); + if (err < 0) { + return err; + } + + ((xo_data_t *)dev->data)->flags = CLOCK_CONTROL_STATUS_OFF; + + return 0; +} + +CLOCK_CONTROL_NRF_IRQ_HANDLERS_ITERABLE(clock_control_nrf_xo, + &nrfx_clock_xo_irq_handler); + +static DEVICE_API(nrf_clock_control, clock_control_api) = { + .std_api = { + .on = api_blocking_start, + .off = api_stop, + .async_on = api_start, + .get_status = api_get_status, + }, + .request = api_request, + .release = api_release, + .cancel_or_release = api_cancel_or_release, +}; + +static xo_data_t data; + +static const xo_config_t config = { + .start = generic_xo_start, + .stop = generic_xo_stop, + IF_ENABLED(CONFIG_LOG, (.name = "xo",)) +}; + +DEVICE_DT_DEFINE(DT_NODELABEL(xo), clk_init, NULL, + &data, &config, + PRE_KERNEL_1, CONFIG_CLOCK_CONTROL_INIT_PRIORITY, + &clock_control_api); diff --git a/drivers/clock_control/clock_control_nrf_xo24m.c b/drivers/clock_control/clock_control_nrf_xo24m.c new file mode 100644 index 000000000000..d039b857d3d0 --- /dev/null +++ b/drivers/clock_control/clock_control_nrf_xo24m.c @@ -0,0 +1,339 @@ +/* + * Copyright (c) 2016-2025 Nordic Semiconductor ASA + * Copyright (c) 2016 Vinayak Kariappa Chettimada + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include +#include "clock_control_nrf_common.h" +#include +#include +#include +#include + +LOG_MODULE_REGISTER(clock_control_xo24m, CONFIG_CLOCK_CONTROL_LOG_LEVEL); + +#define DT_DRV_COMPAT nordic_nrf_clock_xo24m + +#define CLOCK_DEVICE_XO24M DEVICE_DT_GET(DT_NODELABEL(xo24m)) + +#define CTX_ONOFF BIT(6) +#define CTX_API BIT(7) +#define CTX_MASK (CTX_ONOFF | CTX_API) + +#define STATUS_MASK 0x7 +#define GET_STATUS(flags) (flags & STATUS_MASK) +#define GET_CTX(flags) (flags & CTX_MASK) + +/* Helper logging macros which prepends subsys name to the log. */ +#ifdef CONFIG_LOG +#define CLOCK_LOG(lvl, dev, ...) \ + LOG_##lvl("%s: " GET_ARG_N(1, __VA_ARGS__), \ + "xo24m" \ + COND_CODE_0(NUM_VA_ARGS_LESS_1(__VA_ARGS__),\ + (), (, GET_ARGS_LESS_N(1, __VA_ARGS__)))) +#else +#define CLOCK_LOG(...) +#endif + +#define ERR(dev, ...) CLOCK_LOG(ERR, dev, __VA_ARGS__) +#define WRN(dev, ...) CLOCK_LOG(WRN, dev, __VA_ARGS__) +#define INF(dev, ...) CLOCK_LOG(INF, dev, __VA_ARGS__) +#define DBG(dev, ...) CLOCK_LOG(DBG, dev, __VA_ARGS__) + +typedef void (*clk_ctrl_func_t)(void); + +typedef struct { + struct onoff_manager mgr; + clock_control_cb_t cb; + void *user_data; + uint32_t flags; +} xo24m_data_t; + +typedef struct { + clk_ctrl_func_t start; /* Clock start function */ + clk_ctrl_func_t stop; /* Clock stop function */ +} xo24m_config_t; + +static int set_off_state(uint32_t *flags, uint32_t ctx) +{ + int err = 0; + unsigned int key = irq_lock(); + uint32_t current_ctx = GET_CTX(*flags); + + if ((current_ctx != 0) && (current_ctx != ctx)) { + err = -EPERM; + } else { + *flags = CLOCK_CONTROL_STATUS_OFF; + } + + irq_unlock(key); + + return err; +} + +static int set_starting_state(uint32_t *flags, uint32_t ctx) +{ + int err = 0; + unsigned int key = irq_lock(); + uint32_t current_ctx = GET_CTX(*flags); + + if ((*flags & (STATUS_MASK)) == CLOCK_CONTROL_STATUS_OFF) { + *flags = CLOCK_CONTROL_STATUS_STARTING | ctx; + } else if (current_ctx != ctx) { + err = -EPERM; + } else { + err = -EALREADY; + } + + irq_unlock(key); + + return err; +} + +static void set_on_state(uint32_t *flags) +{ + unsigned int key = irq_lock(); + + *flags = CLOCK_CONTROL_STATUS_ON | GET_CTX(*flags); + irq_unlock(key); +} + +static void clkstarted_handle(const struct device *dev) +{ + clock_control_cb_t callback = ((xo24m_data_t *)dev->data)->cb; + void *user_data = ((xo24m_data_t *)dev->data)->user_data; + + ((xo24m_data_t *)dev->data)->cb = NULL; + set_on_state(&((xo24m_data_t *)dev->data)->flags); + DBG(dev, "Clock started"); + + if (callback) { + callback(dev, NULL, user_data); + } +} + +static void xo24m_start(void) +{ + nrfx_clock_xo24m_start(); +} + +static void xo24m_stop(void) +{ + nrfx_clock_xo24m_stop(); +} + +static int stop(const struct device *dev, uint32_t ctx) +{ + int err; + + err = set_off_state(&((xo24m_data_t *)dev->data)->flags, ctx); + if (err < 0) { + return err; + } + + ((xo24m_config_t *)dev->config)->stop(); + + return 0; +} + +static int async_start(const struct device *dev, clock_control_cb_t cb, void *user_data, + uint32_t ctx) +{ + int err; + + err = set_starting_state(&((xo24m_data_t *)dev->data)->flags, ctx); + if (err < 0) { + return err; + } + + ((xo24m_data_t *)dev->data)->cb = cb; + ((xo24m_data_t *)dev->data)->user_data = user_data; + + ((xo24m_config_t *)dev->config)->start(); + + return 0; +} + +static void blocking_start_callback(const struct device *dev, + clock_control_subsys_t subsys, + void *user_data) +{ + struct k_sem *sem = user_data; + + k_sem_give(sem); +} + +static clock_control_subsys_t get_subsys(struct onoff_manager *mgr) //TODO remove +{ + xo24m_data_t *data = CLOCK_DEVICE_XO24M->data; + size_t offset = (size_t)(mgr - data->mgr); + + return (clock_control_subsys_t)offset; +} + +static void onoff_stop(struct onoff_manager *mgr, + onoff_notify_fn notify) +{ + int res; + + res = stop(CLOCK_DEVICE_XO24M, CTX_ONOFF); + notify(mgr, res); +} + +static void onoff_started_callback(const struct device *dev, + clock_control_subsys_t sys, + void *user_data) +{ + ARG_UNUSED(sys); + + onoff_notify_fn notify = user_data; + + notify(&((xo24m_data_t *)dev->data)->mgr, 0); +} + +static void onoff_start(struct onoff_manager *mgr, + onoff_notify_fn notify) +{ + int err; + + err = async_start(CLOCK_DEVICE_XO24M, onoff_started_callback, notify, CTX_ONOFF); + if (err < 0) { + notify(mgr, err); + } +} + +static void clock_event_handler(void) +{ + const struct device *dev = CLOCK_DEVICE_XO24M; + + clkstarted_handle(dev); +} + +static int api_start(const struct device *dev, clock_control_subsys_t subsys, + clock_control_cb_t cb, void *user_data) +{ + ARG_UNUSED(subsys); + + return async_start(dev, cb, user_data, CTX_API); +} + +static int api_blocking_start(const struct device *dev, + clock_control_subsys_t subsys) +{ + struct k_sem sem = Z_SEM_INITIALIZER(sem, 0, 1); + int err; + + if (!IS_ENABLED(CONFIG_MULTITHREADING)) { + return -ENOTSUP; + } + + err = api_start(dev, subsys, blocking_start_callback, &sem); + if (err < 0) { + return err; + } + + return k_sem_take(&sem, K_MSEC(500)); +} + +static int api_stop(const struct device *dev, clock_control_subsys_t subsys) +{ + ARG_UNUSED(subsys); + + return stop(dev, CTX_API); +} + +static enum clock_control_status api_get_status(const struct device *dev, + clock_control_subsys_t subsys) +{ + ARG_UNUSED(subsys); + + return GET_STATUS(((xo24m_data_t *)dev->data)->flags); +} + +static int api_request(const struct device *dev, + const struct nrf_clock_spec *spec, + struct onoff_client *cli) +{ + xo24m_data_t *dev_data = dev->data; + + ARG_UNUSED(spec); + + return onoff_request(&dev_data->mgr, cli); +} + +static int api_release(const struct device *dev, + const struct nrf_clock_spec *spec) +{ + xo24m_data_t *dev_data = dev->data; + + ARG_UNUSED(spec); + + return onoff_release(&dev_data->mgr); +} + +static int api_cancel_or_release(const struct device *dev, + const struct nrf_clock_spec *spec, + struct onoff_client *cli) +{ + xo24m_data_t *dev_data = dev->data; + + ARG_UNUSED(spec); + + return onoff_cancel_or_release(&dev_data->mgr, cli); +} + +static int clk_init(const struct device *dev) +{ + nrfx_err_t nrfx_err; + int err; + static const struct onoff_transitions transitions = { + .start = onoff_start, + .stop = onoff_stop + }; + + clock_control_nrf_common_connect_irq(); + + nrfx_err = nrfx_clock_xo24m_init(clock_event_handler); + if (nrfx_err != NRFX_SUCCESS) { + return -EIO; + } + + err = onoff_manager_init(&((xo24m_data_t *)dev->data)->mgr, + &transitions); + if (err < 0) { + return err; + } + + ((xo24m_data_t *)dev->data)->flags = CLOCK_CONTROL_STATUS_OFF; + + return 0; +} + +static DEVICE_API(nrf_clock_control, clock_control_api) = { + .std_api = { + .on = api_blocking_start, + .off = api_stop, + .async_on = api_start, + .get_status = api_get_status, + }, + .request = api_request, + .release = api_release, + .cancel_or_release = api_cancel_or_release, +}; + +static xo24m_data_t data; + +static const xo24m_config_t config = { + .start = xo24m_start, + .stop = xo24m_stop, +}; + +DEVICE_DT_DEFINE(DT_NODELABEL(xo24m), clk_init, NULL, + &data, &config, + PRE_KERNEL_1, CONFIG_CLOCK_CONTROL_INIT_PRIORITY, + &clock_control_api); diff --git a/drivers/clock_control/clock_control_nrfs_lfclk.c b/drivers/clock_control/clock_control_nrfs_lfclk.c new file mode 100644 index 000000000000..02f916788021 --- /dev/null +++ b/drivers/clock_control/clock_control_nrfs_lfclk.c @@ -0,0 +1,436 @@ +/* + * Copyright (c) 2024 Nordic Semiconductor ASA + * SPDX-License-Identifier: Apache-2.0 + */ + +#define DT_DRV_COMPAT nordic_nrfs_lfclk + +#include "clock_control_nrf2_common.h" +#include +#include +#include +#include + +#include +LOG_MODULE_DECLARE(clock_control_nrf2, CONFIG_CLOCK_CONTROL_LOG_LEVEL); + +BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) == 1, + "multiple instances not supported"); + +#define LFCLK_HFXO_NODE DT_INST_PHANDLE_BY_NAME(0, clocks, hfxo) + +#define LFCLK_LFRC_ACCURACY DT_INST_PROP(0, lfrc_accuracy_ppm) +#define LFCLK_HFXO_ACCURACY DT_PROP(LFCLK_HFXO_NODE, accuracy_ppm) +#define LFCLK_LFLPRC_STARTUP_TIME_US DT_INST_PROP(0, lflprc_startup_time_us) +#define LFCLK_LFRC_STARTUP_TIME_US DT_INST_PROP(0, lfrc_startup_time_us) + +#define LFCLK_MAX_OPTS 4 +#define LFCLK_DEF_OPTS 2 + +#define NRFS_CLOCK_TIMEOUT K_MSEC(CONFIG_CLOCK_CONTROL_NRFS_LFCLK_CLOCK_TIMEOUT_MS) + +#define BICR (NRF_BICR_Type *)DT_REG_ADDR(DT_NODELABEL(bicr)) + +/* Clock options sorted from highest to lowest power consumption. + * - Clock synthesized from a high frequency clock + * - Internal RC oscillator + * - External clock. These are inserted into the list at driver initialization. + * Set to one of the following: + * - XTAL. Low or High precision + * - External sine or square wave + */ +static struct clock_options { + uint16_t accuracy : 15; + uint16_t precision : 1; + nrfs_clock_src_t src; +} clock_options[LFCLK_MAX_OPTS] = { + { + /* NRFS will request FLL16M use HFXO in bypass mode if SYNTH src is used */ + .accuracy = LFCLK_HFXO_ACCURACY, + .precision = 1, + .src = NRFS_CLOCK_SRC_LFCLK_SYNTH, + }, + { + .accuracy = LFCLK_LFRC_ACCURACY, + .precision = 0, + .src = NRFS_CLOCK_SRC_LFCLK_LFRC, + }, + /* Remaining options are populated on lfclk_init */ +}; + +struct lfclk_dev_data { + STRUCT_CLOCK_CONFIG(lfclk, ARRAY_SIZE(clock_options)) clk_cfg; + struct k_timer timer; + uint16_t max_accuracy; + uint8_t clock_options_cnt; + uint32_t hfxo_startup_time_us; + uint32_t lfxo_startup_time_us; +}; + +struct lfclk_dev_config { + uint32_t fixed_frequency; +}; + +static int lfosc_get_accuracy(uint16_t *accuracy) +{ + switch (nrf_bicr_lfosc_accuracy_get(BICR)) { + case NRF_BICR_LFOSC_ACCURACY_500PPM: + *accuracy = 500U; + break; + case NRF_BICR_LFOSC_ACCURACY_250PPM: + *accuracy = 250U; + break; + case NRF_BICR_LFOSC_ACCURACY_150PPM: + *accuracy = 150U; + break; + case NRF_BICR_LFOSC_ACCURACY_100PPM: + *accuracy = 100U; + break; + case NRF_BICR_LFOSC_ACCURACY_75PPM: + *accuracy = 75U; + break; + case NRF_BICR_LFOSC_ACCURACY_50PPM: + *accuracy = 50U; + break; + case NRF_BICR_LFOSC_ACCURACY_30PPM: + *accuracy = 30U; + break; + case NRF_BICR_LFOSC_ACCURACY_20PPM: + *accuracy = 20U; + break; + default: + return -EINVAL; + } + + return 0; +} + +static void clock_evt_handler(nrfs_clock_evt_t const *p_evt, void *context) +{ + struct lfclk_dev_data *dev_data = context; + int status = 0; + + k_timer_stop(&dev_data->timer); + + if (p_evt->type == NRFS_CLOCK_EVT_REJECT) { + status = -ENXIO; + } + + clock_config_update_end(&dev_data->clk_cfg, status); +} + +static void lfclk_update_timeout_handler(struct k_timer *timer) +{ + struct lfclk_dev_data *dev_data = + CONTAINER_OF(timer, struct lfclk_dev_data, timer); + + clock_config_update_end(&dev_data->clk_cfg, -ETIMEDOUT); +} + +static void lfclk_work_handler(struct k_work *work) +{ + struct lfclk_dev_data *dev_data = + CONTAINER_OF(work, struct lfclk_dev_data, clk_cfg.work); + uint8_t to_activate_idx; + nrfs_err_t err; + + to_activate_idx = clock_config_update_begin(work); + + err = nrfs_clock_lfclk_src_set(clock_options[to_activate_idx].src, + dev_data); + if (err != NRFS_SUCCESS) { + clock_config_update_end(&dev_data->clk_cfg, -EIO); + } else { + k_timer_start(&dev_data->timer, NRFS_CLOCK_TIMEOUT, K_NO_WAIT); + } +} + +static int lfclk_resolve_spec_to_idx(const struct device *dev, + const struct nrf_clock_spec *req_spec) +{ + struct lfclk_dev_data *dev_data = dev->data; + const struct lfclk_dev_config *dev_config = dev->config; + uint16_t req_accuracy; + + if (req_spec->frequency > dev_config->fixed_frequency) { + LOG_ERR("invalid frequency"); + return -EINVAL; + } + + req_accuracy = req_spec->accuracy == NRF_CLOCK_CONTROL_ACCURACY_MAX + ? dev_data->max_accuracy + : req_spec->accuracy; + + for (int i = dev_data->clock_options_cnt - 1; i >= 0; --i) { + /* Iterate to a more power hungry and accurate clock source + * If the requested accuracy is higher (lower ppm) than what + * the clock source can provide. + * + * In case of an accuracy of 0 (don't care), do not check accuracy. + */ + if ((req_accuracy != 0 && req_accuracy < clock_options[i].accuracy) || + (req_spec->precision > clock_options[i].precision)) { + continue; + } + + return i; + } + + LOG_ERR("invalid accuracy or precision"); + return -EINVAL; +} + +static void lfclk_get_spec_by_idx(const struct device *dev, + uint8_t idx, + struct nrf_clock_spec *spec) +{ + const struct lfclk_dev_config *dev_config = dev->config; + + spec->frequency = dev_config->fixed_frequency; + spec->accuracy = clock_options[idx].accuracy; + spec->precision = clock_options[idx].precision; +} + +static struct onoff_manager *lfclk_get_mgr_by_idx(const struct device *dev, uint8_t idx) +{ + struct lfclk_dev_data *dev_data = dev->data; + + return &dev_data->clk_cfg.onoff[idx].mgr; +} + +static int lfclk_get_startup_time_by_idx(const struct device *dev, + uint8_t idx, + uint32_t *startup_time_us) +{ + struct lfclk_dev_data *dev_data = dev->data; + nrfs_clock_src_t src = clock_options[idx].src; + + switch (src) { + case NRFS_CLOCK_SRC_LFCLK_LFLPRC: + *startup_time_us = LFCLK_LFLPRC_STARTUP_TIME_US; + return 0; + + case NRFS_CLOCK_SRC_LFCLK_LFRC: + *startup_time_us = LFCLK_LFRC_STARTUP_TIME_US; + return 0; + + case NRFS_CLOCK_SRC_LFCLK_XO_PIXO: + case NRFS_CLOCK_SRC_LFCLK_XO_PIERCE: + case NRFS_CLOCK_SRC_LFCLK_XO_EXT_SINE: + case NRFS_CLOCK_SRC_LFCLK_XO_EXT_SQUARE: + case NRFS_CLOCK_SRC_LFCLK_XO_PIERCE_HP: + case NRFS_CLOCK_SRC_LFCLK_XO_EXT_SINE_HP: + *startup_time_us = dev_data->lfxo_startup_time_us; + return 0; + + case NRFS_CLOCK_SRC_LFCLK_SYNTH: + *startup_time_us = dev_data->hfxo_startup_time_us; + return 0; + + default: + break; + } + + return -EINVAL; +} + +static struct onoff_manager *lfclk_find_mgr_by_spec(const struct device *dev, + const struct nrf_clock_spec *spec) +{ + int idx; + + if (!spec) { + return lfclk_get_mgr_by_idx(dev, 0); + } + + idx = lfclk_resolve_spec_to_idx(dev, spec); + return idx < 0 ? NULL : lfclk_get_mgr_by_idx(dev, idx); +} + +static int api_request_lfclk(const struct device *dev, + const struct nrf_clock_spec *spec, + struct onoff_client *cli) +{ + struct onoff_manager *mgr = lfclk_find_mgr_by_spec(dev, spec); + + if (mgr) { + return clock_config_request(mgr, cli); + } + + return -EINVAL; +} + +static int api_release_lfclk(const struct device *dev, + const struct nrf_clock_spec *spec) +{ + struct onoff_manager *mgr = lfclk_find_mgr_by_spec(dev, spec); + + if (mgr) { + return onoff_release(mgr); + } + + return -EINVAL; +} + +static int api_cancel_or_release_lfclk(const struct device *dev, + const struct nrf_clock_spec *spec, + struct onoff_client *cli) +{ + struct onoff_manager *mgr = lfclk_find_mgr_by_spec(dev, spec); + + if (mgr) { + return onoff_cancel_or_release(mgr, cli); + } + + return -EINVAL; +} + + +static int api_resolve(const struct device *dev, + const struct nrf_clock_spec *req_spec, + struct nrf_clock_spec *res_spec) +{ + int idx; + + idx = lfclk_resolve_spec_to_idx(dev, req_spec); + if (idx < 0) { + return -EINVAL; + } + + lfclk_get_spec_by_idx(dev, idx, res_spec); + return 0; +} + +static int api_get_startup_time(const struct device *dev, + const struct nrf_clock_spec *spec, + uint32_t *startup_time_us) +{ + int idx; + + idx = lfclk_resolve_spec_to_idx(dev, spec); + if (idx < 0) { + return -EINVAL; + } + + return lfclk_get_startup_time_by_idx(dev, idx, startup_time_us); +} + +static int api_get_rate_lfclk(const struct device *dev, + clock_control_subsys_t sys, + uint32_t *rate) +{ + ARG_UNUSED(sys); + + const struct lfclk_dev_config *dev_config = dev->config; + + *rate = dev_config->fixed_frequency; + + return 0; +} + +static int lfclk_init(const struct device *dev) +{ + struct lfclk_dev_data *dev_data = dev->data; + nrf_bicr_lfosc_mode_t lfosc_mode; + nrfs_err_t res; + + res = nrfs_clock_init(clock_evt_handler); + if (res != NRFS_SUCCESS) { + return -EIO; + } + + dev_data->clock_options_cnt = LFCLK_DEF_OPTS; + + lfosc_mode = nrf_bicr_lfosc_mode_get(BICR); + + if (lfosc_mode == NRF_BICR_LFOSC_MODE_UNCONFIGURED || + lfosc_mode == NRF_BICR_LFOSC_MODE_DISABLED) { + dev_data->max_accuracy = LFCLK_HFXO_ACCURACY; + } else { + int ret; + + ret = lfosc_get_accuracy(&dev_data->max_accuracy); + if (ret < 0) { + LOG_ERR("LFOSC enabled with invalid accuracy"); + return ret; + } + + switch (lfosc_mode) { + case NRF_BICR_LFOSC_MODE_CRYSTAL: + clock_options[LFCLK_MAX_OPTS - 1].accuracy = dev_data->max_accuracy; + clock_options[LFCLK_MAX_OPTS - 1].precision = 0; + clock_options[LFCLK_MAX_OPTS - 1].src = NRFS_CLOCK_SRC_LFCLK_XO_PIERCE; + + clock_options[LFCLK_MAX_OPTS - 2].accuracy = dev_data->max_accuracy; + clock_options[LFCLK_MAX_OPTS - 2].precision = 1; + clock_options[LFCLK_MAX_OPTS - 2].src = NRFS_CLOCK_SRC_LFCLK_XO_PIERCE_HP; + + dev_data->clock_options_cnt += 2; + break; + case NRF_BICR_LFOSC_MODE_EXTSINE: + clock_options[LFCLK_MAX_OPTS - 1].accuracy = dev_data->max_accuracy; + clock_options[LFCLK_MAX_OPTS - 1].precision = 0; + clock_options[LFCLK_MAX_OPTS - 1].src = NRFS_CLOCK_SRC_LFCLK_XO_EXT_SINE; + + clock_options[LFCLK_MAX_OPTS - 2].accuracy = dev_data->max_accuracy; + clock_options[LFCLK_MAX_OPTS - 2].precision = 1; + clock_options[LFCLK_MAX_OPTS - 2].src = NRFS_CLOCK_SRC_LFCLK_XO_EXT_SINE_HP; + + dev_data->clock_options_cnt += 2; + break; + case NRF_BICR_LFOSC_MODE_EXTSQUARE: + clock_options[LFCLK_MAX_OPTS - 2].accuracy = dev_data->max_accuracy; + clock_options[LFCLK_MAX_OPTS - 2].precision = 0; + clock_options[LFCLK_MAX_OPTS - 2].src = NRFS_CLOCK_SRC_LFCLK_XO_EXT_SQUARE; + + dev_data->clock_options_cnt += 1; + break; + default: + LOG_ERR("Unexpected LFOSC mode"); + return -EINVAL; + } + + dev_data->lfxo_startup_time_us = nrf_bicr_lfosc_startup_time_ms_get(BICR) + * USEC_PER_MSEC; + if (dev_data->lfxo_startup_time_us == NRF_BICR_LFOSC_STARTUP_TIME_UNCONFIGURED) { + LOG_ERR("BICR LFXO startup time invalid"); + return -ENODEV; + } + } + + dev_data->hfxo_startup_time_us = nrf_bicr_hfxo_startup_time_us_get(BICR); + if (dev_data->hfxo_startup_time_us == NRF_BICR_HFXO_STARTUP_TIME_UNCONFIGURED) { + LOG_ERR("BICR HFXO startup time invalid"); + return -ENODEV; + } + + k_timer_init(&dev_data->timer, lfclk_update_timeout_handler, NULL); + + return clock_config_init(&dev_data->clk_cfg, + ARRAY_SIZE(dev_data->clk_cfg.onoff), + lfclk_work_handler); +} + +static DEVICE_API(nrf_clock_control, lfclk_drv_api) = { + .std_api = { + .on = api_nosys_on_off, + .off = api_nosys_on_off, + .get_rate = api_get_rate_lfclk, + }, + .request = api_request_lfclk, + .release = api_release_lfclk, + .cancel_or_release = api_cancel_or_release_lfclk, + .resolve = api_resolve, + .get_startup_time = api_get_startup_time, +}; + +static struct lfclk_dev_data lfclk_data; + +static const struct lfclk_dev_config lfclk_config = { + .fixed_frequency = DT_INST_PROP(0, clock_frequency), +}; + +DEVICE_DT_INST_DEFINE(0, lfclk_init, NULL, + &lfclk_data, &lfclk_config, + PRE_KERNEL_1, CONFIG_CLOCK_CONTROL_INIT_PRIORITY, + &lfclk_drv_api); diff --git a/drivers/comparator/comparator_nrf_common.h b/drivers/comparator/comparator_nrf_common.h deleted file mode 100644 index e86fc9f63692..000000000000 --- a/drivers/comparator/comparator_nrf_common.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Copyright (c) 2025 Nordic Semiconductor ASA - * SPDX-License-Identifier: Apache-2.0 - */ - -#ifndef ZEPHYR_DRIVERS_COMPARATOR_NRF_COMMON_H_ -#define ZEPHYR_DRIVERS_COMPARATOR_NRF_COMMON_H_ - -#include - -#if (NRF_COMP_HAS_AIN_AS_PIN || NRF_LPCOMP_HAS_AIN_AS_PIN) -static const uint32_t shim_nrf_comp_ain_map[] = { -#if defined(CONFIG_SOC_NRF54H20) || defined(CONFIG_SOC_NRF9280) - NRF_PIN_PORT_TO_PIN_NUMBER(0U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(1U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(2U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(3U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(4U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(5U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(6U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(7U, 1), -#elif defined(CONFIG_SOC_NRF54L05) || defined(CONFIG_SOC_NRF54L10) || defined(CONFIG_SOC_NRF54L15) - NRF_PIN_PORT_TO_PIN_NUMBER(4U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(5U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(6U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(7U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(11U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(12U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(13U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(14U, 1), -#elif defined(NRF54LM20A_ENGA_XXAA) - NRF_PIN_PORT_TO_PIN_NUMBER(0U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(31U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(30U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(29U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(6U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(5U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(4U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(3U, 1), -#elif defined(NRF54LV10A_ENGA_XXAA) - NRF_PIN_PORT_TO_PIN_NUMBER(0U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(1U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(2U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(3U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(7U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(10U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(11U, 1), - NRF_PIN_PORT_TO_PIN_NUMBER(12U, 1), -#endif -}; -#endif - -#endif /* ZEPHYR_DRIVERS_COMPARATOR_NRF_COMMON_H_ */ diff --git a/drivers/comparator/comparator_nrf_comp.c b/drivers/comparator/comparator_nrf_comp.c index 311a864303bf..c9c321eebeff 100644 --- a/drivers/comparator/comparator_nrf_comp.c +++ b/drivers/comparator/comparator_nrf_comp.c @@ -9,7 +9,6 @@ #include #include #include -#include "comparator_nrf_common.h" #define DT_DRV_COMPAT nordic_nrf_comp @@ -19,8 +18,7 @@ #define SHIM_NRF_COMP_DT_INST_REFSEL_IS_AREF(inst) \ DT_INST_ENUM_HAS_VALUE(inst, refsel, aref) -#define SHIM_NRF_COMP_DT_INST_EXTREFSEL(inst) \ - _CONCAT(COMP_NRF_COMP_EXTREFSEL_, DT_INST_STRING_TOKEN(inst, extrefsel)) +#define SHIM_NRF_COMP_DT_INST_EXTREFSEL(inst) DT_INST_PROP(inst, extrefsel) #define SHIM_NRF_COMP_DT_INST_MAIN_MODE_IS_SE(inst) \ DT_INST_ENUM_HAS_VALUE(inst, main_mode, se) @@ -43,22 +41,7 @@ #define SHIM_NRF_COMP_DT_INST_ISOURCE(inst) \ _CONCAT(COMP_NRF_COMP_ISOURCE_, DT_INST_STRING_TOKEN(inst, isource)) -#define SHIM_NRF_COMP_DT_INST_PSEL(inst) \ - _CONCAT(COMP_NRF_COMP_PSEL_, DT_INST_STRING_TOKEN(inst, psel)) - -#if defined(COMP_HYST_HYST_Hyst40mV) -#define NRF_COMP_HYST_ENABLED NRF_COMP_HYST_40MV -#elif defined(COMP_HYST_HYST_Hyst50mV) -#define NRF_COMP_HYST_ENABLED NRF_COMP_HYST_50MV -#endif - -#define NRF_COMP_HYST_DISABLED NRF_COMP_HYST_NO_HYST - -#if defined(NRF_COMP_HYST_ENABLED) -#define NRF_COMP_HAS_HYST 1 -#else -#define NRF_COMP_HAS_HYST 0 -#endif +#define SHIM_NRF_COMP_DT_INST_PSEL(inst) DT_INST_PROP(inst, psel) struct shim_nrf_comp_data { uint32_t event_mask; @@ -73,87 +56,41 @@ BUILD_ASSERT(SHIM_NRF_COMP_DT_INST_TH_DOWN(0) < 64); BUILD_ASSERT(SHIM_NRF_COMP_DT_INST_TH_UP(0) < 64); #endif -#if NRF_COMP_HAS_AIN_AS_PIN -BUILD_ASSERT((COMP_NRF_COMP_PSEL_AIN0 == 0)); -BUILD_ASSERT((COMP_NRF_COMP_PSEL_AIN7 == 7)); -BUILD_ASSERT((COMP_NRF_COMP_EXTREFSEL_AIN0 == 0)); -BUILD_ASSERT((COMP_NRF_COMP_EXTREFSEL_AIN7 == 7)); -#else -#ifndef COMP_PSEL_PSEL_AnalogInput4 -BUILD_ASSERT(SHIM_NRF_COMP_DT_INST_PSEL(0) != COMP_NRF_COMP_PSEL_AIN4); -#endif - -#ifndef COMP_PSEL_PSEL_AnalogInput5 -BUILD_ASSERT(SHIM_NRF_COMP_DT_INST_PSEL(0) != COMP_NRF_COMP_PSEL_AIN5); +BUILD_ASSERT((NRF_COMP_AIN0 == NRFX_ANALOG_EXTERNAL_AIN0) && + (NRF_COMP_AIN1 == NRFX_ANALOG_EXTERNAL_AIN1) && + (NRF_COMP_AIN2 == NRFX_ANALOG_EXTERNAL_AIN2) && + (NRF_COMP_AIN3 == NRFX_ANALOG_EXTERNAL_AIN3) && + (NRF_COMP_AIN4 == NRFX_ANALOG_EXTERNAL_AIN4) && + (NRF_COMP_AIN5 == NRFX_ANALOG_EXTERNAL_AIN5) && + (NRF_COMP_AIN6 == NRFX_ANALOG_EXTERNAL_AIN6) && + (NRF_COMP_AIN7 == NRFX_ANALOG_EXTERNAL_AIN7) && +#if NRF_COMP_HAS_VDDH_DIV5 + (NRF_COMP_AIN_VDDH_DIV5 == NRFX_ANALOG_INTERNAL_VDDHDIV5) && #endif - -#ifndef COMP_PSEL_PSEL_AnalogInput6 -BUILD_ASSERT(SHIM_NRF_COMP_DT_INST_PSEL(0) != COMP_NRF_COMP_PSEL_AIN6); -#endif - -#ifndef COMP_PSEL_PSEL_AnalogInput7 -BUILD_ASSERT(SHIM_NRF_COMP_DT_INST_PSEL(0) != COMP_NRF_COMP_PSEL_AIN7); -#endif -#endif - -#ifndef COMP_PSEL_PSEL_VddDiv2 -BUILD_ASSERT(SHIM_NRF_COMP_DT_INST_PSEL(0) != COMP_NRF_COMP_PSEL_VDD_DIV2); -#endif - -#ifndef COMP_PSEL_PSEL_VddhDiv5 -BUILD_ASSERT(SHIM_NRF_COMP_DT_INST_PSEL(0) != COMP_NRF_COMP_PSEL_VDDH_DIV5); +#if NRF_COMP_HAS_VDD_DIV2 + (NRF_COMP_AIN_VDD_DIV2 == NRFX_ANALOG_INTERNAL_VDDDIV2) && #endif + 1, + "Definitions from nrf-comp.h do not match those from nrfx_analog_common.h"); -#ifndef COMP_MODE_SP_Normal +#if !NRF_COMP_HAS_SP_MODE_NORMAL BUILD_ASSERT(SHIM_NRF_COMP_DT_INST_SP_MODE(0) != COMP_NRF_COMP_SP_MODE_NORMAL); #endif -#if NRF_COMP_HAS_ISOURCE -#ifndef COMP_ISOURCE_ISOURCE_Ien2uA5 -BUILD_ASSERT(SHIM_NRF_COMP_DT_INST_ISOURCE(0) != COMP_NRF_COMP_ISOURCE_2UA5); -#endif - -#ifndef COMP_ISOURCE_ISOURCE_Ien5uA -BUILD_ASSERT(SHIM_NRF_COMP_DT_INST_ISOURCE(0) != COMP_NRF_COMP_ISOURCE_5UA); -#endif - -#ifndef COMP_ISOURCE_ISOURCE_Ien10uA -BUILD_ASSERT(SHIM_NRF_COMP_DT_INST_ISOURCE(0) != COMP_NRF_COMP_ISOURCE_10UA); -#endif -#endif - -#if SHIM_NRF_COMP_DT_INST_REFSEL_IS_AREF(0) -#ifndef COMP_EXTREFSEL_EXTREFSEL_AnalogReference4 -BUILD_ASSERT(SHIM_NRF_COMP_DT_INST_EXTREFSEL(0) != COMP_NRF_COMP_EXTREFSEL_AIN4); -#endif - -#ifndef COMP_EXTREFSEL_EXTREFSEL_AnalogReference5 -BUILD_ASSERT(SHIM_NRF_COMP_DT_INST_EXTREFSEL(0) != COMP_NRF_COMP_EXTREFSEL_AIN5); -#endif - -#ifndef COMP_EXTREFSEL_EXTREFSEL_AnalogReference6 -BUILD_ASSERT(SHIM_NRF_COMP_DT_INST_EXTREFSEL(0) != COMP_NRF_COMP_EXTREFSEL_AIN6); -#endif - -#ifndef COMP_EXTREFSEL_EXTREFSEL_AnalogReference7 -BUILD_ASSERT(SHIM_NRF_COMP_DT_INST_EXTREFSEL(0) != COMP_NRF_COMP_EXTREFSEL_AIN7); -#endif -#endif - #if SHIM_NRF_COMP_DT_INST_MAIN_MODE_IS_SE(0) -#ifndef COMP_REFSEL_REFSEL_Int1V8 +#if !NRF_COMP_HAS_REF_INT_1V8 BUILD_ASSERT(SHIM_NRF_COMP_DT_INST_REFSEL(0) != COMP_NRF_COMP_REFSEL_INT_1V8); #endif -#ifndef COMP_REFSEL_REFSEL_Int2V4 +#if !NRF_COMP_HAS_REF_INT_2V4 BUILD_ASSERT(SHIM_NRF_COMP_DT_INST_REFSEL(0) != COMP_NRF_COMP_REFSEL_INT_2V4); #endif -#ifndef COMP_REFSEL_REFSEL_AVDDAO1V8 +#if !NRF_COMP_HAS_REF_AVDDAO1V8 BUILD_ASSERT(SHIM_NRF_COMP_DT_INST_REFSEL(0) != COMP_NRF_COMP_REFSEL_AVDDAO1V8); #endif -#ifndef COMP_REFSEL_REFSEL_VDD +#if !NRF_COMP_HAS_REF_VDD BUILD_ASSERT(SHIM_NRF_COMP_DT_INST_REFSEL(0) != COMP_NRF_COMP_REFSEL_VDD); #endif #endif @@ -245,82 +182,6 @@ static int shim_nrf_comp_pm_callback(const struct device *dev, enum pm_device_ac return 0; } -#if (NRF_COMP_HAS_AIN_AS_PIN) -static int shim_nrf_comp_psel_to_nrf(enum comp_nrf_comp_psel shim, - nrf_comp_input_t *nrf) -{ - if (shim >= ARRAY_SIZE(shim_nrf_comp_ain_map)) { - return -EINVAL; - } - - *nrf = shim_nrf_comp_ain_map[(uint32_t)shim]; - return 0; -} -#else -static int shim_nrf_comp_psel_to_nrf(enum comp_nrf_comp_psel shim, - nrf_comp_input_t *nrf) -{ - switch (shim) { - case COMP_NRF_COMP_PSEL_AIN0: - *nrf = NRF_COMP_INPUT_0; - break; - - case COMP_NRF_COMP_PSEL_AIN1: - *nrf = NRF_COMP_INPUT_1; - break; - - case COMP_NRF_COMP_PSEL_AIN2: - *nrf = NRF_COMP_INPUT_2; - break; - - case COMP_NRF_COMP_PSEL_AIN3: - *nrf = NRF_COMP_INPUT_3; - break; - -#if defined(COMP_PSEL_PSEL_AnalogInput4) - case COMP_NRF_COMP_PSEL_AIN4: - *nrf = NRF_COMP_INPUT_4; - break; -#endif - -#if defined(COMP_PSEL_PSEL_AnalogInput5) - case COMP_NRF_COMP_PSEL_AIN5: - *nrf = NRF_COMP_INPUT_5; - break; -#endif - -#if defined(COMP_PSEL_PSEL_AnalogInput6) - case COMP_NRF_COMP_PSEL_AIN6: - *nrf = NRF_COMP_INPUT_6; - break; -#endif - -#if defined(COMP_PSEL_PSEL_AnalogInput7) - case COMP_NRF_COMP_PSEL_AIN7: - *nrf = NRF_COMP_INPUT_7; - break; -#endif - -#if defined(COMP_PSEL_PSEL_VddDiv2) - case COMP_NRF_COMP_PSEL_VDD_DIV2: - *nrf = NRF_COMP_VDD_DIV2; - break; -#endif - -#if defined(COMP_PSEL_PSEL_VddhDiv5) - case COMP_NRF_COMP_PSEL_VDDH_DIV5: - *nrf = NRF_COMP_VDDH_DIV5; - break; -#endif - - default: - return -EINVAL; - } - - return 0; -} -#endif - static int shim_nrf_comp_sp_mode_to_nrf(enum comp_nrf_comp_sp_mode shim, nrf_comp_sp_mode_t *nrf) { @@ -329,7 +190,7 @@ static int shim_nrf_comp_sp_mode_to_nrf(enum comp_nrf_comp_sp_mode shim, *nrf = NRF_COMP_SP_MODE_LOW; break; -#if defined(COMP_MODE_SP_Normal) +#if NRF_COMP_HAS_SP_MODE_NORMAL case COMP_NRF_COMP_SP_MODE_NORMAL: *nrf = NRF_COMP_SP_MODE_NORMAL; break; @@ -348,95 +209,21 @@ static int shim_nrf_comp_sp_mode_to_nrf(enum comp_nrf_comp_sp_mode shim, #if NRF_COMP_HAS_ISOURCE static int shim_nrf_comp_isource_to_nrf(enum comp_nrf_comp_isource shim, - nrf_isource_t *nrf) + nrf_comp_isource_t *nrf) { switch (shim) { case COMP_NRF_COMP_ISOURCE_DISABLED: *nrf = NRF_COMP_ISOURCE_OFF; break; - -#if defined(COMP_ISOURCE_ISOURCE_Ien2uA5) case COMP_NRF_COMP_ISOURCE_2UA5: *nrf = NRF_COMP_ISOURCE_IEN_2UA5; break; -#endif - -#if defined(COMP_ISOURCE_ISOURCE_Ien5uA) case COMP_NRF_COMP_ISOURCE_5UA: *nrf = NRF_COMP_ISOURCE_IEN_5UA; break; -#endif - -#if defined(COMP_ISOURCE_ISOURCE_Ien10uA) case COMP_NRF_COMP_ISOURCE_10UA: *nrf = NRF_COMP_ISOURCE_IEN_10UA; break; -#endif - - default: - return -EINVAL; - } - - return 0; -} -#endif - -#if (NRF_COMP_HAS_AIN_AS_PIN) -static int shim_nrf_comp_extrefsel_to_nrf(enum comp_nrf_comp_extrefsel shim, - nrf_comp_ext_ref_t *nrf) -{ - if (shim >= ARRAY_SIZE(shim_nrf_comp_ain_map)) { - return -EINVAL; - } - - *nrf = shim_nrf_comp_ain_map[(uint32_t)shim]; - return 0; -} -#else -static int shim_nrf_comp_extrefsel_to_nrf(enum comp_nrf_comp_extrefsel shim, - nrf_comp_ext_ref_t *nrf) -{ - switch (shim) { - case COMP_NRF_COMP_EXTREFSEL_AIN0: - *nrf = NRF_COMP_EXT_REF_0; - break; - - case COMP_NRF_COMP_EXTREFSEL_AIN1: - *nrf = NRF_COMP_EXT_REF_1; - break; - - case COMP_NRF_COMP_EXTREFSEL_AIN2: - *nrf = NRF_COMP_EXT_REF_2; - break; - - case COMP_NRF_COMP_EXTREFSEL_AIN3: - *nrf = NRF_COMP_EXT_REF_3; - break; - -#if defined(COMP_EXTREFSEL_EXTREFSEL_AnalogReference4) - case COMP_NRF_COMP_EXTREFSEL_AIN4: - *nrf = NRF_COMP_EXT_REF_4; - break; -#endif - -#if defined(COMP_EXTREFSEL_EXTREFSEL_AnalogReference5) - case COMP_NRF_COMP_EXTREFSEL_AIN5: - *nrf = NRF_COMP_EXT_REF_5; - break; -#endif - -#if defined(COMP_EXTREFSEL_EXTREFSEL_AnalogReference6) - case COMP_NRF_COMP_EXTREFSEL_AIN6: - *nrf = NRF_COMP_EXT_REF_6; - break; -#endif - -#if defined(COMP_EXTREFSEL_EXTREFSEL_AnalogReference7) - case COMP_NRF_COMP_EXTREFSEL_AIN7: - *nrf = NRF_COMP_EXT_REF_7; - break; -#endif - default: return -EINVAL; } @@ -453,25 +240,25 @@ static int shim_nrf_comp_refsel_to_nrf(enum comp_nrf_comp_refsel shim, *nrf = NRF_COMP_REF_INT_1V2; break; -#if defined(COMP_REFSEL_REFSEL_Int1V8) +#if NRF_COMP_HAS_REF_INT_1V8 case COMP_NRF_COMP_REFSEL_INT_1V8: *nrf = NRF_COMP_REF_INT_1V8; break; #endif -#if defined(COMP_REFSEL_REFSEL_Int2V4) +#if NRF_COMP_HAS_REF_INT_2V4 case COMP_NRF_COMP_REFSEL_INT_2V4: *nrf = NRF_COMP_REF_INT_2V4; break; #endif -#if defined(COMP_REFSEL_REFSEL_AVDDAO1V8) +#if NRF_COMP_HAS_REF_AVDDAO1V8 case COMP_NRF_COMP_REFSEL_AVDDAO1V8: *nrf = NRF_COMP_REF_AVDDAO1V8; break; #endif -#if defined(COMP_REFSEL_REFSEL_VDD) +#if NRF_COMP_HAS_REF_VDD case COMP_NRF_COMP_REFSEL_VDD: *nrf = NRF_COMP_REF_VDD; break; @@ -495,9 +282,8 @@ static int shim_nrf_comp_se_config_to_nrf(const struct comp_nrf_comp_se_config * return -EINVAL; } - if (shim_nrf_comp_extrefsel_to_nrf(shim->extrefsel, &nrf->ext_ref)) { - return -EINVAL; - } + nrf->ext_ref = (nrfx_analog_input_t)shim->extrefsel; + nrf->input = (nrfx_analog_input_t)shim->psel; nrf->main_mode = NRF_COMP_MAIN_MODE_SE; @@ -524,10 +310,6 @@ static int shim_nrf_comp_se_config_to_nrf(const struct comp_nrf_comp_se_config * } #endif - if (shim_nrf_comp_psel_to_nrf(shim->psel, &nrf->input)) { - return -EINVAL; - } - nrf->interrupt_priority = 0; return 0; } @@ -537,9 +319,8 @@ static int shim_nrf_comp_diff_config_to_nrf(const struct comp_nrf_comp_diff_conf { nrf->reference = NRF_COMP_REF_AREF; - if (shim_nrf_comp_extrefsel_to_nrf(shim->extrefsel, &nrf->ext_ref)) { - return -EINVAL; - } + nrf->ext_ref = (nrfx_analog_input_t)shim->extrefsel; + nrf->input = (nrfx_analog_input_t)shim->psel; nrf->main_mode = NRF_COMP_MAIN_MODE_DIFF; nrf->threshold.th_down = 0; @@ -571,10 +352,6 @@ static int shim_nrf_comp_diff_config_to_nrf(const struct comp_nrf_comp_diff_conf } #endif - if (shim_nrf_comp_psel_to_nrf(shim->psel, &nrf->input)) { - return -EINVAL; - } - nrf->interrupt_priority = 0; return 0; } diff --git a/drivers/comparator/comparator_nrf_lpcomp.c b/drivers/comparator/comparator_nrf_lpcomp.c index 623c7adacd42..36b4c440f4b3 100644 --- a/drivers/comparator/comparator_nrf_lpcomp.c +++ b/drivers/comparator/comparator_nrf_lpcomp.c @@ -9,7 +9,6 @@ #include #include #include -#include "comparator_nrf_common.h" #include @@ -21,14 +20,12 @@ #define SHIM_NRF_LPCOMP_DT_INST_REFSEL_IS_AREF(inst) \ DT_INST_ENUM_HAS_VALUE(inst, refsel, aref) -#define SHIM_NRF_LPCOMP_DT_INST_EXTREFSEL(inst) \ - _CONCAT(COMP_NRF_LPCOMP_EXTREFSEL_, DT_INST_STRING_TOKEN(inst, extrefsel)) +#define SHIM_NRF_LPCOMP_DT_INST_EXTREFSEL(inst) DT_INST_PROP(inst, extrefsel) #define SHIM_NRF_LPCOMP_DT_INST_ENABLE_HYST(inst) \ DT_INST_PROP(inst, enable_hyst) -#define SHIM_NRF_LPCOMP_DT_INST_PSEL(inst) \ - _CONCAT(COMP_NRF_LPCOMP_PSEL_, DT_INST_STRING_TOKEN(inst, psel)) +#define SHIM_NRF_LPCOMP_DT_INST_PSEL(inst) DT_INST_PROP(inst, psel) struct shim_nrf_lpcomp_data { nrfx_lpcomp_config_t config; @@ -39,12 +36,15 @@ struct shim_nrf_lpcomp_data { void *user_data; }; -#if (NRF_LPCOMP_HAS_AIN_AS_PIN) -BUILD_ASSERT(COMP_NRF_LPCOMP_PSEL_AIN0 == 0); -BUILD_ASSERT(COMP_NRF_LPCOMP_PSEL_AIN7 == 7); -BUILD_ASSERT(COMP_NRF_LPCOMP_EXTREFSEL_AIN0 == 0); -BUILD_ASSERT(COMP_NRF_LPCOMP_EXTREFSEL_AIN1 == 1); -#endif +BUILD_ASSERT((NRF_COMP_AIN0 == NRFX_ANALOG_EXTERNAL_AIN0) && + (NRF_COMP_AIN1 == NRFX_ANALOG_EXTERNAL_AIN1) && + (NRF_COMP_AIN2 == NRFX_ANALOG_EXTERNAL_AIN2) && + (NRF_COMP_AIN3 == NRFX_ANALOG_EXTERNAL_AIN3) && + (NRF_COMP_AIN4 == NRFX_ANALOG_EXTERNAL_AIN4) && + (NRF_COMP_AIN5 == NRFX_ANALOG_EXTERNAL_AIN5) && + (NRF_COMP_AIN6 == NRFX_ANALOG_EXTERNAL_AIN6) && + (NRF_COMP_AIN7 == NRFX_ANALOG_EXTERNAL_AIN7), + "Definitions from nrf-comp.h do not match those from nrfx_analog_common.h"); #if (LPCOMP_REFSEL_RESOLUTION == 8) BUILD_ASSERT((SHIM_NRF_LPCOMP_DT_INST_REFSEL(0) < COMP_NRF_LPCOMP_REFSEL_VDD_1_16) || @@ -125,94 +125,6 @@ static int shim_nrf_lpcomp_pm_callback(const struct device *dev, enum pm_device_ return 0; } -#if (NRF_LPCOMP_HAS_AIN_AS_PIN) -static int shim_nrf_lpcomp_psel_to_nrf(enum comp_nrf_lpcomp_psel shim, - nrf_lpcomp_input_t *nrf) -{ - if (shim >= ARRAY_SIZE(shim_nrf_comp_ain_map)) { - return -EINVAL; - } - - *nrf = shim_nrf_comp_ain_map[(uint32_t)shim]; - return 0; -} -#else -static int shim_nrf_lpcomp_psel_to_nrf(enum comp_nrf_lpcomp_psel shim, - nrf_lpcomp_input_t *nrf) -{ - switch (shim) { - case COMP_NRF_LPCOMP_PSEL_AIN0: - *nrf = NRF_LPCOMP_INPUT_0; - break; - - case COMP_NRF_LPCOMP_PSEL_AIN1: - *nrf = NRF_LPCOMP_INPUT_1; - break; - - case COMP_NRF_LPCOMP_PSEL_AIN2: - *nrf = NRF_LPCOMP_INPUT_2; - break; - - case COMP_NRF_LPCOMP_PSEL_AIN3: - *nrf = NRF_LPCOMP_INPUT_3; - break; - - case COMP_NRF_LPCOMP_PSEL_AIN4: - *nrf = NRF_LPCOMP_INPUT_4; - break; - - case COMP_NRF_LPCOMP_PSEL_AIN5: - *nrf = NRF_LPCOMP_INPUT_5; - break; - - case COMP_NRF_LPCOMP_PSEL_AIN6: - *nrf = NRF_LPCOMP_INPUT_6; - break; - - case COMP_NRF_LPCOMP_PSEL_AIN7: - *nrf = NRF_LPCOMP_INPUT_7; - break; - - default: - return -EINVAL; - } - - return 0; -} -#endif - -#if (NRF_LPCOMP_HAS_AIN_AS_PIN) -static int shim_nrf_lpcomp_extrefsel_to_nrf(enum comp_nrf_lpcomp_extrefsel shim, - nrf_lpcomp_ext_ref_t *nrf) -{ - if (shim >= ARRAY_SIZE(shim_nrf_comp_ain_map)) { - return -EINVAL; - } - - *nrf = shim_nrf_comp_ain_map[shim]; - return 0; -} -#else -static int shim_nrf_lpcomp_extrefsel_to_nrf(enum comp_nrf_lpcomp_extrefsel shim, - nrf_lpcomp_ext_ref_t *nrf) -{ - switch (shim) { - case COMP_NRF_LPCOMP_EXTREFSEL_AIN0: - *nrf = NRF_LPCOMP_EXT_REF_REF0; - break; - - case COMP_NRF_LPCOMP_EXTREFSEL_AIN1: - *nrf = NRF_LPCOMP_EXT_REF_REF1; - break; - - default: - return -EINVAL; - } - - return 0; -} -#endif - static int shim_nrf_lpcomp_refsel_to_nrf(enum comp_nrf_lpcomp_refsel shim, nrf_lpcomp_ref_t *nrf) { @@ -297,9 +209,8 @@ static int shim_nrf_lpcomp_config_to_nrf(const struct comp_nrf_lpcomp_config *sh return -EINVAL; } - if (shim_nrf_lpcomp_extrefsel_to_nrf(shim->extrefsel, &nrf->ext_ref)) { - return -EINVAL; - } + nrf->ext_ref = (nrfx_analog_input_t)shim->extrefsel; + nrf->input = (nrfx_analog_input_t)shim->psel; #if NRF_LPCOMP_HAS_HYST if (shim->enable_hyst) { @@ -313,10 +224,6 @@ static int shim_nrf_lpcomp_config_to_nrf(const struct comp_nrf_lpcomp_config *sh } #endif - if (shim_nrf_lpcomp_psel_to_nrf(shim->psel, &nrf->input)) { - return -EINVAL; - } - return 0; } diff --git a/drivers/counter/counter_nrfx_rtc.c b/drivers/counter/counter_nrfx_rtc.c index 735aa49a76f4..70f822591a13 100644 --- a/drivers/counter/counter_nrfx_rtc.c +++ b/drivers/counter/counter_nrfx_rtc.c @@ -11,11 +11,7 @@ #endif #include #include -#ifdef DPPI_PRESENT -#include -#else -#include -#endif +#include #define LOG_MODULE_NAME counter_rtc #include @@ -58,7 +54,7 @@ struct counter_nrfx_data { /* Store channel interrupt pending and CC adjusted flags. */ atomic_t ipend_adj; #if CONFIG_COUNTER_RTC_WITH_PPI_WRAP - uint8_t ppi_ch; + nrfx_gppi_handle_t ppi_handle; #endif }; @@ -379,41 +375,21 @@ static int ppi_setup(const struct device *dev, uint8_t chan) struct counter_nrfx_data *data = dev->data; NRF_RTC_Type *rtc = nrfx_config->rtc; nrf_rtc_event_t evt = NRF_RTC_CHANNEL_EVENT_ADDR(chan); - nrfx_err_t result; + uint32_t eep = nrf_rtc_event_address_get(rtc, evt); + uint32_t tep = nrfy_rtc_task_address_get(rtc, NRF_RTC_TASK_CLEAR); + int err; if (!nrfx_config->use_ppi) { return 0; } nrfy_rtc_event_enable(rtc, NRF_RTC_CHANNEL_INT_MASK(chan)); -#ifdef DPPI_PRESENT - nrfx_dppi_t dppi = NRFX_DPPI_INSTANCE(0); - - result = nrfx_dppi_channel_alloc(&dppi, &data->ppi_ch); - if (result != NRFX_SUCCESS) { - ERR("Failed to allocate PPI channel."); - return -ENODEV; + err = nrfx_gppi_conn_alloc(eep, tep, &data->ppi_handle); + if (err < 0) { + return err; } - - nrfy_rtc_subscribe_set(rtc, NRF_RTC_TASK_CLEAR, data->ppi_ch); - nrfy_rtc_publish_set(rtc, evt, data->ppi_ch); - (void)nrfx_dppi_channel_enable(&dppi, data->ppi_ch); -#else /* DPPI_PRESENT */ - uint32_t evt_addr; - uint32_t task_addr; - - evt_addr = nrfy_rtc_event_address_get(rtc, evt); - task_addr = nrfy_rtc_task_address_get(rtc, NRF_RTC_TASK_CLEAR); - - result = nrfx_ppi_channel_alloc(&data->ppi_ch); - if (result != NRFX_SUCCESS) { - ERR("Failed to allocate PPI channel."); - return -ENODEV; - } - (void)nrfx_ppi_channel_assign(data->ppi_ch, evt_addr, task_addr); - (void)nrfx_ppi_channel_enable(data->ppi_ch); + nrfx_gppi_conn_enable(data->ppi_handle); #endif -#endif /* CONFIG_COUNTER_RTC_WITH_PPI_WRAP */ return 0; } @@ -422,25 +398,17 @@ static void ppi_free(const struct device *dev, uint8_t chan) #if CONFIG_COUNTER_RTC_WITH_PPI_WRAP const struct counter_nrfx_config *nrfx_config = dev->config; struct counter_nrfx_data *data = dev->data; - uint8_t ppi_ch = data->ppi_ch; NRF_RTC_Type *rtc = nrfx_config->rtc; + nrf_rtc_event_t evt = NRF_RTC_CHANNEL_EVENT_ADDR(chan); + uint32_t eep = nrf_rtc_event_address_get(rtc, evt); + uint32_t tep = nrfy_rtc_task_address_get(rtc, NRF_RTC_TASK_CLEAR); if (!nrfx_config->use_ppi) { return; } nrfy_rtc_event_disable(rtc, NRF_RTC_CHANNEL_INT_MASK(chan)); -#ifdef DPPI_PRESENT - nrf_rtc_event_t evt = NRF_RTC_CHANNEL_EVENT_ADDR(chan); - nrfx_dppi_t dppi = NRFX_DPPI_INSTANCE(0); - - (void)nrfx_dppi_channel_disable(&dppi, ppi_ch); - nrfy_rtc_subscribe_clear(rtc, NRF_RTC_TASK_CLEAR); - nrfy_rtc_publish_clear(rtc, evt); - (void)nrfx_dppi_channel_free(&dppi, ppi_ch); -#else /* DPPI_PRESENT */ - (void)nrfx_ppi_channel_disable(ppi_ch); - (void)nrfx_ppi_channel_free(ppi_ch); -#endif + nrfx_gppi_conn_disable(data->ppi_handle); + nrfx_gppi_conn_free(eep, tep, data->ppi_handle); #endif } diff --git a/drivers/display/Kconfig.nrf_led_matrix b/drivers/display/Kconfig.nrf_led_matrix index 7e2a59120736..66bf11dd52ee 100644 --- a/drivers/display/Kconfig.nrf_led_matrix +++ b/drivers/display/Kconfig.nrf_led_matrix @@ -6,7 +6,7 @@ config DISPLAY_NRF_LED_MATRIX default y depends on DT_HAS_NORDIC_NRF_LED_MATRIX_ENABLED select NRFX_GPIOTE - select NRFX_PPI if HAS_HW_NRF_PPI + select NRFX_GPPI help Enable driver for a LED matrix with rows and columns driven by GPIOs. The driver allows setting one of 256 levels of brightness diff --git a/drivers/display/display_nrf_led_matrix.c b/drivers/display/display_nrf_led_matrix.c index 79ae6652807a..51f2f3ea73f5 100644 --- a/drivers/display/display_nrf_led_matrix.c +++ b/drivers/display/display_nrf_led_matrix.c @@ -13,10 +13,8 @@ #include #endif #include -#ifdef PPI_PRESENT -#include -#endif -#include +#include +#include #include #include LOG_MODULE_REGISTER(nrf_led_matrix, CONFIG_DISPLAY_LOG_LEVEL); @@ -91,7 +89,7 @@ struct display_drv_config { #if USE_PWM NRF_PWM_Type *pwm; #else - nrfx_gpiote_t gpiote; + nrfx_gpiote_t *gpiote; #endif uint8_t rows[ROW_COUNT]; uint8_t cols[COL_COUNT]; @@ -327,7 +325,7 @@ static void prepare_pixel_pulse(const struct device *dev, /* First timer channel is used for timing the period of pulses. */ nrf_timer_cc_set(dev_config->timer, 1 + channel_idx, pulse); - dev_config->gpiote.p_reg->CONFIG[dev_data->gpiote_ch[channel_idx]] = gpiote_cfg; + dev_config->gpiote->p_reg->CONFIG[dev_data->gpiote_ch[channel_idx]] = gpiote_cfg; #endif /* USE_PWM */ } @@ -357,7 +355,7 @@ static void timer_irq_handler(void *arg) } #else for (int i = 0; i < GROUP_SIZE; ++i) { - dev_config->gpiote.p_reg->CONFIG[dev_data->gpiote_ch[i]] = 0; + dev_config->gpiote->p_reg->CONFIG[dev_data->gpiote_ch[i]] = 0; } #endif @@ -437,38 +435,37 @@ static int instance_init(const struct device *dev) nrf_pwm_loop_set(dev_config->pwm, 0); nrf_pwm_shorts_set(dev_config->pwm, NRF_PWM_SHORT_SEQEND0_STOP_MASK); #else - nrfx_err_t err; - nrf_ppi_channel_t ppi_ch; + nrfx_gppi_handle_t ppi_handle; + int rv; for (int i = 0; i < GROUP_SIZE; ++i) { uint8_t *gpiote_ch = &dev_data->gpiote_ch[i]; - err = nrfx_ppi_channel_alloc(&ppi_ch); - if (err != NRFX_SUCCESS) { - LOG_ERR("Failed to allocate PPI channel."); + rv = nrfx_gpiote_channel_alloc(dev_config->gpiote, gpiote_ch); + if (rv != 0) { + LOG_ERR("Failed to allocate GPIOTE channel."); /* Do not bother with freeing resources allocated * so far. The application needs to be reconfigured * anyway. */ - return -ENOMEM; + return rv; } - err = nrfx_gpiote_channel_alloc(&dev_config->gpiote, gpiote_ch); - if (err != NRFX_SUCCESS) { - LOG_ERR("Failed to allocate GPIOTE channel."); + rv = nrfx_gppi_conn_alloc( + nrf_timer_event_address_get(dev_config->timer, + nrf_timer_compare_event_get(1 + i)), + nrf_gpiote_event_address_get(dev_config->gpiote->p_reg, + nrf_gpiote_out_task_get(*gpiote_ch)), + &ppi_handle); + if (rv < 0) { + LOG_ERR("Failed to allocate PPI channel."); /* Do not bother with freeing resources allocated * so far. The application needs to be reconfigured * anyway. */ - return -ENOMEM; + return rv; } - - nrf_ppi_channel_endpoint_setup(NRF_PPI, ppi_ch, - nrf_timer_event_address_get(dev_config->timer, - nrf_timer_compare_event_get(1 + i)), - nrf_gpiote_event_address_get(dev_config->gpiote.p_reg, - nrf_gpiote_out_task_get(*gpiote_ch))); - nrf_ppi_channel_enable(NRF_PPI, ppi_ch); + nrfx_gppi_conn_enable(ppi_handle); } #endif /* USE_PWM */ @@ -537,13 +534,14 @@ DT_FOREACH_PROP_ELEM(MATRIX_NODE, col_gpios, CHECK_GPIOTE_INST) [GET_DT_ROW_IDX(idx) * COL_COUNT + \ GET_DT_COL_IDX(idx)] = idx, +//NRFX_GPIOTE_INSTANCE(NRF_DT_GPIOTE_INST_BY_IDX(MATRIX_NODE, col_gpios, 0)), + static const struct display_drv_config instance_config = { .timer = (NRF_TIMER_Type *)DT_REG_ADDR(TIMER_NODE), #if USE_PWM .pwm = (NRF_PWM_Type *)DT_REG_ADDR(PWM_NODE), #else - .gpiote = NRFX_GPIOTE_INSTANCE( - NRF_DT_GPIOTE_INST_BY_IDX(MATRIX_NODE, col_gpios, 0)), + .gpiote = &GPIOTE_NRFX_INST_BY_NODE(NRF_DT_GPIOTE_NODE(MATRIX_NODE, col_gpios)), #endif .rows = { DT_FOREACH_PROP_ELEM(MATRIX_NODE, row_gpios, GET_PIN_INFO) }, .cols = { DT_FOREACH_PROP_ELEM(MATRIX_NODE, col_gpios, GET_PIN_INFO) }, diff --git a/drivers/flash/nrf_qspi_nor.c b/drivers/flash/nrf_qspi_nor.c index e9eb5a17302b..4cc30acd14ad 100644 --- a/drivers/flash/nrf_qspi_nor.c +++ b/drivers/flash/nrf_qspi_nor.c @@ -22,7 +22,6 @@ LOG_MODULE_REGISTER(qspi_nor, CONFIG_FLASH_LOG_LEVEL); #include "spi_nor.h" #include "jesd216.h" #include "flash_priv.h" -#include #include #include #include @@ -111,7 +110,7 @@ BUILD_ASSERT(INST_0_SCK_FREQUENCY >= (NRF_QSPI_BASE_CLOCK_FREQ / 16), #define BASE_CLOCK_DIV NRF_CLOCK_HFCLK_DIV_1 #define INST_0_SCK_CFG NRF_QSPI_FREQ_DIV1 /* If anomaly 159 is to be prevented, only /1 divider can be used. */ -#elif NRF53_ERRATA_159_ENABLE_WORKAROUND +#elif NRF_ERRATA_STATIC_CHECK(53, 159) #define BASE_CLOCK_DIV NRF_CLOCK_HFCLK_DIV_1 #define INST_0_SCK_CFG (DIV_ROUND_UP(NRF_QSPI_BASE_CLOCK_FREQ, \ INST_0_SCK_FREQUENCY) - 1) @@ -251,7 +250,7 @@ static inline int qspi_get_zephyr_ret_code(nrfx_err_t res) return -EINVAL; case NRFX_ERROR_INVALID_STATE: return -ECANCELED; -#if NRF53_ERRATA_159_ENABLE_WORKAROUND +#if NRF_ERRATA_STATIC_CHECK(53, 159) case NRFX_ERROR_FORBIDDEN: LOG_ERR("nRF5340 anomaly 159 conditions detected"); LOG_ERR("Set the CPU clock to 64 MHz before starting QSPI operation"); diff --git a/drivers/flash/soc_flash_nrf.c b/drivers/flash/soc_flash_nrf.c index 574739082dc4..dbbb1da7a985 100644 --- a/drivers/flash/soc_flash_nrf.c +++ b/drivers/flash/soc_flash_nrf.c @@ -15,7 +15,6 @@ #include #include #include -#include #include "soc_flash_nrf.h" @@ -121,7 +120,7 @@ static inline bool is_uicr_addr_valid(off_t addr, size_t len) #endif /* CONFIG_SOC_FLASH_NRF_UICR */ } -#if CONFIG_SOC_FLASH_NRF_UICR && IS_ENABLED(NRF91_ERRATA_7_ENABLE_WORKAROUND) +#if CONFIG_SOC_FLASH_NRF_UICR && NRF_ERRATA_STATIC_CHECK(91, 7) static inline void nrf91_errata_7_enter(void) { __disable_irq(); @@ -164,7 +163,7 @@ static int flash_nrf_read(const struct device *dev, off_t addr, return 0; } -#if CONFIG_SOC_FLASH_NRF_UICR && IS_ENABLED(NRF91_ERRATA_7_ENABLE_WORKAROUND) +#if CONFIG_SOC_FLASH_NRF_UICR && NRF_ERRATA_STATIC_CHECK(91, 7) if (within_uicr) { nrf_buffer_read_91_uicr(data, (uint32_t)addr, len); return 0; diff --git a/drivers/gpio/gpio_nrfx.c b/drivers/gpio/gpio_nrfx.c index 6ccb378e161d..e752d6caa77b 100644 --- a/drivers/gpio/gpio_nrfx.c +++ b/drivers/gpio/gpio_nrfx.c @@ -7,8 +7,10 @@ #define DT_DRV_COMPAT nordic_nrf_gpio #include +#include #include #include +#include #include #include #include @@ -52,9 +54,9 @@ struct gpio_nrfx_cfg { /* gpio_driver_config needs to be first */ struct gpio_driver_config common; NRF_GPIO_Type *port; + nrfx_gpiote_t *gpiote; uint32_t edge_sense; uint8_t port_num; - nrfx_gpiote_t gpiote; #if GPIO_HAS_PAD_GROUP const struct device *pad_group; #endif @@ -73,9 +75,16 @@ static inline const struct gpio_nrfx_cfg *get_port_cfg(const struct device *port return port->config; } +void * gpio_nrf_gpiote_by_port_get(const struct device *port) +{ + const struct gpio_nrfx_cfg *cfg = get_port_cfg(port); + + return cfg->gpiote; +} + static bool has_gpiote(const struct gpio_nrfx_cfg *cfg) { - return cfg->gpiote.p_reg != NULL; + return cfg->gpiote != NULL; } static nrf_gpio_pin_pull_t get_pull(gpio_flags_t flags) @@ -93,7 +102,7 @@ static int gpio_nrfx_pin_configure(const struct device *port, gpio_pin_t pin, gpio_flags_t flags) { int ret = 0; - nrfx_err_t err = NRFX_SUCCESS; + int err = 0; uint8_t ch; bool free_ch = false; const struct gpio_nrfx_cfg *cfg = get_port_cfg(port); @@ -159,13 +168,13 @@ static int gpio_nrfx_pin_configure(const struct device *port, gpio_pin_t pin, * to be freed when the pin is reconfigured or disconnected. */ if (IS_ENABLED(CONFIG_GPIO_NRFX_INTERRUPT)) { - err = nrfx_gpiote_channel_get(&cfg->gpiote, abs_pin, &ch); - free_ch = (err == NRFX_SUCCESS); + err = nrfx_gpiote_channel_get(cfg->gpiote, abs_pin, &ch); + free_ch = (err == 0); } if ((flags & (GPIO_INPUT | GPIO_OUTPUT)) == GPIO_DISCONNECTED) { /* Ignore the error code. The pin may not have been used. */ - (void)nrfx_gpiote_pin_uninit(&cfg->gpiote, abs_pin); + (void)nrfx_gpiote_pin_uninit(cfg->gpiote, abs_pin); } else { /* Remove previously configured trigger when pin is reconfigured. */ if (IS_ENABLED(CONFIG_GPIO_NRFX_INTERRUPT)) { @@ -176,11 +185,9 @@ static int gpio_nrfx_pin_configure(const struct device *port, gpio_pin_t pin, .p_trigger_config = &trigger_config, }; - err = nrfx_gpiote_input_configure(&cfg->gpiote, + err = nrfx_gpiote_input_configure(cfg->gpiote, abs_pin, &input_pin_config); - if (err != NRFX_SUCCESS) { - ret = -EINVAL; - + if (err < 0) { goto end; } } @@ -194,19 +201,18 @@ static int gpio_nrfx_pin_configure(const struct device *port, gpio_pin_t pin, .pull = pull, }; - err = nrfx_gpiote_output_configure(&cfg->gpiote, + err = nrfx_gpiote_output_configure(cfg->gpiote, abs_pin, &output_config, NULL); } else { nrfx_gpiote_input_pin_config_t input_pin_config = { .p_pull_config = &pull, }; - err = nrfx_gpiote_input_configure(&cfg->gpiote, + err = nrfx_gpiote_input_configure(cfg->gpiote, abs_pin, &input_pin_config); } - if (err != NRFX_SUCCESS) { - ret = -EINVAL; + if (err < 0) { goto end; } } @@ -218,8 +224,8 @@ static int gpio_nrfx_pin_configure(const struct device *port, gpio_pin_t pin, goto end; } #endif - err = nrfx_gpiote_channel_free(&cfg->gpiote, ch); - __ASSERT_NO_MSG(err == NRFX_SUCCESS); + err = nrfx_gpiote_channel_free(cfg->gpiote, ch); + __ASSERT_NO_MSG(err == 0); } end: @@ -393,7 +399,7 @@ static nrfx_gpiote_trigger_t get_trigger(enum gpio_int_mode mode, NRFX_GPIOTE_TRIGGER_LOTOHI; } -static nrfx_err_t chan_alloc(const struct gpio_nrfx_cfg *cfg, gpio_pin_t pin, uint8_t *ch) +static int chan_alloc(const struct gpio_nrfx_cfg *cfg, gpio_pin_t pin, uint8_t *ch) { #ifdef GPIOTE_FEATURE_FLAG if (cfg->flags & GPIOTE_FLAG_FIXED_CHAN) { @@ -403,25 +409,25 @@ static nrfx_err_t chan_alloc(const struct gpio_nrfx_cfg *cfg, gpio_pin_t pin, ui * - P1: channel => pin - 4, e.g. P1.4 => channel 0, P1.5 => channel 1 * - P2: channel => pin % 8, e.g. P2.0 => channel 0, P2.8 => channel 0 */ - nrfx_err_t err = NRFX_SUCCESS; + int err = 0; if (cfg->port_num == 1) { if (pin < 4) { - err = NRFX_ERROR_INVALID_PARAM; + err = -EINVAL; } else { *ch = pin - 4; } } else if (cfg->port_num == 2) { *ch = pin & 0x7; } else { - err = NRFX_ERROR_INVALID_PARAM; + err = -EINVAL; } return err; } #endif - return nrfx_gpiote_channel_alloc(&cfg->gpiote, ch); + return nrfx_gpiote_channel_alloc(cfg->gpiote, ch); } static int gpio_nrfx_pin_interrupt_configure(const struct device *port, @@ -431,7 +437,7 @@ static int gpio_nrfx_pin_interrupt_configure(const struct device *port, { const struct gpio_nrfx_cfg *cfg = get_port_cfg(port); uint32_t abs_pin = NRF_GPIO_PIN_MAP(cfg->port_num, pin); - nrfx_err_t err; + int err; uint8_t ch; if (!has_gpiote(cfg)) { @@ -439,7 +445,7 @@ static int gpio_nrfx_pin_interrupt_configure(const struct device *port, } if (mode == GPIO_INT_MODE_DISABLED) { - nrfx_gpiote_trigger_disable(&cfg->gpiote, abs_pin); + nrfx_gpiote_trigger_disable(cfg->gpiote, abs_pin); return 0; } @@ -457,11 +463,11 @@ static int gpio_nrfx_pin_interrupt_configure(const struct device *port, if (!(BIT(pin) & cfg->edge_sense) && (mode == GPIO_INT_MODE_EDGE) && (nrf_gpio_pin_dir_get(abs_pin) == NRF_GPIO_PIN_DIR_INPUT)) { - err = nrfx_gpiote_channel_get(&cfg->gpiote, abs_pin, &ch); - if (err == NRFX_ERROR_INVALID_PARAM) { + err = nrfx_gpiote_channel_get(cfg->gpiote, abs_pin, &ch); + if (err == -EINVAL) { err = chan_alloc(cfg, pin, &ch); - if (err != NRFX_SUCCESS) { - return -ENOMEM; + if (err < 0) { + return err; } } @@ -475,19 +481,19 @@ static int gpio_nrfx_pin_interrupt_configure(const struct device *port, /* If edge mode with channel was previously used and we are changing to sense or * level triggered, we must free the channel. */ - err = nrfx_gpiote_channel_get(&cfg->gpiote, abs_pin, &ch); - if (err == NRFX_SUCCESS) { - err = nrfx_gpiote_channel_free(&cfg->gpiote, ch); - __ASSERT_NO_MSG(err == NRFX_SUCCESS); + err = nrfx_gpiote_channel_get(cfg->gpiote, abs_pin, &ch); + if (err == 0) { + err = nrfx_gpiote_channel_free(cfg->gpiote, ch); + __ASSERT_NO_MSG(err == 0); } } - err = nrfx_gpiote_input_configure(&cfg->gpiote, abs_pin, &input_pin_config); - if (err != NRFX_SUCCESS) { - return -EINVAL; + err = nrfx_gpiote_input_configure(cfg->gpiote, abs_pin, &input_pin_config); + if (err < 0) { + return err; } - nrfx_gpiote_trigger_enable(&cfg->gpiote, abs_pin, true); + nrfx_gpiote_trigger_enable(cfg->gpiote, abs_pin, true); return 0; } @@ -576,9 +582,12 @@ static void nrfx_gpio_handler(nrfx_gpiote_pin_t abs_pin, } #endif /* CONFIG_GPIO_NRFX_INTERRUPT */ -#define GPIOTE_IRQ_HANDLER_CONNECT(node_id) \ - IRQ_CONNECT(DT_IRQN(node_id), DT_IRQ(node_id, priority), nrfx_isr, \ - NRFX_CONCAT(nrfx_gpiote_, DT_PROP(node_id, instance), _irq_handler), 0); +#define GPIOTE_IRQ_HANDLER_CONNECT(node_id) \ + IRQ_CONNECT(DT_IRQN(node_id), \ + DT_IRQ(node_id, priority), \ + nrfx_gpiote_irq_handler, \ + &GPIOTE_NRFX_INST_BY_NODE(node_id), \ + 0); static int gpio_nrfx_pm_suspend(const struct device *port) { @@ -626,23 +635,23 @@ static int gpio_nrfx_pm_hook(const struct device *port, enum pm_device_action ac static int gpio_nrfx_init(const struct device *port) { const struct gpio_nrfx_cfg *cfg = get_port_cfg(port); - nrfx_err_t err; + int err; if (!has_gpiote(cfg)) { goto pm_init; } - if (nrfx_gpiote_init_check(&cfg->gpiote)) { + if (nrfx_gpiote_init_check(cfg->gpiote)) { goto pm_init; } - err = nrfx_gpiote_init(&cfg->gpiote, 0 /*not used*/); - if (err != NRFX_SUCCESS) { + err = nrfx_gpiote_init(cfg->gpiote, 0 /*not used*/); + if (err != 0) { return -EIO; } #ifdef CONFIG_GPIO_NRFX_INTERRUPT - nrfx_gpiote_global_callback_set(&cfg->gpiote, nrfx_gpio_handler, NULL); + nrfx_gpiote_global_callback_set(cfg->gpiote, nrfx_gpio_handler, NULL); DT_FOREACH_STATUS_OKAY(nordic_nrf_gpiote, GPIOTE_IRQ_HANDLER_CONNECT); #endif /* CONFIG_GPIO_NRFX_INTERRUPT */ @@ -669,24 +678,24 @@ static DEVICE_API(gpio, gpio_nrfx_drv_api_funcs) = { #endif }; -#define GPIOTE_INST(id) DT_PROP(GPIOTE_PHANDLE(id), instance) - -#define GPIOTE_INSTANCE(id) \ - COND_CODE_1(DT_INST_NODE_HAS_PROP(id, gpiote_instance), \ - (NRFX_GPIOTE_INSTANCE(GPIOTE_INST(id))), \ - ({ .p_reg = NULL })) - /* Device instantiation is done with node labels because 'port_num' is * the peripheral number by SoC numbering. We therefore cannot use * DT_INST APIs here without wider changes. */ +#define HAS_GPIOTE(id) DT_INST_NODE_HAS_PROP(id, gpiote_instance) + #define GPIOTE_CHECK(id) \ - COND_CODE_1(DT_INST_NODE_HAS_PROP(id, gpiote_instance), \ - (BUILD_ASSERT(DT_NODE_HAS_STATUS_OKAY(GPIOTE_PHANDLE(id)), \ + COND_CODE_1(HAS_GPIOTE(id), \ + (BUILD_ASSERT(DT_NODE_HAS_STATUS_OKAY(GPIOTE_PHANDLE(id)), \ "Please enable GPIOTE instance for used GPIO port!")), \ ()) +#define GPIOTE_REF(id) \ + COND_CODE_1(HAS_GPIOTE(id), \ + (&GPIOTE_NRFX_INST_BY_NODE(GPIOTE_PHANDLE(id))), \ + (NULL)) + #if GPIO_HAS_PAD_GROUP #define GPIO_NRF_PAD_GROUP_INIT(id) \ .pad_group = DEVICE_DT_GET(DT_INST_CHILD(id, pad_group)), @@ -696,15 +705,16 @@ static DEVICE_API(gpio, gpio_nrfx_drv_api_funcs) = { #define GPIO_NRF_DEVICE(id) \ GPIOTE_CHECK(id); \ + static struct gpio_nrfx_data gpio_nrfx_p##id##_data; \ static const struct gpio_nrfx_cfg gpio_nrfx_p##id##_cfg = { \ .common = { \ .port_pin_mask = \ GPIO_PORT_PIN_MASK_FROM_DT_INST(id), \ }, \ .port = _CONCAT(NRF_P, DT_INST_PROP(id, port)), \ - .port_num = DT_INST_PROP(id, port), \ + .gpiote = GPIOTE_REF(id), \ .edge_sense = DT_INST_PROP_OR(id, sense_edge_mask, 0), \ - .gpiote = GPIOTE_INSTANCE(id), \ + .port_num = DT_INST_PROP(id, port), \ GPIO_NRF_PAD_GROUP_INIT(id) \ IF_ENABLED(GPIOTE_FEATURE_FLAG, \ (.flags = \ @@ -715,8 +725,6 @@ static DEVICE_API(gpio, gpio_nrfx_drv_api_funcs) = { ) \ }; \ \ - static struct gpio_nrfx_data gpio_nrfx_p##id##_data; \ - \ PM_DEVICE_DT_INST_DEFINE(id, gpio_nrfx_pm_hook); \ \ DEVICE_DT_INST_DEFINE(id, gpio_nrfx_init, \ diff --git a/drivers/i2c/Kconfig.nrfx b/drivers/i2c/Kconfig.nrfx index 54d533636747..c6a7dbeadcf7 100644 --- a/drivers/i2c/Kconfig.nrfx +++ b/drivers/i2c/Kconfig.nrfx @@ -23,25 +23,7 @@ config I2C_NRFX_TWI config I2C_NRFX_TWIM def_bool y depends on DT_HAS_NORDIC_NRF_TWIM_ENABLED - select NRFX_TWIM0 if HAS_HW_NRF_TWIM0 - select NRFX_TWIM1 if HAS_HW_NRF_TWIM1 - select NRFX_TWIM2 if HAS_HW_NRF_TWIM2 - select NRFX_TWIM3 if HAS_HW_NRF_TWIM3 - select NRFX_TWIM20 if HAS_HW_NRF_TWIM20 - select NRFX_TWIM21 if HAS_HW_NRF_TWIM21 - select NRFX_TWIM22 if HAS_HW_NRF_TWIM22 - select NRFX_TWIM23 if HAS_HW_NRF_TWIM23 - select NRFX_TWIM24 if HAS_HW_NRF_TWIM24 - select NRFX_TWIM30 if HAS_HW_NRF_TWIM30 - select NRFX_TWIM120 if HAS_HW_NRF_TWIM120 - select NRFX_TWIM130 if HAS_HW_NRF_TWIM130 - select NRFX_TWIM131 if HAS_HW_NRF_TWIM131 - select NRFX_TWIM132 if HAS_HW_NRF_TWIM132 - select NRFX_TWIM133 if HAS_HW_NRF_TWIM133 - select NRFX_TWIM134 if HAS_HW_NRF_TWIM134 - select NRFX_TWIM135 if HAS_HW_NRF_TWIM135 - select NRFX_TWIM136 if HAS_HW_NRF_TWIM136 - select NRFX_TWIM137 if HAS_HW_NRF_TWIM137 + select NRFX_TWIM config I2C_NRFX_TRANSFER_TIMEOUT int "Transfer timeout [ms]" @@ -56,23 +38,7 @@ config I2C_NRFX_TWIS depends on DT_HAS_NORDIC_NRF_TWIS_ENABLED depends on I2C_TARGET depends on I2C_TARGET_BUFFER_MODE - select NRFX_TWIS0 if HAS_HW_NRF_TWIS0 - select NRFX_TWIS1 if HAS_HW_NRF_TWIS1 - select NRFX_TWIS2 if HAS_HW_NRF_TWIS2 - select NRFX_TWIS3 if HAS_HW_NRF_TWIS3 - select NRFX_TWIS20 if HAS_HW_NRF_TWIS20 - select NRFX_TWIS21 if HAS_HW_NRF_TWIS21 - select NRFX_TWIS22 if HAS_HW_NRF_TWIS22 - select NRFX_TWIS23 if HAS_HW_NRF_TWIS23 - select NRFX_TWIS24 if HAS_HW_NRF_TWIS24 - select NRFX_TWIS30 if HAS_HW_NRF_TWIS30 - select NRFX_TWIS130 if HAS_HW_NRF_TWIS130 - select NRFX_TWIS131 if HAS_HW_NRF_TWIS131 - select NRFX_TWIS133 if HAS_HW_NRF_TWIS133 - select NRFX_TWIS134 if HAS_HW_NRF_TWIS134 - select NRFX_TWIS135 if HAS_HW_NRF_TWIS135 - select NRFX_TWIS136 if HAS_HW_NRF_TWIS136 - select NRFX_TWIS137 if HAS_HW_NRF_TWIS137 + select NRFX_TWIS if I2C_NRFX_TWIS diff --git a/drivers/i2c/i2c_nrfx_twi.c b/drivers/i2c/i2c_nrfx_twi.c index c2c0a28d8756..732b6f32491e 100644 --- a/drivers/i2c/i2c_nrfx_twi.c +++ b/drivers/i2c/i2c_nrfx_twi.c @@ -131,49 +131,40 @@ static DEVICE_API(i2c, i2c_nrfx_twi_driver_api) = { .recover_bus = i2c_nrfx_twi_recover_bus, }; -#define I2C_NRFX_TWI_DEVICE(idx) \ - NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(I2C(idx)); \ - BUILD_ASSERT(I2C_FREQUENCY(idx) != \ - I2C_NRFX_TWI_INVALID_FREQUENCY, \ - "Wrong I2C " #idx " frequency setting in dts"); \ - static int twi_##idx##_init(const struct device *dev) \ - { \ - IRQ_CONNECT(DT_IRQN(I2C(idx)), DT_IRQ(I2C(idx), priority), \ - nrfx_isr, nrfx_twi_##idx##_irq_handler, 0); \ - const struct i2c_nrfx_twi_config *config = dev->config; \ - int err = pinctrl_apply_state(config->pcfg, \ - PINCTRL_STATE_DEFAULT); \ - if (err < 0) { \ - return err; \ - } \ - return i2c_nrfx_twi_init(dev); \ - } \ - static struct i2c_nrfx_twi_data twi_##idx##_data = { \ - .transfer_sync = Z_SEM_INITIALIZER( \ - twi_##idx##_data.transfer_sync, 1, 1), \ - .completion_sync = Z_SEM_INITIALIZER( \ - twi_##idx##_data.completion_sync, 0, 1) \ - }; \ - PINCTRL_DT_DEFINE(I2C(idx)); \ - static const struct i2c_nrfx_twi_config twi_##idx##z_config = { \ - .twi = NRFX_TWI_INSTANCE(idx), \ - .config = { \ - .skip_gpio_cfg = true, \ - .skip_psel_cfg = true, \ - .frequency = I2C_FREQUENCY(idx), \ - }, \ - .event_handler = event_handler, \ - .pcfg = PINCTRL_DT_DEV_CONFIG_GET(I2C(idx)), \ - }; \ - PM_DEVICE_DT_DEFINE(I2C(idx), twi_nrfx_pm_action); \ - I2C_DEVICE_DT_DEFINE(I2C(idx), \ - twi_##idx##_init, \ - PM_DEVICE_DT_GET(I2C(idx)), \ - &twi_##idx##_data, \ - &twi_##idx##z_config, \ - POST_KERNEL, \ - CONFIG_I2C_INIT_PRIORITY, \ - &i2c_nrfx_twi_driver_api) +#define I2C_NRFX_TWI_DEVICE(idx) \ + NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(I2C(idx)); \ + BUILD_ASSERT(I2C_FREQUENCY(I2C(idx)) != I2C_NRFX_TWI_INVALID_FREQUENCY, \ + "Wrong I2C " #idx " frequency setting in dts"); \ + static int twi_##idx##_init(const struct device *dev) \ + { \ + IRQ_CONNECT(DT_IRQN(I2C(idx)), DT_IRQ(I2C(idx), priority), nrfx_isr, \ + nrfx_twi_##idx##_irq_handler, 0); \ + const struct i2c_nrfx_twi_config *config = dev->config; \ + int err = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT); \ + if (err < 0) { \ + return err; \ + } \ + return i2c_nrfx_twi_init(dev); \ + } \ + static struct i2c_nrfx_twi_data twi_##idx##_data = { \ + .transfer_sync = Z_SEM_INITIALIZER(twi_##idx##_data.transfer_sync, 1, 1), \ + .completion_sync = Z_SEM_INITIALIZER(twi_##idx##_data.completion_sync, 0, 1)}; \ + PINCTRL_DT_DEFINE(I2C(idx)); \ + static const struct i2c_nrfx_twi_config twi_##idx##z_config = { \ + .twi = NRFX_TWI_INSTANCE(idx), \ + .config = \ + { \ + .skip_gpio_cfg = true, \ + .skip_psel_cfg = true, \ + .frequency = I2C_FREQUENCY(I2C(idx)), \ + }, \ + .event_handler = event_handler, \ + .pcfg = PINCTRL_DT_DEV_CONFIG_GET(I2C(idx)), \ + }; \ + PM_DEVICE_DT_DEFINE(I2C(idx), twi_nrfx_pm_action); \ + I2C_DEVICE_DT_DEFINE(I2C(idx), twi_##idx##_init, PM_DEVICE_DT_GET(I2C(idx)), \ + &twi_##idx##_data, &twi_##idx##z_config, POST_KERNEL, \ + CONFIG_I2C_INIT_PRIORITY, &i2c_nrfx_twi_driver_api) #ifdef CONFIG_HAS_HW_NRF_TWI0 I2C_NRFX_TWI_DEVICE(0); diff --git a/drivers/i2c/i2c_nrfx_twim.c b/drivers/i2c/i2c_nrfx_twim.c index e3c307231ab1..60d43b8ccd6a 100644 --- a/drivers/i2c/i2c_nrfx_twim.c +++ b/drivers/i2c/i2c_nrfx_twim.c @@ -29,9 +29,10 @@ LOG_MODULE_REGISTER(i2c_nrfx_twim, CONFIG_I2C_LOG_LEVEL); #endif struct i2c_nrfx_twim_data { + nrfx_twim_t twim; struct k_sem transfer_sync; struct k_sem completion_sync; - volatile nrfx_err_t res; + volatile int res; }; int i2c_nrfx_twim_exclusive_access_acquire(const struct device *dev, k_timeout_t timeout) @@ -81,7 +82,7 @@ static int i2c_nrfx_twim_transfer(const struct device *dev, break; } - bool dma_accessible = nrf_dma_accessible_check(&dev_config->twim, msgs[i].buf); + bool dma_accessible = nrf_dma_accessible_check(&dev_data->twim, msgs[i].buf); /* This fragment needs to be merged with the next one if: * - it is not the last fragment @@ -162,7 +163,7 @@ static int i2c_nrfx_twim_transfer(const struct device *dev, break; } - if (dev_data->res != NRFX_SUCCESS) { + if (dev_data->res < 0) { ret = -EIO; break; } @@ -191,23 +192,23 @@ static int i2c_nrfx_twim_transfer(const struct device *dev, return ret; } -static void event_handler(nrfx_twim_evt_t const *p_event, void *p_context) +static void event_handler(nrfx_twim_event_t const *p_event, void *p_context) { const struct device *dev = p_context; struct i2c_nrfx_twim_data *dev_data = dev->data; switch (p_event->type) { case NRFX_TWIM_EVT_DONE: - dev_data->res = NRFX_SUCCESS; + dev_data->res = 0; break; case NRFX_TWIM_EVT_ADDRESS_NACK: - dev_data->res = NRFX_ERROR_DRV_TWI_ERR_ANACK; + dev_data->res = -EFAULT; break; case NRFX_TWIM_EVT_DATA_NACK: - dev_data->res = NRFX_ERROR_DRV_TWI_ERR_DNACK; + dev_data->res = -EAGAIN; break; default: - dev_data->res = NRFX_ERROR_INTERNAL; + dev_data->res = -EIO; break; } @@ -238,142 +239,73 @@ static DEVICE_API(i2c, i2c_nrfx_twim_driver_api) = { .recover_bus = i2c_nrfx_twim_recover_bus, }; -#define CONCAT_BUF_SIZE(idx) \ - COND_CODE_1(DT_NODE_HAS_PROP(I2C(idx), zephyr_concat_buf_size), \ - (DT_PROP(I2C(idx), zephyr_concat_buf_size)), (0)) -#define FLASH_BUF_MAX_SIZE(idx) \ - COND_CODE_1(DT_NODE_HAS_PROP(I2C(idx), zephyr_flash_buf_max_size), \ - (DT_PROP(I2C(idx), zephyr_flash_buf_max_size)), (0)) +#if DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_twim) +#define DT_DRV_COMPAT nordic_nrf_twim +#endif + +#define CONCAT_BUF_SIZE(idx) \ + COND_CODE_1(DT_NODE_HAS_PROP(DT_DRV_INST(idx), zephyr_concat_buf_size), \ + (DT_INST_PROP(idx, zephyr_concat_buf_size)), (0)) +#define FLASH_BUF_MAX_SIZE(idx) \ + COND_CODE_1(DT_NODE_HAS_PROP(DT_DRV_INST(idx), zephyr_flash_buf_max_size), \ + (DT_INST_PROP(idx, zephyr_flash_buf_max_size)), (0)) -#define USES_MSG_BUF(idx) \ - COND_CODE_0(CONCAT_BUF_SIZE(idx), \ - (COND_CODE_0(FLASH_BUF_MAX_SIZE(idx), (0), (1))), \ +#define USES_MSG_BUF(idx) \ + COND_CODE_0(CONCAT_BUF_SIZE(idx), \ + (COND_CODE_0(FLASH_BUF_MAX_SIZE(idx), (0), (1))), \ (1)) #define MSG_BUF_SIZE(idx) MAX(CONCAT_BUF_SIZE(idx), FLASH_BUF_MAX_SIZE(idx)) -#define I2C_NRFX_TWIM_DEVICE(idx) \ - NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(I2C(idx)); \ - NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(I2C(idx)); \ - BUILD_ASSERT(I2C_FREQUENCY(idx) != \ - I2C_NRFX_TWIM_INVALID_FREQUENCY, \ - "Wrong I2C " #idx " frequency setting in dts"); \ - static void irq_connect##idx(void) \ - { \ - IRQ_CONNECT(DT_IRQN(I2C(idx)), DT_IRQ(I2C(idx), priority), \ - nrfx_isr, nrfx_twim_##idx##_irq_handler, 0); \ - } \ +#define I2C_NRFX_TWIM_DEVICE(idx) \ + NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(DT_DRV_INST(idx)); \ + NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(DT_DRV_INST(idx)); \ + BUILD_ASSERT(I2C_FREQUENCY(DT_DRV_INST(idx)) != I2C_NRFX_TWIM_INVALID_FREQUENCY, \ + "Wrong I2C " #idx " frequency setting in dts"); \ + static struct i2c_nrfx_twim_data twim_##idx##_data; \ + static struct i2c_nrfx_twim_common_config twim_##idx##z_config; \ + static void pre_init##idx(void) \ + { \ + twim_##idx##z_config.twim = &twim_##idx##_data.twim; \ + twim_##idx##_data.twim.p_twim = (NRF_TWIM_Type *)DT_INST_REG_ADDR(idx); \ + IRQ_CONNECT(DT_INST_IRQN(idx), DT_INST_IRQ(idx, priority), nrfx_twim_irq_handler, \ + &twim_##idx##_data.twim, 0); \ + } \ IF_ENABLED(USES_MSG_BUF(idx), \ (static uint8_t twim_##idx##_msg_buf[MSG_BUF_SIZE(idx)] \ - I2C_MEMORY_SECTION(idx);)) \ - static struct i2c_nrfx_twim_data twim_##idx##_data; \ - PINCTRL_DT_DEFINE(I2C(idx)); \ - static const \ - struct i2c_nrfx_twim_common_config twim_##idx##z_config = { \ - .twim = NRFX_TWIM_INSTANCE(idx), \ - .twim_config = { \ - .skip_gpio_cfg = true, \ - .skip_psel_cfg = true, \ - .frequency = I2C_FREQUENCY(idx), \ - }, \ - .event_handler = event_handler, \ - .msg_buf_size = MSG_BUF_SIZE(idx), \ - .irq_connect = irq_connect##idx, \ - .pcfg = PINCTRL_DT_DEV_CONFIG_GET(I2C(idx)), \ + I2C_MEMORY_SECTION(idx);)) \ + PINCTRL_DT_INST_DEFINE(idx); \ + static struct i2c_nrfx_twim_common_config twim_##idx##z_config = { \ + .twim_config = \ + { \ + .skip_gpio_cfg = true, \ + .skip_psel_cfg = true, \ + .frequency = I2C_FREQUENCY(DT_DRV_INST(idx)), \ + }, \ + .event_handler = event_handler, \ + .msg_buf_size = MSG_BUF_SIZE(idx), \ + .pre_init = pre_init##idx, \ + .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(idx), \ IF_ENABLED(USES_MSG_BUF(idx), \ (.msg_buf = twim_##idx##_msg_buf,)) \ .max_transfer_size = BIT_MASK( \ - DT_PROP(I2C(idx), easydma_maxcnt_bits)), \ + DT_INST_PROP(idx, easydma_maxcnt_bits)), \ }; \ - PM_DEVICE_DT_DEFINE(I2C(idx), twim_nrfx_pm_action, \ - PM_DEVICE_ISR_SAFE); \ - I2C_DEVICE_DT_DEINIT_DEFINE(I2C(idx), \ + PM_DEVICE_DT_INST_DEFINE(idx, twim_nrfx_pm_action, \ + I2C_PM_ISR_SAFE(idx)); \ + I2C_DEVICE_DT_INST_DEINIT_DEFINE(idx, \ i2c_nrfx_twim_init, \ i2c_nrfx_twim_deinit, \ - PM_DEVICE_DT_GET(I2C(idx)), \ + PM_DEVICE_DT_INST_GET(idx), \ &twim_##idx##_data, \ &twim_##idx##z_config, \ POST_KERNEL, \ CONFIG_I2C_INIT_PRIORITY, \ &i2c_nrfx_twim_driver_api) -#define I2C_MEMORY_SECTION(idx) \ - COND_CODE_1(I2C_HAS_PROP(idx, memory_regions), \ +#define I2C_MEMORY_SECTION(idx) \ + COND_CODE_1(DT_NODE_HAS_PROP(DT_DRV_INST(idx), prop), \ (__attribute__((__section__(LINKER_DT_NODE_REGION_NAME( \ - DT_PHANDLE(I2C(idx), memory_regions)))))), \ + DT_PHANDLE(DT_DRV_INST(idx), memory_regions)))))), \ ()) -#ifdef CONFIG_HAS_HW_NRF_TWIM0 -I2C_NRFX_TWIM_DEVICE(0); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM1 -I2C_NRFX_TWIM_DEVICE(1); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM2 -I2C_NRFX_TWIM_DEVICE(2); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM3 -I2C_NRFX_TWIM_DEVICE(3); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM20 -I2C_NRFX_TWIM_DEVICE(20); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM21 -I2C_NRFX_TWIM_DEVICE(21); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM22 -I2C_NRFX_TWIM_DEVICE(22); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM23 -I2C_NRFX_TWIM_DEVICE(23); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM24 -I2C_NRFX_TWIM_DEVICE(24); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM30 -I2C_NRFX_TWIM_DEVICE(30); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM120 -I2C_NRFX_TWIM_DEVICE(120); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM130 -I2C_NRFX_TWIM_DEVICE(130); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM131 -I2C_NRFX_TWIM_DEVICE(131); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM132 -I2C_NRFX_TWIM_DEVICE(132); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM133 -I2C_NRFX_TWIM_DEVICE(133); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM134 -I2C_NRFX_TWIM_DEVICE(134); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM135 -I2C_NRFX_TWIM_DEVICE(135); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM136 -I2C_NRFX_TWIM_DEVICE(136); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM137 -I2C_NRFX_TWIM_DEVICE(137); -#endif +DT_INST_FOREACH_STATUS_OKAY(I2C_NRFX_TWIM_DEVICE) diff --git a/drivers/i2c/i2c_nrfx_twim_common.c b/drivers/i2c/i2c_nrfx_twim_common.c index f7fd0d097b0a..7e8dda45c9af 100644 --- a/drivers/i2c/i2c_nrfx_twim_common.c +++ b/drivers/i2c/i2c_nrfx_twim_common.c @@ -20,15 +20,15 @@ int i2c_nrfx_twim_recover_bus(const struct device *dev) enum pm_device_state state; uint32_t scl_pin; uint32_t sda_pin; - nrfx_err_t err; + int err; - scl_pin = nrf_twim_scl_pin_get(config->twim.p_twim); - sda_pin = nrf_twim_sda_pin_get(config->twim.p_twim); + scl_pin = nrf_twim_scl_pin_get(config->twim->p_twim); + sda_pin = nrf_twim_sda_pin_get(config->twim->p_twim); /* disable peripheral if active (required to release SCL/SDA lines) */ (void)pm_device_state_get(dev, &state); if (state == PM_DEVICE_STATE_ACTIVE) { - nrfx_twim_disable(&config->twim); + nrfx_twim_disable(config->twim); } err = nrfx_twim_bus_recover(scl_pin, sda_pin); @@ -36,10 +36,10 @@ int i2c_nrfx_twim_recover_bus(const struct device *dev) /* restore peripheral if it was active before */ if (state == PM_DEVICE_STATE_ACTIVE) { (void)pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT); - nrfx_twim_enable(&config->twim); + nrfx_twim_enable(config->twim); } - return (err == NRFX_SUCCESS ? 0 : -EBUSY); + return err; } int i2c_nrfx_twim_configure(const struct device *dev, uint32_t i2c_config) @@ -52,14 +52,14 @@ int i2c_nrfx_twim_configure(const struct device *dev, uint32_t i2c_config) switch (I2C_SPEED_GET(i2c_config)) { case I2C_SPEED_STANDARD: - nrf_twim_frequency_set(config->twim.p_twim, NRF_TWIM_FREQ_100K); + nrf_twim_frequency_set(config->twim->p_twim, NRF_TWIM_FREQ_100K); break; case I2C_SPEED_FAST: - nrf_twim_frequency_set(config->twim.p_twim, NRF_TWIM_FREQ_400K); + nrf_twim_frequency_set(config->twim->p_twim, NRF_TWIM_FREQ_400K); break; #if NRF_TWIM_HAS_1000_KHZ_FREQ case I2C_SPEED_FAST_PLUS: - nrf_twim_frequency_set(config->twim.p_twim, NRF_TWIM_FREQ_1000K); + nrf_twim_frequency_set(config->twim->p_twim, NRF_TWIM_FREQ_1000K); break; #endif default: @@ -80,8 +80,6 @@ int i2c_nrfx_twim_msg_transfer(const struct device *dev, uint8_t flags, uint8_t .p_primary_buf = buf, .primary_length = buf_len, }; - nrfx_err_t res; - int ret = 0; if (buf_len > config->max_transfer_size) { LOG_ERR("Trying to transfer more than the maximum size " @@ -90,16 +88,8 @@ int i2c_nrfx_twim_msg_transfer(const struct device *dev, uint8_t flags, uint8_t return -ENOSPC; } - res = nrfx_twim_xfer(&config->twim, &cur_xfer, - (flags & I2C_MSG_STOP) ? 0 : NRFX_TWIM_FLAG_TX_NO_STOP); - if (res != NRFX_SUCCESS) { - if (res == NRFX_ERROR_BUSY) { - ret = -EBUSY; - } else { - ret = -EIO; - } - } - return ret; + return nrfx_twim_xfer(config->twim, &cur_xfer, + (flags & I2C_MSG_STOP) ? 0 : NRFX_TWIM_FLAG_TX_NO_STOP); } void twim_nrfx_pm_resume(const struct device *dev) @@ -107,14 +97,14 @@ void twim_nrfx_pm_resume(const struct device *dev) const struct i2c_nrfx_twim_common_config *config = dev->config; (void)pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT); - nrfx_twim_enable(&config->twim); + nrfx_twim_enable(config->twim); } void twim_nrfx_pm_suspend(const struct device *dev) { const struct i2c_nrfx_twim_common_config *config = dev->config; - nrfx_twim_disable(&config->twim); + nrfx_twim_disable(config->twim); (void)pinctrl_apply_state(config->pcfg, PINCTRL_STATE_SLEEP); } @@ -138,12 +128,12 @@ int i2c_nrfx_twim_common_init(const struct device *dev) { const struct i2c_nrfx_twim_common_config *config = dev->config; - config->irq_connect(); + config->pre_init(); (void)pinctrl_apply_state(config->pcfg, PINCTRL_STATE_SLEEP); - if (nrfx_twim_init(&config->twim, &config->twim_config, config->event_handler, - (void *)dev) != NRFX_SUCCESS) { + if (nrfx_twim_init(config->twim, &config->twim_config, config->event_handler, (void *)dev) < + 0) { LOG_ERR("Failed to initialize device: %s", dev->name); return -EIO; } @@ -175,6 +165,6 @@ int i2c_nrfx_twim_common_deinit(const struct device *dev) #endif /* Uninit device hardware */ - nrfx_twim_uninit(&config->twim); + nrfx_twim_uninit(config->twim); return 0; } diff --git a/drivers/i2c/i2c_nrfx_twim_common.h b/drivers/i2c/i2c_nrfx_twim_common.h index 3c5c82311bae..d6b2474b20d9 100644 --- a/drivers/i2c/i2c_nrfx_twim_common.h +++ b/drivers/i2c/i2c_nrfx_twim_common.h @@ -28,18 +28,38 @@ extern "C" { #define I2C(idx) DT_NODELABEL(i2c##idx) #define I2C_HAS_PROP(idx, prop) DT_NODE_HAS_PROP(I2C(idx), prop) -#define I2C_FREQUENCY(idx) I2C_NRFX_TWIM_FREQUENCY(DT_PROP_OR(I2C(idx), clock_frequency, \ - I2C_BITRATE_STANDARD)) +#define I2C_FREQUENCY(node) \ + I2C_NRFX_TWIM_FREQUENCY(DT_PROP_OR(node, clock_frequency, I2C_BITRATE_STANDARD)) + +/* Macro determines PM actions interrupt safety level. + * + * Requesting/releasing TWIM device may be ISR safe, but it cannot be reliably known whether + * managing its power domain is. It is then assumed that if power domains are used, device is + * no longer ISR safe. This macro let's us check if we will be requesting/releasing + * power domains and determines PM device ISR safety value. + */ +#define I2C_PM_ISR_SAFE(idx) \ + COND_CODE_1( \ + UTIL_AND( \ + IS_ENABLED(CONFIG_PM_DEVICE_POWER_DOMAIN), \ + UTIL_AND( \ + DT_NODE_HAS_PROP(DT_DRV_INST(idx), power_domains), \ + DT_NODE_HAS_STATUS_OKAY(DT_PHANDLE(DT_DRV_INST(idx), power_domains)) \ + ) \ + ), \ + (0), \ + (PM_DEVICE_ISR_SAFE) \ + ) struct i2c_nrfx_twim_common_config { - nrfx_twim_t twim; nrfx_twim_config_t twim_config; - nrfx_twim_evt_handler_t event_handler; + nrfx_twim_event_handler_t event_handler; uint16_t msg_buf_size; - void (*irq_connect)(void); + void (*pre_init)(void); const struct pinctrl_dev_config *pcfg; uint8_t *msg_buf; uint16_t max_transfer_size; + nrfx_twim_t *twim; }; int i2c_nrfx_twim_common_init(const struct device *dev); diff --git a/drivers/i2c/i2c_nrfx_twim_rtio.c b/drivers/i2c/i2c_nrfx_twim_rtio.c index 0ddf5ffdd777..bd5a8939855b 100644 --- a/drivers/i2c/i2c_nrfx_twim_rtio.c +++ b/drivers/i2c/i2c_nrfx_twim_rtio.c @@ -21,12 +21,15 @@ LOG_MODULE_REGISTER(i2c_nrfx_twim, CONFIG_I2C_LOG_LEVEL); +#define DT_DRV_COMPAT nordic_nrf_twim + struct i2c_nrfx_twim_rtio_config { struct i2c_nrfx_twim_common_config common; struct i2c_rtio *ctx; }; struct i2c_nrfx_twim_rtio_data { + nrfx_twim_t twim; uint8_t *user_rx_buf; uint16_t user_rx_buf_size; }; @@ -182,7 +185,7 @@ static void i2c_nrfx_twim_rtio_submit(const struct device *dev, struct rtio_iode } } -static void event_handler(nrfx_twim_evt_t const *p_event, void *p_context) +static void event_handler(nrfx_twim_event_t const *p_event, void *p_context) { const struct device *dev = p_context; const struct i2c_nrfx_twim_rtio_config *config = dev->config; @@ -217,21 +220,20 @@ static int i2c_nrfx_twim_rtio_deinit(const struct device *dev) } #define CONCAT_BUF_SIZE(idx) \ - COND_CODE_1(DT_NODE_HAS_PROP(I2C(idx), zephyr_concat_buf_size), \ - (DT_PROP(I2C(idx), zephyr_concat_buf_size)), (0)) + COND_CODE_1(DT_NODE_HAS_PROP(DT_DRV_INST(idx), zephyr_concat_buf_size), \ + (DT_INST_PROP(idx, zephyr_concat_buf_size)), (0)) #define FLASH_BUF_MAX_SIZE(idx) \ - COND_CODE_1(DT_NODE_HAS_PROP(I2C(idx), zephyr_flash_buf_max_size), \ - (DT_PROP(I2C(idx), zephyr_flash_buf_max_size)), (0)) + COND_CODE_1(DT_NODE_HAS_PROP(DT_DRV_INST(idx), zephyr_flash_buf_max_size), \ + (DT_INST_PROP(idx, zephyr_flash_buf_max_size)), (0)) #define USES_MSG_BUF(idx) \ COND_CODE_0(CONCAT_BUF_SIZE(idx), (COND_CODE_0(FLASH_BUF_MAX_SIZE(idx), (0), (1))), (1)) #define MSG_BUF_SIZE(idx) MAX(CONCAT_BUF_SIZE(idx), FLASH_BUF_MAX_SIZE(idx)) -#define MSG_BUF_HAS_MEMORY_REGIONS(idx) \ - DT_NODE_HAS_PROP(I2C(idx), memory_regions) +#define MSG_BUF_HAS_MEMORY_REGIONS(idx) DT_NODE_HAS_PROP(DT_DRV_INST(idx), memory_regions) -#define MSG_BUF_LINKER_REGION_NAME(idx) \ - LINKER_DT_NODE_REGION_NAME(DT_PHANDLE(I2C(idx), memory_regions)) +#define MSG_BUF_LINKER_REGION_NAME(idx) \ + LINKER_DT_NODE_REGION_NAME(DT_PHANDLE(DT_DRV_INST(idx), memory_regions)) #define MSG_BUF_ATTR_SECTION(idx) \ __attribute__((__section__(MSG_BUF_LINKER_REGION_NAME(idx)))) @@ -249,122 +251,52 @@ static int i2c_nrfx_twim_rtio_deinit(const struct device *dev) #define MSG_BUF_DEFINE(idx) \ static uint8_t MSG_BUF_SYM(idx)[MSG_BUF_SIZE(idx)] MSG_BUF_ATTR(idx) -#define MAX_TRANSFER_SIZE(idx) \ - BIT_MASK(DT_PROP(I2C(idx), easydma_maxcnt_bits)) +#define MAX_TRANSFER_SIZE(idx) BIT_MASK(DT_INST_PROP(idx, easydma_maxcnt_bits)) #define I2C_NRFX_TWIM_RTIO_DEVICE(idx) \ - NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(I2C(idx)); \ - NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(I2C(idx)); \ - BUILD_ASSERT(I2C_FREQUENCY(idx) != I2C_NRFX_TWIM_INVALID_FREQUENCY, \ + NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(DT_DRV_INST(idx)); \ + NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(DT_DRV_INST(idx)); \ + BUILD_ASSERT(I2C_FREQUENCY(DT_DRV_INST(idx)) != I2C_NRFX_TWIM_INVALID_FREQUENCY, \ "Wrong I2C " #idx " frequency setting in dts"); \ - static void irq_connect##idx(void) \ + static struct i2c_nrfx_twim_rtio_data twim_##idx##z_data = { \ + .twim = \ + { \ + .p_twim = (NRF_TWIM_Type *)DT_INST_REG_ADDR(idx), \ + }, \ + }; \ + static void pre_init##idx(void) \ { \ - IRQ_CONNECT(DT_IRQN(I2C(idx)), DT_IRQ(I2C(idx), priority), nrfx_isr, \ - nrfx_twim_##idx##_irq_handler, 0); \ + twim_##idx##z_data.twim.p_twim = (NRF_TWIM_Type *)DT_INST_REG_ADDR(idx); \ + IRQ_CONNECT(DT_INST_IRQN(idx), DT_INST_IRQ(idx, priority), nrfx_twim_irq_handler, \ + &twim_##idx##z_data.twim, 0); \ } \ IF_ENABLED(USES_MSG_BUF(idx), (MSG_BUF_DEFINE(idx);)) \ I2C_RTIO_DEFINE(_i2c##idx##_twim_rtio, \ DT_INST_PROP_OR(n, sq_size, CONFIG_I2C_RTIO_SQ_SIZE), \ DT_INST_PROP_OR(n, cq_size, CONFIG_I2C_RTIO_CQ_SIZE)); \ - PINCTRL_DT_DEFINE(I2C(idx)); \ - static struct i2c_nrfx_twim_rtio_data twim_##idx##z_data; \ + PINCTRL_DT_INST_DEFINE(idx); \ static const struct i2c_nrfx_twim_rtio_config twim_##idx##z_config = { \ - .common = \ - { \ - .twim = NRFX_TWIM_INSTANCE(idx), \ - .twim_config = \ - { \ - .skip_gpio_cfg = true, \ - .skip_psel_cfg = true, \ - .frequency = I2C_FREQUENCY(idx), \ - }, \ - .event_handler = event_handler, \ - .msg_buf_size = MSG_BUF_SIZE(idx), \ - .irq_connect = irq_connect##idx, \ - .pcfg = PINCTRL_DT_DEV_CONFIG_GET(I2C(idx)), \ - IF_ENABLED(USES_MSG_BUF(idx), (.msg_buf = MSG_BUF_SYM(idx),)) \ - .max_transfer_size = MAX_TRANSFER_SIZE(idx), \ - }, \ - .ctx = &_i2c##idx##_twim_rtio, \ + .common = { \ + .twim_config = \ + { \ + .skip_gpio_cfg = true, \ + .skip_psel_cfg = true, \ + .frequency = I2C_FREQUENCY(DT_DRV_INST(idx)), \ + }, \ + .event_handler = event_handler, \ + .msg_buf_size = MSG_BUF_SIZE(idx), \ + .pre_init = pre_init##idx, \ + .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(idx), \ + IF_ENABLED(USES_MSG_BUF(idx), (.msg_buf = MSG_BUF_SYM(idx),)) .max_transfer_size = \ + MAX_TRANSFER_SIZE(idx), \ + .twim = &twim_##idx##z_data.twim, \ + }, \ + .ctx = &_i2c##idx##_twim_rtio, \ }; \ - PM_DEVICE_DT_DEFINE(I2C(idx), twim_nrfx_pm_action, PM_DEVICE_ISR_SAFE); \ - I2C_DEVICE_DT_DEINIT_DEFINE(I2C(idx), i2c_nrfx_twim_rtio_init, i2c_nrfx_twim_rtio_deinit, \ - PM_DEVICE_DT_GET(I2C(idx)), &twim_##idx##z_data, \ - &twim_##idx##z_config, POST_KERNEL, CONFIG_I2C_INIT_PRIORITY, \ - &i2c_nrfx_twim_driver_api); - -#ifdef CONFIG_HAS_HW_NRF_TWIM0 -I2C_NRFX_TWIM_RTIO_DEVICE(0); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM1 -I2C_NRFX_TWIM_RTIO_DEVICE(1); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM2 -I2C_NRFX_TWIM_RTIO_DEVICE(2); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM3 -I2C_NRFX_TWIM_RTIO_DEVICE(3); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM20 -I2C_NRFX_TWIM_RTIO_DEVICE(20); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM21 -I2C_NRFX_TWIM_RTIO_DEVICE(21); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM22 -I2C_NRFX_TWIM_RTIO_DEVICE(22); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM23 -I2C_NRFX_TWIM_RTIO_DEVICE(23); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM24 -I2C_NRFX_TWIM_RTIO_DEVICE(24); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM30 -I2C_NRFX_TWIM_RTIO_DEVICE(30); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM120 -I2C_NRFX_TWIM_RTIO_DEVICE(120); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM130 -I2C_NRFX_TWIM_RTIO_DEVICE(130); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM131 -I2C_NRFX_TWIM_RTIO_DEVICE(131); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM132 -I2C_NRFX_TWIM_RTIO_DEVICE(132); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM133 -I2C_NRFX_TWIM_RTIO_DEVICE(133); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM134 -I2C_NRFX_TWIM_RTIO_DEVICE(134); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM135 -I2C_NRFX_TWIM_RTIO_DEVICE(135); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM136 -I2C_NRFX_TWIM_RTIO_DEVICE(136); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIM137 -I2C_NRFX_TWIM_RTIO_DEVICE(137); -#endif + PM_DEVICE_DT_INST_DEFINE(idx, twim_nrfx_pm_action, I2C_PM_ISR_SAFE(idx)); \ + I2C_DEVICE_DT_INST_DEINIT_DEFINE(idx, i2c_nrfx_twim_rtio_init, i2c_nrfx_twim_rtio_deinit, \ + PM_DEVICE_DT_INST_GET(idx), &twim_##idx##z_data, \ + &twim_##idx##z_config, POST_KERNEL, \ + CONFIG_I2C_INIT_PRIORITY, &i2c_nrfx_twim_driver_api); + +DT_INST_FOREACH_STATUS_OKAY(I2C_NRFX_TWIM_RTIO_DEVICE) diff --git a/drivers/i2c/i2c_nrfx_twis.c b/drivers/i2c/i2c_nrfx_twis.c index 0fd9b667d23c..d5cd587f8e3d 100644 --- a/drivers/i2c/i2c_nrfx_twis.c +++ b/drivers/i2c/i2c_nrfx_twis.c @@ -16,26 +16,10 @@ #define DT_DRV_COMPAT nordic_nrf_twis -#define SHIM_NRF_TWIS_NODE(id) \ - DT_NODELABEL(_CONCAT(i2c, id)) +#define SHIM_NRF_TWIS_HAS_MEMORY_REGIONS(id) DT_NODE_HAS_PROP(DT_DRV_INST(id), memory_regions) -#define SHIM_NRF_TWIS_DEVICE_GET(id) \ - DEVICE_DT_GET(SHIM_NRF_TWIS_NODE(id)) - -#define SHIM_NRF_TWIS_IRQ_HANDLER(id) \ - _CONCAT_3(nrfx_twis_, id, _irq_handler) - -#define SHIM_NRF_TWIS_IRQN(id) \ - DT_IRQN(SHIM_NRF_TWIS_NODE(id)) - -#define SHIM_NRF_TWIS_IRQ_PRIO(id) \ - DT_IRQ(SHIM_NRF_TWIS_NODE(id), priority) - -#define SHIM_NRF_TWIS_HAS_MEMORY_REGIONS(id) \ - DT_NODE_HAS_PROP(SHIM_NRF_TWIS_NODE(id), memory_regions) - -#define SHIM_NRF_TWIS_LINKER_REGION_NAME(id) \ - LINKER_DT_NODE_REGION_NAME(DT_PHANDLE(SHIM_NRF_TWIS_NODE(id), memory_regions)) +#define SHIM_NRF_TWIS_LINKER_REGION_NAME(id) \ + LINKER_DT_NODE_REGION_NAME(DT_PHANDLE(DT_DRV_INST(id), memory_regions)) #define SHIM_NRF_TWIS_BUF_ATTR_SECTION(id) \ __attribute__((__section__(SHIM_NRF_TWIS_LINKER_REGION_NAME(id)))) @@ -53,14 +37,14 @@ LOG_MODULE_REGISTER(i2c_nrfx_twis, CONFIG_I2C_LOG_LEVEL); struct shim_nrf_twis_config { - nrfx_twis_t twis; - void (*irq_connect)(void); - void (*event_handler)(nrfx_twis_evt_t const *event); + void (*pre_init)(void); + void (*event_handler)(nrfx_twis_event_t const *event); const struct pinctrl_dev_config *pcfg; uint8_t *buf; }; struct shim_nrf_twis_data { + nrfx_twis_t twis; struct i2c_target_config *target_config; bool enabled; }; @@ -105,7 +89,7 @@ static void shim_nrf_twis_enable(const struct device *dev) } (void)pinctrl_apply_state(dev_config->pcfg, PINCTRL_STATE_DEFAULT); - nrfx_twis_enable(&dev_config->twis); + nrfx_twis_enable(&dev_data->twis); dev_data->enabled = true; } @@ -119,7 +103,7 @@ static void shim_nrf_twis_disable(const struct device *dev) } dev_data->enabled = false; - nrfx_twis_disable(&dev_config->twis); + nrfx_twis_disable(&dev_data->twis); (void)pinctrl_apply_state(dev_config->pcfg, PINCTRL_STATE_SLEEP); } @@ -129,10 +113,10 @@ static void shim_nrf_twis_handle_read_req(const struct device *dev) const struct shim_nrf_twis_config *dev_config = dev->config; struct i2c_target_config *target_config = dev_data->target_config; const struct i2c_target_callbacks *callbacks = target_config->callbacks; - const nrfx_twis_t *twis = &dev_config->twis; + nrfx_twis_t *twis = &dev_data->twis; uint8_t *buf; uint32_t buf_size; - nrfx_err_t err; + int err; if (callbacks->buf_read_requested(target_config, &buf, &buf_size)) { LOG_ERR("no buffer provided"); @@ -147,7 +131,7 @@ static void shim_nrf_twis_handle_read_req(const struct device *dev) memcpy(dev_config->buf, buf, buf_size); err = nrfx_twis_tx_prepare(twis, dev_config->buf, buf_size); - if (err != NRFX_SUCCESS) { + if (err < 0) { LOG_ERR("tx prepare failed"); return; } @@ -155,12 +139,13 @@ static void shim_nrf_twis_handle_read_req(const struct device *dev) static void shim_nrf_twis_handle_write_req(const struct device *dev) { + struct shim_nrf_twis_data *dev_data = dev->data; const struct shim_nrf_twis_config *dev_config = dev->config; - const nrfx_twis_t *twis = &dev_config->twis; - nrfx_err_t err; + nrfx_twis_t *twis = &dev_data->twis; + int err; err = nrfx_twis_rx_prepare(twis, dev_config->buf, SHIM_NRF_TWIS_BUF_SIZE); - if (err != NRFX_SUCCESS) { + if (err < 0) { LOG_ERR("rx prepare failed"); return; } @@ -172,13 +157,13 @@ static void shim_nrf_twis_handle_write_done(const struct device *dev) const struct shim_nrf_twis_config *dev_config = dev->config; struct i2c_target_config *target_config = dev_data->target_config; const struct i2c_target_callbacks *callbacks = target_config->callbacks; - const nrfx_twis_t *twis = &dev_config->twis; + nrfx_twis_t *twis = &dev_data->twis; callbacks->buf_write_received(target_config, dev_config->buf, nrfx_twis_rx_amount(twis)); } static void shim_nrf_twis_event_handler(const struct device *dev, - nrfx_twis_evt_t const *event) + nrfx_twis_event_t const *event) { switch (event->type) { case NRFX_TWIS_EVT_READ_REQ: @@ -223,9 +208,8 @@ static int shim_nrf_twis_target_register(const struct device *dev, struct i2c_target_config *target_config) { struct shim_nrf_twis_data *dev_data = dev->data; - const struct shim_nrf_twis_config *dev_config = dev->config; - const nrfx_twis_t *twis = &dev_config->twis; - nrfx_err_t err; + nrfx_twis_t *twis = &dev_data->twis; + int err; const nrfx_twis_config_t config = { .addr = { target_config->address, @@ -242,7 +226,7 @@ static int shim_nrf_twis_target_register(const struct device *dev, shim_nrf_twis_disable(dev); err = nrfx_twis_reconfigure(twis, &config); - if (err != NRFX_SUCCESS) { + if (err < 0) { return -ENODEV; } @@ -276,25 +260,25 @@ const struct i2c_driver_api shim_nrf_twis_api = { static int shim_nrf_twis_init(const struct device *dev) { + struct shim_nrf_twis_data *dev_data = dev->data; const struct shim_nrf_twis_config *dev_config = dev->config; - nrfx_err_t err; + int err; const nrfx_twis_config_t config = { .skip_gpio_cfg = true, .skip_psel_cfg = true, }; - err = nrfx_twis_init(&dev_config->twis, &config, dev_config->event_handler); - if (err != NRFX_SUCCESS) { + dev_config->pre_init(); + err = nrfx_twis_init(&dev_data->twis, &config, dev_config->event_handler); + if (err < 0) { return -ENODEV; } - dev_config->irq_connect(); return pm_device_driver_init(dev, shim_nrf_twis_pm_action_cb); } static int shim_nrf_twis_deinit(const struct device *dev) { - const struct shim_nrf_twis_config *dev_config = dev->config; struct shim_nrf_twis_data *dev_data = dev->data; if (dev_data->target_config != NULL) { @@ -317,127 +301,45 @@ static int shim_nrf_twis_deinit(const struct device *dev) #endif /* Uninit device hardware */ - nrfx_twis_uninit(&dev_config->twis); + nrfx_twis_uninit(&dev_data->twis); return 0; } #define SHIM_NRF_TWIS_NAME(id, name) \ _CONCAT_4(shim_nrf_twis_, name, _, id) -#define SHIM_NRF_TWIS_DEVICE_DEFINE(id) \ - NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(SHIM_NRF_TWIS_NODE(id)); \ - static void SHIM_NRF_TWIS_NAME(id, irq_connect)(void) \ - { \ - IRQ_CONNECT( \ - SHIM_NRF_TWIS_IRQN(id), \ - SHIM_NRF_TWIS_IRQ_PRIO(id), \ - nrfx_isr, \ - SHIM_NRF_TWIS_IRQ_HANDLER(id), \ - 0 \ - ); \ - } \ - \ - static void SHIM_NRF_TWIS_NAME(id, event_handler)(nrfx_twis_evt_t const *event) \ - { \ - shim_nrf_twis_event_handler(SHIM_NRF_TWIS_DEVICE_GET(id), event); \ - } \ - \ - static struct shim_nrf_twis_data SHIM_NRF_TWIS_NAME(id, data); \ - \ - PINCTRL_DT_DEFINE(SHIM_NRF_TWIS_NODE(id)); \ - \ - static uint8_t SHIM_NRF_TWIS_NAME(id, buf) \ - [SHIM_NRF_TWIS_BUF_SIZE] SHIM_NRF_TWIS_BUF_ATTR(id); \ - \ - static const struct shim_nrf_twis_config SHIM_NRF_TWIS_NAME(id, config) = { \ - .twis = NRFX_TWIS_INSTANCE(id), \ - .irq_connect = SHIM_NRF_TWIS_NAME(id, irq_connect), \ - .event_handler = SHIM_NRF_TWIS_NAME(id, event_handler), \ - .pcfg = PINCTRL_DT_DEV_CONFIG_GET(SHIM_NRF_TWIS_NODE(id)), \ - .buf = SHIM_NRF_TWIS_NAME(id, buf), \ - }; \ - \ - PM_DEVICE_DT_DEFINE( \ - SHIM_NRF_TWIS_NODE(id), \ - shim_nrf_twis_pm_action_cb, \ - ); \ - \ - DEVICE_DT_DEINIT_DEFINE( \ - SHIM_NRF_TWIS_NODE(id), \ - shim_nrf_twis_init, \ - shim_nrf_twis_deinit, \ - PM_DEVICE_DT_GET(SHIM_NRF_TWIS_NODE(id)), \ - &SHIM_NRF_TWIS_NAME(id, data), \ - &SHIM_NRF_TWIS_NAME(id, config), \ - POST_KERNEL, \ - CONFIG_I2C_INIT_PRIORITY, \ - &shim_nrf_twis_api \ - ); - -#ifdef CONFIG_HAS_HW_NRF_TWIS0 -SHIM_NRF_TWIS_DEVICE_DEFINE(0); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIS1 -SHIM_NRF_TWIS_DEVICE_DEFINE(1); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIS2 -SHIM_NRF_TWIS_DEVICE_DEFINE(2); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIS3 -SHIM_NRF_TWIS_DEVICE_DEFINE(3); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIS20 -SHIM_NRF_TWIS_DEVICE_DEFINE(20); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIS21 -SHIM_NRF_TWIS_DEVICE_DEFINE(21); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIS22 -SHIM_NRF_TWIS_DEVICE_DEFINE(22); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIS23 -SHIM_NRF_TWIS_DEVICE_DEFINE(23); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIS24 -SHIM_NRF_TWIS_DEVICE_DEFINE(24); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIS30 -SHIM_NRF_TWIS_DEVICE_DEFINE(30); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIS130 -SHIM_NRF_TWIS_DEVICE_DEFINE(130); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIS131 -SHIM_NRF_TWIS_DEVICE_DEFINE(131); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIS133 -SHIM_NRF_TWIS_DEVICE_DEFINE(133); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIS134 -SHIM_NRF_TWIS_DEVICE_DEFINE(134); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIS135 -SHIM_NRF_TWIS_DEVICE_DEFINE(135); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIS136 -SHIM_NRF_TWIS_DEVICE_DEFINE(136); -#endif - -#ifdef CONFIG_HAS_HW_NRF_TWIS137 -SHIM_NRF_TWIS_DEVICE_DEFINE(137); -#endif +#define SHIM_NRF_TWIS_DEVICE_DEFINE(id) \ + static struct shim_nrf_twis_data SHIM_NRF_TWIS_NAME(id, data); \ + NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(DT_DRV_INST(id)); \ + static void SHIM_NRF_TWIS_NAME(id, pre_init)(void) \ + { \ + SHIM_NRF_TWIS_NAME(id, data).twis.p_reg = (NRF_TWIS_Type *)DT_INST_REG_ADDR(id); \ + IRQ_CONNECT(DT_INST_IRQN(id), DT_INST_IRQ(id, priority), nrfx_twis_irq_handler, \ + &SHIM_NRF_TWIS_NAME(id, data).twis, 0); \ + } \ + \ + static void SHIM_NRF_TWIS_NAME(id, event_handler)(nrfx_twis_event_t const *event) \ + { \ + shim_nrf_twis_event_handler(DEVICE_DT_INST_GET(id), event); \ + } \ + \ + PINCTRL_DT_INST_DEFINE(id); \ + \ + static uint8_t SHIM_NRF_TWIS_NAME(id, \ + buf)[SHIM_NRF_TWIS_BUF_SIZE] SHIM_NRF_TWIS_BUF_ATTR(id); \ + \ + static const struct shim_nrf_twis_config SHIM_NRF_TWIS_NAME(id, config) = { \ + .pre_init = SHIM_NRF_TWIS_NAME(id, pre_init), \ + .event_handler = SHIM_NRF_TWIS_NAME(id, event_handler), \ + .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(id), \ + .buf = SHIM_NRF_TWIS_NAME(id, buf), \ + }; \ + \ + PM_DEVICE_DT_INST_DEFINE(id, shim_nrf_twis_pm_action_cb, ); \ + \ + DEVICE_DT_INST_DEINIT_DEFINE(id, shim_nrf_twis_init, shim_nrf_twis_deinit, \ + PM_DEVICE_DT_INST_GET(id), &SHIM_NRF_TWIS_NAME(id, data), \ + &SHIM_NRF_TWIS_NAME(id, config), POST_KERNEL, \ + CONFIG_I2C_INIT_PRIORITY, &shim_nrf_twis_api); + +DT_INST_FOREACH_STATUS_OKAY(SHIM_NRF_TWIS_DEVICE_DEFINE) diff --git a/drivers/i2s/Kconfig.nrfx b/drivers/i2s/Kconfig.nrfx index cc00ac1a9cc3..786de1ba68b8 100644 --- a/drivers/i2s/Kconfig.nrfx +++ b/drivers/i2s/Kconfig.nrfx @@ -5,8 +5,7 @@ menuconfig I2S_NRFX bool "nRF I2S nrfx driver" default y depends on DT_HAS_NORDIC_NRF_I2S_ENABLED - select NRFX_I2S0 if HAS_HW_NRF_I2S0 - select NRFX_I2S20 if HAS_HW_NRF_I2S20 + select NRFX_I2S select PINCTRL help Enable support for nrfx I2S driver for nRF MCU series. @@ -21,6 +20,14 @@ config I2S_NRFX_TX_BLOCK_COUNT int "TX queue length" default 4 +config I2S_NRFX_ALLOW_MCK_BYPASS + bool "Allow MCK bypass if a ratio exists" + depends on SOC_SERIES_NRF53X + help + Search for a supported ratio directly from MCK and LRCK + and enable bypass if a ratio exists. If not, fallback to + the standard MCK selection mechanism. + endif # I2S_NRFX menuconfig I2S_NRF_TDM diff --git a/drivers/i2s/i2s_nrfx.c b/drivers/i2s/i2s_nrfx.c index 74f7046732f1..1e8433988dac 100644 --- a/drivers/i2s/i2s_nrfx.c +++ b/drivers/i2s/i2s_nrfx.c @@ -4,6 +4,8 @@ * SPDX-License-Identifier: Apache-2.0 */ +#define DT_DRV_COMPAT nordic_nrf_i2s + #include #include #include @@ -33,21 +35,20 @@ struct i2s_nrfx_drv_data { struct k_msgq tx_queue; struct stream_cfg rx; struct k_msgq rx_queue; - const nrfx_i2s_t *p_i2s; + nrfx_i2s_t i2s; const uint32_t *last_tx_buffer; enum i2s_state state; enum i2s_dir active_dir; bool stop; /* stop after the current (TX or RX) block */ bool discard_rx; /* discard further RX blocks */ volatile bool next_tx_buffer_needed; - bool tx_configured : 1; - bool rx_configured : 1; - bool request_clock : 1; + bool tx_configured: 1; + bool rx_configured: 1; + bool request_clock: 1; }; struct i2s_nrfx_drv_cfg { nrfx_i2s_data_handler_t data_handler; - nrfx_i2s_t i2s; nrfx_i2s_config_t nrfx_def_cfg; const struct pinctrl_dev_config *pcfg; enum clock_source { @@ -64,128 +65,26 @@ static void find_suitable_clock(const struct i2s_nrfx_drv_cfg *drv_cfg, nrfx_i2s_config_t *config, const struct i2s_config *i2s_cfg) { - static const struct { - uint16_t ratio_val; - nrf_i2s_ratio_t ratio_enum; - } ratios[] = { - { 32, NRF_I2S_RATIO_32X }, - { 48, NRF_I2S_RATIO_48X }, - { 64, NRF_I2S_RATIO_64X }, - { 96, NRF_I2S_RATIO_96X }, - { 128, NRF_I2S_RATIO_128X }, - { 192, NRF_I2S_RATIO_192X }, - { 256, NRF_I2S_RATIO_256X }, - { 384, NRF_I2S_RATIO_384X }, - { 512, NRF_I2S_RATIO_512X } + const nrfx_i2s_clk_params_t clk_params = { + .base_clock_freq = + (NRF_I2S_HAS_CLKCONFIG && drv_cfg->clk_src == ACLK) + /* The I2S_NRFX_DEVICE() macro contains build assertions that + * make sure that the ACLK clock source is only used when it is + * available and only with the "hfclkaudio-frequency" property + * defined, but the default value of 0 here needs to be used to + * prevent compilation errors when the property is not defined + * (this expression will be eventually optimized away then). + */ + ? DT_PROP_OR(DT_NODELABEL(clock), hfclkaudio_frequency, 0) + : 32*1000*1000UL, + .transfer_rate = i2s_cfg->frame_clk_freq, + .swidth = config->sample_width, + .allow_bypass = IS_ENABLED(CONFIG_I2S_NRFX_ALLOW_MCK_BYPASS), }; - const uint32_t src_freq = - (NRF_I2S_HAS_CLKCONFIG && drv_cfg->clk_src == ACLK) - /* The I2S_NRFX_DEVICE() macro contains build assertions that - * make sure that the ACLK clock source is only used when it is - * available and only with the "hfclkaudio-frequency" property - * defined, but the default value of 0 here needs to be used to - * prevent compilation errors when the property is not defined - * (this expression will be eventually optimized away then). - */ - ? DT_PROP_OR(DT_NODELABEL(clock), hfclkaudio_frequency, 0) - : 32*1000*1000UL; - uint32_t bits_per_frame = 2 * i2s_cfg->word_size; - uint32_t best_diff = UINT32_MAX; - uint8_t r, best_r = 0; - nrf_i2s_mck_t best_mck_cfg = 0; - uint32_t best_mck = 0; - - for (r = 0; (best_diff != 0) && (r < ARRAY_SIZE(ratios)); ++r) { - /* Only multiples of the frame width can be used as ratios. */ - if ((ratios[r].ratio_val % bits_per_frame) != 0) { - continue; - } - - if (IS_ENABLED(CONFIG_SOC_SERIES_NRF53X) || IS_ENABLED(CONFIG_SOC_SERIES_NRF54LX)) { - uint32_t requested_mck = - i2s_cfg->frame_clk_freq * ratios[r].ratio_val; - /* As specified in the nRF5340 PS: - * - * MCKFREQ = 4096 * floor(f_MCK * 1048576 / - * (f_source + f_MCK / 2)) - * f_actual = f_source / - * floor(1048576 * 4096 / MCKFREQ) - */ - enum { MCKCONST = 1048576 }; - uint32_t mck_factor = - (uint32_t)(((uint64_t)requested_mck * MCKCONST) / - (src_freq + requested_mck / 2)); - - /* skip cases when mck_factor is too big for dividing */ - if (mck_factor > MCKCONST) { - continue; - } - uint32_t actual_mck = src_freq / (MCKCONST / mck_factor); - - uint32_t lrck_freq = actual_mck / ratios[r].ratio_val; - uint32_t diff = lrck_freq >= i2s_cfg->frame_clk_freq - ? (lrck_freq - i2s_cfg->frame_clk_freq) - : (i2s_cfg->frame_clk_freq - lrck_freq); - - if (diff < best_diff) { - best_mck_cfg = mck_factor * 4096; - best_mck = actual_mck; - best_r = r; - best_diff = diff; - } - } else { - static const struct { - uint8_t divider_val; - nrf_i2s_mck_t divider_enum; - } dividers[] = { - { 8, NRF_I2S_MCK_32MDIV8 }, - { 10, NRF_I2S_MCK_32MDIV10 }, - { 11, NRF_I2S_MCK_32MDIV11 }, - { 15, NRF_I2S_MCK_32MDIV15 }, - { 16, NRF_I2S_MCK_32MDIV16 }, - { 21, NRF_I2S_MCK_32MDIV21 }, - { 23, NRF_I2S_MCK_32MDIV23 }, - { 30, NRF_I2S_MCK_32MDIV30 }, - { 31, NRF_I2S_MCK_32MDIV31 }, - { 32, NRF_I2S_MCK_32MDIV32 }, - { 42, NRF_I2S_MCK_32MDIV42 }, - { 63, NRF_I2S_MCK_32MDIV63 }, - { 125, NRF_I2S_MCK_32MDIV125 } - }; - for (uint8_t d = 0; (best_diff != 0) && (d < ARRAY_SIZE(dividers)); ++d) { - uint32_t mck_freq = - src_freq / dividers[d].divider_val; - uint32_t lrck_freq = - mck_freq / ratios[r].ratio_val; - uint32_t diff = - lrck_freq >= i2s_cfg->frame_clk_freq - ? (lrck_freq - i2s_cfg->frame_clk_freq) - : (i2s_cfg->frame_clk_freq - lrck_freq); - - if (diff < best_diff) { - best_mck_cfg = dividers[d].divider_enum; - best_mck = mck_freq; - best_r = r; - best_diff = diff; - } - - /* Since dividers are in ascending order, stop - * checking next ones for the current ratio - * after resulting LRCK frequency falls below - * the one requested. - */ - if (lrck_freq < i2s_cfg->frame_clk_freq) { - break; - } - } - } + if (nrfx_i2s_prescalers_calc(&clk_params, &config->prescalers) != 0) { + LOG_ERR("Failed to find suitable I2S clock configuration."); } - - config->mck_setup = best_mck_cfg; - config->ratio = ratios[best_r].ratio_enum; - LOG_INF("I2S MCK frequency: %u, actual PCM rate: %u", - best_mck, best_mck / ratios[best_r].ratio_val); } static bool get_next_tx_buffer(struct i2s_nrfx_drv_data *drv_data, @@ -236,7 +135,7 @@ static bool supply_next_buffers(struct i2s_nrfx_drv_data *drv_data, if (drv_data->active_dir != I2S_DIR_TX) { /* -> RX active */ if (!get_next_rx_buffer(drv_data, next)) { drv_data->state = I2S_STATE_ERROR; - nrfx_i2s_stop(drv_data->p_i2s); + nrfx_i2s_stop(&drv_data->i2s); return false; } /* Set buffer size if there is no TX buffer (which effectively @@ -251,7 +150,7 @@ static bool supply_next_buffers(struct i2s_nrfx_drv_data *drv_data, drv_data->last_tx_buffer = next->p_tx_buffer; LOG_DBG("Next buffers: %p/%p", next->p_tx_buffer, next->p_rx_buffer); - nrfx_i2s_next_buffers_set(drv_data->p_i2s, next); + nrfx_i2s_next_buffers_set(&drv_data->i2s, next); return true; } @@ -283,7 +182,7 @@ static void data_handler(const struct device *dev, } drv_data->last_tx_buffer = NULL; } - nrfx_i2s_uninit(drv_data->p_i2s); + nrfx_i2s_uninit(&drv_data->i2s); if (drv_data->request_clock) { (void)onoff_release(drv_data->clk_mgr); } @@ -300,7 +199,7 @@ static void data_handler(const struct device *dev, LOG_ERR("Next buffers not supplied on time"); drv_data->state = I2S_STATE_ERROR; } - nrfx_i2s_stop(drv_data->p_i2s); + nrfx_i2s_stop(&drv_data->i2s); return; } @@ -350,7 +249,7 @@ static void data_handler(const struct device *dev, } if (stop_transfer) { - nrfx_i2s_stop(drv_data->p_i2s); + nrfx_i2s_stop(&drv_data->i2s); } else if (status & NRFX_I2S_STATUS_NEXT_BUFFERS_NEEDED) { nrfx_i2s_buffers_t next = { 0 }; @@ -521,8 +420,7 @@ static int i2s_nrfx_configure(const struct device *dev, enum i2s_dir dir, * the MCK output is used), find a suitable clock configuration for it. */ if (nrfx_cfg.mode == NRF_I2S_MODE_MASTER || - (nrf_i2s_mck_pin_get(drv_cfg->i2s.p_reg) & I2S_PSEL_MCK_CONNECT_Msk) - == I2S_PSEL_MCK_CONNECT_Connected << I2S_PSEL_MCK_CONNECT_Pos) { + nrf_i2s_mck_pin_connected_check(drv_data->i2s.p_reg)) { find_suitable_clock(drv_cfg, &nrfx_cfg, i2s_cfg); /* Unless the PCLK32M source is used with the HFINT oscillator * (which is always available without any additional actions), @@ -531,7 +429,7 @@ static int i2s_nrfx_configure(const struct device *dev, enum i2s_dir dir, */ drv_data->request_clock = (drv_cfg->clk_src != PCLK32M); } else { - nrfx_cfg.mck_setup = NRF_I2S_MCK_DISABLED; + nrfx_cfg.prescalers.mck_setup = NRF_I2S_MCK_DISABLED; drv_data->request_clock = false; } @@ -680,7 +578,7 @@ static int start_transfer(struct i2s_nrfx_drv_data *drv_data) /* Failed to allocate next RX buffer */ ret = -ENOMEM; } else { - nrfx_err_t err; + int err; /* It is necessary to set buffer size here only for I2S_DIR_RX, * because only then the get_next_tx_buffer() call in the if @@ -693,16 +591,16 @@ static int start_transfer(struct i2s_nrfx_drv_data *drv_data) drv_data->last_tx_buffer = initial_buffers.p_tx_buffer; - err = nrfx_i2s_start(drv_data->p_i2s, &initial_buffers, 0); - if (err == NRFX_SUCCESS) { + err = nrfx_i2s_start(&drv_data->i2s, &initial_buffers, 0); + if (err == 0) { return 0; } - LOG_ERR("Failed to start I2S transfer: 0x%08x", err); + LOG_ERR("Failed to start I2S transfer: %d", err); ret = -EIO; } - nrfx_i2s_uninit(drv_data->p_i2s); + nrfx_i2s_uninit(&drv_data->i2s); if (drv_data->request_clock) { (void)onoff_release(drv_data->clk_mgr); } @@ -731,7 +629,7 @@ static void clock_started_callback(struct onoff_manager *mgr, * the actual transfer in such case. */ if (drv_data->state == I2S_STATE_READY) { - nrfx_i2s_uninit(drv_data->p_i2s); + nrfx_i2s_uninit(&drv_data->i2s); (void)onoff_release(drv_data->clk_mgr); } else { (void)start_transfer(drv_data); @@ -742,25 +640,25 @@ static int trigger_start(const struct device *dev) { struct i2s_nrfx_drv_data *drv_data = dev->data; const struct i2s_nrfx_drv_cfg *drv_cfg = dev->config; - nrfx_err_t err; + int err; int ret; const nrfx_i2s_config_t *nrfx_cfg = (drv_data->active_dir == I2S_DIR_TX) ? &drv_data->tx.nrfx_cfg : &drv_data->rx.nrfx_cfg; - err = nrfx_i2s_init(drv_data->p_i2s, nrfx_cfg, drv_cfg->data_handler); - if (err != NRFX_SUCCESS) { - LOG_ERR("Failed to initialize I2S: 0x%08x", err); + err = nrfx_i2s_init(&drv_data->i2s, nrfx_cfg, drv_cfg->data_handler); + if (err != 0) { + LOG_ERR("Failed to initialize I2S: %d", err); return -EIO; } drv_data->state = I2S_STATE_RUNNING; #if NRF_I2S_HAS_CLKCONFIG - nrf_i2s_clk_configure(drv_cfg->i2s.p_reg, + nrf_i2s_clk_configure(drv_data->i2s.p_reg, drv_cfg->clk_src == ACLK ? NRF_I2S_CLKSRC_ACLK : NRF_I2S_CLKSRC_PCLK32M, - false); + nrfx_cfg->prescalers.enable_bypass); #endif /* If it is required to use certain HF clock, request it to be running @@ -771,7 +669,7 @@ static int trigger_start(const struct device *dev) clock_started_callback); ret = onoff_request(drv_data->clk_mgr, &drv_data->clk_cli); if (ret < 0) { - nrfx_i2s_uninit(drv_data->p_i2s); + nrfx_i2s_uninit(&drv_data->i2s); drv_data->state = I2S_STATE_READY; LOG_ERR("Failed to request clock: %d", ret); @@ -878,7 +776,7 @@ static int i2s_nrfx_trigger(const struct device *dev, case I2S_TRIGGER_DROP: if (drv_data->state != I2S_STATE_READY) { drv_data->discard_rx = true; - nrfx_i2s_stop(drv_data->p_i2s); + nrfx_i2s_stop(&drv_data->i2s); } purge_queue(dev, dir); drv_data->state = I2S_STATE_READY; @@ -923,72 +821,56 @@ static DEVICE_API(i2s, i2s_nrf_drv_api) = { .trigger = i2s_nrfx_trigger, }; -#define I2S(idx) DT_NODELABEL(i2s##idx) -#define I2S_CLK_SRC(idx) DT_STRING_TOKEN(I2S(idx), clock_source) - -#define I2S_NRFX_DEVICE(idx) \ - static struct i2s_buf tx_msgs##idx[CONFIG_I2S_NRFX_TX_BLOCK_COUNT]; \ - static struct i2s_buf rx_msgs##idx[CONFIG_I2S_NRFX_RX_BLOCK_COUNT]; \ - static void data_handler##idx(nrfx_i2s_buffers_t const *p_released, \ - uint32_t status) \ - { \ - data_handler(DEVICE_DT_GET(I2S(idx)), p_released, status); \ - } \ - PINCTRL_DT_DEFINE(I2S(idx)); \ - static const struct i2s_nrfx_drv_cfg i2s_nrfx_cfg##idx = { \ - .data_handler = data_handler##idx, \ - .i2s = NRFX_I2S_INSTANCE(idx), \ - .nrfx_def_cfg = NRFX_I2S_DEFAULT_CONFIG( \ - NRF_I2S_PIN_NOT_CONNECTED, \ - NRF_I2S_PIN_NOT_CONNECTED, \ - NRF_I2S_PIN_NOT_CONNECTED, \ - NRF_I2S_PIN_NOT_CONNECTED, \ - NRF_I2S_PIN_NOT_CONNECTED), \ - .nrfx_def_cfg.skip_gpio_cfg = true, \ - .nrfx_def_cfg.skip_psel_cfg = true, \ - .pcfg = PINCTRL_DT_DEV_CONFIG_GET(I2S(idx)), \ - .clk_src = I2S_CLK_SRC(idx), \ - }; \ - static struct i2s_nrfx_drv_data i2s_nrfx_data##idx = { \ - .state = I2S_STATE_READY, \ - .p_i2s = &i2s_nrfx_cfg##idx.i2s \ - }; \ - static int i2s_nrfx_init##idx(const struct device *dev) \ - { \ - IRQ_CONNECT(DT_IRQN(I2S(idx)), DT_IRQ(I2S(idx), priority), \ - nrfx_isr, nrfx_i2s_##idx##_irq_handler, 0); \ - const struct i2s_nrfx_drv_cfg *drv_cfg = dev->config; \ - int err = pinctrl_apply_state(drv_cfg->pcfg, \ - PINCTRL_STATE_DEFAULT); \ - if (err < 0) { \ - return err; \ - } \ - k_msgq_init(&i2s_nrfx_data##idx.tx_queue, \ - (char *)tx_msgs##idx, sizeof(struct i2s_buf), \ - ARRAY_SIZE(tx_msgs##idx)); \ - k_msgq_init(&i2s_nrfx_data##idx.rx_queue, \ - (char *)rx_msgs##idx, sizeof(struct i2s_buf), \ - ARRAY_SIZE(rx_msgs##idx)); \ - init_clock_manager(dev); \ - return 0; \ - } \ - BUILD_ASSERT(I2S_CLK_SRC(idx) != ACLK || \ - (NRF_I2S_HAS_CLKCONFIG && NRF_CLOCK_HAS_HFCLKAUDIO), \ - "Clock source ACLK is not available."); \ - BUILD_ASSERT(I2S_CLK_SRC(idx) != ACLK || \ - DT_NODE_HAS_PROP(DT_NODELABEL(clock), \ - hfclkaudio_frequency), \ - "Clock source ACLK requires the hfclkaudio-frequency " \ - "property to be defined in the nordic,nrf-clock node."); \ - DEVICE_DT_DEFINE(I2S(idx), i2s_nrfx_init##idx, NULL, \ - &i2s_nrfx_data##idx, &i2s_nrfx_cfg##idx, \ - POST_KERNEL, CONFIG_I2S_INIT_PRIORITY, \ - &i2s_nrf_drv_api); - -#ifdef CONFIG_HAS_HW_NRF_I2S0 -I2S_NRFX_DEVICE(0); -#endif - -#ifdef CONFIG_HAS_HW_NRF_I2S20 -I2S_NRFX_DEVICE(20); -#endif +#define I2S_CLK_SRC(inst) DT_STRING_TOKEN(DT_DRV_INST(inst), clock_source) + +#define I2S_NRFX_DEVICE(inst) \ + static struct i2s_buf tx_msgs##inst[CONFIG_I2S_NRFX_TX_BLOCK_COUNT]; \ + static struct i2s_buf rx_msgs##inst[CONFIG_I2S_NRFX_RX_BLOCK_COUNT]; \ + static void data_handler##inst(nrfx_i2s_buffers_t const *p_released, uint32_t status) \ + { \ + data_handler(DEVICE_DT_GET(DT_DRV_INST(inst)), p_released, status); \ + } \ + PINCTRL_DT_DEFINE(DT_DRV_INST(inst)); \ + static const struct i2s_nrfx_drv_cfg i2s_nrfx_cfg##inst = { \ + .data_handler = data_handler##inst, \ + .nrfx_def_cfg = NRFX_I2S_DEFAULT_CONFIG( \ + NRF_I2S_PIN_NOT_CONNECTED, NRF_I2S_PIN_NOT_CONNECTED, \ + NRF_I2S_PIN_NOT_CONNECTED, NRF_I2S_PIN_NOT_CONNECTED, \ + NRF_I2S_PIN_NOT_CONNECTED), \ + .nrfx_def_cfg.skip_gpio_cfg = true, \ + .nrfx_def_cfg.skip_psel_cfg = true, \ + .pcfg = PINCTRL_DT_DEV_CONFIG_GET(DT_DRV_INST(inst)), \ + .clk_src = I2S_CLK_SRC(inst), \ + }; \ + static struct i2s_nrfx_drv_data i2s_nrfx_data##inst = { \ + .state = I2S_STATE_READY, \ + .i2s = NRFX_I2S_INSTANCE(DT_INST_REG_ADDR(inst)), \ + }; \ + static int i2s_nrfx_init##inst(const struct device *dev) \ + { \ + IRQ_CONNECT(DT_INST_IRQN(inst), DT_INST_IRQ(inst, priority), nrfx_i2s_irq_handler, \ + &i2s_nrfx_data##inst.i2s, 0); \ + const struct i2s_nrfx_drv_cfg *drv_cfg = dev->config; \ + int err = pinctrl_apply_state(drv_cfg->pcfg, PINCTRL_STATE_DEFAULT); \ + if (err < 0) { \ + return err; \ + } \ + k_msgq_init(&i2s_nrfx_data##inst.tx_queue, (char *)tx_msgs##inst, \ + sizeof(struct i2s_buf), ARRAY_SIZE(tx_msgs##inst)); \ + k_msgq_init(&i2s_nrfx_data##inst.rx_queue, (char *)rx_msgs##inst, \ + sizeof(struct i2s_buf), ARRAY_SIZE(rx_msgs##inst)); \ + init_clock_manager(dev); \ + return 0; \ + } \ + BUILD_ASSERT(I2S_CLK_SRC(inst) != ACLK || \ + (NRF_I2S_HAS_CLKCONFIG && NRF_CLOCK_HAS_HFCLKAUDIO), \ + "Clock source ACLK is not available."); \ + BUILD_ASSERT(I2S_CLK_SRC(inst) != ACLK || \ + DT_NODE_HAS_PROP(DT_NODELABEL(clock), hfclkaudio_frequency), \ + "Clock source ACLK requires the hfclkaudio-frequency " \ + "property to be defined in the nordic,nrf-clock node."); \ + DEVICE_DT_INST_DEFINE(inst, i2s_nrfx_init##inst, NULL, &i2s_nrfx_data##inst, \ + &i2s_nrfx_cfg##inst, POST_KERNEL, CONFIG_I2S_INIT_PRIORITY, \ + &i2s_nrf_drv_api); + +DT_INST_FOREACH_STATUS_OKAY(I2S_NRFX_DEVICE) diff --git a/drivers/mspi/mspi_dw_vendor_specific.h b/drivers/mspi/mspi_dw_vendor_specific.h index d32a53ac2939..36d0ef57e06e 100644 --- a/drivers/mspi/mspi_dw_vendor_specific.h +++ b/drivers/mspi/mspi_dw_vendor_specific.h @@ -12,7 +12,7 @@ #if DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_exmif) -#include +#include static inline void vendor_specific_init(const struct device *dev) { diff --git a/drivers/power_domain/Kconfig.nrfs_gdpwr b/drivers/power_domain/Kconfig.nrfs_gdpwr index bf9abd59aedb..c5f05d88a7ee 100644 --- a/drivers/power_domain/Kconfig.nrfs_gdpwr +++ b/drivers/power_domain/Kconfig.nrfs_gdpwr @@ -4,6 +4,7 @@ config POWER_DOMAIN_NRFS_GDPWR bool "NRFS Global Domain Power Request driver" depends on DT_HAS_NORDIC_NRFS_GDPWR_ENABLED + depends on MULTITHREADING select NRFS select NRFS_GDPWR_SERVICE_ENABLED default y diff --git a/drivers/pwm/Kconfig.nrfx b/drivers/pwm/Kconfig.nrfx index d99b5aaf3ab8..7bb3881ffc42 100644 --- a/drivers/pwm/Kconfig.nrfx +++ b/drivers/pwm/Kconfig.nrfx @@ -5,18 +5,7 @@ config PWM_NRFX bool "nRF PWM nrfx driver" default y depends on DT_HAS_NORDIC_NRF_PWM_ENABLED - select NRFX_PWM0 if HAS_HW_NRF_PWM0 - select NRFX_PWM1 if HAS_HW_NRF_PWM1 - select NRFX_PWM2 if HAS_HW_NRF_PWM2 - select NRFX_PWM3 if HAS_HW_NRF_PWM3 - select NRFX_PWM20 if HAS_HW_NRF_PWM20 - select NRFX_PWM21 if HAS_HW_NRF_PWM21 - select NRFX_PWM22 if HAS_HW_NRF_PWM22 - select NRFX_PWM120 if HAS_HW_NRF_PWM120 - select NRFX_PWM130 if HAS_HW_NRF_PWM130 - select NRFX_PWM131 if HAS_HW_NRF_PWM131 - select NRFX_PWM132 if HAS_HW_NRF_PWM132 - select NRFX_PWM133 if HAS_HW_NRF_PWM133 + select NRFX_PWM select PINCTRL help Enable support for nrfx Hardware PWM driver for nRF52 MCU series. diff --git a/drivers/pwm/pwm_nrf_sw.c b/drivers/pwm/pwm_nrf_sw.c index e4cc7ecb42b9..1df46c66216d 100644 --- a/drivers/pwm/pwm_nrf_sw.c +++ b/drivers/pwm/pwm_nrf_sw.c @@ -14,6 +14,7 @@ #include #include #include +#include #include @@ -62,7 +63,7 @@ struct pwm_config { NRF_RTC_Type *rtc; NRF_TIMER_Type *timer; }; - nrfx_gpiote_t gpiote[PWM_0_MAP_SIZE]; + nrfx_gpiote_t * gpiote[PWM_0_MAP_SIZE]; uint8_t psel_ch[PWM_0_MAP_SIZE]; uint8_t initially_inverted; uint8_t map_size; @@ -72,8 +73,9 @@ struct pwm_config { struct pwm_data { uint32_t period_cycles; uint32_t pulse_cycles[PWM_0_MAP_SIZE]; - uint8_t ppi_ch[PWM_0_MAP_SIZE][PPI_PER_CH]; + nrfx_gppi_handle_t ppi_h[PWM_0_MAP_SIZE][PPI_PER_CH]; uint8_t gpiote_ch[PWM_0_MAP_SIZE]; + uint32_t ppi_ch_mask[PWM_0_MAP_SIZE]; }; static inline NRF_RTC_Type *pwm_config_rtc(const struct pwm_config *config) @@ -126,11 +128,11 @@ static int pwm_nrf_sw_set_cycles(const struct device *dev, uint32_t channel, NRF_RTC_Type *rtc = pwm_config_rtc(config); NRF_GPIOTE_Type *gpiote; struct pwm_data *data = dev->data; - uint32_t ppi_mask; uint8_t active_level; uint8_t psel_ch; uint8_t gpiote_ch; - const uint8_t *ppi_chs; + const nrfx_gppi_handle_t *ppi_chs; + uint32_t src_d = nrfx_gppi_domain_id_get((USE_RTC ? (uint32_t)rtc : (uint32_t)timer)); int ret; if (channel >= config->map_size) { @@ -163,18 +165,16 @@ static int pwm_nrf_sw_set_cycles(const struct device *dev, uint32_t channel, } } - gpiote = config->gpiote[channel].p_reg; + gpiote = config->gpiote[channel]->p_reg; psel_ch = config->psel_ch[channel]; gpiote_ch = data->gpiote_ch[channel]; - ppi_chs = data->ppi_ch[channel]; + ppi_chs = data->ppi_h[channel]; LOG_DBG("channel %u, period %u, pulse %u", channel, period_cycles, pulse_cycles); - /* clear PPI used */ - ppi_mask = BIT(ppi_chs[0]) | BIT(ppi_chs[1]) | - (PPI_PER_CH > 2 ? BIT(ppi_chs[2]) : 0); - nrfx_gppi_channels_disable(ppi_mask); + /* disable PPI used */ + nrfx_gppi_channels_disable(src_d, data->ppi_ch_mask[channel]); active_level = (flags & PWM_POLARITY_INVERTED) ? 0 : 1; @@ -278,12 +278,10 @@ static int pwm_nrf_sw_set_cycles(const struct device *dev, uint32_t channel, nrf_rtc_compare_event_get(0)); #if PPI_FORK_AVAILABLE - nrfx_gppi_fork_endpoint_setup(ppi_chs[1], - clear_task_address); + nrfx_gppi_ep_attach(ppi_chs[1], clear_task_address); #else - nrfx_gppi_channel_endpoints_setup(ppi_chs[2], - period_end_event_address, - clear_task_address); + nrfx_gppi_ep_attach(ppi_chs[2], period_end_event_address); + nrfx_gppi_ep_attach(ppi_chs[2], clear_task_address); #endif } else { pulse_end_event_address = @@ -294,13 +292,13 @@ static int pwm_nrf_sw_set_cycles(const struct device *dev, uint32_t channel, nrf_timer_compare_event_get(0)); } - nrfx_gppi_channel_endpoints_setup(ppi_chs[0], - pulse_end_event_address, - pulse_end_task_address); - nrfx_gppi_channel_endpoints_setup(ppi_chs[1], - period_end_event_address, - period_end_task_address); - nrfx_gppi_channels_enable(ppi_mask); + nrfx_gppi_ep_attach(ppi_chs[0], pulse_end_event_address); + nrfx_gppi_ep_attach(ppi_chs[0], pulse_end_task_address); + + nrfx_gppi_ep_attach(ppi_chs[1], period_end_event_address); + nrfx_gppi_ep_attach(ppi_chs[1], period_end_task_address); + + nrfx_gppi_channels_enable(src_d, data->ppi_ch_mask[channel]); /* start timer, hence PWM */ if (USE_RTC) { @@ -349,30 +347,39 @@ static int pwm_nrf_sw_init(const struct device *dev) struct pwm_data *data = dev->data; NRF_TIMER_Type *timer = pwm_config_timer(config); NRF_RTC_Type *rtc = pwm_config_rtc(config); + uint32_t src_d = nrfx_gppi_domain_id_get((USE_RTC ? (uint32_t)rtc : (uint32_t)timer)); for (uint32_t i = 0; i < config->map_size; i++) { - nrfx_err_t err; + uint32_t dst_d = nrfx_gppi_domain_id_get((uint32_t)config->gpiote[i]->p_reg); + int rv; /* Allocate resources. */ for (uint32_t j = 0; j < PPI_PER_CH; j++) { - err = nrfx_gppi_channel_alloc(&data->ppi_ch[i][j]); - if (err != NRFX_SUCCESS) { + int ch; + + rv = nrfx_gppi_domain_conn_alloc(src_d, dst_d, &data->ppi_h[i][j]); + if (rv < 0) { /* Do not free allocated resource. It is a fatal condition, * system requires reconfiguration. */ LOG_ERR("Failed to allocate PPI channel"); - return -ENOMEM; + return rv; } + /* Enable connection but at the end disable channel on the source domain. */ + nrfx_gppi_conn_enable(data->ppi_h[i][j]); + ch = nrfx_gppi_domain_channel_get(data->ppi_h[i][j], src_d); + __ASSERT_NO_MSG(ch >= 0); + data->ppi_ch_mask[i] |= BIT(ch); } + nrfx_gppi_channels_disable(src_d, data->ppi_ch_mask[i]); - err = nrfx_gpiote_channel_alloc(&config->gpiote[i], - &data->gpiote_ch[i]); - if (err != NRFX_SUCCESS) { + rv = nrfx_gpiote_channel_alloc(config->gpiote[i], &data->gpiote_ch[i]); + if (rv < 0) { /* Do not free allocated resource. It is a fatal condition, * system requires reconfiguration. */ LOG_ERR("Failed to allocate GPIOTE channel"); - return -ENOMEM; + return rv; } /* Set initial state of the output pins. */ @@ -410,7 +417,7 @@ static int pwm_nrf_sw_init(const struct device *dev) ? BIT(_idx) : 0) | #define GPIOTE_AND_COMMA(_node_id, _prop, _idx) \ - NRFX_GPIOTE_INSTANCE(NRF_DT_GPIOTE_INST_BY_IDX(_node_id, _prop, _idx)), + &GPIOTE_NRFX_INST_BY_NODE(NRF_DT_GPIOTE_NODE_BY_IDX(_node_id, _prop, _idx)) static const struct pwm_config pwm_nrf_sw_0_config = { COND_CODE_1(USE_RTC, (.rtc), (.timer)) = GENERATOR_ADDR, diff --git a/drivers/pwm/pwm_nrfx.c b/drivers/pwm/pwm_nrfx.c index 8565fd1187ac..9246923804c5 100644 --- a/drivers/pwm/pwm_nrfx.c +++ b/drivers/pwm/pwm_nrfx.c @@ -3,6 +3,9 @@ * * SPDX-License-Identifier: Apache-2.0 */ + +#define DT_DRV_COMPAT nordic_nrf_pwm + #include #include #include @@ -19,24 +22,7 @@ LOG_MODULE_REGISTER(pwm_nrfx, CONFIG_PWM_LOG_LEVEL); -/* NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED can be undefined or defined - * to 0 or 1, hence the use of #if IS_ENABLED(). - */ -#if IS_ENABLED(NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED) -#define ANOMALY_109_EGU_IRQ_CONNECT(idx) _EGU_IRQ_CONNECT(idx) -#define _EGU_IRQ_CONNECT(idx) \ - extern void nrfx_egu_##idx##_irq_handler(void); \ - IRQ_CONNECT(DT_IRQN(DT_NODELABEL(egu##idx)), \ - DT_IRQ(DT_NODELABEL(egu##idx), priority), \ - nrfx_isr, nrfx_egu_##idx##_irq_handler, 0) -#else -#define ANOMALY_109_EGU_IRQ_CONNECT(idx) -#endif - -#define PWM(dev_idx) DT_NODELABEL(pwm##dev_idx) -#define PWM_PROP(dev_idx, prop) DT_PROP(PWM(dev_idx), prop) -#define PWM_HAS_PROP(idx, prop) DT_NODE_HAS_PROP(PWM(idx), prop) -#define PWM_NRFX_IS_FAST(idx) NRF_DT_IS_FAST(PWM(idx)) +#define PWM_NRFX_IS_FAST(inst) NRF_DT_IS_FAST(DT_DRV_INST(inst)) #if NRF_DT_INST_ANY_IS_FAST #define PWM_NRFX_FAST_PRESENT 1 @@ -57,7 +43,6 @@ BUILD_ASSERT(!IS_ENABLED(CONFIG_PM_DEVICE_SYSTEM_MANAGED)); (compare_value | (inverted ? 0 : PWM_NRFX_CH_POLARITY_MASK)) struct pwm_nrfx_config { - nrfx_pwm_t pwm; nrfx_pwm_config_t initial_config; nrf_pwm_sequence_t seq; const struct pinctrl_dev_config *pcfg; @@ -72,6 +57,7 @@ struct pwm_nrfx_config { }; struct pwm_nrfx_data { + nrfx_pwm_t pwm; uint32_t period_cycles; /* Bit mask indicating channels that need the PWM generation. */ uint8_t pwm_needed; @@ -81,6 +67,42 @@ struct pwm_nrfx_data { bool clock_requested; #endif }; + +#if NRF_ERRATA_STATIC_CHECK(52, 109) +/* Forward-declare pwm_nrfx__data structs to be able to access nrfx_pwm_t needed for the + * workaround. + */ +#define _PWM_DATA_STRUCT_NAME_GET(inst) pwm_nrfx_##inst##_data +#define _PWM_DATA_STRUCT_DECLARE(inst) static struct pwm_nrfx_data _PWM_DATA_STRUCT_NAME_GET(inst); +DT_INST_FOREACH_STATUS_OKAY(_PWM_DATA_STRUCT_DECLARE); + +/* Create an array of pointers to all active PWM instances to loop over them in an EGU interrupt + * handler. + */ +#define _PWM_DATA_STRUCT_PWM_PTR_COMMA_GET(inst) &_PWM_DATA_STRUCT_NAME_GET(inst).pwm, +static nrfx_pwm_t *pwm_instances[] = { + DT_INST_FOREACH_STATUS_OKAY(_PWM_DATA_STRUCT_PWM_PTR_COMMA_GET) +}; + +/* Define an interrupt handler for the EGU instance used by the workaround which calls + * nrfx_pwm_nrf52_anomaly_109_handler for all active PWM instances. + */ +void anomaly_109_egu_handler(void) +{ + for (int i = 0; i < ARRAY_SIZE(pwm_instances); i++) { + nrfx_pwm_nrf52_anomaly_109_handler(pwm_instances[i]); + } +} + +#define ANOMALY_109_EGU_IRQ_CONNECT(idx) _EGU_IRQ_CONNECT(idx) +#define _EGU_IRQ_CONNECT(idx) \ + IRQ_CONNECT(DT_IRQN(DT_NODELABEL(egu##idx)), \ + DT_IRQ(DT_NODELABEL(egu##idx), priority), \ + anomaly_109_egu_handler, 0, 0) +#else +#define ANOMALY_109_EGU_IRQ_CONNECT(idx) +#endif + /* Ensure the pwm_needed bit mask can accommodate all available channels. */ #if (NRF_PWM_CHANNEL_COUNT > 8) #error "Current implementation supports maximum 8 channels." @@ -105,9 +127,9 @@ static uint16_t *seq_values_ptr_get(const struct device *dev) return (uint16_t *)config->seq.values.p_raw; } -static void pwm_handler(nrfx_pwm_evt_type_t event_type, void *p_context) +static void pwm_handler(nrfx_pwm_event_t event, void *p_context) { - ARG_UNUSED(event_type); + ARG_UNUSED(event); ARG_UNUSED(p_context); } @@ -145,7 +167,7 @@ static bool pwm_period_check_and_set(const struct device *dev, data->period_cycles = period_cycles; data->prescaler = prescaler; - nrf_pwm_configure(config->pwm.p_reg, + nrf_pwm_configure(data->pwm.p_reg, data->prescaler, config->initial_config.count_mode, (uint16_t)countertop); @@ -160,10 +182,9 @@ static bool pwm_period_check_and_set(const struct device *dev, return false; } -static bool channel_psel_get(uint32_t channel, uint32_t *psel, - const struct pwm_nrfx_config *config) +static bool channel_psel_get(uint32_t channel, uint32_t *psel, struct pwm_nrfx_data *data) { - *psel = nrf_pwm_pin_get(config->pwm.p_reg, (uint8_t)channel); + *psel = nrf_pwm_pin_get(data->pwm.p_reg, (uint8_t)channel); return (((*psel & PWM_PSEL_OUT_CONNECT_Msk) >> PWM_PSEL_OUT_CONNECT_Pos) == PWM_PSEL_OUT_CONNECT_Connected); @@ -171,15 +192,15 @@ static bool channel_psel_get(uint32_t channel, uint32_t *psel, static int stop_pwm(const struct device *dev) { - const struct pwm_nrfx_config *config = dev->config; + struct pwm_nrfx_data *data = dev->data; /* Don't wait here for the peripheral to actually stop. Instead, - * ensure it is stopped before starting the next playback. - */ - nrfx_pwm_stop(&config->pwm, false); + * ensure it is stopped before starting the next playback. + */ + nrfx_pwm_stop(&data->pwm, false); #if PWM_NRFX_USE_CLOCK_CONTROL - struct pwm_nrfx_data *data = dev->data; + const struct pwm_nrfx_config *config = dev->config; if (data->clock_requested) { int ret = nrf_clock_control_release(config->clk_dev, &config->clk_spec); @@ -268,7 +289,7 @@ static int pwm_nrfx_set_cycles(const struct device *dev, uint32_t channel, if (!needs_pwm) { uint32_t psel; - if (channel_psel_get(channel, &psel, config)) { + if (channel_psel_get(channel, &psel, data)) { uint32_t out_level = (pulse_cycles == 0) ? 0 : 1; if (inverted) { @@ -323,7 +344,7 @@ static int pwm_nrfx_set_cycles(const struct device *dev, uint32_t channel, * and till that moment, it ignores any start requests, * so ensure here that it is stopped. */ - while (!nrfx_pwm_stopped_check(&config->pwm)) { + while (!nrfx_pwm_stopped_check(&data->pwm)) { } } @@ -346,7 +367,7 @@ static int pwm_nrfx_set_cycles(const struct device *dev, uint32_t channel, data->clock_requested = true; } #endif - nrfx_pwm_simple_playback(&config->pwm, &config->seq, 1, + nrfx_pwm_simple_playback(&data->pwm, &config->seq, 1, NRFX_PWM_FLAG_NO_EVT_FINISHED); } @@ -371,6 +392,8 @@ static DEVICE_API(pwm, pwm_nrfx_drv_api_funcs) = { static int pwm_resume(const struct device *dev) { const struct pwm_nrfx_config *config = dev->config; + struct pwm_nrfx_data *data = dev->data; + uint8_t initially_inverted = 0; (void)pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT); @@ -378,7 +401,7 @@ static int pwm_resume(const struct device *dev) for (size_t i = 0; i < NRF_PWM_CHANNEL_COUNT; i++) { uint32_t psel; - if (channel_psel_get(i, &psel, config)) { + if (channel_psel_get(i, &psel, data)) { /* Mark channels as inverted according to what initial * state of their outputs has been set by pinctrl (high * idle state means that the channel is inverted). @@ -400,6 +423,7 @@ static int pwm_resume(const struct device *dev) static int pwm_suspend(const struct device *dev) { const struct pwm_nrfx_config *config = dev->config; + struct pwm_nrfx_data *data = dev->data; int ret = stop_pwm(dev); @@ -408,7 +432,7 @@ static int pwm_suspend(const struct device *dev) return ret; } - while (!nrfx_pwm_stopped_check(&config->pwm)) { + while (!nrfx_pwm_stopped_check(&data->pwm)) { } memset(dev->data, 0, sizeof(struct pwm_nrfx_data)); @@ -434,7 +458,9 @@ static int pwm_nrfx_pm_action(const struct device *dev, static int pwm_nrfx_init(const struct device *dev) { const struct pwm_nrfx_config *config = dev->config; - nrfx_err_t err; + struct pwm_nrfx_data *data = dev->data; + + int err; ANOMALY_109_EGU_IRQ_CONNECT(NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE); @@ -442,26 +468,26 @@ static int pwm_nrfx_init(const struct device *dev) (void)pinctrl_apply_state(config->pcfg, PINCTRL_STATE_SLEEP); } - err = nrfx_pwm_init(&config->pwm, &config->initial_config, pwm_handler, dev->data); - if (err != NRFX_SUCCESS) { + err = nrfx_pwm_init(&data->pwm, &config->initial_config, pwm_handler, dev->data); + if (err < 0) { LOG_ERR("Failed to initialize device: %s", dev->name); - return -EBUSY; + return err; } return pm_device_driver_init(dev, pwm_nrfx_pm_action); } -#define PWM_MEM_REGION(idx) DT_PHANDLE(PWM(idx), memory_regions) +#define PWM_MEM_REGION(inst) DT_PHANDLE(DT_DRV_INST(inst), memory_regions) -#define PWM_MEMORY_SECTION(idx) \ - COND_CODE_1(PWM_HAS_PROP(idx, memory_regions), \ +#define PWM_MEMORY_SECTION(inst) \ + COND_CODE_1(DT_NODE_HAS_PROP(inst, memory_regions), \ (__attribute__((__section__(LINKER_DT_NODE_REGION_NAME( \ - PWM_MEM_REGION(idx)))))), \ + PWM_MEM_REGION(inst)))))), \ ()) -#define PWM_GET_MEM_ATTR(idx) \ - COND_CODE_1(PWM_HAS_PROP(idx, memory_regions), \ - (DT_PROP_OR(PWM_MEM_REGION(idx), zephyr_memory_attr, 0)), (0)) +#define PWM_GET_MEM_ATTR(inst) \ + COND_CODE_1(DT_NODE_HAS_PROP(inst, memory_regions), \ + (DT_PROP_OR(PWM_MEM_REGION(inst), zephyr_memory_attr, 0)), (0)) /* Fast instances depend on the global HSFLL clock controller (as they need * to request the highest frequency from it to operate correctly), so they @@ -470,66 +496,65 @@ static int pwm_nrfx_init(const struct device *dev) */ #if defined(CONFIG_CLOCK_CONTROL_NRF_HSFLL_GLOBAL_INIT_PRIORITY) && \ CONFIG_PWM_INIT_PRIORITY < CONFIG_CLOCK_CONTROL_NRF_HSFLL_GLOBAL_INIT_PRIORITY -#define PWM_INIT_PRIORITY(idx) \ - COND_CODE_1(PWM_NRFX_IS_FAST(idx), \ +#define PWM_INIT_PRIORITY(inst) \ + COND_CODE_1(PWM_NRFX_IS_FAST(inst), \ (UTIL_INC(CONFIG_CLOCK_CONTROL_NRF_HSFLL_GLOBAL_INIT_PRIORITY)), \ (CONFIG_PWM_INIT_PRIORITY)) #else -#define PWM_INIT_PRIORITY(idx) CONFIG_PWM_INIT_PRIORITY +#define PWM_INIT_PRIORITY(inst) CONFIG_PWM_INIT_PRIORITY #endif -#define PWM_NRFX_DEVICE(idx) \ - NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(PWM(idx)); \ - NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(PWM(idx)); \ - static struct pwm_nrfx_data pwm_nrfx_##idx##_data; \ - static uint16_t pwm_##idx##_seq_values[NRF_PWM_CHANNEL_COUNT] \ - PWM_MEMORY_SECTION(idx); \ - PINCTRL_DT_DEFINE(PWM(idx)); \ - static const struct pwm_nrfx_config pwm_nrfx_##idx##_config = { \ - .pwm = NRFX_PWM_INSTANCE(idx), \ - .initial_config = { \ - .skip_gpio_cfg = true, \ - .skip_psel_cfg = true, \ - .base_clock = NRF_PWM_CLK_1MHz, \ - .count_mode = (PWM_PROP(idx, center_aligned) \ - ? NRF_PWM_MODE_UP_AND_DOWN \ - : NRF_PWM_MODE_UP), \ - .top_value = 1000, \ - .load_mode = NRF_PWM_LOAD_INDIVIDUAL, \ - .step_mode = NRF_PWM_STEP_TRIGGERED, \ - }, \ - .seq.values.p_raw = pwm_##idx##_seq_values, \ - .seq.length = NRF_PWM_CHANNEL_COUNT, \ - .pcfg = PINCTRL_DT_DEV_CONFIG_GET(PWM(idx)), \ - .clock_freq = COND_CODE_1(DT_CLOCKS_HAS_IDX(PWM(idx), 0), \ - (DT_PROP(DT_CLOCKS_CTLR(PWM(idx)), clock_frequency)), \ - (16ul * 1000ul * 1000ul)), \ - IF_ENABLED(CONFIG_DCACHE, \ - (.mem_attr = PWM_GET_MEM_ATTR(idx),)) \ - IF_ENABLED(PWM_NRFX_USE_CLOCK_CONTROL, \ - (.clk_dev = PWM_NRFX_IS_FAST(idx) \ - ? DEVICE_DT_GET(DT_CLOCKS_CTLR(PWM(idx))) \ - : NULL, \ - .clk_spec = { \ - .frequency = \ - NRF_PERIPH_GET_FREQUENCY(PWM(idx)), \ - },)) \ - }; \ - static int pwm_nrfx_init##idx(const struct device *dev) \ - { \ - IRQ_CONNECT(DT_IRQN(PWM(idx)), DT_IRQ(PWM(idx), priority), \ - nrfx_isr, nrfx_pwm_##idx##_irq_handler, 0); \ - return pwm_nrfx_init(dev); \ - }; \ - PM_DEVICE_DT_DEFINE(PWM(idx), pwm_nrfx_pm_action); \ - DEVICE_DT_DEFINE(PWM(idx), \ - pwm_nrfx_init##idx, PM_DEVICE_DT_GET(PWM(idx)), \ - &pwm_nrfx_##idx##_data, \ - &pwm_nrfx_##idx##_config, \ - POST_KERNEL, PWM_INIT_PRIORITY(idx), \ - &pwm_nrfx_drv_api_funcs) - -#define COND_PWM_NRFX_DEVICE(unused, prefix, i, _) \ - IF_ENABLED(CONFIG_HAS_HW_NRF_PWM##prefix##i, (PWM_NRFX_DEVICE(prefix##i);)) - -NRFX_FOREACH_PRESENT(PWM, COND_PWM_NRFX_DEVICE, (), (), _) +#define PWM_NRFX_DEFINE(inst) \ + NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(DT_DRV_INST(inst)); \ + NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(DT_DRV_INST(inst)); \ + static struct pwm_nrfx_data pwm_nrfx_##inst##_data = { \ + .pwm = NRFX_PWM_INSTANCE(DT_INST_REG_ADDR(inst)), \ + }; \ + static uint16_t pwm_##inst##_seq_values[NRF_PWM_CHANNEL_COUNT] \ + PWM_MEMORY_SECTION(inst); \ + PINCTRL_DT_INST_DEFINE(inst); \ + static const struct pwm_nrfx_config pwm_nrfx_##inst##_config = { \ + .initial_config = { \ + .skip_gpio_cfg = true, \ + .skip_psel_cfg = true, \ + .base_clock = NRF_PWM_CLK_1MHz, \ + .count_mode = (DT_INST_PROP(inst, center_aligned) \ + ? NRF_PWM_MODE_UP_AND_DOWN \ + : NRF_PWM_MODE_UP), \ + .top_value = 1000, \ + .load_mode = NRF_PWM_LOAD_INDIVIDUAL, \ + .step_mode = NRF_PWM_STEP_TRIGGERED, \ + }, \ + .seq.values.p_raw = pwm_##inst##_seq_values, \ + .seq.length = NRF_PWM_CHANNEL_COUNT, \ + .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \ + .clock_freq = COND_CODE_1(DT_INST_CLOCKS_HAS_IDX(inst, 0), \ + (DT_PROP(DT_INST_CLOCKS_CTLR(inst), clock_frequency)), \ + (16ul * 1000ul * 1000ul)), \ + IF_ENABLED(CONFIG_DCACHE, \ + (.mem_attr = PWM_GET_MEM_ATTR(inst),)) \ + IF_ENABLED(PWM_NRFX_USE_CLOCK_CONTROL, \ + (.clk_dev = PWM_NRFX_IS_FAST(inst) \ + ? DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(inst)) \ + : NULL, \ + .clk_spec = { \ + .frequency = \ + NRF_PERIPH_GET_FREQUENCY(DT_DRV_INST(inst)), \ + },)) \ + }; \ + static int pwm_nrfx_init##inst(const struct device *dev) \ + { \ + IRQ_CONNECT(DT_INST_IRQN(inst), DT_INST_IRQ(inst, priority), \ + nrfx_pwm_irq_handler, &pwm_nrfx_##inst##_data.pwm, 0); \ + return pwm_nrfx_init(dev); \ + }; \ + PM_DEVICE_DT_INST_DEFINE(inst, pwm_nrfx_pm_action); \ + DEVICE_DT_INST_DEINIT_DEFINE(inst, \ + pwm_nrfx_init##inst, NULL, \ + PM_DEVICE_DT_INST_GET(inst), \ + &pwm_nrfx_##inst##_data, \ + &pwm_nrfx_##inst##_config, \ + POST_KERNEL, PWM_INIT_PRIORITY(inst), \ + &pwm_nrfx_drv_api_funcs) + +DT_INST_FOREACH_STATUS_OKAY(PWM_NRFX_DEFINE) diff --git a/drivers/sensor/nordic/qdec_nrfx/Kconfig b/drivers/sensor/nordic/qdec_nrfx/Kconfig index 71c3ab1d5b0d..a69c234caac9 100644 --- a/drivers/sensor/nordic/qdec_nrfx/Kconfig +++ b/drivers/sensor/nordic/qdec_nrfx/Kconfig @@ -5,12 +5,7 @@ config QDEC_NRFX bool "Nordic QDEC nrfx driver" default y depends on DT_HAS_NORDIC_NRF_QDEC_ENABLED - select NRFX_QDEC0 if HAS_HW_NRF_QDEC0 - select NRFX_QDEC1 if HAS_HW_NRF_QDEC1 - select NRFX_QDEC20 if HAS_HW_NRF_QDEC20 - select NRFX_QDEC21 if HAS_HW_NRF_QDEC21 - select NRFX_QDEC130 if HAS_HW_NRF_QDEC130 - select NRFX_QDEC131 if HAS_HW_NRF_QDEC131 + select NRFX_QDEC select PINCTRL help Enable support for nrfx QDEC driver for nRF MCU series. diff --git a/drivers/sensor/nordic/qdec_nrfx/qdec_nrfx.c b/drivers/sensor/nordic/qdec_nrfx/qdec_nrfx.c index 9ecfb5c122da..378ce64f497a 100644 --- a/drivers/sensor/nordic/qdec_nrfx/qdec_nrfx.c +++ b/drivers/sensor/nordic/qdec_nrfx/qdec_nrfx.c @@ -43,6 +43,7 @@ BUILD_ASSERT(NRF_QDEC_SAMPLEPER_16384US == SAMPLEPER_16384US, "Different SAMPLEPER register values in devicetree binding and nRF HAL"); struct qdec_nrfx_data { + nrfx_qdec_t qdec; int32_t fetched_acc; int32_t acc; bool overflow; @@ -51,7 +52,6 @@ struct qdec_nrfx_data { }; struct qdec_nrfx_config { - nrfx_qdec_t qdec; nrfx_qdec_config_t config; void (*irq_connect)(void); const struct pinctrl_dev_config *pcfg; @@ -78,7 +78,6 @@ static void accumulate(struct qdec_nrfx_data *data, int32_t acc) static int qdec_nrfx_sample_fetch(const struct device *dev, enum sensor_channel chan) { - const struct qdec_nrfx_config *config = dev->config; struct qdec_nrfx_data *data = dev->data; int32_t acc; uint32_t accdbl; @@ -87,7 +86,7 @@ static int qdec_nrfx_sample_fetch(const struct device *dev, return -ENOTSUP; } - nrfx_qdec_accumulators_read(&config->qdec, &acc, &accdbl); + nrfx_qdec_accumulators_read(&data->qdec, &acc, &accdbl); accumulate(data, acc); @@ -212,8 +211,9 @@ static DEVICE_API(sensor, qdec_nrfx_driver_api) = { static void qdec_pm_suspend(const struct device *dev) { const struct qdec_nrfx_config *config = dev->config; + struct qdec_nrfx_data *dev_data = dev->data; - nrfx_qdec_disable(&config->qdec); + nrfx_qdec_disable(&dev_data->qdec); qdec_nrfx_gpio_ctrl(dev, false); (void)pinctrl_apply_state(config->pcfg, PINCTRL_STATE_SLEEP); @@ -222,10 +222,11 @@ static void qdec_pm_suspend(const struct device *dev) static void qdec_pm_resume(const struct device *dev) { const struct qdec_nrfx_config *config = dev->config; + struct qdec_nrfx_data *dev_data = dev->data; (void)pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT); qdec_nrfx_gpio_ctrl(dev, true); - nrfx_qdec_enable(&config->qdec); + nrfx_qdec_enable(&dev_data->qdec); } static int qdec_nrfx_pm_action(const struct device *dev, enum pm_device_action action) @@ -251,13 +252,15 @@ static int qdec_nrfx_pm_action(const struct device *dev, enum pm_device_action a static int qdec_nrfx_init(const struct device *dev) { const struct qdec_nrfx_config *config = dev->config; - nrfx_err_t nerr; + struct qdec_nrfx_data *dev_data = dev->data; + int nerr; config->irq_connect(); - nerr = nrfx_qdec_init(&config->qdec, &config->config, qdec_nrfx_event_handler, (void *)dev); - if (nerr != NRFX_SUCCESS) { - return (nerr == NRFX_ERROR_INVALID_STATE) ? -EBUSY : -EFAULT; + nerr = nrfx_qdec_init(&dev_data->qdec, &config->config, qdec_nrfx_event_handler, + (void *)dev); + if (nerr != 0) { + return -EALREADY; } /* End up in suspend state. */ @@ -269,68 +272,63 @@ static int qdec_nrfx_init(const struct device *dev) return pm_device_driver_init(dev, qdec_nrfx_pm_action); } -#define QDEC(idx) DT_NODELABEL(qdec##idx) -#define QDEC_PROP(idx, prop) DT_PROP(QDEC(idx), prop) - -#define SENSOR_NRFX_QDEC_DEVICE(idx) \ - NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(QDEC(idx)); \ - BUILD_ASSERT(QDEC_PROP(idx, steps) > 0, \ - "Wrong QDEC"#idx" steps setting in dts. Only positive number valid"); \ - BUILD_ASSERT(QDEC_PROP(idx, steps) <= 2048, \ - "Wrong QDEC"#idx" steps setting in dts. Overflow possible"); \ - static void irq_connect##idx(void) \ - { \ - IRQ_CONNECT(DT_IRQN(QDEC(idx)), DT_IRQ(QDEC(idx), priority), \ - nrfx_isr, nrfx_qdec_##idx##_irq_handler, 0); \ - } \ - static struct qdec_nrfx_data qdec_##idx##_data; \ - PINCTRL_DT_DEFINE(QDEC(idx)); \ - static struct qdec_nrfx_config qdec_##idx##_config = { \ - .qdec = NRFX_QDEC_INSTANCE(idx), \ - .config = { \ - .reportper = NRF_QDEC_REPORTPER_40, \ - .sampleper = DT_STRING_TOKEN(QDEC(idx), nordic_period), \ - .skip_gpio_cfg = true, \ - .skip_psel_cfg = true, \ - .ledpre = QDEC_PROP(idx, led_pre), \ - .ledpol = NRF_QDEC_LEPOL_ACTIVE_HIGH, \ - .reportper_inten = true, \ - }, \ - .irq_connect = irq_connect##idx, \ - .pcfg = PINCTRL_DT_DEV_CONFIG_GET(QDEC(idx)), \ - .enable_pin = DT_PROP_OR(QDEC(idx), enable_pin, NRF_QDEC_PIN_NOT_CONNECTED), \ - .steps = QDEC_PROP(idx, steps), \ - }; \ - PM_DEVICE_DT_DEFINE(QDEC(idx), qdec_nrfx_pm_action, PM_DEVICE_ISR_SAFE); \ - SENSOR_DEVICE_DT_DEFINE(QDEC(idx), \ - qdec_nrfx_init, \ - PM_DEVICE_DT_GET(QDEC(idx)), \ - &qdec_##idx##_data, \ - &qdec_##idx##_config, \ - POST_KERNEL, \ - CONFIG_SENSOR_INIT_PRIORITY, \ +/* Macro determines PM actions interrupt safety level. + * + * Requesting/releasing QDEC device may be ISR safe, but it cannot be reliably known whether + * managing its power domain is. It is then assumed that if power domains are used, device is + * no longer ISR safe. This macro let's us check if we will be requesting/releasing + * power domains and determines PM device ISR safety value. + */ +#define QDEC_PM_ISR_SAFE(inst) \ + COND_CODE_1( \ + UTIL_AND( \ + IS_ENABLED(CONFIG_PM_DEVICE_POWER_DOMAIN), \ + UTIL_AND(DT_INST_NODE_HAS_PROP(inst, power_domains), \ + DT_NODE_HAS_STATUS_OKAY(DT_INST_PHANDLE(inst, power_domains))) \ + ), \ + (0), \ + (PM_DEVICE_ISR_SAFE) \ + ) + +#define SENSOR_NRFX_QDEC_DEVICE(inst) \ + NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(DT_DRV_INST(inst)); \ + BUILD_ASSERT(DT_INST_PROP(inst, steps) > 0, \ + "Wrong QDEC"#inst" steps setting in dts. Only positive number valid"); \ + BUILD_ASSERT(DT_INST_PROP(inst, steps) <= 2048, \ + "Wrong QDEC"#inst" steps setting in dts. Overflow possible"); \ + static struct qdec_nrfx_data qdec_##inst##_data = { \ + .qdec = NRFX_QDEC_INSTANCE(DT_INST_REG_ADDR(inst)), \ + }; \ + static void irq_connect##inst(void) \ + { \ + IRQ_CONNECT(DT_INST_IRQN(inst), DT_INST_IRQ(inst, priority), \ + nrfx_qdec_irq_handler, &qdec_##inst##_data.qdec, 0); \ + } \ + PINCTRL_DT_DEFINE(DT_DRV_INST(inst)); \ + static struct qdec_nrfx_config qdec_##inst##_config = { \ + .config = { \ + .reportper = NRF_QDEC_REPORTPER_40, \ + .sampleper = DT_STRING_TOKEN(DT_DRV_INST(inst), nordic_period), \ + .skip_gpio_cfg = true, \ + .skip_psel_cfg = true, \ + .ledpre = DT_INST_PROP(inst, led_pre), \ + .ledpol = NRF_QDEC_LEPOL_ACTIVE_HIGH, \ + .reportper_inten = true, \ + }, \ + .irq_connect = irq_connect##inst, \ + .pcfg = PINCTRL_DT_DEV_CONFIG_GET(DT_DRV_INST(inst)), \ + .enable_pin = DT_PROP_OR( \ + DT_DRV_INST(inst), enable_pin, NRF_QDEC_PIN_NOT_CONNECTED), \ + .steps = DT_INST_PROP(inst, steps), \ + }; \ + PM_DEVICE_DT_INST_DEFINE(inst, qdec_nrfx_pm_action, QDEC_PM_ISR_SAFE(inst)); \ + SENSOR_DEVICE_DT_DEFINE(DT_DRV_INST(inst), \ + qdec_nrfx_init, \ + PM_DEVICE_DT_INST_GET(inst), \ + &qdec_##inst##_data, \ + &qdec_##inst##_config, \ + POST_KERNEL, \ + CONFIG_SENSOR_INIT_PRIORITY, \ &qdec_nrfx_driver_api) -#ifdef CONFIG_HAS_HW_NRF_QDEC0 -SENSOR_NRFX_QDEC_DEVICE(0); -#endif - -#ifdef CONFIG_HAS_HW_NRF_QDEC1 -SENSOR_NRFX_QDEC_DEVICE(1); -#endif - -#ifdef CONFIG_HAS_HW_NRF_QDEC20 -SENSOR_NRFX_QDEC_DEVICE(20); -#endif - -#ifdef CONFIG_HAS_HW_NRF_QDEC21 -SENSOR_NRFX_QDEC_DEVICE(21); -#endif - -#ifdef CONFIG_HAS_HW_NRF_QDEC130 -SENSOR_NRFX_QDEC_DEVICE(130); -#endif - -#ifdef CONFIG_HAS_HW_NRF_QDEC131 -SENSOR_NRFX_QDEC_DEVICE(131); -#endif +DT_INST_FOREACH_STATUS_OKAY(SENSOR_NRFX_QDEC_DEVICE) diff --git a/drivers/serial/Kconfig.nrfx b/drivers/serial/Kconfig.nrfx index a39f882f644a..feb8d2c32471 100644 --- a/drivers/serial/Kconfig.nrfx +++ b/drivers/serial/Kconfig.nrfx @@ -213,37 +213,25 @@ nrfx_uart_num = 137 rsource "Kconfig.nrfx_uart_instance" endif -config NRFX_TIMER0 +config NRFX_TIMER default y depends on UART_0_NRF_HW_ASYNC_TIMER = 0 \ || UART_1_NRF_HW_ASYNC_TIMER = 0 \ || UART_2_NRF_HW_ASYNC_TIMER = 0 \ - || UART_3_NRF_HW_ASYNC_TIMER = 0 - -config NRFX_TIMER1 - default y - depends on UART_0_NRF_HW_ASYNC_TIMER = 1 \ + || UART_3_NRF_HW_ASYNC_TIMER = 0 \ + || UART_0_NRF_HW_ASYNC_TIMER = 1 \ || UART_1_NRF_HW_ASYNC_TIMER = 1 \ || UART_2_NRF_HW_ASYNC_TIMER = 1 \ - || UART_3_NRF_HW_ASYNC_TIMER = 1 - -config NRFX_TIMER2 - default y - depends on UART_0_NRF_HW_ASYNC_TIMER = 2 \ + || UART_3_NRF_HW_ASYNC_TIMER = 1 \ + || UART_0_NRF_HW_ASYNC_TIMER = 2 \ || UART_1_NRF_HW_ASYNC_TIMER = 2 \ || UART_2_NRF_HW_ASYNC_TIMER = 2 \ - || UART_3_NRF_HW_ASYNC_TIMER = 2 - -config NRFX_TIMER3 - default y - depends on UART_0_NRF_HW_ASYNC_TIMER = 3 \ + || UART_3_NRF_HW_ASYNC_TIMER = 2 \ + || UART_0_NRF_HW_ASYNC_TIMER = 3 \ || UART_1_NRF_HW_ASYNC_TIMER = 3 \ || UART_2_NRF_HW_ASYNC_TIMER = 3 \ - || UART_3_NRF_HW_ASYNC_TIMER = 3 - -config NRFX_TIMER4 - default y - depends on UART_0_NRF_HW_ASYNC_TIMER = 4 \ + || UART_3_NRF_HW_ASYNC_TIMER = 3 \ + || UART_0_NRF_HW_ASYNC_TIMER = 4 \ || UART_1_NRF_HW_ASYNC_TIMER = 4 \ || UART_2_NRF_HW_ASYNC_TIMER = 4 \ || UART_3_NRF_HW_ASYNC_TIMER = 4 diff --git a/drivers/serial/uart_nrfx_uarte.c b/drivers/serial/uart_nrfx_uarte.c index 00489e7d8856..ef55bd550ce9 100644 --- a/drivers/serial/uart_nrfx_uarte.c +++ b/drivers/serial/uart_nrfx_uarte.c @@ -229,8 +229,8 @@ struct uarte_async_rx_cbwt { uint8_t *anomaly_byte_dst; uint8_t anomaly_byte; #endif + nrfx_gppi_handle_t ppi_h; uint8_t bounce_idx; - uint8_t ppi_ch; bool in_irq; bool discard_fifo; }; @@ -259,7 +259,7 @@ struct uarte_async_rx { int32_t timeout_slab; /* rx_timeout divided by RX_TIMEOUT_DIV */ int32_t timeout_left; /* Current time left until user callback */ union { - uint8_t ppi; + nrfx_gppi_handle_t ppi; uint32_t cnt; } cnt; /* Flag to ensure that RX timeout won't be executed during ENDRX ISR */ @@ -306,11 +306,12 @@ struct uarte_nrfx_data { #endif #ifdef UARTE_ANY_ASYNC struct uarte_async_cb *async; + nrfx_timer_t timer; #endif atomic_val_t poll_out_lock; atomic_t flags; #ifdef UARTE_ENHANCED_POLL_OUT - uint8_t ppi_ch_endtx; + nrfx_gppi_handle_t ppi_h_endtx; #endif }; @@ -448,7 +449,6 @@ struct uarte_nrfx_config { size_t bounce_buf_swap_len; struct uarte_async_rx_cbwt *cbwt_data; #endif - nrfx_timer_t timer; uint8_t *tx_cache; uint8_t *rx_flush_buf; #endif @@ -521,7 +521,7 @@ static void uarte_disable_locked(const struct device *dev, uint32_t dis_mask) #if defined(UARTE_ANY_ASYNC) && !defined(CONFIG_UART_NRFX_UARTE_ENHANCED_RX) if (data->async && HW_RX_COUNTING_ENABLED(config)) { - nrfx_timer_disable(&config->timer); + nrfx_timer_disable(&data->timer); /* Timer/counter value is reset when disabled. */ data->async->rx.total_byte_cnt = 0; data->async->rx.total_user_byte_cnt = 0; @@ -694,7 +694,7 @@ static int uarte_nrfx_configure(const struct device *dev, struct uarte_nrfx_data *data = dev->data; nrf_uarte_config_t uarte_cfg; -#if defined(UARTE_CONFIG_STOP_Msk) +#if NRF_UARTE_HAS_STOP_MODES switch (cfg->stop_bits) { case UART_CFG_STOP_BITS_1: uarte_cfg.stop = NRF_UARTE_STOP_ONE; @@ -726,7 +726,7 @@ static int uarte_nrfx_configure(const struct device *dev, return -ENOTSUP; } -#if defined(UARTE_CONFIG_PARITYTYPE_Msk) +#if NRF_UARTE_HAS_PARITY_TYPES uarte_cfg.paritytype = NRF_UARTE_PARITYTYPE_EVEN; #endif switch (cfg->parity) { @@ -736,7 +736,7 @@ static int uarte_nrfx_configure(const struct device *dev, case UART_CFG_PARITY_EVEN: uarte_cfg.parity = NRF_UARTE_PARITY_INCLUDED; break; -#if defined(UARTE_CONFIG_PARITYTYPE_Msk) +#if NRF_UARTE_HAS_PARITY_TYPES case UART_CFG_PARITY_ODD: uarte_cfg.parity = NRF_UARTE_PARITY_INCLUDED; uarte_cfg.paritytype = NRF_UARTE_PARITYTYPE_ODD; @@ -878,7 +878,7 @@ static void uarte_periph_enable(const struct device *dev) #ifdef UARTE_ANY_ASYNC if (data->async) { if (HW_RX_COUNTING_ENABLED(config)) { - const nrfx_timer_t *timer = &config->timer; + nrfx_timer_t *timer = &data->timer; nrfx_timer_enable(timer); @@ -1067,13 +1067,13 @@ static int uarte_nrfx_rx_counting_init(const struct device *dev) if (HW_RX_COUNTING_ENABLED(cfg)) { nrfx_timer_config_t tmr_config = NRFX_TIMER_DEFAULT_CONFIG( - NRF_TIMER_BASE_FREQUENCY_GET(cfg->timer.p_reg)); + NRF_TIMER_BASE_FREQUENCY_GET(data->timer.p_reg)); uint32_t evt_addr = nrf_uarte_event_address_get(uarte, NRF_UARTE_EVENT_RXDRDY); - uint32_t tsk_addr = nrfx_timer_task_address_get(&cfg->timer, NRF_TIMER_TASK_COUNT); + uint32_t tsk_addr = nrfx_timer_task_address_get(&data->timer, NRF_TIMER_TASK_COUNT); tmr_config.mode = NRF_TIMER_MODE_COUNTER; tmr_config.bit_width = NRF_TIMER_BIT_WIDTH_32; - ret = nrfx_timer_init(&cfg->timer, + ret = nrfx_timer_init(&data->timer, &tmr_config, timer_handler); if (ret != NRFX_SUCCESS) { @@ -1081,17 +1081,16 @@ static int uarte_nrfx_rx_counting_init(const struct device *dev) return -EINVAL; } - nrfx_timer_clear(&cfg->timer); + nrfx_timer_clear(&data->timer); - ret = nrfx_gppi_channel_alloc(&data->async->rx.cnt.ppi); - if (ret != NRFX_SUCCESS) { + ret = nrfx_gppi_conn_alloc(evt_addr, tsk_addr, &data->async->rx.cnt.ppi); + if (ret < 0) { LOG_ERR("Failed to allocate PPI Channel"); - nrfx_timer_uninit(&cfg->timer); - return -EINVAL; + nrfx_timer_uninit(&data->timer); + return ret; } - nrfx_gppi_channel_endpoints_setup(data->async->rx.cnt.ppi, evt_addr, tsk_addr); - nrfx_gppi_channels_enable(BIT(data->async->rx.cnt.ppi)); + nrfx_gppi_conn_enable(data->async->rx.cnt.ppi); } else { nrf_uarte_int_enable(uarte, NRF_UARTE_INT_RXDRDY_MASK); } @@ -1722,18 +1721,17 @@ static int cbwt_uarte_async_init(const struct device *dev) NRF_UARTE_INT_RXTO_MASK; uint32_t evt = nrf_uarte_event_address_get(cfg->uarte_regs, NRF_UARTE_EVENT_RXDRDY); uint32_t tsk = nrf_timer_task_address_get(cfg->timer_regs, NRF_TIMER_TASK_COUNT); - nrfx_err_t ret; + int ret; nrf_timer_mode_set(cfg->timer_regs, NRF_TIMER_MODE_COUNTER); nrf_timer_bit_width_set(cfg->timer_regs, NRF_TIMER_BIT_WIDTH_32); - ret = nrfx_gppi_channel_alloc(&cbwt_data->ppi_ch); - if (ret != NRFX_SUCCESS) { - return -ENOMEM; + ret = nrfx_gppi_conn_alloc(evt, tsk, &cbwt_data->ppi_h); + if (ret < 0) { + return ret; } - nrfx_gppi_channel_endpoints_setup(cbwt_data->ppi_ch, evt, tsk); - nrfx_gppi_channels_enable(BIT(cbwt_data->ppi_ch)); + nrfx_gppi_conn_enable(cbwt_data->ppi_h); #ifdef CONFIG_UART_USE_RUNTIME_CONFIGURE cbwt_data->bounce_buf_swap_len = cfg->bounce_buf_swap_len; @@ -2258,7 +2256,7 @@ static void rx_timeout(struct k_timer *timer) NRF_UARTE_INT_ENDRX_MASK); if (HW_RX_COUNTING_ENABLED(cfg)) { - read = nrfx_timer_capture(&cfg->timer, 0); + read = nrfx_timer_capture(&data->timer, 0); } else { read = async_rx->cnt.cnt; } @@ -3142,18 +3140,17 @@ static DEVICE_API(uart, uart_nrfx_uarte_driver_api) = { static int endtx_stoptx_ppi_init(NRF_UARTE_Type *uarte, struct uarte_nrfx_data *data) { - nrfx_err_t ret; + int ret; - ret = nrfx_gppi_channel_alloc(&data->ppi_ch_endtx); - if (ret != NRFX_SUCCESS) { + ret = nrfx_gppi_conn_alloc( + nrf_uarte_event_address_get(uarte, NRF_UARTE_EVENT_ENDTX), + nrf_uarte_task_address_get(uarte, NRF_UARTE_TASK_STOPTX), &data->ppi_h_endtx); + if (ret < 0) { LOG_ERR("Failed to allocate PPI Channel"); - return -EIO; + return ret; } - nrfx_gppi_channel_endpoints_setup(data->ppi_ch_endtx, - nrf_uarte_event_address_get(uarte, NRF_UARTE_EVENT_ENDTX), - nrf_uarte_task_address_get(uarte, NRF_UARTE_TASK_STOPTX)); - nrfx_gppi_channels_enable(BIT(data->ppi_ch_endtx)); + nrfx_gppi_conn_enable(data->ppi_h_endtx); return 0; } @@ -3202,7 +3199,6 @@ static void uarte_pm_resume(const struct device *dev) const struct uarte_nrfx_config *cfg = dev->config; if (IS_ENABLED(CONFIG_PM_DEVICE_RUNTIME) || !LOW_POWER_ENABLED(cfg)) { - (void)pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT); uarte_periph_enable(dev); } } @@ -3242,7 +3238,7 @@ static void uarte_pm_suspend(const struct device *dev) #if !defined(CONFIG_UART_NRFX_UARTE_ENHANCED_RX) if (data->async && HW_RX_COUNTING_ENABLED(cfg)) { - nrfx_timer_disable(&cfg->timer); + nrfx_timer_disable(&data->timer); /* Timer/counter value is reset when disabled. */ data->async->rx.total_byte_cnt = 0; data->async->rx.total_user_byte_cnt = 0; @@ -3598,6 +3594,9 @@ static int uarte_instance_deinit(const struct device *dev) (.uart_config = UARTE_CONFIG(idx),)) \ IF_ENABLED(CONFIG_UART_##idx##_ASYNC, \ (.async = &uarte##idx##_async,)) \ + IF_ENABLED(CONFIG_UART_##idx##_NRF_HW_ASYNC, \ + (.timer = NRFX_TIMER_INSTANCE(NRF_TIMER_INST_GET( \ + CONFIG_UART_##idx##_NRF_HW_ASYNC_TIMER)),)) \ IF_ENABLED(CONFIG_UART_##idx##_INTERRUPT_DRIVEN, \ (.int_driven = &uarte##idx##_int_driven,)) \ }; \ @@ -3639,9 +3638,6 @@ static int uarte_instance_deinit(const struct device *dev) .rx_flush_buf = uarte##idx##_flush_buf,)) \ IF_ENABLED(CONFIG_UARTE_NRFX_UARTE_COUNT_BYTES_WITH_TIMER, \ (UARTE_COUNT_BYTES_WITH_TIMER_CONFIG(idx))) \ - IF_ENABLED(CONFIG_UART_##idx##_NRF_HW_ASYNC, \ - (.timer = NRFX_TIMER_INSTANCE( \ - CONFIG_UART_##idx##_NRF_HW_ASYNC_TIMER),)) \ IF_ENABLED(INSTANCE_IS_FAST(_, /*empty*/, idx, _), \ (.clk_dev = DEVICE_DT_GET_OR_NULL(DT_CLOCKS_CTLR(UARTE(idx))), \ .clk_spec = { \ diff --git a/drivers/spi/Kconfig.nrfx b/drivers/spi/Kconfig.nrfx index e609a6c4933c..990f044574ba 100644 --- a/drivers/spi/Kconfig.nrfx +++ b/drivers/spi/Kconfig.nrfx @@ -22,73 +22,13 @@ config SPI_NRFX_SPI config SPI_NRFX_SPIM def_bool y depends on DT_HAS_NORDIC_NRF_SPIM_ENABLED - select NRFX_SPIM0 if HAS_HW_NRF_SPIM0 - select NRFX_SPIM1 if HAS_HW_NRF_SPIM1 - select NRFX_SPIM2 if HAS_HW_NRF_SPIM2 - select NRFX_SPIM3 if HAS_HW_NRF_SPIM3 - select NRFX_SPIM4 if HAS_HW_NRF_SPIM4 - select NRFX_SPIM00 if HAS_HW_NRF_SPIM00 - select NRFX_SPIM01 if HAS_HW_NRF_SPIM01 - select NRFX_SPIM20 if HAS_HW_NRF_SPIM20 - select NRFX_SPIM21 if HAS_HW_NRF_SPIM21 - select NRFX_SPIM22 if HAS_HW_NRF_SPIM22 - select NRFX_SPIM23 if HAS_HW_NRF_SPIM23 - select NRFX_SPIM24 if HAS_HW_NRF_SPIM24 - select NRFX_SPIM30 if HAS_HW_NRF_SPIM30 - select NRFX_SPIM120 if HAS_HW_NRF_SPIM120 - select NRFX_SPIM121 if HAS_HW_NRF_SPIM121 - select NRFX_SPIM130 if HAS_HW_NRF_SPIM130 - select NRFX_SPIM131 if HAS_HW_NRF_SPIM131 - select NRFX_SPIM132 if HAS_HW_NRF_SPIM132 - select NRFX_SPIM133 if HAS_HW_NRF_SPIM133 - select NRFX_SPIM134 if HAS_HW_NRF_SPIM134 - select NRFX_SPIM135 if HAS_HW_NRF_SPIM135 - select NRFX_SPIM136 if HAS_HW_NRF_SPIM136 - select NRFX_SPIM137 if HAS_HW_NRF_SPIM137 + select NRFX_SPIM config SPI_NRFX_SPIS def_bool y depends on DT_HAS_NORDIC_NRF_SPIS_ENABLED select SPI_SLAVE - select NRFX_SPIS0 if HAS_HW_NRF_SPIS0 - select NRFX_SPIS1 if HAS_HW_NRF_SPIS1 - select NRFX_SPIS2 if HAS_HW_NRF_SPIS2 - select NRFX_SPIS3 if HAS_HW_NRF_SPIS3 - select NRFX_SPIS00 if HAS_HW_NRF_SPIS00 - select NRFX_SPIS01 if HAS_HW_NRF_SPIS01 - select NRFX_SPIS20 if HAS_HW_NRF_SPIS20 - select NRFX_SPIS21 if HAS_HW_NRF_SPIS21 - select NRFX_SPIS22 if HAS_HW_NRF_SPIS22 - select NRFX_SPIS23 if HAS_HW_NRF_SPIS23 - select NRFX_SPIS24 if HAS_HW_NRF_SPIS24 - select NRFX_SPIS30 if HAS_HW_NRF_SPIS30 - select NRFX_SPIS120 if HAS_HW_NRF_SPIS120 - select NRFX_SPIS130 if HAS_HW_NRF_SPIS130 - select NRFX_SPIS131 if HAS_HW_NRF_SPIS131 - select NRFX_SPIS132 if HAS_HW_NRF_SPIS132 - select NRFX_SPIS133 if HAS_HW_NRF_SPIS133 - select NRFX_SPIS134 if HAS_HW_NRF_SPIS134 - select NRFX_SPIS135 if HAS_HW_NRF_SPIS135 - select NRFX_SPIS136 if HAS_HW_NRF_SPIS136 - select NRFX_SPIS137 if HAS_HW_NRF_SPIS137 - -config SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58 - depends on SOC_NRF52832 - select NRFX_PPI - bool "Allow enabling the SPIM driver despite PAN 58" - help - Allow enabling the nRF SPI Master with EasyDMA, despite - Product Anomaly Notice 58 (SPIM: An additional byte is - clocked out when RXD.MAXCNT == 1 and TXD.MAXCNT <= 1). - Without this override, the SPI Master is only available - without EasyDMA. Note that the 'SPIM' and 'SPIS' drivers - use EasyDMA, while the 'SPI' driver does not. - When used in conjunction with nRF SPIM Devicetree property - 'anomaly-58-workaround' a workaround can be enabled per SPIM - instance. If you are certain that transactions with - RXD.MAXCNT == 1 and TXD.MAXCNT <= 1 will NOT be executed - then nRF52832 PPI and GPIOTE resources can be saved by not - enabling 'anomaly-58-workaround' via the Devicetree. + select NRFX_SPIS config SPI_NRFX_RAM_BUFFER_SIZE int "Size of RAM buffers for SPIM peripherals" diff --git a/drivers/spi/spi_nrfx_common.c b/drivers/spi/spi_nrfx_common.c index 04a11c2367a9..17fd3f52ba33 100644 --- a/drivers/spi/spi_nrfx_common.c +++ b/drivers/spi/spi_nrfx_common.c @@ -7,7 +7,7 @@ #include "spi_nrfx_common.h" #include -int spi_nrfx_wake_init(const nrfx_gpiote_t *gpiote, uint32_t wake_pin) +int spi_nrfx_wake_init(nrfx_gpiote_t *gpiote, uint32_t wake_pin) { nrf_gpio_pin_pull_t pull_config = NRF_GPIO_PIN_PULLDOWN; uint8_t ch; @@ -20,23 +20,23 @@ int spi_nrfx_wake_init(const nrfx_gpiote_t *gpiote, uint32_t wake_pin) .p_trigger_config = &trigger_config, .p_handler_config = NULL, }; - nrfx_err_t res; + int res; res = nrfx_gpiote_channel_alloc(gpiote, &ch); - if (res != NRFX_SUCCESS) { - return -ENODEV; + if (res < 0) { + return res; } res = nrfx_gpiote_input_configure(gpiote, wake_pin, &input_config); - if (res != NRFX_SUCCESS) { + if (res < 0) { nrfx_gpiote_channel_free(gpiote, ch); - return -EIO; + return res; } return 0; } -int spi_nrfx_wake_request(const nrfx_gpiote_t *gpiote, uint32_t wake_pin) +int spi_nrfx_wake_request(nrfx_gpiote_t *gpiote, uint32_t wake_pin) { nrf_gpiote_event_t trigger_event = nrfx_gpiote_in_event_get(gpiote, wake_pin); uint32_t start_cycles; diff --git a/drivers/spi/spi_nrfx_common.h b/drivers/spi/spi_nrfx_common.h index 0cf17e2a0356..9a0894410783 100644 --- a/drivers/spi/spi_nrfx_common.h +++ b/drivers/spi/spi_nrfx_common.h @@ -9,16 +9,18 @@ #include #include +#include +#include #define WAKE_PIN_NOT_USED UINT32_MAX -#define WAKE_GPIOTE_INSTANCE(node_id) \ - COND_CODE_1(DT_NODE_HAS_PROP(node_id, wake_gpios), \ - (NRFX_GPIOTE_INSTANCE( \ - NRF_DT_GPIOTE_INST(node_id, wake_gpios))), \ - ({0})) +#define WAKE_GPIOTE_NODE(node_id) \ + COND_CODE_1(DT_NODE_HAS_PROP(node_id, wake_gpios), \ + (&GPIOTE_NRFX_INST_BY_NODE(DT_PHANDLE(DT_PHANDLE(node_id, wake_gpios), \ + gpiote_instance))), \ + (NULL)) -int spi_nrfx_wake_init(const nrfx_gpiote_t *gpiote, uint32_t wake_pin); -int spi_nrfx_wake_request(const nrfx_gpiote_t *gpiote, uint32_t wake_pin); +int spi_nrfx_wake_init(nrfx_gpiote_t *gpiote, uint32_t wake_pin); +int spi_nrfx_wake_request(nrfx_gpiote_t *gpiote, uint32_t wake_pin); #endif /* ZEPHYR_DRIVERS_SPI_NRFX_COMMON_H_ */ diff --git a/drivers/spi/spi_nrfx_spi.c b/drivers/spi/spi_nrfx_spi.c index 7608f3ab9487..b32a80edb917 100644 --- a/drivers/spi/spi_nrfx_spi.c +++ b/drivers/spi/spi_nrfx_spi.c @@ -31,8 +31,8 @@ struct spi_nrfx_config { nrfx_spi_config_t def_config; void (*irq_connect)(void); const struct pinctrl_dev_config *pcfg; + nrfx_gpiote_t *wake_gpiote; uint32_t wake_pin; - nrfx_gpiote_t wake_gpiote; }; static void event_handler(const nrfx_spi_evt_t *p_event, void *p_context); @@ -241,7 +241,7 @@ static int transceive(const struct device *dev, dev_data->busy = true; if (dev_config->wake_pin != WAKE_PIN_NOT_USED) { - error = spi_nrfx_wake_request(&dev_config->wake_gpiote, + error = spi_nrfx_wake_request(dev_config->wake_gpiote, dev_config->wake_pin); if (error == -ETIMEDOUT) { LOG_WRN("Waiting for WAKE acknowledgment timed out"); @@ -395,7 +395,7 @@ static int spi_nrfx_init(const struct device *dev) } if (dev_config->wake_pin != WAKE_PIN_NOT_USED) { - err = spi_nrfx_wake_init(&dev_config->wake_gpiote, dev_config->wake_pin); + err = spi_nrfx_wake_init(dev_config->wake_gpiote, dev_config->wake_pin); if (err == -ENODEV) { LOG_ERR("Failed to allocate GPIOTE channel for WAKE"); return err; @@ -458,9 +458,9 @@ static int spi_nrfx_init(const struct device *dev) }, \ .irq_connect = irq_connect##idx, \ .pcfg = PINCTRL_DT_DEV_CONFIG_GET(SPI(idx)), \ + .wake_gpiote = WAKE_GPIOTE_NODE(SPI(idx)), \ .wake_pin = NRF_DT_GPIOS_TO_PSEL_OR(SPI(idx), wake_gpios, \ WAKE_PIN_NOT_USED), \ - .wake_gpiote = WAKE_GPIOTE_INSTANCE(SPI(idx)), \ }; \ BUILD_ASSERT(!DT_NODE_HAS_PROP(SPI(idx), wake_gpios) || \ !(DT_GPIO_FLAGS(SPI(idx), wake_gpios) & GPIO_ACTIVE_LOW), \ diff --git a/drivers/spi/spi_nrfx_spim.c b/drivers/spi/spi_nrfx_spim.c index 447c0e54fba5..bb5f8c419e67 100644 --- a/drivers/spi/spi_nrfx_spim.c +++ b/drivers/spi/spi_nrfx_spim.c @@ -4,6 +4,8 @@ * SPDX-License-Identifier: Apache-2.0 */ +#define DT_DRV_COMPAT nordic_nrf_spim + #include #include #include @@ -14,9 +16,6 @@ #include #include #include -#ifdef CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58 -#include -#endif #ifdef CONFIG_SOC_NRF5340_CPUAPP #include #endif @@ -31,46 +30,25 @@ LOG_MODULE_REGISTER(spi_nrfx_spim, CONFIG_SPI_LOG_LEVEL); #include "spi_context.h" #include "spi_nrfx_common.h" -#if defined(CONFIG_SOC_NRF52832) && !defined(CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58) -#error This driver is not available by default for nRF52832 because of Product Anomaly 58 \ - (SPIM: An additional byte is clocked out when RXD.MAXCNT == 1 and TXD.MAXCNT <= 1). \ - Use CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58=y to override this limitation. -#endif - #if (CONFIG_SPI_NRFX_RAM_BUFFER_SIZE > 0) #define SPI_BUFFER_IN_RAM 1 #endif -/* - * We use NODELABEL here because the nrfx API requires us to call - * functions which are named according to SoC peripheral instance - * being operated on. Since DT_INST() makes no guarantees about that, - * it won't work. - */ -#define SPIM(idx) DT_NODELABEL(spi##idx) -#define SPIM_PROP(idx, prop) DT_PROP(SPIM(idx), prop) -#define SPIM_HAS_PROP(idx, prop) DT_NODE_HAS_PROP(SPIM(idx), prop) - -/* Execute macro f(x) for all instances. */ -#define SPIM_FOR_EACH_INSTANCE(f, sep, off_code, ...) \ - NRFX_FOREACH_PRESENT(SPIM, f, sep, off_code, __VA_ARGS__) - /* Only CPUAPP and CPURAD can control clocks and power domains, so if a fast instance is * used by other cores, treat the SPIM like a normal one. This presumes the CPUAPP or CPURAD * have requested the clocks and power domains needed by the fast instance to be ACTIVE before * other cores use the fast instance. */ #if CONFIG_SOC_NRF54H20_CPUAPP || CONFIG_SOC_NRF54H20_CPURAD -#define INSTANCE_IS_FAST(unused, prefix, idx, _) \ - UTIL_AND( \ - UTIL_AND( \ - IS_ENABLED(CONFIG_HAS_HW_NRF_SPIM##prefix##idx), \ - NRF_DT_IS_FAST(SPIM(idx)) \ - ), \ - IS_ENABLED(CONFIG_CLOCK_CONTROL) \ +#define INSTANCE_IS_FAST(inst) \ + UTIL_AND( \ + NRF_DT_INST_IS_FAST(inst), \ + IS_ENABLED(CONFIG_CLOCK_CONTROL) \ ) -#if SPIM_FOR_EACH_INSTANCE(INSTANCE_IS_FAST, (||), (0)) +#define INSTANCE_IS_FAST_OR(inst) INSTANCE_IS_FAST(inst) || + +#if (DT_INST_FOREACH_STATUS_OKAY(INSTANCE_IS_FAST_OR) 0) #define SPIM_ANY_FAST 1 /* If fast instances are used then system managed device PM cannot be used because * it may call PM actions from locked context and fast SPIM PM actions can only be @@ -80,12 +58,12 @@ BUILD_ASSERT(!IS_ENABLED(CONFIG_PM_DEVICE_SYSTEM_MANAGED)); #endif #endif -#define SPIM_PINS_CROSS_DOMAIN(unused, prefix, idx, _) \ - COND_CODE_1(DT_NODE_HAS_STATUS_OKAY(SPIM(prefix##idx)), \ - (SPIM_PROP(idx, cross_domain_pins_supported)), \ - (0)) +#define SPIM_PINS_CROSS_DOMAIN(inst) \ + DT_INST_PROP(inst, cross_domain_pins_supported) + +#define SPIM_PINS_CROSS_DOMAIN_OR(inst) SPIM_PINS_CROSS_DOMAIN(inst) || -#if NRFX_FOREACH_PRESENT(SPIM, SPIM_PINS_CROSS_DOMAIN, (||), (0)) +#if (DT_INST_FOREACH_STATUS_OKAY(SPIM_PINS_CROSS_DOMAIN_OR) 0) #include /* Certain SPIM instances support usage of cross domain pins in form of dedicated pins on * a port different from the default one. @@ -103,6 +81,7 @@ BUILD_ASSERT(!IS_ENABLED(CONFIG_PM_DEVICE_SYSTEM_MANAGED)); struct spi_nrfx_data { + nrfx_spim_t spim; struct spi_context ctx; const struct device *dev; size_t chunk_len; @@ -112,28 +91,19 @@ struct spi_nrfx_data { uint8_t *tx_buffer; uint8_t *rx_buffer; #endif -#ifdef CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58 - bool anomaly_58_workaround_active; - uint8_t ppi_ch; - uint8_t gpiote_ch; -#endif #ifdef SPIM_ANY_FAST bool clock_requested; #endif }; struct spi_nrfx_config { - nrfx_spim_t spim; uint32_t max_freq; nrfx_spim_config_t def_config; void (*irq_connect)(void); uint16_t max_chunk_len; const struct pinctrl_dev_config *pcfg; -#ifdef CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58 - bool anomaly_58_workaround; -#endif + nrfx_gpiote_t *wake_gpiote; uint32_t wake_pin; - nrfx_gpiote_t wake_gpiote; #ifdef SPIM_ANY_FAST const struct device *clk_dev; struct nrf_clock_spec clk_spec; @@ -145,7 +115,7 @@ struct spi_nrfx_config { void *mem_reg; }; -static void event_handler(const nrfx_spim_evt_t *p_event, void *p_context); +static void event_handler(const nrfx_spim_event_t *p_event, void *p_context); static inline int request_clock(const struct device *dev) { @@ -221,8 +191,7 @@ static bool spim_has_cross_domain_connection(const struct spi_nrfx_config *confi static inline void finalize_spi_transaction(const struct device *dev, bool deactivate_cs) { struct spi_nrfx_data *dev_data = dev->data; - const struct spi_nrfx_config *dev_config = dev->config; - void *reg = dev_config->spim.p_reg; + void *reg = dev_data->spim.p_reg; if (deactivate_cs) { spi_context_cs_control(&dev_data->ctx, false); @@ -301,7 +270,7 @@ static int configure(const struct device *dev, struct spi_context *ctx = &dev_data->ctx; uint32_t max_freq = dev_config->max_freq; nrfx_spim_config_t config; - nrfx_err_t result; + int result; uint32_t sck_pin; if (dev_data->initialized && spi_context_configured(ctx, spi_cfg)) { @@ -359,22 +328,22 @@ static int configure(const struct device *dev, config.mode = get_nrf_spim_mode(spi_cfg->operation); config.bit_order = get_nrf_spim_bit_order(spi_cfg->operation); - sck_pin = nrfy_spim_sck_pin_get(dev_config->spim.p_reg); + sck_pin = nrfy_spim_sck_pin_get(dev_data->spim.p_reg); if (sck_pin != NRF_SPIM_PIN_NOT_CONNECTED) { nrfy_gpio_pin_write(sck_pin, spi_cfg->operation & SPI_MODE_CPOL ? 1 : 0); } if (dev_data->initialized) { - nrfx_spim_uninit(&dev_config->spim); + nrfx_spim_uninit(&dev_data->spim); dev_data->initialized = false; } - result = nrfx_spim_init(&dev_config->spim, &config, + result = nrfx_spim_init(&dev_data->spim, &config, event_handler, (void *)dev); - if (result != NRFX_SUCCESS) { - LOG_ERR("Failed to initialize nrfx driver: %08x", result); - return -EIO; + if (result < 0) { + LOG_ERR("Failed to initialize nrfx driver: %d", result); + return result; } dev_data->initialized = true; @@ -384,89 +353,6 @@ static int configure(const struct device *dev, return 0; } -#ifdef CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58 -static const nrfx_gpiote_t gpiote = NRFX_GPIOTE_INSTANCE(0); - -/* - * Brief Workaround for transmitting 1 byte with SPIM. - * - * Derived from the setup_workaround_for_ftpan_58() function from - * the nRF52832 Rev 1 Errata v1.6 document anomaly 58 workaround. - * - * Warning Must not be used when transmitting multiple bytes. - * - * Warning After this workaround is used, the user must reset the PPI - * channel and the GPIOTE channel before attempting to transmit multiple - * bytes. - */ -static void anomaly_58_workaround_setup(const struct device *dev) -{ - struct spi_nrfx_data *dev_data = dev->data; - const struct spi_nrfx_config *dev_config = dev->config; - NRF_SPIM_Type *spim = dev_config->spim.p_reg; - uint32_t ppi_ch = dev_data->ppi_ch; - uint32_t gpiote_ch = dev_data->gpiote_ch; - uint32_t eep = (uint32_t)&gpiote.p_reg->EVENTS_IN[gpiote_ch]; - uint32_t tep = (uint32_t)&spim->TASKS_STOP; - - dev_data->anomaly_58_workaround_active = true; - - /* Create an event when SCK toggles */ - nrf_gpiote_event_configure(gpiote.p_reg, gpiote_ch, spim->PSEL.SCK, - GPIOTE_CONFIG_POLARITY_Toggle); - nrf_gpiote_event_enable(gpiote.p_reg, gpiote_ch); - - /* Stop the spim instance when SCK toggles */ - nrf_ppi_channel_endpoint_setup(NRF_PPI, ppi_ch, eep, tep); - nrf_ppi_channel_enable(NRF_PPI, ppi_ch); - - /* The spim instance cannot be stopped mid-byte, so it will finish - * transmitting the first byte and then stop. Effectively ensuring - * that only 1 byte is transmitted. - */ -} - -static void anomaly_58_workaround_clear(struct spi_nrfx_data *dev_data) -{ - uint32_t ppi_ch = dev_data->ppi_ch; - uint32_t gpiote_ch = dev_data->gpiote_ch; - - if (dev_data->anomaly_58_workaround_active) { - nrf_ppi_channel_disable(NRF_PPI, ppi_ch); - nrf_gpiote_task_disable(gpiote.p_reg, gpiote_ch); - - dev_data->anomaly_58_workaround_active = false; - } -} - -static int anomaly_58_workaround_init(const struct device *dev) -{ - struct spi_nrfx_data *dev_data = dev->data; - const struct spi_nrfx_config *dev_config = dev->config; - nrfx_err_t err_code; - - dev_data->anomaly_58_workaround_active = false; - - if (dev_config->anomaly_58_workaround) { - err_code = nrfx_ppi_channel_alloc(&dev_data->ppi_ch); - if (err_code != NRFX_SUCCESS) { - LOG_ERR("Failed to allocate PPI channel"); - return -ENODEV; - } - - err_code = nrfx_gpiote_channel_alloc(&gpiote, &dev_data->gpiote_ch); - if (err_code != NRFX_SUCCESS) { - LOG_ERR("Failed to allocate GPIOTE channel"); - return -ENODEV; - } - LOG_DBG("PAN 58 workaround enabled for %s: ppi %u, gpiote %u", - dev->name, dev_data->ppi_ch, dev_data->gpiote_ch); - } - - return 0; -} -#endif - static void finish_transaction(const struct device *dev, int error) { struct spi_nrfx_data *dev_data = dev->data; @@ -496,7 +382,6 @@ static void transfer_next_chunk(const struct device *dev) if (chunk_len > 0) { nrfx_spim_xfer_desc_t xfer; - nrfx_err_t result; const uint8_t *tx_buf = ctx->tx_buf; uint8_t *rx_buf = ctx->rx_buf; @@ -506,7 +391,7 @@ static void transfer_next_chunk(const struct device *dev) #ifdef SPI_BUFFER_IN_RAM if (spi_context_tx_buf_on(ctx) && - !nrf_dma_accessible_check(&dev_config->spim.p_reg, tx_buf)) { + !nrf_dma_accessible_check(&dev_data->spim.p_reg, tx_buf)) { if (chunk_len > CONFIG_SPI_NRFX_RAM_BUFFER_SIZE) { chunk_len = CONFIG_SPI_NRFX_RAM_BUFFER_SIZE; @@ -517,7 +402,7 @@ static void transfer_next_chunk(const struct device *dev) } if (spi_context_rx_buf_on(ctx) && - !nrf_dma_accessible_check(&dev_config->spim.p_reg, rx_buf)) { + !nrf_dma_accessible_check(&dev_data->spim.p_reg, rx_buf)) { if (chunk_len > CONFIG_SPI_NRFX_RAM_BUFFER_SIZE) { chunk_len = CONFIG_SPI_NRFX_RAM_BUFFER_SIZE; @@ -544,26 +429,9 @@ static void transfer_next_chunk(const struct device *dev) goto in_alloc_failed; } -#ifdef CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58 - if (xfer.rx_length == 1 && xfer.tx_length <= 1) { - if (dev_config->anomaly_58_workaround) { - anomaly_58_workaround_setup(dev); - } else { - LOG_WRN("Transaction aborted since it would trigger " - "nRF52832 PAN 58"); - error = -EIO; - } - } -#endif + error = nrfx_spim_xfer(&dev_data->spim, &xfer, 0); if (error == 0) { - result = nrfx_spim_xfer(&dev_config->spim, &xfer, 0); - if (result == NRFX_SUCCESS) { - return; - } - error = -EIO; -#ifdef CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58 - anomaly_58_workaround_clear(dev_data); -#endif + return; } /* On nrfx_spim_xfer() error */ @@ -577,7 +445,7 @@ static void transfer_next_chunk(const struct device *dev) finish_transaction(dev, error); } -static void event_handler(const nrfx_spim_evt_t *p_event, void *p_context) +static void event_handler(const nrfx_spim_event_t *p_event, void *p_context) { const struct device *dev = p_context; struct spi_nrfx_data *dev_data = dev->data; @@ -592,10 +460,6 @@ static void event_handler(const nrfx_spim_evt_t *p_event, void *p_context) return; } -#ifdef CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58 - anomaly_58_workaround_clear(dev_data); -#endif - if (spi_context_tx_buf_on(&dev_data->ctx)) { dmm_buffer_out_release(dev_config->mem_reg, (void **)p_event->xfer_desc.p_tx_buffer); @@ -632,7 +496,7 @@ static int transceive(const struct device *dev, { struct spi_nrfx_data *dev_data = dev->data; const struct spi_nrfx_config *dev_config = dev->config; - void *reg = dev_config->spim.p_reg; + void *reg = dev_data->spim.p_reg; int error; pm_device_runtime_get(dev); @@ -648,7 +512,7 @@ static int transceive(const struct device *dev, dev_data->busy = true; if (dev_config->wake_pin != WAKE_PIN_NOT_USED) { - error = spi_nrfx_wake_request(&dev_config->wake_gpiote, + error = spi_nrfx_wake_request(dev_config->wake_gpiote, dev_config->wake_pin); if (error == -ETIMEDOUT) { LOG_WRN("Waiting for WAKE acknowledgment timed out"); @@ -678,7 +542,7 @@ static int transceive(const struct device *dev, /* Abort the current transfer by deinitializing * the nrfx driver. */ - nrfx_spim_uninit(&dev_config->spim); + nrfx_spim_uninit(&dev_data->spim); dev_data->initialized = false; /* Make sure the transaction is finished (it may be @@ -693,9 +557,6 @@ static int transceive(const struct device *dev, #else dev_data->ctx.ready = 0; #endif /* CONFIG_MULTITHREADING */ -#ifdef CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58 - anomaly_58_workaround_clear(dev_data); -#endif } else if (error) { finalize_spi_transaction(dev, true); } @@ -762,6 +623,7 @@ static int spim_resume(const struct device *dev) { const struct spi_nrfx_config *dev_config = dev->config; struct spi_nrfx_data *dev_data = dev->data; + (void)dev_data; (void)pinctrl_apply_state(dev_config->pcfg, PINCTRL_STATE_DEFAULT); /* nrfx_spim_init() will be called at configuration before @@ -795,7 +657,7 @@ static void spim_suspend(const struct device *dev) struct spi_nrfx_data *dev_data = dev->data; if (dev_data->initialized) { - nrfx_spim_uninit(&dev_config->spim); + nrfx_spim_uninit(&dev_data->spim); dev_data->initialized = false; } @@ -803,7 +665,7 @@ static void spim_suspend(const struct device *dev) release_clock(dev); } - spi_context_cs_put_all(&dev_data->ctx); + (void)spi_context_cs_put_all(&dev_data->ctx); #if SPIM_CROSS_DOMAIN_SUPPORTED if (dev_config->cross_domain && spim_has_cross_domain_connection(dev_config)) { @@ -847,7 +709,7 @@ static int spi_nrfx_init(const struct device *dev) (void)pinctrl_apply_state(dev_config->pcfg, PINCTRL_STATE_SLEEP); if (dev_config->wake_pin != WAKE_PIN_NOT_USED) { - err = spi_nrfx_wake_init(&dev_config->wake_gpiote, dev_config->wake_pin); + err = spi_nrfx_wake_init(dev_config->wake_gpiote, dev_config->wake_pin); if (err == -ENODEV) { LOG_ERR("Failed to allocate GPIOTE channel for WAKE"); return err; @@ -867,12 +729,6 @@ static int spi_nrfx_init(const struct device *dev) spi_context_unlock_unconditionally(&dev_data->ctx); -#ifdef CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58 - err = anomaly_58_workaround_init(dev); - if (err < 0) { - return err; - } -#endif return pm_device_driver_init(dev, spim_nrfx_pm_action); } @@ -897,100 +753,93 @@ static int spi_nrfx_deinit(const struct device *dev) return 0; } -#define SPI_NRFX_SPIM_EXTENDED_CONFIG(idx) \ +#define SPI_NRFX_SPIM_EXTENDED_CONFIG(inst) \ IF_ENABLED(NRFX_SPIM_EXTENDED_ENABLED, \ (.dcx_pin = NRF_SPIM_PIN_NOT_CONNECTED, \ - COND_CODE_1(SPIM_PROP(idx, rx_delay_supported), \ - (.rx_delay = SPIM_PROP(idx, rx_delay),), \ + COND_CODE_1(DT_INST_PROP(inst, rx_delay_supported), \ + (.rx_delay = DT_INST_PROP(inst, rx_delay),), \ ()) \ )) /* Get initialization priority of an instance. Instances that requires clock control * which is using nrfs (IPC) are initialized later. */ -#define SPIM_INIT_PRIORITY(idx) \ - COND_CODE_1(INSTANCE_IS_FAST(_, /*empty*/, idx, _), \ +#define SPIM_INIT_PRIORITY(inst) \ + COND_CODE_1(INSTANCE_IS_FAST(inst), \ (UTIL_INC(CONFIG_CLOCK_CONTROL_NRF_HSFLL_GLOBAL_INIT_PRIORITY)), \ (CONFIG_SPI_INIT_PRIORITY)) -#define SPI_NRFX_SPIM_DEFINE(idx) \ - NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(SPIM(idx)); \ - NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(SPIM(idx)); \ - static void irq_connect##idx(void) \ - { \ - IRQ_CONNECT(DT_IRQN(SPIM(idx)), DT_IRQ(SPIM(idx), priority), \ - nrfx_isr, nrfx_spim_##idx##_irq_handler, 0); \ - } \ +#define SPI_NRFX_SPIM_DEFINE(inst) \ + NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(DT_DRV_INST(inst)); \ + NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(DT_DRV_INST(inst)); \ IF_ENABLED(SPI_BUFFER_IN_RAM, \ - (static uint8_t spim_##idx##_tx_buffer \ + (static uint8_t spim_##inst##_tx_buffer \ [CONFIG_SPI_NRFX_RAM_BUFFER_SIZE] \ - DMM_MEMORY_SECTION(SPIM(idx)); \ - static uint8_t spim_##idx##_rx_buffer \ + DMM_MEMORY_SECTION(DT_DRV_INST(inst)); \ + static uint8_t spim_##inst##_rx_buffer \ [CONFIG_SPI_NRFX_RAM_BUFFER_SIZE] \ - DMM_MEMORY_SECTION(SPIM(idx));)) \ - static struct spi_nrfx_data spi_##idx##_data = { \ + DMM_MEMORY_SECTION(DT_DRV_INST(inst));)) \ + static struct spi_nrfx_data spi_##inst##_data = { \ + .spim = NRFX_SPIM_INSTANCE(DT_INST_REG_ADDR(inst)), \ IF_ENABLED(CONFIG_MULTITHREADING, \ - (SPI_CONTEXT_INIT_LOCK(spi_##idx##_data, ctx),)) \ + (SPI_CONTEXT_INIT_LOCK(spi_##inst##_data, ctx),)) \ IF_ENABLED(CONFIG_MULTITHREADING, \ - (SPI_CONTEXT_INIT_SYNC(spi_##idx##_data, ctx),)) \ - SPI_CONTEXT_CS_GPIOS_INITIALIZE(SPIM(idx), ctx) \ + (SPI_CONTEXT_INIT_SYNC(spi_##inst##_data, ctx),)) \ + SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(inst), ctx) \ IF_ENABLED(SPI_BUFFER_IN_RAM, \ - (.tx_buffer = spim_##idx##_tx_buffer, \ - .rx_buffer = spim_##idx##_rx_buffer,)) \ - .dev = DEVICE_DT_GET(SPIM(idx)), \ + (.tx_buffer = spim_##inst##_tx_buffer, \ + .rx_buffer = spim_##inst##_rx_buffer,)) \ + .dev = DEVICE_DT_GET(DT_DRV_INST(inst)), \ .busy = false, \ }; \ - PINCTRL_DT_DEFINE(SPIM(idx)); \ - static const struct spi_nrfx_config spi_##idx##z_config = { \ - .spim = { \ - .p_reg = (NRF_SPIM_Type *)DT_REG_ADDR(SPIM(idx)), \ - .drv_inst_idx = NRFX_SPIM##idx##_INST_IDX, \ - }, \ - .max_freq = SPIM_PROP(idx, max_frequency), \ + static void irq_connect##inst(void) \ + { \ + IRQ_CONNECT(DT_INST_IRQN(inst), DT_INST_IRQ(inst, priority), \ + nrfx_spim_irq_handler, &spi_##inst##_data.spim, 0); \ + } \ + PINCTRL_DT_INST_DEFINE(inst); \ + static const struct spi_nrfx_config spi_##inst##z_config = { \ + .max_freq = DT_INST_PROP(inst, max_frequency), \ .def_config = { \ .skip_gpio_cfg = true, \ .skip_psel_cfg = true, \ .ss_pin = NRF_SPIM_PIN_NOT_CONNECTED, \ - .orc = SPIM_PROP(idx, overrun_character), \ - SPI_NRFX_SPIM_EXTENDED_CONFIG(idx) \ + .orc = DT_INST_PROP(inst, overrun_character), \ + SPI_NRFX_SPIM_EXTENDED_CONFIG(inst) \ }, \ - .irq_connect = irq_connect##idx, \ - .pcfg = PINCTRL_DT_DEV_CONFIG_GET(SPIM(idx)), \ - .max_chunk_len = BIT_MASK(SPIM_PROP(idx, easydma_maxcnt_bits)),\ - COND_CODE_1(CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58, \ - (.anomaly_58_workaround = \ - SPIM_PROP(idx, anomaly_58_workaround),), \ - ()) \ - .wake_pin = NRF_DT_GPIOS_TO_PSEL_OR(SPIM(idx), wake_gpios, \ + .irq_connect = irq_connect##inst, \ + .max_chunk_len = BIT_MASK( \ + DT_INST_PROP(inst, easydma_maxcnt_bits)), \ + .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \ + .wake_gpiote = WAKE_GPIOTE_NODE(DT_DRV_INST(inst)), \ + .wake_pin = NRF_DT_GPIOS_TO_PSEL_OR(DT_DRV_INST(inst), \ + wake_gpios, \ WAKE_PIN_NOT_USED), \ - .wake_gpiote = WAKE_GPIOTE_INSTANCE(SPIM(idx)), \ IF_ENABLED(SPIM_ANY_FAST, \ (.clk_dev = DEVICE_DT_GET_OR_NULL( \ - DT_CLOCKS_CTLR(SPIM(idx))), \ + DT_CLOCKS_CTLR(DT_DRV_INST(inst))), \ .clk_spec = { \ .frequency = NRF_CLOCK_CONTROL_FREQUENCY_MAX, \ },)) \ - IF_ENABLED(SPIM_PINS_CROSS_DOMAIN(_, /*empty*/, idx, _), \ + IF_ENABLED(SPIM_PINS_CROSS_DOMAIN(inst), \ (.cross_domain = true, \ .default_port = \ - DT_PROP_OR(DT_PHANDLE(SPIM(idx), \ + DT_PROP_OR(DT_INST_PHANDLE(inst, \ default_gpio_port), port, -1),)) \ - .mem_reg = DMM_DEV_TO_REG(SPIM(idx)), \ + .mem_reg = DMM_DEV_TO_REG(DT_DRV_INST(inst)), \ }; \ - BUILD_ASSERT(!SPIM_HAS_PROP(idx, wake_gpios) || \ - !(DT_GPIO_FLAGS(SPIM(idx), wake_gpios) & GPIO_ACTIVE_LOW),\ + BUILD_ASSERT(!DT_INST_NODE_HAS_PROP(inst, wake_gpios) || \ + !(DT_GPIO_FLAGS(DT_DRV_INST(inst), wake_gpios) & \ + GPIO_ACTIVE_LOW), \ "WAKE line must be configured as active high"); \ - PM_DEVICE_DT_DEFINE(SPIM(idx), spim_nrfx_pm_action); \ - SPI_DEVICE_DT_DEINIT_DEFINE(SPIM(idx), \ + PM_DEVICE_DT_INST_DEFINE(inst, spim_nrfx_pm_action); \ + SPI_DEVICE_DT_INST_DEINIT_DEFINE(inst, \ spi_nrfx_init, \ spi_nrfx_deinit, \ - PM_DEVICE_DT_GET(SPIM(idx)), \ - &spi_##idx##_data, \ - &spi_##idx##z_config, \ - POST_KERNEL, SPIM_INIT_PRIORITY(idx), \ + PM_DEVICE_DT_INST_GET(inst), \ + &spi_##inst##_data, \ + &spi_##inst##z_config, \ + POST_KERNEL, SPIM_INIT_PRIORITY(inst), \ &spi_nrfx_driver_api) -#define COND_NRF_SPIM_DEVICE(unused, prefix, i, _) \ - IF_ENABLED(CONFIG_HAS_HW_NRF_SPIM##prefix##i, (SPI_NRFX_SPIM_DEFINE(prefix##i);)) - -SPIM_FOR_EACH_INSTANCE(COND_NRF_SPIM_DEVICE, (), (), _) +DT_INST_FOREACH_STATUS_OKAY(SPI_NRFX_SPIM_DEFINE) diff --git a/drivers/spi/spi_nrfx_spis.c b/drivers/spi/spi_nrfx_spis.c index 64c9a6f14c45..bb18ca063716 100644 --- a/drivers/spi/spi_nrfx_spis.c +++ b/drivers/spi/spi_nrfx_spis.c @@ -4,6 +4,8 @@ * SPDX-License-Identifier: Apache-2.0 */ + #define DT_DRV_COMPAT nordic_nrf_spis + #include #include #include @@ -28,25 +30,12 @@ LOG_MODULE_REGISTER(spi_nrfx_spis, CONFIG_SPI_LOG_LEVEL); BUILD_ASSERT(!IS_ENABLED(CONFIG_PM_DEVICE_SYSTEM_MANAGED)); #endif -/* - * Current factors requiring use of DT_NODELABEL: - * - * - HAL design (requirement of drv_inst_idx in nrfx_spis_t) - * - Name-based HAL IRQ handlers, e.g. nrfx_spis_0_irq_handler - */ -#define SPIS_NODE(idx) \ - COND_CODE_1(DT_NODE_EXISTS(DT_NODELABEL(spis##idx)), (spis##idx), (spi##idx)) -#define SPIS(idx) DT_NODELABEL(SPIS_NODE(idx)) -#define SPIS_PROP(idx, prop) DT_PROP(SPIS(idx), prop) -#define SPIS_HAS_PROP(idx, prop) DT_NODE_HAS_PROP(SPIS(idx), prop) -#define SPIS_IS_FAST(idx) NRF_DT_IS_FAST(SPIS(idx)) - -#define SPIS_PINS_CROSS_DOMAIN(unused, prefix, idx, _) \ - COND_CODE_1(DT_NODE_HAS_STATUS_OKAY(SPIS(prefix##idx)), \ - (SPIS_PROP(idx, cross_domain_pins_supported)), \ - (0)) - -#if NRFX_FOREACH_PRESENT(SPIS, SPIS_PINS_CROSS_DOMAIN, (||), (0)) +#define SPIS_PINS_CROSS_DOMAIN(inst) \ + DT_INST_PROP(inst, cross_domain_pins_supported) + +#define SPIS_PINS_CROSS_DOMAIN_OR(inst) SPIS_PINS_CROSS_DOMAIN(inst) || + +#if (DT_INST_FOREACH_STATUS_OKAY(SPIS_PINS_CROSS_DOMAIN_OR) 0) #include /* Certain SPIM instances support usage of cross domain pins in form of dedicated pins on * a port different from the default one. @@ -63,6 +52,7 @@ BUILD_ASSERT(!IS_ENABLED(CONFIG_PM_DEVICE_SYSTEM_MANAGED)); #endif struct spi_nrfx_data { + nrfx_spis_t spis; struct spi_context ctx; const struct device *dev; #ifdef CONFIG_MULTITHREADING @@ -74,7 +64,6 @@ struct spi_nrfx_data { }; struct spi_nrfx_config { - nrfx_spis_t spis; nrfx_spis_config_t config; void (*irq_connect)(void); uint16_t max_buf_len; @@ -142,7 +131,6 @@ static inline nrf_spis_bit_order_t get_nrf_spis_bit_order(uint16_t operation) static int configure(const struct device *dev, const struct spi_config *spi_cfg) { - const struct spi_nrfx_config *dev_config = dev->config; struct spi_nrfx_data *dev_data = dev->data; struct spi_context *ctx = &dev_data->ctx; @@ -184,7 +172,7 @@ static int configure(const struct device *dev, ctx->config = spi_cfg; - nrf_spis_configure(dev_config->spis.p_reg, + nrf_spis_configure(dev_data->spis.p_reg, get_nrf_spis_mode(spi_cfg->operation), get_nrf_spis_bit_order(spi_cfg->operation)); @@ -197,7 +185,6 @@ static int prepare_for_transfer(const struct device *dev, { const struct spi_nrfx_config *dev_config = dev->config; struct spi_nrfx_data *dev_data = dev->data; - nrfx_err_t result; uint8_t *dmm_tx_buf; uint8_t *dmm_rx_buf; int err; @@ -223,11 +210,10 @@ static int prepare_for_transfer(const struct device *dev, goto in_alloc_failed; } - result = nrfx_spis_buffers_set(&dev_config->spis, + err = nrfx_spis_buffers_set(&dev_data->spis, dmm_tx_buf, tx_buf_len, dmm_rx_buf, rx_buf_len); - if (result != NRFX_SUCCESS) { - err = -EIO; + if (err != 0) { goto buffers_set_failed; } @@ -315,7 +301,7 @@ static int transceive(const struct device *dev, if (dev_config->wake_gpio.port) { wait_for_wake(dev_data, dev_config); - nrf_spis_enable(dev_config->spis.p_reg); + nrf_spis_enable(dev_data->spis.p_reg); } error = prepare_for_transfer(dev, @@ -345,7 +331,7 @@ static int transceive(const struct device *dev, } if (dev_config->wake_gpio.port) { - nrf_spis_disable(dev_config->spis.p_reg); + nrf_spis_disable(dev_data->spis.p_reg); } } @@ -399,7 +385,7 @@ static DEVICE_API(spi, spi_nrfx_driver_api) = { .release = spi_nrfx_release, }; -static void event_handler(const nrfx_spis_evt_t *p_event, void *p_context) +static void event_handler(const nrfx_spis_event_t *p_event, void *p_context) { const struct device *dev = p_context; struct spi_nrfx_data *dev_data = dev->data; @@ -427,9 +413,10 @@ static void event_handler(const nrfx_spis_evt_t *p_event, void *p_context) static void spi_nrfx_suspend(const struct device *dev) { const struct spi_nrfx_config *dev_config = dev->config; + struct spi_nrfx_data *dev_data = dev->data; if (dev_config->wake_gpio.port == NULL) { - nrf_spis_disable(dev_config->spis.p_reg); + nrf_spis_disable(dev_data->spis.p_reg); } #if SPIS_CROSS_DOMAIN_SUPPORTED @@ -452,6 +439,7 @@ static void spi_nrfx_suspend(const struct device *dev) static void spi_nrfx_resume(const struct device *dev) { const struct spi_nrfx_config *dev_config = dev->config; + struct spi_nrfx_data *dev_data = dev->data; (void)pinctrl_apply_state(dev_config->pcfg, PINCTRL_STATE_DEFAULT); @@ -470,7 +458,7 @@ static void spi_nrfx_resume(const struct device *dev) #endif if (dev_config->wake_gpio.port == NULL) { - nrf_spis_enable(dev_config->spis.p_reg); + nrf_spis_enable(dev_data->spis.p_reg); } } @@ -496,18 +484,17 @@ static int spi_nrfx_init(const struct device *dev) { const struct spi_nrfx_config *dev_config = dev->config; struct spi_nrfx_data *dev_data = dev->data; - nrfx_err_t result; int err; /* This sets only default values of mode and bit order. The ones to be * actually used are set in configure() when a transfer is prepared. */ - result = nrfx_spis_init(&dev_config->spis, &dev_config->config, + err = nrfx_spis_init(&dev_data->spis, &dev_config->config, event_handler, (void *)dev); - if (result != NRFX_SUCCESS) { + if (err != 0) { LOG_ERR("Failed to initialize device: %s", dev->name); - return -EBUSY; + return err; } /* When the WAKE line is used, the SPIS peripheral is enabled @@ -518,7 +505,7 @@ static int spi_nrfx_init(const struct device *dev) * with the SPIS peripheral enabled, significantly reduces idle * power consumption. */ - nrf_spis_disable(dev_config->spis.p_reg); + nrf_spis_disable(dev_data->spis.p_reg); if (dev_config->wake_gpio.port) { if (!gpio_is_ready_dt(&dev_config->wake_gpio)) { @@ -551,66 +538,86 @@ static int spi_nrfx_init(const struct device *dev) return pm_device_driver_init(dev, spi_nrfx_pm_action); } -#define SPI_NRFX_SPIS_DEFINE(idx) \ - NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(SPIS(idx)); \ - static void irq_connect##idx(void) \ - { \ - IRQ_CONNECT(DT_IRQN(SPIS(idx)), DT_IRQ(SPIS(idx), priority), \ - nrfx_isr, nrfx_spis_##idx##_irq_handler, 0); \ - } \ - static struct spi_nrfx_data spi_##idx##_data = { \ +/* Macro determines PM actions interrupt safety level. + * + * Requesting/releasing SPIS device may be ISR safe, but it cannot be reliably known whether + * managing its power domain is. It is then assumed that if power domains are used, device is + * no longer ISR safe. This macro let's us check if we will be requesting/releasing + * power domains and determines PM device ISR safety value. + * + * Additionally, fast SPIS devices are not ISR safe. + */ +#define SPIS_PM_ISR_SAFE(inst) \ + COND_CODE_1( \ + UTIL_AND( \ + IS_ENABLED(CONFIG_PM_DEVICE_POWER_DOMAIN), \ + UTIL_AND( \ + DT_INST_NODE_HAS_PROP(inst, power_domains), \ + DT_NODE_HAS_STATUS_OKAY(DT_INST_PHANDLE(inst, power_domains)) \ + ) \ + ), \ + (0), \ + (COND_CODE_1( \ + NRF_DT_INST_IS_FAST(inst), \ + (0), \ + (PM_DEVICE_ISR_SAFE) \ + )) \ + ) + +#define SPI_NRFX_SPIS_DEFINE(inst) \ + NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(DT_DRV_INST(inst)); \ + static struct spi_nrfx_data spi_##inst##_data = { \ + .spis = NRFX_SPIS_INSTANCE(DT_INST_REG_ADDR(inst)), \ IF_ENABLED(CONFIG_MULTITHREADING, \ - (SPI_CONTEXT_INIT_LOCK(spi_##idx##_data, ctx),)) \ + (SPI_CONTEXT_INIT_LOCK(spi_##inst##_data, ctx),)) \ IF_ENABLED(CONFIG_MULTITHREADING, \ - (SPI_CONTEXT_INIT_SYNC(spi_##idx##_data, ctx),)) \ - .dev = DEVICE_DT_GET(SPIS(idx)), \ + (SPI_CONTEXT_INIT_SYNC(spi_##inst##_data, ctx),)) \ + .dev = DEVICE_DT_GET(DT_DRV_INST(inst)), \ IF_ENABLED(CONFIG_MULTITHREADING, \ (.wake_sem = Z_SEM_INITIALIZER( \ - spi_##idx##_data.wake_sem, 0, 1),)) \ + spi_##inst##_data.wake_sem, 0, 1),)) \ }; \ - PINCTRL_DT_DEFINE(SPIS(idx)); \ - static const struct spi_nrfx_config spi_##idx##z_config = { \ - .spis = { \ - .p_reg = (NRF_SPIS_Type *)DT_REG_ADDR(SPIS(idx)), \ - .drv_inst_idx = NRFX_SPIS##idx##_INST_IDX, \ - }, \ + static void irq_connect##inst(void) \ + { \ + IRQ_CONNECT(DT_INST_IRQN(inst), DT_INST_IRQ(inst, priority), \ + nrfx_spis_irq_handler, &spi_##inst##_data.spis, 0); \ + } \ + PINCTRL_DT_INST_DEFINE(inst); \ + static const struct spi_nrfx_config spi_##inst##z_config = { \ .config = { \ .skip_gpio_cfg = true, \ .skip_psel_cfg = true, \ .mode = NRF_SPIS_MODE_0, \ .bit_order = NRF_SPIS_BIT_ORDER_MSB_FIRST, \ - .orc = SPIS_PROP(idx, overrun_character), \ - .def = SPIS_PROP(idx, def_char), \ + .orc = DT_INST_PROP(inst, overrun_character), \ + .def = DT_INST_PROP(inst, def_char), \ }, \ - .irq_connect = irq_connect##idx, \ - .pcfg = PINCTRL_DT_DEV_CONFIG_GET(SPIS(idx)), \ - .max_buf_len = BIT_MASK(SPIS_PROP(idx, easydma_maxcnt_bits)), \ - .wake_gpio = GPIO_DT_SPEC_GET_OR(SPIS(idx), wake_gpios, {0}), \ - .mem_reg = DMM_DEV_TO_REG(SPIS(idx)), \ - IF_ENABLED(SPIS_PINS_CROSS_DOMAIN(_, /*empty*/, idx, _), \ + .irq_connect = irq_connect##inst, \ + .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \ + .max_buf_len = BIT_MASK(DT_INST_PROP(inst, \ + easydma_maxcnt_bits)), \ + .wake_gpio = GPIO_DT_SPEC_GET_OR(DT_DRV_INST(inst), \ + wake_gpios, {0}), \ + .mem_reg = DMM_DEV_TO_REG(DT_DRV_INST(inst)), \ + IF_ENABLED(SPIS_PINS_CROSS_DOMAIN(inst), \ (.cross_domain = true, \ .default_port = \ - DT_PROP_OR(DT_PHANDLE(SPIS(idx), \ + DT_PROP_OR(DT_INST_PHANDLE(inst, \ default_gpio_port), port, -1),)) \ }; \ - BUILD_ASSERT(!DT_NODE_HAS_PROP(SPIS(idx), wake_gpios) || \ - !(DT_GPIO_FLAGS(SPIS(idx), wake_gpios) & GPIO_ACTIVE_LOW),\ + BUILD_ASSERT(!DT_INST_NODE_HAS_PROP(inst, wake_gpios) || \ + !(DT_GPIO_FLAGS(DT_DRV_INST(inst), wake_gpios) & \ + GPIO_ACTIVE_LOW), \ "WAKE line must be configured as active high"); \ - PM_DEVICE_DT_DEFINE(SPIS(idx), spi_nrfx_pm_action, \ - COND_CODE_1(SPIS_IS_FAST(idx), (0), \ - (PM_DEVICE_ISR_SAFE))); \ - SPI_DEVICE_DT_DEFINE(SPIS(idx), \ - spi_nrfx_init, \ - PM_DEVICE_DT_GET(SPIS(idx)), \ - &spi_##idx##_data, \ - &spi_##idx##z_config, \ - POST_KERNEL, \ - CONFIG_SPI_INIT_PRIORITY, \ - &spi_nrfx_driver_api) - -/* Macro creates device instance if it is enabled in devicetree. */ -#define SPIS_DEVICE(periph, prefix, id, _) \ - IF_ENABLED(CONFIG_HAS_HW_NRF_SPIS##prefix##id, (SPI_NRFX_SPIS_DEFINE(prefix##id);)) - -/* Macro iterates over nrfx_spis instances enabled in the nrfx_config.h. */ -NRFX_FOREACH_ENABLED(SPIS, SPIS_DEVICE, (), (), _) + PM_DEVICE_DT_INST_DEFINE(inst, spi_nrfx_pm_action, \ + SPIS_PM_ISR_SAFE(inst)); \ + SPI_DEVICE_DT_INST_DEFINE(inst, \ + spi_nrfx_init, \ + PM_DEVICE_DT_INST_GET(inst), \ + &spi_##inst##_data, \ + &spi_##inst##z_config, \ + POST_KERNEL, \ + CONFIG_SPI_INIT_PRIORITY, \ + &spi_nrfx_driver_api) + +DT_INST_FOREACH_STATUS_OKAY(SPI_NRFX_SPIS_DEFINE) diff --git a/drivers/timer/Kconfig.nrf_rtc b/drivers/timer/Kconfig.nrf_rtc index 82228d453caf..0300cd00f164 100644 --- a/drivers/timer/Kconfig.nrf_rtc +++ b/drivers/timer/Kconfig.nrf_rtc @@ -9,7 +9,7 @@ config NRF_RTC_TIMER depends on SOC_COMPATIBLE_NRF select TICKLESS_CAPABLE select SYSTEM_TIMER_HAS_DISABLE_SUPPORT - select NRFX_PPI if SOC_NRF52832 + select NRFX_GPPI if SOC_NRF52832 depends on !$(dt_nodelabel_enabled,rtc1) help This module implements a kernel device driver for the nRF Real Time diff --git a/drivers/timer/nrf_grtc_timer.c b/drivers/timer/nrf_grtc_timer.c index 4e1223635085..d8584b0d7fa6 100644 --- a/drivers/timer/nrf_grtc_timer.c +++ b/drivers/timer/nrf_grtc_timer.c @@ -88,9 +88,7 @@ static inline uint64_t counter_sub(uint64_t a, uint64_t b) static inline uint64_t counter(void) { - uint64_t now; - nrfx_grtc_syscounter_get(&now); - return now; + return nrfx_grtc_syscounter_get(); } static inline int get_comparator(uint32_t chan, uint64_t *cc) diff --git a/drivers/timer/nrf_rtc_timer.c b/drivers/timer/nrf_rtc_timer.c index 3db1539f7efe..2abc183ad0b9 100644 --- a/drivers/timer/nrf_rtc_timer.c +++ b/drivers/timer/nrf_rtc_timer.c @@ -23,7 +23,7 @@ #define CUSTOM_COUNTER_BIT_WIDTH 1 #define WRAP_CH 0 #define SYS_CLOCK_CH 1 -#include "nrfx_ppi.h" +#include "helpers/nrfx_gppi.h" #else #define CUSTOM_COUNTER_BIT_WIDTH 0 #define SYS_CLOCK_CH 0 @@ -806,8 +806,8 @@ static int sys_clock_driver_init(void) alloc_mask &= ~BIT(WRAP_CH); nrf_rtc_event_t evt = NRF_RTC_CHANNEL_EVENT_ADDR(WRAP_CH); - nrfx_err_t result; - nrf_ppi_channel_t ch; + int result; + nrfx_gppi_handle_t handle; nrfy_rtc_event_enable(RTC, NRF_RTC_CHANNEL_INT_MASK(WRAP_CH)); nrfy_rtc_cc_set(RTC, WRAP_CH, COUNTER_MAX); @@ -817,12 +817,11 @@ static int sys_clock_driver_init(void) evt_addr = nrfy_rtc_event_address_get(RTC, evt); task_addr = nrfy_rtc_task_address_get(RTC, NRF_RTC_TASK_CLEAR); - result = nrfx_ppi_channel_alloc(&ch); - if (result != NRFX_SUCCESS) { - return -ENODEV; + result = nrfx_gppi_conn_alloc(evt_addr, task_addr, &handle); + if (result < 0) { + return result; } - (void)nrfx_ppi_channel_assign(ch, evt_addr, task_addr); - (void)nrfx_ppi_channel_enable(ch); + nrfx_gppi_conn_enable(handle); #endif return 0; } diff --git a/drivers/usb/common/nrf_usbd_common/nrf_usbd_common_errata.h b/drivers/usb/common/nrf_usbd_common/nrf_usbd_common_errata.h index 0ee23ccd2c56..338818d4999b 100644 --- a/drivers/usb/common/nrf_usbd_common/nrf_usbd_common_errata.h +++ b/drivers/usb/common/nrf_usbd_common/nrf_usbd_common_errata.h @@ -12,7 +12,6 @@ #define NRF_USBD_COMMON_ERRATA_H__ #include -#include #ifndef NRF_USBD_COMMON_ERRATA_ENABLE /** diff --git a/drivers/usb/udc/udc_dwc2_vendor_quirks.h b/drivers/usb/udc/udc_dwc2_vendor_quirks.h index 330ff8d113f1..4fdcea5ff4fe 100644 --- a/drivers/usb/udc/udc_dwc2_vendor_quirks.h +++ b/drivers/usb/udc/udc_dwc2_vendor_quirks.h @@ -316,7 +316,7 @@ DT_INST_FOREACH_STATUS_OKAY(QUIRK_NRF_USBHS_DEFINE) #define USBHS_DT_WRAPPER_REG_ADDR(n) UINT_TO_POINTER(DT_INST_REG_ADDR_BY_NAME(n, wrapper)) -#include +#include #include #include #include diff --git a/drivers/watchdog/Kconfig.nrfx b/drivers/watchdog/Kconfig.nrfx index d4deeda225ca..fea7f1ee6365 100644 --- a/drivers/watchdog/Kconfig.nrfx +++ b/drivers/watchdog/Kconfig.nrfx @@ -7,15 +7,7 @@ config WDT_NRFX bool "nRF WDT nrfx driver" default y depends on DT_HAS_NORDIC_NRF_WDT_ENABLED - select NRFX_WDT0 if HAS_HW_NRF_WDT0 - select NRFX_WDT1 if HAS_HW_NRF_WDT1 - select NRFX_WDT30 if HAS_HW_NRF_WDT30 - select NRFX_WDT31 if HAS_HW_NRF_WDT31 - select NRFX_WDT010 if HAS_HW_NRF_WDT010 - select NRFX_WDT011 if HAS_HW_NRF_WDT011 - select NRFX_WDT130 if HAS_HW_NRF_WDT130 - select NRFX_WDT131 if HAS_HW_NRF_WDT131 - select NRFX_WDT132 if HAS_HW_NRF_WDT132 + select NRFX_WDT help Enable support for nrfx WDT driver for nRF MCU series. diff --git a/drivers/watchdog/wdt_nrfx.c b/drivers/watchdog/wdt_nrfx.c index 4459b7fac6d0..fa1d45907c69 100644 --- a/drivers/watchdog/wdt_nrfx.c +++ b/drivers/watchdog/wdt_nrfx.c @@ -4,6 +4,8 @@ * SPDX-License-Identifier: Apache-2.0 */ +#define DT_DRV_COMPAT nordic_nrf_wdt + #include #include #include @@ -19,6 +21,7 @@ LOG_MODULE_REGISTER(wdt_nrfx); #endif struct wdt_nrfx_data { + nrfx_wdt_t wdt; wdt_callback_t m_callbacks[NRF_WDT_CHANNEL_NUMBER]; uint32_t m_timeout; uint8_t m_allocated_channels; @@ -28,15 +31,10 @@ struct wdt_nrfx_data { #endif }; -struct wdt_nrfx_config { - nrfx_wdt_t wdt; -}; - static int wdt_nrf_setup(const struct device *dev, uint8_t options) { - const struct wdt_nrfx_config *config = dev->config; struct wdt_nrfx_data *data = dev->data; - nrfx_err_t err_code; + int err_code; nrfx_wdt_config_t wdt_config = { .reload_value = data->m_timeout @@ -54,13 +52,13 @@ static int wdt_nrf_setup(const struct device *dev, uint8_t options) wdt_config.behaviour |= NRF_WDT_BEHAVIOUR_RUN_HALT_MASK; } - err_code = nrfx_wdt_reconfigure(&config->wdt, &wdt_config); + err_code = nrfx_wdt_reconfigure(&data->wdt, &wdt_config); - if (err_code != NRFX_SUCCESS) { - return -EBUSY; + if (err_code < 0) { + return err_code; } - nrfx_wdt_enable(&config->wdt); + nrfx_wdt_enable(&data->wdt); data->enabled = true; return 0; @@ -69,23 +67,22 @@ static int wdt_nrf_setup(const struct device *dev, uint8_t options) static int wdt_nrf_disable(const struct device *dev) { #if NRFX_WDT_HAS_STOP - const struct wdt_nrfx_config *config = dev->config; struct wdt_nrfx_data *data = dev->data; - nrfx_err_t err_code; + int err_code; int channel_id; - err_code = nrfx_wdt_stop(&config->wdt); + err_code = nrfx_wdt_stop(&data->wdt); - if (err_code != NRFX_SUCCESS) { + if (err_code < 0) { /* This can only happen if wdt_nrf_setup() is not called first. */ - return -EFAULT; + return err_code; } #if defined(WDT_NRFX_SYNC_STOP) k_sem_take(&data->sync_stop, K_FOREVER); #endif - nrfx_wdt_channels_free(&config->wdt); + nrfx_wdt_channels_free(&data->wdt); for (channel_id = 0; channel_id < data->m_allocated_channels; channel_id++) { data->m_callbacks[channel_id] = NULL; @@ -103,9 +100,8 @@ static int wdt_nrf_disable(const struct device *dev) static int wdt_nrf_install_timeout(const struct device *dev, const struct wdt_timeout_cfg *cfg) { - const struct wdt_nrfx_config *config = dev->config; struct wdt_nrfx_data *data = dev->data; - nrfx_err_t err_code; + int err_code; nrfx_wdt_channel_id channel_id; if (data->enabled) { @@ -125,10 +121,10 @@ static int wdt_nrf_install_timeout(const struct device *dev, * in all nRF chips can use reload values (determining * the timeout) from range 0xF-0xFFFFFFFF given in 32768 Hz * clock ticks. This makes the allowed range of 0x1-0x07CFFFFF - * in milliseconds. Check if the provided value is within - * this range. + * in milliseconds, defined using NRF_WDT_RR_VALUE_MS symbol. + * Check if the provided value is within this range. */ - if ((cfg->window.max == 0U) || (cfg->window.max > 0x07CFFFFF)) { + if ((cfg->window.max == 0U) || (cfg->window.max > NRF_WDT_RR_VALUE_MS)) { return -EINVAL; } @@ -138,11 +134,11 @@ static int wdt_nrf_install_timeout(const struct device *dev, return -EINVAL; } - err_code = nrfx_wdt_channel_alloc(&config->wdt, + err_code = nrfx_wdt_channel_alloc(&data->wdt, &channel_id); - if (err_code == NRFX_ERROR_NO_MEM) { - return -ENOMEM; + if (err_code == -ENOMEM) { + return err_code; } if (cfg->callback != NULL) { @@ -155,7 +151,6 @@ static int wdt_nrf_install_timeout(const struct device *dev, static int wdt_nrf_feed(const struct device *dev, int channel_id) { - const struct wdt_nrfx_config *config = dev->config; struct wdt_nrfx_data *data = dev->data; if ((channel_id >= data->m_allocated_channels) || (channel_id < 0)) { @@ -166,7 +161,7 @@ static int wdt_nrf_feed(const struct device *dev, int channel_id) return -EAGAIN; } - nrfx_wdt_channel_feed(&config->wdt, + nrfx_wdt_channel_feed(&data->wdt, (nrfx_wdt_channel_id)channel_id); return 0; @@ -205,84 +200,46 @@ static void wdt_event_handler(const struct device *dev, nrf_wdt_event_t event_ty #define WDT(idx) DT_NODELABEL(wdt##idx) -#define WDT_NRFX_WDT_IRQ(idx) \ +#define WDT_NRFX_WDT_IRQ(inst) \ COND_CODE_1(CONFIG_WDT_NRFX_NO_IRQ, \ (), \ - (IRQ_CONNECT(DT_IRQN(WDT(idx)), DT_IRQ(WDT(idx), priority), \ - nrfx_isr, nrfx_wdt_##idx##_irq_handler, 0))) + (IRQ_CONNECT(DT_INST_IRQN(inst), DT_INST_IRQ(inst, priority), \ + nrfx_wdt_irq_handler, &wdt_##inst##_data.wdt, 0))) -#define WDT_NRFX_WDT_DEVICE(idx) \ - static void wdt_##idx##_event_handler(nrf_wdt_event_t event_type, \ - uint32_t requests, \ - void *p_context) \ +#define WDT_NRFX_WDT_DEVICE(inst) \ + static void wdt_##inst##_event_handler(nrf_wdt_event_t event_type, \ + uint32_t requests, \ + void *p_context) \ { \ - wdt_event_handler(DEVICE_DT_GET(WDT(idx)), event_type, \ + wdt_event_handler(DEVICE_DT_INST_GET(inst), event_type, \ requests, p_context); \ } \ - static int wdt_##idx##_init(const struct device *dev) \ + static struct wdt_nrfx_data wdt_##inst##_data = { \ + .wdt = NRFX_WDT_INSTANCE(DT_INST_REG_ADDR(inst)), \ + IF_ENABLED(WDT_NRFX_SYNC_STOP, \ + (.sync_stop = Z_SEM_INITIALIZER( \ + wdt_##inst##_data.sync_stop, 0, 1),)) \ + }; \ + static int wdt_##inst##_init(const struct device *dev) \ { \ - const struct wdt_nrfx_config *config = dev->config; \ - nrfx_err_t err_code; \ - WDT_NRFX_WDT_IRQ(idx); \ - err_code = nrfx_wdt_init(&config->wdt, \ + int err_code; \ + struct wdt_nrfx_data *data = dev->data; \ + WDT_NRFX_WDT_IRQ(inst); \ + err_code = nrfx_wdt_init(&data->wdt, \ NULL, \ IS_ENABLED(CONFIG_WDT_NRFX_NO_IRQ) \ ? NULL \ - : wdt_##idx##_event_handler, \ + : wdt_##inst##_event_handler, \ NULL); \ - if (err_code != NRFX_SUCCESS) { \ - return -EBUSY; \ - } \ - return 0; \ + return err_code; \ } \ - static struct wdt_nrfx_data wdt_##idx##_data = { \ - IF_ENABLED(WDT_NRFX_SYNC_STOP, \ - (.sync_stop = Z_SEM_INITIALIZER( \ - wdt_##idx##_data.sync_stop, 0, 1),)) \ - }; \ - static const struct wdt_nrfx_config wdt_##idx##z_config = { \ - .wdt = NRFX_WDT_INSTANCE(idx), \ - }; \ - DEVICE_DT_DEFINE(WDT(idx), \ - wdt_##idx##_init, \ - NULL, \ - &wdt_##idx##_data, \ - &wdt_##idx##z_config, \ - PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \ - &wdt_nrfx_driver_api) - -#ifdef CONFIG_HAS_HW_NRF_WDT0 -WDT_NRFX_WDT_DEVICE(0); -#endif - -#ifdef CONFIG_HAS_HW_NRF_WDT1 -WDT_NRFX_WDT_DEVICE(1); -#endif - -#ifdef CONFIG_HAS_HW_NRF_WDT30 -WDT_NRFX_WDT_DEVICE(30); -#endif - -#ifdef CONFIG_HAS_HW_NRF_WDT31 -WDT_NRFX_WDT_DEVICE(31); -#endif - -#ifdef CONFIG_HAS_HW_NRF_WDT010 -WDT_NRFX_WDT_DEVICE(010); -#endif - -#ifdef CONFIG_HAS_HW_NRF_WDT011 -WDT_NRFX_WDT_DEVICE(011); -#endif - -#ifdef CONFIG_HAS_HW_NRF_WDT130 -WDT_NRFX_WDT_DEVICE(130); -#endif - -#ifdef CONFIG_HAS_HW_NRF_WDT131 -WDT_NRFX_WDT_DEVICE(131); -#endif - -#ifdef CONFIG_HAS_HW_NRF_WDT132 -WDT_NRFX_WDT_DEVICE(132); -#endif + DEVICE_DT_INST_DEFINE(inst, \ + wdt_##inst##_init, \ + NULL, \ + &wdt_##inst##_data, \ + NULL, \ + PRE_KERNEL_1, \ + CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \ + &wdt_nrfx_driver_api) + +DT_INST_FOREACH_STATUS_OKAY(WDT_NRFX_WDT_DEVICE) diff --git a/dts/arm/nordic/nrf51822.dtsi b/dts/arm/nordic/nrf51822.dtsi index cbfef90faa5b..cdeb0853b50d 100644 --- a/dts/arm/nordic/nrf51822.dtsi +++ b/dts/arm/nordic/nrf51822.dtsi @@ -73,6 +73,20 @@ status = "okay"; }; + hfclk: hfclk@40000000 { + compatible = "nordic,nrf-clock-hfclk"; + reg = <0x40000000 0x1000>; + interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; + status = "okay"; + }; + + lfclk: lfclk@40000000 { + compatible = "nordic,nrf-clock-lfclk"; + reg = <0x40000000 0x1000>; + interrupts = <5 NRF_DEFAULT_IRQ_PRIORITY>; + status = "okay"; + }; + nrf_mpu: nrf-mpu@40000000 { compatible = "nordic,nrf-mpu"; reg = <0x40000000 0x1000>; diff --git a/dts/arm/nordic/nrf52805.dtsi b/dts/arm/nordic/nrf52805.dtsi index 2134605c9f86..11263f086492 100644 --- a/dts/arm/nordic/nrf52805.dtsi +++ b/dts/arm/nordic/nrf52805.dtsi @@ -6,7 +6,7 @@ #include #include -#include +#include #include / { @@ -61,6 +61,20 @@ status = "okay"; }; + hfclk: hfclk@40000000 { + compatible = "nordic,nrf-clock-hfclk"; + reg = <0x40000000 0x1000>; + interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; + status = "okay"; + }; + + lfclk: lfclk@40000000 { + compatible = "nordic,nrf-clock-lfclk"; + reg = <0x40000000 0x1000>; + interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; + status = "okay"; + }; + power: power@40000000 { compatible = "nordic,nrf-power"; reg = <0x40000000 0x1000>; diff --git a/dts/arm/nordic/nrf52810.dtsi b/dts/arm/nordic/nrf52810.dtsi index 6e09220e78bb..7cbd95aa1399 100644 --- a/dts/arm/nordic/nrf52810.dtsi +++ b/dts/arm/nordic/nrf52810.dtsi @@ -2,7 +2,7 @@ #include #include -#include +#include #include / { @@ -65,6 +65,20 @@ status = "okay"; }; + hfclk: hfclk@40000000 { + compatible = "nordic,nrf-clock-hfclk"; + reg = <0x40000000 0x1000>; + interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; + status = "okay"; + }; + + lfclk: lfclk@40000000 { + compatible = "nordic,nrf-clock-lfclk"; + reg = <0x40000000 0x1000>; + interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; + status = "okay"; + }; + power: power@40000000 { compatible = "nordic,nrf-power"; reg = <0x40000000 0x1000>; diff --git a/dts/arm/nordic/nrf52811.dtsi b/dts/arm/nordic/nrf52811.dtsi index 12d0a0ea4d6f..0f3760b3e1f3 100644 --- a/dts/arm/nordic/nrf52811.dtsi +++ b/dts/arm/nordic/nrf52811.dtsi @@ -6,7 +6,7 @@ #include #include -#include +#include #include / { @@ -69,6 +69,20 @@ status = "okay"; }; + hfclk: hfclk@40000000 { + compatible = "nordic,nrf-clock-hfclk"; + reg = <0x40000000 0x1000>; + interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; + status = "okay"; + }; + + lfclk: lfclk@40000000 { + compatible = "nordic,nrf-clock-lfclk"; + reg = <0x40000000 0x1000>; + interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; + status = "okay"; + }; + power: power@40000000 { compatible = "nordic,nrf-power"; reg = <0x40000000 0x1000>; diff --git a/dts/arm/nordic/nrf52820.dtsi b/dts/arm/nordic/nrf52820.dtsi index d15fbb2ae4e3..1ccab1d279e5 100644 --- a/dts/arm/nordic/nrf52820.dtsi +++ b/dts/arm/nordic/nrf52820.dtsi @@ -69,6 +69,20 @@ status = "okay"; }; + hfclk: hfclk@40000000 { + compatible = "nordic,nrf-clock-hfclk"; + reg = <0x40000000 0x1000>; + interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; + status = "okay"; + }; + + lfclk: lfclk@40000000 { + compatible = "nordic,nrf-clock-lfclk"; + reg = <0x40000000 0x1000>; + interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; + status = "okay"; + }; + power: power@40000000 { compatible = "nordic,nrf-power"; reg = <0x40000000 0x1000>; diff --git a/dts/arm/nordic/nrf52832.dtsi b/dts/arm/nordic/nrf52832.dtsi index eef2297c43b1..c5bacd79ea86 100644 --- a/dts/arm/nordic/nrf52832.dtsi +++ b/dts/arm/nordic/nrf52832.dtsi @@ -2,7 +2,7 @@ #include #include -#include +#include #include / { @@ -65,6 +65,20 @@ status = "okay"; }; + hfclk: hfclk@40000000 { + compatible = "nordic,nrf-clock-hfclk"; + reg = <0x40000000 0x1000>; + interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; + status = "okay"; + }; + + lfclk: lfclk@40000000 { + compatible = "nordic,nrf-clock-lfclk"; + reg = <0x40000000 0x1000>; + interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; + status = "okay"; + }; + power: power@40000000 { compatible = "nordic,nrf-power"; reg = <0x40000000 0x1000>; diff --git a/dts/arm/nordic/nrf52833.dtsi b/dts/arm/nordic/nrf52833.dtsi index 1b3620aa01cb..cfe9573d1677 100644 --- a/dts/arm/nordic/nrf52833.dtsi +++ b/dts/arm/nordic/nrf52833.dtsi @@ -6,7 +6,7 @@ #include #include -#include +#include #include / { @@ -69,6 +69,20 @@ status = "okay"; }; + hfclk: hfclk@40000000 { + compatible = "nordic,nrf-clock-hfclk"; + reg = <0x40000000 0x1000>; + interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; + status = "okay"; + }; + + lfclk: lfclk@40000000 { + compatible = "nordic,nrf-clock-lfclk"; + reg = <0x40000000 0x1000>; + interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; + status = "okay"; + }; + power: power@40000000 { compatible = "nordic,nrf-power"; reg = <0x40000000 0x1000>; diff --git a/dts/arm/nordic/nrf52840.dtsi b/dts/arm/nordic/nrf52840.dtsi index f19383ba7e75..2f32a4f339a8 100644 --- a/dts/arm/nordic/nrf52840.dtsi +++ b/dts/arm/nordic/nrf52840.dtsi @@ -2,7 +2,7 @@ #include #include -#include +#include #include / { @@ -65,6 +65,20 @@ status = "okay"; }; + hfclk: hfclk@40000000 { + compatible = "nordic,nrf-clock-hfclk"; + reg = <0x40000000 0x1000>; + interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; + status = "okay"; + }; + + lfclk: lfclk@40000000 { + compatible = "nordic,nrf-clock-lfclk"; + reg = <0x40000000 0x1000>; + interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; + status = "okay"; + }; + power: power@40000000 { compatible = "nordic,nrf-power"; reg = <0x40000000 0x1000>; diff --git a/dts/arm/nordic/nrf5340_cpuapp.dtsi b/dts/arm/nordic/nrf5340_cpuapp.dtsi index b4c077ea2bf4..15d4f487f821 100644 --- a/dts/arm/nordic/nrf5340_cpuapp.dtsi +++ b/dts/arm/nordic/nrf5340_cpuapp.dtsi @@ -6,7 +6,7 @@ #include #include -#include +#include / { cpus { diff --git a/dts/arm/nordic/nrf5340_cpuapp_peripherals.dtsi b/dts/arm/nordic/nrf5340_cpuapp_peripherals.dtsi index 7021b7eedeb1..1cb15d053e50 100644 --- a/dts/arm/nordic/nrf5340_cpuapp_peripherals.dtsi +++ b/dts/arm/nordic/nrf5340_cpuapp_peripherals.dtsi @@ -68,6 +68,27 @@ clock: clock@5000 { status = "okay"; }; +hfclk: hfclk@5000 { + compatible = "nordic,nrf-clock-hfclk"; + reg = <0x5000 0x1000>; + interrupts = <5 NRF_DEFAULT_IRQ_PRIORITY>; + status = "okay"; +}; + +lfclk: lfclk@5000 { + compatible = "nordic,nrf-clock-lfclk"; + reg = <0x5000 0x1000>; + interrupts = <5 NRF_DEFAULT_IRQ_PRIORITY>; + status = "okay"; +}; + +hfclk192m: hfclk192m@5000 { + compatible = "nordic,nrf-clock-hfclk192m"; + reg = <0x5000 0x1000>; + interrupts = <5 NRF_DEFAULT_IRQ_PRIORITY>; + status = "okay"; +}; + power: power@5000 { compatible = "nordic,nrf-power"; reg = <0x5000 0x1000>; diff --git a/dts/arm/nordic/nrf5340_cpuappns.dtsi b/dts/arm/nordic/nrf5340_cpuappns.dtsi index 763e9ca7839b..25b2d870c111 100644 --- a/dts/arm/nordic/nrf5340_cpuappns.dtsi +++ b/dts/arm/nordic/nrf5340_cpuappns.dtsi @@ -8,7 +8,7 @@ #include #include -#include +#include / { cpus { diff --git a/dts/arm/nordic/nrf5340_cpunet.dtsi b/dts/arm/nordic/nrf5340_cpunet.dtsi index be0fad16d66b..054184fb6c42 100644 --- a/dts/arm/nordic/nrf5340_cpunet.dtsi +++ b/dts/arm/nordic/nrf5340_cpunet.dtsi @@ -62,6 +62,20 @@ status = "okay"; }; + hfclk: hfclk@41005000 { + compatible = "nordic,nrf-clock-hfclk"; + reg = <0x41005000 0x1000>; + interrupts = <5 NRF_DEFAULT_IRQ_PRIORITY>; + status = "okay"; + }; + + lfclk: lfclk@41005000 { + compatible = "nordic,nrf-clock-lfclk"; + reg = <0x41005000 0x1000>; + interrupts = <5 NRF_DEFAULT_IRQ_PRIORITY>; + status = "okay"; + }; + power: power@41005000 { compatible = "nordic,nrf-power"; reg = <0x41005000 0x1000>; diff --git a/dts/arm/nordic/nrf91.dtsi b/dts/arm/nordic/nrf91.dtsi index 7b7d48916519..9bcac2bd929f 100644 --- a/dts/arm/nordic/nrf91.dtsi +++ b/dts/arm/nordic/nrf91.dtsi @@ -6,7 +6,7 @@ #include #include -#include +#include / { cpus { diff --git a/dts/arm/nordic/nrf91_peripherals.dtsi b/dts/arm/nordic/nrf91_peripherals.dtsi index 476f8415853a..969c0925dc58 100644 --- a/dts/arm/nordic/nrf91_peripherals.dtsi +++ b/dts/arm/nordic/nrf91_peripherals.dtsi @@ -344,6 +344,20 @@ clock: clock@5000 { status = "okay"; }; +hfclk: hfclk@5000 { + compatible = "nordic,nrf-clock-hfclk"; + reg = <0x5000 0x1000>; + interrupts = <5 NRF_DEFAULT_IRQ_PRIORITY>; + status = "okay"; +}; + +lfclk: lfclk@5000 { + compatible = "nordic,nrf-clock-lfclk"; + reg = <0x5000 0x1000>; + interrupts = <5 NRF_DEFAULT_IRQ_PRIORITY>; + status = "okay"; +}; + power: power@5000 { compatible = "nordic,nrf-power"; reg = <0x5000 0x1000>; diff --git a/dts/arm/nordic/nrf91ns.dtsi b/dts/arm/nordic/nrf91ns.dtsi index e44bbcde0a43..9ab22c6f7ca3 100644 --- a/dts/arm/nordic/nrf91ns.dtsi +++ b/dts/arm/nordic/nrf91ns.dtsi @@ -6,7 +6,7 @@ #include #include -#include +#include / { cpus { diff --git a/dts/bindings/clock/nordic,nrf-clock-hfclk.yaml b/dts/bindings/clock/nordic,nrf-clock-hfclk.yaml new file mode 100644 index 000000000000..371acddc9826 --- /dev/null +++ b/dts/bindings/clock/nordic,nrf-clock-hfclk.yaml @@ -0,0 +1,15 @@ +# Copyright (c) 2025 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +description: Nordic nRF hfclk clock control node + +compatible: "nordic,nrf-clock-hfclk" + +include: base.yaml + +properties: + reg: + required: true + + interrupts: + required: true diff --git a/dts/bindings/clock/nordic,nrf-clock-hfclk192m.yaml b/dts/bindings/clock/nordic,nrf-clock-hfclk192m.yaml new file mode 100644 index 000000000000..beba070cdee5 --- /dev/null +++ b/dts/bindings/clock/nordic,nrf-clock-hfclk192m.yaml @@ -0,0 +1,15 @@ +# Copyright (c) 2025 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +description: Nordic nRF hfclk192m clock control node + +compatible: "nordic,nrf-clock-hfclk192m" + +include: base.yaml + +properties: + reg: + required: true + + interrupts: + required: true diff --git a/dts/bindings/clock/nordic,nrf-clock-lfclk.yaml b/dts/bindings/clock/nordic,nrf-clock-lfclk.yaml new file mode 100644 index 000000000000..78dca8e9c7c6 --- /dev/null +++ b/dts/bindings/clock/nordic,nrf-clock-lfclk.yaml @@ -0,0 +1,15 @@ +# Copyright (c) 2025 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +description: Nordic nRF lfclk clock control node + +compatible: "nordic,nrf-clock-lfclk" + +include: base.yaml + +properties: + reg: + required: true + + interrupts: + required: true diff --git a/dts/bindings/clock/nordic,nrf-clock-xo.yaml b/dts/bindings/clock/nordic,nrf-clock-xo.yaml new file mode 100644 index 000000000000..3032d84f6383 --- /dev/null +++ b/dts/bindings/clock/nordic,nrf-clock-xo.yaml @@ -0,0 +1,15 @@ +# Copyright (c) 2025 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +description: Nordic nRF xo clock control node + +compatible: "nordic,nrf-clock-xo" + +include: base.yaml + +properties: + reg: + required: true + + interrupts: + required: true diff --git a/dts/bindings/clock/nordic,nrf-clock-xo24m.yaml b/dts/bindings/clock/nordic,nrf-clock-xo24m.yaml new file mode 100644 index 000000000000..ff520a95907a --- /dev/null +++ b/dts/bindings/clock/nordic,nrf-clock-xo24m.yaml @@ -0,0 +1,15 @@ +# Copyright (c) 2025 Nordic Semiconductor ASA +# SPDX-License-Identifier: Apache-2.0 + +description: Nordic nRF xo24m clock control node + +compatible: "nordic,nrf-clock-xo24m" + +include: base.yaml + +properties: + reg: + required: true + + interrupts: + required: true diff --git a/dts/bindings/clock/nordic,nrf-lfclk.yaml b/dts/bindings/clock/nordic,nrf-lfclk.yaml index a0f95d6c9277..b01ee2e699af 100644 --- a/dts/bindings/clock/nordic,nrf-lfclk.yaml +++ b/dts/bindings/clock/nordic,nrf-lfclk.yaml @@ -27,7 +27,7 @@ description: | clock-names = "hfxo", "lfxo"; }; -compatible: "nordic,nrf-lfclk" +compatible: "nordic,nrfs-lfclk" include: fixed-clock.yaml diff --git a/dts/bindings/comparator/nordic,nrf-comp.yaml b/dts/bindings/comparator/nordic,nrf-comp.yaml index e4f6838d2049..f1405a6de2c9 100644 --- a/dts/bindings/comparator/nordic,nrf-comp.yaml +++ b/dts/bindings/comparator/nordic,nrf-comp.yaml @@ -25,7 +25,7 @@ description: | &comp { status = "okay"; main-mode = "SE"; - psel = "AIN0"; + psel = ; refsel = "INT_1V2"; sp-mode = "NORMAL"; th-up = <36>; @@ -39,7 +39,7 @@ description: | &comp { ... refsel = "AREF"; - extrefsel = "AIN1"; + extrefsel = ; ... }; @@ -49,8 +49,8 @@ description: | &comp { status = "okay"; main-mode = "DIFF"; - psel = "AIN0"; - extrefsel = "AIN1"; + psel = ; + extrefsel = ; sp-mode = "NORMAL"; enable-hyst; isource = "DISABLED"; @@ -68,30 +68,10 @@ properties: - "DIFF" psel: - type: string - enum: - - "AIN0" - - "AIN1" - - "AIN2" - - "AIN3" - - "AIN4" - - "AIN5" - - "AIN6" - - "AIN7" - - "VDD_DIV2" - - "VDDH_DIV5" + type: int extrefsel: - type: string - enum: - - "AIN0" - - "AIN1" - - "AIN2" - - "AIN3" - - "AIN4" - - "AIN5" - - "AIN6" - - "AIN7" + type: int refsel: type: string diff --git a/dts/bindings/comparator/nordic,nrf-lpcomp.yaml b/dts/bindings/comparator/nordic,nrf-lpcomp.yaml index 64a30b330d8b..4995155ed76b 100644 --- a/dts/bindings/comparator/nordic,nrf-lpcomp.yaml +++ b/dts/bindings/comparator/nordic,nrf-lpcomp.yaml @@ -21,7 +21,7 @@ description: | &comp { status = "okay"; - psel = "AIN0"; + psel = ; refsel = "VDD_4_8"; enable-hyst; }; @@ -32,7 +32,7 @@ description: | &comp { ... refsel = "AREF"; - extrefsel = "AIN1"; + extrefsel = ; ... }; @@ -42,22 +42,10 @@ include: base.yaml properties: psel: - type: string - enum: - - "AIN0" - - "AIN1" - - "AIN2" - - "AIN3" - - "AIN4" - - "AIN5" - - "AIN6" - - "AIN7" + type: int extrefsel: - type: string - enum: - - "AIN0" - - "AIN1" + type: int refsel: type: string diff --git a/dts/bindings/spi/nordic,nrf-spim.yaml b/dts/bindings/spi/nordic,nrf-spim.yaml index 5e95de3e1e0d..673fcf288b2e 100644 --- a/dts/bindings/spi/nordic,nrf-spim.yaml +++ b/dts/bindings/spi/nordic,nrf-spim.yaml @@ -8,13 +8,6 @@ compatible: "nordic,nrf-spim" include: ["nordic,nrf-spi-common.yaml", "memory-region.yaml"] properties: - anomaly-58-workaround: - type: boolean - description: | - Enables the workaround for the nRF52832 SoC SPIM PAN 58 anomaly. - Must be used in conjunction with - CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58=y - rx-delay-supported: type: boolean description: | diff --git a/dts/vendor/nordic/nrf54h20.dtsi b/dts/vendor/nordic/nrf54h20.dtsi index 4644cb383ec5..a08ee6f52668 100644 --- a/dts/vendor/nordic/nrf54h20.dtsi +++ b/dts/vendor/nordic/nrf54h20.dtsi @@ -7,7 +7,7 @@ #include #include -#include +#include #include #include #include @@ -192,11 +192,10 @@ }; lfclk: lfclk { - compatible = "nordic,nrf-lfclk"; - status = "disabled"; + compatible = "nordic,nrfs-lfclk"; + status = "disabled"; #clock-cells = <0>; clock-frequency = <32768>; - status = "okay"; lfrc-accuracy-ppm = <500>; lflprc-accuracy-ppm = <1000>; lfrc-startup-time-us = <200>; /* To be measured */ diff --git a/dts/vendor/nordic/nrf54l09.dtsi b/dts/vendor/nordic/nrf54l09.dtsi index 90ecc49b877c..1558dfeadee4 100644 --- a/dts/vendor/nordic/nrf54l09.dtsi +++ b/dts/vendor/nordic/nrf54l09.dtsi @@ -6,7 +6,7 @@ #include #include -#include +#include #include /delete-node/ &sw_pwm; diff --git a/dts/vendor/nordic/nrf54l20.dtsi b/dts/vendor/nordic/nrf54l20.dtsi index bee70effa0e8..38a4c4e55601 100644 --- a/dts/vendor/nordic/nrf54l20.dtsi +++ b/dts/vendor/nordic/nrf54l20.dtsi @@ -6,7 +6,7 @@ #include #include -#include +#include #include /delete-node/ &sw_pwm; diff --git a/dts/vendor/nordic/nrf54l_05_10_15.dtsi b/dts/vendor/nordic/nrf54l_05_10_15.dtsi index 95c273750387..da5ca7260e4a 100644 --- a/dts/vendor/nordic/nrf54l_05_10_15.dtsi +++ b/dts/vendor/nordic/nrf54l_05_10_15.dtsi @@ -6,7 +6,7 @@ #include #include -#include +#include #include /delete-node/ &sw_pwm; @@ -639,6 +639,20 @@ status = "disabled"; }; + xo: xo@10e000 { + compatible = "nordic,nrf-clock-xo"; + reg = <0x10e000 0x1000>; + interrupts = <261 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; + + lfclk: lfclk@10e000 { + compatible = "nordic,nrf-clock-lfclk"; + reg = <0x10e000 0x1000>; + interrupts = <261 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; + power: power@10e000 { compatible = "nordic,nrf-power"; reg = <0x10e000 0x1000>; diff --git a/dts/vendor/nordic/nrf54lm20a.dtsi b/dts/vendor/nordic/nrf54lm20a.dtsi index d1e6d1b0d28a..71f0616620bc 100644 --- a/dts/vendor/nordic/nrf54lm20a.dtsi +++ b/dts/vendor/nordic/nrf54lm20a.dtsi @@ -6,7 +6,7 @@ #include #include -#include +#include #include /delete-node/ &sw_pwm; @@ -791,6 +791,27 @@ status = "disabled"; }; + xo: xo@10e000 { + compatible = "nordic,nrf-clock-xo"; + reg = <0x10e000 0x1000>; + interrupts = <261 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; + + lfclk: lfclk@10e000 { + compatible = "nordic,nrf-clock-lfclk"; + reg = <0x10e000 0x1000>; + interrupts = <261 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; + + xo24m: xo24m@10e000 { + compatible = "nordic,nrf-clock-xo24m"; + reg = <0x10e000 0x1000>; + interrupts = <270 NRF_DEFAULT_IRQ_PRIORITY>; + status = "disabled"; + }; + power: power@10e000 { compatible = "nordic,nrf-power"; reg = <0x10e000 0x1000>; diff --git a/dts/vendor/nordic/nrf9280.dtsi b/dts/vendor/nordic/nrf9280.dtsi index fb27488e9dc4..e1a448292efa 100644 --- a/dts/vendor/nordic/nrf9280.dtsi +++ b/dts/vendor/nordic/nrf9280.dtsi @@ -6,7 +6,7 @@ #include #include -#include +#include #include #include #include diff --git a/include/zephyr/drivers/comparator/nrf_comp.h b/include/zephyr/drivers/comparator/nrf_comp.h index 59e1cbbb3ce9..09c870f9a33c 100644 --- a/include/zephyr/drivers/comparator/nrf_comp.h +++ b/include/zephyr/drivers/comparator/nrf_comp.h @@ -7,56 +7,13 @@ #ifndef ZEPHYR_INCLUDE_DRIVERS_COMP_NRF_COMP_H_ #define ZEPHYR_INCLUDE_DRIVERS_COMP_NRF_COMP_H_ +#include #include #ifdef __cplusplus extern "C" { #endif -/** Positive input selection */ -enum comp_nrf_comp_psel { - /** AIN0 external input */ - COMP_NRF_COMP_PSEL_AIN0, - /** AIN1 external input */ - COMP_NRF_COMP_PSEL_AIN1, - /** AIN2 external input */ - COMP_NRF_COMP_PSEL_AIN2, - /** AIN3 external input */ - COMP_NRF_COMP_PSEL_AIN3, - /** AIN4 external input */ - COMP_NRF_COMP_PSEL_AIN4, - /** AIN5 external input */ - COMP_NRF_COMP_PSEL_AIN5, - /** AIN6 external input */ - COMP_NRF_COMP_PSEL_AIN6, - /** AIN7 external input */ - COMP_NRF_COMP_PSEL_AIN7, - /** VDD / 2 */ - COMP_NRF_COMP_PSEL_VDD_DIV2, - /** VDDH / 5 */ - COMP_NRF_COMP_PSEL_VDDH_DIV5, -}; - -/** External reference selection */ -enum comp_nrf_comp_extrefsel { - /** AIN0 external input */ - COMP_NRF_COMP_EXTREFSEL_AIN0, - /** AIN1 external input */ - COMP_NRF_COMP_EXTREFSEL_AIN1, - /** AIN2 external input */ - COMP_NRF_COMP_EXTREFSEL_AIN2, - /** AIN3 external input */ - COMP_NRF_COMP_EXTREFSEL_AIN3, - /** AIN4 external input */ - COMP_NRF_COMP_EXTREFSEL_AIN4, - /** AIN5 external input */ - COMP_NRF_COMP_EXTREFSEL_AIN5, - /** AIN6 external input */ - COMP_NRF_COMP_EXTREFSEL_AIN6, - /** AIN7 external input */ - COMP_NRF_COMP_EXTREFSEL_AIN7, -}; - /** Reference selection */ enum comp_nrf_comp_refsel { /** Internal 1.2V reference */ @@ -103,14 +60,14 @@ enum comp_nrf_comp_isource { * @note Hysteresis up in volts = ((th_up + 1) / 64) * ref */ struct comp_nrf_comp_se_config { - /** Positive input selection */ - enum comp_nrf_comp_psel psel; + /** Positive input selection defined by the NRF_COMP_AIN defines */ + uint8_t psel; /** Speed mode selection */ enum comp_nrf_comp_sp_mode sp_mode; /** Current source configuration */ enum comp_nrf_comp_isource isource; - /** External reference selection */ - enum comp_nrf_comp_extrefsel extrefsel; + /** External reference input selection defined by the NRF_COMP_AIN defines */ + uint8_t extrefsel; /** Reference selection */ enum comp_nrf_comp_refsel refsel; /** Hysteresis down threshold configuration */ @@ -133,14 +90,14 @@ int comp_nrf_comp_configure_se(const struct device *dev, /** Differential mode configuration structure */ struct comp_nrf_comp_diff_config { - /** Positive input selection */ - enum comp_nrf_comp_psel psel; + /** Positive input selection defined by the NRF_COMP_AIN defines */ + uint8_t psel; /** Speed mode selection */ enum comp_nrf_comp_sp_mode sp_mode; /** Current source configuration */ enum comp_nrf_comp_isource isource; - /** Negative input selection */ - enum comp_nrf_comp_extrefsel extrefsel; + /** Negative input selection defined by the NRF_COMP_AIN defines */ + uint8_t extrefsel; /** Hysteresis configuration */ bool enable_hyst; }; diff --git a/include/zephyr/drivers/comparator/nrf_lpcomp.h b/include/zephyr/drivers/comparator/nrf_lpcomp.h index e1f2343a8de8..1cae4caae330 100644 --- a/include/zephyr/drivers/comparator/nrf_lpcomp.h +++ b/include/zephyr/drivers/comparator/nrf_lpcomp.h @@ -7,40 +7,13 @@ #ifndef ZEPHYR_INCLUDE_DRIVERS_COMP_NRF_LPCOMP_H_ #define ZEPHYR_INCLUDE_DRIVERS_COMP_NRF_LPCOMP_H_ +#include #include #ifdef __cplusplus extern "C" { #endif -/** Positive input selection */ -enum comp_nrf_lpcomp_psel { - /** AIN0 external input */ - COMP_NRF_LPCOMP_PSEL_AIN0, - /** AIN1 external input */ - COMP_NRF_LPCOMP_PSEL_AIN1, - /** AIN2 external input */ - COMP_NRF_LPCOMP_PSEL_AIN2, - /** AIN3 external input */ - COMP_NRF_LPCOMP_PSEL_AIN3, - /** AIN4 external input */ - COMP_NRF_LPCOMP_PSEL_AIN4, - /** AIN5 external input */ - COMP_NRF_LPCOMP_PSEL_AIN5, - /** AIN6 external input */ - COMP_NRF_LPCOMP_PSEL_AIN6, - /** AIN7 external input */ - COMP_NRF_LPCOMP_PSEL_AIN7, -}; - -/** External reference selection */ -enum comp_nrf_lpcomp_extrefsel { - /** AIN0 external input */ - COMP_NRF_LPCOMP_EXTREFSEL_AIN0, - /** AIN1 external input */ - COMP_NRF_LPCOMP_EXTREFSEL_AIN1, -}; - /** Reference selection */ enum comp_nrf_lpcomp_refsel { /** Use (VDD * (1/8)) as reference */ @@ -83,10 +56,10 @@ enum comp_nrf_lpcomp_refsel { * @note extrefsel is only used if refsel == COMP_NRF_LPCOMP_REFSEL_AREF */ struct comp_nrf_lpcomp_config { - /** Positive input selection */ - enum comp_nrf_lpcomp_psel psel; - /** External reference selection */ - enum comp_nrf_lpcomp_extrefsel extrefsel; + /** Positive input selection defined by the NRF_COMP_AIN defines */ + uint8_t psel; + /** External reference input selection defined by the NRF_COMP_AIN defines */ + uint8_t extrefsel; /** Reference selection */ enum comp_nrf_lpcomp_refsel refsel; /** Hysteresis configuration */ diff --git a/include/zephyr/drivers/gpio/gpio_nrf.h b/include/zephyr/drivers/gpio/gpio_nrf.h new file mode 100644 index 000000000000..8802e8a1702e --- /dev/null +++ b/include/zephyr/drivers/gpio/gpio_nrf.h @@ -0,0 +1,27 @@ +/* + * Copyright (c) 2025 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ZEPHYR_INCLUDE_DRIVERS_GPIO_GPIO_NRF_H +#define ZEPHYR_INCLUDE_DRIVERS_GPIO_GPIO_NRF_H + +#ifdef __cplusplus +extern "C" { +#endif + +/** @brief Get pointer to GPIOTE driver instance + * associated with specified port device node. + * + * @param port Pointer to port device node. + * + * @return Pointer to GPIOTE driver instance. NULL if not found. + */ +void * gpio_nrf_gpiote_by_port_get(const struct device *port); + +#ifdef __cplusplus +} +#endif + +#endif /* ZEPHYR_INCLUDE_DRIVERS_GPIO_GPIO_NRF_H */ diff --git a/include/zephyr/dt-bindings/adc/nrf-saadc-haltium.h b/include/zephyr/dt-bindings/adc/nrf-saadc-haltium.h deleted file mode 100644 index e05522975224..000000000000 --- a/include/zephyr/dt-bindings/adc/nrf-saadc-haltium.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * SPDX-License-Identifier: Apache-2.0 - * - * Copyright (c) 2025 Nordic Semiconductor ASA - */ - -#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NRF_SAADC_HALTIUM_H_ -#define ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NRF_SAADC_HALTIUM_H_ - -#include - -#define NRF_SAADC_AIN8 9 -#define NRF_SAADC_AIN9 10 -#define NRF_SAADC_AIN10 11 -#define NRF_SAADC_AIN11 12 -#define NRF_SAADC_AIN12 13 -#define NRF_SAADC_AIN13 14 - -#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NRF_SAADC_HALTIUM_H_ */ diff --git a/include/zephyr/dt-bindings/adc/nrf-saadc-nrf54l.h b/include/zephyr/dt-bindings/adc/nrf-saadc-nrf54l.h deleted file mode 100644 index 19da4ff6020f..000000000000 --- a/include/zephyr/dt-bindings/adc/nrf-saadc-nrf54l.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * SPDX-License-Identifier: Apache-2.0 - * - * Copyright (c) 2024 Nordic Semiconductor ASA - */ - -#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NRF_SAADC_NRF54L_H_ -#define ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NRF_SAADC_NRF54L_H_ - -#include - -#define NRF_SAADC_AVDD 10 -#define NRF_SAADC_DVDD 11 - -#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NRF_SAADC_NRF54L_H_ */ diff --git a/include/zephyr/dt-bindings/adc/nrf-saadc-v2.h b/include/zephyr/dt-bindings/adc/nrf-saadc-v2.h deleted file mode 100644 index f5f72bec829e..000000000000 --- a/include/zephyr/dt-bindings/adc/nrf-saadc-v2.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * SPDX-License-Identifier: Apache-2.0 - * - * Copyright (c) 2024 Nordic Semiconductor ASA - */ - -#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NRF_SAADC_V2_H_ -#define ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NRF_SAADC_V2_H_ - -#include - -#define NRF_SAADC_VDD 9 - -#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NRF_SAADC_V2_H_ */ diff --git a/include/zephyr/dt-bindings/adc/nrf-saadc-v3.h b/include/zephyr/dt-bindings/adc/nrf-saadc-v3.h deleted file mode 100644 index c51bab1a91ec..000000000000 --- a/include/zephyr/dt-bindings/adc/nrf-saadc-v3.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * SPDX-License-Identifier: Apache-2.0 - * - * Copyright (c) 2024 Nordic Semiconductor ASA - */ - -#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NRF_SAADC_V3_H_ -#define ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NRF_SAADC_V3_H_ - -#include - -#define NRF_SAADC_VDDHDIV5 13 - -#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NRF_SAADC_V3_H_ */ diff --git a/include/zephyr/dt-bindings/adc/nrf-saadc.h b/include/zephyr/dt-bindings/adc/nrf-saadc.h index e5a86150cd43..21f9cf9fb2f1 100644 --- a/include/zephyr/dt-bindings/adc/nrf-saadc.h +++ b/include/zephyr/dt-bindings/adc/nrf-saadc.h @@ -7,6 +7,21 @@ #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NRF_SAADC_H_ #define ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NRF_SAADC_H_ +#define NRF_SAADC_AIN0 0 +#define NRF_SAADC_AIN1 1 +#define NRF_SAADC_AIN2 2 +#define NRF_SAADC_AIN3 3 +#define NRF_SAADC_AIN4 4 +#define NRF_SAADC_AIN5 5 +#define NRF_SAADC_AIN6 6 +#define NRF_SAADC_AIN7 7 +#define NRF_SAADC_AIN8 8 +#define NRF_SAADC_AIN9 9 +#define NRF_SAADC_AIN10 10 +#define NRF_SAADC_AIN11 11 +#define NRF_SAADC_AIN12 12 +#define NRF_SAADC_AIN13 13 + /** * @brief Short ADC negative input to ground * @@ -30,14 +45,22 @@ * zephyr,input-positive = ; * @endcode */ -#define NRF_SAADC_GND 0 -#define NRF_SAADC_AIN0 1 -#define NRF_SAADC_AIN1 2 -#define NRF_SAADC_AIN2 3 -#define NRF_SAADC_AIN3 4 -#define NRF_SAADC_AIN4 5 -#define NRF_SAADC_AIN5 6 -#define NRF_SAADC_AIN6 7 -#define NRF_SAADC_AIN7 8 +#define NRF_SAADC_GND (NRF_SAADC_AIN_VDD_SHIM_OFFSET - 1) + +#define NRF_SAADC_AIN_VDD_SHIM_OFFSET 128 +#define NRF_SAADC_VDD (NRF_SAADC_AIN_VDD_SHIM_OFFSET + 0) +#define NRF_SAADC_VDDDIV2 (NRF_SAADC_AIN_VDD_SHIM_OFFSET + 1) +#define NRF_SAADC_AVDD (NRF_SAADC_AIN_VDD_SHIM_OFFSET + 2) +#define NRF_SAADC_DVDD (NRF_SAADC_AIN_VDD_SHIM_OFFSET + 3) +#define NRF_SAADC_VDDHDIV5 (NRF_SAADC_AIN_VDD_SHIM_OFFSET + 4) +#define NRF_SAADC_VDDL (NRF_SAADC_AIN_VDD_SHIM_OFFSET + 5) +#define NRF_SAADC_DECB (NRF_SAADC_AIN_VDD_SHIM_OFFSET + 6) +#define NRF_SAADC_VSS (NRF_SAADC_AIN_VDD_SHIM_OFFSET + 7) +#define NRF_SAADC_VDDAO3V0 (NRF_SAADC_AIN_VDD_SHIM_OFFSET + 8) +#define NRF_SAADC_VDDAO1V8 (NRF_SAADC_AIN_VDD_SHIM_OFFSET + 9) +#define NRF_SAADC_VDDAO0V8 (NRF_SAADC_AIN_VDD_SHIM_OFFSET + 10) +#define NRF_SAADC_VDDRF (NRF_SAADC_AIN_VDD_SHIM_OFFSET + 11) +#define NRF_SAADC_VBAT (NRF_SAADC_AIN_VDD_SHIM_OFFSET + 12) +#define NRF_SAADC_AIN_DISABLED 255 /* UINT8_MAX */ #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NRF_SAADC_H_ */ diff --git a/include/zephyr/dt-bindings/comparator/nrf-comp.h b/include/zephyr/dt-bindings/comparator/nrf-comp.h new file mode 100644 index 000000000000..13314bc963cb --- /dev/null +++ b/include/zephyr/dt-bindings/comparator/nrf-comp.h @@ -0,0 +1,23 @@ +/* + * SPDX-License-Identifier: Apache-2.0 + * + * Copyright (c) 2025 Nordic Semiconductor ASA + */ + +#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NRF_COMP_H_ +#define ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NRF_COMP_H_ + +#define NRF_COMP_AIN0 0 /** AIN0 external input */ +#define NRF_COMP_AIN1 1 /** AIN1 external input */ +#define NRF_COMP_AIN2 2 /** AIN2 external input */ +#define NRF_COMP_AIN3 3 /** AIN3 external input */ +#define NRF_COMP_AIN4 4 /** AIN4 external input */ +#define NRF_COMP_AIN5 5 /** AIN5 external input */ +#define NRF_COMP_AIN6 6 /** AIN6 external input */ +#define NRF_COMP_AIN7 7 /** AIN7 external input */ + +#define NRF_COMP_AIN_VDD_SHIM_OFFSET 128 +#define NRF_COMP_AIN_VDD_DIV2 (NRF_COMP_AIN_VDD_SHIM_OFFSET + 1) +#define NRF_COMP_AIN_VDDH_DIV5 (NRF_COMP_AIN_VDD_SHIM_OFFSET + 4) + +#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ADC_NRF_COMP_H_ */ diff --git a/modules/hal_nordic/nrf_802154/sl_opensource/platform/nrf_802154_clock_zephyr.c b/modules/hal_nordic/nrf_802154/sl_opensource/platform/nrf_802154_clock_zephyr.c index 1dcf724b0e52..8593ff7269b4 100644 --- a/modules/hal_nordic/nrf_802154/sl_opensource/platform/nrf_802154_clock_zephyr.c +++ b/modules/hal_nordic/nrf_802154/sl_opensource/platform/nrf_802154_clock_zephyr.c @@ -9,7 +9,7 @@ #include -#include +#include #include #include #include diff --git a/modules/hal_nordic/nrfx/CMakeLists.txt b/modules/hal_nordic/nrfx/CMakeLists.txt index e944f06c805b..dba086783a2e 100644 --- a/modules/hal_nordic/nrfx/CMakeLists.txt +++ b/modules/hal_nordic/nrfx/CMakeLists.txt @@ -11,16 +11,30 @@ if(NOT DEFINED NRFX_DIR) set(NRFX_DIR ${ZEPHYR_CURRENT_MODULE_DIR}/nrfx CACHE PATH "nrfx Directory") endif() +if(NOT DEFINED CONFIG_SOC_NORDIC_BSP_NAME) + message(FATAL_ERROR "CONFIG_SOC_NORDIC_BSP_NAME has to be defined.") +endif() + set(INC_DIR ${NRFX_DIR}/drivers/include) set(SRC_DIR ${NRFX_DIR}/drivers/src) -set(MDK_DIR ${NRFX_DIR}/mdk) set(HELPERS_DIR ${NRFX_DIR}/helpers) +if(DEFINED CONFIG_SOC_NORDIC_BSP_PATH_OVERRIDE) + set(BSP_DIR ${ZEPHYR_CURRENT_MODULE_DIR}/${CONFIG_SOC_NORDIC_BSP_PATH_OVERRIDE}/${CONFIG_SOC_NORDIC_BSP_NAME}) +else() + set(BSP_DIR ${NRFX_DIR}/bsp/${CONFIG_SOC_NORDIC_BSP_NAME}) +endif() + +set(MDK_DIR ${BSP_DIR}/mdk) + zephyr_include_directories(${NRFX_DIR}) zephyr_include_directories(${INC_DIR}) -zephyr_include_directories(${MDK_DIR}) +zephyr_include_directories(${BSP_DIR}) +zephyr_include_directories(${BSP_DIR}/templates) zephyr_include_directories(.) +include(${BSP_DIR}/zephyr/nrfx.cmake OPTIONAL) + # Define MDK defines globally zephyr_compile_definitions_ifdef(CONFIG_SOC_SERIES_NRF51X NRF51) zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF51822_QFAA NRF51422_XXAA) @@ -112,16 +126,31 @@ zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_NRF92X ${MDK_DIR}/system_nrf92.c zephyr_library_sources(nrfx_glue.c) zephyr_library_sources(${HELPERS_DIR}/nrfx_flag32_allocator.c) zephyr_library_sources_ifdef(CONFIG_HAS_NORDIC_RAM_CTRL ${HELPERS_DIR}/nrfx_ram_ctrl.c) -zephyr_library_sources_ifdef(CONFIG_NRFX_GPPI ${HELPERS_DIR}/nrfx_gppi_dppi.c) -zephyr_library_sources_ifdef(CONFIG_NRFX_GPPI ${HELPERS_DIR}/nrfx_gppi_ppi.c) + +if(CONFIG_NRFX_GPPI) + zephyr_library_sources_ifdef(CONFIG_NRFX_GPPI_V1 ${HELPERS_DIR}/internal/nrfx_gppiv1_shim.c) + if(CONFIG_HAS_HW_NRF_PPI) + zephyr_library_sources_ifdef(CONFIG_NRFX_GPPI_V1 ${HELPERS_DIR}/internal/nrfx_gppiv1_ppi.c) + zephyr_library_sources_ifdef(CONFIG_NRFX_GPPI_V1 ${HELPERS_DIR}/internal/nrfx_ppi.c) + zephyr_library_sources_ifndef(CONFIG_NRFX_GPPI_V1 ${HELPERS_DIR}/nrfx_gppi_ppi.c) + else() + zephyr_library_sources_ifdef(CONFIG_NRFX_GPPI_V1 ${HELPERS_DIR}/internal/nrfx_gppiv1_dppi.c) + zephyr_library_sources_ifndef(CONFIG_NRFX_GPPI_V1 ${HELPERS_DIR}/nrfx_gppi_dppi.c) + zephyr_library_sources_ifdef(CONFIG_NRFX_GPPI_V1 ${HELPERS_DIR}/internal/nrfx_dppi.c) + endif() +endif() zephyr_library_sources_ifdef(CONFIG_NRFX_PRS ${SRC_DIR}/prs/nrfx_prs.c) zephyr_library_sources_ifdef(CONFIG_NRFX_ADC ${SRC_DIR}/nrfx_adc.c) zephyr_library_sources_ifdef(CONFIG_NRFX_CLOCK ${SRC_DIR}/nrfx_clock.c) +zephyr_library_sources_ifdef(CONFIG_NRFX_CLOCK ${SRC_DIR}/nrfx_clock_hfclk.c) +zephyr_library_sources_ifdef(CONFIG_NRFX_CLOCK ${SRC_DIR}/nrfx_clock_xo.c) +zephyr_library_sources_ifdef(CONFIG_NRFX_CLOCK ${SRC_DIR}/nrfx_clock_lfclk.c) +zephyr_library_sources_ifdef(CONFIG_NRFX_CLOCK ${SRC_DIR}/nrfx_clock_hfclk192m.c) +zephyr_library_sources_ifdef(CONFIG_NRFX_CLOCK ${SRC_DIR}/nrfx_clock_xo24m.c) zephyr_library_sources_ifdef(CONFIG_NRFX_COMP ${SRC_DIR}/nrfx_comp.c) zephyr_library_sources_ifdef(CONFIG_NRFX_CRACEN ${SRC_DIR}/nrfx_cracen.c) -zephyr_library_sources_ifdef(CONFIG_NRFX_DPPI ${SRC_DIR}/nrfx_dppi.c) zephyr_library_sources_ifdef(CONFIG_NRFX_EGU ${SRC_DIR}/nrfx_egu.c) zephyr_library_sources_ifdef(CONFIG_NRFX_GPIOTE ${SRC_DIR}/nrfx_gpiote.c) zephyr_library_sources_ifdef(CONFIG_NRFX_GRTC ${SRC_DIR}/nrfx_grtc.c) @@ -133,8 +162,6 @@ zephyr_library_sources_ifdef(CONFIG_NRFX_NFCT ${SRC_DIR}/nrfx_nfct.c) zephyr_library_sources_ifdef(CONFIG_NRFX_NVMC ${SRC_DIR}/nrfx_nvmc.c) zephyr_library_sources_ifdef(CONFIG_NRFX_PDM ${SRC_DIR}/nrfx_pdm.c) zephyr_library_sources_ifdef(CONFIG_NRFX_POWER ${SRC_DIR}/nrfx_power.c) -zephyr_library_sources_ifdef(CONFIG_NRFX_PPI ${SRC_DIR}/nrfx_ppi.c) -zephyr_library_sources_ifdef(CONFIG_NRFX_PPIB ${SRC_DIR}/nrfx_ppib.c) zephyr_library_sources_ifdef(CONFIG_NRFX_PWM ${SRC_DIR}/nrfx_pwm.c) zephyr_library_sources_ifdef(CONFIG_NRFX_QDEC ${SRC_DIR}/nrfx_qdec.c) zephyr_library_sources_ifdef(CONFIG_NRFX_QSPI ${SRC_DIR}/nrfx_qspi.c) @@ -196,16 +223,16 @@ zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54LX_SKIP_GLITCHDETECTOR_DISABLE zephyr_compile_definitions_ifndef(CONFIG_SOC_NRF54L_ANOMALY_56_WORKAROUND NRF54L_CONFIGURATION_56_ENABLE=0) if(CONFIG_SOC_COMPATIBLE_NRF54LX AND CONFIG_NRFX_GPPI) - zephyr_library_sources(${HELPERS_DIR}/nrfx_gppi_dppi_ppib_lumos.c) - zephyr_library_sources(${NRFX_DIR}/soc/interconnect/dppic_ppib/nrfx_interconnect_dppic_ppib.c) + zephyr_library_sources_ifdef(CONFIG_NRFX_GPPI_V1 ${HELPERS_DIR}/internal/nrfx_gppiv1_ppib.c) + zephyr_library_sources_ifdef(CONFIG_NRFX_GPPI_V1 ${HELPERS_DIR}/internal/nrfx_ppib.c) + zephyr_library_sources_ifndef(CONFIG_NRFX_GPPI_V1 ${HELPERS_DIR}/nrfx_gppi_lumos.c) endif() -if(CONFIG_SOC_SERIES_NRF54HX AND CONFIG_NRFX_GPPI) - zephyr_library_sources(${HELPERS_DIR}/nrfx_gppi_dppi_ppib.c) - zephyr_library_sources(${NRFX_DIR}/soc/interconnect/apb/nrfx_interconnect_apb.c) - zephyr_library_sources(${NRFX_DIR}/soc/interconnect/ipct/nrfx_interconnect_ipct.c) +if(CONFIG_SOC_SERIES_NRF54HX AND CONFIG_NRFX_GPPI_V1) + zephyr_library_sources(${HELPERS_DIR}/internal/nrfx_gppiv1_ipct.c) endif() + # Get the SVD file for the current SoC macro(mdk_svd_ifdef feature_toggle filename) if(${feature_toggle}) diff --git a/modules/hal_nordic/nrfx/Kconfig b/modules/hal_nordic/nrfx/Kconfig index 523931be649d..a0a90975f151 100644 --- a/modules/hal_nordic/nrfx/Kconfig +++ b/modules/hal_nordic/nrfx/Kconfig @@ -61,85 +61,85 @@ config NRFX_DPPI config NRFX_DPPI0 bool "DPPI0 driver instance" - default y if NRFX_GPPI + default y if NRFX_GPPI_V1 depends on $(dt_nodelabel_exists,dppic0) select NRFX_DPPI config NRFX_DPPI00 bool "DPPI00 driver instance" - default y if NRFX_GPPI + default y if NRFX_GPPI_V1 depends on $(dt_nodelabel_exists,dppic00) select NRFX_DPPI config NRFX_DPPI10 bool "DPPI10 driver instance" - default y if NRFX_GPPI + default y if NRFX_GPPI_V1 depends on $(dt_nodelabel_exists,dppic10) select NRFX_DPPI config NRFX_DPPI20 bool "DPPI20 driver instance" - default y if NRFX_GPPI + default y if NRFX_GPPI_V1 depends on $(dt_nodelabel_exists,dppic20) select NRFX_DPPI config NRFX_DPPI30 bool "DPPI30 driver instance" - default y if NRFX_GPPI + default y if NRFX_GPPI_V1 depends on $(dt_nodelabel_exists,dppic30) select NRFX_DPPI config NRFX_DPPI020 bool "DPPI020 driver instance" - default y if NRFX_GPPI + default y if NRFX_GPPI_V1 depends on $(dt_nodelabel_exists,dppic020) select NRFX_DPPI config NRFX_DPPI120 bool "DPPI120 driver instance" - default y if NRFX_GPPI + default y if NRFX_GPPI_V1 depends on $(dt_nodelabel_exists,dppic120) select NRFX_DPPI config NRFX_DPPI130 bool "DPPI130 driver instance" - default y if NRFX_GPPI + default y if NRFX_GPPI_V1 depends on $(dt_nodelabel_exists,dppic130) select NRFX_DPPI config NRFX_DPPI131 bool "DPPI131 driver instance" - default y if NRFX_GPPI + default y if NRFX_GPPI_V1 depends on $(dt_nodelabel_exists,dppic131) select NRFX_DPPI config NRFX_DPPI132 bool "DPPI132 driver instance" - default y if NRFX_GPPI + default y if NRFX_GPPI_V1 depends on $(dt_nodelabel_exists,dppic132) select NRFX_DPPI config NRFX_DPPI133 bool "DPPI133 driver instance" - default y if NRFX_GPPI + default y if NRFX_GPPI_V1 depends on $(dt_nodelabel_exists,dppic133) select NRFX_DPPI config NRFX_DPPI134 bool "DPPI134 driver instance" - default y if NRFX_GPPI + default y if NRFX_GPPI_V1 depends on $(dt_nodelabel_exists,dppic134) select NRFX_DPPI config NRFX_DPPI135 bool "DPPI135 driver instance" - default y if NRFX_GPPI + default y if NRFX_GPPI_V1 depends on $(dt_nodelabel_exists,dppic135) select NRFX_DPPI config NRFX_DPPI136 bool "DPPI136 driver instance" - default y if NRFX_GPPI + default y if NRFX_GPPI_V1 depends on $(dt_nodelabel_exists,dppic136) select NRFX_DPPI @@ -247,22 +247,19 @@ config NRFX_GPPI Enable the nrfx_gppi utilities providing unified API for creating PPI connections across SoC families. +config NRFX_GPPI_V1 + bool "GPPI layer legacy" + depends on NRFX_GPPI + default y if SOC_SERIES_NRF54HX + help + When enabled then legacy version of Generic PPI layer is used. + config NRFX_GRTC bool "GRTC driver" depends on $(dt_nodelabel_exists,grtc) config NRFX_I2S - bool - -config NRFX_I2S0 - bool "I2S0 driver instance" - depends on $(dt_nodelabel_exists,i2s0) - select NRFX_I2S - -config NRFX_I2S20 - bool "I2S20 driver instance" - depends on $(dt_nodelabel_exists,i2s20) - select NRFX_I2S + bool "I2S driver" config NRFX_IPC bool "IPC driver" @@ -279,30 +276,14 @@ config NRFX_MRAMC config NRFX_NFCT bool "NFCT driver" depends on $(dt_nodelabel_exists,nfct) - select NRFX_TIMER4 if SOC_SERIES_NRF52X - select NRFX_TIMER2 if SOC_SERIES_NRF53X + select NRFX_TIMER config NRFX_NVMC bool "NVMC driver" depends on $(dt_nodelabel_exists,flash_controller) config NRFX_PDM - bool - -config NRFX_PDM0 - bool "PDM0 driver instance" - depends on $(dt_nodelabel_exists,pdm0) - select NRFX_PDM - -config NRFX_PDM20 - bool "PDM20 driver instance" - depends on $(dt_nodelabel_exists,pdm20) - select NRFX_PDM - -config NRFX_PDM21 - bool "PDM21 driver instance" - depends on $(dt_nodelabel_exists,pdm21) - select NRFX_PDM + bool "PDM driver" config NRFX_POWER bool "POWER driver" @@ -313,7 +294,7 @@ config NRFX_POWER config NRFX_PPI bool "PPI allocator" - default y if NRFX_GPPI + default y if NRFX_GPPI_V1 depends on $(dt_nodelabel_exists,ppi) config NRFX_PPIB @@ -321,147 +302,57 @@ config NRFX_PPIB config NRFX_PPIB00 bool "PPIB00 driver instance" - default y if NRFX_GPPI + default y if NRFX_GPPI_V1 depends on $(dt_nodelabel_exists,ppib00) select NRFX_PPIB config NRFX_PPIB01 bool "PPIB01 driver instance" - default y if NRFX_GPPI + default y if NRFX_GPPI_V1 depends on $(dt_nodelabel_exists,ppib01) select NRFX_PPIB config NRFX_PPIB10 bool "PPIB10 driver instance" - default y if NRFX_GPPI + default y if NRFX_GPPI_V1 depends on $(dt_nodelabel_exists,ppib10) select NRFX_PPIB config NRFX_PPIB11 bool "PPIB11 driver instance" - default y if NRFX_GPPI + default y if NRFX_GPPI_V1 depends on $(dt_nodelabel_exists,ppib11) select NRFX_PPIB config NRFX_PPIB20 bool "PPIB20 driver instance" - default y if NRFX_GPPI + default y if NRFX_GPPI_V1 depends on $(dt_nodelabel_exists,ppib20) select NRFX_PPIB config NRFX_PPIB21 bool "PPIB21 driver instance" - default y if NRFX_GPPI + default y if NRFX_GPPI_V1 depends on $(dt_nodelabel_exists,ppib21) select NRFX_PPIB config NRFX_PPIB22 bool "PPIB22 driver instance" - default y if NRFX_GPPI + default y if NRFX_GPPI_V1 depends on $(dt_nodelabel_exists,ppib22) select NRFX_PPIB config NRFX_PPIB30 bool "PPIB30 driver instance" - default y if NRFX_GPPI + default y if NRFX_GPPI_V1 depends on $(dt_nodelabel_exists,ppib30) select NRFX_PPIB config NRFX_PWM - bool - -config NRFX_PWM0 - bool "PWM0 driver instance" - depends on $(dt_nodelabel_exists,pwm0) - select NRFX_PWM - -config NRFX_PWM1 - bool "PWM1 driver instance" - depends on $(dt_nodelabel_exists,pwm1) - select NRFX_PWM - -config NRFX_PWM2 - bool "PWM2 driver instance" - depends on $(dt_nodelabel_exists,pwm2) - select NRFX_PWM - -config NRFX_PWM3 - bool "PWM3 driver instance" - depends on $(dt_nodelabel_exists,pwm3) - select NRFX_PWM - -config NRFX_PWM20 - bool "PWM20 driver instance" - depends on $(dt_nodelabel_exists,pwm20) - select NRFX_PWM - -config NRFX_PWM21 - bool "PWM21 driver instance" - depends on $(dt_nodelabel_exists,pwm21) - select NRFX_PWM - -config NRFX_PWM22 - bool "PWM22 driver instance" - depends on $(dt_nodelabel_exists,pwm22) - select NRFX_PWM - -config NRFX_PWM120 - bool "PWM120 driver instance" - depends on $(dt_nodelabel_exists,pwm120) - select NRFX_PWM - -config NRFX_PWM130 - bool "PWM130 driver instance" - depends on $(dt_nodelabel_exists,pwm130) - select NRFX_PWM - -config NRFX_PWM131 - bool "PWM131 driver instance" - depends on $(dt_nodelabel_exists,pwm131) - select NRFX_PWM - -config NRFX_PWM132 - bool "PWM132 driver instance" - depends on $(dt_nodelabel_exists,pwm132) - select NRFX_PWM - -config NRFX_PWM133 - bool "PWM133 driver instance" - depends on $(dt_nodelabel_exists,pwm133) - select NRFX_PWM + bool "PWM driver" config NRFX_QDEC - bool - -config NRFX_QDEC0 - bool "QDEC0 driver instance" - depends on $(dt_nodelabel_exists,qdec0) - select NRFX_QDEC - -config NRFX_QDEC1 - bool "QDEC1 driver instance" - depends on $(dt_nodelabel_exists,qdec1) - select NRFX_QDEC - -config NRFX_QDEC20 - bool "QDEC20 driver instance" - depends on $(dt_nodelabel_exists,qdec20) - select NRFX_QDEC - -config NRFX_QDEC21 - bool "QDEC21 driver instance" - depends on $(dt_nodelabel_exists,qdec21) - select NRFX_QDEC - -config NRFX_QDEC130 - bool "QDEC130 driver instance" - depends on $(dt_nodelabel_exists,qdec130) - select NRFX_QDEC - -config NRFX_QDEC131 - bool "QDEC131 driver instance" - depends on $(dt_nodelabel_exists,qdec131) - select NRFX_QDEC + bool "QDEC driver" config NRFX_QSPI bool "QSPI driver" @@ -528,229 +419,9 @@ config NRFX_SPI2 config NRFX_SPIM bool -config NRFX_SPIM0 - bool "SPIM0 driver instance" - depends on $(dt_nodelabel_exists,spi0) && !SOC_SERIES_NRF51X - select NRFX_SPIM - -config NRFX_SPIM1 - bool "SPIM1 driver instance" - depends on $(dt_nodelabel_exists,spi1) && !SOC_SERIES_NRF51X - select NRFX_SPIM - -config NRFX_SPIM2 - bool "SPIM2 driver instance" - depends on $(dt_nodelabel_exists,spi2) - select NRFX_SPIM - -config NRFX_SPIM3 - bool "SPIM3 driver instance" - depends on $(dt_nodelabel_exists,spi3) - select NRFX_SPIM - -config NRFX_SPIM4 - bool "SPIM4 driver instance" - depends on $(dt_nodelabel_exists,spi4) - select NRFX_SPIM - -config NRFX_SPIM00 - bool "SPIM00 driver instance" - depends on $(dt_nodelabel_exists,spi00) - select NRFX_SPIM - -config NRFX_SPIM01 - bool "SPIM01 driver instance" - depends on $(dt_nodelabel_exists,spi01) - select NRFX_SPIM - -config NRFX_SPIM20 - bool "SPIM20 driver instance" - depends on $(dt_nodelabel_exists,spi20) - select NRFX_SPIM - -config NRFX_SPIM21 - bool "SPIM21 driver instance" - depends on $(dt_nodelabel_exists,spi21) - select NRFX_SPIM - -config NRFX_SPIM22 - bool "SPIM22 driver instance" - depends on $(dt_nodelabel_exists,spi22) - select NRFX_SPIM - -config NRFX_SPIM23 - bool "SPIM23 driver instance" - depends on $(dt_nodelabel_exists,spi23) - select NRFX_SPIM - -config NRFX_SPIM24 - bool "SPIM24 driver instance" - depends on $(dt_nodelabel_exists,spi24) - select NRFX_SPIM - -config NRFX_SPIM30 - bool "SPIM30 driver instance" - depends on $(dt_nodelabel_exists,spi30) - select NRFX_SPIM - -config NRFX_SPIM120 - bool "SPIM120 driver instance" - depends on $(dt_nodelabel_exists,spi120) - select NRFX_SPIM - -config NRFX_SPIM121 - bool "SPIM121 driver instance" - depends on $(dt_nodelabel_exists,spi121) - select NRFX_SPIM - -config NRFX_SPIM130 - bool "SPIM130 driver instance" - depends on $(dt_nodelabel_exists,spi130) - select NRFX_SPIM - -config NRFX_SPIM131 - bool "SPIM131 driver instance" - depends on $(dt_nodelabel_exists,spi131) - select NRFX_SPIM - -config NRFX_SPIM132 - bool "SPIM132 driver instance" - depends on $(dt_nodelabel_exists,spi132) - select NRFX_SPIM - -config NRFX_SPIM133 - bool "SPIM133 driver instance" - depends on $(dt_nodelabel_exists,spi133) - select NRFX_SPIM - -config NRFX_SPIM134 - bool "SPIM134 driver instance" - depends on $(dt_nodelabel_exists,spi134) - select NRFX_SPIM - -config NRFX_SPIM135 - bool "SPIM135 driver instance" - depends on $(dt_nodelabel_exists,spi135) - select NRFX_SPIM - -config NRFX_SPIM136 - bool "SPIM136 driver instance" - depends on $(dt_nodelabel_exists,spi136) - select NRFX_SPIM - -config NRFX_SPIM137 - bool "SPIM137 driver instance" - depends on $(dt_nodelabel_exists,spi137) - select NRFX_SPIM - config NRFX_SPIS bool -config NRFX_SPIS0 - bool "SPIS0 driver instance" - depends on $(dt_nodelabel_exists,spi0) && !SOC_SERIES_NRF51X - select NRFX_SPIS - -config NRFX_SPIS1 - bool "SPIS1 driver instance" - depends on $(dt_nodelabel_exists,spi1) - select NRFX_SPIS - -config NRFX_SPIS2 - bool "SPIS2 driver instance" - depends on $(dt_nodelabel_exists,spi2) - select NRFX_SPIS - -config NRFX_SPIS3 - bool "SPIS3 driver instance" - depends on $(dt_nodelabel_exists,spi3) - select NRFX_SPIS - -config NRFX_SPIS00 - bool "SPIS00 driver instance" - depends on $(dt_nodelabel_exists,spi00) - select NRFX_SPIS - -config NRFX_SPIS01 - bool "SPIS01 driver instance" - depends on $(dt_nodelabel_exists,spi01) - select NRFX_SPIS - -config NRFX_SPIS20 - bool "SPIS20 driver instance" - depends on $(dt_nodelabel_exists,spi20) - select NRFX_SPIS - -config NRFX_SPIS21 - bool "SPIS21 driver instance" - depends on $(dt_nodelabel_exists,spi21) - select NRFX_SPIS - -config NRFX_SPIS22 - bool "SPIS22 driver instance" - depends on $(dt_nodelabel_exists,spi22) - select NRFX_SPIS - -config NRFX_SPIS23 - bool "SPIS23 driver instance" - depends on $(dt_nodelabel_exists,spi23) - select NRFX_SPIS - -config NRFX_SPIS24 - bool "SPIS24 driver instance" - depends on $(dt_nodelabel_exists,spi24) - select NRFX_SPIS - -config NRFX_SPIS30 - bool "SPIS30 driver instance" - depends on $(dt_nodelabel_exists,spi30) - select NRFX_SPIS - -config NRFX_SPIS120 - bool "SPIS120 driver instance" - depends on $(dt_nodelabel_exists,spis120) - select NRFX_SPIS - -config NRFX_SPIS130 - bool "SPIS130 driver instance" - depends on $(dt_nodelabel_exists,spi130) - select NRFX_SPIS - -config NRFX_SPIS131 - bool "SPIS131 driver instance" - depends on $(dt_nodelabel_exists,spi131) - select NRFX_SPIS - -config NRFX_SPIS132 - bool "SPIS132 driver instance" - depends on $(dt_nodelabel_exists,spi132) - select NRFX_SPIS - -config NRFX_SPIS133 - bool "SPIS133 driver instance" - depends on $(dt_nodelabel_exists,spi133) - select NRFX_SPIS - -config NRFX_SPIS134 - bool "SPIS134 driver instance" - depends on $(dt_nodelabel_exists,spi134) - select NRFX_SPIS - -config NRFX_SPIS135 - bool "SPIS135 driver instance" - depends on $(dt_nodelabel_exists,spi135) - select NRFX_SPIS - -config NRFX_SPIS136 - bool "SPIS136 driver instance" - depends on $(dt_nodelabel_exists,spi136) - select NRFX_SPIS - -config NRFX_SPIS137 - bool "SPIS137 driver instance" - depends on $(dt_nodelabel_exists,spi137) - select NRFX_SPIS - config NRFX_SYSTICK bool "SYSTICK driver" depends on CPU_CORTEX_M_HAS_SYSTICK @@ -764,132 +435,7 @@ config NRFX_TEMP depends on $(dt_nodelabel_exists,temp) config NRFX_TIMER - bool - -config NRFX_TIMER0 - bool "TIMER0 driver instance" - depends on $(dt_nodelabel_exists,timer0) - select NRFX_TIMER - -config NRFX_TIMER1 - bool "TIMER1 driver instance" - depends on $(dt_nodelabel_exists,timer1) - select NRFX_TIMER - -config NRFX_TIMER2 - bool "TIMER2 driver instance" - depends on $(dt_nodelabel_exists,timer2) - select NRFX_TIMER - -config NRFX_TIMER3 - bool "TIMER3 driver instance" - depends on $(dt_nodelabel_exists,timer3) - select NRFX_TIMER - -config NRFX_TIMER4 - bool "TIMER4 driver instance" - depends on $(dt_nodelabel_exists,timer4) - select NRFX_TIMER - -config NRFX_TIMER00 - bool "TIMER00 driver instance" - depends on $(dt_nodelabel_exists,timer00) - select NRFX_TIMER - -config NRFX_TIMER10 - bool "TIMER10 driver instance" - depends on $(dt_nodelabel_exists,timer10) - select NRFX_TIMER - -config NRFX_TIMER20 - bool "TIMER20 driver instance" - depends on $(dt_nodelabel_exists,timer20) - select NRFX_TIMER - -config NRFX_TIMER21 - bool "TIMER21 driver instance" - depends on $(dt_nodelabel_exists,timer21) - select NRFX_TIMER - -config NRFX_TIMER22 - bool "TIMER22 driver instance" - depends on $(dt_nodelabel_exists,timer22) - select NRFX_TIMER - -config NRFX_TIMER23 - bool "TIMER23 driver instance" - depends on $(dt_nodelabel_exists,timer23) - select NRFX_TIMER - -config NRFX_TIMER24 - bool "TIMER24 driver instance" - depends on $(dt_nodelabel_exists,timer24) - select NRFX_TIMER - -config NRFX_TIMER020 - bool "TIMER020 driver instance" - depends on $(dt_nodelabel_exists,timer020) - select NRFX_TIMER - -config NRFX_TIMER021 - bool "TIMER021 driver instance" - depends on $(dt_nodelabel_exists,timer021) - select NRFX_TIMER - -config NRFX_TIMER022 - bool "TIMER022 driver instance" - depends on $(dt_nodelabel_exists,timer022) - select NRFX_TIMER - -config NRFX_TIMER120 - bool "TIMER120 driver instance" - depends on $(dt_nodelabel_exists,timer120) - select NRFX_TIMER - -config NRFX_TIMER121 - bool "TIMER121 driver instance" - depends on $(dt_nodelabel_exists,timer121) - select NRFX_TIMER - -config NRFX_TIMER130 - bool "TIMER130 driver instance" - depends on $(dt_nodelabel_exists,timer130) - select NRFX_TIMER - -config NRFX_TIMER131 - bool "TIMER131 driver instance" - depends on $(dt_nodelabel_exists,timer131) - select NRFX_TIMER - -config NRFX_TIMER132 - bool "TIMER132 driver instance" - depends on $(dt_nodelabel_exists,timer132) - select NRFX_TIMER - -config NRFX_TIMER133 - bool "TIMER133 driver instance" - depends on $(dt_nodelabel_exists,timer133) - select NRFX_TIMER - -config NRFX_TIMER134 - bool "TIMER134 driver instance" - depends on $(dt_nodelabel_exists,timer134) - select NRFX_TIMER - -config NRFX_TIMER135 - bool "TIMER135 driver instance" - depends on $(dt_nodelabel_exists,timer135) - select NRFX_TIMER - -config NRFX_TIMER136 - bool "TIMER136 driver instance" - depends on $(dt_nodelabel_exists,timer136) - select NRFX_TIMER - -config NRFX_TIMER137 - bool "TIMER137 driver instance" - depends on $(dt_nodelabel_exists,timer137) - select NRFX_TIMER + bool "TIMER driver" config NRFX_TWI bool @@ -905,195 +451,10 @@ config NRFX_TWI1 select NRFX_TWI config NRFX_TWIM - bool - -config NRFX_TWIM0 - bool "TWIM0 driver instance" - depends on $(dt_nodelabel_exists,i2c0) && !SOC_SERIES_NRF51X - select NRFX_TWIM - -config NRFX_TWIM1 - bool "TWIM1 driver instance" - depends on $(dt_nodelabel_exists,i2c1) && !SOC_SERIES_NRF51X - select NRFX_TWIM - -config NRFX_TWIM2 - bool "TWIM2 driver instance" - depends on $(dt_nodelabel_exists,i2c2) - select NRFX_TWIM - -config NRFX_TWIM3 - bool "TWIM3 driver instance" - depends on $(dt_nodelabel_exists,i2c3) - select NRFX_TWIM - -config NRFX_TWIM20 - bool "TWIM20 driver instance" - depends on $(dt_nodelabel_exists,i2c20) - select NRFX_TWIM - -config NRFX_TWIM21 - bool "TWIM21 driver instance" - depends on $(dt_nodelabel_exists,i2c21) - select NRFX_TWIM - -config NRFX_TWIM22 - bool "TWIM22 driver instance" - depends on $(dt_nodelabel_exists,i2c22) - select NRFX_TWIM - -config NRFX_TWIM23 - bool "TWIM23 driver instance" - depends on $(dt_nodelabel_exists,i2c23) - select NRFX_TWIM - -config NRFX_TWIM24 - bool "TWIM24 driver instance" - depends on $(dt_nodelabel_exists,i2c24) - select NRFX_TWIM - -config NRFX_TWIM30 - bool "TWIM30 driver instance" - depends on $(dt_nodelabel_exists,i2c30) - select NRFX_TWIM - -config NRFX_TWIM120 - bool "TWIM120 driver instance" - depends on $(dt_nodelabel_exists,i2c120) - select NRFX_TWIM - -config NRFX_TWIM130 - bool "TWIM130 driver instance" - depends on $(dt_nodelabel_exists,i2c130) - select NRFX_TWIM - -config NRFX_TWIM131 - bool "TWIM131 driver instance" - depends on $(dt_nodelabel_exists,i2c131) - select NRFX_TWIM - -config NRFX_TWIM132 - bool "TWIM132 driver instance" - depends on $(dt_nodelabel_exists,i2c132) - select NRFX_TWIM - -config NRFX_TWIM133 - bool "TWIM133 driver instance" - depends on $(dt_nodelabel_exists,i2c133) - select NRFX_TWIM - -config NRFX_TWIM134 - bool "TWIM134 driver instance" - depends on $(dt_nodelabel_exists,i2c134) - select NRFX_TWIM - -config NRFX_TWIM135 - bool "TWIM135 driver instance" - depends on $(dt_nodelabel_exists,i2c135) - select NRFX_TWIM - -config NRFX_TWIM136 - bool "TWIM136 driver instance" - depends on $(dt_nodelabel_exists,i2c136) - select NRFX_TWIM - -config NRFX_TWIM137 - bool "TWIM137 driver instance" - depends on $(dt_nodelabel_exists,i2c137) - select NRFX_TWIM + bool "NRFX driver for TWIM peripheral" config NRFX_TWIS - bool - -config NRFX_TWIS0 - bool "TWIS0 driver instance" - depends on $(dt_nodelabel_exists,i2c0) && !SOC_SERIES_NRF51X - select NRFX_TWIS - -config NRFX_TWIS1 - bool "TWIS1 driver instance" - depends on $(dt_nodelabel_exists,i2c1) && !SOC_SERIES_NRF51X - select NRFX_TWIS - -config NRFX_TWIS2 - bool "TWIS2 driver instance" - depends on $(dt_nodelabel_exists,i2c2) - select NRFX_TWIS - -config NRFX_TWIS3 - bool "TWIS3 driver instance" - depends on $(dt_nodelabel_exists,i2c3) - select NRFX_TWIS - -config NRFX_TWIS20 - bool "TWIS20 driver instance" - depends on $(dt_nodelabel_exists,i2c20) - select NRFX_TWIS - -config NRFX_TWIS21 - bool "TWIS21 driver instance" - depends on $(dt_nodelabel_exists,i2c21) - select NRFX_TWIS - -config NRFX_TWIS22 - bool "TWIS22 driver instance" - depends on $(dt_nodelabel_exists,i2c22) - select NRFX_TWIS - -config NRFX_TWIS23 - bool "TWIS23 driver instance" - depends on $(dt_nodelabel_exists,i2c23) - select NRFX_TWIS - -config NRFX_TWIS24 - bool "TWIS24 driver instance" - depends on $(dt_nodelabel_exists,i2c24) - select NRFX_TWIS - -config NRFX_TWIS30 - bool "TWIS30 driver instance" - depends on $(dt_nodelabel_exists,i2c30) - select NRFX_TWIS - -config NRFX_TWIS130 - bool "TWIS130 driver instance" - depends on $(dt_nodelabel_exists,i2c130) - select NRFX_TWIS - -config NRFX_TWIS131 - bool "TWIS131 driver instance" - depends on $(dt_nodelabel_exists,i2c131) - select NRFX_TWIS - -config NRFX_TWIS132 - bool "TWIS132 driver instance" - depends on $(dt_nodelabel_exists,i2c132) - select NRFX_TWIS - -config NRFX_TWIS133 - bool "TWIS133 driver instance" - depends on $(dt_nodelabel_exists,i2c133) - select NRFX_TWIS - -config NRFX_TWIS134 - bool "TWIS134 driver instance" - depends on $(dt_nodelabel_exists,i2c134) - select NRFX_TWIS - -config NRFX_TWIS135 - bool "TWIS135 driver instance" - depends on $(dt_nodelabel_exists,i2c135) - select NRFX_TWIS - -config NRFX_TWIS136 - bool "TWIS136 driver instance" - depends on $(dt_nodelabel_exists,i2c136) - select NRFX_TWIS - -config NRFX_TWIS137 - bool "TWIS137 driver instance" - depends on $(dt_nodelabel_exists,i2c137) - select NRFX_TWIS + bool "NRFX driver for TWIS peripheral" config NRFX_UART bool @@ -1104,107 +465,7 @@ config NRFX_UART0 select NRFX_UART config NRFX_UARTE - bool - -config NRFX_UARTE0 - bool "UARTE0 driver instance" - depends on $(dt_nodelabel_exists,uart0) - select NRFX_UARTE - -config NRFX_UARTE1 - bool "UARTE1 driver instance" - depends on $(dt_nodelabel_exists,uart1) - select NRFX_UARTE - -config NRFX_UARTE2 - bool "UARTE2 driver instance" - depends on $(dt_nodelabel_exists,uart2) - select NRFX_UARTE - -config NRFX_UARTE3 - bool "UARTE3 driver instance" - depends on $(dt_nodelabel_exists,uart3) - select NRFX_UARTE - -config NRFX_UARTE00 - bool "UARTE00 driver instance" - depends on $(dt_nodelabel_exists,uart00) - select NRFX_UARTE - -config NRFX_UARTE20 - bool "UARTE20 driver instance" - depends on $(dt_nodelabel_exists,uart20) - select NRFX_UARTE - -config NRFX_UARTE21 - bool "UARTE21 driver instance" - depends on $(dt_nodelabel_exists,uart21) - select NRFX_UARTE - -config NRFX_UARTE22 - bool "UARTE22 driver instance" - depends on $(dt_nodelabel_exists,uart22) - select NRFX_UARTE - -config NRFX_UARTE23 - bool "UARTE23 driver instance" - depends on $(dt_nodelabel_exists,uart23) - select NRFX_UARTE - -config NRFX_UARTE24 - bool "UARTE24 driver instance" - depends on $(dt_nodelabel_exists,uart24) - select NRFX_UARTE - -config NRFX_UARTE30 - bool "UARTE30 driver instance" - depends on $(dt_nodelabel_exists,uart30) - select NRFX_UARTE - -config NRFX_UARTE120 - bool "UARTE120 driver instance" - depends on $(dt_nodelabel_exists,uart120) - select NRFX_UARTE - -config NRFX_UARTE130 - bool "UARTE130 driver instance" - depends on $(dt_nodelabel_exists,uart130) - select NRFX_UARTE - -config NRFX_UARTE131 - bool "UARTE131 driver instance" - depends on $(dt_nodelabel_exists,uart131) - select NRFX_UARTE - -config NRFX_UARTE132 - bool "UARTE132 driver instance" - depends on $(dt_nodelabel_exists,uart132) - select NRFX_UARTE - -config NRFX_UARTE133 - bool "UARTE133 driver instance" - depends on $(dt_nodelabel_exists,uart133) - select NRFX_UARTE - -config NRFX_UARTE134 - bool "UARTE134 driver instance" - depends on $(dt_nodelabel_exists,uart134) - select NRFX_UARTE - -config NRFX_UARTE135 - bool "UARTE135 driver instance" - depends on $(dt_nodelabel_exists,uart135) - select NRFX_UARTE - -config NRFX_UARTE136 - bool "UARTE136 driver instance" - depends on $(dt_nodelabel_exists,uart136) - select NRFX_UARTE - -config NRFX_UARTE137 - bool "UARTE137 driver instance" - depends on $(dt_nodelabel_exists,uart137) - select NRFX_UARTE + bool "UARTE driver" config NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG bool "UARTE GPIO configuration support" @@ -1233,51 +494,6 @@ config NRFX_USBREG config NRFX_WDT bool -config NRFX_WDT0 - bool "WDT0 driver instance" - depends on $(dt_nodelabel_exists,wdt0) - select NRFX_WDT - -config NRFX_WDT1 - bool "WDT1 driver instance" - depends on $(dt_nodelabel_exists,wdt1) - select NRFX_WDT - -config NRFX_WDT30 - bool "WDT30 driver instance" - depends on $(dt_nodelabel_exists,wdt30) - select NRFX_WDT - -config NRFX_WDT31 - bool "WDT31 driver instance" - depends on $(dt_nodelabel_exists,wdt31) - select NRFX_WDT - -config NRFX_WDT010 - bool "WDT010 driver instance" - depends on $(dt_nodelabel_exists,wdt010) - select NRFX_WDT - -config NRFX_WDT011 - bool "WDT011 driver instance" - depends on $(dt_nodelabel_exists,wdt011) - select NRFX_WDT - -config NRFX_WDT130 - bool "WDT130 driver instance" - depends on $(dt_nodelabel_exists,wdt130) - select NRFX_WDT - -config NRFX_WDT131 - bool "WDT131 driver instance" - depends on $(dt_nodelabel_exists,wdt131) - select NRFX_WDT - -config NRFX_WDT132 - bool "WDT132 driver instance" - depends on $(dt_nodelabel_exists,wdt132) - select NRFX_WDT - menu "Peripheral Resource Sharing module" config NRFX_PRS @@ -1307,6 +523,6 @@ endmenu config NRFX_RESERVED_RESOURCES_HEADER string - default "nrfx_config_reserved_resources_ncs.h" + default "nrfx_reserved_resources_ncs.h" endmenu # "nrfx drivers" diff --git a/modules/hal_nordic/nrfx/nrfx_config.h b/modules/hal_nordic/nrfx/nrfx_config.h index fac2341c1c55..de8c130f443a 100644 --- a/modules/hal_nordic/nrfx/nrfx_config.h +++ b/modules/hal_nordic/nrfx/nrfx_config.h @@ -29,83 +29,5 @@ #endif /* Use defaults for undefined symbols. */ -#include -#if defined(NRF51) - #include -#elif defined(NRF52805_XXAA) - #include -#elif defined(NRF52810_XXAA) - #include -#elif defined(NRF52811_XXAA) - #include -#elif defined(NRF52820_XXAA) - #include -#elif defined(NRF52832_XXAA) || defined (NRF52832_XXAB) - #include -#elif defined(NRF52833_XXAA) - #include -#elif defined(NRF52840_XXAA) - #include -#elif defined(NRF5340_XXAA_APPLICATION) - #include -#elif defined(NRF5340_XXAA_NETWORK) - #include -#elif defined(NRF54H20_XXAA) && defined(NRF_APPLICATION) - #include -#elif defined(NRF54H20_XXAA) && defined(NRF_RADIOCORE) - #include -#elif defined(NRF54H20_XXAA) && defined(NRF_PPR) - #include -#elif defined(NRF54H20_XXAA) && defined(NRF_FLPR) - #include -#elif defined(NRF54H20_ENGA_XXAA) && defined(NRF_APPLICATION) - #include -#elif defined(NRF54H20_ENGA_XXAA) && defined(NRF_RADIOCORE) - #include -#elif defined(NRF54H20_ENGA_XXAA) && defined(NRF_PPR) - #include -#elif defined(NRF54H20_ENGA_XXAA) && defined(NRF_FLPR) - #include -#elif defined(NRF54H20_ENGB_XXAA) && defined(NRF_APPLICATION) - #include -#elif defined(NRF54H20_ENGB_XXAA) && defined(NRF_RADIOCORE) - #include -#elif defined(NRF54H20_ENGB_XXAA) && defined(NRF_PPR) - #include -#elif defined(NRF54H20_ENGB_XXAA) && defined(NRF_FLPR) - #include -#elif defined(NRF54L05_XXAA) && defined(NRF_APPLICATION) - #include -#elif defined(NRF54L05_XXAA) && defined(NRF_FLPR) - #include -#elif defined(NRF54L10_XXAA) && defined(NRF_APPLICATION) - #include -#elif defined(NRF54L10_XXAA) && defined(NRF_FLPR) - #include -#elif defined(NRF54L15_XXAA) && defined(NRF_APPLICATION) - #include -#elif defined(NRF54L15_XXAA) && defined(NRF_FLPR) - #include -#elif defined(NRF54LM20A_ENGA_XXAA) && defined(NRF_APPLICATION) - #include -#elif defined(NRF54LM20A_ENGA_XXAA) && defined(NRF_FLPR) - #include -#elif defined(NRF54LV10A_ENGA_XXAA) && defined(NRF_APPLICATION) - #include -#elif defined(NRF54LV10A_ENGA_XXAA) && defined(NRF_FLPR) - #include -#elif defined(NRF9120_XXAA) || defined(NRF9160_XXAA) - #include -#elif defined(NRF9230_ENGB_XXAA) && defined(NRF_APPLICATION) - #include -#elif defined(NRF9230_ENGB_XXAA) && defined(NRF_RADIOCORE) - #include -#elif defined(NRF9230_ENGB_XXAA) && defined(NRF_PPR) - #include -#elif defined(NRF9230_ENGB_XXAA) && defined(NRF_FLPR) - #include -#else - #include "nrfx_config_ext.h" -#endif - +#include "nrfx_templates_config.h" #endif // NRFX_CONFIG_H__ diff --git a/modules/hal_nordic/nrfx/nrfx_config_reserved_resources_ncs.h b/modules/hal_nordic/nrfx/nrfx_config_reserved_resources_ncs.h deleted file mode 100644 index ec8a9acaf7b5..000000000000 --- a/modules/hal_nordic/nrfx/nrfx_config_reserved_resources_ncs.h +++ /dev/null @@ -1,948 +0,0 @@ -/* - * Copyright (c) 2024, Nordic Semiconductor ASA - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#ifndef NRFX_CONFIG_RESERVED_RESOURCES_H__ -#define NRFX_CONFIG_RESERVED_RESOURCES_H__ - -/** @brief Bitmask that defines GPIOTE130 channels reserved for use outside - * of the nrfx library. - */ -#define NRFX_GPIOTE130_CHANNELS_USED \ - (~NRFX_CONFIG_MASK_DT(DT_NODELABEL(gpiote130), owned_channels) | \ - NRFX_CONFIG_MASK_DT(DT_NODELABEL(gpiote130), child_owned_channels)) - -/** @brief Bitmask that defines GPIOTE131 channels reserved for use outside - * of the nrfx library. - */ -#define NRFX_GPIOTE131_CHANNELS_USED \ - (~NRFX_CONFIG_MASK_DT(DT_NODELABEL(gpiote131), owned_channels) | \ - NRFX_CONFIG_MASK_DT(DT_NODELABEL(gpiote131), child_owned_channels)) - -/** @brief Bitmask that defines EGU instances that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_EGUS_USED 0 - -/** @brief Bitmask that defines TIMER instances that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_TIMERS_USED 0 - -/* If the GRTC system timer driver is to be used, prepare definitions required - * by the nrfx_grtc driver (NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK and - * NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS) based on information from devicetree. - */ -#if DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_grtc) -#define NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK \ - (NRFX_CONFIG_MASK_DT(DT_INST(0, nordic_nrf_grtc), owned_channels) & \ - ~NRFX_CONFIG_MASK_DT(DT_INST(0, nordic_nrf_grtc), child_owned_channels)) -#define NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS \ - (DT_PROP_LEN_OR(DT_INST(0, nordic_nrf_grtc), owned_channels, 0) - \ - DT_PROP_LEN_OR(DT_INST(0, nordic_nrf_grtc), child_owned_channels, 0)) -#endif /* DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_grtc) */ - -/* - * The enabled Bluetooth controller subsystem is responsible for providing - * definitions of the BT_CTLR_USED_* symbols used below in a file named - * bt_ctlr_used_resources.h and for adding its location to global include - * paths so that the file can be included here for all Zephyr libraries that - * are to be built. - */ -#if defined(CONFIG_BT_LL_SW_SPLIT) -#include -#if defined(CONFIG_SOC_SERIES_NRF51X) || defined(CONFIG_SOC_COMPATIBLE_NRF52X) -#define NRFX_PPI_CHANNELS_USED_BY_BT_CTLR BT_CTLR_USED_PPI_CHANNELS -#define NRFX_PPI_GROUPS_USED_BY_BT_CTLR BT_CTLR_USED_PPI_GROUPS -#elif defined(CONFIG_SOC_COMPATIBLE_NRF53X) -#define NRFX_DPPI0_CHANNELS_USED_BY_BT_CTLR BT_CTLR_USED_PPI_CHANNELS -#define NRFX_DPPI0_GROUPS_USED_BY_BT_CTLR BT_CTLR_USED_PPI_GROUPS -#elif defined(CONFIG_SOC_COMPATIBLE_NRF54LX) -#define NRFX_DPPI10_CHANNELS_USED_BY_BT_CTLR BT_CTLR_USED_PPI_CHANNELS -#define NRFX_DPPI10_GROUPS_USED_BY_BT_CTLR BT_CTLR_USED_PPI_GROUPS -#endif -#endif /* defined(CONFIG_BT_LL_SW_SPLIT) */ - -#if defined(CONFIG_BT_LL_SOFTDEVICE) -/* Define auxiliary symbols needed for SDC device dispatch. */ -#if defined(CONFIG_SOC_COMPATIBLE_NRF52X) -#define NRF52_SERIES -#elif defined(CONFIG_SOC_COMPATIBLE_NRF53X) -#define NRF53_SERIES -#elif defined(CONFIG_SOC_COMPATIBLE_NRF54LX) -#define NRF54L_SERIES -#elif defined(CONFIG_SOC_SERIES_NRF71X) -#define NRF71_SERIES -#elif defined(CONFIG_SOC_SERIES_NRF54HX) -#define NRF54H_SERIES -#endif -#include -#if defined(CONFIG_SOC_COMPATIBLE_NRF52X) -#define NRFX_PPI_CHANNELS_USED_BY_BT_CTLR SDC_PPI_CHANNELS_USED_MASK -#elif defined(CONFIG_SOC_COMPATIBLE_NRF53X) -#define NRFX_DPPI0_CHANNELS_USED_BY_BT_CTLR SDC_DPPI_CHANNELS_USED_MASK -#elif defined(CONFIG_SOC_COMPATIBLE_NRF54LX) || defined(CONFIG_SOC_SERIES_NRF71X) -#define NRFX_DPPI10_CHANNELS_USED_BY_BT_CTLR SDC_DPPIC10_CHANNELS_USED_MASK -#define NRFX_DPPI00_CHANNELS_USED_BY_BT_CTLR SDC_DPPIC00_CHANNELS_USED_MASK -#define NRFX_PPIB_00_10_CHANNELS_USED_BY_BT_CTLR \ - (SDC_PPIB00_CHANNELS_USED_MASK | SDC_PPIB10_CHANNELS_USED_MASK) -#elif defined(CONFIG_SOC_SERIES_NRF54HX) -#define NRFX_DPPI020_CHANNELS_USED_BY_BT_CTLR SDC_DPPIC020_CHANNELS_USED_MASK -#define NRFX_DPPI030_CHANNELS_USED_BY_BT_CTLR SDC_DPPIC030_CHANNELS_USED_MASK -#define NRFX_PPIB_020_030_CHANNELS_USED_BY_BT_CTLR \ - (SDC_PPIB020_CHANNELS_USED_MASK | SDC_PPIB030_CHANNELS_USED_MASK) -#else -#error Unsupported chip family -#endif -#endif /* defined(CONFIG_BT_LL_SOFTDEVICE) */ - -#if defined(CONFIG_NRF_802154_RADIO_DRIVER) -#if defined(CONFIG_SOC_COMPATIBLE_NRF52X) -#include <../src/nrf_802154_peripherals_nrf52.h> -#define NRFX_PPI_CHANNELS_USED_BY_802154_DRV NRF_802154_PPI_CHANNELS_USED_MASK -#define NRFX_PPI_GROUPS_USED_BY_802154_DRV NRF_802154_PPI_GROUPS_USED_MASK -#elif defined(CONFIG_SOC_COMPATIBLE_NRF53X) -#include <../src/nrf_802154_peripherals_nrf53.h> -#define NRFX_DPPI0_CHANNELS_USED_BY_802154_DRV NRF_802154_DPPI_CHANNELS_USED_MASK -#define NRFX_DPPI0_GROUPS_USED_BY_802154_DRV NRF_802154_DPPI_GROUPS_USED_MASK -#elif defined(CONFIG_SOC_COMPATIBLE_NRF54LX) -#include <../src/nrf_802154_peripherals_nrf54l.h> -#define NRFX_DPPI10_CHANNELS_USED_BY_802154_DRV NRF_802154_DPPI_CHANNELS_USED_MASK -#define NRFX_DPPI10_GROUPS_USED_BY_802154_DRV NRF_802154_DPPI_GROUPS_USED_MASK -#elif defined(CONFIG_SOC_SERIES_NRF54HX) -#include <../src/nrf_802154_peripherals_nrf54h.h> -#define NRFX_DPPI020_CHANNELS_USED_BY_802154_DRV NRF_802154_DPPI_CHANNELS_USED_MASK -#define NRFX_DPPI020_GROUPS_USED_BY_802154_DRV NRF_802154_DPPI_GROUPS_USED_MASK -#else -#error Unsupported chip family -#endif -#endif /* CONFIG_NRF_802154_RADIO_DRIVER */ - -#if defined(CONFIG_MPSL) -#include -#if defined(CONFIG_SOC_COMPATIBLE_NRF52X) -#define NRFX_PPI_CHANNELS_USED_BY_MPSL MPSL_PPI_CHANNELS_USED_MASK -#elif defined(CONFIG_SOC_COMPATIBLE_NRF53X) -#define NRFX_DPPI0_CHANNELS_USED_BY_MPSL MPSL_DPPIC_CHANNELS_USED_MASK -#elif defined(CONFIG_SOC_COMPATIBLE_NRF54LX) || defined(CONFIG_SOC_SERIES_NRF71X) -#define NRFX_DPPI10_CHANNELS_USED_BY_MPSL MPSL_DPPIC10_CHANNELS_USED_MASK -#define NRFX_DPPI20_CHANNELS_USED_BY_MPSL MPSL_DPPIC20_CHANNELS_USED_MASK -#define NRFX_PPIB_11_21_CHANNELS_USED_BY_MPSL \ - (MPSL_PPIB11_CHANNELS_USED_MASK | MPSL_PPIB21_CHANNELS_USED_MASK) -#elif defined(CONFIG_SOC_SERIES_NRF54HX) -#define NRFX_DPPI020_CHANNELS_USED_BY_MPSL MPSL_DPPIC020_CHANNELS_USED_MASK -#else -#error Unsupported chip family -#endif -#endif - -#ifndef NRFX_DPPI0_CHANNELS_USED_BY_BT_CTLR -#define NRFX_DPPI0_CHANNELS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI0_GROUPS_USED_BY_BT_CTLR -#define NRFX_DPPI0_GROUPS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI0_CHANNELS_USED_BY_802154_DRV -#define NRFX_DPPI0_CHANNELS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI0_GROUPS_USED_BY_802154_DRV -#define NRFX_DPPI0_GROUPS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI0_CHANNELS_USED_BY_MPSL -#define NRFX_DPPI0_CHANNELS_USED_BY_MPSL 0 -#endif -#ifndef NRFX_DPPI0_GROUPS_USED_BY_MPSL -#define NRFX_DPPI0_GROUPS_USED_BY_MPSL 0 -#endif - -#ifndef NRFX_DPPI00_CHANNELS_USED_BY_BT_CTLR -#define NRFX_DPPI00_CHANNELS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI00_GROUPS_USED_BY_BT_CTLR -#define NRFX_DPPI00_GROUPS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI00_CHANNELS_USED_BY_802154_DRV -#define NRFX_DPPI00_CHANNELS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI00_GROUPS_USED_BY_802154_DRV -#define NRFX_DPPI00_GROUPS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI00_CHANNELS_USED_BY_MPSL -#define NRFX_DPPI00_CHANNELS_USED_BY_MPSL 0 -#endif -#ifndef NRFX_DPPI00_GROUPS_USED_BY_MPSL -#define NRFX_DPPI00_GROUPS_USED_BY_MPSL 0 -#endif - -#ifndef NRFX_DPPI10_CHANNELS_USED_BY_BT_CTLR -#define NRFX_DPPI10_CHANNELS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI10_GROUPS_USED_BY_BT_CTLR -#define NRFX_DPPI10_GROUPS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI10_CHANNELS_USED_BY_802154_DRV -#define NRFX_DPPI10_CHANNELS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI10_GROUPS_USED_BY_802154_DRV -#define NRFX_DPPI10_GROUPS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI10_CHANNELS_USED_BY_MPSL -#define NRFX_DPPI10_CHANNELS_USED_BY_MPSL 0 -#endif -#ifndef NRFX_DPPI10_GROUPS_USED_BY_MPSL -#define NRFX_DPPI10_GROUPS_USED_BY_MPSL 0 -#endif - -#ifndef NRFX_DPPI20_CHANNELS_USED_BY_BT_CTLR -#define NRFX_DPPI20_CHANNELS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI20_GROUPS_USED_BY_BT_CTLR -#define NRFX_DPPI20_GROUPS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI20_CHANNELS_USED_BY_802154_DRV -#define NRFX_DPPI20_CHANNELS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI20_GROUPS_USED_BY_802154_DRV -#define NRFX_DPPI20_GROUPS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI20_CHANNELS_USED_BY_MPSL -#define NRFX_DPPI20_CHANNELS_USED_BY_MPSL 0 -#endif -#ifndef NRFX_DPPI20_GROUPS_USED_BY_MPSL -#define NRFX_DPPI20_GROUPS_USED_BY_MPSL 0 -#endif - -#ifndef NRFX_DPPI30_CHANNELS_USED_BY_BT_CTLR -#define NRFX_DPPI30_CHANNELS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI30_GROUPS_USED_BY_BT_CTLR -#define NRFX_DPPI30_GROUPS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI30_CHANNELS_USED_BY_802154_DRV -#define NRFX_DPPI30_CHANNELS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI30_GROUPS_USED_BY_802154_DRV -#define NRFX_DPPI30_GROUPS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI30_CHANNELS_USED_BY_MPSL -#define NRFX_DPPI30_CHANNELS_USED_BY_MPSL 0 -#endif -#ifndef NRFX_DPPI30_GROUPS_USED_BY_MPSL -#define NRFX_DPPI30_GROUPS_USED_BY_MPSL 0 -#endif - -#ifndef NRFX_DPPI020_CHANNELS_USED_BY_BT_CTLR -#define NRFX_DPPI020_CHANNELS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI020_GROUPS_USED_BY_BT_CTLR -#define NRFX_DPPI020_GROUPS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI020_CHANNELS_USED_BY_802154_DRV -#define NRFX_DPPI020_CHANNELS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI020_GROUPS_USED_BY_802154_DRV -#define NRFX_DPPI020_GROUPS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI020_CHANNELS_USED_BY_MPSL -#define NRFX_DPPI020_CHANNELS_USED_BY_MPSL 0 -#endif -#ifndef NRFX_DPPI020_GROUPS_USED_BY_MPSL -#define NRFX_DPPI020_GROUPS_USED_BY_MPSL 0 -#endif - -#ifndef NRFX_DPPI030_CHANNELS_USED_BY_BT_CTLR -#define NRFX_DPPI030_CHANNELS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI030_GROUPS_USED_BY_BT_CTLR -#define NRFX_DPPI030_GROUPS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI030_CHANNELS_USED_BY_802154_DRV -#define NRFX_DPPI030_CHANNELS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI030_GROUPS_USED_BY_802154_DRV -#define NRFX_DPPI030_GROUPS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI030_CHANNELS_USED_BY_MPSL -#define NRFX_DPPI030_CHANNELS_USED_BY_MPSL 0 -#endif -#ifndef NRFX_DPPI030_GROUPS_USED_BY_MPSL -#define NRFX_DPPI030_GROUPS_USED_BY_MPSL 0 -#endif - -#ifndef NRFX_DPPI120_CHANNELS_USED_BY_BT_CTLR -#define NRFX_DPPI120_CHANNELS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI120_GROUPS_USED_BY_BT_CTLR -#define NRFX_DPPI120_GROUPS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI120_CHANNELS_USED_BY_802154_DRV -#define NRFX_DPPI120_CHANNELS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI120_GROUPS_USED_BY_802154_DRV -#define NRFX_DPPI120_GROUPS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI120_CHANNELS_USED_BY_MPSL -#define NRFX_DPPI120_CHANNELS_USED_BY_MPSL 0 -#endif -#ifndef NRFX_DPPI120_GROUPS_USED_BY_MPSL -#define NRFX_DPPI120_GROUPS_USED_BY_MPSL 0 -#endif - -#ifndef NRFX_DPPI130_CHANNELS_USED_BY_BT_CTLR -#define NRFX_DPPI130_CHANNELS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI130_GROUPS_USED_BY_BT_CTLR -#define NRFX_DPPI130_GROUPS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI130_CHANNELS_USED_BY_802154_DRV -#define NRFX_DPPI130_CHANNELS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI130_GROUPS_USED_BY_802154_DRV -#define NRFX_DPPI130_GROUPS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI130_CHANNELS_USED_BY_MPSL -#define NRFX_DPPI130_CHANNELS_USED_BY_MPSL 0 -#endif -#ifndef NRFX_DPPI130_GROUPS_USED_BY_MPSL -#define NRFX_DPPI130_GROUPS_USED_BY_MPSL 0 -#endif - -#ifndef NRFX_DPPI131_CHANNELS_USED_BY_BT_CTLR -#define NRFX_DPPI131_CHANNELS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI131_GROUPS_USED_BY_BT_CTLR -#define NRFX_DPPI131_GROUPS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI131_CHANNELS_USED_BY_802154_DRV -#define NRFX_DPPI131_CHANNELS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI131_GROUPS_USED_BY_802154_DRV -#define NRFX_DPPI131_GROUPS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI131_CHANNELS_USED_BY_MPSL -#define NRFX_DPPI131_CHANNELS_USED_BY_MPSL 0 -#endif -#ifndef NRFX_DPPI131_GROUPS_USED_BY_MPSL -#define NRFX_DPPI131_GROUPS_USED_BY_MPSL 0 -#endif - -#ifndef NRFX_DPPI132_CHANNELS_USED_BY_BT_CTLR -#define NRFX_DPPI132_CHANNELS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI132_GROUPS_USED_BY_BT_CTLR -#define NRFX_DPPI132_GROUPS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI132_CHANNELS_USED_BY_802154_DRV -#define NRFX_DPPI132_CHANNELS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI132_GROUPS_USED_BY_802154_DRV -#define NRFX_DPPI132_GROUPS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI132_CHANNELS_USED_BY_MPSL -#define NRFX_DPPI132_CHANNELS_USED_BY_MPSL 0 -#endif -#ifndef NRFX_DPPI132_GROUPS_USED_BY_MPSL -#define NRFX_DPPI132_GROUPS_USED_BY_MPSL 0 -#endif - -#ifndef NRFX_DPPI133_CHANNELS_USED_BY_BT_CTLR -#define NRFX_DPPI133_CHANNELS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI133_GROUPS_USED_BY_BT_CTLR -#define NRFX_DPPI133_GROUPS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI133_CHANNELS_USED_BY_802154_DRV -#define NRFX_DPPI133_CHANNELS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI133_GROUPS_USED_BY_802154_DRV -#define NRFX_DPPI133_GROUPS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI133_CHANNELS_USED_BY_MPSL -#define NRFX_DPPI133_CHANNELS_USED_BY_MPSL 0 -#endif -#ifndef NRFX_DPPI133_GROUPS_USED_BY_MPSL -#define NRFX_DPPI133_GROUPS_USED_BY_MPSL 0 -#endif - -#ifndef NRFX_DPPI134_CHANNELS_USED_BY_BT_CTLR -#define NRFX_DPPI134_CHANNELS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI134_GROUPS_USED_BY_BT_CTLR -#define NRFX_DPPI134_GROUPS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI134_CHANNELS_USED_BY_802154_DRV -#define NRFX_DPPI134_CHANNELS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI134_GROUPS_USED_BY_802154_DRV -#define NRFX_DPPI134_GROUPS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI134_CHANNELS_USED_BY_MPSL -#define NRFX_DPPI134_CHANNELS_USED_BY_MPSL 0 -#endif -#ifndef NRFX_DPPI134_GROUPS_USED_BY_MPSL -#define NRFX_DPPI134_GROUPS_USED_BY_MPSL 0 -#endif - -#ifndef NRFX_DPPI135_CHANNELS_USED_BY_BT_CTLR -#define NRFX_DPPI135_CHANNELS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI135_GROUPS_USED_BY_BT_CTLR -#define NRFX_DPPI135_GROUPS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI135_CHANNELS_USED_BY_802154_DRV -#define NRFX_DPPI135_CHANNELS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI135_GROUPS_USED_BY_802154_DRV -#define NRFX_DPPI135_GROUPS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI135_CHANNELS_USED_BY_MPSL -#define NRFX_DPPI135_CHANNELS_USED_BY_MPSL 0 -#endif -#ifndef NRFX_DPPI135_GROUPS_USED_BY_MPSL -#define NRFX_DPPI135_GROUPS_USED_BY_MPSL 0 -#endif - -#ifndef NRFX_DPPI136_CHANNELS_USED_BY_BT_CTLR -#define NRFX_DPPI136_CHANNELS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI136_GROUPS_USED_BY_BT_CTLR -#define NRFX_DPPI136_GROUPS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_DPPI136_CHANNELS_USED_BY_802154_DRV -#define NRFX_DPPI136_CHANNELS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI136_GROUPS_USED_BY_802154_DRV -#define NRFX_DPPI136_GROUPS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_DPPI136_CHANNELS_USED_BY_MPSL -#define NRFX_DPPI136_CHANNELS_USED_BY_MPSL 0 -#endif -#ifndef NRFX_DPPI136_GROUPS_USED_BY_MPSL -#define NRFX_DPPI136_GROUPS_USED_BY_MPSL 0 -#endif - -#ifndef NRFX_PPI_CHANNELS_USED_BY_BT_CTLR -#define NRFX_PPI_CHANNELS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_PPI_GROUPS_USED_BY_BT_CTLR -#define NRFX_PPI_GROUPS_USED_BY_BT_CTLR 0 -#endif - -#ifndef NRFX_PPI_CHANNELS_USED_BY_802154_DRV -#define NRFX_PPI_CHANNELS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_PPI_GROUPS_USED_BY_802154_DRV -#define NRFX_PPI_GROUPS_USED_BY_802154_DRV 0 -#endif - -#ifndef NRFX_PPI_CHANNELS_USED_BY_MPSL -#define NRFX_PPI_CHANNELS_USED_BY_MPSL 0 -#endif -#ifndef NRFX_PPI_GROUPS_USED_BY_MPSL -#define NRFX_PPI_GROUPS_USED_BY_MPSL 0 -#endif - -#ifndef NRFX_PPIB_00_10_CHANNELS_USED_BY_BT_CTLR -#define NRFX_PPIB_00_10_CHANNELS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_PPIB_00_10_CHANNELS_USED_BY_802154_DRV -#define NRFX_PPIB_00_10_CHANNELS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_PPIB_00_10_CHANNELS_USED_BY_MPSL -#define NRFX_PPIB_00_10_CHANNELS_USED_BY_MPSL 0 -#endif - -#ifndef NRFX_PPIB_01_20_CHANNELS_USED_BY_BT_CTLR -#define NRFX_PPIB_01_20_CHANNELS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_PPIB_01_20_CHANNELS_USED_BY_802154_DRV -#define NRFX_PPIB_01_20_CHANNELS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_PPIB_01_20_CHANNELS_USED_BY_MPSL -#define NRFX_PPIB_01_20_CHANNELS_USED_BY_MPSL 0 -#endif - -#ifndef NRFX_PPIB_11_21_CHANNELS_USED_BY_BT_CTLR -#define NRFX_PPIB_11_21_CHANNELS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_PPIB_11_21_CHANNELS_USED_BY_802154_DRV -#define NRFX_PPIB_11_21_CHANNELS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_PPIB_11_21_CHANNELS_USED_BY_MPSL -#define NRFX_PPIB_11_21_CHANNELS_USED_BY_MPSL 0 -#endif - -#ifndef NRFX_PPIB_22_30_CHANNELS_USED_BY_BT_CTLR -#define NRFX_PPIB_22_30_CHANNELS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_PPIB_22_30_CHANNELS_USED_BY_802154_DRV -#define NRFX_PPIB_22_30_CHANNELS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_PPIB_22_30_CHANNELS_USED_BY_MPSL -#define NRFX_PPIB_22_30_CHANNELS_USED_BY_MPSL 0 -#endif - -#ifndef NRFX_PPIB_02_03_CHANNELS_USED_BY_BT_CTLR -#define NRFX_PPIB_02_03_CHANNELS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_PPIB_02_03_CHANNELS_USED_BY_802154_DRV -#define NRFX_PPIB_02_03_CHANNELS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_PPIB_02_03_CHANNELS_USED_BY_MPSL -#define NRFX_PPIB_02_03_CHANNELS_USED_BY_MPSL 0 -#endif - -#ifndef NRFX_PPIB_04_12_CHANNELS_USED_BY_BT_CTLR -#define NRFX_PPIB_04_12_CHANNELS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_PPIB_04_12_CHANNELS_USED_BY_802154_DRV -#define NRFX_PPIB_04_12_CHANNELS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_PPIB_04_12_CHANNELS_USED_BY_MPSL -#define NRFX_PPIB_04_12_CHANNELS_USED_BY_MPSL 0 -#endif - -#ifndef NRFX_PPIB_020_030_CHANNELS_USED_BY_BT_CTLR -#define NRFX_PPIB_020_030_CHANNELS_USED_BY_BT_CTLR 0 -#endif -#ifndef NRFX_PPIB_020_030_CHANNELS_USED_BY_802154_DRV -#define NRFX_PPIB_020_030_CHANNELS_USED_BY_802154_DRV 0 -#endif -#ifndef NRFX_PPIB_020_030_CHANNELS_USED_BY_MPSL -#define NRFX_PPIB_020_030_CHANNELS_USED_BY_MPSL 0 -#endif - -#if defined(NRF_802154_VERIFY_PERIPHS_ALLOC_AGAINST_MPSL) - -BUILD_ASSERT((NRFX_DPPI0_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI0_CHANNELS_USED_BY_MPSL) == 0, - "PPI channels used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI0_GROUPS_USED_BY_802154_DRV & NRFX_DPPI0_GROUPS_USED_BY_MPSL) == 0, - "PPI groups used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI00_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI00_CHANNELS_USED_BY_MPSL) == 0, - "PPI channels used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI00_GROUPS_USED_BY_802154_DRV & NRFX_DPPI00_GROUPS_USED_BY_MPSL) == 0, - "PPI groups used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI10_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI10_CHANNELS_USED_BY_MPSL) == 0, - "PPI channels used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI10_GROUPS_USED_BY_802154_DRV & NRFX_DPPI10_GROUPS_USED_BY_MPSL) == 0, - "PPI groups used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI20_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI20_CHANNELS_USED_BY_MPSL) == 0, - "PPI channels used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI20_GROUPS_USED_BY_802154_DRV & NRFX_DPPI20_GROUPS_USED_BY_MPSL) == 0, - "PPI groups used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI30_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI30_CHANNELS_USED_BY_MPSL) == 0, - "PPI channels used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI30_GROUPS_USED_BY_802154_DRV & NRFX_DPPI30_GROUPS_USED_BY_MPSL) == 0, - "PPI groups used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI020_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI020_CHANNELS_USED_BY_MPSL) == 0, - "PPI channels used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI020_GROUPS_USED_BY_802154_DRV & NRFX_DPPI020_GROUPS_USED_BY_MPSL) == 0, - "PPI groups used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI030_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI030_CHANNELS_USED_BY_MPSL) == 0, - "PPI channels used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI030_GROUPS_USED_BY_802154_DRV & NRFX_DPPI030_GROUPS_USED_BY_MPSL) == 0, - "PPI groups used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI120_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI120_CHANNELS_USED_BY_MPSL) == 0, - "PPI channels used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI120_GROUPS_USED_BY_802154_DRV & NRFX_DPPI120_GROUPS_USED_BY_MPSL) == 0, - "PPI groups used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI130_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI130_CHANNELS_USED_BY_MPSL) == 0, - "PPI channels used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI130_GROUPS_USED_BY_802154_DRV & NRFX_DPPI130_GROUPS_USED_BY_MPSL) == 0, - "PPI groups used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI131_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI131_CHANNELS_USED_BY_MPSL) == 0, - "PPI channels used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI131_GROUPS_USED_BY_802154_DRV & NRFX_DPPI131_GROUPS_USED_BY_MPSL) == 0, - "PPI groups used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI132_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI132_CHANNELS_USED_BY_MPSL) == 0, - "PPI channels used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI132_GROUPS_USED_BY_802154_DRV & NRFX_DPPI132_GROUPS_USED_BY_MPSL) == 0, - "PPI groups used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI133_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI133_CHANNELS_USED_BY_MPSL) == 0, - "PPI channels used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI133_GROUPS_USED_BY_802154_DRV & NRFX_DPPI133_GROUPS_USED_BY_MPSL) == 0, - "PPI groups used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI134_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI134_CHANNELS_USED_BY_MPSL) == 0, - "PPI channels used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI134_GROUPS_USED_BY_802154_DRV & NRFX_DPPI134_GROUPS_USED_BY_MPSL) == 0, - "PPI groups used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI135_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI135_CHANNELS_USED_BY_MPSL) == 0, - "PPI channels used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI135_GROUPS_USED_BY_802154_DRV & NRFX_DPPI135_GROUPS_USED_BY_MPSL) == 0, - "PPI groups used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI136_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI136_CHANNELS_USED_BY_MPSL) == 0, - "PPI channels used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_DPPI136_GROUPS_USED_BY_802154_DRV & NRFX_DPPI136_GROUPS_USED_BY_MPSL) == 0, - "PPI groups used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_PPI_CHANNELS_USED_BY_802154_DRV & NRFX_PPI_CHANNELS_USED_BY_MPSL) == 0, - "PPI channels used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_PPI_GROUPS_USED_BY_802154_DRV & NRFX_PPI_GROUPS_USED_BY_MPSL) == 0, - "PPI groups used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_PPIB_00_10_CHANNELS_USED_BY_802154_DRV & - NRFX_PPIB_00_10_CHANNELS_USED_BY_MPSL) == 0, - "PPI channels used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_PPIB_01_20_CHANNELS_USED_BY_802154_DRV & - NRFX_PPIB_01_20_CHANNELS_USED_BY_MPSL) == 0, - "PPI channels used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_PPIB_11_21_CHANNELS_USED_BY_802154_DRV & - NRFX_PPIB_11_21_CHANNELS_USED_BY_MPSL) == 0, - "PPI channels used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_PPIB_22_30_CHANNELS_USED_BY_802154_DRV & - NRFX_PPIB_22_30_CHANNELS_USED_BY_MPSL) == 0, - "PPI channels used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_PPIB_02_03_CHANNELS_USED_BY_802154_DRV & - NRFX_PPIB_02_03_CHANNELS_USED_BY_MPSL) == 0, - "PPI channels used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_PPIB_04_12_CHANNELS_USED_BY_802154_DRV & - NRFX_PPIB_04_12_CHANNELS_USED_BY_MPSL) == 0, - "PPI channels used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -BUILD_ASSERT((NRFX_PPIB_020_030_CHANNELS_USED_BY_802154_DRV & - NRFX_PPIB_020_030_CHANNELS_USED_BY_MPSL) == 0, - "PPI channels used by the IEEE802.15.4 radio driver overlap with those " - "assigned to the MPSL."); - -#endif /* NRF_802154_VERIFY_PERIPHS_ALLOC_AGAINST_MPSL */ - -/** @brief Bitmask that defines DPPI channels that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI0_CHANNELS_USED \ - (NRFX_DPPI0_CHANNELS_USED_BY_BT_CTLR | NRFX_DPPI0_CHANNELS_USED_BY_802154_DRV | \ - NRFX_DPPI0_CHANNELS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI groups that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI0_GROUPS_USED \ - (NRFX_DPPI0_GROUPS_USED_BY_BT_CTLR | NRFX_DPPI0_GROUPS_USED_BY_802154_DRV | \ - NRFX_DPPI0_GROUPS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI channels that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI00_CHANNELS_USED \ - (NRFX_DPPI00_CHANNELS_USED_BY_BT_CTLR | NRFX_DPPI00_CHANNELS_USED_BY_802154_DRV | \ - NRFX_DPPI00_CHANNELS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI groups that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI00_GROUPS_USED \ - (NRFX_DPPI00_GROUPS_USED_BY_BT_CTLR | NRFX_DPPI00_GROUPS_USED_BY_802154_DRV | \ - NRFX_DPPI00_GROUPS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI channels that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI10_CHANNELS_USED \ - (NRFX_DPPI10_CHANNELS_USED_BY_BT_CTLR | NRFX_DPPI10_CHANNELS_USED_BY_802154_DRV | \ - NRFX_DPPI10_CHANNELS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI groups that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI10_GROUPS_USED \ - (NRFX_DPPI10_GROUPS_USED_BY_BT_CTLR | NRFX_DPPI10_GROUPS_USED_BY_802154_DRV | \ - NRFX_DPPI10_GROUPS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI channels that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI20_CHANNELS_USED \ - (NRFX_DPPI20_CHANNELS_USED_BY_BT_CTLR | NRFX_DPPI20_CHANNELS_USED_BY_802154_DRV | \ - NRFX_DPPI20_CHANNELS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI groups that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI20_GROUPS_USED \ - (NRFX_DPPI20_GROUPS_USED_BY_BT_CTLR | NRFX_DPPI20_GROUPS_USED_BY_802154_DRV | \ - NRFX_DPPI20_GROUPS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI channels that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI30_CHANNELS_USED \ - (NRFX_DPPI30_CHANNELS_USED_BY_BT_CTLR | NRFX_DPPI30_CHANNELS_USED_BY_802154_DRV | \ - NRFX_DPPI30_CHANNELS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI groups that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI30_GROUPS_USED \ - (NRFX_DPPI30_GROUPS_USED_BY_BT_CTLR | NRFX_DPPI30_GROUPS_USED_BY_802154_DRV | \ - NRFX_DPPI30_GROUPS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI channels that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI020_CHANNELS_USED \ - (NRFX_DPPI020_CHANNELS_USED_BY_BT_CTLR | NRFX_DPPI020_CHANNELS_USED_BY_802154_DRV | \ - NRFX_DPPI020_CHANNELS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI groups that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI020_GROUPS_USED \ - (NRFX_DPPI020_GROUPS_USED_BY_BT_CTLR | NRFX_DPPI020_GROUPS_USED_BY_802154_DRV | \ - NRFX_DPPI020_GROUPS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI channels that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI030_CHANNELS_USED \ - (NRFX_DPPI030_CHANNELS_USED_BY_BT_CTLR | NRFX_DPPI030_CHANNELS_USED_BY_802154_DRV | \ - NRFX_DPPI030_CHANNELS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI groups that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI030_GROUPS_USED \ - (NRFX_DPPI030_GROUPS_USED_BY_BT_CTLR | NRFX_DPPI030_GROUPS_USED_BY_802154_DRV | \ - NRFX_DPPI030_GROUPS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI channels that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI120_CHANNELS_USED \ - (NRFX_DPPI120_CHANNELS_USED_BY_BT_CTLR | NRFX_DPPI120_CHANNELS_USED_BY_802154_DRV | \ - NRFX_DPPI120_CHANNELS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI groups that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI120_GROUPS_USED \ - (NRFX_DPPI120_GROUPS_USED_BY_BT_CTLR | NRFX_DPPI120_GROUPS_USED_BY_802154_DRV | \ - NRFX_DPPI120_GROUPS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI channels that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI130_CHANNELS_USED \ - (NRFX_DPPI130_CHANNELS_USED_BY_BT_CTLR | NRFX_DPPI130_CHANNELS_USED_BY_802154_DRV | \ - NRFX_DPPI130_CHANNELS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI groups that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI130_GROUPS_USED \ - (NRFX_DPPI130_GROUPS_USED_BY_BT_CTLR | NRFX_DPPI130_GROUPS_USED_BY_802154_DRV | \ - NRFX_DPPI130_GROUPS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI channels that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI131_CHANNELS_USED \ - (NRFX_DPPI131_CHANNELS_USED_BY_BT_CTLR | NRFX_DPPI131_CHANNELS_USED_BY_802154_DRV | \ - NRFX_DPPI131_CHANNELS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI groups that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI131_GROUPS_USED \ - (NRFX_DPPI131_GROUPS_USED_BY_BT_CTLR | NRFX_DPPI131_GROUPS_USED_BY_802154_DRV | \ - NRFX_DPPI131_GROUPS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI channels that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI132_CHANNELS_USED \ - (NRFX_DPPI132_CHANNELS_USED_BY_BT_CTLR | NRFX_DPPI132_CHANNELS_USED_BY_802154_DRV | \ - NRFX_DPPI132_CHANNELS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI groups that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI132_GROUPS_USED \ - (NRFX_DPPI132_GROUPS_USED_BY_BT_CTLR | NRFX_DPPI132_GROUPS_USED_BY_802154_DRV | \ - NRFX_DPPI132_GROUPS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI channels that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI133_CHANNELS_USED \ - (NRFX_DPPI133_CHANNELS_USED_BY_BT_CTLR | NRFX_DPPI133_CHANNELS_USED_BY_802154_DRV | \ - NRFX_DPPI133_CHANNELS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI groups that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI133_GROUPS_USED \ - (NRFX_DPPI133_GROUPS_USED_BY_BT_CTLR | NRFX_DPPI133_GROUPS_USED_BY_802154_DRV | \ - NRFX_DPPI133_GROUPS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI channels that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI134_CHANNELS_USED \ - (NRFX_DPPI134_CHANNELS_USED_BY_BT_CTLR | NRFX_DPPI134_CHANNELS_USED_BY_802154_DRV | \ - NRFX_DPPI134_CHANNELS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI groups that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI134_GROUPS_USED \ - (NRFX_DPPI134_GROUPS_USED_BY_BT_CTLR | NRFX_DPPI134_GROUPS_USED_BY_802154_DRV | \ - NRFX_DPPI134_GROUPS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI channels that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI135_CHANNELS_USED \ - (NRFX_DPPI135_CHANNELS_USED_BY_BT_CTLR | NRFX_DPPI135_CHANNELS_USED_BY_802154_DRV | \ - NRFX_DPPI135_CHANNELS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI groups that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI135_GROUPS_USED \ - (NRFX_DPPI135_GROUPS_USED_BY_BT_CTLR | NRFX_DPPI135_GROUPS_USED_BY_802154_DRV | \ - NRFX_DPPI135_GROUPS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI channels that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI136_CHANNELS_USED \ - (NRFX_DPPI136_CHANNELS_USED_BY_BT_CTLR | NRFX_DPPI136_CHANNELS_USED_BY_802154_DRV | \ - NRFX_DPPI136_CHANNELS_USED_BY_MPSL) - -/** @brief Bitmask that defines DPPI groups that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_DPPI136_GROUPS_USED \ - (NRFX_DPPI136_GROUPS_USED_BY_BT_CTLR | NRFX_DPPI136_GROUPS_USED_BY_802154_DRV | \ - NRFX_DPPI136_GROUPS_USED_BY_MPSL) - -/** @brief Bitmask that defines PPI channels that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_PPI_CHANNELS_USED \ - (NRFX_PPI_CHANNELS_USED_BY_BT_CTLR | NRFX_PPI_CHANNELS_USED_BY_802154_DRV | \ - NRFX_PPI_CHANNELS_USED_BY_MPSL | NRFX_PPI_CHANNELS_USED_BY_SD) - -#define NRFX_DPPI_CHANNELS_USED NRFX_DPPI0_CHANNELS_USED -#define NRFX_DPPI_GROUPS_USED NRFX_DPPI0_GROUPS_USED - -/** @brief Bitmask that defines PPI groups that are reserved for use outside - * of the nrfx library. - */ -#define NRFX_PPI_GROUPS_USED \ - (NRFX_PPI_GROUPS_USED_BY_BT_CTLR | NRFX_PPI_GROUPS_USED_BY_802154_DRV | \ - NRFX_PPI_GROUPS_USED_BY_MPSL | NRFX_PPI_GROUPS_USED_BY_SD) - -#define NRFX_PPIB_INTERCONNECT_00_10_CHANNELS_USED \ - (NRFX_PPIB_00_10_CHANNELS_USED_BY_BT_CTLR | NRFX_PPIB_00_10_CHANNELS_USED_BY_802154_DRV | \ - NRFX_PPIB_00_10_CHANNELS_USED_BY_MPSL) - -#define NRFX_PPIB_INTERCONNECT_01_20_CHANNELS_USED \ - (NRFX_PPIB_01_20_CHANNELS_USED_BY_BT_CTLR | NRFX_PPIB_01_20_CHANNELS_USED_BY_802154_DRV | \ - NRFX_PPIB_01_20_CHANNELS_USED_BY_MPSL) - -#define NRFX_PPIB_INTERCONNECT_11_21_CHANNELS_USED \ - (NRFX_PPIB_11_21_CHANNELS_USED_BY_BT_CTLR | NRFX_PPIB_11_21_CHANNELS_USED_BY_802154_DRV | \ - NRFX_PPIB_11_21_CHANNELS_USED_BY_MPSL) - -#define NRFX_PPIB_INTERCONNECT_22_30_CHANNELS_USED \ - (NRFX_PPIB_22_30_CHANNELS_USED_BY_BT_CTLR | NRFX_PPIB_22_30_CHANNELS_USED_BY_802154_DRV | \ - NRFX_PPIB_22_30_CHANNELS_USED_BY_MPSL) - -#define NRFX_PPIB_INTERCONNECT_02_03_CHANNELS_USED \ - (NRFX_PPIB_02_03_CHANNELS_USED_BY_BT_CTLR | NRFX_PPIB_02_03_CHANNELS_USED_BY_802154_DRV | \ - NRFX_PPIB_02_03_CHANNELS_USED_BY_MPSL) - -#define NRFX_PPIB_INTERCONNECT_04_12_CHANNELS_USED \ - (NRFX_PPIB_04_12_CHANNELS_USED_BY_BT_CTLR | NRFX_PPIB_04_12_CHANNELS_USED_BY_802154_DRV | \ - NRFX_PPIB_04_12_CHANNELS_USED_BY_MPSL) - -#define NRFX_PPIB_INTERCONNECT_020_030_CHANNELS_USED \ - (NRFX_PPIB_020_030_CHANNELS_USED_BY_BT_CTLR | \ - NRFX_PPIB_020_030_CHANNELS_USED_BY_802154_DRV | NRFX_PPIB_020_030_CHANNELS_USED_BY_MPSL) - -#if defined(CONFIG_SOFTDEVICE) -#include -#define NRFX_PPI_CHANNELS_USED_BY_SD SD_PPI_CHANNELS_USED -#define NRFX_PPI_GROUPS_USED_BY_SD SD_PPI_GROUPS_USED -#else -#define NRFX_PPI_CHANNELS_USED_BY_SD 0 -#define NRFX_PPI_GROUPS_USED_BY_SD 0 -#endif - -#endif /* NRFX_CONFIG_RESERVED_RESOURCES_H__ */ diff --git a/modules/hal_nordic/nrfx/nrfx_glue.c b/modules/hal_nordic/nrfx/nrfx_glue.c index 4e7fc94e11de..f5665f95c72e 100644 --- a/modules/hal_nordic/nrfx/nrfx_glue.c +++ b/modules/hal_nordic/nrfx/nrfx_glue.c @@ -6,7 +6,7 @@ #include #include -#include +#include void nrfx_isr(const void *irq_handler) { @@ -45,3 +45,25 @@ char const *nrfx_error_string_get(nrfx_err_t code) default: return "unknown"; } } + +char const *nrfx_new_error_string_get(int code) +{ + #define NRFX_NEW_ERROR_STRING_CASE(code) case code: return #code + switch (-code) + { + NRFX_NEW_ERROR_STRING_CASE(0); + NRFX_NEW_ERROR_STRING_CASE(ECANCELED); + NRFX_NEW_ERROR_STRING_CASE(ENOMEM); + NRFX_NEW_ERROR_STRING_CASE(ENOTSUP); + NRFX_NEW_ERROR_STRING_CASE(EINVAL); + NRFX_NEW_ERROR_STRING_CASE(EINPROGRESS); + NRFX_NEW_ERROR_STRING_CASE(E2BIG); + NRFX_NEW_ERROR_STRING_CASE(ETIMEDOUT); + NRFX_NEW_ERROR_STRING_CASE(EPERM); + NRFX_NEW_ERROR_STRING_CASE(EFAULT); + NRFX_NEW_ERROR_STRING_CASE(EACCES); + NRFX_NEW_ERROR_STRING_CASE(EBUSY); + NRFX_NEW_ERROR_STRING_CASE(EALREADY); + default: return "unknown"; + } +} diff --git a/modules/hal_nordic/nrfx/nrfx_kconfig.h b/modules/hal_nordic/nrfx/nrfx_kconfig.h index 4f0d594a2123..5fea1d893d17 100644 --- a/modules/hal_nordic/nrfx/nrfx_kconfig.h +++ b/modules/hal_nordic/nrfx/nrfx_kconfig.h @@ -224,12 +224,6 @@ #ifdef CONFIG_NRFX_I2S_LOG #define NRFX_I2S_CONFIG_LOG_ENABLED 1 #endif -#ifdef CONFIG_NRFX_I2S0 -#define NRFX_I2S0_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_I2S20 -#define NRFX_I2S20_ENABLED 1 -#endif #ifdef CONFIG_NRFX_IPC #define NRFX_IPC_ENABLED 1 @@ -272,15 +266,6 @@ #ifdef CONFIG_NRFX_PDM_LOG #define NRFX_PDM_CONFIG_LOG_ENABLED 1 #endif -#ifdef CONFIG_NRFX_PDM0 -#define NRFX_PDM0_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_PDM20 -#define NRFX_PDM20_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_PDM21 -#define NRFX_PDM21_ENABLED 1 -#endif #ifdef CONFIG_NRFX_POWER #define NRFX_POWER_ENABLED 1 @@ -355,42 +340,6 @@ #ifdef CONFIG_NRFX_PWM_LOG #define NRFX_PWM_CONFIG_LOG_ENABLED 1 #endif -#ifdef CONFIG_NRFX_PWM0 -#define NRFX_PWM0_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_PWM1 -#define NRFX_PWM1_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_PWM2 -#define NRFX_PWM2_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_PWM3 -#define NRFX_PWM3_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_PWM20 -#define NRFX_PWM20_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_PWM21 -#define NRFX_PWM21_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_PWM22 -#define NRFX_PWM22_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_PWM120 -#define NRFX_PWM120_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_PWM130 -#define NRFX_PWM130_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_PWM131 -#define NRFX_PWM131_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_PWM132 -#define NRFX_PWM132_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_PWM133 -#define NRFX_PWM133_ENABLED 1 -#endif #ifdef CONFIG_NRFX_QDEC #define NRFX_QDEC_ENABLED 1 @@ -398,24 +347,6 @@ #ifdef CONFIG_NRFX_QDEC_LOG #define NRFX_QDEC_CONFIG_LOG_ENABLED 1 #endif -#ifdef CONFIG_NRFX_QDEC0 -#define NRFX_QDEC0_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_QDEC1 -#define NRFX_QDEC1_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_QDEC20 -#define NRFX_QDEC20_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_QDEC21 -#define NRFX_QDEC21_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_QDEC130 -#define NRFX_QDEC130_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_QDEC131 -#define NRFX_QDEC131_ENABLED 1 -#endif #ifdef CONFIG_NRFX_QSPI #define NRFX_QSPI_ENABLED 1 @@ -486,23 +417,11 @@ #ifdef CONFIG_NRFX_SPIM_LOG #define NRFX_SPIM_CONFIG_LOG_ENABLED 1 #endif -#ifdef CONFIG_NRFX_SPIM0 -#define NRFX_SPIM0_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIM1 -#define NRFX_SPIM1_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIM2 -#define NRFX_SPIM2_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIM3 -#define NRFX_SPIM3_ENABLED 1 #ifdef CONFIG_NRF52_ANOMALY_198_WORKAROUND -#define NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED 1 -#endif +#define NRF52_ERRATA_198_ENABLE_WORKAROUND 1 #endif -#ifdef CONFIG_NRFX_SPIM4 -#define NRFX_SPIM4_ENABLED 1 +#ifdef CONFIG_NRF52_ANOMALY_58_WORKAROUND +#define NRF52_ERRATA_58_ENABLE_WORKAROUND 1 #endif #define NRFX_SPIM_DT_HAS_RX_DELAY(node) DT_PROP(node, rx_delay_supported) + @@ -513,130 +432,12 @@ #endif #endif -#ifdef CONFIG_NRFX_SPIM00 -#define NRFX_SPIM00_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIM01 -#define NRFX_SPIM01_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIM20 -#define NRFX_SPIM20_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIM21 -#define NRFX_SPIM21_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIM22 -#define NRFX_SPIM22_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIM23 -#define NRFX_SPIM23_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIM24 -#define NRFX_SPIM24_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIM30 -#define NRFX_SPIM30_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIM120 -#define NRFX_SPIM120_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIM121 -#define NRFX_SPIM121_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIM130 -#define NRFX_SPIM130_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIM131 -#define NRFX_SPIM131_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIM132 -#define NRFX_SPIM132_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIM133 -#define NRFX_SPIM133_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIM134 -#define NRFX_SPIM134_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIM135 -#define NRFX_SPIM135_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIM136 -#define NRFX_SPIM136_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIM137 -#define NRFX_SPIM137_ENABLED 1 -#endif - #ifdef CONFIG_NRFX_SPIS #define NRFX_SPIS_ENABLED 1 #endif #ifdef CONFIG_NRFX_SPIS_LOG #define NRFX_SPIS_CONFIG_LOG_ENABLED 1 #endif -#ifdef CONFIG_NRFX_SPIS0 -#define NRFX_SPIS0_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIS1 -#define NRFX_SPIS1_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIS2 -#define NRFX_SPIS2_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIS3 -#define NRFX_SPIS3_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIS00 -#define NRFX_SPIS00_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIS01 -#define NRFX_SPIS01_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIS20 -#define NRFX_SPIS20_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIS21 -#define NRFX_SPIS21_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIS22 -#define NRFX_SPIS22_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIS23 -#define NRFX_SPIS23_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIS24 -#define NRFX_SPIS24_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIS30 -#define NRFX_SPIS30_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIS120 -#define NRFX_SPIS120_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIS130 -#define NRFX_SPIS130_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIS131 -#define NRFX_SPIS131_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIS132 -#define NRFX_SPIS132_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIS133 -#define NRFX_SPIS133_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIS134 -#define NRFX_SPIS134_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIS135 -#define NRFX_SPIS135_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIS136 -#define NRFX_SPIS136_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_SPIS137 -#define NRFX_SPIS137_ENABLED 1 -#endif #ifdef CONFIG_NRFX_SYSTICK #define NRFX_SYSTICK_ENABLED 1 @@ -659,84 +460,6 @@ #ifdef CONFIG_NRFX_TIMER #define NRFX_TIMER_ENABLED 1 #endif -#ifdef CONFIG_NRFX_TIMER_LOG -#define NRFX_TIMER_CONFIG_LOG_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER0 -#define NRFX_TIMER0_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER1 -#define NRFX_TIMER1_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER2 -#define NRFX_TIMER2_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER3 -#define NRFX_TIMER3_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER4 -#define NRFX_TIMER4_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER00 -#define NRFX_TIMER00_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER10 -#define NRFX_TIMER10_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER20 -#define NRFX_TIMER20_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER21 -#define NRFX_TIMER21_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER22 -#define NRFX_TIMER22_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER23 -#define NRFX_TIMER23_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER24 -#define NRFX_TIMER24_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER020 -#define NRFX_TIMER020_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER021 -#define NRFX_TIMER021_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER022 -#define NRFX_TIMER022_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER120 -#define NRFX_TIMER120_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER121 -#define NRFX_TIMER121_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER130 -#define NRFX_TIMER130_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER131 -#define NRFX_TIMER131_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER132 -#define NRFX_TIMER132_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER133 -#define NRFX_TIMER133_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER134 -#define NRFX_TIMER134_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER135 -#define NRFX_TIMER135_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER136 -#define NRFX_TIMER136_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TIMER137 -#define NRFX_TIMER137_ENABLED 1 -#endif #ifdef CONFIG_NRFX_TWI #define NRFX_TWI_ENABLED 1 @@ -757,68 +480,11 @@ #ifdef CONFIG_NRFX_TWIM_LOG #define NRFX_TWIM_CONFIG_LOG_ENABLED 1 #endif -#ifdef CONFIG_NRFX_TWIM0 -#define NRFX_TWIM0_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIM1 -#define NRFX_TWIM1_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIM2 -#define NRFX_TWIM2_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIM3 -#define NRFX_TWIM3_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIM20 -#define NRFX_TWIM20_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIM21 -#define NRFX_TWIM21_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIM22 -#define NRFX_TWIM22_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIM23 -#define NRFX_TWIM23_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIM24 -#define NRFX_TWIM24_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIM30 -#define NRFX_TWIM30_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIM120 -#define NRFX_TWIM120_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIM130 -#define NRFX_TWIM130_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIM131 -#define NRFX_TWIM131_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIM132 -#define NRFX_TWIM132_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIM133 -#define NRFX_TWIM133_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIM134 -#define NRFX_TWIM134_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIM135 -#define NRFX_TWIM135_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIM136 -#define NRFX_TWIM136_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIM137 -#define NRFX_TWIM137_ENABLED 1 -#endif #ifdef CONFIG_NRF52_ANOMALY_219_WORKAROUND -#define NRFX_TWIM_NRF52_ANOMALY_219_WORKAROUND_ENABLED 1 +#define NRF52_ERRATA_219_ENABLE_WORKAROUND 1 #endif #ifdef CONFIG_SOC_NRF53_ANOMALY_47_WORKAROUND -#define NRFX_TWIM_NRF53_ANOMALY_47_WORKAROUND_ENABLED 1 +#define NRF53_ERRATA_47_ENABLE_WORKAROUND 1 #endif #ifdef CONFIG_NRFX_TWIS @@ -827,60 +493,6 @@ #ifdef CONFIG_NRFX_TWIS_LOG #define NRFX_TWIS_CONFIG_LOG_ENABLED 1 #endif -#ifdef CONFIG_NRFX_TWIS0 -#define NRFX_TWIS0_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIS1 -#define NRFX_TWIS1_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIS2 -#define NRFX_TWIS2_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIS3 -#define NRFX_TWIS3_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIS20 -#define NRFX_TWIS20_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIS21 -#define NRFX_TWIS21_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIS22 -#define NRFX_TWIS22_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIS23 -#define NRFX_TWIS23_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIS24 -#define NRFX_TWIS24_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIS30 -#define NRFX_TWIS30_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIS130 -#define NRFX_TWIS130_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIS131 -#define NRFX_TWIS131_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIS132 -#define NRFX_TWIS132_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIS133 -#define NRFX_TWIS133_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIS134 -#define NRFX_TWIS134_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIS135 -#define NRFX_TWIS135_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIS136 -#define NRFX_TWIS136_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_TWIS137 -#define NRFX_TWIS137_ENABLED 1 -#endif #ifdef CONFIG_NRFX_UART #define NRFX_UART_ENABLED 1 @@ -898,66 +510,6 @@ #ifdef CONFIG_NRFX_UARTE_LOG #define NRFX_UARTE_CONFIG_LOG_ENABLED 1 #endif -#ifdef CONFIG_NRFX_UARTE0 -#define NRFX_UARTE0_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_UARTE1 -#define NRFX_UARTE1_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_UARTE2 -#define NRFX_UARTE2_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_UARTE3 -#define NRFX_UARTE3_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_UARTE00 -#define NRFX_UARTE00_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_UARTE20 -#define NRFX_UARTE20_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_UARTE21 -#define NRFX_UARTE21_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_UARTE22 -#define NRFX_UARTE22_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_UARTE23 -#define NRFX_UARTE23_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_UARTE24 -#define NRFX_UARTE24_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_UARTE30 -#define NRFX_UARTE30_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_UARTE120 -#define NRFX_UARTE120_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_UARTE130 -#define NRFX_UARTE130_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_UARTE131 -#define NRFX_UARTE131_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_UARTE132 -#define NRFX_UARTE132_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_UARTE133 -#define NRFX_UARTE133_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_UARTE134 -#define NRFX_UARTE134_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_UARTE135 -#define NRFX_UARTE135_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_UARTE136 -#define NRFX_UARTE136_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_UARTE137 -#define NRFX_UARTE137_ENABLED 1 -#endif #ifdef CONFIG_NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG #define NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG 1 #endif @@ -987,39 +539,9 @@ #ifdef CONFIG_NRFX_WDT_LOG #define NRFX_WDT_CONFIG_LOG_ENABLED 1 #endif -#ifdef CONFIG_NRFX_WDT0 -#define NRFX_WDT0_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_WDT1 -#define NRFX_WDT1_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_WDT30 -#define NRFX_WDT30_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_WDT31 -#define NRFX_WDT31_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_WDT010 -#define NRFX_WDT010_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_WDT011 -#define NRFX_WDT011_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_WDT130 -#define NRFX_WDT130_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_WDT131 -#define NRFX_WDT131_ENABLED 1 -#endif -#ifdef CONFIG_NRFX_WDT132 -#define NRFX_WDT132_ENABLED 1 -#endif #ifdef CONFIG_NRF52_ANOMALY_109_WORKAROUND -#define NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1 -#define NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1 -#define NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1 -#define NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1 +#define NRF52_ERRATA_109_ENABLE_WORKAROUND 1 #define NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE \ CONFIG_NRF52_ANOMALY_109_WORKAROUND_EGU_INSTANCE #endif diff --git a/modules/hal_nordic/nrfx/nrfx_log.h b/modules/hal_nordic/nrfx/nrfx_log.h index 682388d7dd16..973ca672b538 100644 --- a/modules/hal_nordic/nrfx/nrfx_log.h +++ b/modules/hal_nordic/nrfx/nrfx_log.h @@ -128,6 +128,16 @@ LOG_MODULE_REGISTER(NRFX_MODULE_PREFIX, NRFX_MODULE_LOG_LEVEL); #define NRFX_LOG_ERROR_STRING_GET(error_code) nrfx_error_string_get(error_code) extern char const *nrfx_error_string_get(nrfx_err_t code); +/** + * @brief Macro for getting the textual representation of a given errno error code. + * + * @param[in] error_code Errno error code. + * + * @return String containing the textual representation of the errno error code. + */ +#define NRFX_NEW_LOG_ERROR_STRING_GET(error_code) nrfx_new_error_string_get(error_code) +extern char const *nrfx_new_error_string_get(int code); + /** @} */ #ifdef __cplusplus diff --git a/modules/hal_nordic/nrfx/nrfx_reserved_resources_ncs.h b/modules/hal_nordic/nrfx/nrfx_reserved_resources_ncs.h new file mode 100644 index 000000000000..91f9642a1773 --- /dev/null +++ b/modules/hal_nordic/nrfx/nrfx_reserved_resources_ncs.h @@ -0,0 +1,217 @@ +/* + * Copyright (c) 2024, Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef NRFX_RESERVED_RESOURCES_NCS_H__ +#define NRFX_RESERVED_RESOURCES_NCS_H__ + +#if defined(CONFIG_BT_LL_SOFTDEVICE) +#include +#if defined(CONFIG_SOC_COMPATIBLE_NRF52X) +#define NRFX_PPI_CHANNELS_USED_BY_BT_CTLR SDC_NRF52_PPI_CHANNELS_USED_MASK +#elif defined(CONFIG_SOC_COMPATIBLE_NRF53X) +#define NRFX_DPPI0_CHANNELS_USED_BY_BT_CTLR SDC_NRF53_DPPI_CHANNELS_USED_MASK +#elif defined(CONFIG_SOC_COMPATIBLE_NRF54LX) +#define NRFX_DPPI10_CHANNELS_USED_BY_BT_CTLR SDC_NRF54L_DPPIC10_CHANNELS_USED_MASK +#define NRFX_DPPI00_CHANNELS_USED_BY_BT_CTLR SDC_NRF54L_DPPIC00_CHANNELS_USED_MASK +#define NRFX_PPIB_00_10_CHANNELS_USED_BY_BT_CTLR \ + (SDC_NRF54L_PPIB00_CHANNELS_USED_MASK | SDC_NRF54L_PPIB10_CHANNELS_USED_MASK) +#elif defined(CONFIG_SOC_SERIES_NRF54HX) +#define NRFX_DPPI020_CHANNELS_USED_BY_BT_CTLR SDC_NRF54H_DPPIC020_CHANNELS_USED_MASK +#define NRFX_DPPI030_CHANNELS_USED_BY_BT_CTLR SDC_NRF54H_DPPIC030_CHANNELS_USED_MASK +#define NRFX_PPIB_020_030_CHANNELS_USED_BY_BT_CTLR \ + (SDC_NRF54H_PPIB020_CHANNELS_USED_MASK | SDC_NRF54H_PPIB030_CHANNELS_USED_MASK) +#else +#error Unsupported chip family +#endif +#endif /* defined(CONFIG_BT_LL_SOFTDEVICE) */ + +#if defined(CONFIG_MPSL) +#include +#if defined(CONFIG_SOC_COMPATIBLE_NRF52X) +#define NRFX_PPI_CHANNELS_USED_BY_MPSL MPSL_NRF52_PPI_CHANNELS_USED_MASK +#elif defined(CONFIG_SOC_COMPATIBLE_NRF53X) +#define NRFX_DPPI0_CHANNELS_USED_BY_MPSL MPSL_NRF53_DPPIC_CHANNELS_USED_MASK +#elif defined(CONFIG_SOC_COMPATIBLE_NRF54LX) +#define NRFX_DPPI10_CHANNELS_USED_BY_MPSL MPSL_NRF54L_DPPIC10_CHANNELS_USED_MASK +#define NRFX_DPPI20_CHANNELS_USED_BY_MPSL MPSL_NRF54L_DPPIC20_CHANNELS_USED_MASK +#define NRFX_PPIB_11_21_CHANNELS_USED_BY_MPSL \ + (MPSL_NRF54L_PPIB11_CHANNELS_USED_MASK | MPSL_NRF54L_PPIB21_CHANNELS_USED_MASK) +#elif defined(CONFIG_SOC_SERIES_NRF54HX) +#define NRFX_DPPI020_CHANNELS_USED_BY_MPSL MPSL_NRF54H_DPPIC020_CHANNELS_USED_MASK +#else +#error Unsupported chip family +#endif +#endif + +#include "nrfx_reserved_resources.h" + +#if defined(NRF_802154_VERIFY_PERIPHS_ALLOC_AGAINST_MPSL) + +BUILD_ASSERT((NRFX_DPPI0_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI0_CHANNELS_USED_BY_MPSL) == 0, + "PPI channels used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI0_GROUPS_USED_BY_802154_DRV & NRFX_DPPI0_GROUPS_USED_BY_MPSL) == 0, + "PPI groups used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI00_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI00_CHANNELS_USED_BY_MPSL) == 0, + "PPI channels used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI00_GROUPS_USED_BY_802154_DRV & NRFX_DPPI00_GROUPS_USED_BY_MPSL) == 0, + "PPI groups used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI10_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI10_CHANNELS_USED_BY_MPSL) == 0, + "PPI channels used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI10_GROUPS_USED_BY_802154_DRV & NRFX_DPPI10_GROUPS_USED_BY_MPSL) == 0, + "PPI groups used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI20_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI20_CHANNELS_USED_BY_MPSL) == 0, + "PPI channels used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI20_GROUPS_USED_BY_802154_DRV & NRFX_DPPI20_GROUPS_USED_BY_MPSL) == 0, + "PPI groups used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI30_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI30_CHANNELS_USED_BY_MPSL) == 0, + "PPI channels used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI30_GROUPS_USED_BY_802154_DRV & NRFX_DPPI30_GROUPS_USED_BY_MPSL) == 0, + "PPI groups used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI020_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI020_CHANNELS_USED_BY_MPSL) == 0, + "PPI channels used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI020_GROUPS_USED_BY_802154_DRV & NRFX_DPPI020_GROUPS_USED_BY_MPSL) == 0, + "PPI groups used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI030_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI030_CHANNELS_USED_BY_MPSL) == 0, + "PPI channels used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI030_GROUPS_USED_BY_802154_DRV & NRFX_DPPI030_GROUPS_USED_BY_MPSL) == 0, + "PPI groups used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI120_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI120_CHANNELS_USED_BY_MPSL) == 0, + "PPI channels used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI120_GROUPS_USED_BY_802154_DRV & NRFX_DPPI120_GROUPS_USED_BY_MPSL) == 0, + "PPI groups used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI130_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI130_CHANNELS_USED_BY_MPSL) == 0, + "PPI channels used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI130_GROUPS_USED_BY_802154_DRV & NRFX_DPPI130_GROUPS_USED_BY_MPSL) == 0, + "PPI groups used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI131_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI131_CHANNELS_USED_BY_MPSL) == 0, + "PPI channels used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI131_GROUPS_USED_BY_802154_DRV & NRFX_DPPI131_GROUPS_USED_BY_MPSL) == 0, + "PPI groups used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI132_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI132_CHANNELS_USED_BY_MPSL) == 0, + "PPI channels used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI132_GROUPS_USED_BY_802154_DRV & NRFX_DPPI132_GROUPS_USED_BY_MPSL) == 0, + "PPI groups used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI133_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI133_CHANNELS_USED_BY_MPSL) == 0, + "PPI channels used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI133_GROUPS_USED_BY_802154_DRV & NRFX_DPPI133_GROUPS_USED_BY_MPSL) == 0, + "PPI groups used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI134_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI134_CHANNELS_USED_BY_MPSL) == 0, + "PPI channels used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI134_GROUPS_USED_BY_802154_DRV & NRFX_DPPI134_GROUPS_USED_BY_MPSL) == 0, + "PPI groups used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI135_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI135_CHANNELS_USED_BY_MPSL) == 0, + "PPI channels used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI135_GROUPS_USED_BY_802154_DRV & NRFX_DPPI135_GROUPS_USED_BY_MPSL) == 0, + "PPI groups used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI136_CHANNELS_USED_BY_802154_DRV & NRFX_DPPI136_CHANNELS_USED_BY_MPSL) == 0, + "PPI channels used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_DPPI136_GROUPS_USED_BY_802154_DRV & NRFX_DPPI136_GROUPS_USED_BY_MPSL) == 0, + "PPI groups used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_PPI_CHANNELS_USED_BY_802154_DRV & NRFX_PPI_CHANNELS_USED_BY_MPSL) == 0, + "PPI channels used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_PPI_GROUPS_USED_BY_802154_DRV & NRFX_PPI_GROUPS_USED_BY_MPSL) == 0, + "PPI groups used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_PPIB_00_10_CHANNELS_USED_BY_802154_DRV & + NRFX_PPIB_00_10_CHANNELS_USED_BY_MPSL) == 0, + "PPI channels used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_PPIB_01_20_CHANNELS_USED_BY_802154_DRV & + NRFX_PPIB_01_20_CHANNELS_USED_BY_MPSL) == 0, + "PPI channels used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_PPIB_11_21_CHANNELS_USED_BY_802154_DRV & + NRFX_PPIB_11_21_CHANNELS_USED_BY_MPSL) == 0, + "PPI channels used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_PPIB_22_30_CHANNELS_USED_BY_802154_DRV & + NRFX_PPIB_22_30_CHANNELS_USED_BY_MPSL) == 0, + "PPI channels used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_PPIB_02_03_CHANNELS_USED_BY_802154_DRV & + NRFX_PPIB_02_03_CHANNELS_USED_BY_MPSL) == 0, + "PPI channels used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_PPIB_04_12_CHANNELS_USED_BY_802154_DRV & + NRFX_PPIB_04_12_CHANNELS_USED_BY_MPSL) == 0, + "PPI channels used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +BUILD_ASSERT((NRFX_PPIB_020_030_CHANNELS_USED_BY_802154_DRV & + NRFX_PPIB_020_030_CHANNELS_USED_BY_MPSL) == 0, + "PPI channels used by the IEEE802.15.4 radio driver overlap with those " + "assigned to the MPSL."); + +#endif /* NRF_802154_VERIFY_PERIPHS_ALLOC_AGAINST_MPSL */ +#endif /* NRFX_RESERVED_RESOURCES_NCS_H__ */ diff --git a/modules/nrf_wifi/bus/qspi_if.c b/modules/nrf_wifi/bus/qspi_if.c index 8d3dc81e3476..6d2005a78f7b 100644 --- a/modules/nrf_wifi/bus/qspi_if.c +++ b/modules/nrf_wifi/bus/qspi_if.c @@ -18,7 +18,6 @@ #include #include -#include #include #include #include diff --git a/modules/trusted-firmware-m/nordic/include/tfm_read_ranges.h b/modules/trusted-firmware-m/nordic/include/tfm_read_ranges.h index 43468c7fa319..0c1ba3459237 100644 --- a/modules/trusted-firmware-m/nordic/include/tfm_read_ranges.h +++ b/modules/trusted-firmware-m/nordic/include/tfm_read_ranges.h @@ -9,7 +9,7 @@ #include -#include +#include #ifdef NRF_FICR_S_BASE diff --git a/samples/boards/nordic/nrfx/src/main.c b/samples/boards/nordic/nrfx/src/main.c index 8b3819f2d8a1..bc0506cd2b5d 100644 --- a/samples/boards/nordic/nrfx/src/main.c +++ b/samples/boards/nordic/nrfx/src/main.c @@ -36,33 +36,33 @@ int main(void) { LOG_INF("nrfx_gpiote sample on %s", CONFIG_BOARD); - nrfx_err_t err; + int rv; uint8_t in_channel, out_channel; - uint8_t ppi_channel; - const nrfx_gpiote_t gpiote = NRFX_GPIOTE_INSTANCE(GPIOTE_INST); + nrfx_gppi_handle_t ppi_handle; + static nrfx_gpiote_t gpiote = NRFX_GPIOTE_INSTANCE(NRF_GPIOTE_INST_GET(GPIOTE_INST)); /* Connect GPIOTE instance IRQ to irq handler */ - IRQ_CONNECT(DT_IRQN(GPIOTE_NODE), DT_IRQ(GPIOTE_NODE, priority), nrfx_isr, - NRFX_CONCAT(nrfx_gpiote_, GPIOTE_INST, _irq_handler), 0); + IRQ_CONNECT(DT_IRQN(GPIOTE_NODE), DT_IRQ(GPIOTE_NODE, priority), nrfx_gpiote_irq_handler, + &gpiote, 0); /* Initialize GPIOTE (the interrupt priority passed as the parameter * here is ignored, see nrfx_glue.h). */ - err = nrfx_gpiote_init(&gpiote, 0); - if (err != NRFX_SUCCESS) { - LOG_ERR("nrfx_gpiote_init error: 0x%08X", err); + rv = nrfx_gpiote_init(&gpiote, 0); + if (rv != 0) { + LOG_ERR("nrfx_gpiote_init error: %d", rv); return 0; } - err = nrfx_gpiote_channel_alloc(&gpiote, &in_channel); - if (err != NRFX_SUCCESS) { - LOG_ERR("Failed to allocate in_channel, error: 0x%08X", err); + rv = nrfx_gpiote_channel_alloc(&gpiote, &in_channel); + if (rv != 0) { + LOG_ERR("Failed to allocate in_channel, error: %d", rv); return 0; } - err = nrfx_gpiote_channel_alloc(&gpiote, &out_channel); - if (err != NRFX_SUCCESS) { - LOG_ERR("Failed to allocate out_channel, error: 0x%08X", err); + rv = nrfx_gpiote_channel_alloc(&gpiote, &out_channel); + if (rv != 0) { + LOG_ERR("Failed to allocate out_channel, error: %d", rv); return 0; } @@ -83,10 +83,10 @@ int main(void) .p_handler_config = &handler_config }; - err = nrfx_gpiote_input_configure(&gpiote, INPUT_PIN, &input_config); + rv = nrfx_gpiote_input_configure(&gpiote, INPUT_PIN, &input_config); - if (err != NRFX_SUCCESS) { - LOG_ERR("nrfx_gpiote_input_configure error: 0x%08X", err); + if (rv != 0) { + LOG_ERR("nrfx_gpiote_input_configure error: %d", rv); return 0; } @@ -103,11 +103,11 @@ int main(void) .polarity = NRF_GPIOTE_POLARITY_TOGGLE, .init_val = 1, }; - err = nrfx_gpiote_output_configure(&gpiote, OUTPUT_PIN, + rv = nrfx_gpiote_output_configure(&gpiote, OUTPUT_PIN, &output_config, &task_config); - if (err != NRFX_SUCCESS) { - LOG_ERR("nrfx_gpiote_output_configure error: 0x%08X", err); + if (rv != 0) { + LOG_ERR("nrfx_gpiote_output_configure error: %d", rv); return 0; } @@ -116,23 +116,20 @@ int main(void) LOG_INF("nrfx_gpiote initialized"); - /* Allocate a (D)PPI channel. */ - err = nrfx_gppi_channel_alloc(&ppi_channel); - if (err != NRFX_SUCCESS) { - LOG_ERR("nrfx_gppi_channel_alloc error: 0x%08X", err); - return 0; - } - /* Configure endpoints of the channel so that the input pin event is * connected with the output pin OUT task. This means that each time * the button is pressed, the LED pin will be toggled. */ - nrfx_gppi_channel_endpoints_setup(ppi_channel, - nrfx_gpiote_in_event_address_get(&gpiote, INPUT_PIN), - nrfx_gpiote_out_task_address_get(&gpiote, OUTPUT_PIN)); + rv = nrfx_gppi_conn_alloc(nrfx_gpiote_in_event_address_get(&gpiote, INPUT_PIN), + nrfx_gpiote_out_task_address_get(&gpiote, OUTPUT_PIN), + &ppi_handle); + if (rv < 0) { + LOG_ERR("nrfx_gppi_conn_alloc error: %d", rv); + return 0; + } /* Enable the channel. */ - nrfx_gppi_channels_enable(BIT(ppi_channel)); + nrfx_gppi_conn_enable(ppi_handle); LOG_INF("(D)PPI configured, leaving main()"); return 0; diff --git a/samples/boards/nordic/nrfx_prs/prj.conf b/samples/boards/nordic/nrfx_prs/prj.conf index 3c8ea985f56c..47dd7198fd9d 100644 --- a/samples/boards/nordic/nrfx_prs/prj.conf +++ b/samples/boards/nordic/nrfx_prs/prj.conf @@ -1,8 +1,8 @@ # This is needed for using SPIM2 and UARTE2 via nrfx drivers and for switching # between those peripherals, as they share the same ID and hence cannot be used # simultaneously. -CONFIG_NRFX_SPIM2=y -CONFIG_NRFX_UARTE2=y +CONFIG_NRFX_SPIM=y +CONFIG_NRFX_UARTE=y CONFIG_NRFX_PRS_BOX_2=y # This is needed for using another SPIM instance via the Zephyr SPI driver. diff --git a/samples/boards/nordic/nrfx_prs/src/main.c b/samples/boards/nordic/nrfx_prs/src/main.c index 1b9411d2da43..d767a2bf10c4 100644 --- a/samples/boards/nordic/nrfx_prs/src/main.c +++ b/samples/boards/nordic/nrfx_prs/src/main.c @@ -28,8 +28,8 @@ */ #define SPI_DEV_NODE DT_NODELABEL(spi1) -static nrfx_spim_t spim = NRFX_SPIM_INSTANCE(2); -static nrfx_uarte_t uarte = NRFX_UARTE_INSTANCE(2); +static nrfx_spim_t spim = NRFX_SPIM_INSTANCE(NRF_SPIM2); +static nrfx_uarte_t uarte = NRFX_UARTE_INSTANCE(NRF_UARTE2); static bool spim_initialized; static bool uarte_initialized; static volatile size_t received; @@ -121,7 +121,6 @@ static void spim_handler(const nrfx_spim_evt_t *p_event, void *p_context) static bool switch_to_spim(void) { int ret; - nrfx_err_t err; uint32_t sck_pin; PINCTRL_DT_DEFINE(SPIM_NODE); @@ -162,9 +161,9 @@ static bool switch_to_spim(void) nrfy_gpio_pin_write(sck_pin, (spim_config.mode <= NRF_SPIM_MODE_1) ? 0 : 1); } - err = nrfx_spim_init(&spim, &spim_config, spim_handler, NULL); - if (err != NRFX_SUCCESS) { - printk("nrfx_spim_init() failed: 0x%08x\n", err); + ret = nrfx_spim_init(&spim, &spim_config, spim_handler, NULL); + if (ret != 0) { + printk("nrfx_spim_init() failed: %d", ret); return false; } @@ -176,7 +175,7 @@ static bool switch_to_spim(void) static bool spim_transfer(const uint8_t *tx_data, size_t tx_data_len, uint8_t *rx_buf, size_t rx_buf_size) { - nrfx_err_t err; + int err; nrfx_spim_xfer_desc_t xfer_desc = { .p_tx_buffer = tx_data, .tx_length = tx_data_len, @@ -185,8 +184,8 @@ static bool spim_transfer(const uint8_t *tx_data, size_t tx_data_len, }; err = nrfx_spim_xfer(&spim, &xfer_desc, 0); - if (err != NRFX_SUCCESS) { - printk("nrfx_spim_xfer() failed: 0x%08x\n", err); + if (err != 0) { + printk("nrfx_spim_xfer() failed: %d\n", err); return false; } @@ -213,7 +212,6 @@ static void uarte_handler(const nrfx_uarte_event_t *p_event, void *p_context) static bool switch_to_uarte(void) { int ret; - nrfx_err_t err; PINCTRL_DT_DEFINE(UARTE_NODE); @@ -244,9 +242,9 @@ static bool switch_to_uarte(void) return ret; } - err = nrfx_uarte_init(&uarte, &uarte_config, uarte_handler); - if (err != NRFX_SUCCESS) { - printk("nrfx_uarte_init() failed: 0x%08x\n", err); + ret = nrfx_uarte_init(&uarte, &uarte_config, uarte_handler); + if (err != 0) { + printk("nrfx_uarte_init() failed: %d\n", ret); return false; } @@ -258,17 +256,23 @@ static bool switch_to_uarte(void) static bool uarte_transfer(const uint8_t *tx_data, size_t tx_data_len, uint8_t *rx_buf, size_t rx_buf_size) { - nrfx_err_t err; + int err; - err = nrfx_uarte_rx(&uarte, rx_buf, rx_buf_size); - if (err != NRFX_SUCCESS) { - printk("nrfx_uarte_rx() failed: 0x%08x\n", err); + err = nrfx_uarte_rx_buffer_set(&uarte, rx_buf, rx_buf_size); + if (err != 0) { + printk("nrfx_uarte_rx_buffer_set() failed: %d\n", err); + return false; + } + + err = nrfx_uarte_rx_enable(&uarte, NRFX_UARTE_RX_ENABLE_STOP_ON_END); + if (err != 0) { + printk("nrfx_uarte_rx_enable() failed: %d\n", err); return false; } err = nrfx_uarte_tx(&uarte, tx_data, tx_data_len, 0); - if (err != NRFX_SUCCESS) { - printk("nrfx_uarte_tx() failed: 0x%08x\n", err); + if (err != 0) { + printk("nrfx_uarte_tx() failed: %d\n", err); return false; } diff --git a/samples/boards/nordic/system_off/boards/nrf54l15dk_nrf54l15_cpuapp_comparator.overlay b/samples/boards/nordic/system_off/boards/nrf54l15dk_nrf54l15_cpuapp_comparator.overlay index f0b39b456206..ce93cee141a1 100644 --- a/samples/boards/nordic/system_off/boards/nrf54l15dk_nrf54l15_cpuapp_comparator.overlay +++ b/samples/boards/nordic/system_off/boards/nrf54l15dk_nrf54l15_cpuapp_comparator.overlay @@ -1,6 +1,8 @@ +#include + &comp { compatible = "nordic,nrf-lpcomp"; - psel = "AIN4"; + psel = ; refsel = "VDD_4_8"; status = "okay"; }; diff --git a/samples/drivers/i2s/echo/boards/nrf5340dk_nrf5340_cpuapp.conf b/samples/drivers/i2s/echo/boards/nrf5340dk_nrf5340_cpuapp.conf new file mode 100644 index 000000000000..df9df966798c --- /dev/null +++ b/samples/drivers/i2s/echo/boards/nrf5340dk_nrf5340_cpuapp.conf @@ -0,0 +1,7 @@ +# +# Copyright The Zephyr Project Contributors +# +# SPDX-License-Identifier: Apache-2.0 +# + +CONFIG_I2S_NRFX_ALLOW_MCK_BYPASS=y diff --git a/samples/drivers/led/led_strip/boards/nrf52dk_nrf52832.conf b/samples/drivers/led/led_strip/boards/nrf52dk_nrf52832.conf deleted file mode 100644 index b20eefa4deab..000000000000 --- a/samples/drivers/led/led_strip/boards/nrf52dk_nrf52832.conf +++ /dev/null @@ -1,3 +0,0 @@ -# This driver only uses spi_write() with the SPIM instance it allocates, -# so PAN 58 doesn't matter, because the RX length is always 0. -CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58=y diff --git a/samples/subsys/usb/uac2_explicit_feedback/app.overlay b/samples/subsys/usb/uac2_explicit_feedback/app.overlay index 3ff71797aa99..21119a79206d 100644 --- a/samples/subsys/usb/uac2_explicit_feedback/app.overlay +++ b/samples/subsys/usb/uac2_explicit_feedback/app.overlay @@ -11,6 +11,7 @@ compatible = "zephyr,uac2"; status = "okay"; full-speed; + high-speed; audio-function = ; uac_aclk: aclk { diff --git a/samples/subsys/usb/uac2_explicit_feedback/boards/nrf5340dk_nrf5340_cpuapp.conf b/samples/subsys/usb/uac2_explicit_feedback/boards/nrf5340dk_nrf5340_cpuapp.conf index ce67033381a6..4c7c060177e0 100644 --- a/samples/subsys/usb/uac2_explicit_feedback/boards/nrf5340dk_nrf5340_cpuapp.conf +++ b/samples/subsys/usb/uac2_explicit_feedback/boards/nrf5340dk_nrf5340_cpuapp.conf @@ -1,2 +1,2 @@ #Enable timer for asynchronous feedback -CONFIG_NRFX_TIMER2=y +CONFIG_NRFX_TIMER=y diff --git a/samples/subsys/usb/uac2_explicit_feedback/boards/nrf54h20dk_nrf54h20_cpuapp.conf b/samples/subsys/usb/uac2_explicit_feedback/boards/nrf54h20dk_nrf54h20_cpuapp.conf index 0e35fa1f491e..ce07cde36568 100644 --- a/samples/subsys/usb/uac2_explicit_feedback/boards/nrf54h20dk_nrf54h20_cpuapp.conf +++ b/samples/subsys/usb/uac2_explicit_feedback/boards/nrf54h20dk_nrf54h20_cpuapp.conf @@ -1,8 +1,4 @@ # Enable timer for asynchronous feedback CONFIG_NRFX_GPPI=y -CONFIG_NRFX_TIMER131=y +CONFIG_NRFX_TIMER=y CONFIG_NRFX_GPIOTE130=y - -# Sample is Full-Speed only, prevent High-Speed enumeration -CONFIG_UDC_DRIVER_HIGH_SPEED_SUPPORT_ENABLED=n -CONFIG_USBD_MAX_SPEED_FULL=y diff --git a/samples/subsys/usb/uac2_explicit_feedback/src/feedback.h b/samples/subsys/usb/uac2_explicit_feedback/src/feedback.h index 7f5bf2027d8f..37c1dc975e58 100644 --- a/samples/subsys/usb/uac2_explicit_feedback/src/feedback.h +++ b/samples/subsys/usb/uac2_explicit_feedback/src/feedback.h @@ -9,15 +9,14 @@ #include -/* Nominal number of samples received on each SOF. This sample is currently - * supporting only 48 kHz sample rate. - */ -#define SAMPLES_PER_SOF 48 +/* This sample is currently supporting only 48 kHz sample rate. */ +#define SAMPLE_RATE 48000 struct feedback_ctx *feedback_init(void); -void feedback_reset_ctx(struct feedback_ctx *ctx); +void feedback_reset_ctx(struct feedback_ctx *ctx, bool microframes); void feedback_process(struct feedback_ctx *ctx); -void feedback_start(struct feedback_ctx *ctx, int i2s_blocks_queued); +void feedback_start(struct feedback_ctx *ctx, int i2s_blocks_queued, + bool microframes); uint32_t feedback_value(struct feedback_ctx *ctx); - +#define SAMPLES_PER_SOF 48 #endif /* FEEDBACK_H_ */ diff --git a/samples/subsys/usb/uac2_explicit_feedback/src/feedback_dummy.c b/samples/subsys/usb/uac2_explicit_feedback/src/feedback_dummy.c index 7e274ca2ed05..378a43e06ef4 100644 --- a/samples/subsys/usb/uac2_explicit_feedback/src/feedback_dummy.c +++ b/samples/subsys/usb/uac2_explicit_feedback/src/feedback_dummy.c @@ -5,15 +5,23 @@ */ #include +#include #include "feedback.h" #warning "No target specific feedback code, overruns/underruns will occur" -#define FEEDBACK_K 10 +#define FEEDBACK_FS_K 10 +#define FEEDBACK_FS_SHIFT 4 +#define FEEDBACK_HS_K 13 +#define FEEDBACK_HS_SHIFT 3 + +static struct feedback_ctx { + bool high_speed; +} fb_ctx; struct feedback_ctx *feedback_init(void) { - return NULL; + return &fb_ctx; } void feedback_process(struct feedback_ctx *ctx) @@ -21,19 +29,25 @@ void feedback_process(struct feedback_ctx *ctx) ARG_UNUSED(ctx); } -void feedback_reset_ctx(struct feedback_ctx *ctx) +void feedback_reset_ctx(struct feedback_ctx *ctx, bool microframes) { - ARG_UNUSED(ctx); + ctx->high_speed = microframes; } -void feedback_start(struct feedback_ctx *ctx, int i2s_blocks_queued) +void feedback_start(struct feedback_ctx *ctx, int i2s_blocks_queued, + bool microframes) { - ARG_UNUSED(ctx); ARG_UNUSED(i2s_blocks_queued); + + ctx->high_speed = microframes; } uint32_t feedback_value(struct feedback_ctx *ctx) { /* Always request nominal number of samples */ - return SAMPLES_PER_SOF << FEEDBACK_K; + if (USBD_SUPPORTS_HIGH_SPEED && ctx->high_speed) { + return (SAMPLE_RATE / 8000) << (FEEDBACK_HS_K + FEEDBACK_HS_SHIFT); + } + + return (SAMPLE_RATE / 1000) << (FEEDBACK_FS_K + FEEDBACK_FS_SHIFT); } diff --git a/samples/subsys/usb/uac2_explicit_feedback/src/feedback_nrf.c b/samples/subsys/usb/uac2_explicit_feedback/src/feedback_nrf.c index 62a7ad05ef9c..c33d95063fd6 100644 --- a/samples/subsys/usb/uac2_explicit_feedback/src/feedback_nrf.c +++ b/samples/subsys/usb/uac2_explicit_feedback/src/feedback_nrf.c @@ -8,8 +8,8 @@ #include #include "feedback.h" -#include #include +#include #include #include #include @@ -60,11 +60,10 @@ static inline void feedback_target_init(void) #error "Unsupported target" #endif -static const nrfx_gpiote_t gpiote = - NRFX_GPIOTE_INSTANCE(FEEDBACK_GPIOTE_INSTANCE_NUMBER); +#define FEEDBACK_GPIOTE_NODE DT_NODELABEL(UTIL_CAT(gpiote, FEEDBACK_GPIOTE_INSTANCE_NUMBER)) -static const nrfx_timer_t feedback_timer_instance = - NRFX_TIMER_INSTANCE(FEEDBACK_TIMER_INSTANCE_NUMBER); +static nrfx_timer_t feedback_timer_instance = + NRFX_TIMER_INSTANCE(NRF_TIMER_INST_GET(FEEDBACK_TIMER_INSTANCE_NUMBER)); /* See 5.12.4.2 Feedback in Universal Serial Bus Specification Revision 2.0 for * more information about the feedback. There is a direct implementation of the @@ -84,8 +83,14 @@ static const nrfx_timer_t feedback_timer_instance = * Full-Speed isochronous feedback is Q10.10 unsigned integer left-justified in * the 24-bits so it has Q10.14 format. This sample application puts zeroes to * the 4 least significant bits (does not use the bits for extra precision). + * + * High-Speed isochronous feedback is Q12.13 unsigned integer aligned in the + * 32-bits so the binary point is located between second and third byte so it + * has Q16.16 format. This sample applications puts zeroes to the 3 least + * significant bits (does not use the bits for extra precision). */ -#define FEEDBACK_K 10 +#define FEEDBACK_FS_K 10 +#define FEEDBACK_HS_K 13 #if defined(CONFIG_APP_USE_I2S_LRCLK_EDGES_COUNTER) #define FEEDBACK_P 1 #else @@ -93,11 +98,14 @@ static const nrfx_timer_t feedback_timer_instance = #endif #define FEEDBACK_FS_SHIFT 4 +#define FEEDBACK_HS_SHIFT 3 static struct feedback_ctx { uint32_t fb_value; int32_t rel_sof_offset; int32_t base_sof_offset; + uint32_t counts_per_sof; + bool high_speed; union { /* For edge counting */ struct { @@ -109,11 +117,11 @@ static struct feedback_ctx { }; } fb_ctx; -static nrfx_err_t feedback_edge_counter_setup(void) +static int feedback_edge_counter_setup(void) { - nrfx_err_t err; uint8_t feedback_gpiote_channel; - uint8_t feedback_gppi_channel; + nrfx_gppi_handle_t feedback_gppi_handle; + nrfx_gpiote_t *gpiote = &GPIOTE_NRFX_INST_BY_NODE(FEEDBACK_GPIOTE_NODE); nrfx_gpiote_trigger_config_t trigger_config = { .trigger = NRFX_GPIOTE_TRIGGER_TOGGLE, .p_in_channel = &feedback_gpiote_channel, @@ -123,14 +131,15 @@ static nrfx_err_t feedback_edge_counter_setup(void) .p_pull_config = &pull, .p_trigger_config = &trigger_config, }; + int rv; - err = nrfx_gpiote_channel_alloc(&gpiote, &feedback_gpiote_channel); - if (err != NRFX_SUCCESS) { - return err; + rv = nrfx_gpiote_channel_alloc(gpiote, &feedback_gpiote_channel); + if (rv != 0) { + return rv; } - nrfx_gpiote_input_configure(&gpiote, FEEDBACK_PIN, &input_pin_config); - nrfx_gpiote_trigger_enable(&gpiote, FEEDBACK_PIN, false); + nrfx_gpiote_input_configure(gpiote, FEEDBACK_PIN, &input_pin_config); + nrfx_gpiote_trigger_enable(gpiote, FEEDBACK_PIN, false); /* Configure TIMER in COUNTER mode */ const nrfx_timer_config_t cfg = { @@ -141,31 +150,30 @@ static nrfx_err_t feedback_edge_counter_setup(void) .p_context = NULL, }; - err = nrfx_timer_init(&feedback_timer_instance, &cfg, NULL); - if (err != NRFX_SUCCESS) { - LOG_ERR("nrfx timer init error (sample clk feedback) - Return value: %d", err); - return err; + rv = nrfx_timer_init(&feedback_timer_instance, &cfg, NULL); + if (rv != 0) { + LOG_ERR("nrfx timer init error (sample clk feedback) - Return value: %d", rv); + return rv; } /* Subscribe TIMER COUNT task to GPIOTE IN event */ - err = nrfx_gppi_channel_alloc(&feedback_gppi_channel); - if (err != NRFX_SUCCESS) { - LOG_ERR("gppi_channel_alloc failed with: %d\n", err); - return err; - } + uint32_t eep = nrfx_gpiote_in_event_address_get(gpiote, FEEDBACK_PIN); + uint32_t tep = nrfx_timer_task_address_get(&feedback_timer_instance, NRF_TIMER_TASK_COUNT); - nrfx_gppi_channel_endpoints_setup(feedback_gppi_channel, - nrfx_gpiote_in_event_address_get(&gpiote, FEEDBACK_PIN), - nrfx_timer_task_address_get(&feedback_timer_instance, NRF_TIMER_TASK_COUNT)); + rv = nrfx_gppi_conn_alloc(eep, tep, &feedback_gppi_handle); + if (rv < 0) { + LOG_ERR("gppi_conn_alloc failed with: %d\n", rv); + return rv; + } - nrfx_gppi_channels_enable(BIT(feedback_gppi_channel)); + nrfx_gppi_conn_enable(feedback_gppi_handle); - return NRFX_SUCCESS; + return 0; } -static nrfx_err_t feedback_relative_timer_setup(void) +static int feedback_relative_timer_setup(void) { - nrfx_err_t err; + int err; const nrfx_timer_config_t cfg = { .frequency = NRFX_MHZ_TO_HZ(16UL), .mode = NRF_TIMER_MODE_TIMER, @@ -175,7 +183,7 @@ static nrfx_err_t feedback_relative_timer_setup(void) }; err = nrfx_timer_init(&feedback_timer_instance, &cfg, NULL); - if (err != NRFX_SUCCESS) { + if (err != 0) { LOG_ERR("nrfx timer init error (relative timer) - Return value: %d", err); } @@ -184,54 +192,50 @@ static nrfx_err_t feedback_relative_timer_setup(void) struct feedback_ctx *feedback_init(void) { - nrfx_err_t err; - uint8_t usbd_sof_gppi_channel; - uint8_t i2s_framestart_gppi_channel; + nrfx_gppi_handle_t usbd_sof_gppi_handle; + nrfx_gppi_handle_t i2s_framestart_gppi_handle; + int rv; feedback_target_init(); - feedback_reset_ctx(&fb_ctx); + feedback_reset_ctx(&fb_ctx, false); if (IS_ENABLED(CONFIG_APP_USE_I2S_LRCLK_EDGES_COUNTER)) { - err = feedback_edge_counter_setup(); + rv = feedback_edge_counter_setup(); } else { - err = feedback_relative_timer_setup(); + rv = feedback_relative_timer_setup(); } - if (err != NRFX_SUCCESS) { + if (rv != 0) { return &fb_ctx; } /* Subscribe TIMER CAPTURE task to USBD SOF event */ - err = nrfx_gppi_channel_alloc(&usbd_sof_gppi_channel); - if (err != NRFX_SUCCESS) { - LOG_ERR("gppi_channel_alloc failed with: %d\n", err); + uint32_t tsk1 = nrfx_timer_capture_task_address_get(&feedback_timer_instance, + FEEDBACK_TIMER_USBD_SOF_CAPTURE); + uint32_t tsk2 = nrfx_timer_capture_task_address_get(&feedback_timer_instance, + FEEDBACK_TIMER_I2S_FRAMESTART_CAPTURE); + + rv = nrfx_gppi_conn_alloc(USB_SOF_EVENT_ADDRESS, tsk1, &usbd_sof_gppi_handle); + if (rv < 0) { + LOG_ERR("gppi_conn_alloc failed with: %d\n", rv); return &fb_ctx; } - nrfx_gppi_channel_endpoints_setup(usbd_sof_gppi_channel, - USB_SOF_EVENT_ADDRESS, - nrfx_timer_capture_task_address_get(&feedback_timer_instance, - FEEDBACK_TIMER_USBD_SOF_CAPTURE)); - nrfx_gppi_fork_endpoint_setup(usbd_sof_gppi_channel, - nrfx_timer_task_address_get(&feedback_timer_instance, - NRF_TIMER_TASK_CLEAR)); + nrfx_gppi_ep_attach(usbd_sof_gppi_handle, + nrfx_timer_task_address_get(&feedback_timer_instance, + NRF_TIMER_TASK_CLEAR)); - nrfx_gppi_channels_enable(BIT(usbd_sof_gppi_channel)); + nrfx_gppi_conn_enable(usbd_sof_gppi_handle); /* Subscribe TIMER CAPTURE task to I2S FRAMESTART event */ - err = nrfx_gppi_channel_alloc(&i2s_framestart_gppi_channel); - if (err != NRFX_SUCCESS) { - LOG_ERR("gppi_channel_alloc failed with: %d\n", err); + rv = nrfx_gppi_conn_alloc(I2S_FRAMESTART_EVENT_ADDRESS, tsk2, &i2s_framestart_gppi_handle); + if (rv < 0) { + LOG_ERR("gppi_conn_alloc failed with: %d\n", rv); return &fb_ctx; } - nrfx_gppi_channel_endpoints_setup(i2s_framestart_gppi_channel, - I2S_FRAMESTART_EVENT_ADDRESS, - nrfx_timer_capture_task_address_get(&feedback_timer_instance, - FEEDBACK_TIMER_I2S_FRAMESTART_CAPTURE)); - - nrfx_gppi_channels_enable(BIT(i2s_framestart_gppi_channel)); + nrfx_gppi_conn_enable(i2s_framestart_gppi_handle); /* Enable feedback timer */ nrfx_timer_enable(&feedback_timer_instance); @@ -239,13 +243,31 @@ struct feedback_ctx *feedback_init(void) return &fb_ctx; } +static uint32_t nominal_feedback_value(struct feedback_ctx *ctx) +{ + if (ctx->high_speed) { + return (SAMPLE_RATE / 8000) << (FEEDBACK_HS_K + FEEDBACK_HS_SHIFT); + } + + return (SAMPLE_RATE / 1000) << (FEEDBACK_FS_K + FEEDBACK_FS_SHIFT); +} + +static uint32_t feedback_period(struct feedback_ctx *ctx) +{ + if (ctx->high_speed) { + return BIT(FEEDBACK_HS_K - FEEDBACK_P); + } + + return BIT(FEEDBACK_FS_K - FEEDBACK_P); +} + static void update_sof_offset(struct feedback_ctx *ctx, uint32_t sof_cc, uint32_t framestart_cc) { int sof_offset; if (!IS_ENABLED(CONFIG_APP_USE_I2S_LRCLK_EDGES_COUNTER)) { - uint32_t clks_per_edge; + uint32_t nominator; /* Convert timer clock (independent from both Audio clock and * USB host SOF clock) to fake sample clock shifted by P values. @@ -255,18 +277,17 @@ static void update_sof_offset(struct feedback_ctx *ctx, uint32_t sof_cc, * when regulated and therefore the relative clock frequency * discrepancies are essentially negligible. */ - clks_per_edge = sof_cc / (SAMPLES_PER_SOF << FEEDBACK_P); - sof_cc /= MAX(clks_per_edge, 1); - framestart_cc /= MAX(clks_per_edge, 1); + nominator = MIN(sof_cc, framestart_cc) * ctx->counts_per_sof; + sof_offset = nominator / MAX(sof_cc, 1); + } else { + sof_offset = framestart_cc; } /* /2 because we treat the middle as a turning point from being * "too late" to "too early". */ - if (framestart_cc > (SAMPLES_PER_SOF << FEEDBACK_P)/2) { - sof_offset = framestart_cc - (SAMPLES_PER_SOF << FEEDBACK_P); - } else { - sof_offset = framestart_cc; + if (sof_offset > ctx->counts_per_sof/2) { + sof_offset -= ctx->counts_per_sof; } /* The heuristic above is not enough when the offset gets too large. @@ -279,17 +300,17 @@ static void update_sof_offset(struct feedback_ctx *ctx, uint32_t sof_cc, if (sof_offset >= 0) { abs_diff = sof_offset - ctx->rel_sof_offset; - base_change = -(SAMPLES_PER_SOF << FEEDBACK_P); + base_change = -ctx->counts_per_sof; } else { abs_diff = ctx->rel_sof_offset - sof_offset; - base_change = SAMPLES_PER_SOF << FEEDBACK_P; + base_change = ctx->counts_per_sof; } /* Adjust base offset only if the change happened through the * outer bound. The actual changes should be significantly lower * than the threshold here. */ - if (abs_diff > (SAMPLES_PER_SOF << FEEDBACK_P)/2) { + if (abs_diff > ctx->counts_per_sof/2) { ctx->base_sof_offset += base_change; } } @@ -297,8 +318,12 @@ static void update_sof_offset(struct feedback_ctx *ctx, uint32_t sof_cc, ctx->rel_sof_offset = sof_offset; } -static inline int32_t offset_to_correction(int32_t offset) +static inline int32_t offset_to_correction(struct feedback_ctx *ctx, int32_t offset) { + if (ctx->high_speed) { + return -(offset / BIT(FEEDBACK_P)) * BIT(FEEDBACK_HS_SHIFT); + } + return -(offset / BIT(FEEDBACK_P)) * BIT(FEEDBACK_FS_SHIFT); } @@ -320,39 +345,66 @@ static int32_t pi_update(struct feedback_ctx *ctx) int32_t error = SP - PV; /* - * With above normalization at Full-Speed, when data received during - * SOF n appears on I2S during SOF n+3, the Ziegler Nichols Ultimate - * Gain is around 1.15 and the oscillation period is around 90 SOF. - * (much nicer oscillations with 204.8 SOF period can be observed with - * gain 0.5 when the delay is not n+3, but n+33 - surprisingly the - * resulting PI coefficients after power of two rounding are the same). + * With above normalization, when data received during SOF n appears on + * I2S during SOF n+3, the Ziegler Nichols Ultimate Gain and oscillation + * periods are as follows: * - * Ziegler-Nichols rule with applied stability margin of 2 results in: - * Kc = 0.22 * Ku = 0.22 * 1.15 = 0.253 - * Ti = 0.83 * tu = 0.83 * 80 = 66.4 + * Full-Speed Linux: Ku = 1.34 tu=77 [FS SOFs] + * Full-Speed Mac OS: Ku = 0.173 tu=580 [FS SOFs] + * High-Speed Mac OS: Ku = 0.895 tu=4516 [HS SOFs] + * High-Speed Windows: Ku = 0.515 tu=819 [HS SOFs] * - * Converting the rules above to parallel PI gives: - * Kp = Kc = 0.253 - * Ki = Kc/Ti = 0.254/66.4 ~= 0.0038253 + * Linux and Mac OS oscillations were very neat, while Windows seems to + * be averaging feedback value and therefore it is hard to get steady + * oscillations without getting buffer uderrun. * - * Because we want fixed-point optimized non-tunable implementation, - * the parameters can be conveniently expressed with power of two: - * Kp ~= pow(2, -2) = 0.25 (divide by 4) - * Ki ~= pow(2, -8) = 0.0039 (divide by 256) + * Ziegler-Nichols rule with applied stability margin of 2 results in: + * [FS Linux] [FS Mac] [HS Mac] [HS Windows] + * Kc = 0.22 * Ku 0.2948 0.0381 0.1969 0.1133 + * Ti = 0.83 * tu 63.91 481.4 3748 647.9 * - * This can be implemented as: + * Converting the rules to work with following simple regulator: * ctx->integrator += error; - * return (error + (ctx->integrator / 64)) / 4; - * but unfortunately such regulator is pretty aggressive and keeps - * oscillating rather quickly around the setpoint (within +-1 sample). + * return (error + (ctx->integrator / Ti)) / invKc; + * + * gives following parameters: + * [FS Linux] [FS Mac] [HS Mac] [HS Windows] + * invKc = 1/Kc 3 26 5 8 + * Ti 64 482 3748 648 + * + * The respective regulators seem to give quarter-amplitude-damping on + * respective hosts, but tuning from one host can get into oscillations + * on another host. The regulation goal is to achieve a single set of + * parameters to be used with all hosts, the only parameter difference + * can be based on operating speed. + * + * After a number of tests with all the hosts, following parameters + * were determined to result in nice no-overshoot response: + * [Full-Speed] [High-Speed] + * invKc 128 128 + * Ti 2048 16384 * - * Manually tweaking the constants so the regulator output is shifted - * down by 4 bits (i.e. change /64 to /2048 and /4 to /128) yields - * really good results (the outcome is similar, even slightly better, - * than using I2S LRCLK edge counting directly). + * The power-of-two parameters were arbitrarily chosen for rounding. + * The 16384 = 2048 * 8 can be considered as unifying integration time. + * + * While the no-overshoot is also present with invKc as low as 32, such + * regulator is pretty aggressive and keeps oscillating rather quickly + * around the setpoint (within +-1 sample). Lowering the controller gain + * (increasing invKc value) yields really good results (the outcome is + * similar to using I2S LRCLK edge counting directly). + * + * The most challenging scenario is for the regulator to stabilize right + * after startup when I2S consumes data faster than nominal sample rate + * (48 kHz = 6 samples per SOF at High-Speed, 48 samples at Full-Speed) + * according to host (I2S consuming data slower slower than nominal + * sample rate is not problematic at all because buffer overrun does not + * stop I2S streaming). This regulator should be able to stabilize for + * any frequency that is within required USB SOF accuracy of 500 ppm, + * i.e. when nominal sample rate is 48 kHz the real sample rate can be + * anywhere in [47.976 kHz; 48.024 kHz] range. */ ctx->integrator += error; - return (error + (ctx->integrator / 2048)) / 128; + return (error + (ctx->integrator / (ctx->high_speed ? 16384 : 2048))) / 128; } void feedback_process(struct feedback_ctx *ctx) @@ -374,17 +426,21 @@ void feedback_process(struct feedback_ctx *ctx) ctx->fb_counter += sof_cc; ctx->fb_periods++; - if (ctx->fb_periods == BIT(FEEDBACK_K - FEEDBACK_P)) { + if (ctx->fb_periods == feedback_period(ctx)) { - /* fb_counter holds Q10.10 value, left-justify it */ - fb = ctx->fb_counter << FEEDBACK_FS_SHIFT; + if (ctx->high_speed) { + fb = ctx->fb_counter << FEEDBACK_HS_SHIFT; + } else { + /* fb_counter holds Q10.10 value, left-justify it */ + fb = ctx->fb_counter << FEEDBACK_FS_SHIFT; + } /* Align I2S FRAMESTART to USB SOF by adjusting reported * feedback value. This is endpoint specific correction * mentioned but not specified in USB 2.0 Specification. */ if (abs(offset) > BIT(FEEDBACK_P)) { - fb += offset_to_correction(offset); + fb += offset_to_correction(ctx, offset); } ctx->fb_value = fb; @@ -392,22 +448,25 @@ void feedback_process(struct feedback_ctx *ctx) ctx->fb_periods = 0; } } else { + const uint32_t zero_lsb_mask = ctx->high_speed ? 0x7 : 0xF; + /* Use PI controller to generate required feedback deviation * from nominal feedback value. */ - fb = SAMPLES_PER_SOF << (FEEDBACK_K + FEEDBACK_FS_SHIFT); + fb = nominal_feedback_value(ctx); /* Clear the additional LSB bits in feedback value, i.e. do not * use the optional extra resolution. */ - fb += pi_update(ctx) & ~0xF; + fb += pi_update(ctx) & ~zero_lsb_mask; ctx->fb_value = fb; } } -void feedback_reset_ctx(struct feedback_ctx *ctx) +void feedback_reset_ctx(struct feedback_ctx *ctx, bool microframes) { /* Reset feedback to nominal value */ - ctx->fb_value = SAMPLES_PER_SOF << (FEEDBACK_K + FEEDBACK_FS_SHIFT); + ctx->high_speed = microframes; + ctx->fb_value = nominal_feedback_value(ctx); if (IS_ENABLED(CONFIG_APP_USE_I2S_LRCLK_EDGES_COUNTER)) { ctx->fb_counter = 0; ctx->fb_periods = 0; @@ -416,19 +475,28 @@ void feedback_reset_ctx(struct feedback_ctx *ctx) } } -void feedback_start(struct feedback_ctx *ctx, int i2s_blocks_queued) +void feedback_start(struct feedback_ctx *ctx, int i2s_blocks_queued, + bool microframes) { + ctx->high_speed = microframes; + ctx->fb_value = nominal_feedback_value(ctx); + + if (microframes) { + ctx->counts_per_sof = (SAMPLE_RATE / 8000) << FEEDBACK_P; + } else { + ctx->counts_per_sof = (SAMPLE_RATE / 1000) << FEEDBACK_P; + } + /* I2S data was supposed to go out at SOF, but it is inevitably * delayed due to triggering I2S start by software. Set relative * SOF offset value in a way that ensures that values past "half * frame" are treated as "too late" instead of "too early" */ - ctx->rel_sof_offset = (SAMPLES_PER_SOF << FEEDBACK_P) / 2; + ctx->rel_sof_offset = ctx->counts_per_sof / 2; /* If there are more than 2 I2S blocks queued, use feedback regulator * to correct the situation. */ - ctx->base_sof_offset = (i2s_blocks_queued - 2) * - (SAMPLES_PER_SOF << FEEDBACK_P); + ctx->base_sof_offset = (i2s_blocks_queued - 2) * ctx->counts_per_sof; } uint32_t feedback_value(struct feedback_ctx *ctx) diff --git a/samples/subsys/usb/uac2_explicit_feedback/src/main.c b/samples/subsys/usb/uac2_explicit_feedback/src/main.c index 3f4f596f35c2..40df3f5b8fc7 100644 --- a/samples/subsys/usb/uac2_explicit_feedback/src/main.c +++ b/samples/subsys/usb/uac2_explicit_feedback/src/main.c @@ -20,14 +20,17 @@ LOG_MODULE_REGISTER(uac2_sample, LOG_LEVEL_INF); #define HEADPHONES_OUT_TERMINAL_ID UAC2_ENTITY_ID(DT_NODELABEL(out_terminal)) -#define SAMPLE_FREQUENCY (SAMPLES_PER_SOF * 1000) +#define FS_SAMPLES_PER_SOF 48 +#define HS_SAMPLES_PER_SOF 6 +#define MAX_SAMPLES_PER_SOF MAX(FS_SAMPLES_PER_SOF, HS_SAMPLES_PER_SOF) +#define SAMPLE_FREQUENCY (FS_SAMPLES_PER_SOF * 1000) #define SAMPLE_BIT_WIDTH 16 #define NUMBER_OF_CHANNELS 2 #define BYTES_PER_SAMPLE DIV_ROUND_UP(SAMPLE_BIT_WIDTH, 8) #define BYTES_PER_SLOT (BYTES_PER_SAMPLE * NUMBER_OF_CHANNELS) -#define MIN_BLOCK_SIZE ((SAMPLES_PER_SOF - 1) * BYTES_PER_SLOT) -#define BLOCK_SIZE (SAMPLES_PER_SOF * BYTES_PER_SLOT) -#define MAX_BLOCK_SIZE ((SAMPLES_PER_SOF + 1) * BYTES_PER_SLOT) +#define MIN_BLOCK_SIZE ((MAX_SAMPLES_PER_SOF - 1) * BYTES_PER_SLOT) +#define BLOCK_SIZE (MAX_SAMPLES_PER_SOF * BYTES_PER_SLOT) +#define MAX_BLOCK_SIZE ((MAX_SAMPLES_PER_SOF + 1) * BYTES_PER_SLOT) /* Absolute minimum is 5 buffers (1 actively consumed by I2S, 2nd queued as next * buffer, 3rd acquired by USB stack to receive data to, and 2 to handle SOF/I2S @@ -42,6 +45,7 @@ struct usb_i2s_ctx { const struct device *i2s_dev; bool terminal_enabled; bool i2s_started; + bool microframes; /* Number of blocks written, used to determine when to start I2S. * Overflows are not a problem becuse this variable is not necessary * after I2S is started. @@ -60,15 +64,15 @@ static void uac2_terminal_update_cb(const struct device *dev, uint8_t terminal, * ignore the terminal variable. */ __ASSERT_NO_MSG(terminal == HEADPHONES_OUT_TERMINAL_ID); - /* This sample is for Full-Speed only devices. */ - __ASSERT_NO_MSG(microframes == false); + + ctx->microframes = microframes; ctx->terminal_enabled = enabled; if (ctx->i2s_started && !enabled) { i2s_trigger(ctx->i2s_dev, I2S_DIR_TX, I2S_TRIGGER_DROP); ctx->i2s_started = false; ctx->i2s_blocks_written = 0; - feedback_reset_ctx(ctx->fb); + feedback_reset_ctx(ctx->fb, ctx->microframes); } } @@ -114,7 +118,11 @@ static void uac2_data_recv_cb(const struct device *dev, uint8_t terminal, * either disable terminal (or the cable will be disconnected) * which will stop I2S. */ - size = BLOCK_SIZE; + if (USBD_SUPPORTS_HIGH_SPEED && ctx->microframes) { + size = HS_SAMPLES_PER_SOF * BYTES_PER_SLOT; + } else { + size = FS_SAMPLES_PER_SOF * BYTES_PER_SLOT; + } memset(buf, 0, size); } @@ -124,7 +132,7 @@ static void uac2_data_recv_cb(const struct device *dev, uint8_t terminal, if (ret < 0) { ctx->i2s_started = false; ctx->i2s_blocks_written = 0; - feedback_reset_ctx(ctx->fb); + feedback_reset_ctx(ctx->fb, ctx->microframes); /* Most likely underrun occurred, prepare I2S restart */ i2s_trigger(ctx->i2s_dev, I2S_DIR_TX, I2S_TRIGGER_PREPARE); @@ -236,7 +244,7 @@ static void uac2_sof(const struct device *dev, void *user_data) ctx->i2s_blocks_written >= 2) { i2s_trigger(ctx->i2s_dev, I2S_DIR_TX, I2S_TRIGGER_START); ctx->i2s_started = true; - feedback_start(ctx->fb, ctx->i2s_blocks_written); + feedback_start(ctx->fb, ctx->i2s_blocks_written, ctx->microframes); } } diff --git a/samples/subsys/usb/uac2_implicit_feedback/app.overlay b/samples/subsys/usb/uac2_implicit_feedback/app.overlay index 799d9e40d433..583b1f8ef7b3 100644 --- a/samples/subsys/usb/uac2_implicit_feedback/app.overlay +++ b/samples/subsys/usb/uac2_implicit_feedback/app.overlay @@ -11,6 +11,7 @@ compatible = "zephyr,uac2"; status = "okay"; full-speed; + high-speed; audio-function = ; uac_aclk: aclk { diff --git a/samples/subsys/usb/uac2_implicit_feedback/boards/nrf5340dk_nrf5340_cpuapp.conf b/samples/subsys/usb/uac2_implicit_feedback/boards/nrf5340dk_nrf5340_cpuapp.conf index ce67033381a6..4c7c060177e0 100644 --- a/samples/subsys/usb/uac2_implicit_feedback/boards/nrf5340dk_nrf5340_cpuapp.conf +++ b/samples/subsys/usb/uac2_implicit_feedback/boards/nrf5340dk_nrf5340_cpuapp.conf @@ -1,2 +1,2 @@ #Enable timer for asynchronous feedback -CONFIG_NRFX_TIMER2=y +CONFIG_NRFX_TIMER=y diff --git a/samples/subsys/usb/uac2_implicit_feedback/boards/nrf54h20dk_nrf54h20_cpuapp.conf b/samples/subsys/usb/uac2_implicit_feedback/boards/nrf54h20dk_nrf54h20_cpuapp.conf index 1b1edb40666c..3f9d5d61d283 100644 --- a/samples/subsys/usb/uac2_implicit_feedback/boards/nrf54h20dk_nrf54h20_cpuapp.conf +++ b/samples/subsys/usb/uac2_implicit_feedback/boards/nrf54h20dk_nrf54h20_cpuapp.conf @@ -1,7 +1,3 @@ # Enable timer for asynchronous feedback CONFIG_NRFX_GPPI=y -CONFIG_NRFX_TIMER131=y - -# Sample is Full-Speed only, prevent High-Speed enumeration -CONFIG_UDC_DRIVER_HIGH_SPEED_SUPPORT_ENABLED=n -CONFIG_USBD_MAX_SPEED_FULL=y +CONFIG_NRFX_TIMER=y diff --git a/samples/subsys/usb/uac2_implicit_feedback/src/feedback.h b/samples/subsys/usb/uac2_implicit_feedback/src/feedback.h index 3fff2425d8b8..584bc0135c2c 100644 --- a/samples/subsys/usb/uac2_implicit_feedback/src/feedback.h +++ b/samples/subsys/usb/uac2_implicit_feedback/src/feedback.h @@ -9,15 +9,14 @@ #include -/* Nominal number of samples received on each SOF. This sample is currently - * supporting only 48 kHz sample rate. - */ -#define SAMPLES_PER_SOF 48 +/* This sample is currently supporting only 48 kHz sample rate. */ +#define SAMPLE_RATE 48000 struct feedback_ctx *feedback_init(void); void feedback_reset_ctx(struct feedback_ctx *ctx); void feedback_process(struct feedback_ctx *ctx); -void feedback_start(struct feedback_ctx *ctx, int i2s_blocks_queued); +void feedback_start(struct feedback_ctx *ctx, int i2s_blocks_queued, + bool microframes); /* Return offset between I2S block start and USB SOF in samples. * diff --git a/samples/subsys/usb/uac2_implicit_feedback/src/feedback_dummy.c b/samples/subsys/usb/uac2_implicit_feedback/src/feedback_dummy.c index 3b91deafe5c1..d28181033b94 100644 --- a/samples/subsys/usb/uac2_implicit_feedback/src/feedback_dummy.c +++ b/samples/subsys/usb/uac2_implicit_feedback/src/feedback_dummy.c @@ -24,10 +24,12 @@ void feedback_reset_ctx(struct feedback_ctx *ctx) ARG_UNUSED(ctx); } -void feedback_start(struct feedback_ctx *ctx, int i2s_blocks_queued) +void feedback_start(struct feedback_ctx *ctx, int i2s_blocks_queued, + bool microframes) { ARG_UNUSED(ctx); ARG_UNUSED(i2s_blocks_queued); + ARG_UNUSED(microframes); } int feedback_samples_offset(struct feedback_ctx *ctx) diff --git a/samples/subsys/usb/uac2_implicit_feedback/src/feedback_nrf.c b/samples/subsys/usb/uac2_implicit_feedback/src/feedback_nrf.c index a7dfad370b87..a1fe59fbbd71 100644 --- a/samples/subsys/usb/uac2_implicit_feedback/src/feedback_nrf.c +++ b/samples/subsys/usb/uac2_implicit_feedback/src/feedback_nrf.c @@ -7,8 +7,6 @@ #include #include #include "feedback.h" - -#include #include #include @@ -51,8 +49,8 @@ static inline void feedback_target_init(void) #error "Unsupported target" #endif -static const nrfx_timer_t feedback_timer_instance = - NRFX_TIMER_INSTANCE(FEEDBACK_TIMER_INSTANCE_NUMBER); +static nrfx_timer_t feedback_timer_instance = + NRFX_TIMER_INSTANCE(NRF_TIMER_INST_GET(FEEDBACK_TIMER_INSTANCE_NUMBER)); /* While it might be possible to determine I2S FRAMESTART to USB SOF offset * entirely in software, the I2S API lacks appropriate timestamping. Therefore @@ -68,18 +66,20 @@ static const nrfx_timer_t feedback_timer_instance = * SOF offset is around 0 when regulated and therefore the relative clock * frequency discrepancies are essentially negligible. */ -#define CLKS_PER_SAMPLE (16000000 / (SAMPLES_PER_SOF * 1000)) +#define CLKS_PER_SAMPLE (16000000 / (SAMPLE_RATE)) static struct feedback_ctx { int32_t rel_sof_offset; int32_t base_sof_offset; + unsigned int nominal; } fb_ctx; struct feedback_ctx *feedback_init(void) { + int rv; nrfx_err_t err; - uint8_t usbd_sof_gppi_channel; - uint8_t i2s_framestart_gppi_channel; + nrfx_gppi_handle_t usbd_sof_gppi_handle; + nrfx_gppi_handle_t i2s_framestart_gppi_handle; const nrfx_timer_config_t cfg = { .frequency = NRFX_MHZ_TO_HZ(16UL), .mode = NRF_TIMER_MODE_TIMER, @@ -87,6 +87,11 @@ struct feedback_ctx *feedback_init(void) .interrupt_priority = NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY, .p_context = NULL, }; + uint32_t tsk1 = nrfx_timer_capture_task_address_get(&feedback_timer_instance, + FEEDBACK_TIMER_USBD_SOF_CAPTURE); + uint32_t tsk2 = nrfx_timer_task_address_get(&feedback_timer_instance, NRF_TIMER_TASK_CLEAR); + uint32_t tsk3 = nrfx_timer_capture_task_address_get(&feedback_timer_instance, + FEEDBACK_TIMER_I2S_FRAMESTART_CAPTURE); feedback_target_init(); @@ -99,35 +104,23 @@ struct feedback_ctx *feedback_init(void) } /* Subscribe TIMER CAPTURE task to USBD SOF event */ - err = nrfx_gppi_channel_alloc(&usbd_sof_gppi_channel); - if (err != NRFX_SUCCESS) { - LOG_ERR("gppi_channel_alloc failed with: %d\n", err); + rv = nrfx_gppi_conn_alloc(USB_SOF_EVENT_ADDRESS, tsk1, &usbd_sof_gppi_handle); + if (rv < 0) { + LOG_ERR("gppi_channel_alloc failed with: %d\n", rv); return &fb_ctx; } - nrfx_gppi_channel_endpoints_setup(usbd_sof_gppi_channel, - USB_SOF_EVENT_ADDRESS, - nrfx_timer_capture_task_address_get(&feedback_timer_instance, - FEEDBACK_TIMER_USBD_SOF_CAPTURE)); - nrfx_gppi_fork_endpoint_setup(usbd_sof_gppi_channel, - nrfx_timer_task_address_get(&feedback_timer_instance, - NRF_TIMER_TASK_CLEAR)); - - nrfx_gppi_channels_enable(BIT(usbd_sof_gppi_channel)); + nrfx_gppi_ep_attach(usbd_sof_gppi_handle, tsk2); + nrfx_gppi_conn_enable(usbd_sof_gppi_handle); /* Subscribe TIMER CAPTURE task to I2S FRAMESTART event */ - err = nrfx_gppi_channel_alloc(&i2s_framestart_gppi_channel); - if (err != NRFX_SUCCESS) { - LOG_ERR("gppi_channel_alloc failed with: %d\n", err); + rv = nrfx_gppi_conn_alloc(I2S_FRAMESTART_EVENT_ADDRESS, tsk3, &i2s_framestart_gppi_handle); + if (rv < 0) { + LOG_ERR("gppi_conn_alloc failed with: %d\n", rv); return &fb_ctx; } - nrfx_gppi_channel_endpoints_setup(i2s_framestart_gppi_channel, - I2S_FRAMESTART_EVENT_ADDRESS, - nrfx_timer_capture_task_address_get(&feedback_timer_instance, - FEEDBACK_TIMER_I2S_FRAMESTART_CAPTURE)); - - nrfx_gppi_channels_enable(BIT(i2s_framestart_gppi_channel)); + nrfx_gppi_conn_enable(i2s_framestart_gppi_handle); /* Enable feedback timer */ nrfx_timer_enable(&feedback_timer_instance); @@ -143,8 +136,8 @@ static void update_sof_offset(struct feedback_ctx *ctx, uint32_t sof_cc, /* /2 because we treat the middle as a turning point from being * "too late" to "too early". */ - if (framestart_cc > (SAMPLES_PER_SOF * CLKS_PER_SAMPLE)/2) { - sof_offset = framestart_cc - SAMPLES_PER_SOF * CLKS_PER_SAMPLE; + if (framestart_cc > (ctx->nominal * CLKS_PER_SAMPLE)/2) { + sof_offset = framestart_cc - ctx->nominal * CLKS_PER_SAMPLE; } else { sof_offset = framestart_cc; } @@ -159,17 +152,17 @@ static void update_sof_offset(struct feedback_ctx *ctx, uint32_t sof_cc, if (sof_offset >= 0) { abs_diff = sof_offset - ctx->rel_sof_offset; - base_change = -(SAMPLES_PER_SOF * CLKS_PER_SAMPLE); + base_change = -(ctx->nominal * CLKS_PER_SAMPLE); } else { abs_diff = ctx->rel_sof_offset - sof_offset; - base_change = SAMPLES_PER_SOF * CLKS_PER_SAMPLE; + base_change = ctx->nominal * CLKS_PER_SAMPLE; } /* Adjust base offset only if the change happened through the * outer bound. The actual changes should be significantly lower * than the threshold here. */ - if (abs_diff > (SAMPLES_PER_SOF * CLKS_PER_SAMPLE)/2) { + if (abs_diff > (ctx->nominal * CLKS_PER_SAMPLE)/2) { ctx->base_sof_offset += base_change; } } @@ -195,19 +188,26 @@ void feedback_reset_ctx(struct feedback_ctx *ctx) ARG_UNUSED(ctx); } -void feedback_start(struct feedback_ctx *ctx, int i2s_blocks_queued) +void feedback_start(struct feedback_ctx *ctx, int i2s_blocks_queued, + bool microframes) { + if (microframes) { + ctx->nominal = SAMPLE_RATE / 8000; + } else { + ctx->nominal = SAMPLE_RATE / 1000; + } + /* I2S data was supposed to go out at SOF, but it is inevitably * delayed due to triggering I2S start by software. Set relative * SOF offset value in a way that ensures that values past "half * frame" are treated as "too late" instead of "too early" */ - ctx->rel_sof_offset = (SAMPLES_PER_SOF * CLKS_PER_SAMPLE) / 2; + ctx->rel_sof_offset = (ctx->nominal * CLKS_PER_SAMPLE) / 2; /* If there are more than 2 I2S TX blocks queued, use feedback regulator * to correct the situation. */ ctx->base_sof_offset = (i2s_blocks_queued - 2) * - (SAMPLES_PER_SOF * CLKS_PER_SAMPLE); + (ctx->nominal * CLKS_PER_SAMPLE); } int feedback_samples_offset(struct feedback_ctx *ctx) diff --git a/samples/subsys/usb/uac2_implicit_feedback/src/main.c b/samples/subsys/usb/uac2_implicit_feedback/src/main.c index 12abdf4fe681..06334866e7a2 100644 --- a/samples/subsys/usb/uac2_implicit_feedback/src/main.c +++ b/samples/subsys/usb/uac2_implicit_feedback/src/main.c @@ -21,15 +21,17 @@ LOG_MODULE_REGISTER(uac2_sample, LOG_LEVEL_INF); #define HEADPHONES_OUT_TERMINAL_ID UAC2_ENTITY_ID(DT_NODELABEL(out_terminal)) #define MICROPHONE_IN_TERMINAL_ID UAC2_ENTITY_ID(DT_NODELABEL(in_terminal)) -#define SAMPLES_PER_SOF 48 -#define SAMPLE_FREQUENCY (SAMPLES_PER_SOF * 1000) +#define FS_SAMPLES_PER_SOF 48 +#define HS_SAMPLES_PER_SOF 6 +#define MAX_SAMPLES_PER_SOF MAX(FS_SAMPLES_PER_SOF, HS_SAMPLES_PER_SOF) +#define SAMPLE_FREQUENCY (FS_SAMPLES_PER_SOF * 1000) #define SAMPLE_BIT_WIDTH 16 #define NUMBER_OF_CHANNELS 2 #define BYTES_PER_SAMPLE DIV_ROUND_UP(SAMPLE_BIT_WIDTH, 8) #define BYTES_PER_SLOT (BYTES_PER_SAMPLE * NUMBER_OF_CHANNELS) -#define MIN_BLOCK_SIZE ((SAMPLES_PER_SOF - 1) * BYTES_PER_SLOT) -#define BLOCK_SIZE (SAMPLES_PER_SOF * BYTES_PER_SLOT) -#define MAX_BLOCK_SIZE ((SAMPLES_PER_SOF + 1) * BYTES_PER_SLOT) +#define MIN_BLOCK_SIZE ((MAX_SAMPLES_PER_SOF - 1) * BYTES_PER_SLOT) +#define BLOCK_SIZE (MAX_SAMPLES_PER_SOF * BYTES_PER_SLOT) +#define MAX_BLOCK_SIZE ((MAX_SAMPLES_PER_SOF + 1) * BYTES_PER_SLOT) /* Absolute minimum is 5 TX buffers (1 actively consumed by I2S, 2nd queued as * next buffer, 3rd acquired by USB stack to receive data to, and 2 to handle @@ -49,6 +51,7 @@ struct usb_i2s_ctx { bool i2s_started; bool rx_started; bool usb_data_received; + bool microframes; /* Counter used to determine when to start I2S and then when to start * sending RX packets to host. Overflows are not a problem because this * variable is not necessary after both I2S and RX is started. @@ -70,8 +73,8 @@ struct usb_i2s_ctx { * Used to avoid overcompensation in feedback regulator. LSBs indicate * latest write size. */ - uint8_t plus_ones; - uint8_t minus_ones; + uint32_t plus_ones; + uint32_t minus_ones; }; static void uac2_terminal_update_cb(const struct device *dev, uint8_t terminal, @@ -80,8 +83,7 @@ static void uac2_terminal_update_cb(const struct device *dev, uint8_t terminal, { struct usb_i2s_ctx *ctx = user_data; - /* This sample is for Full-Speed only devices. */ - __ASSERT_NO_MSG(microframes == false); + ctx->microframes = microframes; if (terminal == HEADPHONES_OUT_TERMINAL_ID) { ctx->headphones_enabled = enabled; @@ -104,6 +106,15 @@ static void uac2_terminal_update_cb(const struct device *dev, uint8_t terminal, } } +static int nominal_samples_per_sof(struct usb_i2s_ctx *ctx) +{ + if (USBD_SUPPORTS_HIGH_SPEED && ctx->microframes) { + return HS_SAMPLES_PER_SOF; + } + + return FS_SAMPLES_PER_SOF; +} + static void *uac2_get_recv_buf(const struct device *dev, uint8_t terminal, uint16_t size, void *user_data) { @@ -133,6 +144,7 @@ static void uac2_data_recv_cb(const struct device *dev, uint8_t terminal, void *buf, uint16_t size, void *user_data) { struct usb_i2s_ctx *ctx = user_data; + int nominal = nominal_samples_per_sof(ctx); int ret; ctx->usb_data_received = true; @@ -159,11 +171,11 @@ static void uac2_data_recv_cb(const struct device *dev, uint8_t terminal, * of samples sent. */ if (ctx->plus_ones & 1) { - size = (SAMPLES_PER_SOF + 1) * BYTES_PER_SLOT; + size = (nominal + 1) * BYTES_PER_SLOT; } else if (ctx->minus_ones & 1) { - size = (SAMPLES_PER_SOF - 1) * BYTES_PER_SLOT; + size = (nominal - 1) * BYTES_PER_SLOT; } else { - size = SAMPLES_PER_SOF * BYTES_PER_SLOT; + size = nominal * BYTES_PER_SLOT; } memset(buf, 0, size); } @@ -208,6 +220,7 @@ static void uac2_buf_release_cb(const struct device *dev, uint8_t terminal, /* Determine next number of samples to send, called at most once every SOF */ static int next_mic_num_samples(struct usb_i2s_ctx *ctx) { + int nominal = nominal_samples_per_sof(ctx); int offset = feedback_samples_offset(ctx->fb); /* The rolling buffers essentially handle controller dead time, i.e. @@ -217,12 +230,18 @@ static int next_mic_num_samples(struct usb_i2s_ctx *ctx) ctx->plus_ones <<= 1; ctx->minus_ones <<= 1; + /* At Full-Speed only remember last 8 frames */ + if (!USBD_SUPPORTS_HIGH_SPEED || !ctx->microframes) { + ctx->plus_ones &= 0x000000FF; + ctx->minus_ones &= 0x000000FF; + } + if ((offset < 0) && (POPCOUNT(ctx->plus_ones) < -offset)) { /* I2S buffer starts at least 1 sample before SOF, send nominal * + 1 samples to host in order to shift offset towards 0. */ ctx->plus_ones |= 1; - return SAMPLES_PER_SOF + 1; + return nominal + 1; } if ((offset > 0) && (POPCOUNT(ctx->minus_ones) < offset)) { @@ -230,11 +249,11 @@ static int next_mic_num_samples(struct usb_i2s_ctx *ctx) * - 1 samples to host in order to shift offset towards 0 */ ctx->minus_ones |= 1; - return SAMPLES_PER_SOF - 1; + return nominal - 1; } /* I2S is either spot on, or the offset is expected to correct soon */ - return SAMPLES_PER_SOF; + return nominal; } static void process_mic_data(const struct device *dev, struct usb_i2s_ctx *ctx) @@ -488,7 +507,7 @@ static void uac2_sof(const struct device *dev, void *user_data) ctx->i2s_counter >= 2) { i2s_trigger(ctx->i2s_dev, I2S_DIR_BOTH, I2S_TRIGGER_START); ctx->i2s_started = true; - feedback_start(ctx->fb, ctx->i2s_counter); + feedback_start(ctx->fb, ctx->i2s_counter, ctx->microframes); ctx->i2s_counter = 0; } diff --git a/soc/nordic/CMakeLists.txt b/soc/nordic/CMakeLists.txt index 0c9e9184d6dc..f32466d38ee5 100644 --- a/soc/nordic/CMakeLists.txt +++ b/soc/nordic/CMakeLists.txt @@ -45,6 +45,9 @@ if(CONFIG_BUILD_WITH_TFM) ) endif() -add_subdirectory(${SOC_SERIES}) +if(CONFIG_SOC_NORDIC_BSP_NAME STREQUAL "stable") + add_subdirectory(${SOC_SERIES}) +endif() + add_subdirectory(common) add_subdirectory_ifdef(CONFIG_NRF_IRONSIDE ironside) diff --git a/soc/nordic/Kconfig b/soc/nordic/Kconfig index d86e98e3dbc7..7b13ea9a1482 100644 --- a/soc/nordic/Kconfig +++ b/soc/nordic/Kconfig @@ -50,6 +50,10 @@ config SOC_FAMILY_NORDIC_NRF if SOC_FAMILY_NORDIC_NRF +config SOC_NORDIC_BSP_NAME + string + default "stable" + rsource "common/Kconfig.peripherals" rsource "*/Kconfig" diff --git a/soc/nordic/common/CMakeLists.txt b/soc/nordic/common/CMakeLists.txt index 04f0c1a3219c..69361ff5d253 100644 --- a/soc/nordic/common/CMakeLists.txt +++ b/soc/nordic/common/CMakeLists.txt @@ -40,3 +40,4 @@ endif() zephyr_library_sources_ifdef(CONFIG_NRF_SYS_EVENT nrf_sys_event.c) zephyr_library_sources_ifdef(CONFIG_MRAM_LATENCY mram_latency.c) +zephyr_library_sources(gpiote_nrfx.c) diff --git a/soc/nordic/common/Kconfig.peripherals b/soc/nordic/common/Kconfig.peripherals index fa7fd2a411aa..f15702fa291b 100644 --- a/soc/nordic/common/Kconfig.peripherals +++ b/soc/nordic/common/Kconfig.peripherals @@ -98,12 +98,6 @@ config HAS_HW_NRF_GPIOTE131 config HAS_HW_NRF_GRTC def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_GRTC)) -config HAS_HW_NRF_I2S0 - def_bool $(dt_nodelabel_enabled_with_compat,i2s0,$(DT_COMPAT_NORDIC_NRF_I2S)) - -config HAS_HW_NRF_I2S20 - def_bool $(dt_nodelabel_enabled_with_compat,i2s20,$(DT_COMPAT_NORDIC_NRF_I2S)) - config HAS_HW_NRF_KMU def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_KMU)) @@ -129,75 +123,12 @@ config HAS_HW_NRF_NVMC_PE config HAS_HW_NRF_OSCILLATORS def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_OSCILLATORS)) -config HAS_HW_NRF_PDM0 - def_bool $(dt_nodelabel_enabled_with_compat,pdm0,$(DT_COMPAT_NORDIC_NRF_PDM)) - -config HAS_HW_NRF_PDM20 - def_bool $(dt_nodelabel_enabled_with_compat,pdm20,$(DT_COMPAT_NORDIC_NRF_PDM)) - -config HAS_HW_NRF_PDM21 - def_bool $(dt_nodelabel_enabled_with_compat,pdm21,$(DT_COMPAT_NORDIC_NRF_PDM)) - config HAS_HW_NRF_POWER def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_POWER)) config HAS_HW_NRF_PPI def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_PPI)) -config HAS_HW_NRF_PWM0 - def_bool $(dt_nodelabel_enabled_with_compat,pwm0,$(DT_COMPAT_NORDIC_NRF_PWM)) - -config HAS_HW_NRF_PWM1 - def_bool $(dt_nodelabel_enabled_with_compat,pwm1,$(DT_COMPAT_NORDIC_NRF_PWM)) - -config HAS_HW_NRF_PWM2 - def_bool $(dt_nodelabel_enabled_with_compat,pwm2,$(DT_COMPAT_NORDIC_NRF_PWM)) - -config HAS_HW_NRF_PWM3 - def_bool $(dt_nodelabel_enabled_with_compat,pwm3,$(DT_COMPAT_NORDIC_NRF_PWM)) - -config HAS_HW_NRF_PWM20 - def_bool $(dt_nodelabel_enabled_with_compat,pwm20,$(DT_COMPAT_NORDIC_NRF_PWM)) - -config HAS_HW_NRF_PWM21 - def_bool $(dt_nodelabel_enabled_with_compat,pwm21,$(DT_COMPAT_NORDIC_NRF_PWM)) - -config HAS_HW_NRF_PWM22 - def_bool $(dt_nodelabel_enabled_with_compat,pwm22,$(DT_COMPAT_NORDIC_NRF_PWM)) - -config HAS_HW_NRF_PWM120 - def_bool $(dt_nodelabel_enabled_with_compat,pwm120,$(DT_COMPAT_NORDIC_NRF_PWM)) - -config HAS_HW_NRF_PWM130 - def_bool $(dt_nodelabel_enabled_with_compat,pwm130,$(DT_COMPAT_NORDIC_NRF_PWM)) - -config HAS_HW_NRF_PWM131 - def_bool $(dt_nodelabel_enabled_with_compat,pwm131,$(DT_COMPAT_NORDIC_NRF_PWM)) - -config HAS_HW_NRF_PWM132 - def_bool $(dt_nodelabel_enabled_with_compat,pwm132,$(DT_COMPAT_NORDIC_NRF_PWM)) - -config HAS_HW_NRF_PWM133 - def_bool $(dt_nodelabel_enabled_with_compat,pwm133,$(DT_COMPAT_NORDIC_NRF_PWM)) - -config HAS_HW_NRF_QDEC0 - def_bool $(dt_nodelabel_enabled_with_compat,qdec0,$(DT_COMPAT_NORDIC_NRF_QDEC)) - -config HAS_HW_NRF_QDEC1 - def_bool $(dt_nodelabel_enabled_with_compat,qdec1,$(DT_COMPAT_NORDIC_NRF_QDEC)) - -config HAS_HW_NRF_QDEC20 - def_bool $(dt_nodelabel_enabled_with_compat,qdec20,$(DT_COMPAT_NORDIC_NRF_QDEC)) - -config HAS_HW_NRF_QDEC21 - def_bool $(dt_nodelabel_enabled_with_compat,qdec21,$(DT_COMPAT_NORDIC_NRF_QDEC)) - -config HAS_HW_NRF_QDEC130 - def_bool $(dt_nodelabel_enabled_with_compat,qdec130,$(DT_COMPAT_NORDIC_NRF_QDEC)) - -config HAS_HW_NRF_QDEC131 - def_bool $(dt_nodelabel_enabled_with_compat,qdec131,$(DT_COMPAT_NORDIC_NRF_QDEC)) - config HAS_HW_NRF_QSPI def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_QSPI)) @@ -255,138 +186,6 @@ config HAS_HW_NRF_SPI1 config HAS_HW_NRF_SPI2 def_bool $(dt_nodelabel_enabled_with_compat,spi2,$(DT_COMPAT_NORDIC_NRF_SPI)) -config HAS_HW_NRF_SPIM0 - def_bool $(dt_nodelabel_enabled_with_compat,spi0,$(DT_COMPAT_NORDIC_NRF_SPIM)) - -config HAS_HW_NRF_SPIM1 - def_bool $(dt_nodelabel_enabled_with_compat,spi1,$(DT_COMPAT_NORDIC_NRF_SPIM)) - -config HAS_HW_NRF_SPIM2 - def_bool $(dt_nodelabel_enabled_with_compat,spi2,$(DT_COMPAT_NORDIC_NRF_SPIM)) - -config HAS_HW_NRF_SPIM3 - def_bool $(dt_nodelabel_enabled_with_compat,spi3,$(DT_COMPAT_NORDIC_NRF_SPIM)) - -config HAS_HW_NRF_SPIM4 - def_bool $(dt_nodelabel_enabled_with_compat,spi4,$(DT_COMPAT_NORDIC_NRF_SPIM)) - -config HAS_HW_NRF_SPIM00 - def_bool $(dt_nodelabel_enabled_with_compat,spi00,$(DT_COMPAT_NORDIC_NRF_SPIM)) - -config HAS_HW_NRF_SPIM01 - def_bool $(dt_nodelabel_enabled_with_compat,spi01,$(DT_COMPAT_NORDIC_NRF_SPIM)) - -config HAS_HW_NRF_SPIM20 - def_bool $(dt_nodelabel_enabled_with_compat,spi20,$(DT_COMPAT_NORDIC_NRF_SPIM)) - -config HAS_HW_NRF_SPIM21 - def_bool $(dt_nodelabel_enabled_with_compat,spi21,$(DT_COMPAT_NORDIC_NRF_SPIM)) - -config HAS_HW_NRF_SPIM22 - def_bool $(dt_nodelabel_enabled_with_compat,spi22,$(DT_COMPAT_NORDIC_NRF_SPIM)) - -config HAS_HW_NRF_SPIM23 - def_bool $(dt_nodelabel_enabled_with_compat,spi23,$(DT_COMPAT_NORDIC_NRF_SPIM)) - -config HAS_HW_NRF_SPIM24 - def_bool $(dt_nodelabel_enabled_with_compat,spi24,$(DT_COMPAT_NORDIC_NRF_SPIM)) - -config HAS_HW_NRF_SPIM30 - def_bool $(dt_nodelabel_enabled_with_compat,spi30,$(DT_COMPAT_NORDIC_NRF_SPIM)) - -config HAS_HW_NRF_SPIM120 - def_bool $(dt_nodelabel_enabled_with_compat,spi120,$(DT_COMPAT_NORDIC_NRF_SPIM)) - -config HAS_HW_NRF_SPIM121 - def_bool $(dt_nodelabel_enabled_with_compat,spi121,$(DT_COMPAT_NORDIC_NRF_SPIM)) - -config HAS_HW_NRF_SPIM130 - def_bool $(dt_nodelabel_enabled_with_compat,spi130,$(DT_COMPAT_NORDIC_NRF_SPIM)) - -config HAS_HW_NRF_SPIM131 - def_bool $(dt_nodelabel_enabled_with_compat,spi131,$(DT_COMPAT_NORDIC_NRF_SPIM)) - -config HAS_HW_NRF_SPIM132 - def_bool $(dt_nodelabel_enabled_with_compat,spi132,$(DT_COMPAT_NORDIC_NRF_SPIM)) - -config HAS_HW_NRF_SPIM133 - def_bool $(dt_nodelabel_enabled_with_compat,spi133,$(DT_COMPAT_NORDIC_NRF_SPIM)) - -config HAS_HW_NRF_SPIM134 - def_bool $(dt_nodelabel_enabled_with_compat,spi134,$(DT_COMPAT_NORDIC_NRF_SPIM)) - -config HAS_HW_NRF_SPIM135 - def_bool $(dt_nodelabel_enabled_with_compat,spi135,$(DT_COMPAT_NORDIC_NRF_SPIM)) - -config HAS_HW_NRF_SPIM136 - def_bool $(dt_nodelabel_enabled_with_compat,spi136,$(DT_COMPAT_NORDIC_NRF_SPIM)) - -config HAS_HW_NRF_SPIM137 - def_bool $(dt_nodelabel_enabled_with_compat,spi137,$(DT_COMPAT_NORDIC_NRF_SPIM)) - -config HAS_HW_NRF_SPIS0 - def_bool $(dt_nodelabel_enabled_with_compat,spi0,$(DT_COMPAT_NORDIC_NRF_SPIS)) - -config HAS_HW_NRF_SPIS1 - def_bool $(dt_nodelabel_enabled_with_compat,spi1,$(DT_COMPAT_NORDIC_NRF_SPIS)) - -config HAS_HW_NRF_SPIS2 - def_bool $(dt_nodelabel_enabled_with_compat,spi2,$(DT_COMPAT_NORDIC_NRF_SPIS)) - -config HAS_HW_NRF_SPIS3 - def_bool $(dt_nodelabel_enabled_with_compat,spi3,$(DT_COMPAT_NORDIC_NRF_SPIS)) - -config HAS_HW_NRF_SPIS00 - def_bool $(dt_nodelabel_enabled_with_compat,spi00,$(DT_COMPAT_NORDIC_NRF_SPIS)) - -config HAS_HW_NRF_SPIS01 - def_bool $(dt_nodelabel_enabled_with_compat,spi01,$(DT_COMPAT_NORDIC_NRF_SPIS)) - -config HAS_HW_NRF_SPIS20 - def_bool $(dt_nodelabel_enabled_with_compat,spi20,$(DT_COMPAT_NORDIC_NRF_SPIS)) - -config HAS_HW_NRF_SPIS21 - def_bool $(dt_nodelabel_enabled_with_compat,spi21,$(DT_COMPAT_NORDIC_NRF_SPIS)) - -config HAS_HW_NRF_SPIS22 - def_bool $(dt_nodelabel_enabled_with_compat,spi22,$(DT_COMPAT_NORDIC_NRF_SPIS)) - -config HAS_HW_NRF_SPIS23 - def_bool $(dt_nodelabel_enabled_with_compat,spi23,$(DT_COMPAT_NORDIC_NRF_SPIS)) - -config HAS_HW_NRF_SPIS24 - def_bool $(dt_nodelabel_enabled_with_compat,spi24,$(DT_COMPAT_NORDIC_NRF_SPIS)) - -config HAS_HW_NRF_SPIS30 - def_bool $(dt_nodelabel_enabled_with_compat,spi30,$(DT_COMPAT_NORDIC_NRF_SPIS)) - -config HAS_HW_NRF_SPIS120 - def_bool $(dt_nodelabel_enabled_with_compat,spis120,$(DT_COMPAT_NORDIC_NRF_SPIS)) - -config HAS_HW_NRF_SPIS130 - def_bool $(dt_nodelabel_enabled_with_compat,spi130,$(DT_COMPAT_NORDIC_NRF_SPIS)) - -config HAS_HW_NRF_SPIS131 - def_bool $(dt_nodelabel_enabled_with_compat,spi131,$(DT_COMPAT_NORDIC_NRF_SPIS)) - -config HAS_HW_NRF_SPIS132 - def_bool $(dt_nodelabel_enabled_with_compat,spi132,$(DT_COMPAT_NORDIC_NRF_SPIS)) - -config HAS_HW_NRF_SPIS133 - def_bool $(dt_nodelabel_enabled_with_compat,spi133,$(DT_COMPAT_NORDIC_NRF_SPIS)) - -config HAS_HW_NRF_SPIS134 - def_bool $(dt_nodelabel_enabled_with_compat,spi134,$(DT_COMPAT_NORDIC_NRF_SPIS)) - -config HAS_HW_NRF_SPIS135 - def_bool $(dt_nodelabel_enabled_with_compat,spi135,$(DT_COMPAT_NORDIC_NRF_SPIS)) - -config HAS_HW_NRF_SPIS136 - def_bool $(dt_nodelabel_enabled_with_compat,spi136,$(DT_COMPAT_NORDIC_NRF_SPIS)) - -config HAS_HW_NRF_SPIS137 - def_bool $(dt_nodelabel_enabled_with_compat,spi137,$(DT_COMPAT_NORDIC_NRF_SPIS)) - config HAS_HW_NRF_SPU def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_SPU)) @@ -501,117 +300,6 @@ config HAS_HW_NRF_TWI0 config HAS_HW_NRF_TWI1 def_bool $(dt_nodelabel_enabled_with_compat,i2c1,$(DT_COMPAT_NORDIC_NRF_TWI)) -config HAS_HW_NRF_TWIM0 - def_bool $(dt_nodelabel_enabled_with_compat,i2c0,$(DT_COMPAT_NORDIC_NRF_TWIM)) - -config HAS_HW_NRF_TWIM1 - def_bool $(dt_nodelabel_enabled_with_compat,i2c1,$(DT_COMPAT_NORDIC_NRF_TWIM)) - -config HAS_HW_NRF_TWIM2 - def_bool $(dt_nodelabel_enabled_with_compat,i2c2,$(DT_COMPAT_NORDIC_NRF_TWIM)) - -config HAS_HW_NRF_TWIM3 - def_bool $(dt_nodelabel_enabled_with_compat,i2c3,$(DT_COMPAT_NORDIC_NRF_TWIM)) - -config HAS_HW_NRF_TWIM20 - def_bool $(dt_nodelabel_enabled_with_compat,i2c20,$(DT_COMPAT_NORDIC_NRF_TWIM)) - -config HAS_HW_NRF_TWIM21 - def_bool $(dt_nodelabel_enabled_with_compat,i2c21,$(DT_COMPAT_NORDIC_NRF_TWIM)) - -config HAS_HW_NRF_TWIM22 - def_bool $(dt_nodelabel_enabled_with_compat,i2c22,$(DT_COMPAT_NORDIC_NRF_TWIM)) - -config HAS_HW_NRF_TWIM23 - def_bool $(dt_nodelabel_enabled_with_compat,i2c23,$(DT_COMPAT_NORDIC_NRF_TWIM)) - -config HAS_HW_NRF_TWIM24 - def_bool $(dt_nodelabel_enabled_with_compat,i2c24,$(DT_COMPAT_NORDIC_NRF_TWIM)) - -config HAS_HW_NRF_TWIM30 - def_bool $(dt_nodelabel_enabled_with_compat,i2c30,$(DT_COMPAT_NORDIC_NRF_TWIM)) - -config HAS_HW_NRF_TWIM120 - def_bool $(dt_nodelabel_enabled_with_compat,i2c120,$(DT_COMPAT_NORDIC_NRF_TWIM)) - -config HAS_HW_NRF_TWIM130 - def_bool $(dt_nodelabel_enabled_with_compat,i2c130,$(DT_COMPAT_NORDIC_NRF_TWIM)) - -config HAS_HW_NRF_TWIM131 - def_bool $(dt_nodelabel_enabled_with_compat,i2c131,$(DT_COMPAT_NORDIC_NRF_TWIM)) - -config HAS_HW_NRF_TWIM132 - def_bool $(dt_nodelabel_enabled_with_compat,i2c132,$(DT_COMPAT_NORDIC_NRF_TWIM)) - -config HAS_HW_NRF_TWIM133 - def_bool $(dt_nodelabel_enabled_with_compat,i2c133,$(DT_COMPAT_NORDIC_NRF_TWIM)) - -config HAS_HW_NRF_TWIM134 - def_bool $(dt_nodelabel_enabled_with_compat,i2c134,$(DT_COMPAT_NORDIC_NRF_TWIM)) - -config HAS_HW_NRF_TWIM135 - def_bool $(dt_nodelabel_enabled_with_compat,i2c135,$(DT_COMPAT_NORDIC_NRF_TWIM)) - -config HAS_HW_NRF_TWIM136 - def_bool $(dt_nodelabel_enabled_with_compat,i2c136,$(DT_COMPAT_NORDIC_NRF_TWIM)) - -config HAS_HW_NRF_TWIM137 - def_bool $(dt_nodelabel_enabled_with_compat,i2c137,$(DT_COMPAT_NORDIC_NRF_TWIM)) - -config HAS_HW_NRF_TWIS0 - def_bool $(dt_nodelabel_enabled_with_compat,i2c0,$(DT_COMPAT_NORDIC_NRF_TWIS)) - -config HAS_HW_NRF_TWIS1 - def_bool $(dt_nodelabel_enabled_with_compat,i2c1,$(DT_COMPAT_NORDIC_NRF_TWIS)) - -config HAS_HW_NRF_TWIS2 - def_bool $(dt_nodelabel_enabled_with_compat,i2c2,$(DT_COMPAT_NORDIC_NRF_TWIS)) - -config HAS_HW_NRF_TWIS3 - def_bool $(dt_nodelabel_enabled_with_compat,i2c3,$(DT_COMPAT_NORDIC_NRF_TWIS)) - -config HAS_HW_NRF_TWIS20 - def_bool $(dt_nodelabel_enabled_with_compat,i2c20,$(DT_COMPAT_NORDIC_NRF_TWIS)) - -config HAS_HW_NRF_TWIS21 - def_bool $(dt_nodelabel_enabled_with_compat,i2c21,$(DT_COMPAT_NORDIC_NRF_TWIS)) - -config HAS_HW_NRF_TWIS22 - def_bool $(dt_nodelabel_enabled_with_compat,i2c22,$(DT_COMPAT_NORDIC_NRF_TWIS)) - -config HAS_HW_NRF_TWIS23 - def_bool $(dt_nodelabel_enabled_with_compat,i2c23,$(DT_COMPAT_NORDIC_NRF_TWIS)) - -config HAS_HW_NRF_TWIS24 - def_bool $(dt_nodelabel_enabled_with_compat,i2c24,$(DT_COMPAT_NORDIC_NRF_TWIS)) - -config HAS_HW_NRF_TWIS30 - def_bool $(dt_nodelabel_enabled_with_compat,i2c30,$(DT_COMPAT_NORDIC_NRF_TWIS)) - -config HAS_HW_NRF_TWIS130 - def_bool $(dt_nodelabel_enabled_with_compat,i2c130,$(DT_COMPAT_NORDIC_NRF_TWIS)) - -config HAS_HW_NRF_TWIS131 - def_bool $(dt_nodelabel_enabled_with_compat,i2c131,$(DT_COMPAT_NORDIC_NRF_TWIS)) - -config HAS_HW_NRF_TWIS132 - def_bool $(dt_nodelabel_enabled_with_compat,i2c132,$(DT_COMPAT_NORDIC_NRF_TWIS)) - -config HAS_HW_NRF_TWIS133 - def_bool $(dt_nodelabel_enabled_with_compat,i2c133,$(DT_COMPAT_NORDIC_NRF_TWIS)) - -config HAS_HW_NRF_TWIS134 - def_bool $(dt_nodelabel_enabled_with_compat,i2c134,$(DT_COMPAT_NORDIC_NRF_TWIS)) - -config HAS_HW_NRF_TWIS135 - def_bool $(dt_nodelabel_enabled_with_compat,i2c135,$(DT_COMPAT_NORDIC_NRF_TWIS)) - -config HAS_HW_NRF_TWIS136 - def_bool $(dt_nodelabel_enabled_with_compat,i2c136,$(DT_COMPAT_NORDIC_NRF_TWIS)) - -config HAS_HW_NRF_TWIS137 - def_bool $(dt_nodelabel_enabled_with_compat,i2c137,$(DT_COMPAT_NORDIC_NRF_TWIS)) - config HAS_HW_NRF_UART0 def_bool $(dt_nodelabel_enabled_with_compat,uart0,$(DT_COMPAT_NORDIC_NRF_UART)) @@ -683,30 +371,3 @@ config HAS_HW_NRF_USBREG config HAS_HW_NRF_VMC def_bool $(dt_compat_enabled,$(DT_COMPAT_NORDIC_NRF_VMC)) - -config HAS_HW_NRF_WDT0 - def_bool $(dt_nodelabel_enabled_with_compat,wdt0,$(DT_COMPAT_NORDIC_NRF_WDT)) - -config HAS_HW_NRF_WDT1 - def_bool $(dt_nodelabel_enabled_with_compat,wdt1,$(DT_COMPAT_NORDIC_NRF_WDT)) - -config HAS_HW_NRF_WDT30 - def_bool $(dt_nodelabel_enabled_with_compat,wdt30,$(DT_COMPAT_NORDIC_NRF_WDT)) - -config HAS_HW_NRF_WDT31 - def_bool $(dt_nodelabel_enabled_with_compat,wdt31,$(DT_COMPAT_NORDIC_NRF_WDT)) - -config HAS_HW_NRF_WDT010 - def_bool $(dt_nodelabel_enabled_with_compat,wdt010,$(DT_COMPAT_NORDIC_NRF_WDT)) - -config HAS_HW_NRF_WDT011 - def_bool $(dt_nodelabel_enabled_with_compat,wdt011,$(DT_COMPAT_NORDIC_NRF_WDT)) - -config HAS_HW_NRF_WDT130 - def_bool $(dt_nodelabel_enabled_with_compat,wdt130,$(DT_COMPAT_NORDIC_NRF_WDT)) - -config HAS_HW_NRF_WDT131 - def_bool $(dt_nodelabel_enabled_with_compat,wdt131,$(DT_COMPAT_NORDIC_NRF_WDT)) - -config HAS_HW_NRF_WDT132 - def_bool $(dt_nodelabel_enabled_with_compat,wdt132,$(DT_COMPAT_NORDIC_NRF_WDT)) diff --git a/soc/nordic/common/gpiote_nrfx.c b/soc/nordic/common/gpiote_nrfx.c new file mode 100644 index 000000000000..93c111c00a47 --- /dev/null +++ b/soc/nordic/common/gpiote_nrfx.c @@ -0,0 +1,15 @@ +/* + * Copyright (c) 2025 Nordic Semiconductor ASA + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include "gpiote_nrfx.h" + +#define GPIOTE_NRFX_INST_DEF(instname, reg) \ + nrfx_gpiote_t instname = NRFX_GPIOTE_INSTANCE(reg); +#define GPIOTE_NRFX_INST_DEFINE(node_id) \ + GPIOTE_NRFX_INST_DEF(GPIOTE_NRFX_INST_BY_NODE(node_id), DT_REG_ADDR(node_id)) + +DT_FOREACH_STATUS_OKAY(nordic_nrf_gpiote, GPIOTE_NRFX_INST_DEFINE) diff --git a/soc/nordic/common/gpiote_nrfx.h b/soc/nordic/common/gpiote_nrfx.h new file mode 100644 index 000000000000..7785eea5ea82 --- /dev/null +++ b/soc/nordic/common/gpiote_nrfx.h @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2025 Nordic Semiconductor ASA + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef SOC_NORDIC_COMMON_GPIOTE_NRFX_H_ +#define SOC_NORDIC_COMMON_GPIOTE_NRFX_H_ + +#include + +#define GPIOTE_NRFX_INST_BY_REG_CONCAT(reg) g_nrfx_gpiote##reg +#define GPIOTE_NRFX_INST_BY_REG(reg) GPIOTE_NRFX_INST_BY_REG_CONCAT(reg) +#define GPIOTE_NRFX_INST_BY_NODE(node) GPIOTE_NRFX_INST_BY_REG(DT_REG_ADDR(node)) + +#define GPIOTE_NRFX_INST_DECL(instname) \ + extern nrfx_gpiote_t instname; +#define GPIOTE_NRFX_INST_DECLARE(node_id) \ + GPIOTE_NRFX_INST_DECL(GPIOTE_NRFX_INST_BY_NODE(node_id)) + +DT_FOREACH_STATUS_OKAY(nordic_nrf_gpiote, GPIOTE_NRFX_INST_DECLARE) + +#endif /* SOC_NORDIC_COMMON_GPIOTE_NRFX_H_ */ diff --git a/soc/nordic/common/soc_nrf_common.h b/soc/nordic/common/soc_nrf_common.h index 12ac373fd6eb..c963b6512188 100644 --- a/soc/nordic/common/soc_nrf_common.h +++ b/soc/nordic/common/soc_nrf_common.h @@ -149,6 +149,18 @@ (NRF_DT_GPIOS_TO_PSEL(node_id, prop)), \ (default_value)) +/** + * @brief Convert a devicetree GPIO phandle+specifier to GPIOTE node. + */ +#define NRF_DT_GPIOTE_NODE_BY_IDX(node_id, prop, idx) \ + DT_PHANDLE(DT_GPIO_CTLR_BY_IDX(node_id, prop, idx), gpiote_instance) + +/** + * @brief Equivalent to NRF_DT_GPIOTE_NODE_BY_IDX(node_id, prop, 0) + */ +#define NRF_DT_GPIOTE_NODE(node_id, prop) \ + NRF_DT_GPIOTE_NODE_BY_IDX(node_id, prop, 0) + /** * @brief Convert a devicetree GPIO phandle+specifier to GPIOTE instance number. * @@ -185,9 +197,7 @@ * NRF_DT_GPIOTE_INST_BY_IDX(DT_NODELABEL(foo), rx_gpios, 1) // = 20 */ #define NRF_DT_GPIOTE_INST_BY_IDX(node_id, prop, idx) \ - DT_PROP(DT_PHANDLE(DT_GPIO_CTLR_BY_IDX(node_id, prop, idx), \ - gpiote_instance), \ - instance) + DT_PROP(NRF_DT_GPIOTE_NODE_BY_IDX(node_id, prop, idx), instance) /** * @brief Equivalent to NRF_DT_GPIOTE_INST_BY_IDX(node_id, prop, 0) diff --git a/soc/nordic/common/soc_secure.c b/soc/nordic/common/soc_secure.c index 64d647f220a9..3bb8fa9e24ed 100644 --- a/soc/nordic/common/soc_secure.c +++ b/soc/nordic/common/soc_secure.c @@ -7,8 +7,6 @@ #include #include -#include "nrf.h" - #include "tfm_platform_api.h" #include "tfm_ioctl_api.h" diff --git a/soc/nordic/common/soc_secure.h b/soc/nordic/common/soc_secure.h index e4b34a9bf646..84a673467b67 100644 --- a/soc/nordic/common/soc_secure.h +++ b/soc/nordic/common/soc_secure.h @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ #include -#include +#include #include #include diff --git a/soc/nordic/ironside/include/nrf_ironside/cpuconf.h b/soc/nordic/ironside/include/nrf_ironside/cpuconf.h index b112396704a5..a0fabd8abbd2 100644 --- a/soc/nordic/ironside/include/nrf_ironside/cpuconf.h +++ b/soc/nordic/ironside/include/nrf_ironside/cpuconf.h @@ -9,7 +9,7 @@ #include #include #include -#include +#include #include /** diff --git a/soc/nordic/nrf51/soc.c b/soc/nordic/nrf51/soc.c index af14f6f3003a..481d1045b2a6 100644 --- a/soc/nordic/nrf51/soc.c +++ b/soc/nordic/nrf51/soc.c @@ -15,7 +15,7 @@ #include #include -#include +#include #include #define LOG_LEVEL CONFIG_SOC_LOG_LEVEL diff --git a/soc/nordic/nrf52/CMakeLists.txt b/soc/nordic/nrf52/CMakeLists.txt index 6b01a1ffc778..49004f15a265 100644 --- a/soc/nordic/nrf52/CMakeLists.txt +++ b/soc/nordic/nrf52/CMakeLists.txt @@ -3,10 +3,6 @@ zephyr_library_sources(soc.c) zephyr_include_directories(.) -if(CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58 AND CONFIG_SPI_NRFX_SPIM) - message(WARNING "Both SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58 and an NRF SPIM driver are enabled, therefore PAN 58 will apply if RXD.MAXCNT == 1 and TXD.MAXCNT <= 1") -endif() - if(CONFIG_SOC_NRF52832) if(NOT CONFIG_NRF52_ANOMALY_109_WORKAROUND) if (CONFIG_NRFX_SPIS OR CONFIG_NRFX_SPIM OR CONFIG_NRFX_TWIM OR CONFIG_NRFX_PWM) diff --git a/soc/nordic/nrf52/Kconfig b/soc/nordic/nrf52/Kconfig index 65d613a59cd1..ff29b6ac69de 100644 --- a/soc/nordic/nrf52/Kconfig +++ b/soc/nordic/nrf52/Kconfig @@ -92,11 +92,19 @@ config NRF52_ANOMALY_132_DELAY_US Additional drivers initialization increases initialization time and delay may be shortened. Workaround is disabled by setting delay to 0. +config NRF52_ANOMALY_58_WORKAROUND + bool "Anomaly 58 workaround" + default y + depends on SOC_NRF52832 + depends on NRFX_SPIM + help + This anomaly causes SPIM to clock out 2 bytes when 1 byte transfer was requested. + config NRF52_ANOMALY_198_WORKAROUND bool "Anomaly 198 workaround" default y depends on SOC_NRF52840 - depends on NRFX_SPIM3 + depends on $(dt_nodelabel_enabled_with_compat,spi3,$(DT_COMPAT_NORDIC_NRF_SPIM)) help This anomaly applies to IC revisions "Engineering B" up to "3", the most recent one. diff --git a/soc/nordic/nrf52/soc.c b/soc/nordic/nrf52/soc.c index 4bb3b8640e58..a5383ce31b18 100644 --- a/soc/nordic/nrf52/soc.c +++ b/soc/nordic/nrf52/soc.c @@ -17,14 +17,25 @@ #include #include #include -#include +#include #include +#include #include #define LOG_LEVEL CONFIG_SOC_LOG_LEVEL LOG_MODULE_REGISTER(soc); +void gppi_init(void) +{ + static nrfx_gppi_t gppi_instance; + + gppi_instance.ch_mask = BIT_MASK(PPI_CH_NUM) & ~NRFX_PPI_CHANNELS_USED; + gppi_instance.group_mask = BIT_MASK(PPI_GROUP_NUM) & ~NRFX_PPI_GROUPS_USED; + + nrfx_gppi_init(&gppi_instance); +} + static int nordicsemi_nrf52_init(void) { #ifdef CONFIG_NRF_ENABLE_ICACHE @@ -41,6 +52,10 @@ static int nordicsemi_nrf52_init(void) nrf_power_dcdcen_vddh_set(NRF_POWER, true); #endif + if (IS_ENABLED(CONFIG_NRFX_GPPI) && !IS_ENABLED(CONFIG_NRFX_GPPI_V1)) { + gppi_init(); + } + return 0; } diff --git a/soc/nordic/nrf53/soc.c b/soc/nordic/nrf53/soc.c index eb01872a71df..7f19f9719444 100644 --- a/soc/nordic/nrf53/soc.c +++ b/soc/nordic/nrf53/soc.c @@ -16,9 +16,9 @@ #include #include #include -#include +#include #include -#include +#include #include #include #include @@ -390,8 +390,8 @@ bool z_arm_on_enter_cpu_idle(void) /* RTC pretick - application core part. */ static int rtc_pretick_cpuapp_init(void) { - uint8_t ch; - nrfx_err_t err; + nrfx_gppi_handle_t handle; + int err; nrf_ipc_event_t ipc_event = nrf_ipc_receive_event_get(CONFIG_SOC_NRF53_RTC_PRETICK_IPC_CH_FROM_NET); nrf_ipc_task_t ipc_task = @@ -399,19 +399,16 @@ static int rtc_pretick_cpuapp_init(void) uint32_t task_ipc = nrf_ipc_task_address_get(NRF_IPC, ipc_task); uint32_t evt_ipc = nrf_ipc_event_address_get(NRF_IPC, ipc_event); - err = nrfx_gppi_channel_alloc(&ch); - if (err != NRFX_SUCCESS) { - return -ENOMEM; - } - nrf_ipc_receive_config_set(NRF_IPC, CONFIG_SOC_NRF53_RTC_PRETICK_IPC_CH_FROM_NET, BIT(CONFIG_SOC_NRF53_RTC_PRETICK_IPC_CH_FROM_NET)); nrf_ipc_send_config_set(NRF_IPC, CONFIG_SOC_NRF53_RTC_PRETICK_IPC_CH_TO_NET, BIT(CONFIG_SOC_NRF53_RTC_PRETICK_IPC_CH_TO_NET)); + err = nrfx_gppi_conn_alloc(evt_ipc, task_ipc, &handle); + if (err < 0) { + return err; + } - nrfx_gppi_task_endpoint_setup(ch, task_ipc); - nrfx_gppi_event_endpoint_setup(ch, evt_ipc); - nrfx_gppi_channels_enable(BIT(ch)); + nrfx_gppi_conn_enable(handle); return 0; } @@ -429,7 +426,7 @@ void rtc_pretick_rtc1_isr_hook(void) static int rtc_pretick_cpunet_init(void) { - uint8_t ppi_ch; + nrfx_gppi_handle_t ppi_handle; nrf_ipc_task_t ipc_task = nrf_ipc_send_task_get(CONFIG_SOC_NRF53_RTC_PRETICK_IPC_CH_FROM_NET); nrf_ipc_event_t ipc_event = @@ -439,6 +436,7 @@ static int rtc_pretick_cpunet_init(void) uint32_t task_wdt = nrf_wdt_task_address_get(NRF_WDT, NRF_WDT_TASK_START); uint32_t evt_cc = nrf_rtc_event_address_get(NRF_RTC1, NRF_RTC_CHANNEL_EVENT_ADDR(RTC1_PRETICK_CC_CHAN)); + int err; /* Configure Watchdog to allow stopping. */ nrf_wdt_behaviour_set(NRF_WDT, WDT_CONFIG_STOPEN_Msk | BIT(4)); @@ -451,17 +449,16 @@ static int rtc_pretick_cpunet_init(void) BIT(CONFIG_SOC_NRF53_RTC_PRETICK_IPC_CH_FROM_NET)); /* Allocate PPI channel for RTC Compare event publishers that starts WDT. */ - nrfx_err_t err = nrfx_gppi_channel_alloc(&ppi_ch); - - if (err != NRFX_SUCCESS) { - return -ENOMEM; + err = nrfx_gppi_domain_conn_alloc(0, 0, &ppi_handle); + if (err < 0) { + return err; } - nrfx_gppi_event_endpoint_setup(ppi_ch, evt_cc); - nrfx_gppi_task_endpoint_setup(ppi_ch, task_ipc); - nrfx_gppi_event_endpoint_setup(ppi_ch, evt_ipc); - nrfx_gppi_task_endpoint_setup(ppi_ch, task_wdt); - nrfx_gppi_channels_enable(BIT(ppi_ch)); + nrfx_gppi_ep_attach(ppi_handle, evt_cc); + nrfx_gppi_ep_attach(ppi_handle, task_ipc); + nrfx_gppi_ep_attach(ppi_handle, evt_ipc); + nrfx_gppi_ep_attach(ppi_handle, task_wdt); + nrfx_gppi_conn_enable(ppi_handle); nrf_rtc_event_enable(NRF_RTC1, NRF_RTC_CHANNEL_INT_MASK(RTC1_PRETICK_CC_CHAN)); nrf_rtc_event_clear(NRF_RTC1, NRF_RTC_CHANNEL_EVENT_ADDR(RTC1_PRETICK_CC_CHAN)); @@ -480,6 +477,17 @@ static int rtc_pretick_init(void) } #endif /* CONFIG_SOC_NRF53_RTC_PRETICK */ +BUILD_ASSERT(DPPIC_CH_NUM == 32); +void gppi_init(void) +{ + static nrfx_gppi_t gppi_instance; + + gppi_instance.ch_mask = UINT32_MAX & ~NRFX_DPPI_CHANNELS_USED; + gppi_instance.group_mask = BIT_MASK(DPPIC_GROUP_NUM) & ~NRFX_DPPI_GROUPS_USED; + + nrfx_gppi_init(&gppi_instance); +} + void soc_early_init_hook(void) { #if defined(CONFIG_SOC_NRF5340_CPUAPP) && defined(CONFIG_NRF_ENABLE_CACHE) @@ -560,6 +568,10 @@ void soc_early_init_hook(void) __ASSERT_NO_MSG(err == 0); (void)err; #endif + + if (IS_ENABLED(CONFIG_NRFX_GPPI) && !IS_ENABLED(CONFIG_NRFX_GPPI_V1)) { + gppi_init(); + } } void soc_late_init_hook(void) diff --git a/soc/nordic/nrf53/sync_rtc.c b/soc/nordic/nrf53/sync_rtc.c index 724453583b35..8608da51a86c 100644 --- a/soc/nordic/nrf53/sync_rtc.c +++ b/soc/nordic/nrf53/sync_rtc.c @@ -3,7 +3,6 @@ * * SPDX-License-Identifier: Apache-2.0 */ -#include #include #include #include @@ -27,7 +26,7 @@ static int32_t nrf53_sync_offset = -EBUSY; union rtc_sync_channels { uint32_t raw; struct { - uint8_t ppi; + nrfx_gppi_handle_t ppi; uint8_t rtc; uint8_t ipc_out; uint8_t ipc_in; @@ -74,14 +73,15 @@ union rtc_sync_channels { static void ppi_ipc_to_rtc(union rtc_sync_channels channels, bool setup) { nrf_ipc_event_t ipc_evt = nrf_ipc_receive_event_get(channels.ch.ipc_in); - uint32_t task_addr = z_nrf_rtc_timer_capture_task_address_get(channels.ch.rtc); + uint32_t eep = nrf_ipc_event_address_get(NRF_IPC, ipc_evt); + uint32_t tep = z_nrf_rtc_timer_capture_task_address_get(channels.ch.rtc); if (setup) { - nrfx_gppi_task_endpoint_setup(channels.ch.ppi, task_addr); - nrf_ipc_publish_set(NRF_IPC, ipc_evt, channels.ch.ppi); + nrfx_gppi_ep_attach(channels.ch.ppi, eep); + nrfx_gppi_ep_attach(channels.ch.ppi, tep); } else { - nrfx_gppi_task_endpoint_clear(channels.ch.ppi, task_addr); - nrf_ipc_publish_clear(NRF_IPC, ipc_evt); + nrfx_gppi_ep_clear(eep); + nrfx_gppi_ep_clear(tep); } } @@ -92,30 +92,25 @@ static void ppi_ipc_to_rtc(union rtc_sync_channels channels, bool setup) */ static void ppi_rtc_to_ipc(union rtc_sync_channels channels, bool setup) { - uint32_t evt_addr = z_nrf_rtc_timer_compare_evt_address_get(channels.ch.rtc); nrf_ipc_task_t ipc_task = nrf_ipc_send_task_get(channels.ch.ipc_out); + uint32_t eep = z_nrf_rtc_timer_compare_evt_address_get(channels.ch.rtc); + uint32_t tep = nrf_ipc_task_address_get(NRF_IPC, ipc_task); if (setup) { - nrf_ipc_subscribe_set(NRF_IPC, ipc_task, channels.ch.ppi); - nrfx_gppi_event_endpoint_setup(channels.ch.ppi, evt_addr); + nrfx_gppi_ep_attach(channels.ch.ppi, eep); + nrfx_gppi_ep_attach(channels.ch.ppi, tep); } else { - nrfx_gppi_event_endpoint_clear(channels.ch.ppi, evt_addr); - nrf_ipc_subscribe_clear(NRF_IPC, ipc_task); + nrfx_gppi_ep_clear(eep); + nrfx_gppi_ep_clear(tep); } } /* Free DPPI and RTC channels */ static void free_resources(union rtc_sync_channels channels) { - nrfx_dppi_t dppi = NRFX_DPPI_INSTANCE(0); - nrfx_err_t err; - - nrfx_gppi_channels_disable(BIT(channels.ch.ppi)); - + nrfx_gppi_conn_disable(channels.ch.ppi); + nrfx_gppi_domain_conn_free(channels.ch.ppi); z_nrf_rtc_timer_chan_free(channels.ch.rtc); - - err = nrfx_dppi_channel_free(&dppi, channels.ch.ppi); - __ASSERT_NO_MSG(err == NRFX_SUCCESS); } int z_nrf_rtc_timer_nrf53net_offset_get(void) @@ -225,21 +220,18 @@ static int mbox_rx_init(void *user_data) /* Setup RTC synchronization. */ static int sync_rtc_setup(void) { - nrfx_dppi_t dppi = NRFX_DPPI_INSTANCE(0); - nrfx_err_t err; union rtc_sync_channels channels; int32_t sync_rtc_ch; int rv; - err = nrfx_dppi_channel_alloc(&dppi, &channels.ch.ppi); - if (err != NRFX_SUCCESS) { - rv = -ENODEV; + rv = nrfx_gppi_domain_conn_alloc(0, 0, &channels.ch.ppi); + if (rv < 0) { goto bail; } sync_rtc_ch = z_nrf_rtc_timer_chan_alloc(); if (sync_rtc_ch < 0) { - nrfx_dppi_channel_free(&dppi, channels.ch.ppi); + nrfx_gppi_domain_conn_free(channels.ch.ppi); rv = sync_rtc_ch; goto bail; } @@ -253,7 +245,7 @@ static int sync_rtc_setup(void) goto bail; } - nrfx_gppi_channels_enable(BIT(channels.ch.ppi)); + nrfx_gppi_conn_enable(channels.ch.ppi); if (IS_ENABLED(CONFIG_SOC_COMPATIBLE_NRF5340_CPUAPP)) { ppi_ipc_to_rtc(channels, true); diff --git a/soc/nordic/nrf54h/bicr/CMakeLists.txt b/soc/nordic/nrf54h/bicr/CMakeLists.txt index a93e36abbd26..fef09a2b319f 100644 --- a/soc/nordic/nrf54h/bicr/CMakeLists.txt +++ b/soc/nordic/nrf54h/bicr/CMakeLists.txt @@ -1,7 +1,7 @@ if(CONFIG_SOC_NRF54H20_GENERATE_BICR) set(bicr_json_file ${BOARD_DIR}/bicr.json) set(bicr_hex_file ${PROJECT_BINARY_DIR}/bicr.hex) - set(svd_file ${ZEPHYR_HAL_NORDIC_MODULE_DIR}/nrfx/mdk/nrf54h20_application.svd) + set(svd_file ${ZEPHYR_BASE}/../nrfx/bsp/stable/mdk/nrf54h20_application.svd) if(EXISTS ${bicr_json_file}) set_property(DIRECTORY APPEND PROPERTY CMAKE_CONFIGURE_DEPENDS ${bicr_json_file}) diff --git a/soc/nordic/nrf54h/soc.c b/soc/nordic/nrf54h/soc.c index c996bc93e1ba..b538f3bb905e 100644 --- a/soc/nordic/nrf54h/soc.c +++ b/soc/nordic/nrf54h/soc.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/soc/nordic/nrf54l/soc.c b/soc/nordic/nrf54l/soc.c index 76225d70ab74..3396c453dad7 100644 --- a/soc/nordic/nrf54l/soc.c +++ b/soc/nordic/nrf54l/soc.c @@ -20,15 +20,15 @@ #include #include #include -#include -#include +#include #include +#include +#include LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL); #if (defined(NRF_APPLICATION) && !defined(CONFIG_TRUSTED_EXECUTION_NONSECURE)) || \ !defined(__ZEPHYR__) -#include #include #include #include @@ -149,6 +149,32 @@ static inline void power_and_clock_configuration(void) } #endif /* NRF_APPLICATION && !CONFIG_TRUSTED_EXECUTION_NONSECURE */ +#if defined(CONFIG_NRFX_GPPI) && !defined(CONFIG_NRFX_GPPI_V1) +void gppi_init(void) +{ + static nrfx_gppi_t gppi_instance; + + gppi_instance.routes = nrfx_gppi_routes_get(); + gppi_instance.route_map = nrfx_gppi_route_map_get(); + gppi_instance.nodes = nrfx_gppi_nodes_get(); + + nrfx_gppi_channel_init(NRFX_GPPI_NODE_DPPIC00, NRFX_BIT_MASK(DPPIC00_CH_NUM_SIZE)); + nrfx_gppi_channel_init(NRFX_GPPI_NODE_DPPIC10, NRFX_BIT_MASK(DPPIC10_CH_NUM_SIZE)); + nrfx_gppi_channel_init(NRFX_GPPI_NODE_DPPIC20, NRFX_BIT_MASK(DPPIC20_CH_NUM_SIZE)); + nrfx_gppi_channel_init(NRFX_GPPI_NODE_DPPIC30, NRFX_BIT_MASK(DPPIC30_CH_NUM_SIZE)); + nrfx_gppi_channel_init(NRFX_GPPI_NODE_PPIB00_10, NRFX_BIT_MASK(PPIB10_NTASKSEVENTS_SIZE)); + nrfx_gppi_channel_init(NRFX_GPPI_NODE_PPIB11_21, NRFX_BIT_MASK(PPIB11_NTASKSEVENTS_SIZE)); + nrfx_gppi_channel_init(NRFX_GPPI_NODE_PPIB01_20, NRFX_BIT_MASK(PPIB01_NTASKSEVENTS_SIZE)); + nrfx_gppi_channel_init(NRFX_GPPI_NODE_PPIB22_30, NRFX_BIT_MASK(PPIB22_NTASKSEVENTS_SIZE)); + + nrfx_gppi_groups_init(NRFX_GPPI_NODE_DPPIC00, NRFX_BIT_MASK(DPPIC00_GROUP_NUM_SIZE)); + nrfx_gppi_groups_init(NRFX_GPPI_NODE_DPPIC10, NRFX_BIT_MASK(DPPIC10_GROUP_NUM_SIZE)); + nrfx_gppi_groups_init(NRFX_GPPI_NODE_DPPIC20, NRFX_BIT_MASK(DPPIC20_GROUP_NUM_SIZE)); + nrfx_gppi_groups_init(NRFX_GPPI_NODE_DPPIC30, NRFX_BIT_MASK(DPPIC30_GROUP_NUM_SIZE)); + nrfx_gppi_init(&gppi_instance); +} +#endif + int nordicsemi_nrf54l_init(void) { /* Update the SystemCoreClock global variable with current core clock @@ -163,6 +189,10 @@ int nordicsemi_nrf54l_init(void) power_and_clock_configuration(); #endif +#if defined(CONFIG_NRFX_GPPI) && !defined(CONFIG_NRFX_GPPI_V1) + gppi_init(); +#endif + return 0; } diff --git a/soc/nordic/nrf91/soc.c b/soc/nordic/nrf91/soc.c index 5eb6342e6909..9eb4367e674e 100644 --- a/soc/nordic/nrf91/soc.c +++ b/soc/nordic/nrf91/soc.c @@ -14,14 +14,25 @@ #include #include -#include +#include #include +#include #include #define LOG_LEVEL CONFIG_SOC_LOG_LEVEL LOG_MODULE_REGISTER(soc); +void gppi_init(void) +{ + static nrfx_gppi_t gppi_instance; + + gppi_instance.ch_mask = BIT_MASK(DPPIC_CH_NUM) & ~NRFX_DPPI_CHANNELS_USED; + gppi_instance.group_mask = BIT_MASK(DPPIC_GROUP_NUM) & ~NRFX_DPPI_GROUPS_USED; + + nrfx_gppi_init(&gppi_instance); +} + static int nordicsemi_nrf91_init(void) { #ifdef CONFIG_NRF_ENABLE_ICACHE @@ -29,6 +40,10 @@ static int nordicsemi_nrf91_init(void) NRF_NVMC->ICACHECNF = NVMC_ICACHECNF_CACHEEN_Msk; #endif + if (IS_ENABLED(CONFIG_NRFX_GPPI) && !IS_ENABLED(CONFIG_NRFX_GPPI_V1)) { + gppi_init(); + } + return 0; } diff --git a/soc/nordic/nrf92/soc.c b/soc/nordic/nrf92/soc.c index 3652b554711a..bb3fff687be1 100644 --- a/soc/nordic/nrf92/soc.c +++ b/soc/nordic/nrf92/soc.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL); diff --git a/soc/nordic/validate_binding_headers.c b/soc/nordic/validate_binding_headers.c index 98ffffe86703..d917ccba8196 100644 --- a/soc/nordic/validate_binding_headers.c +++ b/soc/nordic/validate_binding_headers.c @@ -14,7 +14,7 @@ #include #include -#include +#include /** * Domain IDs. See: diff --git a/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio.c b/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio.c index 90a0945f5a19..561f3468d687 100644 --- a/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio.c +++ b/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio.c @@ -11,6 +11,7 @@ #include #include +#include #include "util/mem.h" @@ -66,8 +67,8 @@ BUILD_ASSERT(!HAL_RADIO_GPIO_LNA_OFFSET_MISSING, #endif /* FEM_NODE */ #if defined(HAL_RADIO_GPIO_HAVE_PA_PIN) || defined(HAL_RADIO_GPIO_HAVE_LNA_PIN) -static const nrfx_gpiote_t gpiote_palna = NRFX_GPIOTE_INSTANCE( - NRF_DT_GPIOTE_INST(FEM_NODE, HAL_RADIO_GPIO_PA_PROP)); +static nrfx_gpiote_t * const gpiote_palna = + &GPIOTE_NRFX_INST_BY_NODE(NRF_DT_GPIOTE_NODE(FEM_NODE, HAL_RADIO_GPIO_PA_PROP)); static uint8_t gpiote_ch_palna; BUILD_ASSERT(NRF_DT_GPIOTE_INST(FEM_NODE, HAL_RADIO_GPIO_PA_PROP) == @@ -77,8 +78,8 @@ BUILD_ASSERT(NRF_DT_GPIOTE_INST(FEM_NODE, HAL_RADIO_GPIO_PA_PROP) == #endif #if defined(HAL_RADIO_FEM_IS_NRF21540) -static const nrfx_gpiote_t gpiote_pdn = NRFX_GPIOTE_INSTANCE( - NRF_DT_GPIOTE_INST(FEM_NODE, pdn_gpios)); +static nrfx_gpiote_t * const gpiote_pdn = + &GPIOTE_NRFX_INST_BY_NODE(NRF_DT_GPIOTE_NODE(FEM_NODE, pdn_gpios)); static uint8_t gpiote_ch_pdn; #endif @@ -1930,13 +1931,13 @@ uint32_t radio_tmr_sample_get(void) int radio_gpio_pa_lna_init(void) { #if defined(HAL_RADIO_GPIO_HAVE_PA_PIN) || defined(HAL_RADIO_GPIO_HAVE_LNA_PIN) - if (nrfx_gpiote_channel_alloc(&gpiote_palna, &gpiote_ch_palna) != NRFX_SUCCESS) { + if (nrfx_gpiote_channel_alloc(gpiote_palna, &gpiote_ch_palna) != NRFX_SUCCESS) { return -ENOMEM; } #endif #if defined(NRF_GPIO_PDN_PIN) - if (nrfx_gpiote_channel_alloc(&gpiote_pdn, &gpiote_ch_pdn) != NRFX_SUCCESS) { + if (nrfx_gpiote_channel_alloc(gpiote_pdn, &gpiote_ch_pdn) != NRFX_SUCCESS) { return -ENOMEM; } #endif @@ -1947,18 +1948,18 @@ int radio_gpio_pa_lna_init(void) void radio_gpio_pa_lna_deinit(void) { #if defined(HAL_RADIO_GPIO_HAVE_PA_PIN) || defined(HAL_RADIO_GPIO_HAVE_LNA_PIN) - (void)nrfx_gpiote_channel_free(&gpiote_palna, gpiote_ch_palna); + (void)nrfx_gpiote_channel_free(gpiote_palna, gpiote_ch_palna); #endif #if defined(NRF_GPIO_PDN_PIN) - (void)nrfx_gpiote_channel_free(&gpiote_pdn, gpiote_ch_pdn); + (void)nrfx_gpiote_channel_free(gpiote_pdn, gpiote_ch_pdn); #endif } #if defined(HAL_RADIO_GPIO_HAVE_PA_PIN) void radio_gpio_pa_setup(void) { - gpiote_palna.p_reg->CONFIG[gpiote_ch_palna] = + gpiote_palna->p_reg->CONFIG[gpiote_ch_palna] = (GPIOTE_CONFIG_MODE_Task << GPIOTE_CONFIG_MODE_Pos) | (NRF_GPIO_PA_PSEL << @@ -1978,7 +1979,7 @@ void radio_gpio_pa_setup(void) #if defined(HAL_RADIO_GPIO_HAVE_LNA_PIN) void radio_gpio_lna_setup(void) { - gpiote_palna.p_reg->CONFIG[gpiote_ch_palna] = + gpiote_palna->p_reg->CONFIG[gpiote_ch_palna] = (GPIOTE_CONFIG_MODE_Task << GPIOTE_CONFIG_MODE_Pos) | (NRF_GPIO_LNA_PSEL << @@ -1998,7 +1999,7 @@ void radio_gpio_pdn_setup(void) { /* Note: the pdn-gpios property is optional. */ #if defined(NRF_GPIO_PDN) - gpiote_pdn.p_reg->CONFIG[gpiote_ch_pdn] = + gpiote_pdn->p_reg->CONFIG[gpiote_ch_pdn] = (GPIOTE_CONFIG_MODE_Task << GPIOTE_CONFIG_MODE_Pos) | (NRF_GPIO_PDN_PSEL << @@ -2052,12 +2053,12 @@ void radio_gpio_pa_lna_disable(void) BIT(HAL_DISABLE_PALNA_PPI) | BIT(HAL_ENABLE_FEM_PPI) | BIT(HAL_DISABLE_FEM_PPI)); - gpiote_palna.p_reg->CONFIG[gpiote_ch_palna] = 0; - gpiote_pdn.p_reg->CONFIG[gpiote_ch_pdn] = 0; + gpiote_palna->p_reg->CONFIG[gpiote_ch_palna] = 0; + gpiote_pdn->p_reg->CONFIG[gpiote_ch_pdn] = 0; #else hal_radio_nrf_ppi_channels_disable(BIT(HAL_ENABLE_PALNA_PPI) | BIT(HAL_DISABLE_PALNA_PPI)); - gpiote_palna.p_reg->CONFIG[gpiote_ch_palna] = 0; + gpiote_palna->p_reg->CONFIG[gpiote_ch_palna] = 0; #endif } #endif /* HAL_RADIO_GPIO_HAVE_PA_PIN || HAL_RADIO_GPIO_HAVE_LNA_PIN */ diff --git a/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio_nrf52810.h b/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio_nrf52810.h index 7b22249ec928..1545b292d9c9 100644 --- a/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio_nrf52810.h +++ b/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio_nrf52810.h @@ -4,7 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include +#include /* Use the NRF_RTC instance for coarse radio event scheduling */ #define NRF_RTC NRF_RTC0 diff --git a/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio_nrf52832.h b/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio_nrf52832.h index 10e942cca1e9..7a5321e2ea4f 100644 --- a/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio_nrf52832.h +++ b/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio_nrf52832.h @@ -5,7 +5,7 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include +#include /* Use the NRF_RTC instance for coarse radio event scheduling */ #define NRF_RTC NRF_RTC0 diff --git a/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio_nrf52840.h b/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio_nrf52840.h index 80ab0f9e2410..6c3ce7cf41f2 100644 --- a/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio_nrf52840.h +++ b/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio_nrf52840.h @@ -5,7 +5,7 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include +#include /* Use the NRF_RTC instance for coarse radio event scheduling */ #define NRF_RTC NRF_RTC0 diff --git a/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio_nrf5_dppi_gpiote.h b/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio_nrf5_dppi_gpiote.h index 428bcb869687..4e3729ad7748 100644 --- a/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio_nrf5_dppi_gpiote.h +++ b/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio_nrf5_dppi_gpiote.h @@ -18,7 +18,7 @@ static inline void hal_palna_ppi_setup(void) nrf_gpiote_task_t task; task = nrf_gpiote_out_task_get(gpiote_ch_palna); - nrf_gpiote_subscribe_set(gpiote_palna.p_reg, task, HAL_DISABLE_PALNA_PPI); + nrf_gpiote_subscribe_set(gpiote_palna->p_reg, task, HAL_DISABLE_PALNA_PPI); #endif } #endif /* defined(HAL_RADIO_GPIO_HAVE_PA_PIN) || defined(HAL_RADIO_GPIO_HAVE_LNA_PIN) */ @@ -44,14 +44,14 @@ static inline void hal_gpiote_tasks_setup(NRF_GPIOTE_Type *gpiote, static inline void hal_pa_ppi_setup(void) { - hal_gpiote_tasks_setup(gpiote_palna.p_reg, gpiote_ch_palna, + hal_gpiote_tasks_setup(gpiote_palna->p_reg, gpiote_ch_palna, IS_ENABLED(HAL_RADIO_GPIO_PA_POL_INV), HAL_ENABLE_PALNA_PPI, HAL_DISABLE_PALNA_PPI); } static inline void hal_lna_ppi_setup(void) { - hal_gpiote_tasks_setup(gpiote_palna.p_reg, gpiote_ch_palna, + hal_gpiote_tasks_setup(gpiote_palna->p_reg, gpiote_ch_palna, IS_ENABLED(HAL_RADIO_GPIO_LNA_POL_INV), HAL_ENABLE_PALNA_PPI, HAL_DISABLE_PALNA_PPI); } @@ -63,7 +63,7 @@ static inline void hal_fem_ppi_setup(void) nrf_radio_publish_set(NRF_RADIO, NRF_RADIO_EVENT_DISABLED, HAL_DISABLE_FEM_PPI); - hal_gpiote_tasks_setup(gpiote_pdn.p_reg, gpiote_ch_pdn, + hal_gpiote_tasks_setup(gpiote_pdn->p_reg, gpiote_ch_pdn, IS_ENABLED(HAL_RADIO_GPIO_NRF21540_PDN_POL_INV), HAL_ENABLE_FEM_PPI, HAL_DISABLE_FEM_PPI); } diff --git a/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio_nrf5_ppi_gpiote.h b/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio_nrf5_ppi_gpiote.h index 268bae5aef17..b3fecbef87b8 100644 --- a/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio_nrf5_ppi_gpiote.h +++ b/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/radio_nrf5_ppi_gpiote.h @@ -13,12 +13,12 @@ static inline void hal_palna_ppi_setup(void) NRF_PPI, HAL_ENABLE_PALNA_PPI, (uint32_t)&(EVENT_TIMER->EVENTS_COMPARE[2]), - (uint32_t)&(gpiote_palna.p_reg->TASKS_OUT[gpiote_ch_palna])); + (uint32_t)&(gpiote_palna->p_reg->TASKS_OUT[gpiote_ch_palna])); nrf_ppi_channel_endpoint_setup( NRF_PPI, HAL_DISABLE_PALNA_PPI, (uint32_t)&(NRF_RADIO->EVENTS_DISABLED), - (uint32_t)&(gpiote_palna.p_reg->TASKS_OUT[gpiote_ch_palna])); + (uint32_t)&(gpiote_palna->p_reg->TASKS_OUT[gpiote_ch_palna])); } #endif /* defined(HAL_RADIO_GPIO_HAVE_PA_PIN) || defined(HAL_RADIO_GPIO_HAVE_LNA_PIN) */ @@ -40,12 +40,12 @@ static inline void hal_fem_ppi_setup(void) NRF_PPI, HAL_ENABLE_FEM_PPI, (uint32_t)&(EVENT_TIMER->EVENTS_COMPARE[3]), - (uint32_t)&(gpiote_pdn.p_reg->TASKS_OUT[gpiote_ch_pdn])); + (uint32_t)&(gpiote_pdn->p_reg->TASKS_OUT[gpiote_ch_pdn])); nrf_ppi_channel_endpoint_setup( NRF_PPI, HAL_DISABLE_FEM_PPI, (uint32_t)&(NRF_RADIO->EVENTS_DISABLED), - (uint32_t)&(gpiote_pdn.p_reg->TASKS_OUT[gpiote_ch_pdn])); + (uint32_t)&(gpiote_pdn->p_reg->TASKS_OUT[gpiote_ch_pdn])); } #endif /* HAL_RADIO_FEM_IS_NRF21540 */ diff --git a/tests/boards/nrf/comp/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay b/tests/boards/nrf/comp/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay index aaf1006300a5..c928e7eff243 100644 --- a/tests/boards/nrf/comp/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay +++ b/tests/boards/nrf/comp/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay @@ -5,6 +5,8 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + / { aliases { test-comp = ∁ @@ -30,9 +32,9 @@ &comp { status = "okay"; - psel = "AIN4"; + psel = ; refsel = "AREF"; - extrefsel = "AIN3"; + extrefsel = ; sp-mode = "NORMAL"; th-up = <36>; th-down = <30>; diff --git a/tests/boards/nrf/comp/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay b/tests/boards/nrf/comp/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay index aaf1006300a5..c928e7eff243 100644 --- a/tests/boards/nrf/comp/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay +++ b/tests/boards/nrf/comp/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay @@ -5,6 +5,8 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + / { aliases { test-comp = ∁ @@ -30,9 +32,9 @@ &comp { status = "okay"; - psel = "AIN4"; + psel = ; refsel = "AREF"; - extrefsel = "AIN3"; + extrefsel = ; sp-mode = "NORMAL"; th-up = <36>; th-down = <30>; diff --git a/tests/boards/nrf/comp/boards/nrf54h20dk_nrf54h20_cpuapp.overlay b/tests/boards/nrf/comp/boards/nrf54h20dk_nrf54h20_cpuapp.overlay index 4e9e898ea184..27008ba6760f 100644 --- a/tests/boards/nrf/comp/boards/nrf54h20dk_nrf54h20_cpuapp.overlay +++ b/tests/boards/nrf/comp/boards/nrf54h20dk_nrf54h20_cpuapp.overlay @@ -4,6 +4,8 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + / { aliases { test-comp = ∁ @@ -25,9 +27,9 @@ &comp { status = "okay"; - psel = "AIN5"; + psel = ; refsel = "AREF"; - extrefsel = "AIN1"; + extrefsel = ; sp-mode = "HIGH"; th-up = <36>; th-down = <30>; diff --git a/tests/boards/nrf/comp/boards/nrf54l15dk_nrf54l15_cpuapp.overlay b/tests/boards/nrf/comp/boards/nrf54l15dk_nrf54l15_cpuapp.overlay index d6492e37c343..5695f7d90dcd 100644 --- a/tests/boards/nrf/comp/boards/nrf54l15dk_nrf54l15_cpuapp.overlay +++ b/tests/boards/nrf/comp/boards/nrf54l15dk_nrf54l15_cpuapp.overlay @@ -4,6 +4,8 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + / { aliases { test-comp = ∁ @@ -29,9 +31,9 @@ &comp { status = "okay"; - psel = "AIN4"; + psel = ; refsel = "AREF"; - extrefsel = "AIN3"; + extrefsel = ; sp-mode = "NORMAL"; th-up = <36>; th-down = <30>; diff --git a/tests/boards/nrf/comp/boards/nrf54lm20dk_nrf54lm20a_cpuapp.overlay b/tests/boards/nrf/comp/boards/nrf54lm20dk_nrf54lm20a_cpuapp.overlay index 45cefc0815bb..94087309aee9 100644 --- a/tests/boards/nrf/comp/boards/nrf54lm20dk_nrf54lm20a_cpuapp.overlay +++ b/tests/boards/nrf/comp/boards/nrf54lm20dk_nrf54lm20a_cpuapp.overlay @@ -5,6 +5,8 @@ * AIN4 (P1.06) tied to VDD */ +#include + / { aliases { test-comp = ∁ @@ -22,9 +24,9 @@ &comp { status = "okay"; - psel = "AIN4"; + psel = ; refsel = "AREF"; - extrefsel = "AIN3"; + extrefsel = ; sp-mode = "NORMAL"; th-up = <36>; th-down = <30>; diff --git a/tests/boards/nrf/comp/src/test.c b/tests/boards/nrf/comp/src/test.c index 1d1876e76faa..481760da5bd4 100644 --- a/tests/boards/nrf/comp/src/test.c +++ b/tests/boards/nrf/comp/src/test.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include @@ -13,14 +14,11 @@ static const struct device *test_dev = DEVICE_DT_GET(DT_ALIAS(test_comp)); static const struct gpio_dt_spec test_pin_1 = GPIO_DT_SPEC_GET(DT_PATH(zephyr_user), first_gpios); static const struct gpio_dt_spec test_pin_2 = GPIO_DT_SPEC_GET(DT_PATH(zephyr_user), second_gpios); -#define TEST_COMP_SE_PSEL_AIN _CONCAT(COMP_NRF_COMP_PSEL_AIN, \ - CONFIG_TEST_COMP_SE_PSEL_AIN_INDEX) -#define TEST_COMP_SE_EXTREFSEL_AIN _CONCAT(COMP_NRF_COMP_EXTREFSEL_AIN, \ - CONFIG_TEST_COMP_SE_EXTREFSEL_AIN_INDEX) -#define TEST_COMP_DIFF_PSEL_AIN _CONCAT(COMP_NRF_COMP_PSEL_AIN, \ - CONFIG_TEST_COMP_DIFF_PSEL_AIN_INDEX) -#define TEST_COMP_DIFF_EXTREFSEL_AIN _CONCAT(COMP_NRF_COMP_EXTREFSEL_AIN, \ - CONFIG_TEST_COMP_DIFF_EXTREFSEL_AIN_INDEX) +#define TEST_COMP_SE_PSEL_AIN _CONCAT(NRF_COMP_AIN, CONFIG_TEST_COMP_SE_PSEL_AIN_INDEX) +#define TEST_COMP_SE_EXTREFSEL_AIN _CONCAT(NRF_COMP_AIN, CONFIG_TEST_COMP_SE_EXTREFSEL_AIN_INDEX) +#define TEST_COMP_DIFF_PSEL_AIN _CONCAT(NRF_COMP_AIN, CONFIG_TEST_COMP_DIFF_PSEL_AIN_INDEX) +#define TEST_COMP_DIFF_EXTREFSEL_AIN \ + _CONCAT(NRF_COMP_AIN, CONFIG_TEST_COMP_DIFF_EXTREFSEL_AIN_INDEX) struct comp_nrf_comp_se_config comp_se_config = { .psel = TEST_COMP_SE_PSEL_AIN, diff --git a/tests/boards/nrf/i2c/i2c_slave/boards/bl54l15_dvk_nrf54l15_cpuapp.conf b/tests/boards/nrf/i2c/i2c_slave/boards/bl54l15_dvk_nrf54l15_cpuapp.conf deleted file mode 100644 index eae536f36565..000000000000 --- a/tests/boards/nrf/i2c/i2c_slave/boards/bl54l15_dvk_nrf54l15_cpuapp.conf +++ /dev/null @@ -1,5 +0,0 @@ -# Copyright 2024 Nordic Semiconductor ASA -# Copyright 2025 Ezurio LLC -# SPDX-License-Identifier: Apache-2.0 - -CONFIG_NRFX_TWIS22=y diff --git a/tests/boards/nrf/i2c/i2c_slave/boards/bl54l15u_dvk_nrf54l15_cpuapp.conf b/tests/boards/nrf/i2c/i2c_slave/boards/bl54l15u_dvk_nrf54l15_cpuapp.conf deleted file mode 100644 index eae536f36565..000000000000 --- a/tests/boards/nrf/i2c/i2c_slave/boards/bl54l15u_dvk_nrf54l15_cpuapp.conf +++ /dev/null @@ -1,5 +0,0 @@ -# Copyright 2024 Nordic Semiconductor ASA -# Copyright 2025 Ezurio LLC -# SPDX-License-Identifier: Apache-2.0 - -CONFIG_NRFX_TWIS22=y diff --git a/tests/boards/nrf/i2c/i2c_slave/boards/nrf52840dk_nrf52840.conf b/tests/boards/nrf/i2c/i2c_slave/boards/nrf52840dk_nrf52840.conf deleted file mode 100644 index e79ad7a81266..000000000000 --- a/tests/boards/nrf/i2c/i2c_slave/boards/nrf52840dk_nrf52840.conf +++ /dev/null @@ -1 +0,0 @@ -CONFIG_NRFX_TWIS1=y diff --git a/tests/boards/nrf/i2c/i2c_slave/boards/nrf5340dk_nrf5340_cpuapp.conf b/tests/boards/nrf/i2c/i2c_slave/boards/nrf5340dk_nrf5340_cpuapp.conf deleted file mode 100644 index a7bedf1f04b1..000000000000 --- a/tests/boards/nrf/i2c/i2c_slave/boards/nrf5340dk_nrf5340_cpuapp.conf +++ /dev/null @@ -1 +0,0 @@ -CONFIG_NRFX_TWIS2=y diff --git a/tests/boards/nrf/i2c/i2c_slave/boards/nrf54h20dk_nrf54h20_cpuapp.conf b/tests/boards/nrf/i2c/i2c_slave/boards/nrf54h20dk_nrf54h20_cpuapp.conf deleted file mode 100644 index 157e0a11f728..000000000000 --- a/tests/boards/nrf/i2c/i2c_slave/boards/nrf54h20dk_nrf54h20_cpuapp.conf +++ /dev/null @@ -1 +0,0 @@ -CONFIG_NRFX_TWIS131=y diff --git a/tests/boards/nrf/i2c/i2c_slave/boards/nrf54h20dk_nrf54h20_cpuppr.conf b/tests/boards/nrf/i2c/i2c_slave/boards/nrf54h20dk_nrf54h20_cpuppr.conf deleted file mode 100644 index 157e0a11f728..000000000000 --- a/tests/boards/nrf/i2c/i2c_slave/boards/nrf54h20dk_nrf54h20_cpuppr.conf +++ /dev/null @@ -1 +0,0 @@ -CONFIG_NRFX_TWIS131=y diff --git a/tests/boards/nrf/i2c/i2c_slave/boards/nrf54l15dk_nrf54l15_cpuapp.conf b/tests/boards/nrf/i2c/i2c_slave/boards/nrf54l15dk_nrf54l15_cpuapp.conf deleted file mode 100644 index b01af3b36a7b..000000000000 --- a/tests/boards/nrf/i2c/i2c_slave/boards/nrf54l15dk_nrf54l15_cpuapp.conf +++ /dev/null @@ -1 +0,0 @@ -CONFIG_NRFX_TWIS22=y diff --git a/tests/boards/nrf/i2c/i2c_slave/boards/nrf54lm20dk_nrf54lm20a_cpuapp.conf b/tests/boards/nrf/i2c/i2c_slave/boards/nrf54lm20dk_nrf54lm20a_cpuapp.conf deleted file mode 100644 index b01af3b36a7b..000000000000 --- a/tests/boards/nrf/i2c/i2c_slave/boards/nrf54lm20dk_nrf54lm20a_cpuapp.conf +++ /dev/null @@ -1 +0,0 @@ -CONFIG_NRFX_TWIS22=y diff --git a/tests/boards/nrf/i2c/i2c_slave/prj.conf b/tests/boards/nrf/i2c/i2c_slave/prj.conf index 4b19609ecfbd..e96142fe744f 100644 --- a/tests/boards/nrf/i2c/i2c_slave/prj.conf +++ b/tests/boards/nrf/i2c/i2c_slave/prj.conf @@ -1,2 +1,3 @@ CONFIG_I2C=y CONFIG_ZTEST=y +CONFIG_NRFX_TWIS=y diff --git a/tests/boards/nrf/i2c/i2c_slave/src/main.c b/tests/boards/nrf/i2c/i2c_slave/src/main.c index 78e6acec8805..dccc39762c30 100644 --- a/tests/boards/nrf/i2c/i2c_slave/src/main.c +++ b/tests/boards/nrf/i2c/i2c_slave/src/main.c @@ -17,24 +17,6 @@ #include -#if CONFIG_NRFX_TWIS1 -#define I2C_S_INSTANCE 1 -#elif CONFIG_NRFX_TWIS2 -#define I2C_S_INSTANCE 2 -#elif CONFIG_NRFX_TWIS20 -#define I2C_S_INSTANCE 20 -#elif CONFIG_NRFX_TWIS21 -#define I2C_S_INSTANCE 21 -#elif CONFIG_NRFX_TWIS22 -#define I2C_S_INSTANCE 22 -#elif CONFIG_NRFX_TWIS30 -#define I2C_S_INSTANCE 30 -#elif CONFIG_NRFX_TWIS131 -#define I2C_S_INSTANCE 131 -#else -#error "TWIS instance not enabled or not supported" -#endif - #define NODE_SENSOR DT_NODELABEL(sensor) #define NODE_TWIS DT_ALIAS(i2c_slave) @@ -46,7 +28,9 @@ #define TEST_DATA_SIZE 6 static const uint8_t msg[TEST_DATA_SIZE] = "Nordic"; -static const nrfx_twis_t twis = NRFX_TWIS_INSTANCE(I2C_S_INSTANCE); +static nrfx_twis_t twis = { + .p_reg = (NRF_TWIS_Type *)DT_REG_ADDR(NODE_TWIS) +}; static uint8_t i2c_slave_buffer[TEST_DATA_SIZE] TWIS_MEMORY_SECTION; static uint8_t i2c_master_buffer[TEST_DATA_SIZE]; @@ -57,7 +41,7 @@ struct i2c_api_twis_fixture { uint8_t *const slave_buffer; }; -void i2s_slave_handler(nrfx_twis_evt_t const *p_event) +void i2s_slave_handler(nrfx_twis_event_t const *p_event) { switch (p_event->type) { case NRFX_TWIS_EVT_READ_REQ: @@ -96,7 +80,7 @@ static void *test_setup(void) }; int ret; - zassert_equal(NRFX_SUCCESS, nrfx_twis_init(&twis, &config, i2s_slave_handler), + zassert_equal(0, nrfx_twis_init(&twis, &config, i2s_slave_handler), "TWIS initialization failed"); PINCTRL_DT_DEFINE(NODE_TWIS); @@ -104,7 +88,7 @@ static void *test_setup(void) zassert_ok(ret); IRQ_CONNECT(DT_IRQN(NODE_TWIS), DT_IRQ(NODE_TWIS, priority), - NRFX_TWIS_INST_HANDLER_GET(I2C_S_INSTANCE), NULL, 0); + nrfx_twis_irq_handler, &twis, 0); nrfx_twis_enable(&twis); diff --git a/tests/drivers/build_all/comparator/nrf_comp/diff.overlay b/tests/drivers/build_all/comparator/nrf_comp/diff.overlay index 8b8e9a02c2b1..56b4249d3c53 100644 --- a/tests/drivers/build_all/comparator/nrf_comp/diff.overlay +++ b/tests/drivers/build_all/comparator/nrf_comp/diff.overlay @@ -4,10 +4,12 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + &comp { main-mode = "DIFF"; - psel = "AIN0"; - extrefsel = "AIN1"; + psel = ; + extrefsel = ; sp-mode = "HIGH"; isource = "DISABLED"; status = "okay"; diff --git a/tests/drivers/build_all/comparator/nrf_comp/se.overlay b/tests/drivers/build_all/comparator/nrf_comp/se.overlay index e4eb56f61a92..67798ab4bcf1 100644 --- a/tests/drivers/build_all/comparator/nrf_comp/se.overlay +++ b/tests/drivers/build_all/comparator/nrf_comp/se.overlay @@ -4,9 +4,11 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + &comp { main-mode = "SE"; - psel = "AIN0"; + psel = ; refsel = "INT_1V2"; sp-mode = "HIGH"; th-up = <36>; diff --git a/tests/drivers/build_all/comparator/nrf_comp/se_aref.overlay b/tests/drivers/build_all/comparator/nrf_comp/se_aref.overlay index 0d36a3e40b40..04216a7ac10e 100644 --- a/tests/drivers/build_all/comparator/nrf_comp/se_aref.overlay +++ b/tests/drivers/build_all/comparator/nrf_comp/se_aref.overlay @@ -4,10 +4,12 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + &comp { main-mode = "SE"; - psel = "AIN0"; - extrefsel = "AIN1"; + psel = ; + extrefsel = ; refsel = "AREF"; sp-mode = "HIGH"; th-up = <36>; diff --git a/tests/drivers/build_all/comparator/nrf_lpcomp/ext_ref.overlay b/tests/drivers/build_all/comparator/nrf_lpcomp/ext_ref.overlay index 95e44fbed3d6..0d990b2c3f88 100644 --- a/tests/drivers/build_all/comparator/nrf_lpcomp/ext_ref.overlay +++ b/tests/drivers/build_all/comparator/nrf_lpcomp/ext_ref.overlay @@ -4,9 +4,11 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + &comp { compatible = "nordic,nrf-lpcomp"; - psel = "AIN0"; + psel = ; refsel = "VDD_4_8"; status = "okay"; }; diff --git a/tests/drivers/build_all/comparator/nrf_lpcomp/int_ref.overlay b/tests/drivers/build_all/comparator/nrf_lpcomp/int_ref.overlay index 7aadd8b3faee..a42ad2f13a16 100644 --- a/tests/drivers/build_all/comparator/nrf_lpcomp/int_ref.overlay +++ b/tests/drivers/build_all/comparator/nrf_lpcomp/int_ref.overlay @@ -4,10 +4,12 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + &comp { compatible = "nordic,nrf-lpcomp"; - psel = "AIN0"; + psel = ; refsel = "AREF"; - extrefsel = "AIN1"; + extrefsel = ; status = "okay"; }; diff --git a/tests/drivers/clock_control/clock_control_api/src/nrf_device_subsys.h b/tests/drivers/clock_control/clock_control_api/src/nrf_device_subsys.h index 47a3060d630e..c9cc3d7020b0 100644 --- a/tests/drivers/clock_control/clock_control_api/src/nrf_device_subsys.h +++ b/tests/drivers/clock_control/clock_control_api/src/nrf_device_subsys.h @@ -7,28 +7,86 @@ #include "device_subsys.h" #include -static const struct device_subsys_data subsys_data[] = { +#if NRF_CLOCK_HAS_HFCLK +static const struct device_subsys_data subsys_data_hfclk[] = { { .subsys = CLOCK_CONTROL_NRF_SUBSYS_HF, .startup_us = CONFIG_TEST_NRF_HF_STARTUP_TIME_US - }, -#ifndef CONFIG_SOC_NRF52832 - /* On nrf52832 LF clock cannot be stopped because it leads - * to RTC COUNTER register reset and that is unexpected by - * system clock which is disrupted and may hang in the test. - */ + } +}; +#endif /* NRF_CLOCK_HAS_HFCLK */ +#if NRF_CLOCK_HAS_XO +static const struct device_subsys_data subsys_data_xo[] = { + { + .subsys = CLOCK_CONTROL_NRF_SUBSYS_HF, + .startup_us = CONFIG_TEST_NRF_HF_STARTUP_TIME_US + } +}; +#endif /* NRF_CLOCK_HAS_XO */ +#if !defined(CONFIG_SOC_NRF52832) +static const struct device_subsys_data subsys_data_lfclk[] = { { .subsys = CLOCK_CONTROL_NRF_SUBSYS_LF, .startup_us = (CLOCK_CONTROL_NRF_K32SRC == - NRF_CLOCK_LFCLK_RC) ? 1000 : 500000 + NRF_CLOCK_LFCLK_RC) ? 1000 : 500000 + } +}; +#endif /* !defined(CONFIG_SOC_NRF52832) */ +#if NRF_CLOCK_HAS_HFCLK192M +static const struct device_subsys_data subsys_data_hfclk192m[] = { + { + .subsys = CLOCK_CONTROL_NRF_SUBSYS_HF192M, + .startup_us = 5 } -#endif /* !CONFIG_SOC_NRF52832 */ }; +#endif /* NRF_CLOCK_HAS_HFCLK192M */ +#if NRF_CLOCK_HAS_XO24M +static const struct device_subsys_data subsys_data_xo24m[] = { + { + .subsys = CLOCK_CONTROL_NRF_SUBSYS_HF24M, + .startup_us = 5 + } +}; +#endif /* NRF_CLOCK_HAS_XO24M */ static const struct device_data devices[] = { +#if NRF_CLOCK_HAS_HFCLK { - .dev = DEVICE_DT_GET_ONE(nordic_nrf_clock), - .subsys_data = subsys_data, - .subsys_cnt = ARRAY_SIZE(subsys_data) - } + .dev = DEVICE_DT_GET_ONE(nordic_nrf_clock_hfclk), + .subsys_data = subsys_data_hfclk, + .subsys_cnt = ARRAY_SIZE(subsys_data_hfclk) + }, +#endif /* NRF_CLOCK_HAS_HFCLK */ +#if NRF_CLOCK_HAS_XO + { + .dev = DEVICE_DT_GET_ONE(nordic_nrf_clock_xo), + .subsys_data = subsys_data_xo, + .subsys_cnt = ARRAY_SIZE(subsys_data_xo) + }, +#endif /* NRF_CLOCK_HAS_XO */ +#if !defined(CONFIG_SOC_NRF52832) + /* On nrf52832 LF clock cannot be stopped because it leads + * to RTC COUNTER register reset and that is unexpected by + * system clock which is disrupted and may hang in the test. + */ + { + .dev = DEVICE_DT_GET_ONE(nordic_nrf_clock_lfclk), + .subsys_data = subsys_data_lfclk, + .subsys_cnt = ARRAY_SIZE(subsys_data_lfclk) + }, +#endif /* !defined(CONFIG_SOC_NRF52832) */ +#if NRF_CLOCK_HAS_HFCLK192M + { + .dev = DEVICE_DT_GET_ONE(nordic_nrf_clock_hfclk192m), + .subsys_data = subsys_data_hfclk192m, + .subsys_cnt = ARRAY_SIZE(subsys_data_hfclk192m) + }, +#endif /* NRF_CLOCK_HAS_HFCLK192M */ +#if NRF_CLOCK_HAS_XO24M + { + .dev = DEVICE_DT_GET_ONE(nordic_nrf_clock_xo24m), + .subsys_data = subsys_data_xo24m, + .subsys_cnt = ARRAY_SIZE(subsys_data_xo24m) + }, +#endif /* NRF_CLOCK_HAS_XO24M */ }; diff --git a/tests/drivers/clock_control/clock_control_api/src/test_clock_control.c b/tests/drivers/clock_control/clock_control_api/src/test_clock_control.c index 91af56bd3d29..1e490f26265c 100644 --- a/tests/drivers/clock_control/clock_control_api/src/test_clock_control.c +++ b/tests/drivers/clock_control/clock_control_api/src/test_clock_control.c @@ -33,10 +33,7 @@ static void setup_instance(const struct device *dev, clock_control_subsys_t subs err = clock_control_off(dev, subsys); #if DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_clock) if (err == -EPERM) { - struct onoff_manager *mgr = - z_nrf_clock_control_get_onoff(subsys); - - err = onoff_release(mgr); + err = nrf_clock_control_release(dev, NULL); if (err >= 0) { break; } @@ -45,28 +42,27 @@ static void setup_instance(const struct device *dev, clock_control_subsys_t subs } while (clock_control_get_status(dev, subsys) != CLOCK_CONTROL_STATUS_OFF); - LOG_INF("setup done"); + LOG_INF("setup done: %s", dev->name); } static void tear_down_instance(const struct device *dev, clock_control_subsys_t subsys) { -#if DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_clock) +#if DT_HAS_COMPAT_STATUS_OKAY(nordic_nrf_clock_lfclk) /* Turn on LF clock using onoff service if it is disabled. */ - const struct device *const clk = DEVICE_DT_GET_ONE(nordic_nrf_clock); + const struct device *const clk = DEVICE_DT_GET_ONE(nordic_nrf_clock_lfclk); struct onoff_client cli; - struct onoff_manager *mgr = z_nrf_clock_control_get_onoff(CLOCK_CONTROL_NRF_SUBSYS_LF); int err; zassert_true(device_is_ready(clk), "Clock dev is not ready"); - if (clock_control_get_status(clk, CLOCK_CONTROL_NRF_SUBSYS_LF) != + if (clock_control_get_status(clk, NULL) != CLOCK_CONTROL_STATUS_OFF) { return; } sys_notify_init_spinwait(&cli.notify); - err = onoff_request(mgr, &cli); + err = nrf_clock_control_request(clk, NULL, &cli); zassert_true(err >= 0, ""); while (sys_notify_fetch_result(&cli.notify, &err) < 0) { diff --git a/tests/drivers/clock_control/clock_control_api/testcase.yaml b/tests/drivers/clock_control/clock_control_api/testcase.yaml index d3c2669641fc..9935de194582 100644 --- a/tests/drivers/clock_control/clock_control_api/testcase.yaml +++ b/tests/drivers/clock_control/clock_control_api/testcase.yaml @@ -21,6 +21,7 @@ tests: - nrf51dk/nrf51822 - nrf52dk/nrf52832 - nrf52840dk/nrf52840 + - nrf5340dk/nrf5340/cpuapp - nrf9160dk/nrf9160 - nrf54l15dk/nrf54l15/cpuapp - nrf54lm20dk/nrf54lm20a/cpuapp diff --git a/tests/drivers/clock_control/nrf_clock_control/src/main.c b/tests/drivers/clock_control/nrf_clock_control/src/main.c index 83fdc98ca193..914c5be46bbf 100644 --- a/tests/drivers/clock_control/nrf_clock_control/src/main.c +++ b/tests/drivers/clock_control/nrf_clock_control/src/main.c @@ -128,7 +128,7 @@ static const struct test_clk_context global_hsfll_test_clk_contexts[] = { }; #endif -#if defined(CONFIG_CLOCK_CONTROL_NRF_LFCLK) +#if defined(CONFIG_CLOCK_CONTROL_NRFS_LFCLK) const struct nrf_clock_spec test_clk_specs_lfclk[] = { { .frequency = 32768, @@ -351,7 +351,7 @@ ZTEST(nrf2_clock_control, test_global_hsfll_control) } #endif -#if defined(CONFIG_CLOCK_CONTROL_NRF_LFCLK) +#if defined(CONFIG_CLOCK_CONTROL_NRFS_LFCLK) ZTEST(nrf2_clock_control, test_lfclk_control) { TC_PRINT("LFCLK test\n"); diff --git a/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay b/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay index ddcf8d26cadd..84d3b9f57594 100644 --- a/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay +++ b/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay @@ -5,9 +5,11 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + &comp { main-mode = "SE"; - psel = "AIN4"; /* P1.11 */ + psel = ; /* P1.11 */ refsel = "INT_1V2"; sp-mode = "HIGH"; th-up = <63>; diff --git a/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay b/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay index ddcf8d26cadd..84d3b9f57594 100644 --- a/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay +++ b/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay @@ -5,9 +5,11 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + &comp { main-mode = "SE"; - psel = "AIN4"; /* P1.11 */ + psel = ; /* P1.11 */ refsel = "INT_1V2"; sp-mode = "HIGH"; th-up = <63>; diff --git a/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/nrf5340dk_nrf5340_cpuapp.overlay b/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/nrf5340dk_nrf5340_cpuapp.overlay index e11bdcd3173d..68fea53e2b45 100644 --- a/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/nrf5340dk_nrf5340_cpuapp.overlay +++ b/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/nrf5340dk_nrf5340_cpuapp.overlay @@ -4,9 +4,11 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + &comp { main-mode = "SE"; - psel = "AIN0"; /* P0.04 */ + psel = ; /* P0.04 */ refsel = "VDD"; sp-mode = "HIGH"; th-up = <34>; diff --git a/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/nrf54h20dk_nrf54h20_cpuapp.overlay b/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/nrf54h20dk_nrf54h20_cpuapp.overlay index f90c2051255f..5923e3ab07c8 100644 --- a/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/nrf54h20dk_nrf54h20_cpuapp.overlay +++ b/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/nrf54h20dk_nrf54h20_cpuapp.overlay @@ -4,9 +4,11 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + &comp { main-mode = "SE"; - psel = "AIN2"; /* P1.02 */ + psel = ; /* P1.02 */ refsel = "INT_1V2"; sp-mode = "HIGH"; th-up = <63>; diff --git a/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/nrf54l15dk_nrf54l15_cpuapp.overlay b/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/nrf54l15dk_nrf54l15_cpuapp.overlay index 3a7a8f0ef811..925417d48ab5 100644 --- a/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/nrf54l15dk_nrf54l15_cpuapp.overlay +++ b/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/nrf54l15dk_nrf54l15_cpuapp.overlay @@ -4,9 +4,11 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + &comp { main-mode = "SE"; - psel = "AIN4"; /* P1.11 */ + psel = ; /* P1.11 */ refsel = "INT_1V2"; sp-mode = "HIGH"; th-up = <63>; diff --git a/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/nrf54lm20dk_nrf54lm20a_cpuapp.overlay b/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/nrf54lm20dk_nrf54lm20a_cpuapp.overlay index 2709df531950..623bfd9c45f3 100644 --- a/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/nrf54lm20dk_nrf54lm20a_cpuapp.overlay +++ b/tests/drivers/comparator/gpio_loopback/snippets/nrf_comp/boards/nrf54lm20dk_nrf54lm20a_cpuapp.overlay @@ -4,9 +4,11 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + &comp { main-mode = "SE"; - psel = "AIN1"; /* P1.31 */ + psel = ; /* P1.31 */ refsel = "INT_1V2"; sp-mode = "HIGH"; th-up = <63>; diff --git a/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay b/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay index 58e055a02406..e208b85b2ae9 100644 --- a/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay +++ b/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/bl54l15_dvk_nrf54l15_cpuapp.overlay @@ -5,9 +5,11 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + &comp { compatible = "nordic,nrf-lpcomp"; - psel = "AIN4"; /* P1.11 */ + psel = ; /* P1.11 */ refsel = "VDD_4_8"; status = "okay"; }; diff --git a/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay b/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay index 58e055a02406..e208b85b2ae9 100644 --- a/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay +++ b/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/bl54l15u_dvk_nrf54l15_cpuapp.overlay @@ -5,9 +5,11 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + &comp { compatible = "nordic,nrf-lpcomp"; - psel = "AIN4"; /* P1.11 */ + psel = ; /* P1.11 */ refsel = "VDD_4_8"; status = "okay"; }; diff --git a/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/nrf5340dk_nrf5340_cpuapp.overlay b/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/nrf5340dk_nrf5340_cpuapp.overlay index d35a20dfc223..0c571fa21b8f 100644 --- a/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/nrf5340dk_nrf5340_cpuapp.overlay +++ b/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/nrf5340dk_nrf5340_cpuapp.overlay @@ -4,9 +4,11 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + &comp { compatible = "nordic,nrf-lpcomp"; - psel = "AIN0"; /* P0.04 */ + psel = ; /* P0.04 */ refsel = "VDD_4_8"; status = "okay"; }; diff --git a/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/nrf54h20dk_nrf54h20_cpuapp.overlay b/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/nrf54h20dk_nrf54h20_cpuapp.overlay index 349cd7051f99..66306268a117 100644 --- a/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/nrf54h20dk_nrf54h20_cpuapp.overlay +++ b/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/nrf54h20dk_nrf54h20_cpuapp.overlay @@ -4,9 +4,11 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + &comp { compatible = "nordic,nrf-lpcomp"; - psel = "AIN2"; /* P1.02 */ + psel = ; /* P1.02 */ refsel = "VDD_4_8"; status = "okay"; }; diff --git a/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/nrf54l15dk_nrf54l15_cpuapp.overlay b/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/nrf54l15dk_nrf54l15_cpuapp.overlay index ebb652bdd871..e82d8b98521c 100644 --- a/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/nrf54l15dk_nrf54l15_cpuapp.overlay +++ b/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/nrf54l15dk_nrf54l15_cpuapp.overlay @@ -4,9 +4,11 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + &comp { compatible = "nordic,nrf-lpcomp"; - psel = "AIN4"; /* P1.11 */ + psel = ; /* P1.11 */ refsel = "VDD_4_8"; status = "okay"; }; diff --git a/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/nrf54lm20dk_nrf54lm20a_cpuapp.overlay b/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/nrf54lm20dk_nrf54lm20a_cpuapp.overlay index 0f51a9951a16..db097a9fd6fd 100644 --- a/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/nrf54lm20dk_nrf54lm20a_cpuapp.overlay +++ b/tests/drivers/comparator/gpio_loopback/snippets/nrf_lpcomp/boards/nrf54lm20dk_nrf54lm20a_cpuapp.overlay @@ -4,9 +4,11 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include + &comp { compatible = "nordic,nrf-lpcomp"; - psel = "AIN1"; /* P1.31 */ + psel = ; /* P1.31 */ refsel = "VDD_4_8"; status = "okay"; }; diff --git a/tests/drivers/uart/uart_async_api/boards/nrf54h20dk_nrf54h20_cpuppr_xip.conf b/tests/drivers/uart/uart_async_api/boards/nrf54h20dk_nrf54h20_cpuppr_xip.conf new file mode 100644 index 000000000000..47f481017118 --- /dev/null +++ b/tests/drivers/uart/uart_async_api/boards/nrf54h20dk_nrf54h20_cpuppr_xip.conf @@ -0,0 +1,3 @@ +CONFIG_PM_DEVICE=y +CONFIG_PM_DEVICE_RUNTIME=y +CONFIG_VAR_LENGTH_BUFFER_TEST_BUADRATE_LIMIT=57600 diff --git a/tests/drivers/uart/uart_async_api/boards/nrf54h20dk_nrf54h20_cpuppr_xip.overlay b/tests/drivers/uart/uart_async_api/boards/nrf54h20dk_nrf54h20_cpuppr_xip.overlay new file mode 100644 index 000000000000..f65b4dd3b0ba --- /dev/null +++ b/tests/drivers/uart/uart_async_api/boards/nrf54h20dk_nrf54h20_cpuppr_xip.overlay @@ -0,0 +1,3 @@ +/* SPDX-License-Identifier: Apache-2.0 */ + +#include "nrf54h20dk_nrf54h20_common.dtsi" diff --git a/tests/drivers/uart/uart_mix_fifo_poll/testcase.yaml b/tests/drivers/uart/uart_mix_fifo_poll/testcase.yaml index 0ba5944cca66..d481ed33adcf 100644 --- a/tests/drivers/uart/uart_mix_fifo_poll/testcase.yaml +++ b/tests/drivers/uart/uart_mix_fifo_poll/testcase.yaml @@ -79,7 +79,7 @@ tests: - CONFIG_UART_0_ENHANCED_POLL_OUT=y - CONFIG_UART_0_NRF_HW_ASYNC=y - CONFIG_UART_0_NRF_HW_ASYNC_TIMER=2 - - CONFIG_NRFX_TIMER2=y + - CONFIG_NRFX_TIMER=y platform_allow: - nrf52840dk/nrf52840 - nrf5340dk/nrf5340/cpuapp diff --git a/tests/drivers/uart/uart_pm/testcase.yaml b/tests/drivers/uart/uart_pm/testcase.yaml index 008eae9d3d7f..38da5dca4800 100644 --- a/tests/drivers/uart/uart_pm/testcase.yaml +++ b/tests/drivers/uart/uart_pm/testcase.yaml @@ -78,7 +78,7 @@ tests: - CONFIG_UART_0_ASYNC=y - CONFIG_UART_0_NRF_HW_ASYNC=y - CONFIG_UART_0_NRF_HW_ASYNC_TIMER=2 - - CONFIG_NRFX_TIMER2=y + - CONFIG_NRFX_TIMER=y - CONFIG_UART_0_ENHANCED_POLL_OUT=n drivers.uart.pm.async.enhanced_poll: @@ -88,7 +88,7 @@ tests: - CONFIG_UART_0_ASYNC=y - CONFIG_UART_0_NRF_HW_ASYNC=y - CONFIG_UART_0_NRF_HW_ASYNC_TIMER=2 - - CONFIG_NRFX_TIMER2=y + - CONFIG_NRFX_TIMER=y - CONFIG_UART_0_ENHANCED_POLL_OUT=y platform_exclude: - nrf54h20dk/nrf54h20/cpuapp diff --git a/tests/drivers/watchdog/wdt_basic_api/boards/nrf52840dk_nrf52840_counter.conf b/tests/drivers/watchdog/wdt_basic_api/boards/nrf52840dk_nrf52840_counter.conf index 35a9b2735c6e..6152c1fc8105 100644 --- a/tests/drivers/watchdog/wdt_basic_api/boards/nrf52840dk_nrf52840_counter.conf +++ b/tests/drivers/watchdog/wdt_basic_api/boards/nrf52840dk_nrf52840_counter.conf @@ -1,4 +1,3 @@ # Disable hardware watchdog CONFIG_WDT_NRFX=n -CONFIG_NRFX_WDT0=n CONFIG_ZERO_LATENCY_IRQS=y