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evt: on WB miss with error, set the write event when resp to the core #48

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Nov 19, 2024
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evt: on WB miss with error, set the write event when resp to the core #48

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3 changes: 3 additions & 0 deletions rtl/src/hpdcache_ctrl_pe.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -405,6 +405,9 @@ module hpdcache_ctrl_pe
st1_rtab_commit_o = st1_req_rtab_i;
st1_rsp_valid_o = st1_req_need_rsp_i;
st1_rsp_error_o = st1_req_need_rsp_i;

// Performance event
evt_write_req_o = st1_req_is_store_i;
end

// Allocate a new entry in the replay table in case of conflict with
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