From b44f55da3dac449f03466815ac431474f86fd73f Mon Sep 17 00:00:00 2001 From: Mikhail Goncharov Date: Thu, 19 Dec 2024 10:23:41 -0800 Subject: [PATCH] Integrate LLVM at llvm/llvm-project@59890c13343a Updates LLVM usage to match [59890c13343a](https://github.com/llvm/llvm-project/commit/59890c13343a) PiperOrigin-RevId: 707953794 --- third_party/llvm/generated.patch | 958 ++++++++++++++- third_party/llvm/workspace.bzl | 4 +- third_party/shardy/temporary.patch | 1053 ++++++++++++++++- third_party/shardy/workspace.bzl | 4 +- .../tsl/third_party/llvm/generated.patch | 958 ++++++++++++++- .../tsl/third_party/llvm/workspace.bzl | 4 +- 6 files changed, 2892 insertions(+), 89 deletions(-) diff --git a/third_party/llvm/generated.patch b/third_party/llvm/generated.patch index b1fe52b944f9d..e2db28a1cd5b6 100644 --- a/third_party/llvm/generated.patch +++ b/third_party/llvm/generated.patch @@ -1,28 +1,87 @@ Auto generated patch. Do not edit or delete it, even if empty. -diff -ruN --strip-trailing-cr a/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp b/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp ---- a/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp -+++ b/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp -@@ -654,8 +654,10 @@ - // There is a potential that the model could be adversarial and - // continually evict live ranges over and over again, leading to a - // large amount of compile time being spent in regalloc. If we hit the -- // threshold, prevent the range from being evicted. -- if (IntfCascade >= MaxCascade) -+ // threshold, prevent the range from being evicted. We still let the -+ // range through if it is urgent as we are required to produce an -+ // eviction if the candidate is not spillable. -+ if (IntfCascade >= MaxCascade && !Urgent) - return false; - - // Only evict older cascades or live ranges without a cascade. +diff -ruN --strip-trailing-cr a/clang/test/CodeGen/attr-counted-by.c b/clang/test/CodeGen/attr-counted-by.c +--- a/clang/test/CodeGen/attr-counted-by.c ++++ b/clang/test/CodeGen/attr-counted-by.c +@@ -1043,7 +1043,7 @@ + // NO-SANITIZE-WITH-ATTR-NEXT: call void @llvm.lifetime.start.p0(i64 24, ptr nonnull [[BAZ]]) #[[ATTR11:[0-9]+]] + // NO-SANITIZE-WITH-ATTR-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(24) [[BAZ]], ptr noundef nonnull align 4 dereferenceable(24) @test12_bar, i64 24, i1 false), !tbaa.struct [[TBAA_STRUCT7:![0-9]+]] + // NO-SANITIZE-WITH-ATTR-NEXT: [[IDXPROM:%.*]] = sext i32 [[INDEX]] to i64 +-// NO-SANITIZE-WITH-ATTR-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [6 x i32], ptr [[BAZ]], i64 0, i64 [[IDXPROM]] ++// NO-SANITIZE-WITH-ATTR-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [6 x i32], ptr [[BAZ]], i64 0, i64 [[IDXPROM]] + // NO-SANITIZE-WITH-ATTR-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !tbaa [[TBAA2]] + // NO-SANITIZE-WITH-ATTR-NEXT: store i32 [[TMP0]], ptr @test12_b, align 4, !tbaa [[TBAA2]] + // NO-SANITIZE-WITH-ATTR-NEXT: [[TMP1:%.*]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @test12_foo, i64 4), align 4, !tbaa [[TBAA2]] +@@ -1085,7 +1085,7 @@ + // NO-SANITIZE-WITHOUT-ATTR-NEXT: call void @llvm.lifetime.start.p0(i64 24, ptr nonnull [[BAZ]]) #[[ATTR9:[0-9]+]] + // NO-SANITIZE-WITHOUT-ATTR-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(24) [[BAZ]], ptr noundef nonnull align 4 dereferenceable(24) @test12_bar, i64 24, i1 false), !tbaa.struct [[TBAA_STRUCT7:![0-9]+]] + // NO-SANITIZE-WITHOUT-ATTR-NEXT: [[IDXPROM:%.*]] = sext i32 [[INDEX]] to i64 +-// NO-SANITIZE-WITHOUT-ATTR-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [6 x i32], ptr [[BAZ]], i64 0, i64 [[IDXPROM]] ++// NO-SANITIZE-WITHOUT-ATTR-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [6 x i32], ptr [[BAZ]], i64 0, i64 [[IDXPROM]] + // NO-SANITIZE-WITHOUT-ATTR-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !tbaa [[TBAA2]] + // NO-SANITIZE-WITHOUT-ATTR-NEXT: store i32 [[TMP0]], ptr @test12_b, align 4, !tbaa [[TBAA2]] + // NO-SANITIZE-WITHOUT-ATTR-NEXT: [[TMP1:%.*]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @test12_foo, i64 4), align 4, !tbaa [[TBAA2]] +diff -ruN --strip-trailing-cr a/clang/test/CodeGen/union-tbaa1.c b/clang/test/CodeGen/union-tbaa1.c +--- a/clang/test/CodeGen/union-tbaa1.c ++++ b/clang/test/CodeGen/union-tbaa1.c +@@ -16,17 +16,17 @@ + // CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARR]], i32 [[TMP0]] + // CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !tbaa [[TBAA2]] + // CHECK-NEXT: [[MUL:%.*]] = mul i32 [[TMP1]], [[NUM]] +-// CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds nuw [4 x [2 x %union.vect32]], ptr [[TMP]], i32 0, i32 [[TMP0]] ++// CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x [2 x %union.vect32]], ptr [[TMP]], i32 0, i32 [[TMP0]] + // CHECK-NEXT: store i32 [[MUL]], ptr [[ARRAYIDX2]], align 8, !tbaa [[TBAA6:![0-9]+]] + // CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARR]], i32 [[TMP0]], i32 1 + // CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX5]], align 4, !tbaa [[TBAA2]] + // CHECK-NEXT: [[MUL6:%.*]] = mul i32 [[TMP2]], [[NUM]] +-// CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds nuw [4 x [2 x %union.vect32]], ptr [[TMP]], i32 0, i32 [[TMP0]], i32 1 ++// CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [4 x [2 x %union.vect32]], ptr [[TMP]], i32 0, i32 [[TMP0]], i32 1 + // CHECK-NEXT: store i32 [[MUL6]], ptr [[ARRAYIDX8]], align 4, !tbaa [[TBAA6]] + // CHECK-NEXT: [[TMP3:%.*]] = lshr i32 [[MUL]], 16 + // CHECK-NEXT: store i32 [[TMP3]], ptr [[VEC]], align 4, !tbaa [[TBAA2]] + // CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[INDEX]], align 4, !tbaa [[TBAA2]] +-// CHECK-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds nuw [4 x [2 x %union.vect32]], ptr [[TMP]], i32 0, i32 [[TMP4]], i32 1 ++// CHECK-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [4 x [2 x %union.vect32]], ptr [[TMP]], i32 0, i32 [[TMP4]], i32 1 + // CHECK-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds nuw i8, ptr [[ARRAYIDX14]], i32 2 + // CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[ARRAYIDX15]], align 2, !tbaa [[TBAA6]] + // CHECK-NEXT: [[CONV16:%.*]] = zext i16 [[TMP5]] to i32 +diff -ruN --strip-trailing-cr a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp +--- a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp ++++ b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp +@@ -3131,26 +3131,6 @@ + } + } + +- // The single (non-zero) index of an inbounds GEP of a base object cannot +- // be negative. +- auto HasOneNonZeroIndex = [&]() { +- bool FoundNonZero = false; +- for (Value *Idx : GEP.indices()) { +- auto *C = dyn_cast(Idx); +- if (C && C->isNullValue()) +- continue; +- if (FoundNonZero) +- return false; +- FoundNonZero = true; +- } +- return true; +- }; +- if (GEP.isInBounds() && !GEP.hasNoUnsignedWrap() && isBaseOfObject(PtrOp) && +- HasOneNonZeroIndex()) { +- GEP.setNoWrapFlags(GEP.getNoWrapFlags() | GEPNoWrapFlags::noUnsignedWrap()); +- return &GEP; +- } +- + // nusw + nneg -> nuw + if (GEP.hasNoUnsignedSignedWrap() && !GEP.hasNoUnsignedWrap() && + all_of(GEP.indices(), [&](Value *Idx) { diff -ruN --strip-trailing-cr a/llvm/test/CodeGen/NVPTX/nvcl-param-align.ll b/llvm/test/CodeGen/NVPTX/nvcl-param-align.ll --- a/llvm/test/CodeGen/NVPTX/nvcl-param-align.ll +++ b/llvm/test/CodeGen/NVPTX/nvcl-param-align.ll @@ -1,5 +1,5 @@ --; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 | FileCheck %s --; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 | %ptxas-verify %} -+; RUN: llc < %s -mtriple=nvptx64-nvidia-nvcl -mcpu=sm_20 | FileCheck %s -+; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64-nvidia-nvcl -mcpu=sm_20 | %ptxas-verify %} +-; RUN: llc < %s -mtriple=nvptx64-nvidia-nvcl -mcpu=sm_20 | FileCheck %s +-; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64-nvidia-nvcl -mcpu=sm_20 | %ptxas-verify %} ++; RUN: llc < %s -mtriple=nvptx64-nvidia-nvcl -mcpu=sm_60 | FileCheck %s ++; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64-nvidia-nvcl -mcpu=sm_60 | %ptxas-verify %} target triple = "nvptx-unknown-nvcl" @@ -36,3 +95,862 @@ diff -ruN --strip-trailing-cr a/llvm/test/CodeGen/NVPTX/surf-write.ll b/llvm/tes target triple = "nvptx-unknown-nvcl" +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll b/llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll +--- a/llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll ++++ b/llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll +@@ -53,7 +53,7 @@ + ; CHECK-LABEL: @memcpy_constant_arg_ptr_to_alloca_load_atomic( + ; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [32 x i64], align 8, addrspace(5) + ; CHECK-NEXT: call void @llvm.memcpy.p5.p4.i64(ptr addrspace(5) noundef align 8 dereferenceable(256) [[ALLOCA]], ptr addrspace(4) noundef align 8 dereferenceable(256) [[ARG:%.*]], i64 256, i1 false) +-; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds nuw [32 x i64], ptr addrspace(5) [[ALLOCA]], i32 0, i32 [[IDX:%.*]] ++; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [32 x i64], ptr addrspace(5) [[ALLOCA]], i32 0, i32 [[IDX:%.*]] + ; CHECK-NEXT: [[LOAD:%.*]] = load atomic i64, ptr addrspace(5) [[GEP]] syncscope("somescope") acquire, align 8 + ; CHECK-NEXT: ret i64 [[LOAD]] + ; +@@ -101,7 +101,7 @@ + ; CHECK-LABEL: @memcpy_constant_byref_arg_ptr_to_alloca_too_many_bytes( + ; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [32 x i8], align 4, addrspace(5) + ; CHECK-NEXT: call void @llvm.memcpy.p5.p4.i64(ptr addrspace(5) noundef align 4 dereferenceable(31) [[ALLOCA]], ptr addrspace(4) noundef align 4 dereferenceable(31) [[ARG:%.*]], i64 31, i1 false) +-; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds nuw [32 x i8], ptr addrspace(5) [[ALLOCA]], i32 0, i32 [[IDX:%.*]] ++; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [32 x i8], ptr addrspace(5) [[ALLOCA]], i32 0, i32 [[IDX:%.*]] + ; CHECK-NEXT: [[LOAD:%.*]] = load i8, ptr addrspace(5) [[GEP]], align 1 + ; CHECK-NEXT: store i8 [[LOAD]], ptr addrspace(1) [[OUT:%.*]], align 1 + ; CHECK-NEXT: ret void +@@ -120,7 +120,7 @@ + ; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [32 x i8], align 4, addrspace(5) + ; CHECK-NEXT: [[KERNARG_SEGMENT_PTR:%.*]] = call align 16 dereferenceable(32) ptr addrspace(4) @llvm.amdgcn.kernarg.segment.ptr() + ; CHECK-NEXT: call void @llvm.memcpy.p5.p4.i64(ptr addrspace(5) noundef align 4 dereferenceable(32) [[ALLOCA]], ptr addrspace(4) noundef align 16 dereferenceable(32) [[KERNARG_SEGMENT_PTR]], i64 32, i1 false) +-; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds nuw [32 x i8], ptr addrspace(5) [[ALLOCA]], i32 0, i32 [[IDX:%.*]] ++; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [32 x i8], ptr addrspace(5) [[ALLOCA]], i32 0, i32 [[IDX:%.*]] + ; CHECK-NEXT: [[LOAD:%.*]] = load i8, ptr addrspace(5) [[GEP]], align 1 + ; CHECK-NEXT: store i8 [[LOAD]], ptr addrspace(1) [[OUT:%.*]], align 1 + ; CHECK-NEXT: ret void +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/cast_phi.ll b/llvm/test/Transforms/InstCombine/cast_phi.ll +--- a/llvm/test/Transforms/InstCombine/cast_phi.ll ++++ b/llvm/test/Transforms/InstCombine/cast_phi.ll +@@ -31,8 +31,8 @@ + ; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i32 [[I12_06]], [[BASE:%.*]] + ; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[I12_06]], 1 + ; CHECK-NEXT: [[CONV_I9:%.*]] = sext i32 [[ADD]] to i64 +-; CHECK-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds nuw [258 x float], ptr [[CALLA]], i64 0, i64 [[CONV_I9]] +-; CHECK-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds nuw [258 x float], ptr [[CALLB]], i64 0, i64 [[CONV_I9]] ++; CHECK-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds [258 x float], ptr [[CALLA]], i64 0, i64 [[CONV_I9]] ++; CHECK-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds [258 x float], ptr [[CALLB]], i64 0, i64 [[CONV_I9]] + ; CHECK-NEXT: [[CMP40:%.*]] = icmp ult i32 [[I12_06]], [[BASE]] + ; CHECK-NEXT: br i1 [[TMP3]], label [[DOTBB4:%.*]], label [[DOTBB5:%.*]] + ; CHECK: .bb4: +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/load-cmp.ll b/llvm/test/Transforms/InstCombine/load-cmp.ll +--- a/llvm/test/Transforms/InstCombine/load-cmp.ll ++++ b/llvm/test/Transforms/InstCombine/load-cmp.ll +@@ -339,7 +339,7 @@ + define i1 @pr93017(i64 %idx) { + ; CHECK-LABEL: @pr93017( + ; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[IDX:%.*]] to i32 +-; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds nuw [2 x ptr], ptr @table, i32 0, i32 [[TMP1]] ++; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [2 x ptr], ptr @table, i32 0, i32 [[TMP1]] + ; CHECK-NEXT: [[V:%.*]] = load ptr, ptr [[GEP]], align 4 + ; CHECK-NEXT: [[CMP:%.*]] = icmp ne ptr [[V]], null + ; CHECK-NEXT: ret i1 [[CMP]] +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/memcpy-addrspace.ll b/llvm/test/Transforms/InstCombine/memcpy-addrspace.ll +--- a/llvm/test/Transforms/InstCombine/memcpy-addrspace.ll ++++ b/llvm/test/Transforms/InstCombine/memcpy-addrspace.ll +@@ -6,7 +6,7 @@ + define void @test_load(ptr addrspace(1) %out, i64 %x) { + ; CHECK-LABEL: @test_load( + ; CHECK-NEXT: entry: +-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [8 x i32], ptr addrspace(2) @test.data, i64 0, i64 [[X:%.*]] ++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [8 x i32], ptr addrspace(2) @test.data, i64 0, i64 [[X:%.*]] + ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr addrspace(2) [[ARRAYIDX]], align 4 + ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] + ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 +@@ -45,7 +45,7 @@ + define void @test_load_bitcast_chain(ptr addrspace(1) %out, i64 %x) { + ; CHECK-LABEL: @test_load_bitcast_chain( + ; CHECK-NEXT: entry: +-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(2) @test.data, i64 [[X:%.*]] ++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr addrspace(2) @test.data, i64 [[X:%.*]] + ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr addrspace(2) [[ARRAYIDX]], align 4 + ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] + ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 +@@ -66,7 +66,7 @@ + ; CHECK-NEXT: entry: + ; CHECK-NEXT: [[DATA:%.*]] = alloca [8 x i32], align 4 + ; CHECK-NEXT: call void @llvm.memcpy.p0.p2.i64(ptr noundef nonnull align 4 dereferenceable(32) [[DATA]], ptr addrspace(2) noundef align 4 dereferenceable(32) @test.data, i64 32, i1 false) +-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] ++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] + ; CHECK-NEXT: [[TMP0:%.*]] = call i32 @foo(ptr nonnull [[ARRAYIDX]]) + ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] + ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 +@@ -87,8 +87,8 @@ + ; CHECK-NEXT: entry: + ; CHECK-NEXT: [[DATA:%.*]] = alloca [8 x i32], align 4 + ; CHECK-NEXT: call void @llvm.memcpy.p0.p2.i64(ptr noundef nonnull align 4 dereferenceable(32) [[DATA]], ptr addrspace(2) noundef align 4 dereferenceable(32) @test.data, i64 32, i1 false) +-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] +-; CHECK-NEXT: [[TMP0:%.*]] = call i32 @foo(ptr nonnull [[ARRAYIDX]]) ++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] ++; CHECK-NEXT: [[TMP0:%.*]] = call i32 @foo(ptr [[ARRAYIDX]]) + ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] + ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 + ; CHECK-NEXT: ret void +@@ -108,7 +108,7 @@ + ; CHECK-NEXT: entry: + ; CHECK-NEXT: [[DATA:%.*]] = alloca [8 x i32], align 4 + ; CHECK-NEXT: call void @llvm.memcpy.p0.p2.i64(ptr noundef nonnull align 4 dereferenceable(32) [[DATA]], ptr addrspace(2) noundef align 4 dereferenceable(32) @test.data, i64 32, i1 false) +-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] ++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] + ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 + ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] + ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 +@@ -135,11 +135,11 @@ + ; CHECK-NEXT: entry: + ; CHECK-NEXT: [[DATA:%.*]] = alloca [8 x i32], align 4 + ; CHECK-NEXT: call void @llvm.memcpy.p0.p2.i64(ptr noundef nonnull align 4 dereferenceable(32) [[DATA]], ptr addrspace(2) noundef align 4 dereferenceable(32) @test.data, i64 32, i1 false) +-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] ++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] + ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 + ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] + ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 +-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @foo(ptr nonnull [[ARRAYIDX]]) ++; CHECK-NEXT: [[TMP1:%.*]] = call i32 @foo(ptr [[ARRAYIDX]]) + ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT]], i64 [[Y:%.*]] + ; CHECK-NEXT: store i32 [[TMP1]], ptr addrspace(1) [[ARRAYIDX2]], align 4 + ; CHECK-NEXT: ret void +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/memcpy-from-global.ll b/llvm/test/Transforms/InstCombine/memcpy-from-global.ll +--- a/llvm/test/Transforms/InstCombine/memcpy-from-global.ll ++++ b/llvm/test/Transforms/InstCombine/memcpy-from-global.ll +@@ -322,7 +322,7 @@ + ; CHECK-NEXT: [[A:%.*]] = alloca [4 x float], align 4 + ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[A]]) + ; CHECK-NEXT: call void @llvm.memcpy.p0.p1.i64(ptr align 4 [[A]], ptr addrspace(1) align 4 @I, i64 16, i1 true) +-; CHECK-NEXT: [[G:%.*]] = getelementptr inbounds nuw [4 x float], ptr [[A]], i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[G:%.*]] = getelementptr inbounds [4 x float], ptr [[A]], i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[R:%.*]] = load float, ptr [[G]], align 4 + ; CHECK-NEXT: ret float [[R]] + ; +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/stpcpy-1.ll b/llvm/test/Transforms/InstCombine/stpcpy-1.ll +--- a/llvm/test/Transforms/InstCombine/stpcpy-1.ll ++++ b/llvm/test/Transforms/InstCombine/stpcpy-1.ll +@@ -25,7 +25,7 @@ + define ptr @test_simplify2() { + ; CHECK-LABEL: @test_simplify2( + ; CHECK-NEXT: [[STRLEN:%.*]] = call i32 @strlen(ptr noundef nonnull dereferenceable(1) @a) +-; CHECK-NEXT: [[RET:%.*]] = getelementptr inbounds nuw i8, ptr @a, i32 [[STRLEN]] ++; CHECK-NEXT: [[RET:%.*]] = getelementptr inbounds i8, ptr @a, i32 [[STRLEN]] + ; CHECK-NEXT: ret ptr [[RET]] + ; + %ret = call ptr @stpcpy(ptr @a, ptr @a) +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/stpcpy_chk-1.ll b/llvm/test/Transforms/InstCombine/stpcpy_chk-1.ll +--- a/llvm/test/Transforms/InstCombine/stpcpy_chk-1.ll ++++ b/llvm/test/Transforms/InstCombine/stpcpy_chk-1.ll +@@ -93,7 +93,7 @@ + define ptr @test_simplify6() { + ; CHECK-LABEL: @test_simplify6( + ; CHECK-NEXT: [[STRLEN:%.*]] = call i32 @strlen(ptr noundef nonnull dereferenceable(1) @a) +-; CHECK-NEXT: [[RET:%.*]] = getelementptr inbounds nuw i8, ptr @a, i32 [[STRLEN]] ++; CHECK-NEXT: [[RET:%.*]] = getelementptr inbounds i8, ptr @a, i32 [[STRLEN]] + ; CHECK-NEXT: ret ptr [[RET]] + ; + +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/strlen-1.ll b/llvm/test/Transforms/InstCombine/strlen-1.ll +--- a/llvm/test/Transforms/InstCombine/strlen-1.ll ++++ b/llvm/test/Transforms/InstCombine/strlen-1.ll +@@ -155,7 +155,7 @@ + + define i32 @test_no_simplify2(i32 %x) { + ; CHECK-LABEL: @test_no_simplify2( +-; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw [7 x i8], ptr @null_hello, i32 0, i32 [[X:%.*]] ++; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds [7 x i8], ptr @null_hello, i32 0, i32 [[X:%.*]] + ; CHECK-NEXT: [[HELLO_L:%.*]] = call i32 @strlen(ptr noundef nonnull dereferenceable(1) [[HELLO_P]]) + ; CHECK-NEXT: ret i32 [[HELLO_L]] + ; +@@ -166,8 +166,8 @@ + + define i32 @test_no_simplify2_no_null_opt(i32 %x) #0 { + ; CHECK-LABEL: @test_no_simplify2_no_null_opt( +-; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw [7 x i8], ptr @null_hello, i32 0, i32 [[X:%.*]] +-; CHECK-NEXT: [[HELLO_L:%.*]] = call i32 @strlen(ptr noundef nonnull dereferenceable(1) [[HELLO_P]]) ++; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds [7 x i8], ptr @null_hello, i32 0, i32 [[X:%.*]] ++; CHECK-NEXT: [[HELLO_L:%.*]] = call i32 @strlen(ptr noundef [[HELLO_P]]) + ; CHECK-NEXT: ret i32 [[HELLO_L]] + ; + %hello_p = getelementptr inbounds [7 x i8], ptr @null_hello, i32 0, i32 %x +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/strlen-4.ll b/llvm/test/Transforms/InstCombine/strlen-4.ll +--- a/llvm/test/Transforms/InstCombine/strlen-4.ll ++++ b/llvm/test/Transforms/InstCombine/strlen-4.ll +@@ -18,7 +18,7 @@ + + define i64 @fold_strlen_s3_pi_s5(i1 %X, i64 %I) { + ; CHECK-LABEL: @fold_strlen_s3_pi_s5( +-; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], ptr [[PS3_PI]], ptr @s5 + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +@@ -40,7 +40,7 @@ + ; XFAIL-CHECK-NEXT: [[SEL:%.*]] = select i1 %0, i64 [[DIF_I]], i64 5 + ; XFAIL-CHECK-NEXT: ret i64 [[SEL]] + ; CHECK-LABEL: @fold_strlen_s3_pi_p1_s5( +-; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[TMP1:%.*]] ++; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[TMP1:%.*]] + ; CHECK-NEXT: [[PS3_PI_P1:%.*]] = getelementptr i8, ptr [[PS3_PI]], i64 1 + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS3_PI_P1]], ptr @s5 + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) +@@ -61,7 +61,7 @@ + + define i64 @call_strlen_s5_3_pi_s5(i1 %0, i64 %1) { + ; CHECK-LABEL: @call_strlen_s5_3_pi_s5( +-; CHECK-NEXT: [[PS5_3_PI:%.*]] = getelementptr inbounds nuw [10 x i8], ptr @s5_3, i64 0, i64 [[TMP1:%.*]] ++; CHECK-NEXT: [[PS5_3_PI:%.*]] = getelementptr inbounds [10 x i8], ptr @s5_3, i64 0, i64 [[TMP1:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS5_3_PI]], ptr @s5 + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +@@ -78,7 +78,7 @@ + + define i64 @call_strlen_s5_3_s5_pj(i1 %X, i64 %J) { + ; CHECK-LABEL: @call_strlen_s5_3_s5_pj( +-; CHECK-NEXT: [[PS5:%.*]] = getelementptr inbounds nuw [6 x i8], ptr @s5, i64 0, i64 [[J:%.*]] ++; CHECK-NEXT: [[PS5:%.*]] = getelementptr inbounds [6 x i8], ptr @s5, i64 0, i64 [[J:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], ptr @s5_3, ptr [[PS5]] + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +@@ -95,7 +95,7 @@ + + define i64 @fold_strlen_s3_s5_pj(i1 %X, i64 %J) { + ; CHECK-LABEL: @fold_strlen_s3_s5_pj( +-; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds nuw [6 x i8], ptr @s5, i64 0, i64 [[J:%.*]] ++; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds [6 x i8], ptr @s5, i64 0, i64 [[J:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], ptr @s3, ptr [[PS5_PJ]] + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +@@ -114,7 +114,7 @@ + + define i64 @call_strlen_s3_s5_3_pj(i1 %0, i64 %1) { + ; CHECK-LABEL: @call_strlen_s3_s5_3_pj( +-; CHECK-NEXT: [[PS5_3_PJ:%.*]] = getelementptr inbounds nuw [10 x i8], ptr @s5_3, i64 0, i64 [[TMP1:%.*]] ++; CHECK-NEXT: [[PS5_3_PJ:%.*]] = getelementptr inbounds [10 x i8], ptr @s5_3, i64 0, i64 [[TMP1:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr @s3, ptr [[PS5_3_PJ]] + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +@@ -131,8 +131,8 @@ + + define i64 @fold_strlen_s3_pi_s5_pj(i1 %X, i64 %I, i64 %J) { + ; CHECK-LABEL: @fold_strlen_s3_pi_s5_pj( +-; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] +-; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds nuw [6 x i8], ptr @s5, i64 0, i64 [[J:%.*]] ++; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds [6 x i8], ptr @s5, i64 0, i64 [[J:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], ptr [[PS3_PI]], ptr [[PS5_PJ]] + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/strncat-2.ll b/llvm/test/Transforms/InstCombine/strncat-2.ll +--- a/llvm/test/Transforms/InstCombine/strncat-2.ll ++++ b/llvm/test/Transforms/InstCombine/strncat-2.ll +@@ -13,7 +13,7 @@ + define void @test_simplify1() { + ; CHECK-LABEL: @test_simplify1( + ; CHECK-NEXT: [[STRLEN:%.*]] = call i32 @strlen(ptr noundef nonnull dereferenceable(1) @a) +-; CHECK-NEXT: [[ENDPTR:%.*]] = getelementptr inbounds nuw i8, ptr @a, i32 [[STRLEN]] ++; CHECK-NEXT: [[ENDPTR:%.*]] = getelementptr inbounds i8, ptr @a, i32 [[STRLEN]] + ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr noundef nonnull align 1 dereferenceable(6) [[ENDPTR]], ptr noundef nonnull align 1 dereferenceable(6) @hello, i32 6, i1 false) + ; CHECK-NEXT: ret void + ; +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/strnlen-3.ll b/llvm/test/Transforms/InstCombine/strnlen-3.ll +--- a/llvm/test/Transforms/InstCombine/strnlen-3.ll ++++ b/llvm/test/Transforms/InstCombine/strnlen-3.ll +@@ -31,7 +31,7 @@ + + define i64 @call_strnlen_sx_pi_n(i64 %i, i64 %n) { + ; CHECK-LABEL: @call_strnlen_sx_pi_n( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [0 x i8], ptr @sx, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [0 x i8], ptr @sx, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[PTR]], i64 [[N:%.*]]) + ; CHECK-NEXT: ret i64 [[LEN]] + ; +@@ -46,7 +46,7 @@ + + define i64 @call_strnlen_a3_pi_2(i64 %i) { + ; CHECK-LABEL: @call_strnlen_a3_pi_2( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [3 x i8], ptr @a3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [3 x i8], ptr @a3, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 2) + ; CHECK-NEXT: ret i64 [[LEN]] + ; +@@ -61,7 +61,7 @@ + + define i64 @call_strnlen_a3_pi_3(i64 %i) { + ; CHECK-LABEL: @call_strnlen_a3_pi_3( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [3 x i8], ptr @a3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [3 x i8], ptr @a3, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 3) + ; CHECK-NEXT: ret i64 [[LEN]] + ; +@@ -111,7 +111,7 @@ + + define i64 @call_strnlen_s5_3_pi_n(i64 zeroext %i, i64 %n) { + ; CHECK-LABEL: @call_strnlen_s5_3_pi_n( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [10 x i8], ptr @s5_3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [10 x i8], ptr @s5_3, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[PTR]], i64 [[N:%.*]]) + ; CHECK-NEXT: ret i64 [[LEN]] + ; +@@ -151,7 +151,7 @@ + + define i64 @fold_strnlen_a3_pi_2(i64 %i) { + ; CHECK-LABEL: @fold_strnlen_a3_pi_2( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [3 x i8], ptr @a3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [3 x i8], ptr @a3, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 2) + ; CHECK-NEXT: ret i64 [[LEN]] + ; +@@ -166,7 +166,7 @@ + + define i64 @fold_strnlen_s3_pi_2(i64 %i) { + ; CHECK-LABEL: @fold_strnlen_s3_pi_2( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 2) + ; CHECK-NEXT: ret i64 [[LEN]] + ; +@@ -181,7 +181,7 @@ + + define i64 @fold_strnlen_s3_pi_3(i64 %i) { + ; CHECK-LABEL: @fold_strnlen_s3_pi_3( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 3) + ; CHECK-NEXT: ret i64 [[LEN]] + ; +@@ -196,7 +196,7 @@ + + define i64 @fold_strnlen_s3_pi_n(i64 %i, i64 %n) { + ; CHECK-LABEL: @fold_strnlen_s3_pi_n( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[PTR]], i64 [[N:%.*]]) + ; CHECK-NEXT: ret i64 [[LEN]] + ; +@@ -212,7 +212,7 @@ + + define i64 @call_strnlen_s5_3_pi_2(i64 %i) { + ; CHECK-LABEL: @call_strnlen_s5_3_pi_2( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [10 x i8], ptr @s5_3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [10 x i8], ptr @s5_3, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 2) + ; CHECK-NEXT: ret i64 [[LEN]] + ; +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/strnlen-4.ll b/llvm/test/Transforms/InstCombine/strnlen-4.ll +--- a/llvm/test/Transforms/InstCombine/strnlen-4.ll ++++ b/llvm/test/Transforms/InstCombine/strnlen-4.ll +@@ -17,7 +17,7 @@ + + define i64 @fold_strnlen_s3_pi_s5_n(i1 %C, i64 %i, i64 %n) { + ; CHECK-LABEL: @fold_strnlen_s3_pi_s5_n( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[C:%.*]], ptr [[PTR]], ptr @s5 + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[SEL]], i64 [[N:%.*]]) + ; CHECK-NEXT: ret i64 [[LEN]] +@@ -57,7 +57,7 @@ + + define i64 @call_strnlen_s3_pi_sx_n(i1 %C, i64 %i, i64 %n) { + ; CHECK-LABEL: @call_strnlen_s3_pi_sx_n( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[C:%.*]], ptr [[PTR]], ptr @sx + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[SEL]], i64 [[N:%.*]]) + ; CHECK-NEXT: ret i64 [[LEN]] +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/strnlen-5.ll b/llvm/test/Transforms/InstCombine/strnlen-5.ll +--- a/llvm/test/Transforms/InstCombine/strnlen-5.ll ++++ b/llvm/test/Transforms/InstCombine/strnlen-5.ll +@@ -164,7 +164,7 @@ + + define i1 @fold_strnlen_a5_pi_nz_eqz(i64 %i, i64 %n) { + ; CHECK-LABEL: @fold_strnlen_a5_pi_nz_eqz( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [5 x i8], ptr @a5, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [5 x i8], ptr @a5, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[CHAR0:%.*]] = load i8, ptr [[PTR]], align 1 + ; CHECK-NEXT: [[EQZ:%.*]] = icmp eq i8 [[CHAR0]], 0 + ; CHECK-NEXT: ret i1 [[EQZ]] +@@ -200,7 +200,7 @@ + + define i1 @call_strnlen_s5_pi_n_eqz(i64 %i, i64 %n) { + ; CHECK-LABEL: @call_strnlen_s5_pi_n_eqz( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [6 x i8], ptr @s5, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [6 x i8], ptr @s5, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[PTR]], i64 [[N:%.*]]) + ; CHECK-NEXT: [[EQZ:%.*]] = icmp eq i64 [[LEN]], 0 + ; CHECK-NEXT: ret i1 [[EQZ]] +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/sub-gep.ll b/llvm/test/Transforms/InstCombine/sub-gep.ll +--- a/llvm/test/Transforms/InstCombine/sub-gep.ll ++++ b/llvm/test/Transforms/InstCombine/sub-gep.ll +@@ -305,7 +305,7 @@ + + define i64 @test24b(ptr %P, i64 %A){ + ; CHECK-LABEL: @test24b( +-; CHECK-NEXT: [[B_IDX:%.*]] = shl nuw nsw i64 [[A:%.*]], 1 ++; CHECK-NEXT: [[B_IDX:%.*]] = shl nsw i64 [[A:%.*]], 1 + ; CHECK-NEXT: ret i64 [[B_IDX]] + ; + %B = getelementptr inbounds [42 x i16], ptr @Arr, i64 0, i64 %A +@@ -316,7 +316,7 @@ + + define i64 @test25(ptr %P, i64 %A){ + ; CHECK-LABEL: @test25( +-; CHECK-NEXT: [[B_IDX:%.*]] = shl nuw nsw i64 [[A:%.*]], 1 ++; CHECK-NEXT: [[B_IDX:%.*]] = shl nsw i64 [[A:%.*]], 1 + ; CHECK-NEXT: [[GEPDIFF:%.*]] = add nsw i64 [[B_IDX]], -84 + ; CHECK-NEXT: ret i64 [[GEPDIFF]] + ; +@@ -395,7 +395,7 @@ + define i16 @test25_as1(ptr addrspace(1) %P, i64 %A) { + ; CHECK-LABEL: @test25_as1( + ; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[A:%.*]] to i16 +-; CHECK-NEXT: [[B_IDX:%.*]] = shl nuw nsw i16 [[TMP1]], 1 ++; CHECK-NEXT: [[B_IDX:%.*]] = shl nsw i16 [[TMP1]], 1 + ; CHECK-NEXT: [[GEPDIFF:%.*]] = add nsw i16 [[B_IDX]], -84 + ; CHECK-NEXT: ret i16 [[GEPDIFF]] + ; +@@ -409,7 +409,7 @@ + + define i64 @ptrtoint_sub_zext_ptrtoint_as2_inbounds(i32 %offset) { + ; CHECK-LABEL: @ptrtoint_sub_zext_ptrtoint_as2_inbounds( +-; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds nuw bfloat, ptr addrspace(2) @Arr_as2, i32 [[OFFSET:%.*]] ++; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds bfloat, ptr addrspace(2) @Arr_as2, i32 [[OFFSET:%.*]] + ; CHECK-NEXT: [[B:%.*]] = ptrtoint ptr addrspace(2) [[A]] to i32 + ; CHECK-NEXT: [[C:%.*]] = zext i32 [[B]] to i64 + ; CHECK-NEXT: [[D:%.*]] = sub nsw i64 ptrtoint (ptr addrspace(2) @Arr_as2 to i64), [[C]] +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/wcslen-1.ll b/llvm/test/Transforms/InstCombine/wcslen-1.ll +--- a/llvm/test/Transforms/InstCombine/wcslen-1.ll ++++ b/llvm/test/Transforms/InstCombine/wcslen-1.ll +@@ -149,7 +149,7 @@ + define i64 @test_no_simplify2(i32 %x) { + ; CHECK-LABEL: @test_no_simplify2( + ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[X:%.*]] to i64 +-; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw [7 x i32], ptr @null_hello, i64 0, i64 [[TMP1]] ++; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds [7 x i32], ptr @null_hello, i64 0, i64 [[TMP1]] + ; CHECK-NEXT: [[HELLO_L:%.*]] = call i64 @wcslen(ptr nonnull [[HELLO_P]]) + ; CHECK-NEXT: ret i64 [[HELLO_L]] + ; +@@ -161,8 +161,8 @@ + define i64 @test_no_simplify2_no_null_opt(i32 %x) #0 { + ; CHECK-LABEL: @test_no_simplify2_no_null_opt( + ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[X:%.*]] to i64 +-; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw [7 x i32], ptr @null_hello, i64 0, i64 [[TMP1]] +-; CHECK-NEXT: [[HELLO_L:%.*]] = call i64 @wcslen(ptr nonnull [[HELLO_P]]) ++; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds [7 x i32], ptr @null_hello, i64 0, i64 [[TMP1]] ++; CHECK-NEXT: [[HELLO_L:%.*]] = call i64 @wcslen(ptr [[HELLO_P]]) + ; CHECK-NEXT: ret i64 [[HELLO_L]] + ; + %hello_p = getelementptr inbounds [7 x i32], ptr @null_hello, i32 0, i32 %x +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/wcslen-3.ll b/llvm/test/Transforms/InstCombine/wcslen-3.ll +--- a/llvm/test/Transforms/InstCombine/wcslen-3.ll ++++ b/llvm/test/Transforms/InstCombine/wcslen-3.ll +@@ -150,7 +150,7 @@ + define i64 @test_no_simplify2(i16 %x) { + ; CHECK-LABEL: @test_no_simplify2( + ; CHECK-NEXT: [[TMP1:%.*]] = sext i16 [[X:%.*]] to i64 +-; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw [7 x i16], ptr @null_hello, i64 0, i64 [[TMP1]] ++; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds [7 x i16], ptr @null_hello, i64 0, i64 [[TMP1]] + ; CHECK-NEXT: [[HELLO_L:%.*]] = call i64 @wcslen(ptr nonnull [[HELLO_P]]) + ; CHECK-NEXT: ret i64 [[HELLO_L]] + ; +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/wcslen-5.ll b/llvm/test/Transforms/InstCombine/wcslen-5.ll +--- a/llvm/test/Transforms/InstCombine/wcslen-5.ll ++++ b/llvm/test/Transforms/InstCombine/wcslen-5.ll +@@ -19,7 +19,7 @@ + + define dso_local i64 @fold_wcslen_s3_pi_s5(i1 zeroext %0, i64 %1) { + ; CHECK-LABEL: @fold_wcslen_s3_pi_s5( +-; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds nuw [4 x i32], ptr @ws3, i64 0, i64 [[TMP1:%.*]] ++; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i32], ptr @ws3, i64 0, i64 [[TMP1:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS3_PI]], ptr @ws5 + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +@@ -41,7 +41,7 @@ + ; XFAIL-CHECK-NEXT: [[SEL:%.*]] = select i1 %0, i64 [[DIF_I]], i64 5 + ; XFAIL-CHECK-NEXT: ret i64 [[SEL]] + ; CHECK-LABEL: @fold_wcslen_s3_pi_p1_s5( +-; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds nuw [4 x i32], ptr @ws3, i64 0, i64 [[TMP1:%.*]] ++; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i32], ptr @ws3, i64 0, i64 [[TMP1:%.*]] + ; CHECK-NEXT: [[PS3_PI_P1:%.*]] = getelementptr inbounds nuw i8, ptr [[PS3_PI]], i64 4 + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS3_PI_P1]], ptr @ws5 + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) +@@ -62,7 +62,7 @@ + + define dso_local i64 @call_wcslen_s5_3_pi_s5(i1 zeroext %0, i64 %1) { + ; CHECK-LABEL: @call_wcslen_s5_3_pi_s5( +-; CHECK-NEXT: [[PS5_3_PI:%.*]] = getelementptr inbounds nuw [10 x i32], ptr @ws5_3, i64 0, i64 [[TMP1:%.*]] ++; CHECK-NEXT: [[PS5_3_PI:%.*]] = getelementptr inbounds [10 x i32], ptr @ws5_3, i64 0, i64 [[TMP1:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS5_3_PI]], ptr @ws5 + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +@@ -79,7 +79,7 @@ + + define dso_local i64 @call_wcslen_s5_3_s5_pj(i1 zeroext %0, i64 %1) { + ; CHECK-LABEL: @call_wcslen_s5_3_s5_pj( +-; CHECK-NEXT: [[PS5:%.*]] = getelementptr inbounds nuw [6 x i32], ptr @ws5, i64 0, i64 [[TMP1:%.*]] ++; CHECK-NEXT: [[PS5:%.*]] = getelementptr inbounds [6 x i32], ptr @ws5, i64 0, i64 [[TMP1:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr @ws5_3, ptr [[PS5]] + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +@@ -96,7 +96,7 @@ + + define dso_local i64 @fold_wcslen_s3_s5_pj(i1 zeroext %0, i64 %1) { + ; CHECK-LABEL: @fold_wcslen_s3_s5_pj( +-; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds nuw [6 x i32], ptr @ws5, i64 0, i64 [[TMP1:%.*]] ++; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds [6 x i32], ptr @ws5, i64 0, i64 [[TMP1:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr @ws3, ptr [[PS5_PJ]] + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +@@ -115,7 +115,7 @@ + + define dso_local i64 @call_wcslen_s3_s5_3_pj(i1 zeroext %0, i64 %1) { + ; CHECK-LABEL: @call_wcslen_s3_s5_3_pj( +-; CHECK-NEXT: [[PS5_3_PJ:%.*]] = getelementptr inbounds nuw [10 x i32], ptr @ws5_3, i64 0, i64 [[TMP1:%.*]] ++; CHECK-NEXT: [[PS5_3_PJ:%.*]] = getelementptr inbounds [10 x i32], ptr @ws5_3, i64 0, i64 [[TMP1:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr @ws3, ptr [[PS5_3_PJ]] + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +@@ -132,8 +132,8 @@ + + define dso_local i64 @fold_wcslen_s3_pi_s5_pj(i1 zeroext %0, i64 %1, i64 %2) { + ; CHECK-LABEL: @fold_wcslen_s3_pi_s5_pj( +-; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds nuw [4 x i32], ptr @ws3, i64 0, i64 [[TMP1:%.*]] +-; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds nuw [6 x i32], ptr @ws5, i64 0, i64 [[TMP2:%.*]] ++; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i32], ptr @ws3, i64 0, i64 [[TMP1:%.*]] ++; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds [6 x i32], ptr @ws5, i64 0, i64 [[TMP2:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS3_PI]], ptr [[PS5_PJ]] + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll b/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll +--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll ++++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll +@@ -557,7 +557,7 @@ + ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] + ; CHECK: vector.body: + ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] +-; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [1048576 x i32], ptr @idx_array, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1048576 x i32], ptr @idx_array, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load , ptr [[TMP5]], align 4 + ; CHECK-NEXT: [[TMP14:%.*]] = sext [[WIDE_LOAD1]] to + ; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1048576 x i32], ptr @data_array, i64 0, [[TMP14]] +@@ -573,10 +573,10 @@ + ; CHECK-NEXT: br label [[FOR_BODY:%.*]] + ; CHECK: for.body: + ; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY]] ] +-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [1048576 x i32], ptr @idx_array, i64 0, i64 [[IV]] ++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1048576 x i32], ptr @idx_array, i64 0, i64 [[IV]] + ; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 + ; CHECK-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP9]] to i64 +-; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds nuw [1048576 x i32], ptr @data_array, i64 0, i64 [[IDXPROM5]] ++; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [1048576 x i32], ptr @data_array, i64 0, i64 [[IDXPROM5]] + ; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[ARRAYIDX6]], align 4 + ; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP10]], 1 + ; CHECK-NEXT: store i32 [[INC]], ptr [[ARRAYIDX6]], align 4 +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll b/llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll +--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll ++++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll +@@ -36,14 +36,14 @@ + ; CHECK: vector.body: + ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] + ; CHECK-NEXT: [[OFFSET_IDX:%.*]] = shl i64 [[INDEX]], 1 +-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [1024 x i32], ptr @AB, i64 0, i64 [[OFFSET_IDX]] ++; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1024 x i32], ptr @AB, i64 0, i64 [[OFFSET_IDX]] + ; CHECK-NEXT: [[WIDE_VEC:%.*]] = load , ptr [[TMP2]], align 4 + ; CHECK-NEXT: [[STRIDED_VEC:%.*]] = call { , } @llvm.vector.deinterleave2.nxv8i32( [[WIDE_VEC]]) + ; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { , } [[STRIDED_VEC]], 0 + ; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { , } [[STRIDED_VEC]], 1 + ; CHECK-NEXT: [[TMP6:%.*]] = add nsw [[TMP3]], [[BROADCAST_SPLAT]] + ; CHECK-NEXT: [[TMP7:%.*]] = mul nsw [[TMP4]], [[BROADCAST_SPLAT2]] +-; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [1024 x i32], ptr @CD, i64 0, i64 [[OFFSET_IDX]] ++; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1024 x i32], ptr @CD, i64 0, i64 [[OFFSET_IDX]] + ; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = call @llvm.vector.interleave2.nxv8i32( [[TMP6]], [[TMP7]]) + ; CHECK-NEXT: store [[INTERLEAVED_VEC]], ptr [[TMP8]], align 4 + ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP1]] +@@ -127,7 +127,7 @@ + ; CHECK-NEXT: [[WIDE_MASKED_GATHER1:%.*]] = call @llvm.masked.gather.nxv4i16.nxv4p0( [[TMP8]], i32 2, splat (i1 true), poison) + ; CHECK-NEXT: [[TMP9:%.*]] = sext [[WIDE_MASKED_GATHER]] to + ; CHECK-NEXT: [[TMP10:%.*]] = add nsw [[BROADCAST_SPLAT]], [[TMP9]] +-; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [1024 x i32], ptr @CD, i64 0, i64 [[OFFSET_IDX]] ++; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1024 x i32], ptr @CD, i64 0, i64 [[OFFSET_IDX]] + ; CHECK-NEXT: [[TMP11:%.*]] = sext [[WIDE_MASKED_GATHER1]] to + ; CHECK-NEXT: [[TMP12:%.*]] = mul nsw [[BROADCAST_SPLAT3]], [[TMP11]] + ; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = call @llvm.vector.interleave2.nxv8i32( [[TMP10]], [[TMP12]]) +@@ -209,7 +209,7 @@ + ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] + ; CHECK-NEXT: [[VEC_IND:%.*]] = phi [ [[TMP3]], [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ] + ; CHECK-NEXT: [[OFFSET_IDX:%.*]] = shl i64 [[INDEX]], 1 +-; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [1024 x i32], ptr @AB, i64 0, i64 [[OFFSET_IDX]] ++; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1024 x i32], ptr @AB, i64 0, i64 [[OFFSET_IDX]] + ; CHECK-NEXT: [[WIDE_VEC:%.*]] = load , ptr [[TMP6]], align 4 + ; CHECK-NEXT: [[STRIDED_VEC:%.*]] = call { , } @llvm.vector.deinterleave2.nxv8i32( [[WIDE_VEC]]) + ; CHECK-NEXT: [[TMP7:%.*]] = extractvalue { , } [[STRIDED_VEC]], 0 +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll b/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll +--- a/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll ++++ b/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll +@@ -34,13 +34,13 @@ + ; CHECK: vector.body: + ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] + ; CHECK-NEXT: [[OFFSET_IDX:%.*]] = shl i64 [[INDEX]], 1 +-; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [1024 x i32], ptr @AB, i64 0, i64 [[OFFSET_IDX]] ++; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1024 x i32], ptr @AB, i64 0, i64 [[OFFSET_IDX]] + ; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <8 x i32>, ptr [[TMP0]], align 4 + ; CHECK-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> + ; CHECK-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> + ; CHECK-NEXT: [[TMP2:%.*]] = add nsw <4 x i32> [[STRIDED_VEC]], [[BROADCAST_SPLAT]] + ; CHECK-NEXT: [[TMP3:%.*]] = mul nsw <4 x i32> [[STRIDED_VEC1]], [[BROADCAST_SPLAT3]] +-; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [1024 x i32], ptr @CD, i64 0, i64 [[OFFSET_IDX]] ++; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1024 x i32], ptr @CD, i64 0, i64 [[OFFSET_IDX]] + ; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> [[TMP3]], <8 x i32> + ; CHECK-NEXT: store <8 x i32> [[INTERLEAVED_VEC]], ptr [[TMP4]], align 4 + ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 +@@ -113,7 +113,7 @@ + ; CHECK-NEXT: [[STRIDED_VEC2:%.*]] = shufflevector <12 x i32> [[WIDE_VEC]], <12 x i32> poison, <4 x i32> + ; CHECK-NEXT: [[STRIDED_VEC3:%.*]] = shufflevector <12 x i32> [[WIDE_VEC]], <12 x i32> poison, <4 x i32> + ; CHECK-NEXT: [[TMP0:%.*]] = add nsw <4 x i32> [[STRIDED_VEC]], splat (i32 1) +-; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [1024 x %struct.ST3], ptr @S, i64 0, i64 [[INDEX]], i32 0 ++; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1024 x %struct.ST3], ptr @S, i64 0, i64 [[INDEX]], i32 0 + ; CHECK-NEXT: [[TMP1:%.*]] = add nsw <4 x i32> [[STRIDED_VEC2]], splat (i32 2) + ; CHECK-NEXT: [[TMP2:%.*]] = add nsw <4 x i32> [[STRIDED_VEC3]], splat (i32 3) + ; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x i32> [[TMP0]], <4 x i32> [[TMP1]], <8 x i32> +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll b/llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll +--- a/llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll ++++ b/llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll +@@ -24,10 +24,10 @@ + ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] + ; CHECK: vector.body: + ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] +-; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [40000 x i8], ptr addrspace(1) @Y, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds [40000 x i8], ptr addrspace(1) @Y, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i8>, ptr addrspace(1) [[TMP0]], align 1 + ; CHECK-NEXT: [[TMP1:%.*]] = add <4 x i8> [[WIDE_LOAD]], splat (i8 1) +-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [40000 x i8], ptr @X, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [40000 x i8], ptr @X, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: store <4 x i8> [[TMP1]], ptr [[TMP2]], align 1 + ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 + ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 40000 +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/LoopVectorize/non-const-n.ll b/llvm/test/Transforms/LoopVectorize/non-const-n.ll +--- a/llvm/test/Transforms/LoopVectorize/non-const-n.ll ++++ b/llvm/test/Transforms/LoopVectorize/non-const-n.ll +@@ -19,12 +19,12 @@ + ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] + ; CHECK: vector.body: + ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] +-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP2]], align 4 +-; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @c, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [2048 x i32], ptr @c, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, ptr [[TMP3]], align 4 + ; CHECK-NEXT: [[TMP4:%.*]] = add nsw <4 x i32> [[WIDE_LOAD1]], [[WIDE_LOAD]] +-; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @a, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2048 x i32], ptr @a, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: store <4 x i32> [[TMP4]], ptr [[TMP5]], align 4 + ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 + ; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX]], [[TMP1]] +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/LoopVectorize/X86/small-size.ll b/llvm/test/Transforms/LoopVectorize/X86/small-size.ll +--- a/llvm/test/Transforms/LoopVectorize/X86/small-size.ll ++++ b/llvm/test/Transforms/LoopVectorize/X86/small-size.ll +@@ -28,12 +28,12 @@ + ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] + ; CHECK: vector.body: + ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] +-; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP1]], align 4 +-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @c, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2048 x i32], ptr @c, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, ptr [[TMP2]], align 4 + ; CHECK-NEXT: [[TMP3:%.*]] = add nsw <4 x i32> [[WIDE_LOAD1]], [[WIDE_LOAD]] +-; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @a, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2048 x i32], ptr @a, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: store <4 x i32> [[TMP3]], ptr [[TMP4]], align 4 + ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 + ; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256 +@@ -89,7 +89,7 @@ + ; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP3]], i64 0 + ; CHECK-NEXT: br i1 [[TMP4]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] + ; CHECK: pred.store.if: +-; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: store i32 [[X:%.*]], ptr [[TMP5]], align 4 + ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]] + ; CHECK: pred.store.continue: +@@ -97,7 +97,7 @@ + ; CHECK-NEXT: br i1 [[TMP6]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2:%.*]] + ; CHECK: pred.store.if1: + ; CHECK-NEXT: [[TMP7:%.*]] = or disjoint i64 [[INDEX]], 1 +-; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[TMP7]] ++; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[TMP7]] + ; CHECK-NEXT: store i32 [[X]], ptr [[TMP8]], align 4 + ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE2]] + ; CHECK: pred.store.continue2: +@@ -105,7 +105,7 @@ + ; CHECK-NEXT: br i1 [[TMP9]], label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]] + ; CHECK: pred.store.if3: + ; CHECK-NEXT: [[TMP10:%.*]] = or disjoint i64 [[INDEX]], 2 +-; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[TMP10]] ++; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[TMP10]] + ; CHECK-NEXT: store i32 [[X]], ptr [[TMP11]], align 4 + ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE4]] + ; CHECK: pred.store.continue4: +@@ -113,7 +113,7 @@ + ; CHECK-NEXT: br i1 [[TMP12]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6]] + ; CHECK: pred.store.if5: + ; CHECK-NEXT: [[TMP13:%.*]] = or disjoint i64 [[INDEX]], 3 +-; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[TMP13]] ++; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[TMP13]] + ; CHECK-NEXT: store i32 [[X]], ptr [[TMP14]], align 4 + ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE6]] + ; CHECK: pred.store.continue6: +@@ -152,11 +152,11 @@ + ; CHECK-NEXT: [[TMP19:%.*]] = extractelement <4 x i1> [[TMP18]], i64 0 + ; CHECK-NEXT: br i1 [[TMP19]], label [[PRED_STORE_IF21:%.*]], label [[PRED_STORE_CONTINUE22:%.*]] + ; CHECK: pred.store.if21: +-; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[OFFSET_IDX]] ++; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[OFFSET_IDX]] + ; CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 +-; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @c, i64 0, i64 [[OFFSET_IDX]] ++; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2048 x i32], ptr @c, i64 0, i64 [[OFFSET_IDX]] + ; CHECK-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4 +-; CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @a, i64 0, i64 [[OFFSET_IDX]] ++; CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2048 x i32], ptr @a, i64 0, i64 [[OFFSET_IDX]] + ; CHECK-NEXT: [[TMP25:%.*]] = and i32 [[TMP23]], [[TMP21]] + ; CHECK-NEXT: store i32 [[TMP25]], ptr [[TMP24]], align 4 + ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE22]] +@@ -165,11 +165,11 @@ + ; CHECK-NEXT: br i1 [[TMP26]], label [[PRED_STORE_IF23:%.*]], label [[PRED_STORE_CONTINUE24:%.*]] + ; CHECK: pred.store.if23: + ; CHECK-NEXT: [[TMP27:%.*]] = add i64 [[OFFSET_IDX]], 1 +-; CHECK-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[TMP27]] ++; CHECK-NEXT: [[TMP28:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[TMP27]] + ; CHECK-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 4 +-; CHECK-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @c, i64 0, i64 [[TMP27]] ++; CHECK-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2048 x i32], ptr @c, i64 0, i64 [[TMP27]] + ; CHECK-NEXT: [[TMP31:%.*]] = load i32, ptr [[TMP30]], align 4 +-; CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @a, i64 0, i64 [[TMP27]] ++; CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds [2048 x i32], ptr @a, i64 0, i64 [[TMP27]] + ; CHECK-NEXT: [[TMP33:%.*]] = and i32 [[TMP31]], [[TMP29]] + ; CHECK-NEXT: store i32 [[TMP33]], ptr [[TMP32]], align 4 + ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE24]] +@@ -178,11 +178,11 @@ + ; CHECK-NEXT: br i1 [[TMP34]], label [[PRED_STORE_IF25:%.*]], label [[PRED_STORE_CONTINUE26:%.*]] + ; CHECK: pred.store.if25: + ; CHECK-NEXT: [[TMP35:%.*]] = add i64 [[OFFSET_IDX]], 2 +-; CHECK-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[TMP35]] ++; CHECK-NEXT: [[TMP36:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[TMP35]] + ; CHECK-NEXT: [[TMP37:%.*]] = load i32, ptr [[TMP36]], align 4 +-; CHECK-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @c, i64 0, i64 [[TMP35]] ++; CHECK-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2048 x i32], ptr @c, i64 0, i64 [[TMP35]] + ; CHECK-NEXT: [[TMP39:%.*]] = load i32, ptr [[TMP38]], align 4 +-; CHECK-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @a, i64 0, i64 [[TMP35]] ++; CHECK-NEXT: [[TMP40:%.*]] = getelementptr inbounds [2048 x i32], ptr @a, i64 0, i64 [[TMP35]] + ; CHECK-NEXT: [[TMP41:%.*]] = and i32 [[TMP39]], [[TMP37]] + ; CHECK-NEXT: store i32 [[TMP41]], ptr [[TMP40]], align 4 + ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE26]] +@@ -191,11 +191,11 @@ + ; CHECK-NEXT: br i1 [[TMP42]], label [[PRED_STORE_IF27:%.*]], label [[PRED_STORE_CONTINUE28]] + ; CHECK: pred.store.if27: + ; CHECK-NEXT: [[TMP43:%.*]] = add i64 [[OFFSET_IDX]], 3 +-; CHECK-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[TMP43]] ++; CHECK-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[TMP43]] + ; CHECK-NEXT: [[TMP45:%.*]] = load i32, ptr [[TMP44]], align 4 +-; CHECK-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @c, i64 0, i64 [[TMP43]] ++; CHECK-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2048 x i32], ptr @c, i64 0, i64 [[TMP43]] + ; CHECK-NEXT: [[TMP47:%.*]] = load i32, ptr [[TMP46]], align 4 +-; CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @a, i64 0, i64 [[TMP43]] ++; CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2048 x i32], ptr @a, i64 0, i64 [[TMP43]] + ; CHECK-NEXT: [[TMP49:%.*]] = and i32 [[TMP47]], [[TMP45]] + ; CHECK-NEXT: store i32 [[TMP49]], ptr [[TMP48]], align 4 + ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE28]] +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll b/llvm/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll +--- a/llvm/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll ++++ b/llvm/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll +@@ -14,8 +14,8 @@ + ; CHECK: vector.body: + ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] + ; CHECK-NEXT: [[TMP0:%.*]] = or disjoint i64 [[INDEX]], 1 +-; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [1024 x x86_fp80], ptr @x, i64 0, i64 [[INDEX]] +-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [1024 x x86_fp80], ptr @x, i64 0, i64 [[TMP0]] ++; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1024 x x86_fp80], ptr @x, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1024 x x86_fp80], ptr @x, i64 0, i64 [[TMP0]] + ; CHECK-NEXT: store x86_fp80 0xK3FFF8000000000000000, ptr [[TMP1]], align 16 + ; CHECK-NEXT: store x86_fp80 0xK3FFF8000000000000000, ptr [[TMP2]], align 16 + ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/PhaseOrdering/X86/excessive-unrolling.ll b/llvm/test/Transforms/PhaseOrdering/X86/excessive-unrolling.ll +--- a/llvm/test/Transforms/PhaseOrdering/X86/excessive-unrolling.ll ++++ b/llvm/test/Transforms/PhaseOrdering/X86/excessive-unrolling.ll +@@ -179,17 +179,17 @@ + ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] + ; CHECK: vector.body: + ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] +-; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [58 x double], ptr @b, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds [58 x double], ptr @b, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP0]], i64 16 + ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x double>, ptr [[TMP0]], align 16 + ; CHECK-NEXT: [[WIDE_LOAD4:%.*]] = load <2 x double>, ptr [[TMP1]], align 16 +-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [58 x double], ptr @c, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [58 x double], ptr @c, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP2]], i64 16 + ; CHECK-NEXT: [[WIDE_LOAD5:%.*]] = load <2 x double>, ptr [[TMP2]], align 16 + ; CHECK-NEXT: [[WIDE_LOAD6:%.*]] = load <2 x double>, ptr [[TMP3]], align 16 + ; CHECK-NEXT: [[TMP4:%.*]] = fadd <2 x double> [[WIDE_LOAD]], [[WIDE_LOAD5]] + ; CHECK-NEXT: [[TMP5:%.*]] = fadd <2 x double> [[WIDE_LOAD4]], [[WIDE_LOAD6]] +-; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [58 x double], ptr @a, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [58 x double], ptr @a, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP6]], i64 16 + ; CHECK-NEXT: store <2 x double> [[TMP4]], ptr [[TMP6]], align 16 + ; CHECK-NEXT: store <2 x double> [[TMP5]], ptr [[TMP7]], align 16 +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll b/llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll +--- a/llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll ++++ b/llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll +@@ -349,12 +349,12 @@ + ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_COND1_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY3]] ] + ; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[INDVARS_IV]] to i32 + ; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 1 +-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP3]] ++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP3]] + ; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[INDVARS_IV]] to i32 +-; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP4]] ++; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP4]] + ; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[INDVARS_IV]] to i32 + ; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP5]], 4 +-; CHECK-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP6]] ++; CHECK-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP6]] + ; CHECK-NEXT: [[TMP7:%.*]] = load float, ptr [[ARRAYIDX31]], align 4 + ; CHECK-NEXT: [[TMP8:%.*]] = load <4 x float>, ptr [[ARRAYIDX]], align 4 + ; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <4 x float> [[TMP8]], <4 x float> poison, <4 x i32> +@@ -363,7 +363,7 @@ + ; CHECK-NEXT: store <4 x float> [[TMP11]], ptr [[ARRAYIDX5]], align 4 + ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 5 + ; CHECK-NEXT: [[TMP12:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 +-; CHECK-NEXT: [[ARRAYIDX41:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP12]] ++; CHECK-NEXT: [[ARRAYIDX41:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP12]] + ; CHECK-NEXT: [[TMP13]] = load float, ptr [[ARRAYIDX41]], align 4 + ; CHECK-NEXT: [[MUL45:%.*]] = fmul float [[TMP13]], [[TMP7]] + ; CHECK-NEXT: store float [[MUL45]], ptr [[ARRAYIDX31]], align 4 +@@ -384,12 +384,12 @@ + ; SSE2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_COND1_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY3]] ] + ; SSE2-NEXT: [[TMP2:%.*]] = trunc i64 [[INDVARS_IV]] to i32 + ; SSE2-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 1 +-; SSE2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP3]] ++; SSE2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP3]] + ; SSE2-NEXT: [[TMP4:%.*]] = trunc i64 [[INDVARS_IV]] to i32 +-; SSE2-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP4]] ++; SSE2-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP4]] + ; SSE2-NEXT: [[TMP5:%.*]] = trunc i64 [[INDVARS_IV]] to i32 + ; SSE2-NEXT: [[TMP6:%.*]] = add i32 [[TMP5]], 4 +-; SSE2-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP6]] ++; SSE2-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP6]] + ; SSE2-NEXT: [[TMP7:%.*]] = load float, ptr [[ARRAYIDX31]], align 4 + ; SSE2-NEXT: [[TMP8:%.*]] = load <4 x float>, ptr [[ARRAYIDX]], align 4 + ; SSE2-NEXT: [[TMP9:%.*]] = shufflevector <4 x float> [[TMP8]], <4 x float> poison, <4 x i32> +@@ -398,7 +398,7 @@ + ; SSE2-NEXT: store <4 x float> [[TMP11]], ptr [[ARRAYIDX5]], align 4 + ; SSE2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 5 + ; SSE2-NEXT: [[TMP12:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 +-; SSE2-NEXT: [[ARRAYIDX41:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP12]] ++; SSE2-NEXT: [[ARRAYIDX41:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP12]] + ; SSE2-NEXT: [[TMP13]] = load float, ptr [[ARRAYIDX41]], align 4 + ; SSE2-NEXT: [[MUL45:%.*]] = fmul float [[TMP13]], [[TMP7]] + ; SSE2-NEXT: store float [[MUL45]], ptr [[ARRAYIDX31]], align 4 diff --git a/third_party/llvm/workspace.bzl b/third_party/llvm/workspace.bzl index d9050b74a195e..780da28ff78ad 100644 --- a/third_party/llvm/workspace.bzl +++ b/third_party/llvm/workspace.bzl @@ -4,8 +4,8 @@ load("//third_party:repo.bzl", "tf_http_archive") def repo(name): """Imports LLVM.""" - LLVM_COMMIT = "e86910337f98e57f5b9253f7d80d5b916eb1d97e" - LLVM_SHA256 = "4ca0eff0ca86ed6f2fdb7682354fdf4c85151d90ac9fb6e55a868e4191359e9f" + LLVM_COMMIT = "59890c13343af9e308281b3c76bac425087f4f8a" + LLVM_SHA256 = "bd80d5cbc94225c4ac944bc22df7772d2eb6b1df3e123d992b331a1b097847d4" tf_http_archive( name = name, diff --git a/third_party/shardy/temporary.patch b/third_party/shardy/temporary.patch index 0ead0541c6511..c4c3be406382a 100644 --- a/third_party/shardy/temporary.patch +++ b/third_party/shardy/temporary.patch @@ -1,58 +1,1025 @@ +diff --git a/shardy/integrations/c/attributes.cc b/shardy/integrations/c/attributes.cc +index da256d9..2e275a0 100644 +--- a/shardy/integrations/c/attributes.cc ++++ b/shardy/integrations/c/attributes.cc +@@ -358,24 +358,23 @@ MlirAttribute sdyOpShardingRuleAttrGetResultMappingsElem(MlirAttribute attr, + unwrapAttr(attr).getResultMappings()[pos]); + } + +-intptr_t sdyOpShardingRuleAttrGetReductionFactorsSize(MlirAttribute attr) { ++int64_t sdyOpShardingRuleAttrGetReductionFactorsSize(MlirAttribute attr) { + return unwrapAttr(attr).getReductionFactors().size(); + } + +-int64_t sdyOpShardingRuleAttrGetReductionFactorsElem(MlirAttribute attr, +- intptr_t pos) { ++intptr_t sdyOpShardingRuleAttrGetReductionFactorsElem(MlirAttribute attr, ++ intptr_t pos) { + return unwrapAttr(attr).getReductionFactors()[pos]; + } + +-intptr_t sdyOpShardingRuleAttrGetNeedReplicationFactorsSize( +- MlirAttribute attr) { ++int64_t sdyOpShardingRuleAttrGetNeedReplicationFactorsSize(MlirAttribute attr) { + return unwrapAttr(attr) + .getNeedReplicationFactors() + .size(); + } + +-int64_t sdyOpShardingRuleAttrGetNeedReplicationFactorsElem(MlirAttribute attr, +- intptr_t pos) { ++intptr_t sdyOpShardingRuleAttrGetNeedReplicationFactorsElem(MlirAttribute attr, ++ intptr_t pos) { + return unwrapAttr(attr) + .getNeedReplicationFactors()[pos]; + } diff --git a/third_party/llvm/generated.patch b/third_party/llvm/generated.patch -index 509398d..b1fe52b 100644 +index b1fe52b..e2db28a 100644 --- a/third_party/llvm/generated.patch +++ b/third_party/llvm/generated.patch -@@ -1 +1,38 @@ +@@ -1,28 +1,87 @@ Auto generated patch. Do not edit or delete it, even if empty. -+diff -ruN --strip-trailing-cr a/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp b/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp -+--- a/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp -++++ b/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp -+@@ -654,8 +654,10 @@ -+ // There is a potential that the model could be adversarial and -+ // continually evict live ranges over and over again, leading to a -+ // large amount of compile time being spent in regalloc. If we hit the -+- // threshold, prevent the range from being evicted. -+- if (IntfCascade >= MaxCascade) -++ // threshold, prevent the range from being evicted. We still let the -++ // range through if it is urgent as we are required to produce an -++ // eviction if the candidate is not spillable. -++ if (IntfCascade >= MaxCascade && !Urgent) -+ return false; -+ -+ // Only evict older cascades or live ranges without a cascade. -+diff -ruN --strip-trailing-cr a/llvm/test/CodeGen/NVPTX/nvcl-param-align.ll b/llvm/test/CodeGen/NVPTX/nvcl-param-align.ll -+--- a/llvm/test/CodeGen/NVPTX/nvcl-param-align.ll -++++ b/llvm/test/CodeGen/NVPTX/nvcl-param-align.ll -+@@ -1,5 +1,5 @@ -+-; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 | FileCheck %s -+-; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 | %ptxas-verify %} -++; RUN: llc < %s -mtriple=nvptx64-nvidia-nvcl -mcpu=sm_20 | FileCheck %s -++; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64-nvidia-nvcl -mcpu=sm_20 | %ptxas-verify %} -+ -+ target triple = "nvptx-unknown-nvcl" -+ -+diff -ruN --strip-trailing-cr a/llvm/test/CodeGen/NVPTX/surf-write.ll b/llvm/test/CodeGen/NVPTX/surf-write.ll -+--- a/llvm/test/CodeGen/NVPTX/surf-write.ll -++++ b/llvm/test/CodeGen/NVPTX/surf-write.ll -+@@ -1,5 +1,5 @@ -+ ; RUN: llc < %s -mcpu=sm_20 -verify-machineinstrs | FileCheck %s -+-; RUN: %if ptxas %{ llc < %s -mcpu=sm_20 -verify-machineinstrs | %ptxas-verify %} -++; RUN: %if ptxas %{ llc < %s -mcpu=sm_20 -mtriple=nvptx64-nvcl -verify-machineinstrs | %ptxas-verify %} -+ -+ target triple = "nvptx-unknown-nvcl" +-diff -ruN --strip-trailing-cr a/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp b/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp +---- a/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp +-+++ b/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp +-@@ -654,8 +654,10 @@ +- // There is a potential that the model could be adversarial and +- // continually evict live ranges over and over again, leading to a +- // large amount of compile time being spent in regalloc. If we hit the +-- // threshold, prevent the range from being evicted. +-- if (IntfCascade >= MaxCascade) +-+ // threshold, prevent the range from being evicted. We still let the +-+ // range through if it is urgent as we are required to produce an +-+ // eviction if the candidate is not spillable. +-+ if (IntfCascade >= MaxCascade && !Urgent) +- return false; +- +- // Only evict older cascades or live ranges without a cascade. ++diff -ruN --strip-trailing-cr a/clang/test/CodeGen/attr-counted-by.c b/clang/test/CodeGen/attr-counted-by.c ++--- a/clang/test/CodeGen/attr-counted-by.c +++++ b/clang/test/CodeGen/attr-counted-by.c ++@@ -1043,7 +1043,7 @@ ++ // NO-SANITIZE-WITH-ATTR-NEXT: call void @llvm.lifetime.start.p0(i64 24, ptr nonnull [[BAZ]]) #[[ATTR11:[0-9]+]] ++ // NO-SANITIZE-WITH-ATTR-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(24) [[BAZ]], ptr noundef nonnull align 4 dereferenceable(24) @test12_bar, i64 24, i1 false), !tbaa.struct [[TBAA_STRUCT7:![0-9]+]] ++ // NO-SANITIZE-WITH-ATTR-NEXT: [[IDXPROM:%.*]] = sext i32 [[INDEX]] to i64 ++-// NO-SANITIZE-WITH-ATTR-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [6 x i32], ptr [[BAZ]], i64 0, i64 [[IDXPROM]] +++// NO-SANITIZE-WITH-ATTR-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [6 x i32], ptr [[BAZ]], i64 0, i64 [[IDXPROM]] ++ // NO-SANITIZE-WITH-ATTR-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !tbaa [[TBAA2]] ++ // NO-SANITIZE-WITH-ATTR-NEXT: store i32 [[TMP0]], ptr @test12_b, align 4, !tbaa [[TBAA2]] ++ // NO-SANITIZE-WITH-ATTR-NEXT: [[TMP1:%.*]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @test12_foo, i64 4), align 4, !tbaa [[TBAA2]] ++@@ -1085,7 +1085,7 @@ ++ // NO-SANITIZE-WITHOUT-ATTR-NEXT: call void @llvm.lifetime.start.p0(i64 24, ptr nonnull [[BAZ]]) #[[ATTR9:[0-9]+]] ++ // NO-SANITIZE-WITHOUT-ATTR-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(24) [[BAZ]], ptr noundef nonnull align 4 dereferenceable(24) @test12_bar, i64 24, i1 false), !tbaa.struct [[TBAA_STRUCT7:![0-9]+]] ++ // NO-SANITIZE-WITHOUT-ATTR-NEXT: [[IDXPROM:%.*]] = sext i32 [[INDEX]] to i64 ++-// NO-SANITIZE-WITHOUT-ATTR-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [6 x i32], ptr [[BAZ]], i64 0, i64 [[IDXPROM]] +++// NO-SANITIZE-WITHOUT-ATTR-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [6 x i32], ptr [[BAZ]], i64 0, i64 [[IDXPROM]] ++ // NO-SANITIZE-WITHOUT-ATTR-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !tbaa [[TBAA2]] ++ // NO-SANITIZE-WITHOUT-ATTR-NEXT: store i32 [[TMP0]], ptr @test12_b, align 4, !tbaa [[TBAA2]] ++ // NO-SANITIZE-WITHOUT-ATTR-NEXT: [[TMP1:%.*]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @test12_foo, i64 4), align 4, !tbaa [[TBAA2]] ++diff -ruN --strip-trailing-cr a/clang/test/CodeGen/union-tbaa1.c b/clang/test/CodeGen/union-tbaa1.c ++--- a/clang/test/CodeGen/union-tbaa1.c +++++ b/clang/test/CodeGen/union-tbaa1.c ++@@ -16,17 +16,17 @@ ++ // CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARR]], i32 [[TMP0]] ++ // CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !tbaa [[TBAA2]] ++ // CHECK-NEXT: [[MUL:%.*]] = mul i32 [[TMP1]], [[NUM]] ++-// CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds nuw [4 x [2 x %union.vect32]], ptr [[TMP]], i32 0, i32 [[TMP0]] +++// CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x [2 x %union.vect32]], ptr [[TMP]], i32 0, i32 [[TMP0]] ++ // CHECK-NEXT: store i32 [[MUL]], ptr [[ARRAYIDX2]], align 8, !tbaa [[TBAA6:![0-9]+]] ++ // CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARR]], i32 [[TMP0]], i32 1 ++ // CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX5]], align 4, !tbaa [[TBAA2]] ++ // CHECK-NEXT: [[MUL6:%.*]] = mul i32 [[TMP2]], [[NUM]] ++-// CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds nuw [4 x [2 x %union.vect32]], ptr [[TMP]], i32 0, i32 [[TMP0]], i32 1 +++// CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [4 x [2 x %union.vect32]], ptr [[TMP]], i32 0, i32 [[TMP0]], i32 1 ++ // CHECK-NEXT: store i32 [[MUL6]], ptr [[ARRAYIDX8]], align 4, !tbaa [[TBAA6]] ++ // CHECK-NEXT: [[TMP3:%.*]] = lshr i32 [[MUL]], 16 ++ // CHECK-NEXT: store i32 [[TMP3]], ptr [[VEC]], align 4, !tbaa [[TBAA2]] ++ // CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[INDEX]], align 4, !tbaa [[TBAA2]] ++-// CHECK-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds nuw [4 x [2 x %union.vect32]], ptr [[TMP]], i32 0, i32 [[TMP4]], i32 1 +++// CHECK-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [4 x [2 x %union.vect32]], ptr [[TMP]], i32 0, i32 [[TMP4]], i32 1 ++ // CHECK-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds nuw i8, ptr [[ARRAYIDX14]], i32 2 ++ // CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[ARRAYIDX15]], align 2, !tbaa [[TBAA6]] ++ // CHECK-NEXT: [[CONV16:%.*]] = zext i16 [[TMP5]] to i32 ++diff -ruN --strip-trailing-cr a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp ++--- a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp +++++ b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp ++@@ -3131,26 +3131,6 @@ ++ } ++ } ++ ++- // The single (non-zero) index of an inbounds GEP of a base object cannot ++- // be negative. ++- auto HasOneNonZeroIndex = [&]() { ++- bool FoundNonZero = false; ++- for (Value *Idx : GEP.indices()) { ++- auto *C = dyn_cast(Idx); ++- if (C && C->isNullValue()) ++- continue; ++- if (FoundNonZero) ++- return false; ++- FoundNonZero = true; ++- } ++- return true; ++- }; ++- if (GEP.isInBounds() && !GEP.hasNoUnsignedWrap() && isBaseOfObject(PtrOp) && ++- HasOneNonZeroIndex()) { ++- GEP.setNoWrapFlags(GEP.getNoWrapFlags() | GEPNoWrapFlags::noUnsignedWrap()); ++- return &GEP; ++- } ++- ++ // nusw + nneg -> nuw ++ if (GEP.hasNoUnsignedSignedWrap() && !GEP.hasNoUnsignedWrap() && ++ all_of(GEP.indices(), [&](Value *Idx) { + diff -ruN --strip-trailing-cr a/llvm/test/CodeGen/NVPTX/nvcl-param-align.ll b/llvm/test/CodeGen/NVPTX/nvcl-param-align.ll + --- a/llvm/test/CodeGen/NVPTX/nvcl-param-align.ll + +++ b/llvm/test/CodeGen/NVPTX/nvcl-param-align.ll + @@ -1,5 +1,5 @@ +--; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 | FileCheck %s +--; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 | %ptxas-verify %} +-+; RUN: llc < %s -mtriple=nvptx64-nvidia-nvcl -mcpu=sm_20 | FileCheck %s +-+; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64-nvidia-nvcl -mcpu=sm_20 | %ptxas-verify %} ++-; RUN: llc < %s -mtriple=nvptx64-nvidia-nvcl -mcpu=sm_20 | FileCheck %s ++-; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64-nvidia-nvcl -mcpu=sm_20 | %ptxas-verify %} +++; RUN: llc < %s -mtriple=nvptx64-nvidia-nvcl -mcpu=sm_60 | FileCheck %s +++; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64-nvidia-nvcl -mcpu=sm_60 | %ptxas-verify %} + + target triple = "nvptx-unknown-nvcl" + +@@ -36,3 +95,862 @@ diff -ruN --strip-trailing-cr a/llvm/test/CodeGen/NVPTX/surf-write.ll b/llvm/tes + + target triple = "nvptx-unknown-nvcl" + ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll b/llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll ++--- a/llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll +++++ b/llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll ++@@ -53,7 +53,7 @@ ++ ; CHECK-LABEL: @memcpy_constant_arg_ptr_to_alloca_load_atomic( ++ ; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [32 x i64], align 8, addrspace(5) ++ ; CHECK-NEXT: call void @llvm.memcpy.p5.p4.i64(ptr addrspace(5) noundef align 8 dereferenceable(256) [[ALLOCA]], ptr addrspace(4) noundef align 8 dereferenceable(256) [[ARG:%.*]], i64 256, i1 false) ++-; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds nuw [32 x i64], ptr addrspace(5) [[ALLOCA]], i32 0, i32 [[IDX:%.*]] +++; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [32 x i64], ptr addrspace(5) [[ALLOCA]], i32 0, i32 [[IDX:%.*]] ++ ; CHECK-NEXT: [[LOAD:%.*]] = load atomic i64, ptr addrspace(5) [[GEP]] syncscope("somescope") acquire, align 8 ++ ; CHECK-NEXT: ret i64 [[LOAD]] ++ ; ++@@ -101,7 +101,7 @@ ++ ; CHECK-LABEL: @memcpy_constant_byref_arg_ptr_to_alloca_too_many_bytes( ++ ; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [32 x i8], align 4, addrspace(5) ++ ; CHECK-NEXT: call void @llvm.memcpy.p5.p4.i64(ptr addrspace(5) noundef align 4 dereferenceable(31) [[ALLOCA]], ptr addrspace(4) noundef align 4 dereferenceable(31) [[ARG:%.*]], i64 31, i1 false) ++-; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds nuw [32 x i8], ptr addrspace(5) [[ALLOCA]], i32 0, i32 [[IDX:%.*]] +++; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [32 x i8], ptr addrspace(5) [[ALLOCA]], i32 0, i32 [[IDX:%.*]] ++ ; CHECK-NEXT: [[LOAD:%.*]] = load i8, ptr addrspace(5) [[GEP]], align 1 ++ ; CHECK-NEXT: store i8 [[LOAD]], ptr addrspace(1) [[OUT:%.*]], align 1 ++ ; CHECK-NEXT: ret void ++@@ -120,7 +120,7 @@ ++ ; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [32 x i8], align 4, addrspace(5) ++ ; CHECK-NEXT: [[KERNARG_SEGMENT_PTR:%.*]] = call align 16 dereferenceable(32) ptr addrspace(4) @llvm.amdgcn.kernarg.segment.ptr() ++ ; CHECK-NEXT: call void @llvm.memcpy.p5.p4.i64(ptr addrspace(5) noundef align 4 dereferenceable(32) [[ALLOCA]], ptr addrspace(4) noundef align 16 dereferenceable(32) [[KERNARG_SEGMENT_PTR]], i64 32, i1 false) ++-; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds nuw [32 x i8], ptr addrspace(5) [[ALLOCA]], i32 0, i32 [[IDX:%.*]] +++; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [32 x i8], ptr addrspace(5) [[ALLOCA]], i32 0, i32 [[IDX:%.*]] ++ ; CHECK-NEXT: [[LOAD:%.*]] = load i8, ptr addrspace(5) [[GEP]], align 1 ++ ; CHECK-NEXT: store i8 [[LOAD]], ptr addrspace(1) [[OUT:%.*]], align 1 ++ ; CHECK-NEXT: ret void ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/cast_phi.ll b/llvm/test/Transforms/InstCombine/cast_phi.ll ++--- a/llvm/test/Transforms/InstCombine/cast_phi.ll +++++ b/llvm/test/Transforms/InstCombine/cast_phi.ll ++@@ -31,8 +31,8 @@ ++ ; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i32 [[I12_06]], [[BASE:%.*]] ++ ; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[I12_06]], 1 ++ ; CHECK-NEXT: [[CONV_I9:%.*]] = sext i32 [[ADD]] to i64 ++-; CHECK-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds nuw [258 x float], ptr [[CALLA]], i64 0, i64 [[CONV_I9]] ++-; CHECK-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds nuw [258 x float], ptr [[CALLB]], i64 0, i64 [[CONV_I9]] +++; CHECK-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds [258 x float], ptr [[CALLA]], i64 0, i64 [[CONV_I9]] +++; CHECK-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds [258 x float], ptr [[CALLB]], i64 0, i64 [[CONV_I9]] ++ ; CHECK-NEXT: [[CMP40:%.*]] = icmp ult i32 [[I12_06]], [[BASE]] ++ ; CHECK-NEXT: br i1 [[TMP3]], label [[DOTBB4:%.*]], label [[DOTBB5:%.*]] ++ ; CHECK: .bb4: ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/load-cmp.ll b/llvm/test/Transforms/InstCombine/load-cmp.ll ++--- a/llvm/test/Transforms/InstCombine/load-cmp.ll +++++ b/llvm/test/Transforms/InstCombine/load-cmp.ll ++@@ -339,7 +339,7 @@ ++ define i1 @pr93017(i64 %idx) { ++ ; CHECK-LABEL: @pr93017( ++ ; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[IDX:%.*]] to i32 ++-; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds nuw [2 x ptr], ptr @table, i32 0, i32 [[TMP1]] +++; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [2 x ptr], ptr @table, i32 0, i32 [[TMP1]] ++ ; CHECK-NEXT: [[V:%.*]] = load ptr, ptr [[GEP]], align 4 ++ ; CHECK-NEXT: [[CMP:%.*]] = icmp ne ptr [[V]], null ++ ; CHECK-NEXT: ret i1 [[CMP]] ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/memcpy-addrspace.ll b/llvm/test/Transforms/InstCombine/memcpy-addrspace.ll ++--- a/llvm/test/Transforms/InstCombine/memcpy-addrspace.ll +++++ b/llvm/test/Transforms/InstCombine/memcpy-addrspace.ll ++@@ -6,7 +6,7 @@ ++ define void @test_load(ptr addrspace(1) %out, i64 %x) { ++ ; CHECK-LABEL: @test_load( ++ ; CHECK-NEXT: entry: ++-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [8 x i32], ptr addrspace(2) @test.data, i64 0, i64 [[X:%.*]] +++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [8 x i32], ptr addrspace(2) @test.data, i64 0, i64 [[X:%.*]] ++ ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr addrspace(2) [[ARRAYIDX]], align 4 ++ ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] ++ ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 ++@@ -45,7 +45,7 @@ ++ define void @test_load_bitcast_chain(ptr addrspace(1) %out, i64 %x) { ++ ; CHECK-LABEL: @test_load_bitcast_chain( ++ ; CHECK-NEXT: entry: ++-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(2) @test.data, i64 [[X:%.*]] +++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr addrspace(2) @test.data, i64 [[X:%.*]] ++ ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr addrspace(2) [[ARRAYIDX]], align 4 ++ ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] ++ ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 ++@@ -66,7 +66,7 @@ ++ ; CHECK-NEXT: entry: ++ ; CHECK-NEXT: [[DATA:%.*]] = alloca [8 x i32], align 4 ++ ; CHECK-NEXT: call void @llvm.memcpy.p0.p2.i64(ptr noundef nonnull align 4 dereferenceable(32) [[DATA]], ptr addrspace(2) noundef align 4 dereferenceable(32) @test.data, i64 32, i1 false) ++-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] +++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] ++ ; CHECK-NEXT: [[TMP0:%.*]] = call i32 @foo(ptr nonnull [[ARRAYIDX]]) ++ ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] ++ ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 ++@@ -87,8 +87,8 @@ ++ ; CHECK-NEXT: entry: ++ ; CHECK-NEXT: [[DATA:%.*]] = alloca [8 x i32], align 4 ++ ; CHECK-NEXT: call void @llvm.memcpy.p0.p2.i64(ptr noundef nonnull align 4 dereferenceable(32) [[DATA]], ptr addrspace(2) noundef align 4 dereferenceable(32) @test.data, i64 32, i1 false) ++-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] ++-; CHECK-NEXT: [[TMP0:%.*]] = call i32 @foo(ptr nonnull [[ARRAYIDX]]) +++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] +++; CHECK-NEXT: [[TMP0:%.*]] = call i32 @foo(ptr [[ARRAYIDX]]) ++ ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] ++ ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 ++ ; CHECK-NEXT: ret void ++@@ -108,7 +108,7 @@ ++ ; CHECK-NEXT: entry: ++ ; CHECK-NEXT: [[DATA:%.*]] = alloca [8 x i32], align 4 ++ ; CHECK-NEXT: call void @llvm.memcpy.p0.p2.i64(ptr noundef nonnull align 4 dereferenceable(32) [[DATA]], ptr addrspace(2) noundef align 4 dereferenceable(32) @test.data, i64 32, i1 false) ++-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] +++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] ++ ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 ++ ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] ++ ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 ++@@ -135,11 +135,11 @@ ++ ; CHECK-NEXT: entry: ++ ; CHECK-NEXT: [[DATA:%.*]] = alloca [8 x i32], align 4 ++ ; CHECK-NEXT: call void @llvm.memcpy.p0.p2.i64(ptr noundef nonnull align 4 dereferenceable(32) [[DATA]], ptr addrspace(2) noundef align 4 dereferenceable(32) @test.data, i64 32, i1 false) ++-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] +++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] ++ ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 ++ ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] ++ ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 ++-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @foo(ptr nonnull [[ARRAYIDX]]) +++; CHECK-NEXT: [[TMP1:%.*]] = call i32 @foo(ptr [[ARRAYIDX]]) ++ ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT]], i64 [[Y:%.*]] ++ ; CHECK-NEXT: store i32 [[TMP1]], ptr addrspace(1) [[ARRAYIDX2]], align 4 ++ ; CHECK-NEXT: ret void ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/memcpy-from-global.ll b/llvm/test/Transforms/InstCombine/memcpy-from-global.ll ++--- a/llvm/test/Transforms/InstCombine/memcpy-from-global.ll +++++ b/llvm/test/Transforms/InstCombine/memcpy-from-global.ll ++@@ -322,7 +322,7 @@ ++ ; CHECK-NEXT: [[A:%.*]] = alloca [4 x float], align 4 ++ ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[A]]) ++ ; CHECK-NEXT: call void @llvm.memcpy.p0.p1.i64(ptr align 4 [[A]], ptr addrspace(1) align 4 @I, i64 16, i1 true) ++-; CHECK-NEXT: [[G:%.*]] = getelementptr inbounds nuw [4 x float], ptr [[A]], i64 0, i64 [[I:%.*]] +++; CHECK-NEXT: [[G:%.*]] = getelementptr inbounds [4 x float], ptr [[A]], i64 0, i64 [[I:%.*]] ++ ; CHECK-NEXT: [[R:%.*]] = load float, ptr [[G]], align 4 ++ ; CHECK-NEXT: ret float [[R]] ++ ; ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/stpcpy-1.ll b/llvm/test/Transforms/InstCombine/stpcpy-1.ll ++--- a/llvm/test/Transforms/InstCombine/stpcpy-1.ll +++++ b/llvm/test/Transforms/InstCombine/stpcpy-1.ll ++@@ -25,7 +25,7 @@ ++ define ptr @test_simplify2() { ++ ; CHECK-LABEL: @test_simplify2( ++ ; CHECK-NEXT: [[STRLEN:%.*]] = call i32 @strlen(ptr noundef nonnull dereferenceable(1) @a) ++-; CHECK-NEXT: [[RET:%.*]] = getelementptr inbounds nuw i8, ptr @a, i32 [[STRLEN]] +++; CHECK-NEXT: [[RET:%.*]] = getelementptr inbounds i8, ptr @a, i32 [[STRLEN]] ++ ; CHECK-NEXT: ret ptr [[RET]] ++ ; ++ %ret = call ptr @stpcpy(ptr @a, ptr @a) ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/stpcpy_chk-1.ll b/llvm/test/Transforms/InstCombine/stpcpy_chk-1.ll ++--- a/llvm/test/Transforms/InstCombine/stpcpy_chk-1.ll +++++ b/llvm/test/Transforms/InstCombine/stpcpy_chk-1.ll ++@@ -93,7 +93,7 @@ ++ define ptr @test_simplify6() { ++ ; CHECK-LABEL: @test_simplify6( ++ ; CHECK-NEXT: [[STRLEN:%.*]] = call i32 @strlen(ptr noundef nonnull dereferenceable(1) @a) ++-; CHECK-NEXT: [[RET:%.*]] = getelementptr inbounds nuw i8, ptr @a, i32 [[STRLEN]] +++; CHECK-NEXT: [[RET:%.*]] = getelementptr inbounds i8, ptr @a, i32 [[STRLEN]] ++ ; CHECK-NEXT: ret ptr [[RET]] ++ ; ++ ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/strlen-1.ll b/llvm/test/Transforms/InstCombine/strlen-1.ll ++--- a/llvm/test/Transforms/InstCombine/strlen-1.ll +++++ b/llvm/test/Transforms/InstCombine/strlen-1.ll ++@@ -155,7 +155,7 @@ ++ ++ define i32 @test_no_simplify2(i32 %x) { ++ ; CHECK-LABEL: @test_no_simplify2( ++-; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw [7 x i8], ptr @null_hello, i32 0, i32 [[X:%.*]] +++; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds [7 x i8], ptr @null_hello, i32 0, i32 [[X:%.*]] ++ ; CHECK-NEXT: [[HELLO_L:%.*]] = call i32 @strlen(ptr noundef nonnull dereferenceable(1) [[HELLO_P]]) ++ ; CHECK-NEXT: ret i32 [[HELLO_L]] ++ ; ++@@ -166,8 +166,8 @@ ++ ++ define i32 @test_no_simplify2_no_null_opt(i32 %x) #0 { ++ ; CHECK-LABEL: @test_no_simplify2_no_null_opt( ++-; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw [7 x i8], ptr @null_hello, i32 0, i32 [[X:%.*]] ++-; CHECK-NEXT: [[HELLO_L:%.*]] = call i32 @strlen(ptr noundef nonnull dereferenceable(1) [[HELLO_P]]) +++; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds [7 x i8], ptr @null_hello, i32 0, i32 [[X:%.*]] +++; CHECK-NEXT: [[HELLO_L:%.*]] = call i32 @strlen(ptr noundef [[HELLO_P]]) ++ ; CHECK-NEXT: ret i32 [[HELLO_L]] ++ ; ++ %hello_p = getelementptr inbounds [7 x i8], ptr @null_hello, i32 0, i32 %x ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/strlen-4.ll b/llvm/test/Transforms/InstCombine/strlen-4.ll ++--- a/llvm/test/Transforms/InstCombine/strlen-4.ll +++++ b/llvm/test/Transforms/InstCombine/strlen-4.ll ++@@ -18,7 +18,7 @@ ++ ++ define i64 @fold_strlen_s3_pi_s5(i1 %X, i64 %I) { ++ ; CHECK-LABEL: @fold_strlen_s3_pi_s5( ++-; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] +++; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] ++ ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], ptr [[PS3_PI]], ptr @s5 ++ ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) ++ ; CHECK-NEXT: ret i64 [[LEN]] ++@@ -40,7 +40,7 @@ ++ ; XFAIL-CHECK-NEXT: [[SEL:%.*]] = select i1 %0, i64 [[DIF_I]], i64 5 ++ ; XFAIL-CHECK-NEXT: ret i64 [[SEL]] ++ ; CHECK-LABEL: @fold_strlen_s3_pi_p1_s5( ++-; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[TMP1:%.*]] +++; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[TMP1:%.*]] ++ ; CHECK-NEXT: [[PS3_PI_P1:%.*]] = getelementptr i8, ptr [[PS3_PI]], i64 1 ++ ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS3_PI_P1]], ptr @s5 ++ ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) ++@@ -61,7 +61,7 @@ ++ ++ define i64 @call_strlen_s5_3_pi_s5(i1 %0, i64 %1) { ++ ; CHECK-LABEL: @call_strlen_s5_3_pi_s5( ++-; CHECK-NEXT: [[PS5_3_PI:%.*]] = getelementptr inbounds nuw [10 x i8], ptr @s5_3, i64 0, i64 [[TMP1:%.*]] +++; CHECK-NEXT: [[PS5_3_PI:%.*]] = getelementptr inbounds [10 x i8], ptr @s5_3, i64 0, i64 [[TMP1:%.*]] ++ ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS5_3_PI]], ptr @s5 ++ ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) ++ ; CHECK-NEXT: ret i64 [[LEN]] ++@@ -78,7 +78,7 @@ ++ ++ define i64 @call_strlen_s5_3_s5_pj(i1 %X, i64 %J) { ++ ; CHECK-LABEL: @call_strlen_s5_3_s5_pj( ++-; CHECK-NEXT: [[PS5:%.*]] = getelementptr inbounds nuw [6 x i8], ptr @s5, i64 0, i64 [[J:%.*]] +++; CHECK-NEXT: [[PS5:%.*]] = getelementptr inbounds [6 x i8], ptr @s5, i64 0, i64 [[J:%.*]] ++ ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], ptr @s5_3, ptr [[PS5]] ++ ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) ++ ; CHECK-NEXT: ret i64 [[LEN]] ++@@ -95,7 +95,7 @@ ++ ++ define i64 @fold_strlen_s3_s5_pj(i1 %X, i64 %J) { ++ ; CHECK-LABEL: @fold_strlen_s3_s5_pj( ++-; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds nuw [6 x i8], ptr @s5, i64 0, i64 [[J:%.*]] +++; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds [6 x i8], ptr @s5, i64 0, i64 [[J:%.*]] ++ ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], ptr @s3, ptr [[PS5_PJ]] ++ ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) ++ ; CHECK-NEXT: ret i64 [[LEN]] ++@@ -114,7 +114,7 @@ ++ ++ define i64 @call_strlen_s3_s5_3_pj(i1 %0, i64 %1) { ++ ; CHECK-LABEL: @call_strlen_s3_s5_3_pj( ++-; CHECK-NEXT: [[PS5_3_PJ:%.*]] = getelementptr inbounds nuw [10 x i8], ptr @s5_3, i64 0, i64 [[TMP1:%.*]] +++; CHECK-NEXT: [[PS5_3_PJ:%.*]] = getelementptr inbounds [10 x i8], ptr @s5_3, i64 0, i64 [[TMP1:%.*]] ++ ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr @s3, ptr [[PS5_3_PJ]] ++ ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) ++ ; CHECK-NEXT: ret i64 [[LEN]] ++@@ -131,8 +131,8 @@ ++ ++ define i64 @fold_strlen_s3_pi_s5_pj(i1 %X, i64 %I, i64 %J) { ++ ; CHECK-LABEL: @fold_strlen_s3_pi_s5_pj( ++-; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] ++-; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds nuw [6 x i8], ptr @s5, i64 0, i64 [[J:%.*]] +++; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] +++; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds [6 x i8], ptr @s5, i64 0, i64 [[J:%.*]] ++ ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], ptr [[PS3_PI]], ptr [[PS5_PJ]] ++ ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) ++ ; CHECK-NEXT: ret i64 [[LEN]] ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/strncat-2.ll b/llvm/test/Transforms/InstCombine/strncat-2.ll ++--- a/llvm/test/Transforms/InstCombine/strncat-2.ll +++++ b/llvm/test/Transforms/InstCombine/strncat-2.ll ++@@ -13,7 +13,7 @@ ++ define void @test_simplify1() { ++ ; CHECK-LABEL: @test_simplify1( ++ ; CHECK-NEXT: [[STRLEN:%.*]] = call i32 @strlen(ptr noundef nonnull dereferenceable(1) @a) ++-; CHECK-NEXT: [[ENDPTR:%.*]] = getelementptr inbounds nuw i8, ptr @a, i32 [[STRLEN]] +++; CHECK-NEXT: [[ENDPTR:%.*]] = getelementptr inbounds i8, ptr @a, i32 [[STRLEN]] ++ ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr noundef nonnull align 1 dereferenceable(6) [[ENDPTR]], ptr noundef nonnull align 1 dereferenceable(6) @hello, i32 6, i1 false) ++ ; CHECK-NEXT: ret void ++ ; ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/strnlen-3.ll b/llvm/test/Transforms/InstCombine/strnlen-3.ll ++--- a/llvm/test/Transforms/InstCombine/strnlen-3.ll +++++ b/llvm/test/Transforms/InstCombine/strnlen-3.ll ++@@ -31,7 +31,7 @@ ++ ++ define i64 @call_strnlen_sx_pi_n(i64 %i, i64 %n) { ++ ; CHECK-LABEL: @call_strnlen_sx_pi_n( ++-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [0 x i8], ptr @sx, i64 0, i64 [[I:%.*]] +++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [0 x i8], ptr @sx, i64 0, i64 [[I:%.*]] ++ ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[PTR]], i64 [[N:%.*]]) ++ ; CHECK-NEXT: ret i64 [[LEN]] ++ ; ++@@ -46,7 +46,7 @@ ++ ++ define i64 @call_strnlen_a3_pi_2(i64 %i) { ++ ; CHECK-LABEL: @call_strnlen_a3_pi_2( ++-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [3 x i8], ptr @a3, i64 0, i64 [[I:%.*]] +++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [3 x i8], ptr @a3, i64 0, i64 [[I:%.*]] ++ ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 2) ++ ; CHECK-NEXT: ret i64 [[LEN]] ++ ; ++@@ -61,7 +61,7 @@ ++ ++ define i64 @call_strnlen_a3_pi_3(i64 %i) { ++ ; CHECK-LABEL: @call_strnlen_a3_pi_3( ++-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [3 x i8], ptr @a3, i64 0, i64 [[I:%.*]] +++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [3 x i8], ptr @a3, i64 0, i64 [[I:%.*]] ++ ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 3) ++ ; CHECK-NEXT: ret i64 [[LEN]] ++ ; ++@@ -111,7 +111,7 @@ ++ ++ define i64 @call_strnlen_s5_3_pi_n(i64 zeroext %i, i64 %n) { ++ ; CHECK-LABEL: @call_strnlen_s5_3_pi_n( ++-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [10 x i8], ptr @s5_3, i64 0, i64 [[I:%.*]] +++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [10 x i8], ptr @s5_3, i64 0, i64 [[I:%.*]] ++ ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[PTR]], i64 [[N:%.*]]) ++ ; CHECK-NEXT: ret i64 [[LEN]] ++ ; ++@@ -151,7 +151,7 @@ ++ ++ define i64 @fold_strnlen_a3_pi_2(i64 %i) { ++ ; CHECK-LABEL: @fold_strnlen_a3_pi_2( ++-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [3 x i8], ptr @a3, i64 0, i64 [[I:%.*]] +++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [3 x i8], ptr @a3, i64 0, i64 [[I:%.*]] ++ ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 2) ++ ; CHECK-NEXT: ret i64 [[LEN]] ++ ; ++@@ -166,7 +166,7 @@ ++ ++ define i64 @fold_strnlen_s3_pi_2(i64 %i) { ++ ; CHECK-LABEL: @fold_strnlen_s3_pi_2( ++-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] +++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] ++ ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 2) ++ ; CHECK-NEXT: ret i64 [[LEN]] ++ ; ++@@ -181,7 +181,7 @@ ++ ++ define i64 @fold_strnlen_s3_pi_3(i64 %i) { ++ ; CHECK-LABEL: @fold_strnlen_s3_pi_3( ++-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] +++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] ++ ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 3) ++ ; CHECK-NEXT: ret i64 [[LEN]] ++ ; ++@@ -196,7 +196,7 @@ ++ ++ define i64 @fold_strnlen_s3_pi_n(i64 %i, i64 %n) { ++ ; CHECK-LABEL: @fold_strnlen_s3_pi_n( ++-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] +++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] ++ ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[PTR]], i64 [[N:%.*]]) ++ ; CHECK-NEXT: ret i64 [[LEN]] ++ ; ++@@ -212,7 +212,7 @@ ++ ++ define i64 @call_strnlen_s5_3_pi_2(i64 %i) { ++ ; CHECK-LABEL: @call_strnlen_s5_3_pi_2( ++-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [10 x i8], ptr @s5_3, i64 0, i64 [[I:%.*]] +++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [10 x i8], ptr @s5_3, i64 0, i64 [[I:%.*]] ++ ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 2) ++ ; CHECK-NEXT: ret i64 [[LEN]] ++ ; ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/strnlen-4.ll b/llvm/test/Transforms/InstCombine/strnlen-4.ll ++--- a/llvm/test/Transforms/InstCombine/strnlen-4.ll +++++ b/llvm/test/Transforms/InstCombine/strnlen-4.ll ++@@ -17,7 +17,7 @@ ++ ++ define i64 @fold_strnlen_s3_pi_s5_n(i1 %C, i64 %i, i64 %n) { ++ ; CHECK-LABEL: @fold_strnlen_s3_pi_s5_n( ++-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] +++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] ++ ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[C:%.*]], ptr [[PTR]], ptr @s5 ++ ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[SEL]], i64 [[N:%.*]]) ++ ; CHECK-NEXT: ret i64 [[LEN]] ++@@ -57,7 +57,7 @@ ++ ++ define i64 @call_strnlen_s3_pi_sx_n(i1 %C, i64 %i, i64 %n) { ++ ; CHECK-LABEL: @call_strnlen_s3_pi_sx_n( ++-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] +++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] ++ ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[C:%.*]], ptr [[PTR]], ptr @sx ++ ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[SEL]], i64 [[N:%.*]]) ++ ; CHECK-NEXT: ret i64 [[LEN]] ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/strnlen-5.ll b/llvm/test/Transforms/InstCombine/strnlen-5.ll ++--- a/llvm/test/Transforms/InstCombine/strnlen-5.ll +++++ b/llvm/test/Transforms/InstCombine/strnlen-5.ll ++@@ -164,7 +164,7 @@ ++ ++ define i1 @fold_strnlen_a5_pi_nz_eqz(i64 %i, i64 %n) { ++ ; CHECK-LABEL: @fold_strnlen_a5_pi_nz_eqz( ++-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [5 x i8], ptr @a5, i64 0, i64 [[I:%.*]] +++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [5 x i8], ptr @a5, i64 0, i64 [[I:%.*]] ++ ; CHECK-NEXT: [[CHAR0:%.*]] = load i8, ptr [[PTR]], align 1 ++ ; CHECK-NEXT: [[EQZ:%.*]] = icmp eq i8 [[CHAR0]], 0 ++ ; CHECK-NEXT: ret i1 [[EQZ]] ++@@ -200,7 +200,7 @@ ++ ++ define i1 @call_strnlen_s5_pi_n_eqz(i64 %i, i64 %n) { ++ ; CHECK-LABEL: @call_strnlen_s5_pi_n_eqz( ++-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [6 x i8], ptr @s5, i64 0, i64 [[I:%.*]] +++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [6 x i8], ptr @s5, i64 0, i64 [[I:%.*]] ++ ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[PTR]], i64 [[N:%.*]]) ++ ; CHECK-NEXT: [[EQZ:%.*]] = icmp eq i64 [[LEN]], 0 ++ ; CHECK-NEXT: ret i1 [[EQZ]] ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/sub-gep.ll b/llvm/test/Transforms/InstCombine/sub-gep.ll ++--- a/llvm/test/Transforms/InstCombine/sub-gep.ll +++++ b/llvm/test/Transforms/InstCombine/sub-gep.ll ++@@ -305,7 +305,7 @@ ++ ++ define i64 @test24b(ptr %P, i64 %A){ ++ ; CHECK-LABEL: @test24b( ++-; CHECK-NEXT: [[B_IDX:%.*]] = shl nuw nsw i64 [[A:%.*]], 1 +++; CHECK-NEXT: [[B_IDX:%.*]] = shl nsw i64 [[A:%.*]], 1 ++ ; CHECK-NEXT: ret i64 [[B_IDX]] ++ ; ++ %B = getelementptr inbounds [42 x i16], ptr @Arr, i64 0, i64 %A ++@@ -316,7 +316,7 @@ ++ ++ define i64 @test25(ptr %P, i64 %A){ ++ ; CHECK-LABEL: @test25( ++-; CHECK-NEXT: [[B_IDX:%.*]] = shl nuw nsw i64 [[A:%.*]], 1 +++; CHECK-NEXT: [[B_IDX:%.*]] = shl nsw i64 [[A:%.*]], 1 ++ ; CHECK-NEXT: [[GEPDIFF:%.*]] = add nsw i64 [[B_IDX]], -84 ++ ; CHECK-NEXT: ret i64 [[GEPDIFF]] ++ ; ++@@ -395,7 +395,7 @@ ++ define i16 @test25_as1(ptr addrspace(1) %P, i64 %A) { ++ ; CHECK-LABEL: @test25_as1( ++ ; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[A:%.*]] to i16 ++-; CHECK-NEXT: [[B_IDX:%.*]] = shl nuw nsw i16 [[TMP1]], 1 +++; CHECK-NEXT: [[B_IDX:%.*]] = shl nsw i16 [[TMP1]], 1 ++ ; CHECK-NEXT: [[GEPDIFF:%.*]] = add nsw i16 [[B_IDX]], -84 ++ ; CHECK-NEXT: ret i16 [[GEPDIFF]] ++ ; ++@@ -409,7 +409,7 @@ ++ ++ define i64 @ptrtoint_sub_zext_ptrtoint_as2_inbounds(i32 %offset) { ++ ; CHECK-LABEL: @ptrtoint_sub_zext_ptrtoint_as2_inbounds( ++-; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds nuw bfloat, ptr addrspace(2) @Arr_as2, i32 [[OFFSET:%.*]] +++; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds bfloat, ptr addrspace(2) @Arr_as2, i32 [[OFFSET:%.*]] ++ ; CHECK-NEXT: [[B:%.*]] = ptrtoint ptr addrspace(2) [[A]] to i32 ++ ; CHECK-NEXT: [[C:%.*]] = zext i32 [[B]] to i64 ++ ; CHECK-NEXT: [[D:%.*]] = sub nsw i64 ptrtoint (ptr addrspace(2) @Arr_as2 to i64), [[C]] ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/wcslen-1.ll b/llvm/test/Transforms/InstCombine/wcslen-1.ll ++--- a/llvm/test/Transforms/InstCombine/wcslen-1.ll +++++ b/llvm/test/Transforms/InstCombine/wcslen-1.ll ++@@ -149,7 +149,7 @@ ++ define i64 @test_no_simplify2(i32 %x) { ++ ; CHECK-LABEL: @test_no_simplify2( ++ ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[X:%.*]] to i64 ++-; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw [7 x i32], ptr @null_hello, i64 0, i64 [[TMP1]] +++; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds [7 x i32], ptr @null_hello, i64 0, i64 [[TMP1]] ++ ; CHECK-NEXT: [[HELLO_L:%.*]] = call i64 @wcslen(ptr nonnull [[HELLO_P]]) ++ ; CHECK-NEXT: ret i64 [[HELLO_L]] ++ ; ++@@ -161,8 +161,8 @@ ++ define i64 @test_no_simplify2_no_null_opt(i32 %x) #0 { ++ ; CHECK-LABEL: @test_no_simplify2_no_null_opt( ++ ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[X:%.*]] to i64 ++-; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw [7 x i32], ptr @null_hello, i64 0, i64 [[TMP1]] ++-; CHECK-NEXT: [[HELLO_L:%.*]] = call i64 @wcslen(ptr nonnull [[HELLO_P]]) +++; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds [7 x i32], ptr @null_hello, i64 0, i64 [[TMP1]] +++; CHECK-NEXT: [[HELLO_L:%.*]] = call i64 @wcslen(ptr [[HELLO_P]]) ++ ; CHECK-NEXT: ret i64 [[HELLO_L]] ++ ; ++ %hello_p = getelementptr inbounds [7 x i32], ptr @null_hello, i32 0, i32 %x ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/wcslen-3.ll b/llvm/test/Transforms/InstCombine/wcslen-3.ll ++--- a/llvm/test/Transforms/InstCombine/wcslen-3.ll +++++ b/llvm/test/Transforms/InstCombine/wcslen-3.ll ++@@ -150,7 +150,7 @@ ++ define i64 @test_no_simplify2(i16 %x) { ++ ; CHECK-LABEL: @test_no_simplify2( ++ ; CHECK-NEXT: [[TMP1:%.*]] = sext i16 [[X:%.*]] to i64 ++-; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw [7 x i16], ptr @null_hello, i64 0, i64 [[TMP1]] +++; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds [7 x i16], ptr @null_hello, i64 0, i64 [[TMP1]] ++ ; CHECK-NEXT: [[HELLO_L:%.*]] = call i64 @wcslen(ptr nonnull [[HELLO_P]]) ++ ; CHECK-NEXT: ret i64 [[HELLO_L]] ++ ; ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/wcslen-5.ll b/llvm/test/Transforms/InstCombine/wcslen-5.ll ++--- a/llvm/test/Transforms/InstCombine/wcslen-5.ll +++++ b/llvm/test/Transforms/InstCombine/wcslen-5.ll ++@@ -19,7 +19,7 @@ ++ ++ define dso_local i64 @fold_wcslen_s3_pi_s5(i1 zeroext %0, i64 %1) { ++ ; CHECK-LABEL: @fold_wcslen_s3_pi_s5( ++-; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds nuw [4 x i32], ptr @ws3, i64 0, i64 [[TMP1:%.*]] +++; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i32], ptr @ws3, i64 0, i64 [[TMP1:%.*]] ++ ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS3_PI]], ptr @ws5 ++ ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) ++ ; CHECK-NEXT: ret i64 [[LEN]] ++@@ -41,7 +41,7 @@ ++ ; XFAIL-CHECK-NEXT: [[SEL:%.*]] = select i1 %0, i64 [[DIF_I]], i64 5 ++ ; XFAIL-CHECK-NEXT: ret i64 [[SEL]] ++ ; CHECK-LABEL: @fold_wcslen_s3_pi_p1_s5( ++-; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds nuw [4 x i32], ptr @ws3, i64 0, i64 [[TMP1:%.*]] +++; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i32], ptr @ws3, i64 0, i64 [[TMP1:%.*]] ++ ; CHECK-NEXT: [[PS3_PI_P1:%.*]] = getelementptr inbounds nuw i8, ptr [[PS3_PI]], i64 4 ++ ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS3_PI_P1]], ptr @ws5 ++ ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) ++@@ -62,7 +62,7 @@ ++ ++ define dso_local i64 @call_wcslen_s5_3_pi_s5(i1 zeroext %0, i64 %1) { ++ ; CHECK-LABEL: @call_wcslen_s5_3_pi_s5( ++-; CHECK-NEXT: [[PS5_3_PI:%.*]] = getelementptr inbounds nuw [10 x i32], ptr @ws5_3, i64 0, i64 [[TMP1:%.*]] +++; CHECK-NEXT: [[PS5_3_PI:%.*]] = getelementptr inbounds [10 x i32], ptr @ws5_3, i64 0, i64 [[TMP1:%.*]] ++ ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS5_3_PI]], ptr @ws5 ++ ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) ++ ; CHECK-NEXT: ret i64 [[LEN]] ++@@ -79,7 +79,7 @@ ++ ++ define dso_local i64 @call_wcslen_s5_3_s5_pj(i1 zeroext %0, i64 %1) { ++ ; CHECK-LABEL: @call_wcslen_s5_3_s5_pj( ++-; CHECK-NEXT: [[PS5:%.*]] = getelementptr inbounds nuw [6 x i32], ptr @ws5, i64 0, i64 [[TMP1:%.*]] +++; CHECK-NEXT: [[PS5:%.*]] = getelementptr inbounds [6 x i32], ptr @ws5, i64 0, i64 [[TMP1:%.*]] ++ ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr @ws5_3, ptr [[PS5]] ++ ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) ++ ; CHECK-NEXT: ret i64 [[LEN]] ++@@ -96,7 +96,7 @@ ++ ++ define dso_local i64 @fold_wcslen_s3_s5_pj(i1 zeroext %0, i64 %1) { ++ ; CHECK-LABEL: @fold_wcslen_s3_s5_pj( ++-; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds nuw [6 x i32], ptr @ws5, i64 0, i64 [[TMP1:%.*]] +++; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds [6 x i32], ptr @ws5, i64 0, i64 [[TMP1:%.*]] ++ ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr @ws3, ptr [[PS5_PJ]] ++ ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) ++ ; CHECK-NEXT: ret i64 [[LEN]] ++@@ -115,7 +115,7 @@ ++ ++ define dso_local i64 @call_wcslen_s3_s5_3_pj(i1 zeroext %0, i64 %1) { ++ ; CHECK-LABEL: @call_wcslen_s3_s5_3_pj( ++-; CHECK-NEXT: [[PS5_3_PJ:%.*]] = getelementptr inbounds nuw [10 x i32], ptr @ws5_3, i64 0, i64 [[TMP1:%.*]] +++; CHECK-NEXT: [[PS5_3_PJ:%.*]] = getelementptr inbounds [10 x i32], ptr @ws5_3, i64 0, i64 [[TMP1:%.*]] ++ ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr @ws3, ptr [[PS5_3_PJ]] ++ ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) ++ ; CHECK-NEXT: ret i64 [[LEN]] ++@@ -132,8 +132,8 @@ + ++ define dso_local i64 @fold_wcslen_s3_pi_s5_pj(i1 zeroext %0, i64 %1, i64 %2) { ++ ; CHECK-LABEL: @fold_wcslen_s3_pi_s5_pj( ++-; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds nuw [4 x i32], ptr @ws3, i64 0, i64 [[TMP1:%.*]] ++-; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds nuw [6 x i32], ptr @ws5, i64 0, i64 [[TMP2:%.*]] +++; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i32], ptr @ws3, i64 0, i64 [[TMP1:%.*]] +++; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds [6 x i32], ptr @ws5, i64 0, i64 [[TMP2:%.*]] ++ ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS3_PI]], ptr [[PS5_PJ]] ++ ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) ++ ; CHECK-NEXT: ret i64 [[LEN]] ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll b/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll ++--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll +++++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll ++@@ -557,7 +557,7 @@ ++ ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ++ ; CHECK: vector.body: ++ ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] ++-; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [1048576 x i32], ptr @idx_array, i64 0, i64 [[INDEX]] +++; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1048576 x i32], ptr @idx_array, i64 0, i64 [[INDEX]] ++ ; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load , ptr [[TMP5]], align 4 ++ ; CHECK-NEXT: [[TMP14:%.*]] = sext [[WIDE_LOAD1]] to ++ ; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1048576 x i32], ptr @data_array, i64 0, [[TMP14]] ++@@ -573,10 +573,10 @@ ++ ; CHECK-NEXT: br label [[FOR_BODY:%.*]] ++ ; CHECK: for.body: ++ ; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY]] ] ++-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [1048576 x i32], ptr @idx_array, i64 0, i64 [[IV]] +++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1048576 x i32], ptr @idx_array, i64 0, i64 [[IV]] ++ ; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 ++ ; CHECK-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP9]] to i64 ++-; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds nuw [1048576 x i32], ptr @data_array, i64 0, i64 [[IDXPROM5]] +++; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [1048576 x i32], ptr @data_array, i64 0, i64 [[IDXPROM5]] ++ ; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[ARRAYIDX6]], align 4 ++ ; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP10]], 1 ++ ; CHECK-NEXT: store i32 [[INC]], ptr [[ARRAYIDX6]], align 4 ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll b/llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll ++--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll +++++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll ++@@ -36,14 +36,14 @@ ++ ; CHECK: vector.body: ++ ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] ++ ; CHECK-NEXT: [[OFFSET_IDX:%.*]] = shl i64 [[INDEX]], 1 ++-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [1024 x i32], ptr @AB, i64 0, i64 [[OFFSET_IDX]] +++; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1024 x i32], ptr @AB, i64 0, i64 [[OFFSET_IDX]] ++ ; CHECK-NEXT: [[WIDE_VEC:%.*]] = load , ptr [[TMP2]], align 4 ++ ; CHECK-NEXT: [[STRIDED_VEC:%.*]] = call { , } @llvm.vector.deinterleave2.nxv8i32( [[WIDE_VEC]]) ++ ; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { , } [[STRIDED_VEC]], 0 ++ ; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { , } [[STRIDED_VEC]], 1 ++ ; CHECK-NEXT: [[TMP6:%.*]] = add nsw [[TMP3]], [[BROADCAST_SPLAT]] ++ ; CHECK-NEXT: [[TMP7:%.*]] = mul nsw [[TMP4]], [[BROADCAST_SPLAT2]] ++-; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [1024 x i32], ptr @CD, i64 0, i64 [[OFFSET_IDX]] +++; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1024 x i32], ptr @CD, i64 0, i64 [[OFFSET_IDX]] ++ ; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = call @llvm.vector.interleave2.nxv8i32( [[TMP6]], [[TMP7]]) ++ ; CHECK-NEXT: store [[INTERLEAVED_VEC]], ptr [[TMP8]], align 4 ++ ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP1]] ++@@ -127,7 +127,7 @@ ++ ; CHECK-NEXT: [[WIDE_MASKED_GATHER1:%.*]] = call @llvm.masked.gather.nxv4i16.nxv4p0( [[TMP8]], i32 2, splat (i1 true), poison) ++ ; CHECK-NEXT: [[TMP9:%.*]] = sext [[WIDE_MASKED_GATHER]] to ++ ; CHECK-NEXT: [[TMP10:%.*]] = add nsw [[BROADCAST_SPLAT]], [[TMP9]] ++-; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [1024 x i32], ptr @CD, i64 0, i64 [[OFFSET_IDX]] +++; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1024 x i32], ptr @CD, i64 0, i64 [[OFFSET_IDX]] ++ ; CHECK-NEXT: [[TMP11:%.*]] = sext [[WIDE_MASKED_GATHER1]] to ++ ; CHECK-NEXT: [[TMP12:%.*]] = mul nsw [[BROADCAST_SPLAT3]], [[TMP11]] ++ ; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = call @llvm.vector.interleave2.nxv8i32( [[TMP10]], [[TMP12]]) ++@@ -209,7 +209,7 @@ ++ ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] ++ ; CHECK-NEXT: [[VEC_IND:%.*]] = phi [ [[TMP3]], [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ] ++ ; CHECK-NEXT: [[OFFSET_IDX:%.*]] = shl i64 [[INDEX]], 1 ++-; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [1024 x i32], ptr @AB, i64 0, i64 [[OFFSET_IDX]] +++; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1024 x i32], ptr @AB, i64 0, i64 [[OFFSET_IDX]] ++ ; CHECK-NEXT: [[WIDE_VEC:%.*]] = load , ptr [[TMP6]], align 4 ++ ; CHECK-NEXT: [[STRIDED_VEC:%.*]] = call { , } @llvm.vector.deinterleave2.nxv8i32( [[WIDE_VEC]]) ++ ; CHECK-NEXT: [[TMP7:%.*]] = extractvalue { , } [[STRIDED_VEC]], 0 ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll b/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll ++--- a/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll +++++ b/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll ++@@ -34,13 +34,13 @@ ++ ; CHECK: vector.body: ++ ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] ++ ; CHECK-NEXT: [[OFFSET_IDX:%.*]] = shl i64 [[INDEX]], 1 ++-; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [1024 x i32], ptr @AB, i64 0, i64 [[OFFSET_IDX]] +++; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1024 x i32], ptr @AB, i64 0, i64 [[OFFSET_IDX]] ++ ; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <8 x i32>, ptr [[TMP0]], align 4 ++ ; CHECK-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> ++ ; CHECK-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> ++ ; CHECK-NEXT: [[TMP2:%.*]] = add nsw <4 x i32> [[STRIDED_VEC]], [[BROADCAST_SPLAT]] ++ ; CHECK-NEXT: [[TMP3:%.*]] = mul nsw <4 x i32> [[STRIDED_VEC1]], [[BROADCAST_SPLAT3]] ++-; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [1024 x i32], ptr @CD, i64 0, i64 [[OFFSET_IDX]] +++; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1024 x i32], ptr @CD, i64 0, i64 [[OFFSET_IDX]] ++ ; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> [[TMP3]], <8 x i32> ++ ; CHECK-NEXT: store <8 x i32> [[INTERLEAVED_VEC]], ptr [[TMP4]], align 4 ++ ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 ++@@ -113,7 +113,7 @@ ++ ; CHECK-NEXT: [[STRIDED_VEC2:%.*]] = shufflevector <12 x i32> [[WIDE_VEC]], <12 x i32> poison, <4 x i32> ++ ; CHECK-NEXT: [[STRIDED_VEC3:%.*]] = shufflevector <12 x i32> [[WIDE_VEC]], <12 x i32> poison, <4 x i32> ++ ; CHECK-NEXT: [[TMP0:%.*]] = add nsw <4 x i32> [[STRIDED_VEC]], splat (i32 1) ++-; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [1024 x %struct.ST3], ptr @S, i64 0, i64 [[INDEX]], i32 0 +++; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1024 x %struct.ST3], ptr @S, i64 0, i64 [[INDEX]], i32 0 ++ ; CHECK-NEXT: [[TMP1:%.*]] = add nsw <4 x i32> [[STRIDED_VEC2]], splat (i32 2) ++ ; CHECK-NEXT: [[TMP2:%.*]] = add nsw <4 x i32> [[STRIDED_VEC3]], splat (i32 3) ++ ; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x i32> [[TMP0]], <4 x i32> [[TMP1]], <8 x i32> ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll b/llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll ++--- a/llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll +++++ b/llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll ++@@ -24,10 +24,10 @@ ++ ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ++ ; CHECK: vector.body: ++ ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] ++-; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [40000 x i8], ptr addrspace(1) @Y, i64 0, i64 [[INDEX]] +++; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds [40000 x i8], ptr addrspace(1) @Y, i64 0, i64 [[INDEX]] ++ ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i8>, ptr addrspace(1) [[TMP0]], align 1 ++ ; CHECK-NEXT: [[TMP1:%.*]] = add <4 x i8> [[WIDE_LOAD]], splat (i8 1) ++-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [40000 x i8], ptr @X, i64 0, i64 [[INDEX]] +++; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [40000 x i8], ptr @X, i64 0, i64 [[INDEX]] ++ ; CHECK-NEXT: store <4 x i8> [[TMP1]], ptr [[TMP2]], align 1 ++ ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 ++ ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 40000 ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/LoopVectorize/non-const-n.ll b/llvm/test/Transforms/LoopVectorize/non-const-n.ll ++--- a/llvm/test/Transforms/LoopVectorize/non-const-n.ll +++++ b/llvm/test/Transforms/LoopVectorize/non-const-n.ll ++@@ -19,12 +19,12 @@ ++ ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ++ ; CHECK: vector.body: ++ ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] ++-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[INDEX]] +++; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[INDEX]] ++ ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP2]], align 4 ++-; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @c, i64 0, i64 [[INDEX]] +++; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [2048 x i32], ptr @c, i64 0, i64 [[INDEX]] ++ ; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, ptr [[TMP3]], align 4 ++ ; CHECK-NEXT: [[TMP4:%.*]] = add nsw <4 x i32> [[WIDE_LOAD1]], [[WIDE_LOAD]] ++-; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @a, i64 0, i64 [[INDEX]] +++; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2048 x i32], ptr @a, i64 0, i64 [[INDEX]] ++ ; CHECK-NEXT: store <4 x i32> [[TMP4]], ptr [[TMP5]], align 4 ++ ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 ++ ; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX]], [[TMP1]] ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/LoopVectorize/X86/small-size.ll b/llvm/test/Transforms/LoopVectorize/X86/small-size.ll ++--- a/llvm/test/Transforms/LoopVectorize/X86/small-size.ll +++++ b/llvm/test/Transforms/LoopVectorize/X86/small-size.ll ++@@ -28,12 +28,12 @@ ++ ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ++ ; CHECK: vector.body: ++ ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] ++-; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[INDEX]] +++; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[INDEX]] ++ ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP1]], align 4 ++-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @c, i64 0, i64 [[INDEX]] +++; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2048 x i32], ptr @c, i64 0, i64 [[INDEX]] ++ ; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, ptr [[TMP2]], align 4 ++ ; CHECK-NEXT: [[TMP3:%.*]] = add nsw <4 x i32> [[WIDE_LOAD1]], [[WIDE_LOAD]] ++-; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @a, i64 0, i64 [[INDEX]] +++; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2048 x i32], ptr @a, i64 0, i64 [[INDEX]] ++ ; CHECK-NEXT: store <4 x i32> [[TMP3]], ptr [[TMP4]], align 4 ++ ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 ++ ; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256 ++@@ -89,7 +89,7 @@ ++ ; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP3]], i64 0 ++ ; CHECK-NEXT: br i1 [[TMP4]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] ++ ; CHECK: pred.store.if: ++-; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[INDEX]] +++; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[INDEX]] ++ ; CHECK-NEXT: store i32 [[X:%.*]], ptr [[TMP5]], align 4 ++ ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]] ++ ; CHECK: pred.store.continue: ++@@ -97,7 +97,7 @@ ++ ; CHECK-NEXT: br i1 [[TMP6]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2:%.*]] ++ ; CHECK: pred.store.if1: ++ ; CHECK-NEXT: [[TMP7:%.*]] = or disjoint i64 [[INDEX]], 1 ++-; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[TMP7]] +++; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[TMP7]] ++ ; CHECK-NEXT: store i32 [[X]], ptr [[TMP8]], align 4 ++ ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE2]] ++ ; CHECK: pred.store.continue2: ++@@ -105,7 +105,7 @@ ++ ; CHECK-NEXT: br i1 [[TMP9]], label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]] ++ ; CHECK: pred.store.if3: ++ ; CHECK-NEXT: [[TMP10:%.*]] = or disjoint i64 [[INDEX]], 2 ++-; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[TMP10]] +++; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[TMP10]] ++ ; CHECK-NEXT: store i32 [[X]], ptr [[TMP11]], align 4 ++ ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE4]] ++ ; CHECK: pred.store.continue4: ++@@ -113,7 +113,7 @@ ++ ; CHECK-NEXT: br i1 [[TMP12]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6]] ++ ; CHECK: pred.store.if5: ++ ; CHECK-NEXT: [[TMP13:%.*]] = or disjoint i64 [[INDEX]], 3 ++-; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[TMP13]] +++; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[TMP13]] ++ ; CHECK-NEXT: store i32 [[X]], ptr [[TMP14]], align 4 ++ ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE6]] ++ ; CHECK: pred.store.continue6: ++@@ -152,11 +152,11 @@ ++ ; CHECK-NEXT: [[TMP19:%.*]] = extractelement <4 x i1> [[TMP18]], i64 0 ++ ; CHECK-NEXT: br i1 [[TMP19]], label [[PRED_STORE_IF21:%.*]], label [[PRED_STORE_CONTINUE22:%.*]] ++ ; CHECK: pred.store.if21: ++-; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[OFFSET_IDX]] +++; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[OFFSET_IDX]] ++ ; CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 ++-; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @c, i64 0, i64 [[OFFSET_IDX]] +++; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2048 x i32], ptr @c, i64 0, i64 [[OFFSET_IDX]] ++ ; CHECK-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4 ++-; CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @a, i64 0, i64 [[OFFSET_IDX]] +++; CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2048 x i32], ptr @a, i64 0, i64 [[OFFSET_IDX]] ++ ; CHECK-NEXT: [[TMP25:%.*]] = and i32 [[TMP23]], [[TMP21]] ++ ; CHECK-NEXT: store i32 [[TMP25]], ptr [[TMP24]], align 4 ++ ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE22]] ++@@ -165,11 +165,11 @@ ++ ; CHECK-NEXT: br i1 [[TMP26]], label [[PRED_STORE_IF23:%.*]], label [[PRED_STORE_CONTINUE24:%.*]] ++ ; CHECK: pred.store.if23: ++ ; CHECK-NEXT: [[TMP27:%.*]] = add i64 [[OFFSET_IDX]], 1 ++-; CHECK-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[TMP27]] +++; CHECK-NEXT: [[TMP28:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[TMP27]] ++ ; CHECK-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 4 ++-; CHECK-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @c, i64 0, i64 [[TMP27]] +++; CHECK-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2048 x i32], ptr @c, i64 0, i64 [[TMP27]] ++ ; CHECK-NEXT: [[TMP31:%.*]] = load i32, ptr [[TMP30]], align 4 ++-; CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @a, i64 0, i64 [[TMP27]] +++; CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds [2048 x i32], ptr @a, i64 0, i64 [[TMP27]] ++ ; CHECK-NEXT: [[TMP33:%.*]] = and i32 [[TMP31]], [[TMP29]] ++ ; CHECK-NEXT: store i32 [[TMP33]], ptr [[TMP32]], align 4 ++ ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE24]] ++@@ -178,11 +178,11 @@ ++ ; CHECK-NEXT: br i1 [[TMP34]], label [[PRED_STORE_IF25:%.*]], label [[PRED_STORE_CONTINUE26:%.*]] ++ ; CHECK: pred.store.if25: ++ ; CHECK-NEXT: [[TMP35:%.*]] = add i64 [[OFFSET_IDX]], 2 ++-; CHECK-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[TMP35]] +++; CHECK-NEXT: [[TMP36:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[TMP35]] ++ ; CHECK-NEXT: [[TMP37:%.*]] = load i32, ptr [[TMP36]], align 4 ++-; CHECK-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @c, i64 0, i64 [[TMP35]] +++; CHECK-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2048 x i32], ptr @c, i64 0, i64 [[TMP35]] ++ ; CHECK-NEXT: [[TMP39:%.*]] = load i32, ptr [[TMP38]], align 4 ++-; CHECK-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @a, i64 0, i64 [[TMP35]] +++; CHECK-NEXT: [[TMP40:%.*]] = getelementptr inbounds [2048 x i32], ptr @a, i64 0, i64 [[TMP35]] ++ ; CHECK-NEXT: [[TMP41:%.*]] = and i32 [[TMP39]], [[TMP37]] ++ ; CHECK-NEXT: store i32 [[TMP41]], ptr [[TMP40]], align 4 ++ ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE26]] ++@@ -191,11 +191,11 @@ ++ ; CHECK-NEXT: br i1 [[TMP42]], label [[PRED_STORE_IF27:%.*]], label [[PRED_STORE_CONTINUE28]] ++ ; CHECK: pred.store.if27: ++ ; CHECK-NEXT: [[TMP43:%.*]] = add i64 [[OFFSET_IDX]], 3 ++-; CHECK-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[TMP43]] +++; CHECK-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[TMP43]] ++ ; CHECK-NEXT: [[TMP45:%.*]] = load i32, ptr [[TMP44]], align 4 ++-; CHECK-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @c, i64 0, i64 [[TMP43]] +++; CHECK-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2048 x i32], ptr @c, i64 0, i64 [[TMP43]] ++ ; CHECK-NEXT: [[TMP47:%.*]] = load i32, ptr [[TMP46]], align 4 ++-; CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @a, i64 0, i64 [[TMP43]] +++; CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2048 x i32], ptr @a, i64 0, i64 [[TMP43]] ++ ; CHECK-NEXT: [[TMP49:%.*]] = and i32 [[TMP47]], [[TMP45]] ++ ; CHECK-NEXT: store i32 [[TMP49]], ptr [[TMP48]], align 4 ++ ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE28]] ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll b/llvm/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll ++--- a/llvm/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll +++++ b/llvm/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll ++@@ -14,8 +14,8 @@ ++ ; CHECK: vector.body: ++ ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] ++ ; CHECK-NEXT: [[TMP0:%.*]] = or disjoint i64 [[INDEX]], 1 ++-; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [1024 x x86_fp80], ptr @x, i64 0, i64 [[INDEX]] ++-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [1024 x x86_fp80], ptr @x, i64 0, i64 [[TMP0]] +++; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1024 x x86_fp80], ptr @x, i64 0, i64 [[INDEX]] +++; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1024 x x86_fp80], ptr @x, i64 0, i64 [[TMP0]] ++ ; CHECK-NEXT: store x86_fp80 0xK3FFF8000000000000000, ptr [[TMP1]], align 16 ++ ; CHECK-NEXT: store x86_fp80 0xK3FFF8000000000000000, ptr [[TMP2]], align 16 ++ ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/PhaseOrdering/X86/excessive-unrolling.ll b/llvm/test/Transforms/PhaseOrdering/X86/excessive-unrolling.ll ++--- a/llvm/test/Transforms/PhaseOrdering/X86/excessive-unrolling.ll +++++ b/llvm/test/Transforms/PhaseOrdering/X86/excessive-unrolling.ll ++@@ -179,17 +179,17 @@ ++ ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ++ ; CHECK: vector.body: ++ ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] ++-; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [58 x double], ptr @b, i64 0, i64 [[INDEX]] +++; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds [58 x double], ptr @b, i64 0, i64 [[INDEX]] ++ ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP0]], i64 16 ++ ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x double>, ptr [[TMP0]], align 16 ++ ; CHECK-NEXT: [[WIDE_LOAD4:%.*]] = load <2 x double>, ptr [[TMP1]], align 16 ++-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [58 x double], ptr @c, i64 0, i64 [[INDEX]] +++; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [58 x double], ptr @c, i64 0, i64 [[INDEX]] ++ ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP2]], i64 16 ++ ; CHECK-NEXT: [[WIDE_LOAD5:%.*]] = load <2 x double>, ptr [[TMP2]], align 16 ++ ; CHECK-NEXT: [[WIDE_LOAD6:%.*]] = load <2 x double>, ptr [[TMP3]], align 16 ++ ; CHECK-NEXT: [[TMP4:%.*]] = fadd <2 x double> [[WIDE_LOAD]], [[WIDE_LOAD5]] ++ ; CHECK-NEXT: [[TMP5:%.*]] = fadd <2 x double> [[WIDE_LOAD4]], [[WIDE_LOAD6]] ++-; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [58 x double], ptr @a, i64 0, i64 [[INDEX]] +++; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [58 x double], ptr @a, i64 0, i64 [[INDEX]] ++ ; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP6]], i64 16 ++ ; CHECK-NEXT: store <2 x double> [[TMP4]], ptr [[TMP6]], align 16 ++ ; CHECK-NEXT: store <2 x double> [[TMP5]], ptr [[TMP7]], align 16 ++diff -ruN --strip-trailing-cr a/llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll b/llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll ++--- a/llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll +++++ b/llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll ++@@ -349,12 +349,12 @@ ++ ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_COND1_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY3]] ] ++ ; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[INDVARS_IV]] to i32 ++ ; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 1 ++-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP3]] +++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP3]] ++ ; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[INDVARS_IV]] to i32 ++-; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP4]] +++; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP4]] ++ ; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[INDVARS_IV]] to i32 ++ ; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP5]], 4 ++-; CHECK-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP6]] +++; CHECK-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP6]] ++ ; CHECK-NEXT: [[TMP7:%.*]] = load float, ptr [[ARRAYIDX31]], align 4 ++ ; CHECK-NEXT: [[TMP8:%.*]] = load <4 x float>, ptr [[ARRAYIDX]], align 4 ++ ; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <4 x float> [[TMP8]], <4 x float> poison, <4 x i32> ++@@ -363,7 +363,7 @@ ++ ; CHECK-NEXT: store <4 x float> [[TMP11]], ptr [[ARRAYIDX5]], align 4 ++ ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 5 ++ ; CHECK-NEXT: [[TMP12:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 ++-; CHECK-NEXT: [[ARRAYIDX41:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP12]] +++; CHECK-NEXT: [[ARRAYIDX41:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP12]] ++ ; CHECK-NEXT: [[TMP13]] = load float, ptr [[ARRAYIDX41]], align 4 ++ ; CHECK-NEXT: [[MUL45:%.*]] = fmul float [[TMP13]], [[TMP7]] ++ ; CHECK-NEXT: store float [[MUL45]], ptr [[ARRAYIDX31]], align 4 ++@@ -384,12 +384,12 @@ ++ ; SSE2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_COND1_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY3]] ] ++ ; SSE2-NEXT: [[TMP2:%.*]] = trunc i64 [[INDVARS_IV]] to i32 ++ ; SSE2-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 1 ++-; SSE2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP3]] +++; SSE2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP3]] ++ ; SSE2-NEXT: [[TMP4:%.*]] = trunc i64 [[INDVARS_IV]] to i32 ++-; SSE2-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP4]] +++; SSE2-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP4]] ++ ; SSE2-NEXT: [[TMP5:%.*]] = trunc i64 [[INDVARS_IV]] to i32 ++ ; SSE2-NEXT: [[TMP6:%.*]] = add i32 [[TMP5]], 4 ++-; SSE2-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP6]] +++; SSE2-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP6]] ++ ; SSE2-NEXT: [[TMP7:%.*]] = load float, ptr [[ARRAYIDX31]], align 4 ++ ; SSE2-NEXT: [[TMP8:%.*]] = load <4 x float>, ptr [[ARRAYIDX]], align 4 ++ ; SSE2-NEXT: [[TMP9:%.*]] = shufflevector <4 x float> [[TMP8]], <4 x float> poison, <4 x i32> ++@@ -398,7 +398,7 @@ ++ ; SSE2-NEXT: store <4 x float> [[TMP11]], ptr [[ARRAYIDX5]], align 4 ++ ; SSE2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 5 ++ ; SSE2-NEXT: [[TMP12:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 ++-; SSE2-NEXT: [[ARRAYIDX41:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP12]] +++; SSE2-NEXT: [[ARRAYIDX41:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP12]] ++ ; SSE2-NEXT: [[TMP13]] = load float, ptr [[ARRAYIDX41]], align 4 ++ ; SSE2-NEXT: [[MUL45:%.*]] = fmul float [[TMP13]], [[TMP7]] ++ ; SSE2-NEXT: store float [[MUL45]], ptr [[ARRAYIDX31]], align 4 diff --git a/third_party/llvm/workspace.bzl b/third_party/llvm/workspace.bzl -index 8caa08d..d9050b7 100644 +index d9050b7..780da28 100644 --- a/third_party/llvm/workspace.bzl +++ b/third_party/llvm/workspace.bzl @@ -4,8 +4,8 @@ load("//third_party:repo.bzl", "tf_http_archive") def repo(name): """Imports LLVM.""" -- LLVM_COMMIT = "af20aff35ec37ead88903bc3e44f6a81c5c9ca4e" -- LLVM_SHA256 = "6e31682011d8c483c6a41adf5389eb09ad7db84331ca985d33a5d59efd0388f6" -+ LLVM_COMMIT = "e86910337f98e57f5b9253f7d80d5b916eb1d97e" -+ LLVM_SHA256 = "4ca0eff0ca86ed6f2fdb7682354fdf4c85151d90ac9fb6e55a868e4191359e9f" +- LLVM_COMMIT = "e86910337f98e57f5b9253f7d80d5b916eb1d97e" +- LLVM_SHA256 = "4ca0eff0ca86ed6f2fdb7682354fdf4c85151d90ac9fb6e55a868e4191359e9f" ++ LLVM_COMMIT = "59890c13343af9e308281b3c76bac425087f4f8a" ++ LLVM_SHA256 = "bd80d5cbc94225c4ac944bc22df7772d2eb6b1df3e123d992b331a1b097847d4" tf_http_archive( name = name, diff --git a/third_party/shardy/workspace.bzl b/third_party/shardy/workspace.bzl index e8b991b6679d2..574ae13bd7504 100644 --- a/third_party/shardy/workspace.bzl +++ b/third_party/shardy/workspace.bzl @@ -3,8 +3,8 @@ load("//third_party:repo.bzl", "tf_http_archive", "tf_mirror_urls") def repo(): - SHARDY_COMMIT = "e24d7dcb6c818b686b94fcda64e7087ed8aa418d" - SHARDY_SHA256 = "79bdb36f692f444ae23d6469560daa1f621eb40936999b244062465a602293ab" + SHARDY_COMMIT = "fc78adaddd0822926759113171189438c47c358a" + SHARDY_SHA256 = "52e135f7d6168def65da792616d03643fde2ef36903951891739a9c47f09772c" tf_http_archive( name = "shardy", diff --git a/third_party/tsl/third_party/llvm/generated.patch b/third_party/tsl/third_party/llvm/generated.patch index b1fe52b944f9d..e2db28a1cd5b6 100644 --- a/third_party/tsl/third_party/llvm/generated.patch +++ b/third_party/tsl/third_party/llvm/generated.patch @@ -1,28 +1,87 @@ Auto generated patch. Do not edit or delete it, even if empty. -diff -ruN --strip-trailing-cr a/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp b/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp ---- a/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp -+++ b/llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp -@@ -654,8 +654,10 @@ - // There is a potential that the model could be adversarial and - // continually evict live ranges over and over again, leading to a - // large amount of compile time being spent in regalloc. If we hit the -- // threshold, prevent the range from being evicted. -- if (IntfCascade >= MaxCascade) -+ // threshold, prevent the range from being evicted. We still let the -+ // range through if it is urgent as we are required to produce an -+ // eviction if the candidate is not spillable. -+ if (IntfCascade >= MaxCascade && !Urgent) - return false; - - // Only evict older cascades or live ranges without a cascade. +diff -ruN --strip-trailing-cr a/clang/test/CodeGen/attr-counted-by.c b/clang/test/CodeGen/attr-counted-by.c +--- a/clang/test/CodeGen/attr-counted-by.c ++++ b/clang/test/CodeGen/attr-counted-by.c +@@ -1043,7 +1043,7 @@ + // NO-SANITIZE-WITH-ATTR-NEXT: call void @llvm.lifetime.start.p0(i64 24, ptr nonnull [[BAZ]]) #[[ATTR11:[0-9]+]] + // NO-SANITIZE-WITH-ATTR-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(24) [[BAZ]], ptr noundef nonnull align 4 dereferenceable(24) @test12_bar, i64 24, i1 false), !tbaa.struct [[TBAA_STRUCT7:![0-9]+]] + // NO-SANITIZE-WITH-ATTR-NEXT: [[IDXPROM:%.*]] = sext i32 [[INDEX]] to i64 +-// NO-SANITIZE-WITH-ATTR-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [6 x i32], ptr [[BAZ]], i64 0, i64 [[IDXPROM]] ++// NO-SANITIZE-WITH-ATTR-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [6 x i32], ptr [[BAZ]], i64 0, i64 [[IDXPROM]] + // NO-SANITIZE-WITH-ATTR-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !tbaa [[TBAA2]] + // NO-SANITIZE-WITH-ATTR-NEXT: store i32 [[TMP0]], ptr @test12_b, align 4, !tbaa [[TBAA2]] + // NO-SANITIZE-WITH-ATTR-NEXT: [[TMP1:%.*]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @test12_foo, i64 4), align 4, !tbaa [[TBAA2]] +@@ -1085,7 +1085,7 @@ + // NO-SANITIZE-WITHOUT-ATTR-NEXT: call void @llvm.lifetime.start.p0(i64 24, ptr nonnull [[BAZ]]) #[[ATTR9:[0-9]+]] + // NO-SANITIZE-WITHOUT-ATTR-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(24) [[BAZ]], ptr noundef nonnull align 4 dereferenceable(24) @test12_bar, i64 24, i1 false), !tbaa.struct [[TBAA_STRUCT7:![0-9]+]] + // NO-SANITIZE-WITHOUT-ATTR-NEXT: [[IDXPROM:%.*]] = sext i32 [[INDEX]] to i64 +-// NO-SANITIZE-WITHOUT-ATTR-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [6 x i32], ptr [[BAZ]], i64 0, i64 [[IDXPROM]] ++// NO-SANITIZE-WITHOUT-ATTR-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [6 x i32], ptr [[BAZ]], i64 0, i64 [[IDXPROM]] + // NO-SANITIZE-WITHOUT-ATTR-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !tbaa [[TBAA2]] + // NO-SANITIZE-WITHOUT-ATTR-NEXT: store i32 [[TMP0]], ptr @test12_b, align 4, !tbaa [[TBAA2]] + // NO-SANITIZE-WITHOUT-ATTR-NEXT: [[TMP1:%.*]] = load i32, ptr getelementptr inbounds nuw (i8, ptr @test12_foo, i64 4), align 4, !tbaa [[TBAA2]] +diff -ruN --strip-trailing-cr a/clang/test/CodeGen/union-tbaa1.c b/clang/test/CodeGen/union-tbaa1.c +--- a/clang/test/CodeGen/union-tbaa1.c ++++ b/clang/test/CodeGen/union-tbaa1.c +@@ -16,17 +16,17 @@ + // CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARR]], i32 [[TMP0]] + // CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !tbaa [[TBAA2]] + // CHECK-NEXT: [[MUL:%.*]] = mul i32 [[TMP1]], [[NUM]] +-// CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds nuw [4 x [2 x %union.vect32]], ptr [[TMP]], i32 0, i32 [[TMP0]] ++// CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x [2 x %union.vect32]], ptr [[TMP]], i32 0, i32 [[TMP0]] + // CHECK-NEXT: store i32 [[MUL]], ptr [[ARRAYIDX2]], align 8, !tbaa [[TBAA6:![0-9]+]] + // CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARR]], i32 [[TMP0]], i32 1 + // CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX5]], align 4, !tbaa [[TBAA2]] + // CHECK-NEXT: [[MUL6:%.*]] = mul i32 [[TMP2]], [[NUM]] +-// CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds nuw [4 x [2 x %union.vect32]], ptr [[TMP]], i32 0, i32 [[TMP0]], i32 1 ++// CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [4 x [2 x %union.vect32]], ptr [[TMP]], i32 0, i32 [[TMP0]], i32 1 + // CHECK-NEXT: store i32 [[MUL6]], ptr [[ARRAYIDX8]], align 4, !tbaa [[TBAA6]] + // CHECK-NEXT: [[TMP3:%.*]] = lshr i32 [[MUL]], 16 + // CHECK-NEXT: store i32 [[TMP3]], ptr [[VEC]], align 4, !tbaa [[TBAA2]] + // CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[INDEX]], align 4, !tbaa [[TBAA2]] +-// CHECK-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds nuw [4 x [2 x %union.vect32]], ptr [[TMP]], i32 0, i32 [[TMP4]], i32 1 ++// CHECK-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds [4 x [2 x %union.vect32]], ptr [[TMP]], i32 0, i32 [[TMP4]], i32 1 + // CHECK-NEXT: [[ARRAYIDX15:%.*]] = getelementptr inbounds nuw i8, ptr [[ARRAYIDX14]], i32 2 + // CHECK-NEXT: [[TMP5:%.*]] = load i16, ptr [[ARRAYIDX15]], align 2, !tbaa [[TBAA6]] + // CHECK-NEXT: [[CONV16:%.*]] = zext i16 [[TMP5]] to i32 +diff -ruN --strip-trailing-cr a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp +--- a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp ++++ b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp +@@ -3131,26 +3131,6 @@ + } + } + +- // The single (non-zero) index of an inbounds GEP of a base object cannot +- // be negative. +- auto HasOneNonZeroIndex = [&]() { +- bool FoundNonZero = false; +- for (Value *Idx : GEP.indices()) { +- auto *C = dyn_cast(Idx); +- if (C && C->isNullValue()) +- continue; +- if (FoundNonZero) +- return false; +- FoundNonZero = true; +- } +- return true; +- }; +- if (GEP.isInBounds() && !GEP.hasNoUnsignedWrap() && isBaseOfObject(PtrOp) && +- HasOneNonZeroIndex()) { +- GEP.setNoWrapFlags(GEP.getNoWrapFlags() | GEPNoWrapFlags::noUnsignedWrap()); +- return &GEP; +- } +- + // nusw + nneg -> nuw + if (GEP.hasNoUnsignedSignedWrap() && !GEP.hasNoUnsignedWrap() && + all_of(GEP.indices(), [&](Value *Idx) { diff -ruN --strip-trailing-cr a/llvm/test/CodeGen/NVPTX/nvcl-param-align.ll b/llvm/test/CodeGen/NVPTX/nvcl-param-align.ll --- a/llvm/test/CodeGen/NVPTX/nvcl-param-align.ll +++ b/llvm/test/CodeGen/NVPTX/nvcl-param-align.ll @@ -1,5 +1,5 @@ --; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 | FileCheck %s --; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 | %ptxas-verify %} -+; RUN: llc < %s -mtriple=nvptx64-nvidia-nvcl -mcpu=sm_20 | FileCheck %s -+; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64-nvidia-nvcl -mcpu=sm_20 | %ptxas-verify %} +-; RUN: llc < %s -mtriple=nvptx64-nvidia-nvcl -mcpu=sm_20 | FileCheck %s +-; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64-nvidia-nvcl -mcpu=sm_20 | %ptxas-verify %} ++; RUN: llc < %s -mtriple=nvptx64-nvidia-nvcl -mcpu=sm_60 | FileCheck %s ++; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64-nvidia-nvcl -mcpu=sm_60 | %ptxas-verify %} target triple = "nvptx-unknown-nvcl" @@ -36,3 +95,862 @@ diff -ruN --strip-trailing-cr a/llvm/test/CodeGen/NVPTX/surf-write.ll b/llvm/tes target triple = "nvptx-unknown-nvcl" +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll b/llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll +--- a/llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll ++++ b/llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll +@@ -53,7 +53,7 @@ + ; CHECK-LABEL: @memcpy_constant_arg_ptr_to_alloca_load_atomic( + ; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [32 x i64], align 8, addrspace(5) + ; CHECK-NEXT: call void @llvm.memcpy.p5.p4.i64(ptr addrspace(5) noundef align 8 dereferenceable(256) [[ALLOCA]], ptr addrspace(4) noundef align 8 dereferenceable(256) [[ARG:%.*]], i64 256, i1 false) +-; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds nuw [32 x i64], ptr addrspace(5) [[ALLOCA]], i32 0, i32 [[IDX:%.*]] ++; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [32 x i64], ptr addrspace(5) [[ALLOCA]], i32 0, i32 [[IDX:%.*]] + ; CHECK-NEXT: [[LOAD:%.*]] = load atomic i64, ptr addrspace(5) [[GEP]] syncscope("somescope") acquire, align 8 + ; CHECK-NEXT: ret i64 [[LOAD]] + ; +@@ -101,7 +101,7 @@ + ; CHECK-LABEL: @memcpy_constant_byref_arg_ptr_to_alloca_too_many_bytes( + ; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [32 x i8], align 4, addrspace(5) + ; CHECK-NEXT: call void @llvm.memcpy.p5.p4.i64(ptr addrspace(5) noundef align 4 dereferenceable(31) [[ALLOCA]], ptr addrspace(4) noundef align 4 dereferenceable(31) [[ARG:%.*]], i64 31, i1 false) +-; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds nuw [32 x i8], ptr addrspace(5) [[ALLOCA]], i32 0, i32 [[IDX:%.*]] ++; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [32 x i8], ptr addrspace(5) [[ALLOCA]], i32 0, i32 [[IDX:%.*]] + ; CHECK-NEXT: [[LOAD:%.*]] = load i8, ptr addrspace(5) [[GEP]], align 1 + ; CHECK-NEXT: store i8 [[LOAD]], ptr addrspace(1) [[OUT:%.*]], align 1 + ; CHECK-NEXT: ret void +@@ -120,7 +120,7 @@ + ; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [32 x i8], align 4, addrspace(5) + ; CHECK-NEXT: [[KERNARG_SEGMENT_PTR:%.*]] = call align 16 dereferenceable(32) ptr addrspace(4) @llvm.amdgcn.kernarg.segment.ptr() + ; CHECK-NEXT: call void @llvm.memcpy.p5.p4.i64(ptr addrspace(5) noundef align 4 dereferenceable(32) [[ALLOCA]], ptr addrspace(4) noundef align 16 dereferenceable(32) [[KERNARG_SEGMENT_PTR]], i64 32, i1 false) +-; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds nuw [32 x i8], ptr addrspace(5) [[ALLOCA]], i32 0, i32 [[IDX:%.*]] ++; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [32 x i8], ptr addrspace(5) [[ALLOCA]], i32 0, i32 [[IDX:%.*]] + ; CHECK-NEXT: [[LOAD:%.*]] = load i8, ptr addrspace(5) [[GEP]], align 1 + ; CHECK-NEXT: store i8 [[LOAD]], ptr addrspace(1) [[OUT:%.*]], align 1 + ; CHECK-NEXT: ret void +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/cast_phi.ll b/llvm/test/Transforms/InstCombine/cast_phi.ll +--- a/llvm/test/Transforms/InstCombine/cast_phi.ll ++++ b/llvm/test/Transforms/InstCombine/cast_phi.ll +@@ -31,8 +31,8 @@ + ; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i32 [[I12_06]], [[BASE:%.*]] + ; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[I12_06]], 1 + ; CHECK-NEXT: [[CONV_I9:%.*]] = sext i32 [[ADD]] to i64 +-; CHECK-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds nuw [258 x float], ptr [[CALLA]], i64 0, i64 [[CONV_I9]] +-; CHECK-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds nuw [258 x float], ptr [[CALLB]], i64 0, i64 [[CONV_I9]] ++; CHECK-NEXT: [[ARRAYIDX20:%.*]] = getelementptr inbounds [258 x float], ptr [[CALLA]], i64 0, i64 [[CONV_I9]] ++; CHECK-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds [258 x float], ptr [[CALLB]], i64 0, i64 [[CONV_I9]] + ; CHECK-NEXT: [[CMP40:%.*]] = icmp ult i32 [[I12_06]], [[BASE]] + ; CHECK-NEXT: br i1 [[TMP3]], label [[DOTBB4:%.*]], label [[DOTBB5:%.*]] + ; CHECK: .bb4: +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/load-cmp.ll b/llvm/test/Transforms/InstCombine/load-cmp.ll +--- a/llvm/test/Transforms/InstCombine/load-cmp.ll ++++ b/llvm/test/Transforms/InstCombine/load-cmp.ll +@@ -339,7 +339,7 @@ + define i1 @pr93017(i64 %idx) { + ; CHECK-LABEL: @pr93017( + ; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[IDX:%.*]] to i32 +-; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds nuw [2 x ptr], ptr @table, i32 0, i32 [[TMP1]] ++; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds [2 x ptr], ptr @table, i32 0, i32 [[TMP1]] + ; CHECK-NEXT: [[V:%.*]] = load ptr, ptr [[GEP]], align 4 + ; CHECK-NEXT: [[CMP:%.*]] = icmp ne ptr [[V]], null + ; CHECK-NEXT: ret i1 [[CMP]] +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/memcpy-addrspace.ll b/llvm/test/Transforms/InstCombine/memcpy-addrspace.ll +--- a/llvm/test/Transforms/InstCombine/memcpy-addrspace.ll ++++ b/llvm/test/Transforms/InstCombine/memcpy-addrspace.ll +@@ -6,7 +6,7 @@ + define void @test_load(ptr addrspace(1) %out, i64 %x) { + ; CHECK-LABEL: @test_load( + ; CHECK-NEXT: entry: +-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [8 x i32], ptr addrspace(2) @test.data, i64 0, i64 [[X:%.*]] ++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [8 x i32], ptr addrspace(2) @test.data, i64 0, i64 [[X:%.*]] + ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr addrspace(2) [[ARRAYIDX]], align 4 + ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] + ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 +@@ -45,7 +45,7 @@ + define void @test_load_bitcast_chain(ptr addrspace(1) %out, i64 %x) { + ; CHECK-LABEL: @test_load_bitcast_chain( + ; CHECK-NEXT: entry: +-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw i32, ptr addrspace(2) @test.data, i64 [[X:%.*]] ++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr addrspace(2) @test.data, i64 [[X:%.*]] + ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr addrspace(2) [[ARRAYIDX]], align 4 + ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] + ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 +@@ -66,7 +66,7 @@ + ; CHECK-NEXT: entry: + ; CHECK-NEXT: [[DATA:%.*]] = alloca [8 x i32], align 4 + ; CHECK-NEXT: call void @llvm.memcpy.p0.p2.i64(ptr noundef nonnull align 4 dereferenceable(32) [[DATA]], ptr addrspace(2) noundef align 4 dereferenceable(32) @test.data, i64 32, i1 false) +-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] ++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] + ; CHECK-NEXT: [[TMP0:%.*]] = call i32 @foo(ptr nonnull [[ARRAYIDX]]) + ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] + ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 +@@ -87,8 +87,8 @@ + ; CHECK-NEXT: entry: + ; CHECK-NEXT: [[DATA:%.*]] = alloca [8 x i32], align 4 + ; CHECK-NEXT: call void @llvm.memcpy.p0.p2.i64(ptr noundef nonnull align 4 dereferenceable(32) [[DATA]], ptr addrspace(2) noundef align 4 dereferenceable(32) @test.data, i64 32, i1 false) +-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] +-; CHECK-NEXT: [[TMP0:%.*]] = call i32 @foo(ptr nonnull [[ARRAYIDX]]) ++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] ++; CHECK-NEXT: [[TMP0:%.*]] = call i32 @foo(ptr [[ARRAYIDX]]) + ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] + ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 + ; CHECK-NEXT: ret void +@@ -108,7 +108,7 @@ + ; CHECK-NEXT: entry: + ; CHECK-NEXT: [[DATA:%.*]] = alloca [8 x i32], align 4 + ; CHECK-NEXT: call void @llvm.memcpy.p0.p2.i64(ptr noundef nonnull align 4 dereferenceable(32) [[DATA]], ptr addrspace(2) noundef align 4 dereferenceable(32) @test.data, i64 32, i1 false) +-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] ++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] + ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 + ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] + ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 +@@ -135,11 +135,11 @@ + ; CHECK-NEXT: entry: + ; CHECK-NEXT: [[DATA:%.*]] = alloca [8 x i32], align 4 + ; CHECK-NEXT: call void @llvm.memcpy.p0.p2.i64(ptr noundef nonnull align 4 dereferenceable(32) [[DATA]], ptr addrspace(2) noundef align 4 dereferenceable(32) @test.data, i64 32, i1 false) +-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] ++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [8 x i32], ptr [[DATA]], i64 0, i64 [[X:%.*]] + ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 + ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT:%.*]], i64 [[X]] + ; CHECK-NEXT: store i32 [[TMP0]], ptr addrspace(1) [[ARRAYIDX1]], align 4 +-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @foo(ptr nonnull [[ARRAYIDX]]) ++; CHECK-NEXT: [[TMP1:%.*]] = call i32 @foo(ptr [[ARRAYIDX]]) + ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, ptr addrspace(1) [[OUT]], i64 [[Y:%.*]] + ; CHECK-NEXT: store i32 [[TMP1]], ptr addrspace(1) [[ARRAYIDX2]], align 4 + ; CHECK-NEXT: ret void +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/memcpy-from-global.ll b/llvm/test/Transforms/InstCombine/memcpy-from-global.ll +--- a/llvm/test/Transforms/InstCombine/memcpy-from-global.ll ++++ b/llvm/test/Transforms/InstCombine/memcpy-from-global.ll +@@ -322,7 +322,7 @@ + ; CHECK-NEXT: [[A:%.*]] = alloca [4 x float], align 4 + ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr nonnull [[A]]) + ; CHECK-NEXT: call void @llvm.memcpy.p0.p1.i64(ptr align 4 [[A]], ptr addrspace(1) align 4 @I, i64 16, i1 true) +-; CHECK-NEXT: [[G:%.*]] = getelementptr inbounds nuw [4 x float], ptr [[A]], i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[G:%.*]] = getelementptr inbounds [4 x float], ptr [[A]], i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[R:%.*]] = load float, ptr [[G]], align 4 + ; CHECK-NEXT: ret float [[R]] + ; +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/stpcpy-1.ll b/llvm/test/Transforms/InstCombine/stpcpy-1.ll +--- a/llvm/test/Transforms/InstCombine/stpcpy-1.ll ++++ b/llvm/test/Transforms/InstCombine/stpcpy-1.ll +@@ -25,7 +25,7 @@ + define ptr @test_simplify2() { + ; CHECK-LABEL: @test_simplify2( + ; CHECK-NEXT: [[STRLEN:%.*]] = call i32 @strlen(ptr noundef nonnull dereferenceable(1) @a) +-; CHECK-NEXT: [[RET:%.*]] = getelementptr inbounds nuw i8, ptr @a, i32 [[STRLEN]] ++; CHECK-NEXT: [[RET:%.*]] = getelementptr inbounds i8, ptr @a, i32 [[STRLEN]] + ; CHECK-NEXT: ret ptr [[RET]] + ; + %ret = call ptr @stpcpy(ptr @a, ptr @a) +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/stpcpy_chk-1.ll b/llvm/test/Transforms/InstCombine/stpcpy_chk-1.ll +--- a/llvm/test/Transforms/InstCombine/stpcpy_chk-1.ll ++++ b/llvm/test/Transforms/InstCombine/stpcpy_chk-1.ll +@@ -93,7 +93,7 @@ + define ptr @test_simplify6() { + ; CHECK-LABEL: @test_simplify6( + ; CHECK-NEXT: [[STRLEN:%.*]] = call i32 @strlen(ptr noundef nonnull dereferenceable(1) @a) +-; CHECK-NEXT: [[RET:%.*]] = getelementptr inbounds nuw i8, ptr @a, i32 [[STRLEN]] ++; CHECK-NEXT: [[RET:%.*]] = getelementptr inbounds i8, ptr @a, i32 [[STRLEN]] + ; CHECK-NEXT: ret ptr [[RET]] + ; + +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/strlen-1.ll b/llvm/test/Transforms/InstCombine/strlen-1.ll +--- a/llvm/test/Transforms/InstCombine/strlen-1.ll ++++ b/llvm/test/Transforms/InstCombine/strlen-1.ll +@@ -155,7 +155,7 @@ + + define i32 @test_no_simplify2(i32 %x) { + ; CHECK-LABEL: @test_no_simplify2( +-; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw [7 x i8], ptr @null_hello, i32 0, i32 [[X:%.*]] ++; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds [7 x i8], ptr @null_hello, i32 0, i32 [[X:%.*]] + ; CHECK-NEXT: [[HELLO_L:%.*]] = call i32 @strlen(ptr noundef nonnull dereferenceable(1) [[HELLO_P]]) + ; CHECK-NEXT: ret i32 [[HELLO_L]] + ; +@@ -166,8 +166,8 @@ + + define i32 @test_no_simplify2_no_null_opt(i32 %x) #0 { + ; CHECK-LABEL: @test_no_simplify2_no_null_opt( +-; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw [7 x i8], ptr @null_hello, i32 0, i32 [[X:%.*]] +-; CHECK-NEXT: [[HELLO_L:%.*]] = call i32 @strlen(ptr noundef nonnull dereferenceable(1) [[HELLO_P]]) ++; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds [7 x i8], ptr @null_hello, i32 0, i32 [[X:%.*]] ++; CHECK-NEXT: [[HELLO_L:%.*]] = call i32 @strlen(ptr noundef [[HELLO_P]]) + ; CHECK-NEXT: ret i32 [[HELLO_L]] + ; + %hello_p = getelementptr inbounds [7 x i8], ptr @null_hello, i32 0, i32 %x +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/strlen-4.ll b/llvm/test/Transforms/InstCombine/strlen-4.ll +--- a/llvm/test/Transforms/InstCombine/strlen-4.ll ++++ b/llvm/test/Transforms/InstCombine/strlen-4.ll +@@ -18,7 +18,7 @@ + + define i64 @fold_strlen_s3_pi_s5(i1 %X, i64 %I) { + ; CHECK-LABEL: @fold_strlen_s3_pi_s5( +-; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], ptr [[PS3_PI]], ptr @s5 + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +@@ -40,7 +40,7 @@ + ; XFAIL-CHECK-NEXT: [[SEL:%.*]] = select i1 %0, i64 [[DIF_I]], i64 5 + ; XFAIL-CHECK-NEXT: ret i64 [[SEL]] + ; CHECK-LABEL: @fold_strlen_s3_pi_p1_s5( +-; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[TMP1:%.*]] ++; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[TMP1:%.*]] + ; CHECK-NEXT: [[PS3_PI_P1:%.*]] = getelementptr i8, ptr [[PS3_PI]], i64 1 + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS3_PI_P1]], ptr @s5 + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) +@@ -61,7 +61,7 @@ + + define i64 @call_strlen_s5_3_pi_s5(i1 %0, i64 %1) { + ; CHECK-LABEL: @call_strlen_s5_3_pi_s5( +-; CHECK-NEXT: [[PS5_3_PI:%.*]] = getelementptr inbounds nuw [10 x i8], ptr @s5_3, i64 0, i64 [[TMP1:%.*]] ++; CHECK-NEXT: [[PS5_3_PI:%.*]] = getelementptr inbounds [10 x i8], ptr @s5_3, i64 0, i64 [[TMP1:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS5_3_PI]], ptr @s5 + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +@@ -78,7 +78,7 @@ + + define i64 @call_strlen_s5_3_s5_pj(i1 %X, i64 %J) { + ; CHECK-LABEL: @call_strlen_s5_3_s5_pj( +-; CHECK-NEXT: [[PS5:%.*]] = getelementptr inbounds nuw [6 x i8], ptr @s5, i64 0, i64 [[J:%.*]] ++; CHECK-NEXT: [[PS5:%.*]] = getelementptr inbounds [6 x i8], ptr @s5, i64 0, i64 [[J:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], ptr @s5_3, ptr [[PS5]] + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +@@ -95,7 +95,7 @@ + + define i64 @fold_strlen_s3_s5_pj(i1 %X, i64 %J) { + ; CHECK-LABEL: @fold_strlen_s3_s5_pj( +-; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds nuw [6 x i8], ptr @s5, i64 0, i64 [[J:%.*]] ++; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds [6 x i8], ptr @s5, i64 0, i64 [[J:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], ptr @s3, ptr [[PS5_PJ]] + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +@@ -114,7 +114,7 @@ + + define i64 @call_strlen_s3_s5_3_pj(i1 %0, i64 %1) { + ; CHECK-LABEL: @call_strlen_s3_s5_3_pj( +-; CHECK-NEXT: [[PS5_3_PJ:%.*]] = getelementptr inbounds nuw [10 x i8], ptr @s5_3, i64 0, i64 [[TMP1:%.*]] ++; CHECK-NEXT: [[PS5_3_PJ:%.*]] = getelementptr inbounds [10 x i8], ptr @s5_3, i64 0, i64 [[TMP1:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr @s3, ptr [[PS5_3_PJ]] + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +@@ -131,8 +131,8 @@ + + define i64 @fold_strlen_s3_pi_s5_pj(i1 %X, i64 %I, i64 %J) { + ; CHECK-LABEL: @fold_strlen_s3_pi_s5_pj( +-; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] +-; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds nuw [6 x i8], ptr @s5, i64 0, i64 [[J:%.*]] ++; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds [6 x i8], ptr @s5, i64 0, i64 [[J:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[X:%.*]], ptr [[PS3_PI]], ptr [[PS5_PJ]] + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @strlen(ptr noundef nonnull dereferenceable(1) [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/strncat-2.ll b/llvm/test/Transforms/InstCombine/strncat-2.ll +--- a/llvm/test/Transforms/InstCombine/strncat-2.ll ++++ b/llvm/test/Transforms/InstCombine/strncat-2.ll +@@ -13,7 +13,7 @@ + define void @test_simplify1() { + ; CHECK-LABEL: @test_simplify1( + ; CHECK-NEXT: [[STRLEN:%.*]] = call i32 @strlen(ptr noundef nonnull dereferenceable(1) @a) +-; CHECK-NEXT: [[ENDPTR:%.*]] = getelementptr inbounds nuw i8, ptr @a, i32 [[STRLEN]] ++; CHECK-NEXT: [[ENDPTR:%.*]] = getelementptr inbounds i8, ptr @a, i32 [[STRLEN]] + ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr noundef nonnull align 1 dereferenceable(6) [[ENDPTR]], ptr noundef nonnull align 1 dereferenceable(6) @hello, i32 6, i1 false) + ; CHECK-NEXT: ret void + ; +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/strnlen-3.ll b/llvm/test/Transforms/InstCombine/strnlen-3.ll +--- a/llvm/test/Transforms/InstCombine/strnlen-3.ll ++++ b/llvm/test/Transforms/InstCombine/strnlen-3.ll +@@ -31,7 +31,7 @@ + + define i64 @call_strnlen_sx_pi_n(i64 %i, i64 %n) { + ; CHECK-LABEL: @call_strnlen_sx_pi_n( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [0 x i8], ptr @sx, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [0 x i8], ptr @sx, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[PTR]], i64 [[N:%.*]]) + ; CHECK-NEXT: ret i64 [[LEN]] + ; +@@ -46,7 +46,7 @@ + + define i64 @call_strnlen_a3_pi_2(i64 %i) { + ; CHECK-LABEL: @call_strnlen_a3_pi_2( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [3 x i8], ptr @a3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [3 x i8], ptr @a3, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 2) + ; CHECK-NEXT: ret i64 [[LEN]] + ; +@@ -61,7 +61,7 @@ + + define i64 @call_strnlen_a3_pi_3(i64 %i) { + ; CHECK-LABEL: @call_strnlen_a3_pi_3( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [3 x i8], ptr @a3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [3 x i8], ptr @a3, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 3) + ; CHECK-NEXT: ret i64 [[LEN]] + ; +@@ -111,7 +111,7 @@ + + define i64 @call_strnlen_s5_3_pi_n(i64 zeroext %i, i64 %n) { + ; CHECK-LABEL: @call_strnlen_s5_3_pi_n( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [10 x i8], ptr @s5_3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [10 x i8], ptr @s5_3, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[PTR]], i64 [[N:%.*]]) + ; CHECK-NEXT: ret i64 [[LEN]] + ; +@@ -151,7 +151,7 @@ + + define i64 @fold_strnlen_a3_pi_2(i64 %i) { + ; CHECK-LABEL: @fold_strnlen_a3_pi_2( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [3 x i8], ptr @a3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [3 x i8], ptr @a3, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 2) + ; CHECK-NEXT: ret i64 [[LEN]] + ; +@@ -166,7 +166,7 @@ + + define i64 @fold_strnlen_s3_pi_2(i64 %i) { + ; CHECK-LABEL: @fold_strnlen_s3_pi_2( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 2) + ; CHECK-NEXT: ret i64 [[LEN]] + ; +@@ -181,7 +181,7 @@ + + define i64 @fold_strnlen_s3_pi_3(i64 %i) { + ; CHECK-LABEL: @fold_strnlen_s3_pi_3( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 3) + ; CHECK-NEXT: ret i64 [[LEN]] + ; +@@ -196,7 +196,7 @@ + + define i64 @fold_strnlen_s3_pi_n(i64 %i, i64 %n) { + ; CHECK-LABEL: @fold_strnlen_s3_pi_n( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[PTR]], i64 [[N:%.*]]) + ; CHECK-NEXT: ret i64 [[LEN]] + ; +@@ -212,7 +212,7 @@ + + define i64 @call_strnlen_s5_3_pi_2(i64 %i) { + ; CHECK-LABEL: @call_strnlen_s5_3_pi_2( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [10 x i8], ptr @s5_3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [10 x i8], ptr @s5_3, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr noundef nonnull dereferenceable(1) [[PTR]], i64 2) + ; CHECK-NEXT: ret i64 [[LEN]] + ; +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/strnlen-4.ll b/llvm/test/Transforms/InstCombine/strnlen-4.ll +--- a/llvm/test/Transforms/InstCombine/strnlen-4.ll ++++ b/llvm/test/Transforms/InstCombine/strnlen-4.ll +@@ -17,7 +17,7 @@ + + define i64 @fold_strnlen_s3_pi_s5_n(i1 %C, i64 %i, i64 %n) { + ; CHECK-LABEL: @fold_strnlen_s3_pi_s5_n( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[C:%.*]], ptr [[PTR]], ptr @s5 + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[SEL]], i64 [[N:%.*]]) + ; CHECK-NEXT: ret i64 [[LEN]] +@@ -57,7 +57,7 @@ + + define i64 @call_strnlen_s3_pi_sx_n(i1 %C, i64 %i, i64 %n) { + ; CHECK-LABEL: @call_strnlen_s3_pi_sx_n( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [4 x i8], ptr @s3, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[C:%.*]], ptr [[PTR]], ptr @sx + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[SEL]], i64 [[N:%.*]]) + ; CHECK-NEXT: ret i64 [[LEN]] +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/strnlen-5.ll b/llvm/test/Transforms/InstCombine/strnlen-5.ll +--- a/llvm/test/Transforms/InstCombine/strnlen-5.ll ++++ b/llvm/test/Transforms/InstCombine/strnlen-5.ll +@@ -164,7 +164,7 @@ + + define i1 @fold_strnlen_a5_pi_nz_eqz(i64 %i, i64 %n) { + ; CHECK-LABEL: @fold_strnlen_a5_pi_nz_eqz( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [5 x i8], ptr @a5, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [5 x i8], ptr @a5, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[CHAR0:%.*]] = load i8, ptr [[PTR]], align 1 + ; CHECK-NEXT: [[EQZ:%.*]] = icmp eq i8 [[CHAR0]], 0 + ; CHECK-NEXT: ret i1 [[EQZ]] +@@ -200,7 +200,7 @@ + + define i1 @call_strnlen_s5_pi_n_eqz(i64 %i, i64 %n) { + ; CHECK-LABEL: @call_strnlen_s5_pi_n_eqz( +-; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds nuw [6 x i8], ptr @s5, i64 0, i64 [[I:%.*]] ++; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds [6 x i8], ptr @s5, i64 0, i64 [[I:%.*]] + ; CHECK-NEXT: [[LEN:%.*]] = call i64 @strnlen(ptr nonnull [[PTR]], i64 [[N:%.*]]) + ; CHECK-NEXT: [[EQZ:%.*]] = icmp eq i64 [[LEN]], 0 + ; CHECK-NEXT: ret i1 [[EQZ]] +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/sub-gep.ll b/llvm/test/Transforms/InstCombine/sub-gep.ll +--- a/llvm/test/Transforms/InstCombine/sub-gep.ll ++++ b/llvm/test/Transforms/InstCombine/sub-gep.ll +@@ -305,7 +305,7 @@ + + define i64 @test24b(ptr %P, i64 %A){ + ; CHECK-LABEL: @test24b( +-; CHECK-NEXT: [[B_IDX:%.*]] = shl nuw nsw i64 [[A:%.*]], 1 ++; CHECK-NEXT: [[B_IDX:%.*]] = shl nsw i64 [[A:%.*]], 1 + ; CHECK-NEXT: ret i64 [[B_IDX]] + ; + %B = getelementptr inbounds [42 x i16], ptr @Arr, i64 0, i64 %A +@@ -316,7 +316,7 @@ + + define i64 @test25(ptr %P, i64 %A){ + ; CHECK-LABEL: @test25( +-; CHECK-NEXT: [[B_IDX:%.*]] = shl nuw nsw i64 [[A:%.*]], 1 ++; CHECK-NEXT: [[B_IDX:%.*]] = shl nsw i64 [[A:%.*]], 1 + ; CHECK-NEXT: [[GEPDIFF:%.*]] = add nsw i64 [[B_IDX]], -84 + ; CHECK-NEXT: ret i64 [[GEPDIFF]] + ; +@@ -395,7 +395,7 @@ + define i16 @test25_as1(ptr addrspace(1) %P, i64 %A) { + ; CHECK-LABEL: @test25_as1( + ; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[A:%.*]] to i16 +-; CHECK-NEXT: [[B_IDX:%.*]] = shl nuw nsw i16 [[TMP1]], 1 ++; CHECK-NEXT: [[B_IDX:%.*]] = shl nsw i16 [[TMP1]], 1 + ; CHECK-NEXT: [[GEPDIFF:%.*]] = add nsw i16 [[B_IDX]], -84 + ; CHECK-NEXT: ret i16 [[GEPDIFF]] + ; +@@ -409,7 +409,7 @@ + + define i64 @ptrtoint_sub_zext_ptrtoint_as2_inbounds(i32 %offset) { + ; CHECK-LABEL: @ptrtoint_sub_zext_ptrtoint_as2_inbounds( +-; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds nuw bfloat, ptr addrspace(2) @Arr_as2, i32 [[OFFSET:%.*]] ++; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds bfloat, ptr addrspace(2) @Arr_as2, i32 [[OFFSET:%.*]] + ; CHECK-NEXT: [[B:%.*]] = ptrtoint ptr addrspace(2) [[A]] to i32 + ; CHECK-NEXT: [[C:%.*]] = zext i32 [[B]] to i64 + ; CHECK-NEXT: [[D:%.*]] = sub nsw i64 ptrtoint (ptr addrspace(2) @Arr_as2 to i64), [[C]] +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/wcslen-1.ll b/llvm/test/Transforms/InstCombine/wcslen-1.ll +--- a/llvm/test/Transforms/InstCombine/wcslen-1.ll ++++ b/llvm/test/Transforms/InstCombine/wcslen-1.ll +@@ -149,7 +149,7 @@ + define i64 @test_no_simplify2(i32 %x) { + ; CHECK-LABEL: @test_no_simplify2( + ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[X:%.*]] to i64 +-; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw [7 x i32], ptr @null_hello, i64 0, i64 [[TMP1]] ++; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds [7 x i32], ptr @null_hello, i64 0, i64 [[TMP1]] + ; CHECK-NEXT: [[HELLO_L:%.*]] = call i64 @wcslen(ptr nonnull [[HELLO_P]]) + ; CHECK-NEXT: ret i64 [[HELLO_L]] + ; +@@ -161,8 +161,8 @@ + define i64 @test_no_simplify2_no_null_opt(i32 %x) #0 { + ; CHECK-LABEL: @test_no_simplify2_no_null_opt( + ; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[X:%.*]] to i64 +-; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw [7 x i32], ptr @null_hello, i64 0, i64 [[TMP1]] +-; CHECK-NEXT: [[HELLO_L:%.*]] = call i64 @wcslen(ptr nonnull [[HELLO_P]]) ++; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds [7 x i32], ptr @null_hello, i64 0, i64 [[TMP1]] ++; CHECK-NEXT: [[HELLO_L:%.*]] = call i64 @wcslen(ptr [[HELLO_P]]) + ; CHECK-NEXT: ret i64 [[HELLO_L]] + ; + %hello_p = getelementptr inbounds [7 x i32], ptr @null_hello, i32 0, i32 %x +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/wcslen-3.ll b/llvm/test/Transforms/InstCombine/wcslen-3.ll +--- a/llvm/test/Transforms/InstCombine/wcslen-3.ll ++++ b/llvm/test/Transforms/InstCombine/wcslen-3.ll +@@ -150,7 +150,7 @@ + define i64 @test_no_simplify2(i16 %x) { + ; CHECK-LABEL: @test_no_simplify2( + ; CHECK-NEXT: [[TMP1:%.*]] = sext i16 [[X:%.*]] to i64 +-; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds nuw [7 x i16], ptr @null_hello, i64 0, i64 [[TMP1]] ++; CHECK-NEXT: [[HELLO_P:%.*]] = getelementptr inbounds [7 x i16], ptr @null_hello, i64 0, i64 [[TMP1]] + ; CHECK-NEXT: [[HELLO_L:%.*]] = call i64 @wcslen(ptr nonnull [[HELLO_P]]) + ; CHECK-NEXT: ret i64 [[HELLO_L]] + ; +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/InstCombine/wcslen-5.ll b/llvm/test/Transforms/InstCombine/wcslen-5.ll +--- a/llvm/test/Transforms/InstCombine/wcslen-5.ll ++++ b/llvm/test/Transforms/InstCombine/wcslen-5.ll +@@ -19,7 +19,7 @@ + + define dso_local i64 @fold_wcslen_s3_pi_s5(i1 zeroext %0, i64 %1) { + ; CHECK-LABEL: @fold_wcslen_s3_pi_s5( +-; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds nuw [4 x i32], ptr @ws3, i64 0, i64 [[TMP1:%.*]] ++; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i32], ptr @ws3, i64 0, i64 [[TMP1:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS3_PI]], ptr @ws5 + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +@@ -41,7 +41,7 @@ + ; XFAIL-CHECK-NEXT: [[SEL:%.*]] = select i1 %0, i64 [[DIF_I]], i64 5 + ; XFAIL-CHECK-NEXT: ret i64 [[SEL]] + ; CHECK-LABEL: @fold_wcslen_s3_pi_p1_s5( +-; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds nuw [4 x i32], ptr @ws3, i64 0, i64 [[TMP1:%.*]] ++; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i32], ptr @ws3, i64 0, i64 [[TMP1:%.*]] + ; CHECK-NEXT: [[PS3_PI_P1:%.*]] = getelementptr inbounds nuw i8, ptr [[PS3_PI]], i64 4 + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS3_PI_P1]], ptr @ws5 + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) +@@ -62,7 +62,7 @@ + + define dso_local i64 @call_wcslen_s5_3_pi_s5(i1 zeroext %0, i64 %1) { + ; CHECK-LABEL: @call_wcslen_s5_3_pi_s5( +-; CHECK-NEXT: [[PS5_3_PI:%.*]] = getelementptr inbounds nuw [10 x i32], ptr @ws5_3, i64 0, i64 [[TMP1:%.*]] ++; CHECK-NEXT: [[PS5_3_PI:%.*]] = getelementptr inbounds [10 x i32], ptr @ws5_3, i64 0, i64 [[TMP1:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS5_3_PI]], ptr @ws5 + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +@@ -79,7 +79,7 @@ + + define dso_local i64 @call_wcslen_s5_3_s5_pj(i1 zeroext %0, i64 %1) { + ; CHECK-LABEL: @call_wcslen_s5_3_s5_pj( +-; CHECK-NEXT: [[PS5:%.*]] = getelementptr inbounds nuw [6 x i32], ptr @ws5, i64 0, i64 [[TMP1:%.*]] ++; CHECK-NEXT: [[PS5:%.*]] = getelementptr inbounds [6 x i32], ptr @ws5, i64 0, i64 [[TMP1:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr @ws5_3, ptr [[PS5]] + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +@@ -96,7 +96,7 @@ + + define dso_local i64 @fold_wcslen_s3_s5_pj(i1 zeroext %0, i64 %1) { + ; CHECK-LABEL: @fold_wcslen_s3_s5_pj( +-; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds nuw [6 x i32], ptr @ws5, i64 0, i64 [[TMP1:%.*]] ++; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds [6 x i32], ptr @ws5, i64 0, i64 [[TMP1:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr @ws3, ptr [[PS5_PJ]] + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +@@ -115,7 +115,7 @@ + + define dso_local i64 @call_wcslen_s3_s5_3_pj(i1 zeroext %0, i64 %1) { + ; CHECK-LABEL: @call_wcslen_s3_s5_3_pj( +-; CHECK-NEXT: [[PS5_3_PJ:%.*]] = getelementptr inbounds nuw [10 x i32], ptr @ws5_3, i64 0, i64 [[TMP1:%.*]] ++; CHECK-NEXT: [[PS5_3_PJ:%.*]] = getelementptr inbounds [10 x i32], ptr @ws5_3, i64 0, i64 [[TMP1:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr @ws3, ptr [[PS5_3_PJ]] + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +@@ -132,8 +132,8 @@ + + define dso_local i64 @fold_wcslen_s3_pi_s5_pj(i1 zeroext %0, i64 %1, i64 %2) { + ; CHECK-LABEL: @fold_wcslen_s3_pi_s5_pj( +-; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds nuw [4 x i32], ptr @ws3, i64 0, i64 [[TMP1:%.*]] +-; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds nuw [6 x i32], ptr @ws5, i64 0, i64 [[TMP2:%.*]] ++; CHECK-NEXT: [[PS3_PI:%.*]] = getelementptr inbounds [4 x i32], ptr @ws3, i64 0, i64 [[TMP1:%.*]] ++; CHECK-NEXT: [[PS5_PJ:%.*]] = getelementptr inbounds [6 x i32], ptr @ws5, i64 0, i64 [[TMP2:%.*]] + ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP0:%.*]], ptr [[PS3_PI]], ptr [[PS5_PJ]] + ; CHECK-NEXT: [[LEN:%.*]] = tail call i64 @wcslen(ptr nonnull [[SEL]]) + ; CHECK-NEXT: ret i64 [[LEN]] +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll b/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll +--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll ++++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll +@@ -557,7 +557,7 @@ + ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] + ; CHECK: vector.body: + ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] +-; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [1048576 x i32], ptr @idx_array, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1048576 x i32], ptr @idx_array, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load , ptr [[TMP5]], align 4 + ; CHECK-NEXT: [[TMP14:%.*]] = sext [[WIDE_LOAD1]] to + ; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1048576 x i32], ptr @data_array, i64 0, [[TMP14]] +@@ -573,10 +573,10 @@ + ; CHECK-NEXT: br label [[FOR_BODY:%.*]] + ; CHECK: for.body: + ; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY]] ] +-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [1048576 x i32], ptr @idx_array, i64 0, i64 [[IV]] ++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1048576 x i32], ptr @idx_array, i64 0, i64 [[IV]] + ; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 + ; CHECK-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP9]] to i64 +-; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds nuw [1048576 x i32], ptr @data_array, i64 0, i64 [[IDXPROM5]] ++; CHECK-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [1048576 x i32], ptr @data_array, i64 0, i64 [[IDXPROM5]] + ; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[ARRAYIDX6]], align 4 + ; CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP10]], 1 + ; CHECK-NEXT: store i32 [[INC]], ptr [[ARRAYIDX6]], align 4 +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll b/llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll +--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll ++++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll +@@ -36,14 +36,14 @@ + ; CHECK: vector.body: + ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] + ; CHECK-NEXT: [[OFFSET_IDX:%.*]] = shl i64 [[INDEX]], 1 +-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [1024 x i32], ptr @AB, i64 0, i64 [[OFFSET_IDX]] ++; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1024 x i32], ptr @AB, i64 0, i64 [[OFFSET_IDX]] + ; CHECK-NEXT: [[WIDE_VEC:%.*]] = load , ptr [[TMP2]], align 4 + ; CHECK-NEXT: [[STRIDED_VEC:%.*]] = call { , } @llvm.vector.deinterleave2.nxv8i32( [[WIDE_VEC]]) + ; CHECK-NEXT: [[TMP3:%.*]] = extractvalue { , } [[STRIDED_VEC]], 0 + ; CHECK-NEXT: [[TMP4:%.*]] = extractvalue { , } [[STRIDED_VEC]], 1 + ; CHECK-NEXT: [[TMP6:%.*]] = add nsw [[TMP3]], [[BROADCAST_SPLAT]] + ; CHECK-NEXT: [[TMP7:%.*]] = mul nsw [[TMP4]], [[BROADCAST_SPLAT2]] +-; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [1024 x i32], ptr @CD, i64 0, i64 [[OFFSET_IDX]] ++; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1024 x i32], ptr @CD, i64 0, i64 [[OFFSET_IDX]] + ; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = call @llvm.vector.interleave2.nxv8i32( [[TMP6]], [[TMP7]]) + ; CHECK-NEXT: store [[INTERLEAVED_VEC]], ptr [[TMP8]], align 4 + ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP1]] +@@ -127,7 +127,7 @@ + ; CHECK-NEXT: [[WIDE_MASKED_GATHER1:%.*]] = call @llvm.masked.gather.nxv4i16.nxv4p0( [[TMP8]], i32 2, splat (i1 true), poison) + ; CHECK-NEXT: [[TMP9:%.*]] = sext [[WIDE_MASKED_GATHER]] to + ; CHECK-NEXT: [[TMP10:%.*]] = add nsw [[BROADCAST_SPLAT]], [[TMP9]] +-; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [1024 x i32], ptr @CD, i64 0, i64 [[OFFSET_IDX]] ++; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1024 x i32], ptr @CD, i64 0, i64 [[OFFSET_IDX]] + ; CHECK-NEXT: [[TMP11:%.*]] = sext [[WIDE_MASKED_GATHER1]] to + ; CHECK-NEXT: [[TMP12:%.*]] = mul nsw [[BROADCAST_SPLAT3]], [[TMP11]] + ; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = call @llvm.vector.interleave2.nxv8i32( [[TMP10]], [[TMP12]]) +@@ -209,7 +209,7 @@ + ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] + ; CHECK-NEXT: [[VEC_IND:%.*]] = phi [ [[TMP3]], [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ] + ; CHECK-NEXT: [[OFFSET_IDX:%.*]] = shl i64 [[INDEX]], 1 +-; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [1024 x i32], ptr @AB, i64 0, i64 [[OFFSET_IDX]] ++; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1024 x i32], ptr @AB, i64 0, i64 [[OFFSET_IDX]] + ; CHECK-NEXT: [[WIDE_VEC:%.*]] = load , ptr [[TMP6]], align 4 + ; CHECK-NEXT: [[STRIDED_VEC:%.*]] = call { , } @llvm.vector.deinterleave2.nxv8i32( [[WIDE_VEC]]) + ; CHECK-NEXT: [[TMP7:%.*]] = extractvalue { , } [[STRIDED_VEC]], 0 +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll b/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll +--- a/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll ++++ b/llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll +@@ -34,13 +34,13 @@ + ; CHECK: vector.body: + ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] + ; CHECK-NEXT: [[OFFSET_IDX:%.*]] = shl i64 [[INDEX]], 1 +-; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [1024 x i32], ptr @AB, i64 0, i64 [[OFFSET_IDX]] ++; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1024 x i32], ptr @AB, i64 0, i64 [[OFFSET_IDX]] + ; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <8 x i32>, ptr [[TMP0]], align 4 + ; CHECK-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> + ; CHECK-NEXT: [[STRIDED_VEC1:%.*]] = shufflevector <8 x i32> [[WIDE_VEC]], <8 x i32> poison, <4 x i32> + ; CHECK-NEXT: [[TMP2:%.*]] = add nsw <4 x i32> [[STRIDED_VEC]], [[BROADCAST_SPLAT]] + ; CHECK-NEXT: [[TMP3:%.*]] = mul nsw <4 x i32> [[STRIDED_VEC1]], [[BROADCAST_SPLAT3]] +-; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [1024 x i32], ptr @CD, i64 0, i64 [[OFFSET_IDX]] ++; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1024 x i32], ptr @CD, i64 0, i64 [[OFFSET_IDX]] + ; CHECK-NEXT: [[INTERLEAVED_VEC:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> [[TMP3]], <8 x i32> + ; CHECK-NEXT: store <8 x i32> [[INTERLEAVED_VEC]], ptr [[TMP4]], align 4 + ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 +@@ -113,7 +113,7 @@ + ; CHECK-NEXT: [[STRIDED_VEC2:%.*]] = shufflevector <12 x i32> [[WIDE_VEC]], <12 x i32> poison, <4 x i32> + ; CHECK-NEXT: [[STRIDED_VEC3:%.*]] = shufflevector <12 x i32> [[WIDE_VEC]], <12 x i32> poison, <4 x i32> + ; CHECK-NEXT: [[TMP0:%.*]] = add nsw <4 x i32> [[STRIDED_VEC]], splat (i32 1) +-; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [1024 x %struct.ST3], ptr @S, i64 0, i64 [[INDEX]], i32 0 ++; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1024 x %struct.ST3], ptr @S, i64 0, i64 [[INDEX]], i32 0 + ; CHECK-NEXT: [[TMP1:%.*]] = add nsw <4 x i32> [[STRIDED_VEC2]], splat (i32 2) + ; CHECK-NEXT: [[TMP2:%.*]] = add nsw <4 x i32> [[STRIDED_VEC3]], splat (i32 3) + ; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x i32> [[TMP0]], <4 x i32> [[TMP1]], <8 x i32> +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll b/llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll +--- a/llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll ++++ b/llvm/test/Transforms/LoopVectorize/multiple-address-spaces.ll +@@ -24,10 +24,10 @@ + ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] + ; CHECK: vector.body: + ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] +-; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [40000 x i8], ptr addrspace(1) @Y, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds [40000 x i8], ptr addrspace(1) @Y, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i8>, ptr addrspace(1) [[TMP0]], align 1 + ; CHECK-NEXT: [[TMP1:%.*]] = add <4 x i8> [[WIDE_LOAD]], splat (i8 1) +-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [40000 x i8], ptr @X, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [40000 x i8], ptr @X, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: store <4 x i8> [[TMP1]], ptr [[TMP2]], align 1 + ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 + ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 40000 +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/LoopVectorize/non-const-n.ll b/llvm/test/Transforms/LoopVectorize/non-const-n.ll +--- a/llvm/test/Transforms/LoopVectorize/non-const-n.ll ++++ b/llvm/test/Transforms/LoopVectorize/non-const-n.ll +@@ -19,12 +19,12 @@ + ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] + ; CHECK: vector.body: + ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] +-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP2]], align 4 +-; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @c, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [2048 x i32], ptr @c, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, ptr [[TMP3]], align 4 + ; CHECK-NEXT: [[TMP4:%.*]] = add nsw <4 x i32> [[WIDE_LOAD1]], [[WIDE_LOAD]] +-; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @a, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2048 x i32], ptr @a, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: store <4 x i32> [[TMP4]], ptr [[TMP5]], align 4 + ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 + ; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX]], [[TMP1]] +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/LoopVectorize/X86/small-size.ll b/llvm/test/Transforms/LoopVectorize/X86/small-size.ll +--- a/llvm/test/Transforms/LoopVectorize/X86/small-size.ll ++++ b/llvm/test/Transforms/LoopVectorize/X86/small-size.ll +@@ -28,12 +28,12 @@ + ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] + ; CHECK: vector.body: + ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] +-; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, ptr [[TMP1]], align 4 +-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @c, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2048 x i32], ptr @c, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, ptr [[TMP2]], align 4 + ; CHECK-NEXT: [[TMP3:%.*]] = add nsw <4 x i32> [[WIDE_LOAD1]], [[WIDE_LOAD]] +-; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @a, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2048 x i32], ptr @a, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: store <4 x i32> [[TMP3]], ptr [[TMP4]], align 4 + ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 + ; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 256 +@@ -89,7 +89,7 @@ + ; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x i1> [[TMP3]], i64 0 + ; CHECK-NEXT: br i1 [[TMP4]], label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]] + ; CHECK: pred.store.if: +-; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: store i32 [[X:%.*]], ptr [[TMP5]], align 4 + ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]] + ; CHECK: pred.store.continue: +@@ -97,7 +97,7 @@ + ; CHECK-NEXT: br i1 [[TMP6]], label [[PRED_STORE_IF1:%.*]], label [[PRED_STORE_CONTINUE2:%.*]] + ; CHECK: pred.store.if1: + ; CHECK-NEXT: [[TMP7:%.*]] = or disjoint i64 [[INDEX]], 1 +-; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[TMP7]] ++; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[TMP7]] + ; CHECK-NEXT: store i32 [[X]], ptr [[TMP8]], align 4 + ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE2]] + ; CHECK: pred.store.continue2: +@@ -105,7 +105,7 @@ + ; CHECK-NEXT: br i1 [[TMP9]], label [[PRED_STORE_IF3:%.*]], label [[PRED_STORE_CONTINUE4:%.*]] + ; CHECK: pred.store.if3: + ; CHECK-NEXT: [[TMP10:%.*]] = or disjoint i64 [[INDEX]], 2 +-; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[TMP10]] ++; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[TMP10]] + ; CHECK-NEXT: store i32 [[X]], ptr [[TMP11]], align 4 + ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE4]] + ; CHECK: pred.store.continue4: +@@ -113,7 +113,7 @@ + ; CHECK-NEXT: br i1 [[TMP12]], label [[PRED_STORE_IF5:%.*]], label [[PRED_STORE_CONTINUE6]] + ; CHECK: pred.store.if5: + ; CHECK-NEXT: [[TMP13:%.*]] = or disjoint i64 [[INDEX]], 3 +-; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[TMP13]] ++; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[TMP13]] + ; CHECK-NEXT: store i32 [[X]], ptr [[TMP14]], align 4 + ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE6]] + ; CHECK: pred.store.continue6: +@@ -152,11 +152,11 @@ + ; CHECK-NEXT: [[TMP19:%.*]] = extractelement <4 x i1> [[TMP18]], i64 0 + ; CHECK-NEXT: br i1 [[TMP19]], label [[PRED_STORE_IF21:%.*]], label [[PRED_STORE_CONTINUE22:%.*]] + ; CHECK: pred.store.if21: +-; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[OFFSET_IDX]] ++; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[OFFSET_IDX]] + ; CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 +-; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @c, i64 0, i64 [[OFFSET_IDX]] ++; CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2048 x i32], ptr @c, i64 0, i64 [[OFFSET_IDX]] + ; CHECK-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4 +-; CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @a, i64 0, i64 [[OFFSET_IDX]] ++; CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2048 x i32], ptr @a, i64 0, i64 [[OFFSET_IDX]] + ; CHECK-NEXT: [[TMP25:%.*]] = and i32 [[TMP23]], [[TMP21]] + ; CHECK-NEXT: store i32 [[TMP25]], ptr [[TMP24]], align 4 + ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE22]] +@@ -165,11 +165,11 @@ + ; CHECK-NEXT: br i1 [[TMP26]], label [[PRED_STORE_IF23:%.*]], label [[PRED_STORE_CONTINUE24:%.*]] + ; CHECK: pred.store.if23: + ; CHECK-NEXT: [[TMP27:%.*]] = add i64 [[OFFSET_IDX]], 1 +-; CHECK-NEXT: [[TMP28:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[TMP27]] ++; CHECK-NEXT: [[TMP28:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[TMP27]] + ; CHECK-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 4 +-; CHECK-NEXT: [[TMP30:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @c, i64 0, i64 [[TMP27]] ++; CHECK-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2048 x i32], ptr @c, i64 0, i64 [[TMP27]] + ; CHECK-NEXT: [[TMP31:%.*]] = load i32, ptr [[TMP30]], align 4 +-; CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @a, i64 0, i64 [[TMP27]] ++; CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds [2048 x i32], ptr @a, i64 0, i64 [[TMP27]] + ; CHECK-NEXT: [[TMP33:%.*]] = and i32 [[TMP31]], [[TMP29]] + ; CHECK-NEXT: store i32 [[TMP33]], ptr [[TMP32]], align 4 + ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE24]] +@@ -178,11 +178,11 @@ + ; CHECK-NEXT: br i1 [[TMP34]], label [[PRED_STORE_IF25:%.*]], label [[PRED_STORE_CONTINUE26:%.*]] + ; CHECK: pred.store.if25: + ; CHECK-NEXT: [[TMP35:%.*]] = add i64 [[OFFSET_IDX]], 2 +-; CHECK-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[TMP35]] ++; CHECK-NEXT: [[TMP36:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[TMP35]] + ; CHECK-NEXT: [[TMP37:%.*]] = load i32, ptr [[TMP36]], align 4 +-; CHECK-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @c, i64 0, i64 [[TMP35]] ++; CHECK-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2048 x i32], ptr @c, i64 0, i64 [[TMP35]] + ; CHECK-NEXT: [[TMP39:%.*]] = load i32, ptr [[TMP38]], align 4 +-; CHECK-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @a, i64 0, i64 [[TMP35]] ++; CHECK-NEXT: [[TMP40:%.*]] = getelementptr inbounds [2048 x i32], ptr @a, i64 0, i64 [[TMP35]] + ; CHECK-NEXT: [[TMP41:%.*]] = and i32 [[TMP39]], [[TMP37]] + ; CHECK-NEXT: store i32 [[TMP41]], ptr [[TMP40]], align 4 + ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE26]] +@@ -191,11 +191,11 @@ + ; CHECK-NEXT: br i1 [[TMP42]], label [[PRED_STORE_IF27:%.*]], label [[PRED_STORE_CONTINUE28]] + ; CHECK: pred.store.if27: + ; CHECK-NEXT: [[TMP43:%.*]] = add i64 [[OFFSET_IDX]], 3 +-; CHECK-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @b, i64 0, i64 [[TMP43]] ++; CHECK-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2048 x i32], ptr @b, i64 0, i64 [[TMP43]] + ; CHECK-NEXT: [[TMP45:%.*]] = load i32, ptr [[TMP44]], align 4 +-; CHECK-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @c, i64 0, i64 [[TMP43]] ++; CHECK-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2048 x i32], ptr @c, i64 0, i64 [[TMP43]] + ; CHECK-NEXT: [[TMP47:%.*]] = load i32, ptr [[TMP46]], align 4 +-; CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [2048 x i32], ptr @a, i64 0, i64 [[TMP43]] ++; CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2048 x i32], ptr @a, i64 0, i64 [[TMP43]] + ; CHECK-NEXT: [[TMP49:%.*]] = and i32 [[TMP47]], [[TMP45]] + ; CHECK-NEXT: store i32 [[TMP49]], ptr [[TMP48]], align 4 + ; CHECK-NEXT: br label [[PRED_STORE_CONTINUE28]] +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll b/llvm/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll +--- a/llvm/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll ++++ b/llvm/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll +@@ -14,8 +14,8 @@ + ; CHECK: vector.body: + ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] + ; CHECK-NEXT: [[TMP0:%.*]] = or disjoint i64 [[INDEX]], 1 +-; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw [1024 x x86_fp80], ptr @x, i64 0, i64 [[INDEX]] +-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [1024 x x86_fp80], ptr @x, i64 0, i64 [[TMP0]] ++; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1024 x x86_fp80], ptr @x, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1024 x x86_fp80], ptr @x, i64 0, i64 [[TMP0]] + ; CHECK-NEXT: store x86_fp80 0xK3FFF8000000000000000, ptr [[TMP1]], align 16 + ; CHECK-NEXT: store x86_fp80 0xK3FFF8000000000000000, ptr [[TMP2]], align 16 + ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2 +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/PhaseOrdering/X86/excessive-unrolling.ll b/llvm/test/Transforms/PhaseOrdering/X86/excessive-unrolling.ll +--- a/llvm/test/Transforms/PhaseOrdering/X86/excessive-unrolling.ll ++++ b/llvm/test/Transforms/PhaseOrdering/X86/excessive-unrolling.ll +@@ -179,17 +179,17 @@ + ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] + ; CHECK: vector.body: + ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] +-; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [58 x double], ptr @b, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds [58 x double], ptr @b, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP0]], i64 16 + ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x double>, ptr [[TMP0]], align 16 + ; CHECK-NEXT: [[WIDE_LOAD4:%.*]] = load <2 x double>, ptr [[TMP1]], align 16 +-; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [58 x double], ptr @c, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [58 x double], ptr @c, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP2]], i64 16 + ; CHECK-NEXT: [[WIDE_LOAD5:%.*]] = load <2 x double>, ptr [[TMP2]], align 16 + ; CHECK-NEXT: [[WIDE_LOAD6:%.*]] = load <2 x double>, ptr [[TMP3]], align 16 + ; CHECK-NEXT: [[TMP4:%.*]] = fadd <2 x double> [[WIDE_LOAD]], [[WIDE_LOAD5]] + ; CHECK-NEXT: [[TMP5:%.*]] = fadd <2 x double> [[WIDE_LOAD4]], [[WIDE_LOAD6]] +-; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [58 x double], ptr @a, i64 0, i64 [[INDEX]] ++; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [58 x double], ptr @a, i64 0, i64 [[INDEX]] + ; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP6]], i64 16 + ; CHECK-NEXT: store <2 x double> [[TMP4]], ptr [[TMP6]], align 16 + ; CHECK-NEXT: store <2 x double> [[TMP5]], ptr [[TMP7]], align 16 +diff -ruN --strip-trailing-cr a/llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll b/llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll +--- a/llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll ++++ b/llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll +@@ -349,12 +349,12 @@ + ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_COND1_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY3]] ] + ; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[INDVARS_IV]] to i32 + ; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 1 +-; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP3]] ++; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP3]] + ; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[INDVARS_IV]] to i32 +-; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP4]] ++; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP4]] + ; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[INDVARS_IV]] to i32 + ; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP5]], 4 +-; CHECK-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP6]] ++; CHECK-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP6]] + ; CHECK-NEXT: [[TMP7:%.*]] = load float, ptr [[ARRAYIDX31]], align 4 + ; CHECK-NEXT: [[TMP8:%.*]] = load <4 x float>, ptr [[ARRAYIDX]], align 4 + ; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <4 x float> [[TMP8]], <4 x float> poison, <4 x i32> +@@ -363,7 +363,7 @@ + ; CHECK-NEXT: store <4 x float> [[TMP11]], ptr [[ARRAYIDX5]], align 4 + ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 5 + ; CHECK-NEXT: [[TMP12:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 +-; CHECK-NEXT: [[ARRAYIDX41:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP12]] ++; CHECK-NEXT: [[ARRAYIDX41:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP12]] + ; CHECK-NEXT: [[TMP13]] = load float, ptr [[ARRAYIDX41]], align 4 + ; CHECK-NEXT: [[MUL45:%.*]] = fmul float [[TMP13]], [[TMP7]] + ; CHECK-NEXT: store float [[MUL45]], ptr [[ARRAYIDX31]], align 4 +@@ -384,12 +384,12 @@ + ; SSE2-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_COND1_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY3]] ] + ; SSE2-NEXT: [[TMP2:%.*]] = trunc i64 [[INDVARS_IV]] to i32 + ; SSE2-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 1 +-; SSE2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP3]] ++; SSE2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP3]] + ; SSE2-NEXT: [[TMP4:%.*]] = trunc i64 [[INDVARS_IV]] to i32 +-; SSE2-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP4]] ++; SSE2-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP4]] + ; SSE2-NEXT: [[TMP5:%.*]] = trunc i64 [[INDVARS_IV]] to i32 + ; SSE2-NEXT: [[TMP6:%.*]] = add i32 [[TMP5]], 4 +-; SSE2-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP6]] ++; SSE2-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP6]] + ; SSE2-NEXT: [[TMP7:%.*]] = load float, ptr [[ARRAYIDX31]], align 4 + ; SSE2-NEXT: [[TMP8:%.*]] = load <4 x float>, ptr [[ARRAYIDX]], align 4 + ; SSE2-NEXT: [[TMP9:%.*]] = shufflevector <4 x float> [[TMP8]], <4 x float> poison, <4 x i32> +@@ -398,7 +398,7 @@ + ; SSE2-NEXT: store <4 x float> [[TMP11]], ptr [[ARRAYIDX5]], align 4 + ; SSE2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 5 + ; SSE2-NEXT: [[TMP12:%.*]] = trunc i64 [[INDVARS_IV_NEXT]] to i32 +-; SSE2-NEXT: [[ARRAYIDX41:%.*]] = getelementptr inbounds nuw [32000 x float], ptr @a, i32 0, i32 [[TMP12]] ++; SSE2-NEXT: [[ARRAYIDX41:%.*]] = getelementptr inbounds [32000 x float], ptr @a, i32 0, i32 [[TMP12]] + ; SSE2-NEXT: [[TMP13]] = load float, ptr [[ARRAYIDX41]], align 4 + ; SSE2-NEXT: [[MUL45:%.*]] = fmul float [[TMP13]], [[TMP7]] + ; SSE2-NEXT: store float [[MUL45]], ptr [[ARRAYIDX31]], align 4 diff --git a/third_party/tsl/third_party/llvm/workspace.bzl b/third_party/tsl/third_party/llvm/workspace.bzl index d9050b74a195e..780da28ff78ad 100644 --- a/third_party/tsl/third_party/llvm/workspace.bzl +++ b/third_party/tsl/third_party/llvm/workspace.bzl @@ -4,8 +4,8 @@ load("//third_party:repo.bzl", "tf_http_archive") def repo(name): """Imports LLVM.""" - LLVM_COMMIT = "e86910337f98e57f5b9253f7d80d5b916eb1d97e" - LLVM_SHA256 = "4ca0eff0ca86ed6f2fdb7682354fdf4c85151d90ac9fb6e55a868e4191359e9f" + LLVM_COMMIT = "59890c13343af9e308281b3c76bac425087f4f8a" + LLVM_SHA256 = "bd80d5cbc94225c4ac944bc22df7772d2eb6b1df3e123d992b331a1b097847d4" tf_http_archive( name = name,