From 3a9ee6bdbbb7e2fd4bc3eb69a35817e04caf8cf1 Mon Sep 17 00:00:00 2001
From: maksyuki <maksyuki@126.com>
Date: Thu, 22 Feb 2024 19:15:47 +0800
Subject: [PATCH] feat: modify def toml config file

---
 src/def_config.toml | 26 ++++++++++++++++----------
 src/task.py         |  2 +-
 2 files changed, 17 insertions(+), 11 deletions(-)

diff --git a/src/def_config.toml b/src/def_config.toml
index 050cd73..7c6a980 100644
--- a/src/def_config.toml
+++ b/src/def_config.toml
@@ -1,21 +1,27 @@
 # This is the default submit config
 [meta]
+project = "demo"
+author  = "Ben"
 version = "1.0"
 
-# iverilog
-[iv_config]
+[core]
+name     = "ysyx_xxxxxxxx.v" # core name
+top      = "ysyx_xxxxxxxx"   # top name
+clk_name = "clk"             # top clock signal name
+
+[iverilog]
 commit_info = "iv"
 
-# verilator
-[ver_config]
+[verilator]
 commit_info = "ver"
 
-[vcs_config]
+[vcs]
 commit_info = "vcs"
-prog = 'all' # format: [prog]-[type] prog: [hello, memtest, rtthread] type: [flash, mem, sdram]
-freq = 100 # [100, 800, step: 50]
-debug = {wave = "off", prog = "hello-flash"}
+prog        = 'all'  # format: [prog]-[type] prog: [hello, memtest, rtthread] type: [flash, mem, sdram]
+debug       = {wave = "off", prog = "hello-flash"}
 
-[dc_config]
+[dc]
 commit_info = "dc"
-freq = 100 # [100, 800, step: 50]
\ No newline at end of file
+freq        = 100   # [100, 800, step: 50]
+corner      = "TYP" # [WCZ MAX WCL TYP MIN ML MZ]
+retiming    = "off" # [off on]
\ No newline at end of file
diff --git a/src/task.py b/src/task.py
index 1b8bb59..3c1c6c2 100755
--- a/src/task.py
+++ b/src/task.py
@@ -10,7 +10,7 @@
 # func:
 # 1. check code similarity, record commit info(freq, time) -> web
 # 2. verilator test
-# 3. (iverilog test)
+# 3. iverilog test
 # 4. vcs test
 # struct:
 # toml, database