- RISC-V Cores
- Various cores and SoCs that endeavor to implement the RISC-V specification
- ao486 (Aleksander Osman), under BSD 2-Clause License
- The ao486 is an x86 compatible Verilog core implementing all features of a 486 SX.
- 8051 (Oregano Systems, Vienna University of Technology)
- A parameterizable, synthesizable circuit description (VHDL) under LGPL license
- Arm DesignStart (ARM)
- $0 license fee and success-based royalty model
- Fast access to a select mix of Arm IP, including Cortex-M0, Cortex-M3 and Cortex-A5 processors and supporting IP, software and resources for custom silicon designs
- Comet (IRISA), under Apache License v2.0
- A RISC-V 32-bit processor written in C++ for High Level Synthesis (HLS).
- Octavo (UToronto, Charles Eric LaForest), under BSD 2-Clause License
- A soft-processor aimed at building FPGA overlay architectures
- VESPA (UToronto)
- A parameterized soft vector processor fully implemented on a DE3 FPGA board
- Ventus (Tsinghua), under Mulan PSL v2
- GPGPU processor supporting RISCV-V extension, developed with Chisel HDL.
- Vortex (Gatech), under BSD 3-Clause "New" or "Revised" License
- Vortex is a full-system RISCV-based GPGPU processor.
- OpenPiton (Princeton)
- The world's first open source, general purpose, multithreaded manycore processor
- OPDB: OpenPiton Design Benchmark adapted from OpenPiton
- FGPU (Ruhr University of Bochum), under GNU General Public License v3.0
- FGPU is a soft GPU-like architecture for FPGAs. It can be programmed using OpenCL and can be customized according to application needs.
- Harmonica 2 (Chad D. Kersey)
- A configurable multithreaded SIMT processor core desgin
- MIAOW (Madison)
- An open source GPU based off of the AMD Southern Islands ISA
- Nyuzi (Jeff Bush)
- An experimental GPGPU processor hardware design focused on compute intensive tasks
- OpenCelerity (UW, Cornell, UMich, UCSD)
- Open-Source RISC-V Tiered Accelerator Fabric SoC
- OpenScale (LIRMM)
- A scalable and open-source NoC-based MPSoC platform
- OpTiMSoC (TUM), under MIT License
- Open Tiled Manycore System-on-Chip
- Patmos (Technical University of Denmark)
- A time-predictable VLIW processor, and the processor for the T-CREST project
- Simty (Inria)
- A synthesizable general-purpose SIMT processor