From 4d4959d8015f80ef7a163994d6b08de61b5477f0 Mon Sep 17 00:00:00 2001
From: antonlysak <antonlysak@gmail.com>
Date: Mon, 25 Jun 2018 20:21:59 +0300
Subject: [PATCH 001/201] Adding SiFive FU540-C000 MCU

---
 MCU_SiFive.dcm |   6 +
 MCU_SiFive.lib | 576 +++++++++++++++++++++++++++++++++++++++++++++----
 2 files changed, 546 insertions(+), 36 deletions(-)

diff --git a/MCU_SiFive.dcm b/MCU_SiFive.dcm
index d92e246132..e5ec1e3b34 100644
--- a/MCU_SiFive.dcm
+++ b/MCU_SiFive.dcm
@@ -6,4 +6,10 @@ K microcontroller RISC-V SiFive
 F https://static.dev.sifive.com/SiFive-FE310-G000-datasheet-v1p5.pdf
 $ENDCMP
 #
+$CMP FU540-C000
+D  64-bit RISC‑V SoC
+K  64-bit RISC‑V SoC SiFive
+F https://static.dev.sifive.com/FU540-C000-v1.0.pdf
+$ENDCMP
+#
 #End Doc Library
diff --git a/MCU_SiFive.lib b/MCU_SiFive.lib
index ce3df3dfcf..2d6a2beb30 100644
--- a/MCU_SiFive.lib
+++ b/MCU_SiFive.lib
@@ -1,4 +1,4 @@
-EESchema-LIBRARY Version 2.3
+EESchema-LIBRARY Version 2.4
 #encoding utf-8
 #
 # FE310-G000
@@ -14,54 +14,558 @@ $ENDFPLIST
 DRAW
 S -1050 1150 1050 -1150 0 1 10 f
 X QSPI_DQ_3 1 -1200 -100 150 R 50 50 1 1 B
-X QSPI_DQ_2 2 -1200 0 150 R 50 50 1 1 B
-X QSPI_DQ_1 3 -1200 100 150 R 50 50 1 1 B
-X QSPI_DQ_0 4 -1200 200 150 R 50 50 1 1 B
-X ~QSPI_CS 5 -1200 -200 150 R 50 50 1 1 O
-X VDD 6 100 1300 150 D 50 50 1 1 W
-X PLL_AVDD 7 600 1300 150 D 50 50 1 1 W
-X PLL_AVSS 8 300 -1300 150 U 50 50 1 1 W
-X XTAL_XI 9 -1200 1000 150 R 50 50 1 1 I
 X XTAL_XO 10 -1200 900 150 R 50 50 1 1 O
-X AON_PSD_LFALTCLK 20 -1200 -900 150 R 50 50 1 1 I
-X VDD 30 200 1300 150 D 50 50 1 1 W
-X GPIO_18 40 1200 -400 150 L 50 50 1 1 B
 X IVDD 11 -400 1300 150 D 50 50 1 1 W
-X AON_PSD_LFCLKSEL 21 -1200 -1000 150 R 50 50 1 1 I
-X GPIO_5 31 1200 400 150 L 50 50 1 1 B
-X GPIO_19 41 1200 -500 150 L 50 50 1 1 B
 X OTP_AIVDD 12 -100 1300 150 D 50 50 1 1 W
-X AON_PMU_OUT_0 22 -1200 -500 150 R 50 50 1 1 O
-X IVDD 32 -300 1300 150 D 50 50 1 1 W
-X GPIO_20 42 1200 -600 150 L 50 50 1 1 B
 X JTAG_TCK 13 -1200 700 150 R 50 50 1 1 I
-X AON_VDD 23 400 1300 150 D 50 50 1 1 W
-X GPIO_9 33 1200 300 150 L 50 50 1 1 B
-X GPIO_21 43 1200 -700 150 L 50 50 1 1 B
 X JTAG_TDO 14 -1200 600 150 R 50 50 1 1 O
-X ~AON_ERST_N 24 -1200 -800 150 R 50 50 1 1 I
-X GPIO_10 34 1200 200 150 L 50 50 1 1 B
-X GPIO_22 44 1200 -800 150 L 50 50 1 1 B
 X JTAG_TMS 15 -1200 500 150 R 50 50 1 1 I
-X GPIO_0 25 1200 900 150 L 50 50 1 1 B
-X GPIO_11 35 1200 100 150 L 50 50 1 1 B
-X GPIO_23 45 1200 -900 150 L 50 50 1 1 B
 X JTAG_TDI 16 -1200 400 150 R 50 50 1 1 I
-X GPIO_1 26 1200 800 150 L 50 50 1 1 B
-X GPIO_12 36 1200 0 150 L 50 50 1 1 B
-X VDD 46 300 1300 150 D 50 50 1 1 W
 X AON_PMU_OUT_1 17 -1200 -600 150 R 50 50 1 1 O
-X GPIO_2 27 1200 700 150 L 50 50 1 1 B
-X GPIO_13 37 1200 -100 150 L 50 50 1 1 B
-X IVDD 47 -200 1300 150 D 50 50 1 1 W
 X ~AON_PMU_DWAKEUP_N 18 -1200 -700 150 R 50 50 1 1 I
-X GPIO_3 28 1200 600 150 L 50 50 1 1 B
-X GPIO_16 38 1200 -200 150 L 50 50 1 1 B
-X QSPI_SCK 48 -1200 -300 150 R 50 50 1 1 O
 X AON_IVDD 19 500 1300 150 D 50 50 1 1 W
+X QSPI_DQ_2 2 -1200 0 150 R 50 50 1 1 B
+X AON_PSD_LFALTCLK 20 -1200 -900 150 R 50 50 1 1 I
+X AON_PSD_LFCLKSEL 21 -1200 -1000 150 R 50 50 1 1 I
+X AON_PMU_OUT_0 22 -1200 -500 150 R 50 50 1 1 O
+X AON_VDD 23 400 1300 150 D 50 50 1 1 W
+X ~AON_ERST_N 24 -1200 -800 150 R 50 50 1 1 I
+X GPIO_0 25 1200 900 150 L 50 50 1 1 B
+X GPIO_1 26 1200 800 150 L 50 50 1 1 B
+X GPIO_2 27 1200 700 150 L 50 50 1 1 B
+X GPIO_3 28 1200 600 150 L 50 50 1 1 B
 X GPIO_4 29 1200 500 150 L 50 50 1 1 B
+X QSPI_DQ_1 3 -1200 100 150 R 50 50 1 1 B
+X VDD 30 200 1300 150 D 50 50 1 1 W
+X GPIO_5 31 1200 400 150 L 50 50 1 1 B
+X IVDD 32 -300 1300 150 D 50 50 1 1 W
+X GPIO_9 33 1200 300 150 L 50 50 1 1 B
+X GPIO_10 34 1200 200 150 L 50 50 1 1 B
+X GPIO_11 35 1200 100 150 L 50 50 1 1 B
+X GPIO_12 36 1200 0 150 L 50 50 1 1 B
+X GPIO_13 37 1200 -100 150 L 50 50 1 1 B
+X GPIO_16 38 1200 -200 150 L 50 50 1 1 B
 X GPIO_17 39 1200 -300 150 L 50 50 1 1 B
+X QSPI_DQ_0 4 -1200 200 150 R 50 50 1 1 B
+X GPIO_18 40 1200 -400 150 L 50 50 1 1 B
+X GPIO_19 41 1200 -500 150 L 50 50 1 1 B
+X GPIO_20 42 1200 -600 150 L 50 50 1 1 B
+X GPIO_21 43 1200 -700 150 L 50 50 1 1 B
+X GPIO_22 44 1200 -800 150 L 50 50 1 1 B
+X GPIO_23 45 1200 -900 150 L 50 50 1 1 B
+X VDD 46 300 1300 150 D 50 50 1 1 W
+X IVDD 47 -200 1300 150 D 50 50 1 1 W
+X QSPI_SCK 48 -1200 -300 150 R 50 50 1 1 O
 X GND 49 100 -1300 150 U 50 50 1 1 W
+X ~QSPI_CS 5 -1200 -200 150 R 50 50 1 1 O
+X VDD 6 100 1300 150 D 50 50 1 1 W
+X PLL_AVDD 7 600 1300 150 D 50 50 1 1 W
+X PLL_AVSS 8 300 -1300 150 U 50 50 1 1 W
+X XTAL_XI 9 -1200 1000 150 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# FU540-C000
+#
+DEF FU540-C000 U 0 40 Y Y 6 L N
+F0 "U" 0 0 50 H V L BNN
+F1 "FU540-C000" 0 -100 50 H V C CNN
+F2 "" -100 -100 50 H I C CNN
+F3 "" 0 5000 50 H I C CNN
+$FPLIST
+ BGA?484*23.0x23.0mm*P1.0mm*
+$ENDFPLIST
+DRAW
+S -1500 -1800 1500 1800 1 1 10 f
+S -1300 -4850 1300 4850 2 1 10 f
+S -1350 -1300 1350 1300 3 1 10 f
+S -950 -1800 950 1800 4 1 10 f
+S -1300 -1700 1300 1700 5 1 10 f
+S -600 -3500 600 3500 6 1 10 f
+X IO_CHIPLINK_0_B2C_DATA_2 AA18 -1800 1400 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_8 AA19 -1800 800 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_23 AA20 -1800 -700 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_29 AA21 -1800 -1300 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_CLK AA22 -1800 1700 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_1 AB18 -1800 1500 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_13 AB19 -1800 300 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_22 AB20 -1800 -600 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_26 AB21 -1800 -1000 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_C2B_DATA_28 K19 1800 -1200 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_24 K20 1800 -800 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_26 K22 1800 -1000 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_31 L17 1800 -1500 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_30 L18 1800 -1400 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_27 L19 1800 -1100 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_20 L20 1800 -400 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_18 L21 1800 -200 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_29 L22 1800 -1300 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_15 M17 1800 100 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_19 M18 1800 -300 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_23 M19 1800 -700 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_12 M20 1800 400 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_25 M21 1800 -900 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_22 M22 1800 -600 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_SEND N17 1800 -1700 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_2 N18 1800 1400 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_6 N19 1800 1000 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_21 N20 1800 -500 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_16 N21 1800 0 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_14 N22 1800 200 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_B2C_RST P17 -1800 -1600 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_21 P18 -1800 -500 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_C2B_CLK P19 1800 1700 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_4 P20 1800 1200 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_B2C_DATA_24 R17 -1800 -800 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_17 R18 -1800 -100 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_C2B_DATA_1 R19 1800 1500 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_3 R20 1800 1300 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_8 R21 1800 800 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_17 R22 1800 -100 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_B2C_DATA_19 T18 -1800 -300 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_C2B_DATA_0 T19 1800 1600 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_RST T20 1800 -1600 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_13 T21 1800 300 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_10 T22 1800 600 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_B2C_DATA_20 U17 -1800 -400 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_14 U18 -1800 200 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_18 U19 -1800 -200 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_C2B_DATA_5 U20 1800 1100 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_11 U21 1800 500 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_C2B_DATA_7 U22 1800 900 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_B2C_DATA_12 V16 -1800 400 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_16 V17 -1800 0 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_9 V18 -1800 700 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_15 V19 -1800 100 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_25 V20 -1800 -900 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_4 W16 -1800 1200 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_3 W17 -1800 1300 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_5 W18 -1800 1100 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_11 W19 -1800 500 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_28 W20 -1800 -1200 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_SEND W21 -1800 -1700 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_C2B_DATA_9 W22 1800 700 300 L 50 50 1 1 O
+X IO_CHIPLINK_0_B2C_DATA_0 Y16 -1800 1600 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_7 Y17 -1800 900 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_6 Y18 -1800 1000 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_10 Y19 -1800 600 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_27 Y20 -1800 -1100 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_31 Y21 -1800 -1500 300 R 50 50 1 1 I
+X IO_CHIPLINK_0_B2C_DATA_30 Y22 -1800 -1400 300 R 50 50 1 1 I
+X IO_DDR_MEM_DATA[18] A4 1600 1800 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[19] A5 1600 1900 300 L 50 50 2 1 B
+X IO_DDR_MEM_DQS_P[2] A6 1600 1500 300 L 50 50 2 1 B
+X IO_DDR_MEM_DQS_M[2] A7 1600 1400 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[41] AA1 1600 -1900 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[61] AA10 1600 -3900 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[63] AA11 1600 -3700 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[58] AA12 1600 -4200 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[56] AA13 1600 -4400 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[45] AA3 1600 -1500 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[47] AA4 1600 -1300 300 L 50 50 2 1 B
+X IO_DDR_MEM_ODT[0] AA5 -1600 -100 300 R 50 50 2 1 O
+X IO_DDR_MEM_CKE[1] AA6 -1600 -400 300 R 50 50 2 1 O
+X IO_DDR_MEM_DQS_M[6] AA7 1600 -3400 300 L 50 50 2 1 B
+X IO_DDR_MEM_DQS_P[7] AA8 1600 -4500 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[62] AA9 1600 -3800 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[60] AB11 1600 -4000 300 L 50 50 2 1 B
+X IO_DDR_MEM_DM[7] AB12 1600 -4700 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[44] AB2 1600 -1600 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[46] AB3 1600 -1400 300 L 50 50 2 1 B
+X IO_DDR_MEM_ODT[1] AB5 -1600 -200 300 R 50 50 2 1 O
+X IO_DDR_MEM_CKE[0] AB6 -1600 -300 300 R 50 50 2 1 O
+X IO_DDR_MEM_DATA[57] AB8 1600 -4300 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[59] AB9 1600 -4100 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[1] B1 1600 4100 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[17] B2 1600 1700 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[22] B3 1600 2200 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[16] B4 1600 1600 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[20] B5 1600 2000 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[23] B6 1600 2300 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[4] C1 1600 4400 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[29] C2 1600 900 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[27] C3 1600 700 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[24] C4 1600 400 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[21] C5 1600 2100 300 L 50 50 2 1 B
+X IO_DDR_MEM_DM[2] C6 1600 1300 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[31] C7 1600 1100 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[0] D2 1600 4000 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[30] D3 1600 1000 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[25] D4 1600 500 300 L 50 50 2 1 B
+X IO_DDR_MEM_DM[3] D5 1600 100 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[26] D6 1600 600 300 L 50 50 2 1 B
+X IO_DDR_MEM_DQS_M[3] D7 1600 200 300 L 50 50 2 1 B
+X IO_DDR_RSVD1 D8 -1600 -2700 300 R 50 50 2 1 P
+X IO_DDR_MEM_DATA[6] E1 1600 4600 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[3] E2 1600 4300 300 L 50 50 2 1 B
+X IO_DDR_MEM_DM[0] E5 1600 3700 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[28] E6 1600 800 300 L 50 50 2 1 B
+X IO_DDR_MEM_DQS_P[3] E7 1600 300 300 L 50 50 2 1 B
+X IO_DDR_RSVD0 E8 -1600 -2600 300 R 50 50 2 1 P
+X IO_DDR_MEM_DATA[9] F1 1600 2900 300 L 50 50 2 1 B
+X IO_DDR_MEM_DQS_P[0] F2 1600 3900 300 L 50 50 2 1 B
+X IO_DDR_MEM_DQS_M[0] F3 1600 3800 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[2] F4 1600 4200 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[10] F5 1600 3000 300 L 50 50 2 1 B
+X IO_DDR_CAL_0 F6 -1600 -4700 300 R 50 50 2 1 P
+X IO_DDR_RSVD2 F8 -1600 -2800 300 R 50 50 2 1 P
+X IO_DDR_RSVD3 F9 -1600 -2900 300 R 50 50 2 1 P
+X IO_DDR_MEM_DATA[11] G1 1600 3100 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[7] G3 1600 4700 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[5] G4 1600 4500 300 L 50 50 2 1 B
+X IO_DDR_MEM_DM[1] G5 1600 2500 300 L 50 50 2 1 B
+X DDR_VDDQ G7 -1600 4700 300 R 50 50 2 1 W
+X IO_DDR_MEM_DATA[12] H1 1600 3200 300 L 50 50 2 1 B
+X IO_DDR_MEM_DQS_P[1] H2 1600 2700 300 L 50 50 2 1 B
+X IO_DDR_MEM_DQS_M[1] H3 1600 2600 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[8] H4 1600 2800 300 L 50 50 2 1 B
+X IO_DDR_MEM_ECC_DATA[0] H5 -1600 -2000 300 R 50 50 2 1 B
+X DDR_VDDQ H6 -1600 4600 300 R 50 50 2 1 W
+X DDRPLL_AVSS J13 -1600 3200 300 R 50 50 2 1 P
+X IO_DDR_MEM_DATA[14] J2 1600 3400 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[13] J3 1600 3300 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[15] J4 1600 3500 300 L 50 50 2 1 B
+X IO_DDR_MEM_ECC_DM J5 -1600 -2300 300 R 50 50 2 1 B
+X DDR_VDDQ J7 -1600 4500 300 R 50 50 2 1 W
+X IO_DDR_MEM_ECC_DATA[1] K1 -1600 -1900 300 R 50 50 2 1 B
+X DDRPLL_AVDD K13 -1600 3300 300 R 50 50 2 1 W
+X IO_DDR_MEM_ECC_DQS_P K2 -1600 -2100 300 R 50 50 2 1 B
+X IO_DDR_MEM_ECC_DQS_M K3 -1600 -2200 300 R 50 50 2 1 B
+X IO_DDR_MEM_ECC_DATA[2] K4 -1600 -1800 300 R 50 50 2 1 B
+X IO_DDR_MEM_CLK K5 -1600 -1000 300 R 50 50 2 1 O
+X DDR_VDDQ K6 -1600 4400 300 R 50 50 2 1 W
+X IO_DDR_MEM_ECC_DATA[4] L1 -1600 -1600 300 R 50 50 2 1 B
+X IO_DDR_MEM_ECC_DATA[3] L2 -1600 -1700 300 R 50 50 2 1 B
+X IO_DDR_MEM_ECC_DATA[7] L3 -1600 -1300 300 R 50 50 2 1 B
+X IO_DDR_MEM_ECC_DATA[5] L4 -1600 -1500 300 R 50 50 2 1 B
+X IO_DDR_MEM_CLK_N L5 -1600 -1100 300 R 50 50 2 1 O
+X DDR_VDDQ L7 -1600 4300 300 R 50 50 2 1 W
+X DDR_VDDPLL L9 -1600 3500 300 R 50 50 2 1 W
+X IO_DDR_MEM_ECC_DATA[6] M1 -1600 -1400 300 R 50 50 2 1 B
+X IO_DDR_MEM_RAS_N M2 -1600 300 300 R 50 50 2 1 O
+X IO_DDR_MEM_CAS_N M3 -1600 400 300 R 50 50 2 1 O
+X IO_DDR_MEM_BANK[0] M4 -1600 500 300 R 50 50 2 1 O
+X IO_DDR_MEM_BANK[2] M5 -1600 700 300 R 50 50 2 1 O
+X DDR_VDDQ M6 -1600 4200 300 R 50 50 2 1 W
+X DDR_VDDPLL M9 -1600 3400 300 R 50 50 2 1 W
+X IO_DDR_MEM_WE_N N1 -1600 200 300 R 50 50 2 1 O
+X IO_DDR_MEM_BANK[1] N2 -1600 600 300 R 50 50 2 1 O
+X IO_DDR_MEM_ADDRESS[0] N3 -1600 800 300 R 50 50 2 1 O
+X IO_DDR_MEM_ADDRESS[2] N4 -1600 1000 300 R 50 50 2 1 O
+X IO_DDR_MEM_ADDRESS[5] N5 -1600 1300 300 R 50 50 2 1 O
+X DDR_VDDQ N7 -1600 4100 300 R 50 50 2 1 W
+X IO_DDR_MEM_ADDRESS[3] P3 -1600 1100 300 R 50 50 2 1 O
+X IO_DDR_MEM_ADDRESS[6] P4 -1600 1400 300 R 50 50 2 1 O
+X IO_DDR_MEM_ADDRESS[12] P5 -1600 2000 300 R 50 50 2 1 O
+X DDR_VDDQ P6 -1600 4000 300 R 50 50 2 1 W
+X IO_DDR_MEM_ADDRESS[1] R1 -1600 900 300 R 50 50 2 1 O
+X IO_DDR_MEM_ADDRESS[7] R2 -1600 1500 300 R 50 50 2 1 O
+X IO_DDR_MEM_ADDRESS[8] R3 -1600 1600 300 R 50 50 2 1 O
+X IO_DDR_MEM_ADDRESS[11] R4 -1600 1900 300 R 50 50 2 1 O
+X IO_DDR_MEM_DATA[32] R5 1600 -800 300 L 50 50 2 1 B
+X DDR_VDDQ R7 -1600 3900 300 R 50 50 2 1 W
+X IO_DDR_MEM_ADDRESS[4] T1 -1600 1200 300 R 50 50 2 1 O
+X IO_DDR_MEM_ADDRESS[13] T2 -1600 2100 300 R 50 50 2 1 O
+X IO_DDR_MEM_ADDRESS[9] T3 -1600 1700 300 R 50 50 2 1 O
+X IO_DDR_MEM_DATA[34] T4 1600 -600 300 L 50 50 2 1 B
+X IO_DDR_MEM_DM[4] T5 1600 -1100 300 L 50 50 2 1 B
+X DDR_VDDQ T6 -1600 3800 300 R 50 50 2 1 W
+X IO_DDR_MEM_ADDRESS[10] U1 -1600 1800 300 R 50 50 2 1 O
+X IO_DDR_MEM_PARITY_IN U2 -1600 100 300 R 50 50 2 1 O
+X IO_DDR_MEM_ADDRESS[14] U3 -1600 2200 300 R 50 50 2 1 O
+X IO_DDR_MEM_DQS_M[4] U4 1600 -1000 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[39] U5 1600 -100 300 L 50 50 2 1 B
+X DDR_VDDQCK U7 -1600 3700 300 R 50 50 2 1 W
+X IO_DDR_MEM_DATA[35] V2 1600 -500 300 L 50 50 2 1 B
+X IO_DDR_MEM_ADDRESS[15] V3 -1600 2300 300 R 50 50 2 1 O
+X IO_DDR_MEM_DQS_P[4] V4 1600 -900 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[40] V5 1600 -2000 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[33] W1 1600 -700 300 L 50 50 2 1 B
+X IO_DDR_MEM_DM[6] W10 1600 -3500 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[49] W11 1600 -3100 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[54] W12 1600 -2600 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[38] W2 1600 -200 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[37] W3 1600 -300 300 L 50 50 2 1 B
+X IO_DDR_MEM_DQS_M[5] W4 1600 -2200 300 L 50 50 2 1 B
+X IO_DDR_MEM_DM[5] W5 1600 -2300 300 L 50 50 2 1 B
+X IO_DDR_MEM_ERROR_N W6 -1600 0 300 R 50 50 2 1 I
+X IO_DDR_MEM_CS_N[1] W7 -1600 -600 300 R 50 50 2 1 O
+X IO_DDR_MEM_DATA[51] W8 1600 -2900 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[55] W9 1600 -2500 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[36] Y1 1600 -400 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[52] Y10 1600 -2800 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[50] Y11 1600 -3000 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[48] Y12 1600 -3200 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[43] Y2 1600 -1700 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[42] Y3 1600 -1800 300 L 50 50 2 1 B
+X IO_DDR_MEM_DQS_P[5] Y4 1600 -2100 300 L 50 50 2 1 B
+X IO_DDR_MEM_RESET_N Y5 -1600 -700 300 R 50 50 2 1 O
+X IO_DDR_MEM_CS_N[0] Y6 -1600 -500 300 R 50 50 2 1 O
+X IO_DDR_MEM_DQS_P[6] Y7 1600 -3300 300 L 50 50 2 1 B
+X IO_DDR_MEM_DQS_M[7] Y8 1600 -4600 300 L 50 50 2 1 B
+X IO_DDR_MEM_DATA[53] Y9 1600 -2700 300 L 50 50 2 1 B
+X IO_GEMGXL_0_RXD_2 A10 -1650 0 300 R 50 50 3 1 I
+X IO_GEMGXL_0_RX_DV A11 -1650 -600 300 R 50 50 3 1 I
+X IO_GEMGXL_0_RXD_0 A12 -1650 200 300 R 50 50 3 1 I
+X IO_GEMGXL_0_COL A13 -1650 -900 300 R 50 50 3 1 I
+X IO_GEMGXL_0_RXD_5 A8 -1650 -300 300 R 50 50 3 1 I
+X IO_GEMGXL_0_RXD_1 B10 -1650 100 300 R 50 50 3 1 I
+X IO_GEMGXL_0_RX_ER B11 -1650 -700 300 R 50 50 3 1 I
+X IO_GEMGXL_0_TXD_0 B12 1650 200 300 L 50 50 3 1 O
+X IO_GEMGXL_0_MDC B13 -1650 -1100 300 R 50 50 3 1 O
+X IO_GEMGXL_0_TX_EN B7 1650 -600 300 L 50 50 3 1 O
+X IO_GEMGXL_0_TXD_6 B8 1650 -400 300 L 50 50 3 1 O
+X IO_GEMGXL_0_TXD_4 C10 1650 -200 300 L 50 50 3 1 O
+X IO_GEMGXL_0_TXD_1 C11 1650 100 300 L 50 50 3 1 O
+X IO_GEMGXL_0_MDIO C12 -1650 -1200 300 R 50 50 3 1 B
+X IO_GEMGXL_0_CRS C13 -1650 -800 300 R 50 50 3 1 I
+X IO_GEMGXL_0_TX_CLK C8 1650 300 300 L 50 50 3 1 I
+X IO_GEMGXL_0_RXD_6 C9 -1650 -400 300 R 50 50 3 1 I
+X IO_GEMGXL_0_TXD_5 D10 1650 -300 300 L 50 50 3 1 O
+X IO_GEMGXL_0_TXD_2 D11 1650 0 300 L 50 50 3 1 O
+X IO_GEMGXL_0_TXD_7 D9 1650 -500 300 L 50 50 3 1 O
+X IO_GEMGXL_0_RXD_4 E10 -1650 -200 300 R 50 50 3 1 I
+X IO_GEMGXL_0_RXD_3 E11 -1650 -100 300 R 50 50 3 1 I
+X IO_GEMGXL_0_GTX_CLK E12 -1650 400 300 R 50 50 3 1 I
+X IO_GEMGXL_0_RXD_7 E9 -1650 -500 300 R 50 50 3 1 I
+X IO_GEMGXL_0_TX_ER F10 1650 -700 300 L 50 50 3 1 O
+X IO_GEMGXL_0_TXD_3 F11 1650 -100 300 L 50 50 3 1 O
+X IO_GEMGXL_0_RX_CLK F12 -1650 300 300 R 50 50 3 1 I
+X GIVSS H11 -1650 800 300 R 50 50 3 1 P
+X GIVDD J11 -1650 1200 300 R 50 50 3 1 W
+X GEMGXLPLL_AVSS J12 1650 800 300 L 50 50 3 1 W
+X GEMGXLPLL_AVDD K12 1650 1200 300 L 50 50 3 1 W
+X IO_GPIO_0_PINS_9 A21 -1250 200 300 R 50 50 4 1 B
+X IO_UART_1_RXD AA14 1250 1350 300 L 50 50 4 1 I
+X IO_UART_1_TXD AA15 1250 1450 300 L 50 50 4 1 O
+X IO_QSPI_2_DQ_0 AA16 1250 1050 300 L 50 50 4 1 B
+X IO_QSPI_2_CS_0 AB14 1250 650 300 L 50 50 4 1 O
+X IO_QSPI_2_DQ_1 AB15 1250 950 300 L 50 50 4 1 B
+X IO_QSPI_2_DQ_2 AB16 1250 850 300 L 50 50 4 1 B
+X IO_GPIO_0_PINS_11 B20 -1250 0 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_12 B21 -1250 -100 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_14 B22 -1250 -300 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_7 C20 -1250 400 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_2 C21 -1250 900 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_1 C22 -1250 1000 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_8 D19 -1250 300 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_5 D20 -1250 600 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_3 D21 -1250 800 300 R 50 50 4 1 B
+X IO_PWM_1_PWM_0 D22 -1250 -1350 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_4 E18 -1250 700 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_13 E19 -1250 -200 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_6 E20 -1250 500 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_0 F17 -1250 1100 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_10 F18 -1250 100 300 R 50 50 4 1 B
+X IO_PWM_1_PWM_3 F19 -1250 -1650 300 R 50 50 4 1 B
+X IO_PWM_0_PWM_2 F20 -1250 -1150 300 R 50 50 4 1 B
+X IO_PWM_0_PWM_1 F21 -1250 -1050 300 R 50 50 4 1 B
+X IO_QSPI_1_DQ_2 F22 1250 -600 300 L 50 50 4 1 B
+X IO_GPIO_0_PINS_15 G17 -1250 -400 300 R 50 50 4 1 B
+X IO_PWM_1_PWM_2 G18 -1250 -1550 300 R 50 50 4 1 B
+X IO_PWM_0_PWM_0 G19 -1250 -950 300 R 50 50 4 1 B
+X IO_PWM_0_PWM_3 G20 -1250 -1250 300 R 50 50 4 1 B
+X IO_QSPI_1_CS_1 G21 1250 -900 300 L 50 50 4 1 O
+X IO_QSPI_1_DQ_0 G22 1250 -400 300 L 50 50 4 1 B
+X IO_PWM_1_PWM_1 H17 -1250 -1450 300 R 50 50 4 1 B
+X IO_QSPI_1_SCK H18 1250 -300 300 L 50 50 4 1 O
+X IO_QSPI_1_CS_2 H19 1250 -1000 300 L 50 50 4 1 O
+X IO_QSPI_0_DQ_3 H20 1250 0 300 L 50 50 4 1 B
+X IO_QSPI_0_DQ_0 H21 1250 300 300 L 50 50 4 1 B
+X IO_QSPI_0_DQ_1 H22 1250 200 300 L 50 50 4 1 B
+X IO_QSPI_1_DQ_3 J17 1250 -700 300 L 50 50 4 1 B
+X IO_QSPI_1_DQ_1 J18 1250 -500 300 L 50 50 4 1 B
+X IO_QSPI_0_CS_0 J19 1250 -100 300 L 50 50 4 1 O
+X IO_QSPI_1_CS_3 J20 1250 -1100 300 L 50 50 4 1 O
+X IO_QSPI_0_DQ_2 J21 1250 100 300 L 50 50 4 1 B
+X IVSS K15 1250 -1350 300 L 50 50 4 1 P
+X IVDD K16 -1250 1650 300 R 50 50 4 1 W
+X IO_QSPI_1_CS_0 K17 1250 -800 300 L 50 50 4 1 O
+X IO_QSPI_0_SCK K18 1250 400 300 L 50 50 4 1 O
+X IVSS L15 1250 -1450 300 L 50 50 4 1 P
+X IVDD L16 -1250 1550 300 R 50 50 4 1 W
+X IVSS M15 1250 -1550 300 L 50 50 4 1 P
+X IVDD M16 -1250 1450 300 R 50 50 4 1 W
+X IVSS N15 1250 -1650 300 L 50 50 4 1 P
+X IVDD N16 -1250 1350 300 R 50 50 4 1 W
+X IO_I2C_0_SDA W13 -1250 -750 300 R 50 50 4 1 B
+X IO_UART_0_RXD W14 1250 1550 300 L 50 50 4 1 I
+X IO_QSPI_2_SCK W15 1250 1150 300 L 50 50 4 1 O
+X IO_UART_0_TXD Y13 1250 1650 300 L 50 50 4 1 O
+X IO_I2C_0_SCL Y14 -1250 -650 300 R 50 50 4 1 B
+X IO_QSPI_2_DQ_3 Y15 1250 750 300 L 50 50 4 1 B
+X HFXOSCIN A15 1600 -500 300 L 50 50 5 1 P
+X IO_PRCI_RSVD0 A16 -1600 1600 300 R 50 50 5 1 P
+X IO_PRCI_PORESET_N A17 -1600 -1600 300 R 50 50 5 1 I
+X IO_MSEL_MSEL_0 A19 1600 -1300 300 L 50 50 5 1 I
+X IO_MSEL_MSEL_2 A20 1600 -1500 300 L 50 50 5 1 I
+X HFXOSCOUT B15 1600 -800 300 L 50 50 5 1 P
+X IO_PRCI_RTCXALTCLKIN B16 -1600 1400 300 R 50 50 5 1 P
+X IO_PRCI_RSVD6 B17 -1600 600 300 R 50 50 5 1 P
+X IO_MSEL_MSEL_3 B19 1600 -1600 300 L 50 50 5 1 I
+X IO_PRCI_RSVD15 C14 1600 -100 300 L 50 50 5 1 P
+X IO_PRCI_HFXSEL C15 -1600 -300 300 R 50 50 5 1 I
+X IO_PRCI_RSVD4 C16 -1600 800 300 R 50 50 5 1 P
+X IO_PRCI_ERESET_N C17 -1600 -1300 300 R 50 50 5 1 I
+X IO_MSEL_MSEL_1 C18 1600 -1400 300 L 50 50 5 1 I
+X IO_JTAG_TDI C19 1600 500 300 L 50 50 5 1 I
+X IO_PRCI_RSVD1 D13 -1600 1200 300 R 50 50 5 1 P
+X IO_PRCI_RSVD11 D14 -1600 0 300 R 50 50 5 1 P
+X IO_PRCI_RTCXSEL D15 -1600 1500 300 R 50 50 5 1 I
+X IO_PRCI_RSVD3 D16 -1600 900 300 R 50 50 5 1 P
+X IO_PRCI_RSVD10 D17 -1600 100 300 R 50 50 5 1 P
+X IO_JTAG_TCK D18 1600 600 300 L 50 50 5 1 I
+X IO_PRCI_RSVD2 E13 -1600 1100 300 R 50 50 5 1 P
+X IO_PRCI_RSVD12 E14 -1600 -100 300 R 50 50 5 1 P
+X IO_PRCI_RSVD5 E15 -1600 700 300 R 50 50 5 1 P
+X IO_PRCI_RSVD9 E16 -1600 300 300 R 50 50 5 1 P
+X IO_JTAG_TDO E17 1600 400 300 L 50 50 5 1 O
+X IO_PRCI_RSVD14 F13 1600 0 300 L 50 50 5 1 P
+X IO_PRCI_RSVD13 F14 1600 100 300 L 50 50 5 1 P
+X IO_PRCI_HFXCLKIN F15 1600 -300 300 L 50 50 5 1 I
+X IO_JTAG_TMS F16 1600 300 300 L 50 50 5 1 I
+X IO_PRCI_RSVD7 G13 -1600 500 300 R 50 50 5 1 P
+X OTP_VDD G14 1600 1600 300 L 50 50 5 1 I
+X IO_PRCI_RSVD8 H13 -1600 400 300 R 50 50 5 1 P
+X COREPLL_AVSS J14 1600 900 300 L 50 50 5 1 I
+X COREPLL_AVDD K14 1600 1200 300 L 50 50 5 1 I
+X VSS A1 -900 -2200 300 R 50 50 6 1 W
+X VSS A14 -900 -2600 300 R 50 50 6 1 W
+X VSS A18 -900 -2700 300 R 50 50 6 1 W
+X VSS A2 -900 -2300 300 R 50 50 6 1 W
+X VSS A22 -900 -2800 300 R 50 50 6 1 W
+X VSS A3 -900 -2400 300 R 50 50 6 1 W
+X VSS A9 -900 -2500 300 R 50 50 6 1 W
+X VDD AA17 -900 -1900 300 R 50 50 6 1 W
+X VSS AA2 -900 -2900 300 R 50 50 6 1 W
+X VSS AB1 -900 -3000 300 R 50 50 6 1 W
+X VSS AB10 -900 -3300 300 R 50 50 6 1 W
+X VSS AB13 -900 -3400 300 R 50 50 6 1 W
+X VSS AB17 900 -3400 300 L 50 50 6 1 W
+X VSS AB22 900 -3300 300 L 50 50 6 1 W
+X VSS AB4 -900 -3100 300 R 50 50 6 1 W
+X VSS AB7 -900 -3200 300 R 50 50 6 1 W
+X VDD B14 -900 3300 300 R 50 50 6 1 W
+X VDD B18 -900 3200 300 R 50 50 6 1 W
+X VDD B9 -900 3400 300 R 50 50 6 1 W
+X VSS D1 900 -3200 300 L 50 50 6 1 W
+X VSS D12 900 -3100 300 L 50 50 6 1 W
+X VDD E21 -900 3000 300 R 50 50 6 1 W
+X VSS E22 900 -2900 300 L 50 50 6 1 W
+X VDD E3 -900 3100 300 R 50 50 6 1 W
+X VSS E4 900 -3000 300 L 50 50 6 1 W
+X VSS F7 900 -2800 300 L 50 50 6 1 W
+X VSS G10 900 -2400 300 L 50 50 6 1 W
+X VDD G11 -900 2800 300 R 50 50 6 1 W
+X VSS G12 900 -2300 300 L 50 50 6 1 W
+X VDD G15 -900 2700 300 R 50 50 6 1 W
+X VSS G16 900 -2200 300 L 50 50 6 1 W
+X VSS G2 900 -2700 300 L 50 50 6 1 W
+X VSS G6 900 -2600 300 L 50 50 6 1 W
+X VSS G8 900 -2500 300 L 50 50 6 1 W
+X VDD G9 -900 2900 300 R 50 50 6 1 W
+X VDD H10 -900 2500 300 R 50 50 6 1 W
+X VDD H12 -900 2400 300 R 50 50 6 1 W
+X VDD H14 -900 2300 300 R 50 50 6 1 W
+X VSS H15 900 -1900 300 L 50 50 6 1 W
+X VDD H16 -900 2200 300 R 50 50 6 1 W
+X VSS H7 900 -2100 300 L 50 50 6 1 W
+X VDD H8 -900 2600 300 R 50 50 6 1 W
+X VSS H9 900 -2000 300 L 50 50 6 1 W
+X VSS J1 900 -1800 300 L 50 50 6 1 W
+X VSS J10 900 -1500 300 L 50 50 6 1 W
+X VDD J15 -900 2000 300 R 50 50 6 1 W
+X VSS J16 900 -1400 300 L 50 50 6 1 W
+X VSS J22 900 -1300 300 L 50 50 6 1 W
+X VSS J6 900 -1700 300 L 50 50 6 1 W
+X VSS J8 900 -1600 300 L 50 50 6 1 W
+X VDD J9 -900 2100 300 R 50 50 6 1 W
+X VDD K10 -900 1800 300 R 50 50 6 1 W
+X VSS K11 900 -1000 300 L 50 50 6 1 W
+X VDD K21 -900 1700 300 R 50 50 6 1 W
+X VSS K7 900 -1200 300 L 50 50 6 1 W
+X VDD K8 -900 1900 300 R 50 50 6 1 W
+X VSS K9 900 -1100 300 L 50 50 6 1 W
+X VSS L10 -900 -2100 300 R 50 50 6 1 W
+X VDD L11 -900 1600 300 R 50 50 6 1 W
+X VSS L12 900 -700 300 L 50 50 6 1 W
+X VDD L13 -900 1500 300 R 50 50 6 1 W
+X VSS L14 900 -600 300 L 50 50 6 1 W
+X VSS L6 900 -900 300 L 50 50 6 1 W
+X VSS L8 900 -800 300 L 50 50 6 1 W
+X VDD M10 -900 1300 300 R 50 50 6 1 W
+X VSS M11 900 -400 300 L 50 50 6 1 W
+X VDD M12 -900 1200 300 R 50 50 6 1 W
+X VSS M13 900 -300 300 L 50 50 6 1 W
+X VDD M14 -900 1100 300 R 50 50 6 1 W
+X VSS M7 900 -500 300 L 50 50 6 1 W
+X VDD M8 -900 1400 300 R 50 50 6 1 W
+X VSS N10 900 0 300 L 50 50 6 1 W
+X VDD N11 -900 900 300 R 50 50 6 1 W
+X VSS N12 900 100 300 L 50 50 6 1 W
+X VDD N13 -900 800 300 R 50 50 6 1 W
+X VSS N14 900 200 300 L 50 50 6 1 W
+X VSS N6 900 -200 300 L 50 50 6 1 W
+X VSS N8 900 -100 300 L 50 50 6 1 W
+X VDD N9 -900 1000 300 R 50 50 6 1 W
+X VSS P1 900 300 300 L 50 50 6 1 W
+X VDD P10 -900 500 300 R 50 50 6 1 W
+X VSS P11 900 600 300 L 50 50 6 1 W
+X VDD P12 -900 400 300 R 50 50 6 1 W
+X VSS P13 900 700 300 L 50 50 6 1 W
+X VDD P14 -900 300 300 R 50 50 6 1 W
+X VSS P15 900 800 300 L 50 50 6 1 W
+X VDD P16 -900 200 300 R 50 50 6 1 W
+X VDD P2 -900 700 300 R 50 50 6 1 W
+X VDD P21 -900 100 300 R 50 50 6 1 W
+X VSS P22 900 900 300 L 50 50 6 1 W
+X VSS P7 900 400 300 L 50 50 6 1 W
+X VDD P8 -900 600 300 R 50 50 6 1 W
+X VSS P9 900 500 300 L 50 50 6 1 W
+X VSS R10 900 1200 300 L 50 50 6 1 W
+X VDD R11 -900 -100 300 R 50 50 6 1 W
+X VSS R12 900 1300 300 L 50 50 6 1 W
+X VDD R13 -900 -200 300 R 50 50 6 1 W
+X VSS R14 900 1400 300 L 50 50 6 1 W
+X VDD R15 -900 -300 300 R 50 50 6 1 W
+X VSS R16 900 1500 300 L 50 50 6 1 W
+X VSS R6 900 1000 300 L 50 50 6 1 W
+X VSS R8 900 1100 300 L 50 50 6 1 W
+X VDD R9 -900 0 300 R 50 50 6 1 W
+X VDD T10 -900 -500 300 R 50 50 6 1 W
+X VSS T11 900 1800 300 L 50 50 6 1 W
+X VDD T12 -900 -600 300 R 50 50 6 1 W
+X VSS T13 900 1900 300 L 50 50 6 1 W
+X VDD T14 -900 -700 300 R 50 50 6 1 W
+X VSS T15 900 2000 300 L 50 50 6 1 W
+X VDD T16 -900 -800 300 R 50 50 6 1 W
+X VSS T17 900 2100 300 L 50 50 6 1 W
+X VSS T7 900 1600 300 L 50 50 6 1 W
+X VDD T8 -900 -400 300 R 50 50 6 1 W
+X VSS T9 900 1700 300 L 50 50 6 1 W
+X VSS U10 900 2400 300 L 50 50 6 1 W
+X VDD U11 -900 -1000 300 R 50 50 6 1 W
+X VSS U12 900 2500 300 L 50 50 6 1 W
+X VDD U13 -900 -1100 300 R 50 50 6 1 W
+X VSS U14 900 2600 300 L 50 50 6 1 W
+X VDD U15 -900 -1200 300 R 50 50 6 1 W
+X VSS U16 900 2700 300 L 50 50 6 1 W
+X VSS U6 900 2200 300 L 50 50 6 1 W
+X VSS U8 900 2300 300 L 50 50 6 1 W
+X VDD U9 -900 -900 300 R 50 50 6 1 W
+X VSS V1 900 2800 300 L 50 50 6 1 W
+X VDD V10 -900 -1500 300 R 50 50 6 1 W
+X VSS V11 900 3100 300 L 50 50 6 1 W
+X VDD V12 -900 -1600 300 R 50 50 6 1 W
+X VSS V13 900 3200 300 L 50 50 6 1 W
+X VDD V14 -900 -1700 300 R 50 50 6 1 W
+X VSS V15 900 3300 300 L 50 50 6 1 W
+X VDD V21 -900 -1800 300 R 50 50 6 1 W
+X VSS V22 900 3400 300 L 50 50 6 1 W
+X VDD V6 -900 -1300 300 R 50 50 6 1 W
+X VSS V7 900 2900 300 L 50 50 6 1 W
+X VDD V8 -900 -1400 300 R 50 50 6 1 W
+X VSS V9 900 3000 300 L 50 50 6 1 W
 ENDDRAW
 ENDDEF
 #

From 63ff02a279f0d8a451e171fe2ba06fc6184ce388 Mon Sep 17 00:00:00 2001
From: antonlysak <antonlysak@gmail.com>
Date: Mon, 25 Jun 2018 20:40:05 +0300
Subject: [PATCH 002/201] Fix pins location of SiFive U540 MCU

---
 MCU_SiFive.lib | 184 ++++++++++++++++++++++++-------------------------
 1 file changed, 92 insertions(+), 92 deletions(-)

diff --git a/MCU_SiFive.lib b/MCU_SiFive.lib
index 2d6a2beb30..bb4b4ab1b7 100644
--- a/MCU_SiFive.lib
+++ b/MCU_SiFive.lib
@@ -78,8 +78,8 @@ $ENDFPLIST
 DRAW
 S -1500 -1800 1500 1800 1 1 10 f
 S -1300 -4850 1300 4850 2 1 10 f
-S -1350 -1300 1350 1300 3 1 10 f
-S -950 -1800 950 1800 4 1 10 f
+S -1300 -1300 1300 1300 3 1 10 f
+S -900 -1800 900 1800 4 1 10 f
 S -1300 -1700 1300 1700 5 1 10 f
 S -600 -3500 600 3500 6 1 10 f
 X IO_CHIPLINK_0_B2C_DATA_2 AA18 -1800 1400 300 R 50 50 1 1 I
@@ -304,96 +304,96 @@ X IO_DDR_MEM_CS_N[0] Y6 -1600 -500 300 R 50 50 2 1 O
 X IO_DDR_MEM_DQS_P[6] Y7 1600 -3300 300 L 50 50 2 1 B
 X IO_DDR_MEM_DQS_M[7] Y8 1600 -4600 300 L 50 50 2 1 B
 X IO_DDR_MEM_DATA[53] Y9 1600 -2700 300 L 50 50 2 1 B
-X IO_GEMGXL_0_RXD_2 A10 -1650 0 300 R 50 50 3 1 I
-X IO_GEMGXL_0_RX_DV A11 -1650 -600 300 R 50 50 3 1 I
-X IO_GEMGXL_0_RXD_0 A12 -1650 200 300 R 50 50 3 1 I
-X IO_GEMGXL_0_COL A13 -1650 -900 300 R 50 50 3 1 I
-X IO_GEMGXL_0_RXD_5 A8 -1650 -300 300 R 50 50 3 1 I
-X IO_GEMGXL_0_RXD_1 B10 -1650 100 300 R 50 50 3 1 I
-X IO_GEMGXL_0_RX_ER B11 -1650 -700 300 R 50 50 3 1 I
-X IO_GEMGXL_0_TXD_0 B12 1650 200 300 L 50 50 3 1 O
-X IO_GEMGXL_0_MDC B13 -1650 -1100 300 R 50 50 3 1 O
-X IO_GEMGXL_0_TX_EN B7 1650 -600 300 L 50 50 3 1 O
-X IO_GEMGXL_0_TXD_6 B8 1650 -400 300 L 50 50 3 1 O
-X IO_GEMGXL_0_TXD_4 C10 1650 -200 300 L 50 50 3 1 O
-X IO_GEMGXL_0_TXD_1 C11 1650 100 300 L 50 50 3 1 O
-X IO_GEMGXL_0_MDIO C12 -1650 -1200 300 R 50 50 3 1 B
-X IO_GEMGXL_0_CRS C13 -1650 -800 300 R 50 50 3 1 I
-X IO_GEMGXL_0_TX_CLK C8 1650 300 300 L 50 50 3 1 I
-X IO_GEMGXL_0_RXD_6 C9 -1650 -400 300 R 50 50 3 1 I
-X IO_GEMGXL_0_TXD_5 D10 1650 -300 300 L 50 50 3 1 O
-X IO_GEMGXL_0_TXD_2 D11 1650 0 300 L 50 50 3 1 O
-X IO_GEMGXL_0_TXD_7 D9 1650 -500 300 L 50 50 3 1 O
-X IO_GEMGXL_0_RXD_4 E10 -1650 -200 300 R 50 50 3 1 I
-X IO_GEMGXL_0_RXD_3 E11 -1650 -100 300 R 50 50 3 1 I
-X IO_GEMGXL_0_GTX_CLK E12 -1650 400 300 R 50 50 3 1 I
-X IO_GEMGXL_0_RXD_7 E9 -1650 -500 300 R 50 50 3 1 I
-X IO_GEMGXL_0_TX_ER F10 1650 -700 300 L 50 50 3 1 O
-X IO_GEMGXL_0_TXD_3 F11 1650 -100 300 L 50 50 3 1 O
-X IO_GEMGXL_0_RX_CLK F12 -1650 300 300 R 50 50 3 1 I
-X GIVSS H11 -1650 800 300 R 50 50 3 1 P
-X GIVDD J11 -1650 1200 300 R 50 50 3 1 W
-X GEMGXLPLL_AVSS J12 1650 800 300 L 50 50 3 1 W
-X GEMGXLPLL_AVDD K12 1650 1200 300 L 50 50 3 1 W
-X IO_GPIO_0_PINS_9 A21 -1250 200 300 R 50 50 4 1 B
-X IO_UART_1_RXD AA14 1250 1350 300 L 50 50 4 1 I
-X IO_UART_1_TXD AA15 1250 1450 300 L 50 50 4 1 O
-X IO_QSPI_2_DQ_0 AA16 1250 1050 300 L 50 50 4 1 B
-X IO_QSPI_2_CS_0 AB14 1250 650 300 L 50 50 4 1 O
-X IO_QSPI_2_DQ_1 AB15 1250 950 300 L 50 50 4 1 B
-X IO_QSPI_2_DQ_2 AB16 1250 850 300 L 50 50 4 1 B
-X IO_GPIO_0_PINS_11 B20 -1250 0 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_12 B21 -1250 -100 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_14 B22 -1250 -300 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_7 C20 -1250 400 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_2 C21 -1250 900 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_1 C22 -1250 1000 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_8 D19 -1250 300 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_5 D20 -1250 600 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_3 D21 -1250 800 300 R 50 50 4 1 B
-X IO_PWM_1_PWM_0 D22 -1250 -1350 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_4 E18 -1250 700 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_13 E19 -1250 -200 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_6 E20 -1250 500 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_0 F17 -1250 1100 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_10 F18 -1250 100 300 R 50 50 4 1 B
-X IO_PWM_1_PWM_3 F19 -1250 -1650 300 R 50 50 4 1 B
-X IO_PWM_0_PWM_2 F20 -1250 -1150 300 R 50 50 4 1 B
-X IO_PWM_0_PWM_1 F21 -1250 -1050 300 R 50 50 4 1 B
-X IO_QSPI_1_DQ_2 F22 1250 -600 300 L 50 50 4 1 B
-X IO_GPIO_0_PINS_15 G17 -1250 -400 300 R 50 50 4 1 B
-X IO_PWM_1_PWM_2 G18 -1250 -1550 300 R 50 50 4 1 B
-X IO_PWM_0_PWM_0 G19 -1250 -950 300 R 50 50 4 1 B
-X IO_PWM_0_PWM_3 G20 -1250 -1250 300 R 50 50 4 1 B
-X IO_QSPI_1_CS_1 G21 1250 -900 300 L 50 50 4 1 O
-X IO_QSPI_1_DQ_0 G22 1250 -400 300 L 50 50 4 1 B
-X IO_PWM_1_PWM_1 H17 -1250 -1450 300 R 50 50 4 1 B
-X IO_QSPI_1_SCK H18 1250 -300 300 L 50 50 4 1 O
-X IO_QSPI_1_CS_2 H19 1250 -1000 300 L 50 50 4 1 O
-X IO_QSPI_0_DQ_3 H20 1250 0 300 L 50 50 4 1 B
-X IO_QSPI_0_DQ_0 H21 1250 300 300 L 50 50 4 1 B
-X IO_QSPI_0_DQ_1 H22 1250 200 300 L 50 50 4 1 B
-X IO_QSPI_1_DQ_3 J17 1250 -700 300 L 50 50 4 1 B
-X IO_QSPI_1_DQ_1 J18 1250 -500 300 L 50 50 4 1 B
-X IO_QSPI_0_CS_0 J19 1250 -100 300 L 50 50 4 1 O
-X IO_QSPI_1_CS_3 J20 1250 -1100 300 L 50 50 4 1 O
-X IO_QSPI_0_DQ_2 J21 1250 100 300 L 50 50 4 1 B
-X IVSS K15 1250 -1350 300 L 50 50 4 1 P
-X IVDD K16 -1250 1650 300 R 50 50 4 1 W
-X IO_QSPI_1_CS_0 K17 1250 -800 300 L 50 50 4 1 O
-X IO_QSPI_0_SCK K18 1250 400 300 L 50 50 4 1 O
-X IVSS L15 1250 -1450 300 L 50 50 4 1 P
-X IVDD L16 -1250 1550 300 R 50 50 4 1 W
-X IVSS M15 1250 -1550 300 L 50 50 4 1 P
-X IVDD M16 -1250 1450 300 R 50 50 4 1 W
-X IVSS N15 1250 -1650 300 L 50 50 4 1 P
-X IVDD N16 -1250 1350 300 R 50 50 4 1 W
-X IO_I2C_0_SDA W13 -1250 -750 300 R 50 50 4 1 B
-X IO_UART_0_RXD W14 1250 1550 300 L 50 50 4 1 I
-X IO_QSPI_2_SCK W15 1250 1150 300 L 50 50 4 1 O
-X IO_UART_0_TXD Y13 1250 1650 300 L 50 50 4 1 O
-X IO_I2C_0_SCL Y14 -1250 -650 300 R 50 50 4 1 B
-X IO_QSPI_2_DQ_3 Y15 1250 750 300 L 50 50 4 1 B
+X IO_GEMGXL_0_RXD_2 A10 -1600 0 300 R 50 50 3 1 I
+X IO_GEMGXL_0_RX_DV A11 -1600 -600 300 R 50 50 3 1 I
+X IO_GEMGXL_0_RXD_0 A12 -1600 200 300 R 50 50 3 1 I
+X IO_GEMGXL_0_COL A13 -1600 -900 300 R 50 50 3 1 I
+X IO_GEMGXL_0_RXD_5 A8 -1600 -300 300 R 50 50 3 1 I
+X IO_GEMGXL_0_RXD_1 B10 -1600 100 300 R 50 50 3 1 I
+X IO_GEMGXL_0_RX_ER B11 -1600 -700 300 R 50 50 3 1 I
+X IO_GEMGXL_0_TXD_0 B12 1600 200 300 L 50 50 3 1 O
+X IO_GEMGXL_0_MDC B13 -1600 -1100 300 R 50 50 3 1 O
+X IO_GEMGXL_0_TX_EN B7 1600 -600 300 L 50 50 3 1 O
+X IO_GEMGXL_0_TXD_6 B8 1600 -400 300 L 50 50 3 1 O
+X IO_GEMGXL_0_TXD_4 C10 1600 -200 300 L 50 50 3 1 O
+X IO_GEMGXL_0_TXD_1 C11 1600 100 300 L 50 50 3 1 O
+X IO_GEMGXL_0_MDIO C12 -1600 -1200 300 R 50 50 3 1 B
+X IO_GEMGXL_0_CRS C13 -1600 -800 300 R 50 50 3 1 I
+X IO_GEMGXL_0_TX_CLK C8 1600 300 300 L 50 50 3 1 I
+X IO_GEMGXL_0_RXD_6 C9 -1600 -400 300 R 50 50 3 1 I
+X IO_GEMGXL_0_TXD_5 D10 1600 -300 300 L 50 50 3 1 O
+X IO_GEMGXL_0_TXD_2 D11 1600 0 300 L 50 50 3 1 O
+X IO_GEMGXL_0_TXD_7 D9 1600 -500 300 L 50 50 3 1 O
+X IO_GEMGXL_0_RXD_4 E10 -1600 -200 300 R 50 50 3 1 I
+X IO_GEMGXL_0_RXD_3 E11 -1600 -100 300 R 50 50 3 1 I
+X IO_GEMGXL_0_GTX_CLK E12 -1600 400 300 R 50 50 3 1 I
+X IO_GEMGXL_0_RXD_7 E9 -1600 -500 300 R 50 50 3 1 I
+X IO_GEMGXL_0_TX_ER F10 1600 -700 300 L 50 50 3 1 O
+X IO_GEMGXL_0_TXD_3 F11 1600 -100 300 L 50 50 3 1 O
+X IO_GEMGXL_0_RX_CLK F12 -1600 300 300 R 50 50 3 1 I
+X GIVSS H11 -1600 800 300 R 50 50 3 1 P
+X GIVDD J11 -1600 1200 300 R 50 50 3 1 W
+X GEMGXLPLL_AVSS J12 1600 800 300 L 50 50 3 1 W
+X GEMGXLPLL_AVDD K12 1600 1200 300 L 50 50 3 1 W
+X IO_GPIO_0_PINS_9 A21 -1200 200 300 R 50 50 4 1 B
+X IO_UART_1_RXD AA14 1200 1350 300 L 50 50 4 1 I
+X IO_UART_1_TXD AA15 1200 1450 300 L 50 50 4 1 O
+X IO_QSPI_2_DQ_0 AA16 1200 1050 300 L 50 50 4 1 B
+X IO_QSPI_2_CS_0 AB14 1200 650 300 L 50 50 4 1 O
+X IO_QSPI_2_DQ_1 AB15 1200 950 300 L 50 50 4 1 B
+X IO_QSPI_2_DQ_2 AB16 1200 850 300 L 50 50 4 1 B
+X IO_GPIO_0_PINS_11 B20 -1200 0 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_12 B21 -1200 -100 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_14 B22 -1200 -300 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_7 C20 -1200 400 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_2 C21 -1200 900 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_1 C22 -1200 1000 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_8 D19 -1200 300 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_5 D20 -1200 600 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_3 D21 -1200 800 300 R 50 50 4 1 B
+X IO_PWM_1_PWM_0 D22 -1200 -1350 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_4 E18 -1200 700 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_13 E19 -1200 -200 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_6 E20 -1200 500 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_0 F17 -1200 1100 300 R 50 50 4 1 B
+X IO_GPIO_0_PINS_10 F18 -1200 100 300 R 50 50 4 1 B
+X IO_PWM_1_PWM_3 F19 -1200 -1650 300 R 50 50 4 1 B
+X IO_PWM_0_PWM_2 F20 -1200 -1150 300 R 50 50 4 1 B
+X IO_PWM_0_PWM_1 F21 -1200 -1050 300 R 50 50 4 1 B
+X IO_QSPI_1_DQ_2 F22 1200 -600 300 L 50 50 4 1 B
+X IO_GPIO_0_PINS_15 G17 -1200 -400 300 R 50 50 4 1 B
+X IO_PWM_1_PWM_2 G18 -1200 -1550 300 R 50 50 4 1 B
+X IO_PWM_0_PWM_0 G19 -1200 -950 300 R 50 50 4 1 B
+X IO_PWM_0_PWM_3 G20 -1200 -1250 300 R 50 50 4 1 B
+X IO_QSPI_1_CS_1 G21 1200 -900 300 L 50 50 4 1 O
+X IO_QSPI_1_DQ_0 G22 1200 -400 300 L 50 50 4 1 B
+X IO_PWM_1_PWM_1 H17 -1200 -1450 300 R 50 50 4 1 B
+X IO_QSPI_1_SCK H18 1200 -300 300 L 50 50 4 1 O
+X IO_QSPI_1_CS_2 H19 1200 -1000 300 L 50 50 4 1 O
+X IO_QSPI_0_DQ_3 H20 1200 0 300 L 50 50 4 1 B
+X IO_QSPI_0_DQ_0 H21 1200 300 300 L 50 50 4 1 B
+X IO_QSPI_0_DQ_1 H22 1200 200 300 L 50 50 4 1 B
+X IO_QSPI_1_DQ_3 J17 1200 -700 300 L 50 50 4 1 B
+X IO_QSPI_1_DQ_1 J18 1200 -500 300 L 50 50 4 1 B
+X IO_QSPI_0_CS_0 J19 1200 -100 300 L 50 50 4 1 O
+X IO_QSPI_1_CS_3 J20 1200 -1100 300 L 50 50 4 1 O
+X IO_QSPI_0_DQ_2 J21 1200 100 300 L 50 50 4 1 B
+X IVSS K15 1200 -1350 300 L 50 50 4 1 P
+X IVDD K16 -1200 1650 300 R 50 50 4 1 W
+X IO_QSPI_1_CS_0 K17 1200 -800 300 L 50 50 4 1 O
+X IO_QSPI_0_SCK K18 1200 400 300 L 50 50 4 1 O
+X IVSS L15 1200 -1450 300 L 50 50 4 1 P
+X IVDD L16 -1200 1550 300 R 50 50 4 1 W
+X IVSS M15 1200 -1550 300 L 50 50 4 1 P
+X IVDD M16 -1200 1450 300 R 50 50 4 1 W
+X IVSS N15 1200 -1650 300 L 50 50 4 1 P
+X IVDD N16 -1200 1350 300 R 50 50 4 1 W
+X IO_I2C_0_SDA W13 -1200 -750 300 R 50 50 4 1 B
+X IO_UART_0_RXD W14 1200 1550 300 L 50 50 4 1 I
+X IO_QSPI_2_SCK W15 1200 1150 300 L 50 50 4 1 O
+X IO_UART_0_TXD Y13 1200 1650 300 L 50 50 4 1 O
+X IO_I2C_0_SCL Y14 -1200 -650 300 R 50 50 4 1 B
+X IO_QSPI_2_DQ_3 Y15 1200 750 300 L 50 50 4 1 B
 X HFXOSCIN A15 1600 -500 300 L 50 50 5 1 P
 X IO_PRCI_RSVD0 A16 -1600 1600 300 R 50 50 5 1 P
 X IO_PRCI_PORESET_N A17 -1600 -1600 300 R 50 50 5 1 I

From e0c0c6d653d331088938ec08bffded4fe39c3742 Mon Sep 17 00:00:00 2001
From: antonlysak <antonlysak@gmail.com>
Date: Mon, 25 Jun 2018 20:47:27 +0300
Subject: [PATCH 003/201] Fixing pins location of SiFive U540 MCU

---
 MCU_SiFive.lib | 56 +++++++++++++++++++++++++-------------------------
 1 file changed, 28 insertions(+), 28 deletions(-)

diff --git a/MCU_SiFive.lib b/MCU_SiFive.lib
index bb4b4ab1b7..ab87dbe74f 100644
--- a/MCU_SiFive.lib
+++ b/MCU_SiFive.lib
@@ -336,12 +336,12 @@ X GIVDD J11 -1600 1200 300 R 50 50 3 1 W
 X GEMGXLPLL_AVSS J12 1600 800 300 L 50 50 3 1 W
 X GEMGXLPLL_AVDD K12 1600 1200 300 L 50 50 3 1 W
 X IO_GPIO_0_PINS_9 A21 -1200 200 300 R 50 50 4 1 B
-X IO_UART_1_RXD AA14 1200 1350 300 L 50 50 4 1 I
-X IO_UART_1_TXD AA15 1200 1450 300 L 50 50 4 1 O
-X IO_QSPI_2_DQ_0 AA16 1200 1050 300 L 50 50 4 1 B
-X IO_QSPI_2_CS_0 AB14 1200 650 300 L 50 50 4 1 O
-X IO_QSPI_2_DQ_1 AB15 1200 950 300 L 50 50 4 1 B
-X IO_QSPI_2_DQ_2 AB16 1200 850 300 L 50 50 4 1 B
+X IO_UART_1_RXD AA14 1200 1300 300 L 50 50 4 1 I
+X IO_UART_1_TXD AA15 1200 1400 300 L 50 50 4 1 O
+X IO_QSPI_2_DQ_0 AA16 1200 1000 300 L 50 50 4 1 B
+X IO_QSPI_2_CS_0 AB14 1200 600 300 L 50 50 4 1 O
+X IO_QSPI_2_DQ_1 AB15 1200 900 300 L 50 50 4 1 B
+X IO_QSPI_2_DQ_2 AB16 1200 800 300 L 50 50 4 1 B
 X IO_GPIO_0_PINS_11 B20 -1200 0 300 R 50 50 4 1 B
 X IO_GPIO_0_PINS_12 B21 -1200 -100 300 R 50 50 4 1 B
 X IO_GPIO_0_PINS_14 B22 -1200 -300 300 R 50 50 4 1 B
@@ -351,23 +351,23 @@ X IO_GPIO_0_PINS_1 C22 -1200 1000 300 R 50 50 4 1 B
 X IO_GPIO_0_PINS_8 D19 -1200 300 300 R 50 50 4 1 B
 X IO_GPIO_0_PINS_5 D20 -1200 600 300 R 50 50 4 1 B
 X IO_GPIO_0_PINS_3 D21 -1200 800 300 R 50 50 4 1 B
-X IO_PWM_1_PWM_0 D22 -1200 -1350 300 R 50 50 4 1 B
+X IO_PWM_1_PWM_0 D22 -1200 -1300 300 R 50 50 4 1 B
 X IO_GPIO_0_PINS_4 E18 -1200 700 300 R 50 50 4 1 B
 X IO_GPIO_0_PINS_13 E19 -1200 -200 300 R 50 50 4 1 B
 X IO_GPIO_0_PINS_6 E20 -1200 500 300 R 50 50 4 1 B
 X IO_GPIO_0_PINS_0 F17 -1200 1100 300 R 50 50 4 1 B
 X IO_GPIO_0_PINS_10 F18 -1200 100 300 R 50 50 4 1 B
-X IO_PWM_1_PWM_3 F19 -1200 -1650 300 R 50 50 4 1 B
-X IO_PWM_0_PWM_2 F20 -1200 -1150 300 R 50 50 4 1 B
-X IO_PWM_0_PWM_1 F21 -1200 -1050 300 R 50 50 4 1 B
+X IO_PWM_1_PWM_3 F19 -1200 -1600 300 R 50 50 4 1 B
+X IO_PWM_0_PWM_2 F20 -1200 -1100 300 R 50 50 4 1 B
+X IO_PWM_0_PWM_1 F21 -1200 -1000 300 R 50 50 4 1 B
 X IO_QSPI_1_DQ_2 F22 1200 -600 300 L 50 50 4 1 B
 X IO_GPIO_0_PINS_15 G17 -1200 -400 300 R 50 50 4 1 B
-X IO_PWM_1_PWM_2 G18 -1200 -1550 300 R 50 50 4 1 B
-X IO_PWM_0_PWM_0 G19 -1200 -950 300 R 50 50 4 1 B
-X IO_PWM_0_PWM_3 G20 -1200 -1250 300 R 50 50 4 1 B
+X IO_PWM_1_PWM_2 G18 -1200 -1500 300 R 50 50 4 1 B
+X IO_PWM_0_PWM_0 G19 -1200 -900 300 R 50 50 4 1 B
+X IO_PWM_0_PWM_3 G20 -1200 -1200 300 R 50 50 4 1 B
 X IO_QSPI_1_CS_1 G21 1200 -900 300 L 50 50 4 1 O
 X IO_QSPI_1_DQ_0 G22 1200 -400 300 L 50 50 4 1 B
-X IO_PWM_1_PWM_1 H17 -1200 -1450 300 R 50 50 4 1 B
+X IO_PWM_1_PWM_1 H17 -1200 -1400 300 R 50 50 4 1 B
 X IO_QSPI_1_SCK H18 1200 -300 300 L 50 50 4 1 O
 X IO_QSPI_1_CS_2 H19 1200 -1000 300 L 50 50 4 1 O
 X IO_QSPI_0_DQ_3 H20 1200 0 300 L 50 50 4 1 B
@@ -378,22 +378,22 @@ X IO_QSPI_1_DQ_1 J18 1200 -500 300 L 50 50 4 1 B
 X IO_QSPI_0_CS_0 J19 1200 -100 300 L 50 50 4 1 O
 X IO_QSPI_1_CS_3 J20 1200 -1100 300 L 50 50 4 1 O
 X IO_QSPI_0_DQ_2 J21 1200 100 300 L 50 50 4 1 B
-X IVSS K15 1200 -1350 300 L 50 50 4 1 P
-X IVDD K16 -1200 1650 300 R 50 50 4 1 W
+X IVSS K15 1200 -1300 300 L 50 50 4 1 P
+X IVDD K16 -1200 1600 300 R 50 50 4 1 W
 X IO_QSPI_1_CS_0 K17 1200 -800 300 L 50 50 4 1 O
 X IO_QSPI_0_SCK K18 1200 400 300 L 50 50 4 1 O
-X IVSS L15 1200 -1450 300 L 50 50 4 1 P
-X IVDD L16 -1200 1550 300 R 50 50 4 1 W
-X IVSS M15 1200 -1550 300 L 50 50 4 1 P
-X IVDD M16 -1200 1450 300 R 50 50 4 1 W
-X IVSS N15 1200 -1650 300 L 50 50 4 1 P
-X IVDD N16 -1200 1350 300 R 50 50 4 1 W
-X IO_I2C_0_SDA W13 -1200 -750 300 R 50 50 4 1 B
-X IO_UART_0_RXD W14 1200 1550 300 L 50 50 4 1 I
-X IO_QSPI_2_SCK W15 1200 1150 300 L 50 50 4 1 O
-X IO_UART_0_TXD Y13 1200 1650 300 L 50 50 4 1 O
-X IO_I2C_0_SCL Y14 -1200 -650 300 R 50 50 4 1 B
-X IO_QSPI_2_DQ_3 Y15 1200 750 300 L 50 50 4 1 B
+X IVSS L15 1200 -1400 300 L 50 50 4 1 P
+X IVDD L16 -1200 1500 300 R 50 50 4 1 W
+X IVSS M15 1200 -1500 300 L 50 50 4 1 P
+X IVDD M16 -1200 1400 300 R 50 50 4 1 W
+X IVSS N15 1200 -1600 300 L 50 50 4 1 P
+X IVDD N16 -1200 1300 300 R 50 50 4 1 W
+X IO_I2C_0_SDA W13 -1200 -700 300 R 50 50 4 1 B
+X IO_UART_0_RXD W14 1200 1500 300 L 50 50 4 1 I
+X IO_QSPI_2_SCK W15 1200 1100 300 L 50 50 4 1 O
+X IO_UART_0_TXD Y13 1200 1600 300 L 50 50 4 1 O
+X IO_I2C_0_SCL Y14 -1200 -600 300 R 50 50 4 1 B
+X IO_QSPI_2_DQ_3 Y15 1200 700 300 L 50 50 4 1 B
 X HFXOSCIN A15 1600 -500 300 L 50 50 5 1 P
 X IO_PRCI_RSVD0 A16 -1600 1600 300 R 50 50 5 1 P
 X IO_PRCI_PORESET_N A17 -1600 -1600 300 R 50 50 5 1 I

From 9c8d45fa94f64dba860bdc400d872440bd27b415 Mon Sep 17 00:00:00 2001
From: Serkan <seselcuk@asplabauto.com>
Date: Thu, 20 Sep 2018 20:26:17 +0200
Subject: [PATCH 004/201] OKI-78SR-3.3_1.5-W36-C, OKI-78SR-5_1.5-W36-C,
 OKI-78SR-12_1.0-W36-C added.

---
 Regulator_Switching.dcm | 18 ++++++++++++++++++
 Regulator_Switching.lib | 19 +++++++++++++++++++
 2 files changed, 37 insertions(+)

diff --git a/Regulator_Switching.dcm b/Regulator_Switching.dcm
index 2f26ff566a..68588db6de 100644
--- a/Regulator_Switching.dcm
+++ b/Regulator_Switching.dcm
@@ -3276,6 +3276,24 @@ K isolated isolation dc-dc converter transformer
 F http://power.murata.com/data/power/ncl/kdc_nxe2.pdf
 $ENDCMP
 #
+$CMP OKI-78SR-12_1.0-W36-C
+D 1.0A Step-Down DC/DC-Regulator, 15-36V input, 12V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_vertical
+K dc-dc murata Step-Down DC/DC-Regulator
+F https://power.murata.com/data/power/oki-78sr.pdf
+$ENDCMP
+#
+$CMP OKI-78SR-3.3_1.5-W36-C
+D 1.5A Step-Down DC/DC-Regulator, 7-36V input, 3.3V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_vertical
+K dc-dc murata Step-Down DC/DC-Regulator
+F https://power.murata.com/data/power/oki-78sr.pdf
+$ENDCMP
+#
+$CMP OKI-78SR-5_1.5-W36-C
+D 1.5A Step-Down DC/DC-Regulator, 7-36V input, 5V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_vertical
+K dc-dc murata Step-Down DC/DC-Regulator
+F https://power.murata.com/data/power/oki-78sr.pdf
+$ENDCMP
+#
 $CMP PAM2305AAB120
 D 1A, Step-Down DC/DC-Converter, 1.2V Fixed Output Voltage, 1.5MHz, TSOT-23
 K Voltage regulator switching buck fixed output analog
diff --git a/Regulator_Switching.lib b/Regulator_Switching.lib
index 9433b36e09..9a8fce7c73 100644
--- a/Regulator_Switching.lib
+++ b/Regulator_Switching.lib
@@ -4041,6 +4041,25 @@ X +VOUT 8 500 200 100 L 50 50 1 1 w
 ENDDRAW
 ENDDEF
 #
+# OKI-78SR-3.3_1.5-W36-C
+#
+DEF OKI-78SR-3.3_1.5-W36-C U 0 10 Y Y 1 F N
+F0 "U" -150 125 50 H V C CNN
+F1 "OKI-78SR-3.3_1.5-W36-C" 0 125 50 H V L CNN
+F2 "Converter_DCDC:Converter_DCDC_muRata_OKI-78SR_vertical" 50 -250 50 H I L CIN
+F3 "" 0 0 50 H I C CNN
+ALIAS OKI-78SR-5_1.5-W36-C OKI-78SR-12_1.0-W36-C
+$FPLIST
+ *OKI?78SR*vertical*
+$ENDFPLIST
+DRAW
+S -200 75 200 -200 0 1 10 f
+X IN 1 -300 0 100 R 50 50 1 1 W
+X GND 2 0 -300 100 U 50 50 1 1 W
+X OUT 3 300 0 100 L 50 50 1 1 w
+ENDDRAW
+ENDDEF
+#
 # PAM2305AAB330
 #
 DEF PAM2305AAB330 U 0 20 Y Y 1 F N

From ee84d9201601f302ef1c9d7dea825699204a1441 Mon Sep 17 00:00:00 2001
From: Serkan <seselcuk@asplabauto.com>
Date: Thu, 20 Sep 2018 20:35:52 +0200
Subject: [PATCH 005/201] OKI-78SR-3.3/1.5-W36H-C, OKI-78SR-5/1.5-W36H-C,
 OKI-78SR-12/1.0-W36H-C added.

---
 Regulator_Switching.dcm | 18 ++++++++++++++++++
 Regulator_Switching.lib | 19 +++++++++++++++++++
 2 files changed, 37 insertions(+)

diff --git a/Regulator_Switching.dcm b/Regulator_Switching.dcm
index 68588db6de..f610a63bcb 100644
--- a/Regulator_Switching.dcm
+++ b/Regulator_Switching.dcm
@@ -3282,18 +3282,36 @@ K dc-dc murata Step-Down DC/DC-Regulator
 F https://power.murata.com/data/power/oki-78sr.pdf
 $ENDCMP
 #
+$CMP OKI-78SR-12_1.0-W36H-C
+D 1.0A Step-Down DC/DC-Regulator, 15-36V input, 12V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_horizontal
+K dc-dc murata Step-Down DC/DC-Regulator
+F https://power.murata.com/data/power/oki-78sr.pdf
+$ENDCMP
+#
 $CMP OKI-78SR-3.3_1.5-W36-C
 D 1.5A Step-Down DC/DC-Regulator, 7-36V input, 3.3V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_vertical
 K dc-dc murata Step-Down DC/DC-Regulator
 F https://power.murata.com/data/power/oki-78sr.pdf
 $ENDCMP
 #
+$CMP OKI-78SR-3.3_1.5-W36H-C
+D 1.5A Step-Down DC/DC-Regulator, 7-36V input, 3.3V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_horizontal
+K dc-dc murata Step-Down DC/DC-Regulator
+F https://power.murata.com/data/power/oki-78sr.pdf
+$ENDCMP
+#
 $CMP OKI-78SR-5_1.5-W36-C
 D 1.5A Step-Down DC/DC-Regulator, 7-36V input, 5V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_vertical
 K dc-dc murata Step-Down DC/DC-Regulator
 F https://power.murata.com/data/power/oki-78sr.pdf
 $ENDCMP
 #
+$CMP OKI-78SR-5_1.5-W36H-C
+D 1.5A Step-Down DC/DC-Regulator, 7-36V input, 5V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_horizontal
+K dc-dc murata Step-Down DC/DC-Regulator
+F https://power.murata.com/data/power/oki-78sr.pdf
+$ENDCMP
+#
 $CMP PAM2305AAB120
 D 1A, Step-Down DC/DC-Converter, 1.2V Fixed Output Voltage, 1.5MHz, TSOT-23
 K Voltage regulator switching buck fixed output analog
diff --git a/Regulator_Switching.lib b/Regulator_Switching.lib
index 9a8fce7c73..a2aecd8995 100644
--- a/Regulator_Switching.lib
+++ b/Regulator_Switching.lib
@@ -4060,6 +4060,25 @@ X OUT 3 300 0 100 L 50 50 1 1 w
 ENDDRAW
 ENDDEF
 #
+# OKI-78SR-3.3_1.5-W36H-C
+#
+DEF OKI-78SR-3.3_1.5-W36H-C U 0 10 Y Y 1 F N
+F0 "U" -150 125 50 H V C CNN
+F1 "OKI-78SR-3.3_1.5-W36H-C" 0 125 50 H V L CNN
+F2 "Converter_DCDC:Converter_DCDC_muRata_OKI-78SR_horizontal" 50 -250 50 H I L CIN
+F3 "" 0 0 50 H I C CNN
+ALIAS OKI-78SR-12_1.0-W36H-C OKI-78SR-5_1.5-W36H-C
+$FPLIST
+ *OKI?78SR*horizontal*
+$ENDFPLIST
+DRAW
+S -200 75 200 -200 0 1 10 f
+X IN 1 -300 0 100 R 50 50 1 1 W
+X GND 2 0 -300 100 U 50 50 1 1 W
+X OUT 3 300 0 100 L 50 50 1 1 w
+ENDDRAW
+ENDDEF
+#
 # PAM2305AAB330
 #
 DEF PAM2305AAB330 U 0 20 Y Y 1 F N

From 186c02f3d00321b26e836c7cbc6be01f20aa67b7 Mon Sep 17 00:00:00 2001
From: Serkan <seselcuk@asplabauto.com>
Date: Fri, 21 Sep 2018 00:20:43 +0200
Subject: [PATCH 006/201] Pin name offset set to 20.

---
 Regulator_Switching.lib | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Regulator_Switching.lib b/Regulator_Switching.lib
index a2aecd8995..6ced289b8f 100644
--- a/Regulator_Switching.lib
+++ b/Regulator_Switching.lib
@@ -4043,7 +4043,7 @@ ENDDEF
 #
 # OKI-78SR-3.3_1.5-W36-C
 #
-DEF OKI-78SR-3.3_1.5-W36-C U 0 10 Y Y 1 F N
+DEF OKI-78SR-3.3_1.5-W36-C U 0 20 Y Y 1 F N
 F0 "U" -150 125 50 H V C CNN
 F1 "OKI-78SR-3.3_1.5-W36-C" 0 125 50 H V L CNN
 F2 "Converter_DCDC:Converter_DCDC_muRata_OKI-78SR_vertical" 50 -250 50 H I L CIN
@@ -4062,7 +4062,7 @@ ENDDEF
 #
 # OKI-78SR-3.3_1.5-W36H-C
 #
-DEF OKI-78SR-3.3_1.5-W36H-C U 0 10 Y Y 1 F N
+DEF OKI-78SR-3.3_1.5-W36H-C U 0 20 Y Y 1 F N
 F0 "U" -150 125 50 H V C CNN
 F1 "OKI-78SR-3.3_1.5-W36H-C" 0 125 50 H V L CNN
 F2 "Converter_DCDC:Converter_DCDC_muRata_OKI-78SR_horizontal" 50 -250 50 H I L CIN

From f7a2a50dbf0f718484ac2fdc22ed8ec74ea45d3b Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Sat, 8 Dec 2018 19:52:44 +0200
Subject: [PATCH 007/201] Add THS3491 op-amp in SOIC-8-1EP

---
 Amplifier_Operational.dcm |  6 ++++++
 Amplifier_Operational.lib | 20 ++++++++++++++++++++
 2 files changed, 26 insertions(+)

diff --git a/Amplifier_Operational.dcm b/Amplifier_Operational.dcm
index 5149296dfc..0aa0957371 100644
--- a/Amplifier_Operational.dcm
+++ b/Amplifier_Operational.dcm
@@ -1128,6 +1128,12 @@ K single opamp
 F http://www.ti.com/lit/ds/symlink/ne5534.pdf
 $ENDCMP
 #
+$CMP THS3491IDDA
+D 900-MHz, 500-mA High-Power Output Current Feedback Amplifier
+K current feedback wideband
+F http://www.ti.com/lit/ds/symlink/ths3491.pdf
+$ENDCMP
+#
 $CMP THS4631D
 D Single High-voltage, High Slew Rate, Wideband, FET-input Operational Amplifier, SOIC-8
 K single opamp
diff --git a/Amplifier_Operational.lib b/Amplifier_Operational.lib
index 651db18384..416b0d710f 100644
--- a/Amplifier_Operational.lib
+++ b/Amplifier_Operational.lib
@@ -1703,6 +1703,26 @@ X ~DIS 5 0 -300 200 U 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #
+# THS3491IDDA
+#
+DEF THS3491IDDA U 0 5 Y Y 1 F N
+F0 "U" 150 150 50 H V C CNN
+F1 "THS3491IDDA" 400 -100 50 H V C CNN
+F2 "Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.35x2.35mm" 0 -600 50 H I C CNN
+F3 "" 150 150 50 H I C CNN
+DRAW
+P 4 1 1 10 -200 200 200 0 -200 -200 -200 200 f
+X REF 1 0 -300 200 U 50 30 1 1 I
+X - 2 -300 -100 100 R 50 50 1 1 I
+X + 3 -300 100 100 R 50 50 1 1 I
+X V- 4 -100 -300 150 U 50 50 1 1 W
+X ~ 6 300 0 100 L 50 50 1 1 O
+X V+ 7 -100 300 150 D 50 50 1 1 W
+X ~PD 8 0 300 200 D 50 30 1 1 I
+X EP 9 100 -300 250 U 50 30 1 1 W
+ENDDRAW
+ENDDEF
+#
 # THS4631DDA
 #
 DEF THS4631DDA U 0 5 Y Y 1 F N

From c6e1dc1ec05fb2e0cc7344b2727208f05de695d6 Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Sat, 8 Dec 2018 20:00:31 +0200
Subject: [PATCH 008/201] add fp filter

---
 Amplifier_Operational.lib | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Amplifier_Operational.lib b/Amplifier_Operational.lib
index 416b0d710f..9c9456c4ad 100644
--- a/Amplifier_Operational.lib
+++ b/Amplifier_Operational.lib
@@ -1710,6 +1710,9 @@ F0 "U" 150 150 50 H V C CNN
 F1 "THS3491IDDA" 400 -100 50 H V C CNN
 F2 "Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.35x2.35mm" 0 -600 50 H I C CNN
 F3 "" 150 150 50 H I C CNN
+$FPLIST
+ SOIC?8*EP*
+$ENDFPLIST
 DRAW
 P 4 1 1 10 -200 200 200 0 -200 -200 -200 200 f
 X REF 1 0 -300 200 U 50 30 1 1 I

From decd32ade8cf000851cabfeba4a0246a410b4818 Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Sun, 9 Dec 2018 19:10:43 +0200
Subject: [PATCH 009/201] change EP-pin to passive. add keywords: opamp single

---
 Amplifier_Operational.dcm | 4 ++--
 Amplifier_Operational.lib | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/Amplifier_Operational.dcm b/Amplifier_Operational.dcm
index 0aa0957371..7a745727e3 100644
--- a/Amplifier_Operational.dcm
+++ b/Amplifier_Operational.dcm
@@ -1129,8 +1129,8 @@ F http://www.ti.com/lit/ds/symlink/ne5534.pdf
 $ENDCMP
 #
 $CMP THS3491IDDA
-D 900-MHz, 500-mA High-Power Output Current Feedback Amplifier
-K current feedback wideband
+D 900-MHz, 500-mA High-Power Output Current Feedback Operational Amplifier
+K opamp single current feedback wideband
 F http://www.ti.com/lit/ds/symlink/ths3491.pdf
 $ENDCMP
 #
diff --git a/Amplifier_Operational.lib b/Amplifier_Operational.lib
index 9c9456c4ad..6a501f07ff 100644
--- a/Amplifier_Operational.lib
+++ b/Amplifier_Operational.lib
@@ -1722,7 +1722,7 @@ X V- 4 -100 -300 150 U 50 50 1 1 W
 X ~ 6 300 0 100 L 50 50 1 1 O
 X V+ 7 -100 300 150 D 50 50 1 1 W
 X ~PD 8 0 300 200 D 50 30 1 1 I
-X EP 9 100 -300 250 U 50 30 1 1 W
+X EP 9 100 -300 250 U 50 30 1 1 P
 ENDDRAW
 ENDDEF
 #

From b41a7a97844c96607fce0f15667e511ba014dc79 Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Sat, 15 Dec 2018 16:38:01 +0200
Subject: [PATCH 010/201] add pin5 - datasheet suggests connecting NC-pin to
 GND

---
 Amplifier_Operational.lib | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Amplifier_Operational.lib b/Amplifier_Operational.lib
index 6a501f07ff..ed56bf18f1 100644
--- a/Amplifier_Operational.lib
+++ b/Amplifier_Operational.lib
@@ -1719,10 +1719,11 @@ X REF 1 0 -300 200 U 50 30 1 1 I
 X - 2 -300 -100 100 R 50 50 1 1 I
 X + 3 -300 100 100 R 50 50 1 1 I
 X V- 4 -100 -300 150 U 50 50 1 1 W
+X NC 5 100 300 250 D 50 20 1 1 P
 X ~ 6 300 0 100 L 50 50 1 1 O
 X V+ 7 -100 300 150 D 50 50 1 1 W
 X ~PD 8 0 300 200 D 50 30 1 1 I
-X EP 9 100 -300 250 U 50 30 1 1 P
+X EP 9 100 -300 250 U 50 20 1 1 P
 ENDDRAW
 ENDDEF
 #

From ea66726a036139b40bfbc801d304243576abe6f6 Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Sun, 16 Dec 2018 19:00:08 +0200
Subject: [PATCH 011/201] pin5 type to NC

---
 Amplifier_Operational.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Amplifier_Operational.lib b/Amplifier_Operational.lib
index ed56bf18f1..910a8c7d79 100644
--- a/Amplifier_Operational.lib
+++ b/Amplifier_Operational.lib
@@ -1719,7 +1719,7 @@ X REF 1 0 -300 200 U 50 30 1 1 I
 X - 2 -300 -100 100 R 50 50 1 1 I
 X + 3 -300 100 100 R 50 50 1 1 I
 X V- 4 -100 -300 150 U 50 50 1 1 W
-X NC 5 100 300 250 D 50 20 1 1 P
+X NC 5 100 300 250 D 50 20 1 1 N
 X ~ 6 300 0 100 L 50 50 1 1 O
 X V+ 7 -100 300 150 D 50 50 1 1 W
 X ~PD 8 0 300 200 D 50 30 1 1 I

From 73f4cc65c2bb673ac79b206921d4018f9d11860b Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Sun, 23 Dec 2018 11:40:28 +0200
Subject: [PATCH 012/201] add HMC394 counter/prescaler in QFN-24

---
 RF.dcm |  6 ++++++
 RF.lib | 40 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 46 insertions(+)

diff --git a/RF.dcm b/RF.dcm
index c1ddc11847..9678e1fb99 100644
--- a/RF.dcm
+++ b/RF.dcm
@@ -18,6 +18,12 @@ K Low Power RF Transciever
 F http://www.ti.com/lit/ds/symlink/cc2500.pdf
 $ENDCMP
 #
+$CMP HMC394LP4
+D GaAs HBT Programmable 5-bit Counter, DC - 2.2 GHz , QFN-24-1EP
+K counter prescaler programmable frequency divider
+F https://www.analog.com/media/en/technical-documentation/data-sheets/hmc394.pdf
+$ENDCMP
+#
 $CMP MAADSS0008
 D 0-2GHz, 15dB step attenuator, SOT-23-5
 K RF attenuator
diff --git a/RF.lib b/RF.lib
index c0fdbed49e..f4422077ba 100644
--- a/RF.lib
+++ b/RF.lib
@@ -127,6 +127,46 @@ X AVDD 9 100 600 100 D 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #
+# HMC394LP4
+#
+DEF HMC394LP4 U 0 20 Y Y 1 F N
+F0 "U" -200 550 50 H V C CNN
+F1 "HMC394LP4" 250 550 50 H V C CNN
+F2 "Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm" 0 -750 50 H I C CNN
+F3 "" 0 200 50 H I C CNN
+$FPLIST
+ QFN*24*EP*4x4mm*P0.5mm*
+$ENDFPLIST
+DRAW
+S -250 500 250 -500 0 1 10 f
+X A0 1 400 0 150 L 50 50 1 1 I
+X GND 10 0 -600 100 U 50 50 1 1 P N
+X GND 11 0 -600 100 U 50 50 1 1 P N
+X GND 12 0 -600 100 U 50 50 1 1 P N
+X ~IN 13 -400 200 150 R 50 50 1 1 I
+X IN 14 -400 400 150 R 50 50 1 1 I
+X GND 15 0 -600 100 U 50 50 1 1 P N
+X OUT 16 400 400 150 L 50 50 1 1 O
+X ~OUT 17 400 200 150 L 50 50 1 1 O
+X GND 18 0 -600 100 U 50 50 1 1 P N
+X GND 19 0 -600 100 U 50 50 1 1 P N
+X A1 2 400 -100 150 L 50 50 1 1 I
+X GND 20 0 -600 100 U 50 50 1 1 P N
+X GND 21 0 -600 100 U 50 50 1 1 P N
+X GND 22 0 -600 100 U 50 50 1 1 P N
+X VCC 23 0 600 100 D 50 50 1 1 W N
+X VCC 24 0 600 100 D 50 50 1 1 W N
+X EP 25 0 -600 100 U 50 50 1 1 P N
+X A2 3 400 -200 150 L 50 50 1 1 I
+X A3 4 400 -300 150 L 50 50 1 1 I
+X A4 5 400 -400 150 L 50 50 1 1 I
+X GND 6 0 -600 100 U 50 50 1 1 W
+X VCC 7 0 600 100 D 50 50 1 1 W
+X VCC 8 0 600 100 D 50 50 1 1 W N
+X GND 9 0 -600 100 U 50 50 1 1 P N
+ENDDRAW
+ENDDEF
+#
 # MAADSS0008
 #
 DEF MAADSS0008 U 0 20 Y Y 1 F N

From 0c260f38abb0561c67d800508af553464e91e5b3 Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Sun, 23 Dec 2018 12:35:41 +0200
Subject: [PATCH 013/201] rename EP pin25 to GND

---
 RF.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/RF.lib b/RF.lib
index f4422077ba..3315e3fa90 100644
--- a/RF.lib
+++ b/RF.lib
@@ -156,7 +156,7 @@ X GND 21 0 -600 100 U 50 50 1 1 P N
 X GND 22 0 -600 100 U 50 50 1 1 P N
 X VCC 23 0 600 100 D 50 50 1 1 W N
 X VCC 24 0 600 100 D 50 50 1 1 W N
-X EP 25 0 -600 100 U 50 50 1 1 P N
+X GND 25 0 -600 100 U 50 50 1 1 P N
 X A2 3 400 -200 150 L 50 50 1 1 I
 X A3 4 400 -300 150 L 50 50 1 1 I
 X A4 5 400 -400 150 L 50 50 1 1 I

From fa783da331ed0e9e72725404af2771fd5e13dedd Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Sun, 23 Dec 2018 12:39:20 +0200
Subject: [PATCH 014/201] hidden stacked VCC pins to type passive.

---
 RF.lib | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/RF.lib b/RF.lib
index 3315e3fa90..6b338f3976 100644
--- a/RF.lib
+++ b/RF.lib
@@ -154,14 +154,14 @@ X A1 2 400 -100 150 L 50 50 1 1 I
 X GND 20 0 -600 100 U 50 50 1 1 P N
 X GND 21 0 -600 100 U 50 50 1 1 P N
 X GND 22 0 -600 100 U 50 50 1 1 P N
-X VCC 23 0 600 100 D 50 50 1 1 W N
-X VCC 24 0 600 100 D 50 50 1 1 W N
+X VCC 23 0 600 100 D 50 50 1 1 P N
+X VCC 24 0 600 100 D 50 50 1 1 P N
 X GND 25 0 -600 100 U 50 50 1 1 P N
 X A2 3 400 -200 150 L 50 50 1 1 I
 X A3 4 400 -300 150 L 50 50 1 1 I
 X A4 5 400 -400 150 L 50 50 1 1 I
 X GND 6 0 -600 100 U 50 50 1 1 W
-X VCC 7 0 600 100 D 50 50 1 1 W
+X VCC 7 0 600 100 D 50 50 1 1 P
 X VCC 8 0 600 100 D 50 50 1 1 W N
 X GND 9 0 -600 100 U 50 50 1 1 P N
 ENDDRAW

From 92508a9c05e39af5943ca91b08c61a7dfb30b33a Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Sun, 23 Dec 2018 12:42:00 +0200
Subject: [PATCH 015/201] stack: visible pin is Power Input, invisible pins
 Passive

---
 RF.lib | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/RF.lib b/RF.lib
index 6b338f3976..f721ef7cc5 100644
--- a/RF.lib
+++ b/RF.lib
@@ -161,8 +161,8 @@ X A2 3 400 -200 150 L 50 50 1 1 I
 X A3 4 400 -300 150 L 50 50 1 1 I
 X A4 5 400 -400 150 L 50 50 1 1 I
 X GND 6 0 -600 100 U 50 50 1 1 W
-X VCC 7 0 600 100 D 50 50 1 1 P
-X VCC 8 0 600 100 D 50 50 1 1 W N
+X VCC 7 0 600 100 D 50 50 1 1 W
+X VCC 8 0 600 100 D 50 50 1 1 P N
 X GND 9 0 -600 100 U 50 50 1 1 P N
 ENDDRAW
 ENDDEF

From f3dd029ee513657358cf95abb17b629525ea7bb6 Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Tue, 25 Dec 2018 18:08:09 +0200
Subject: [PATCH 016/201] add SFP/SFP+ connector

---
 Interface_Optical.dcm |  6 ++++++
 Interface_Optical.lib | 40 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 46 insertions(+)

diff --git a/Interface_Optical.dcm b/Interface_Optical.dcm
index 6316c0f1cd..731f84ff7a 100644
--- a/Interface_Optical.dcm
+++ b/Interface_Optical.dcm
@@ -24,6 +24,12 @@ K opto IR
 F http://www.onsemi.com/pub/Collateral/QSE159-D.pdf
 $ENDCMP
 #
+$CMP SFP_SFP+_CONNECTOR
+D Small Form Factor Pluggable (SFP+) module, serial-to-serial data-agnostic optical transceiver
+K SFP transciever SFP+
+F https://members.snia.org/document/dl/25891
+$ENDCMP
+#
 $CMP TSDP341xx
 D IR Receiver Modules for Data Transmission
 K opto IR receiver
diff --git a/Interface_Optical.lib b/Interface_Optical.lib
index 1913f69906..4d535e1ef3 100644
--- a/Interface_Optical.lib
+++ b/Interface_Optical.lib
@@ -185,6 +185,46 @@ X Vcc 3 100 300 100 D 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #
+# SFP_SFP+_CONNECTOR
+#
+DEF SFP_SFP+_CONNECTOR P 0 20 Y Y 1 F N
+F0 "P" -450 650 50 H V C CNN
+F1 "SFP_SFP+_CONNECTOR" 450 650 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ Pin_Header_Straight_1X20
+ Pin_Header_Angled_1X20
+ Socket_Strip_Straight_1X20
+ Socket_Strip_Angled_1X20
+$ENDFPLIST
+DRAW
+T 0 -50 0 50 0 0 0 SFP/SFP+ Normal 0 C C
+S -500 600 400 -600 0 1 10 f
+X VeeT 1 -100 -700 100 U 50 50 1 1 W
+X VeeR 10 0 -700 100 U 50 50 1 1 W
+X VeeR 11 0 -700 100 U 50 50 1 1 P N
+X RD- 12 500 100 100 L 50 50 1 1 O
+X RD+ 13 500 200 100 L 50 50 1 1 O
+X VeeR 14 0 -700 100 U 50 50 1 1 P N
+X VccR 15 0 700 100 D 50 50 1 1 W
+X VccT 16 -100 700 100 D 50 50 1 1 W
+X VeeT 17 -100 -700 100 U 50 50 1 1 P N
+X TD+ 18 500 -100 100 L 50 50 1 1 I
+X TD- 19 500 -200 100 L 50 50 1 1 I
+X TX_FAULT 2 500 -400 100 L 50 50 1 1 C
+X VeeT 20 -100 -700 100 U 50 50 1 1 P N
+X TX_DISABLE 3 -600 -300 100 R 50 50 1 1 I
+X MOD_DEF(2)/SDA 4 -600 300 100 R 50 30 1 1 B
+X MOD_DEF(1)/SCL 5 -600 200 100 R 50 30 1 1 B
+X MOD_DEF(0)/MOD_ABS 6 -600 100 100 R 50 30 1 1 P
+X RS/RS0 7 -600 -100 100 R 50 50 1 1 I
+X RX_LOS 8 500 400 100 L 50 50 1 1 C
+X VeeR/RS1 9 -600 -200 100 R 50 50 1 1 I
+X CAGE CAGE -200 -700 100 U 20 50 1 1 W
+ENDDRAW
+ENDDEF
+#
 # TSDP341xx
 #
 DEF TSDP341xx U 0 40 Y Y 1 F N

From a0e2edb6c9ad7dbd317795392ebcd1eae2708b84 Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Tue, 25 Dec 2018 18:25:05 +0200
Subject: [PATCH 017/201] fields/visibility. symmetric in x-dir.

---
 Interface_Optical.lib | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/Interface_Optical.lib b/Interface_Optical.lib
index 4d535e1ef3..263418b107 100644
--- a/Interface_Optical.lib
+++ b/Interface_Optical.lib
@@ -188,10 +188,10 @@ ENDDEF
 # SFP_SFP+_CONNECTOR
 #
 DEF SFP_SFP+_CONNECTOR P 0 20 Y Y 1 F N
-F0 "P" -450 650 50 H V C CNN
+F0 "P" -350 650 50 H V C CNN
 F1 "SFP_SFP+_CONNECTOR" 450 650 50 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
+F2 "Connector:Connector_SFP_and_Cage.kicad_mod" 0 -850 50 H I C CNN
+F3 "" -450 650 50 H I C CNN
 $FPLIST
  Pin_Header_Straight_1X20
  Pin_Header_Angled_1X20
@@ -200,7 +200,7 @@ $FPLIST
 $ENDFPLIST
 DRAW
 T 0 -50 0 50 0 0 0 SFP/SFP+ Normal 0 C C
-S -500 600 400 -600 0 1 10 f
+S -400 600 400 -600 0 0 10 f
 X VeeT 1 -100 -700 100 U 50 50 1 1 W
 X VeeR 10 0 -700 100 U 50 50 1 1 W
 X VeeR 11 0 -700 100 U 50 50 1 1 P N
@@ -214,13 +214,13 @@ X TD+ 18 500 -100 100 L 50 50 1 1 I
 X TD- 19 500 -200 100 L 50 50 1 1 I
 X TX_FAULT 2 500 -400 100 L 50 50 1 1 C
 X VeeT 20 -100 -700 100 U 50 50 1 1 P N
-X TX_DISABLE 3 -600 -300 100 R 50 50 1 1 I
-X MOD_DEF(2)/SDA 4 -600 300 100 R 50 30 1 1 B
-X MOD_DEF(1)/SCL 5 -600 200 100 R 50 30 1 1 B
-X MOD_DEF(0)/MOD_ABS 6 -600 100 100 R 50 30 1 1 P
-X RS/RS0 7 -600 -100 100 R 50 50 1 1 I
+X TX_DISABLE 3 -500 -300 100 R 50 50 1 1 I
+X MOD_DEF(2)/SDA 4 -500 300 100 R 50 30 1 1 B
+X MOD_DEF(1)/SCL 5 -500 200 100 R 50 30 1 1 B
+X MOD_DEF(0)/MOD_ABS 6 -500 100 100 R 50 30 1 1 P
+X RS/RS0 7 -500 -100 100 R 50 50 1 1 I
 X RX_LOS 8 500 400 100 L 50 50 1 1 C
-X VeeR/RS1 9 -600 -200 100 R 50 50 1 1 I
+X VeeR/RS1 9 -500 -200 100 R 50 50 1 1 I
 X CAGE CAGE -200 -700 100 U 20 50 1 1 W
 ENDDRAW
 ENDDEF

From 41d3bf3cbf2c6a219ca94ed01f8a8930c8c8ea5e Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Tue, 25 Dec 2018 18:39:28 +0200
Subject: [PATCH 018/201] fp-filter

---
 Interface_Optical.lib | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/Interface_Optical.lib b/Interface_Optical.lib
index 263418b107..2e628c1541 100644
--- a/Interface_Optical.lib
+++ b/Interface_Optical.lib
@@ -193,10 +193,7 @@ F1 "SFP_SFP+_CONNECTOR" 450 650 50 H V C CNN
 F2 "Connector:Connector_SFP_and_Cage.kicad_mod" 0 -850 50 H I C CNN
 F3 "" -450 650 50 H I C CNN
 $FPLIST
- Pin_Header_Straight_1X20
- Pin_Header_Angled_1X20
- Socket_Strip_Straight_1X20
- Socket_Strip_Angled_1X20
+ SFP*
 $ENDFPLIST
 DRAW
 T 0 -50 0 50 0 0 0 SFP/SFP+ Normal 0 C C

From a6059b050a5fc5d0cfe372153a9fbcf5eb3a3ee6 Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Wed, 2 Jan 2019 22:03:04 +0200
Subject: [PATCH 019/201] descirption: remove space, fp-filter: fix.

---
 RF.dcm | 2 +-
 RF.lib | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/RF.dcm b/RF.dcm
index 9678e1fb99..a5ce9705e7 100644
--- a/RF.dcm
+++ b/RF.dcm
@@ -19,7 +19,7 @@ F http://www.ti.com/lit/ds/symlink/cc2500.pdf
 $ENDCMP
 #
 $CMP HMC394LP4
-D GaAs HBT Programmable 5-bit Counter, DC - 2.2 GHz , QFN-24-1EP
+D GaAs HBT Programmable 5-bit Counter, DC - 2.2 GHz, QFN-24-1EP
 K counter prescaler programmable frequency divider
 F https://www.analog.com/media/en/technical-documentation/data-sheets/hmc394.pdf
 $ENDCMP
diff --git a/RF.lib b/RF.lib
index f721ef7cc5..2a74c4afbe 100644
--- a/RF.lib
+++ b/RF.lib
@@ -135,7 +135,7 @@ F1 "HMC394LP4" 250 550 50 H V C CNN
 F2 "Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm" 0 -750 50 H I C CNN
 F3 "" 0 200 50 H I C CNN
 $FPLIST
- QFN*24*EP*4x4mm*P0.5mm*
+ QFN*1EP*4x4mm*P0.5mm*
 $ENDFPLIST
 DRAW
 S -250 500 250 -500 0 1 10 f

From 12407dd3cc71569d1af08e3e08c6864689e71d92 Mon Sep 17 00:00:00 2001
From: Anton Lysak <antonlysak@gmail.com>
Date: Sun, 6 Jan 2019 00:13:56 +0700
Subject: [PATCH 020/201] Reworked

---
 MCU_SiFive.dcm |   4 +-
 MCU_SiFive.lib | 986 ++++++++++++++++++++++++-------------------------
 2 files changed, 495 insertions(+), 495 deletions(-)

diff --git a/MCU_SiFive.dcm b/MCU_SiFive.dcm
index e5ec1e3b34..f4dfc1faa7 100644
--- a/MCU_SiFive.dcm
+++ b/MCU_SiFive.dcm
@@ -7,8 +7,8 @@ F https://static.dev.sifive.com/SiFive-FE310-G000-datasheet-v1p5.pdf
 $ENDCMP
 #
 $CMP FU540-C000
-D  64-bit RISC‑V SoC
-K  64-bit RISC‑V SoC SiFive
+D 64-bit RISC‑V SoC, BGA-484
+K SiFive
 F https://static.dev.sifive.com/FU540-C000-v1.0.pdf
 $ENDCMP
 #
diff --git a/MCU_SiFive.lib b/MCU_SiFive.lib
index ab87dbe74f..a8b25b1ac9 100644
--- a/MCU_SiFive.lib
+++ b/MCU_SiFive.lib
@@ -68,504 +68,504 @@ ENDDEF
 # FU540-C000
 #
 DEF FU540-C000 U 0 40 Y Y 6 L N
-F0 "U" 0 0 50 H V L BNN
-F1 "FU540-C000" 0 -100 50 H V C CNN
-F2 "" -100 -100 50 H I C CNN
+F0 "U" 0 50 50 H V C CNN
+F1 "FU540-C000" 0 -50 50 H V C CNN
+F2 "Package_BGA:BGA-484_23.0x23.0mm_Layout22x22_P1.0mm" 150 -50 50 H I C CNN
 F3 "" 0 5000 50 H I C CNN
 $FPLIST
  BGA?484*23.0x23.0mm*P1.0mm*
 $ENDFPLIST
 DRAW
-S -1500 -1800 1500 1800 1 1 10 f
-S -1300 -4850 1300 4850 2 1 10 f
-S -1300 -1300 1300 1300 3 1 10 f
-S -900 -1800 900 1800 4 1 10 f
-S -1300 -1700 1300 1700 5 1 10 f
-S -600 -3500 600 3500 6 1 10 f
-X IO_CHIPLINK_0_B2C_DATA_2 AA18 -1800 1400 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_8 AA19 -1800 800 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_23 AA20 -1800 -700 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_29 AA21 -1800 -1300 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_CLK AA22 -1800 1700 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_1 AB18 -1800 1500 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_13 AB19 -1800 300 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_22 AB20 -1800 -600 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_26 AB21 -1800 -1000 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_C2B_DATA_28 K19 1800 -1200 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_24 K20 1800 -800 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_26 K22 1800 -1000 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_31 L17 1800 -1500 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_30 L18 1800 -1400 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_27 L19 1800 -1100 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_20 L20 1800 -400 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_18 L21 1800 -200 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_29 L22 1800 -1300 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_15 M17 1800 100 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_19 M18 1800 -300 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_23 M19 1800 -700 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_12 M20 1800 400 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_25 M21 1800 -900 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_22 M22 1800 -600 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_SEND N17 1800 -1700 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_2 N18 1800 1400 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_6 N19 1800 1000 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_21 N20 1800 -500 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_16 N21 1800 0 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_14 N22 1800 200 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_B2C_RST P17 -1800 -1600 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_21 P18 -1800 -500 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_C2B_CLK P19 1800 1700 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_4 P20 1800 1200 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_B2C_DATA_24 R17 -1800 -800 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_17 R18 -1800 -100 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_C2B_DATA_1 R19 1800 1500 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_3 R20 1800 1300 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_8 R21 1800 800 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_17 R22 1800 -100 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_B2C_DATA_19 T18 -1800 -300 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_C2B_DATA_0 T19 1800 1600 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_RST T20 1800 -1600 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_13 T21 1800 300 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_10 T22 1800 600 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_B2C_DATA_20 U17 -1800 -400 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_14 U18 -1800 200 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_18 U19 -1800 -200 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_C2B_DATA_5 U20 1800 1100 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_11 U21 1800 500 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_C2B_DATA_7 U22 1800 900 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_B2C_DATA_12 V16 -1800 400 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_16 V17 -1800 0 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_9 V18 -1800 700 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_15 V19 -1800 100 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_25 V20 -1800 -900 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_4 W16 -1800 1200 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_3 W17 -1800 1300 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_5 W18 -1800 1100 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_11 W19 -1800 500 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_28 W20 -1800 -1200 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_SEND W21 -1800 -1700 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_C2B_DATA_9 W22 1800 700 300 L 50 50 1 1 O
-X IO_CHIPLINK_0_B2C_DATA_0 Y16 -1800 1600 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_7 Y17 -1800 900 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_6 Y18 -1800 1000 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_10 Y19 -1800 600 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_27 Y20 -1800 -1100 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_31 Y21 -1800 -1500 300 R 50 50 1 1 I
-X IO_CHIPLINK_0_B2C_DATA_30 Y22 -1800 -1400 300 R 50 50 1 1 I
-X IO_DDR_MEM_DATA[18] A4 1600 1800 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[19] A5 1600 1900 300 L 50 50 2 1 B
-X IO_DDR_MEM_DQS_P[2] A6 1600 1500 300 L 50 50 2 1 B
-X IO_DDR_MEM_DQS_M[2] A7 1600 1400 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[41] AA1 1600 -1900 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[61] AA10 1600 -3900 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[63] AA11 1600 -3700 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[58] AA12 1600 -4200 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[56] AA13 1600 -4400 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[45] AA3 1600 -1500 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[47] AA4 1600 -1300 300 L 50 50 2 1 B
-X IO_DDR_MEM_ODT[0] AA5 -1600 -100 300 R 50 50 2 1 O
-X IO_DDR_MEM_CKE[1] AA6 -1600 -400 300 R 50 50 2 1 O
-X IO_DDR_MEM_DQS_M[6] AA7 1600 -3400 300 L 50 50 2 1 B
-X IO_DDR_MEM_DQS_P[7] AA8 1600 -4500 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[62] AA9 1600 -3800 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[60] AB11 1600 -4000 300 L 50 50 2 1 B
-X IO_DDR_MEM_DM[7] AB12 1600 -4700 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[44] AB2 1600 -1600 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[46] AB3 1600 -1400 300 L 50 50 2 1 B
-X IO_DDR_MEM_ODT[1] AB5 -1600 -200 300 R 50 50 2 1 O
-X IO_DDR_MEM_CKE[0] AB6 -1600 -300 300 R 50 50 2 1 O
-X IO_DDR_MEM_DATA[57] AB8 1600 -4300 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[59] AB9 1600 -4100 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[1] B1 1600 4100 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[17] B2 1600 1700 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[22] B3 1600 2200 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[16] B4 1600 1600 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[20] B5 1600 2000 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[23] B6 1600 2300 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[4] C1 1600 4400 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[29] C2 1600 900 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[27] C3 1600 700 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[24] C4 1600 400 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[21] C5 1600 2100 300 L 50 50 2 1 B
-X IO_DDR_MEM_DM[2] C6 1600 1300 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[31] C7 1600 1100 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[0] D2 1600 4000 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[30] D3 1600 1000 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[25] D4 1600 500 300 L 50 50 2 1 B
-X IO_DDR_MEM_DM[3] D5 1600 100 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[26] D6 1600 600 300 L 50 50 2 1 B
-X IO_DDR_MEM_DQS_M[3] D7 1600 200 300 L 50 50 2 1 B
-X IO_DDR_RSVD1 D8 -1600 -2700 300 R 50 50 2 1 P
-X IO_DDR_MEM_DATA[6] E1 1600 4600 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[3] E2 1600 4300 300 L 50 50 2 1 B
-X IO_DDR_MEM_DM[0] E5 1600 3700 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[28] E6 1600 800 300 L 50 50 2 1 B
-X IO_DDR_MEM_DQS_P[3] E7 1600 300 300 L 50 50 2 1 B
-X IO_DDR_RSVD0 E8 -1600 -2600 300 R 50 50 2 1 P
-X IO_DDR_MEM_DATA[9] F1 1600 2900 300 L 50 50 2 1 B
-X IO_DDR_MEM_DQS_P[0] F2 1600 3900 300 L 50 50 2 1 B
-X IO_DDR_MEM_DQS_M[0] F3 1600 3800 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[2] F4 1600 4200 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[10] F5 1600 3000 300 L 50 50 2 1 B
-X IO_DDR_CAL_0 F6 -1600 -4700 300 R 50 50 2 1 P
-X IO_DDR_RSVD2 F8 -1600 -2800 300 R 50 50 2 1 P
-X IO_DDR_RSVD3 F9 -1600 -2900 300 R 50 50 2 1 P
-X IO_DDR_MEM_DATA[11] G1 1600 3100 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[7] G3 1600 4700 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[5] G4 1600 4500 300 L 50 50 2 1 B
-X IO_DDR_MEM_DM[1] G5 1600 2500 300 L 50 50 2 1 B
-X DDR_VDDQ G7 -1600 4700 300 R 50 50 2 1 W
-X IO_DDR_MEM_DATA[12] H1 1600 3200 300 L 50 50 2 1 B
-X IO_DDR_MEM_DQS_P[1] H2 1600 2700 300 L 50 50 2 1 B
-X IO_DDR_MEM_DQS_M[1] H3 1600 2600 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[8] H4 1600 2800 300 L 50 50 2 1 B
-X IO_DDR_MEM_ECC_DATA[0] H5 -1600 -2000 300 R 50 50 2 1 B
-X DDR_VDDQ H6 -1600 4600 300 R 50 50 2 1 W
-X DDRPLL_AVSS J13 -1600 3200 300 R 50 50 2 1 P
-X IO_DDR_MEM_DATA[14] J2 1600 3400 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[13] J3 1600 3300 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[15] J4 1600 3500 300 L 50 50 2 1 B
-X IO_DDR_MEM_ECC_DM J5 -1600 -2300 300 R 50 50 2 1 B
-X DDR_VDDQ J7 -1600 4500 300 R 50 50 2 1 W
-X IO_DDR_MEM_ECC_DATA[1] K1 -1600 -1900 300 R 50 50 2 1 B
-X DDRPLL_AVDD K13 -1600 3300 300 R 50 50 2 1 W
-X IO_DDR_MEM_ECC_DQS_P K2 -1600 -2100 300 R 50 50 2 1 B
-X IO_DDR_MEM_ECC_DQS_M K3 -1600 -2200 300 R 50 50 2 1 B
-X IO_DDR_MEM_ECC_DATA[2] K4 -1600 -1800 300 R 50 50 2 1 B
-X IO_DDR_MEM_CLK K5 -1600 -1000 300 R 50 50 2 1 O
-X DDR_VDDQ K6 -1600 4400 300 R 50 50 2 1 W
-X IO_DDR_MEM_ECC_DATA[4] L1 -1600 -1600 300 R 50 50 2 1 B
-X IO_DDR_MEM_ECC_DATA[3] L2 -1600 -1700 300 R 50 50 2 1 B
-X IO_DDR_MEM_ECC_DATA[7] L3 -1600 -1300 300 R 50 50 2 1 B
-X IO_DDR_MEM_ECC_DATA[5] L4 -1600 -1500 300 R 50 50 2 1 B
-X IO_DDR_MEM_CLK_N L5 -1600 -1100 300 R 50 50 2 1 O
-X DDR_VDDQ L7 -1600 4300 300 R 50 50 2 1 W
-X DDR_VDDPLL L9 -1600 3500 300 R 50 50 2 1 W
-X IO_DDR_MEM_ECC_DATA[6] M1 -1600 -1400 300 R 50 50 2 1 B
-X IO_DDR_MEM_RAS_N M2 -1600 300 300 R 50 50 2 1 O
-X IO_DDR_MEM_CAS_N M3 -1600 400 300 R 50 50 2 1 O
-X IO_DDR_MEM_BANK[0] M4 -1600 500 300 R 50 50 2 1 O
-X IO_DDR_MEM_BANK[2] M5 -1600 700 300 R 50 50 2 1 O
-X DDR_VDDQ M6 -1600 4200 300 R 50 50 2 1 W
-X DDR_VDDPLL M9 -1600 3400 300 R 50 50 2 1 W
-X IO_DDR_MEM_WE_N N1 -1600 200 300 R 50 50 2 1 O
-X IO_DDR_MEM_BANK[1] N2 -1600 600 300 R 50 50 2 1 O
-X IO_DDR_MEM_ADDRESS[0] N3 -1600 800 300 R 50 50 2 1 O
-X IO_DDR_MEM_ADDRESS[2] N4 -1600 1000 300 R 50 50 2 1 O
-X IO_DDR_MEM_ADDRESS[5] N5 -1600 1300 300 R 50 50 2 1 O
-X DDR_VDDQ N7 -1600 4100 300 R 50 50 2 1 W
-X IO_DDR_MEM_ADDRESS[3] P3 -1600 1100 300 R 50 50 2 1 O
-X IO_DDR_MEM_ADDRESS[6] P4 -1600 1400 300 R 50 50 2 1 O
-X IO_DDR_MEM_ADDRESS[12] P5 -1600 2000 300 R 50 50 2 1 O
-X DDR_VDDQ P6 -1600 4000 300 R 50 50 2 1 W
-X IO_DDR_MEM_ADDRESS[1] R1 -1600 900 300 R 50 50 2 1 O
-X IO_DDR_MEM_ADDRESS[7] R2 -1600 1500 300 R 50 50 2 1 O
-X IO_DDR_MEM_ADDRESS[8] R3 -1600 1600 300 R 50 50 2 1 O
-X IO_DDR_MEM_ADDRESS[11] R4 -1600 1900 300 R 50 50 2 1 O
-X IO_DDR_MEM_DATA[32] R5 1600 -800 300 L 50 50 2 1 B
-X DDR_VDDQ R7 -1600 3900 300 R 50 50 2 1 W
-X IO_DDR_MEM_ADDRESS[4] T1 -1600 1200 300 R 50 50 2 1 O
-X IO_DDR_MEM_ADDRESS[13] T2 -1600 2100 300 R 50 50 2 1 O
-X IO_DDR_MEM_ADDRESS[9] T3 -1600 1700 300 R 50 50 2 1 O
-X IO_DDR_MEM_DATA[34] T4 1600 -600 300 L 50 50 2 1 B
-X IO_DDR_MEM_DM[4] T5 1600 -1100 300 L 50 50 2 1 B
-X DDR_VDDQ T6 -1600 3800 300 R 50 50 2 1 W
-X IO_DDR_MEM_ADDRESS[10] U1 -1600 1800 300 R 50 50 2 1 O
-X IO_DDR_MEM_PARITY_IN U2 -1600 100 300 R 50 50 2 1 O
-X IO_DDR_MEM_ADDRESS[14] U3 -1600 2200 300 R 50 50 2 1 O
-X IO_DDR_MEM_DQS_M[4] U4 1600 -1000 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[39] U5 1600 -100 300 L 50 50 2 1 B
-X DDR_VDDQCK U7 -1600 3700 300 R 50 50 2 1 W
-X IO_DDR_MEM_DATA[35] V2 1600 -500 300 L 50 50 2 1 B
-X IO_DDR_MEM_ADDRESS[15] V3 -1600 2300 300 R 50 50 2 1 O
-X IO_DDR_MEM_DQS_P[4] V4 1600 -900 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[40] V5 1600 -2000 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[33] W1 1600 -700 300 L 50 50 2 1 B
-X IO_DDR_MEM_DM[6] W10 1600 -3500 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[49] W11 1600 -3100 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[54] W12 1600 -2600 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[38] W2 1600 -200 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[37] W3 1600 -300 300 L 50 50 2 1 B
-X IO_DDR_MEM_DQS_M[5] W4 1600 -2200 300 L 50 50 2 1 B
-X IO_DDR_MEM_DM[5] W5 1600 -2300 300 L 50 50 2 1 B
-X IO_DDR_MEM_ERROR_N W6 -1600 0 300 R 50 50 2 1 I
-X IO_DDR_MEM_CS_N[1] W7 -1600 -600 300 R 50 50 2 1 O
-X IO_DDR_MEM_DATA[51] W8 1600 -2900 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[55] W9 1600 -2500 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[36] Y1 1600 -400 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[52] Y10 1600 -2800 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[50] Y11 1600 -3000 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[48] Y12 1600 -3200 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[43] Y2 1600 -1700 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[42] Y3 1600 -1800 300 L 50 50 2 1 B
-X IO_DDR_MEM_DQS_P[5] Y4 1600 -2100 300 L 50 50 2 1 B
-X IO_DDR_MEM_RESET_N Y5 -1600 -700 300 R 50 50 2 1 O
-X IO_DDR_MEM_CS_N[0] Y6 -1600 -500 300 R 50 50 2 1 O
-X IO_DDR_MEM_DQS_P[6] Y7 1600 -3300 300 L 50 50 2 1 B
-X IO_DDR_MEM_DQS_M[7] Y8 1600 -4600 300 L 50 50 2 1 B
-X IO_DDR_MEM_DATA[53] Y9 1600 -2700 300 L 50 50 2 1 B
-X IO_GEMGXL_0_RXD_2 A10 -1600 0 300 R 50 50 3 1 I
-X IO_GEMGXL_0_RX_DV A11 -1600 -600 300 R 50 50 3 1 I
-X IO_GEMGXL_0_RXD_0 A12 -1600 200 300 R 50 50 3 1 I
-X IO_GEMGXL_0_COL A13 -1600 -900 300 R 50 50 3 1 I
-X IO_GEMGXL_0_RXD_5 A8 -1600 -300 300 R 50 50 3 1 I
-X IO_GEMGXL_0_RXD_1 B10 -1600 100 300 R 50 50 3 1 I
-X IO_GEMGXL_0_RX_ER B11 -1600 -700 300 R 50 50 3 1 I
-X IO_GEMGXL_0_TXD_0 B12 1600 200 300 L 50 50 3 1 O
-X IO_GEMGXL_0_MDC B13 -1600 -1100 300 R 50 50 3 1 O
-X IO_GEMGXL_0_TX_EN B7 1600 -600 300 L 50 50 3 1 O
-X IO_GEMGXL_0_TXD_6 B8 1600 -400 300 L 50 50 3 1 O
-X IO_GEMGXL_0_TXD_4 C10 1600 -200 300 L 50 50 3 1 O
-X IO_GEMGXL_0_TXD_1 C11 1600 100 300 L 50 50 3 1 O
-X IO_GEMGXL_0_MDIO C12 -1600 -1200 300 R 50 50 3 1 B
-X IO_GEMGXL_0_CRS C13 -1600 -800 300 R 50 50 3 1 I
-X IO_GEMGXL_0_TX_CLK C8 1600 300 300 L 50 50 3 1 I
-X IO_GEMGXL_0_RXD_6 C9 -1600 -400 300 R 50 50 3 1 I
-X IO_GEMGXL_0_TXD_5 D10 1600 -300 300 L 50 50 3 1 O
-X IO_GEMGXL_0_TXD_2 D11 1600 0 300 L 50 50 3 1 O
-X IO_GEMGXL_0_TXD_7 D9 1600 -500 300 L 50 50 3 1 O
-X IO_GEMGXL_0_RXD_4 E10 -1600 -200 300 R 50 50 3 1 I
-X IO_GEMGXL_0_RXD_3 E11 -1600 -100 300 R 50 50 3 1 I
-X IO_GEMGXL_0_GTX_CLK E12 -1600 400 300 R 50 50 3 1 I
-X IO_GEMGXL_0_RXD_7 E9 -1600 -500 300 R 50 50 3 1 I
-X IO_GEMGXL_0_TX_ER F10 1600 -700 300 L 50 50 3 1 O
-X IO_GEMGXL_0_TXD_3 F11 1600 -100 300 L 50 50 3 1 O
-X IO_GEMGXL_0_RX_CLK F12 -1600 300 300 R 50 50 3 1 I
-X GIVSS H11 -1600 800 300 R 50 50 3 1 P
-X GIVDD J11 -1600 1200 300 R 50 50 3 1 W
-X GEMGXLPLL_AVSS J12 1600 800 300 L 50 50 3 1 W
-X GEMGXLPLL_AVDD K12 1600 1200 300 L 50 50 3 1 W
-X IO_GPIO_0_PINS_9 A21 -1200 200 300 R 50 50 4 1 B
-X IO_UART_1_RXD AA14 1200 1300 300 L 50 50 4 1 I
-X IO_UART_1_TXD AA15 1200 1400 300 L 50 50 4 1 O
-X IO_QSPI_2_DQ_0 AA16 1200 1000 300 L 50 50 4 1 B
-X IO_QSPI_2_CS_0 AB14 1200 600 300 L 50 50 4 1 O
-X IO_QSPI_2_DQ_1 AB15 1200 900 300 L 50 50 4 1 B
-X IO_QSPI_2_DQ_2 AB16 1200 800 300 L 50 50 4 1 B
-X IO_GPIO_0_PINS_11 B20 -1200 0 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_12 B21 -1200 -100 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_14 B22 -1200 -300 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_7 C20 -1200 400 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_2 C21 -1200 900 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_1 C22 -1200 1000 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_8 D19 -1200 300 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_5 D20 -1200 600 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_3 D21 -1200 800 300 R 50 50 4 1 B
-X IO_PWM_1_PWM_0 D22 -1200 -1300 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_4 E18 -1200 700 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_13 E19 -1200 -200 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_6 E20 -1200 500 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_0 F17 -1200 1100 300 R 50 50 4 1 B
-X IO_GPIO_0_PINS_10 F18 -1200 100 300 R 50 50 4 1 B
-X IO_PWM_1_PWM_3 F19 -1200 -1600 300 R 50 50 4 1 B
-X IO_PWM_0_PWM_2 F20 -1200 -1100 300 R 50 50 4 1 B
-X IO_PWM_0_PWM_1 F21 -1200 -1000 300 R 50 50 4 1 B
-X IO_QSPI_1_DQ_2 F22 1200 -600 300 L 50 50 4 1 B
-X IO_GPIO_0_PINS_15 G17 -1200 -400 300 R 50 50 4 1 B
-X IO_PWM_1_PWM_2 G18 -1200 -1500 300 R 50 50 4 1 B
-X IO_PWM_0_PWM_0 G19 -1200 -900 300 R 50 50 4 1 B
-X IO_PWM_0_PWM_3 G20 -1200 -1200 300 R 50 50 4 1 B
-X IO_QSPI_1_CS_1 G21 1200 -900 300 L 50 50 4 1 O
-X IO_QSPI_1_DQ_0 G22 1200 -400 300 L 50 50 4 1 B
-X IO_PWM_1_PWM_1 H17 -1200 -1400 300 R 50 50 4 1 B
-X IO_QSPI_1_SCK H18 1200 -300 300 L 50 50 4 1 O
-X IO_QSPI_1_CS_2 H19 1200 -1000 300 L 50 50 4 1 O
-X IO_QSPI_0_DQ_3 H20 1200 0 300 L 50 50 4 1 B
-X IO_QSPI_0_DQ_0 H21 1200 300 300 L 50 50 4 1 B
-X IO_QSPI_0_DQ_1 H22 1200 200 300 L 50 50 4 1 B
-X IO_QSPI_1_DQ_3 J17 1200 -700 300 L 50 50 4 1 B
-X IO_QSPI_1_DQ_1 J18 1200 -500 300 L 50 50 4 1 B
-X IO_QSPI_0_CS_0 J19 1200 -100 300 L 50 50 4 1 O
-X IO_QSPI_1_CS_3 J20 1200 -1100 300 L 50 50 4 1 O
-X IO_QSPI_0_DQ_2 J21 1200 100 300 L 50 50 4 1 B
-X IVSS K15 1200 -1300 300 L 50 50 4 1 P
-X IVDD K16 -1200 1600 300 R 50 50 4 1 W
-X IO_QSPI_1_CS_0 K17 1200 -800 300 L 50 50 4 1 O
-X IO_QSPI_0_SCK K18 1200 400 300 L 50 50 4 1 O
-X IVSS L15 1200 -1400 300 L 50 50 4 1 P
-X IVDD L16 -1200 1500 300 R 50 50 4 1 W
-X IVSS M15 1200 -1500 300 L 50 50 4 1 P
-X IVDD M16 -1200 1400 300 R 50 50 4 1 W
-X IVSS N15 1200 -1600 300 L 50 50 4 1 P
-X IVDD N16 -1200 1300 300 R 50 50 4 1 W
-X IO_I2C_0_SDA W13 -1200 -700 300 R 50 50 4 1 B
-X IO_UART_0_RXD W14 1200 1500 300 L 50 50 4 1 I
-X IO_QSPI_2_SCK W15 1200 1100 300 L 50 50 4 1 O
-X IO_UART_0_TXD Y13 1200 1600 300 L 50 50 4 1 O
-X IO_I2C_0_SCL Y14 -1200 -600 300 R 50 50 4 1 B
-X IO_QSPI_2_DQ_3 Y15 1200 700 300 L 50 50 4 1 B
-X HFXOSCIN A15 1600 -500 300 L 50 50 5 1 P
-X IO_PRCI_RSVD0 A16 -1600 1600 300 R 50 50 5 1 P
-X IO_PRCI_PORESET_N A17 -1600 -1600 300 R 50 50 5 1 I
-X IO_MSEL_MSEL_0 A19 1600 -1300 300 L 50 50 5 1 I
-X IO_MSEL_MSEL_2 A20 1600 -1500 300 L 50 50 5 1 I
-X HFXOSCOUT B15 1600 -800 300 L 50 50 5 1 P
-X IO_PRCI_RTCXALTCLKIN B16 -1600 1400 300 R 50 50 5 1 P
-X IO_PRCI_RSVD6 B17 -1600 600 300 R 50 50 5 1 P
-X IO_MSEL_MSEL_3 B19 1600 -1600 300 L 50 50 5 1 I
-X IO_PRCI_RSVD15 C14 1600 -100 300 L 50 50 5 1 P
-X IO_PRCI_HFXSEL C15 -1600 -300 300 R 50 50 5 1 I
-X IO_PRCI_RSVD4 C16 -1600 800 300 R 50 50 5 1 P
-X IO_PRCI_ERESET_N C17 -1600 -1300 300 R 50 50 5 1 I
-X IO_MSEL_MSEL_1 C18 1600 -1400 300 L 50 50 5 1 I
-X IO_JTAG_TDI C19 1600 500 300 L 50 50 5 1 I
-X IO_PRCI_RSVD1 D13 -1600 1200 300 R 50 50 5 1 P
-X IO_PRCI_RSVD11 D14 -1600 0 300 R 50 50 5 1 P
-X IO_PRCI_RTCXSEL D15 -1600 1500 300 R 50 50 5 1 I
-X IO_PRCI_RSVD3 D16 -1600 900 300 R 50 50 5 1 P
-X IO_PRCI_RSVD10 D17 -1600 100 300 R 50 50 5 1 P
-X IO_JTAG_TCK D18 1600 600 300 L 50 50 5 1 I
-X IO_PRCI_RSVD2 E13 -1600 1100 300 R 50 50 5 1 P
-X IO_PRCI_RSVD12 E14 -1600 -100 300 R 50 50 5 1 P
-X IO_PRCI_RSVD5 E15 -1600 700 300 R 50 50 5 1 P
-X IO_PRCI_RSVD9 E16 -1600 300 300 R 50 50 5 1 P
-X IO_JTAG_TDO E17 1600 400 300 L 50 50 5 1 O
-X IO_PRCI_RSVD14 F13 1600 0 300 L 50 50 5 1 P
-X IO_PRCI_RSVD13 F14 1600 100 300 L 50 50 5 1 P
-X IO_PRCI_HFXCLKIN F15 1600 -300 300 L 50 50 5 1 I
-X IO_JTAG_TMS F16 1600 300 300 L 50 50 5 1 I
-X IO_PRCI_RSVD7 G13 -1600 500 300 R 50 50 5 1 P
-X OTP_VDD G14 1600 1600 300 L 50 50 5 1 I
-X IO_PRCI_RSVD8 H13 -1600 400 300 R 50 50 5 1 P
-X COREPLL_AVSS J14 1600 900 300 L 50 50 5 1 I
-X COREPLL_AVDD K14 1600 1200 300 L 50 50 5 1 I
-X VSS A1 -900 -2200 300 R 50 50 6 1 W
-X VSS A14 -900 -2600 300 R 50 50 6 1 W
-X VSS A18 -900 -2700 300 R 50 50 6 1 W
-X VSS A2 -900 -2300 300 R 50 50 6 1 W
-X VSS A22 -900 -2800 300 R 50 50 6 1 W
-X VSS A3 -900 -2400 300 R 50 50 6 1 W
-X VSS A9 -900 -2500 300 R 50 50 6 1 W
-X VDD AA17 -900 -1900 300 R 50 50 6 1 W
-X VSS AA2 -900 -2900 300 R 50 50 6 1 W
-X VSS AB1 -900 -3000 300 R 50 50 6 1 W
-X VSS AB10 -900 -3300 300 R 50 50 6 1 W
-X VSS AB13 -900 -3400 300 R 50 50 6 1 W
-X VSS AB17 900 -3400 300 L 50 50 6 1 W
-X VSS AB22 900 -3300 300 L 50 50 6 1 W
-X VSS AB4 -900 -3100 300 R 50 50 6 1 W
-X VSS AB7 -900 -3200 300 R 50 50 6 1 W
-X VDD B14 -900 3300 300 R 50 50 6 1 W
-X VDD B18 -900 3200 300 R 50 50 6 1 W
-X VDD B9 -900 3400 300 R 50 50 6 1 W
-X VSS D1 900 -3200 300 L 50 50 6 1 W
-X VSS D12 900 -3100 300 L 50 50 6 1 W
-X VDD E21 -900 3000 300 R 50 50 6 1 W
-X VSS E22 900 -2900 300 L 50 50 6 1 W
-X VDD E3 -900 3100 300 R 50 50 6 1 W
-X VSS E4 900 -3000 300 L 50 50 6 1 W
-X VSS F7 900 -2800 300 L 50 50 6 1 W
-X VSS G10 900 -2400 300 L 50 50 6 1 W
-X VDD G11 -900 2800 300 R 50 50 6 1 W
-X VSS G12 900 -2300 300 L 50 50 6 1 W
-X VDD G15 -900 2700 300 R 50 50 6 1 W
-X VSS G16 900 -2200 300 L 50 50 6 1 W
-X VSS G2 900 -2700 300 L 50 50 6 1 W
-X VSS G6 900 -2600 300 L 50 50 6 1 W
-X VSS G8 900 -2500 300 L 50 50 6 1 W
-X VDD G9 -900 2900 300 R 50 50 6 1 W
-X VDD H10 -900 2500 300 R 50 50 6 1 W
-X VDD H12 -900 2400 300 R 50 50 6 1 W
-X VDD H14 -900 2300 300 R 50 50 6 1 W
-X VSS H15 900 -1900 300 L 50 50 6 1 W
-X VDD H16 -900 2200 300 R 50 50 6 1 W
-X VSS H7 900 -2100 300 L 50 50 6 1 W
-X VDD H8 -900 2600 300 R 50 50 6 1 W
-X VSS H9 900 -2000 300 L 50 50 6 1 W
-X VSS J1 900 -1800 300 L 50 50 6 1 W
-X VSS J10 900 -1500 300 L 50 50 6 1 W
-X VDD J15 -900 2000 300 R 50 50 6 1 W
-X VSS J16 900 -1400 300 L 50 50 6 1 W
-X VSS J22 900 -1300 300 L 50 50 6 1 W
-X VSS J6 900 -1700 300 L 50 50 6 1 W
-X VSS J8 900 -1600 300 L 50 50 6 1 W
-X VDD J9 -900 2100 300 R 50 50 6 1 W
-X VDD K10 -900 1800 300 R 50 50 6 1 W
-X VSS K11 900 -1000 300 L 50 50 6 1 W
-X VDD K21 -900 1700 300 R 50 50 6 1 W
-X VSS K7 900 -1200 300 L 50 50 6 1 W
-X VDD K8 -900 1900 300 R 50 50 6 1 W
-X VSS K9 900 -1100 300 L 50 50 6 1 W
-X VSS L10 -900 -2100 300 R 50 50 6 1 W
-X VDD L11 -900 1600 300 R 50 50 6 1 W
-X VSS L12 900 -700 300 L 50 50 6 1 W
-X VDD L13 -900 1500 300 R 50 50 6 1 W
-X VSS L14 900 -600 300 L 50 50 6 1 W
-X VSS L6 900 -900 300 L 50 50 6 1 W
-X VSS L8 900 -800 300 L 50 50 6 1 W
-X VDD M10 -900 1300 300 R 50 50 6 1 W
-X VSS M11 900 -400 300 L 50 50 6 1 W
-X VDD M12 -900 1200 300 R 50 50 6 1 W
-X VSS M13 900 -300 300 L 50 50 6 1 W
-X VDD M14 -900 1100 300 R 50 50 6 1 W
-X VSS M7 900 -500 300 L 50 50 6 1 W
-X VDD M8 -900 1400 300 R 50 50 6 1 W
-X VSS N10 900 0 300 L 50 50 6 1 W
-X VDD N11 -900 900 300 R 50 50 6 1 W
-X VSS N12 900 100 300 L 50 50 6 1 W
-X VDD N13 -900 800 300 R 50 50 6 1 W
-X VSS N14 900 200 300 L 50 50 6 1 W
-X VSS N6 900 -200 300 L 50 50 6 1 W
-X VSS N8 900 -100 300 L 50 50 6 1 W
-X VDD N9 -900 1000 300 R 50 50 6 1 W
-X VSS P1 900 300 300 L 50 50 6 1 W
-X VDD P10 -900 500 300 R 50 50 6 1 W
-X VSS P11 900 600 300 L 50 50 6 1 W
-X VDD P12 -900 400 300 R 50 50 6 1 W
-X VSS P13 900 700 300 L 50 50 6 1 W
-X VDD P14 -900 300 300 R 50 50 6 1 W
-X VSS P15 900 800 300 L 50 50 6 1 W
-X VDD P16 -900 200 300 R 50 50 6 1 W
-X VDD P2 -900 700 300 R 50 50 6 1 W
-X VDD P21 -900 100 300 R 50 50 6 1 W
-X VSS P22 900 900 300 L 50 50 6 1 W
-X VSS P7 900 400 300 L 50 50 6 1 W
-X VDD P8 -900 600 300 R 50 50 6 1 W
-X VSS P9 900 500 300 L 50 50 6 1 W
-X VSS R10 900 1200 300 L 50 50 6 1 W
-X VDD R11 -900 -100 300 R 50 50 6 1 W
-X VSS R12 900 1300 300 L 50 50 6 1 W
-X VDD R13 -900 -200 300 R 50 50 6 1 W
-X VSS R14 900 1400 300 L 50 50 6 1 W
-X VDD R15 -900 -300 300 R 50 50 6 1 W
-X VSS R16 900 1500 300 L 50 50 6 1 W
-X VSS R6 900 1000 300 L 50 50 6 1 W
-X VSS R8 900 1100 300 L 50 50 6 1 W
-X VDD R9 -900 0 300 R 50 50 6 1 W
-X VDD T10 -900 -500 300 R 50 50 6 1 W
-X VSS T11 900 1800 300 L 50 50 6 1 W
-X VDD T12 -900 -600 300 R 50 50 6 1 W
-X VSS T13 900 1900 300 L 50 50 6 1 W
-X VDD T14 -900 -700 300 R 50 50 6 1 W
-X VSS T15 900 2000 300 L 50 50 6 1 W
-X VDD T16 -900 -800 300 R 50 50 6 1 W
-X VSS T17 900 2100 300 L 50 50 6 1 W
-X VSS T7 900 1600 300 L 50 50 6 1 W
-X VDD T8 -900 -400 300 R 50 50 6 1 W
-X VSS T9 900 1700 300 L 50 50 6 1 W
-X VSS U10 900 2400 300 L 50 50 6 1 W
-X VDD U11 -900 -1000 300 R 50 50 6 1 W
-X VSS U12 900 2500 300 L 50 50 6 1 W
-X VDD U13 -900 -1100 300 R 50 50 6 1 W
-X VSS U14 900 2600 300 L 50 50 6 1 W
-X VDD U15 -900 -1200 300 R 50 50 6 1 W
-X VSS U16 900 2700 300 L 50 50 6 1 W
-X VSS U6 900 2200 300 L 50 50 6 1 W
-X VSS U8 900 2300 300 L 50 50 6 1 W
-X VDD U9 -900 -900 300 R 50 50 6 1 W
-X VSS V1 900 2800 300 L 50 50 6 1 W
-X VDD V10 -900 -1500 300 R 50 50 6 1 W
-X VSS V11 900 3100 300 L 50 50 6 1 W
-X VDD V12 -900 -1600 300 R 50 50 6 1 W
-X VSS V13 900 3200 300 L 50 50 6 1 W
-X VDD V14 -900 -1700 300 R 50 50 6 1 W
-X VSS V15 900 3300 300 L 50 50 6 1 W
-X VDD V21 -900 -1800 300 R 50 50 6 1 W
-X VSS V22 900 3400 300 L 50 50 6 1 W
-X VDD V6 -900 -1300 300 R 50 50 6 1 W
-X VSS V7 900 2900 300 L 50 50 6 1 W
-X VDD V8 -900 -1400 300 R 50 50 6 1 W
-X VSS V9 900 3000 300 L 50 50 6 1 W
+S -900 -1800 900 1800 1 1 10 f
+S -1100 -4850 1100 4850 2 1 10 f
+S -1000 -900 1000 900 3 1 10 f
+S -800 -1500 800 1500 4 1 10 f
+S -900 -1300 900 1300 5 1 10 f
+S -800 -600 800 600 6 1 10 f
+X CL_0_B2C_D_2 AA18 -1100 1400 200 R 50 50 1 1 I
+X CL_0_B2C_D_8 AA19 -1100 800 200 R 50 50 1 1 I
+X CL_0_B2C_D_23 AA20 -1100 -700 200 R 50 50 1 1 I
+X CL_0_B2C_D_29 AA21 -1100 -1300 200 R 50 50 1 1 I
+X CL_0_B2C_CLK AA22 -1100 1700 200 R 50 50 1 1 I
+X CL_0_B2C_D_1 AB18 -1100 1500 200 R 50 50 1 1 I
+X CL_0_B2C_D_13 AB19 -1100 300 200 R 50 50 1 1 I
+X CL_0_B2C_D_22 AB20 -1100 -600 200 R 50 50 1 1 I
+X CL_0_B2C_D_26 AB21 -1100 -1000 200 R 50 50 1 1 I
+X CL_0_C2B_D_28 K19 1100 -1200 200 L 50 50 1 1 O
+X CL_0_C2B_D_24 K20 1100 -800 200 L 50 50 1 1 O
+X CL_0_C2B_D_26 K22 1100 -1000 200 L 50 50 1 1 O
+X CL_0_C2B_D_31 L17 1100 -1500 200 L 50 50 1 1 O
+X CL_0_C2B_D_30 L18 1100 -1400 200 L 50 50 1 1 O
+X CL_0_C2B_D_27 L19 1100 -1100 200 L 50 50 1 1 O
+X CL_0_C2B_D_20 L20 1100 -400 200 L 50 50 1 1 O
+X CL_0_C2B_D_18 L21 1100 -200 200 L 50 50 1 1 O
+X CL_0_C2B_D_29 L22 1100 -1300 200 L 50 50 1 1 O
+X CL_0_C2B_D_15 M17 1100 100 200 L 50 50 1 1 O
+X CL_0_C2B_D_19 M18 1100 -300 200 L 50 50 1 1 O
+X CL_0_C2B_D_23 M19 1100 -700 200 L 50 50 1 1 O
+X CL_0_C2B_D_12 M20 1100 400 200 L 50 50 1 1 O
+X CL_0_C2B_D_25 M21 1100 -900 200 L 50 50 1 1 O
+X CL_0_C2B_D_22 M22 1100 -600 200 L 50 50 1 1 O
+X CL_0_C2B_SEND N17 1100 -1700 200 L 50 50 1 1 O
+X CL_0_C2B_D_2 N18 1100 1400 200 L 50 50 1 1 O
+X CL_0_C2B_D_6 N19 1100 1000 200 L 50 50 1 1 O
+X CL_0_C2B_D_21 N20 1100 -500 200 L 50 50 1 1 O
+X CL_0_C2B_D_16 N21 1100 0 200 L 50 50 1 1 O
+X CL_0_C2B_D_14 N22 1100 200 200 L 50 50 1 1 O
+X CL_0_B2C_RST P17 -1100 -1600 200 R 50 50 1 1 I
+X CL_0_B2C_D_21 P18 -1100 -500 200 R 50 50 1 1 I
+X CL_0_C2B_CLK P19 1100 1700 200 L 50 50 1 1 O
+X CL_0_C2B_D_4 P20 1100 1200 200 L 50 50 1 1 O
+X CL_0_B2C_D_24 R17 -1100 -800 200 R 50 50 1 1 I
+X CL_0_B2C_D_17 R18 -1100 -100 200 R 50 50 1 1 I
+X CL_0_C2B_D_1 R19 1100 1500 200 L 50 50 1 1 O
+X CL_0_C2B_D_3 R20 1100 1300 200 L 50 50 1 1 O
+X CL_0_C2B_D_8 R21 1100 800 200 L 50 50 1 1 O
+X CL_0_C2B_D_17 R22 1100 -100 200 L 50 50 1 1 O
+X CL_0_B2C_D_19 T18 -1100 -300 200 R 50 50 1 1 I
+X CL_0_C2B_D_0 T19 1100 1600 200 L 50 50 1 1 O
+X CL_0_C2B_RST T20 1100 -1600 200 L 50 50 1 1 O
+X CL_0_C2B_D_13 T21 1100 300 200 L 50 50 1 1 O
+X CL_0_C2B_D_10 T22 1100 600 200 L 50 50 1 1 O
+X CL_0_B2C_D_20 U17 -1100 -400 200 R 50 50 1 1 I
+X CL_0_B2C_D_14 U18 -1100 200 200 R 50 50 1 1 I
+X CL_0_B2C_D_18 U19 -1100 -200 200 R 50 50 1 1 I
+X CL_0_C2B_D_5 U20 1100 1100 200 L 50 50 1 1 O
+X CL_0_C2B_D_11 U21 1100 500 200 L 50 50 1 1 O
+X CL_0_C2B_D_7 U22 1100 900 200 L 50 50 1 1 O
+X CL_0_B2C_D_12 V16 -1100 400 200 R 50 50 1 1 I
+X CL_0_B2C_D_16 V17 -1100 0 200 R 50 50 1 1 I
+X CL_0_B2C_D_9 V18 -1100 700 200 R 50 50 1 1 I
+X CL_0_B2C_D_15 V19 -1100 100 200 R 50 50 1 1 I
+X CL_0_B2C_D_25 V20 -1100 -900 200 R 50 50 1 1 I
+X CL_0_B2C_D_4 W16 -1100 1200 200 R 50 50 1 1 I
+X CL_0_B2C_D_3 W17 -1100 1300 200 R 50 50 1 1 I
+X CL_0_B2C_D_5 W18 -1100 1100 200 R 50 50 1 1 I
+X CL_0_B2C_D_11 W19 -1100 500 200 R 50 50 1 1 I
+X CL_0_B2C_D_28 W20 -1100 -1200 200 R 50 50 1 1 I
+X CL_0_B2C_SEND W21 -1100 -1700 200 R 50 50 1 1 I
+X CL_0_C2B_D_9 W22 1100 700 200 L 50 50 1 1 O
+X CL_0_B2C_D_0 Y16 -1100 1600 200 R 50 50 1 1 I
+X CL_0_B2C_D_7 Y17 -1100 900 200 R 50 50 1 1 I
+X CL_0_B2C_D_6 Y18 -1100 1000 200 R 50 50 1 1 I
+X CL_0_B2C_D_10 Y19 -1100 600 200 R 50 50 1 1 I
+X CL_0_B2C_D_27 Y20 -1100 -1100 200 R 50 50 1 1 I
+X CL_0_B2C_D_31 Y21 -1100 -1500 200 R 50 50 1 1 I
+X CL_0_B2C_D_30 Y22 -1100 -1400 200 R 50 50 1 1 I
+X DDR_MEM_D[18] A4 1300 1800 200 L 50 50 2 1 B
+X DDR_MEM_D[19] A5 1300 1900 200 L 50 50 2 1 B
+X DDR_MEM_DQS_P[2] A6 1300 1500 200 L 50 50 2 1 B
+X DDR_MEM_DQS_M[2] A7 1300 1400 200 L 50 50 2 1 B
+X DDR_MEM_D[41] AA1 1300 -1900 200 L 50 50 2 1 B
+X DDR_MEM_D[61] AA10 1300 -3900 200 L 50 50 2 1 B
+X DDR_MEM_D[63] AA11 1300 -3700 200 L 50 50 2 1 B
+X DDR_MEM_D[58] AA12 1300 -4200 200 L 50 50 2 1 B
+X DDR_MEM_D[56] AA13 1300 -4400 200 L 50 50 2 1 B
+X DDR_MEM_D[45] AA3 1300 -1500 200 L 50 50 2 1 B
+X DDR_MEM_D[47] AA4 1300 -1300 200 L 50 50 2 1 B
+X DDR_MEM_ODT[0] AA5 -1300 -100 200 R 50 50 2 1 O
+X DDR_MEM_CKE[1] AA6 -1300 -400 200 R 50 50 2 1 O
+X DDR_MEM_DQS_M[6] AA7 1300 -3400 200 L 50 50 2 1 B
+X DDR_MEM_DQS_P[7] AA8 1300 -4500 200 L 50 50 2 1 B
+X DDR_MEM_D[62] AA9 1300 -3800 200 L 50 50 2 1 B
+X DDR_MEM_D[60] AB11 1300 -4000 200 L 50 50 2 1 B
+X DDR_MEM_DM[7] AB12 1300 -4700 200 L 50 50 2 1 B
+X DDR_MEM_D[44] AB2 1300 -1600 200 L 50 50 2 1 B
+X DDR_MEM_D[46] AB3 1300 -1400 200 L 50 50 2 1 B
+X DDR_MEM_ODT[1] AB5 -1300 -200 200 R 50 50 2 1 O
+X DDR_MEM_CKE[0] AB6 -1300 -300 200 R 50 50 2 1 O
+X DDR_MEM_D[57] AB8 1300 -4300 200 L 50 50 2 1 B
+X DDR_MEM_D[59] AB9 1300 -4100 200 L 50 50 2 1 B
+X DDR_MEM_D[1] B1 1300 4100 200 L 50 50 2 1 B
+X DDR_MEM_D[17] B2 1300 1700 200 L 50 50 2 1 B
+X DDR_MEM_D[22] B3 1300 2200 200 L 50 50 2 1 B
+X DDR_MEM_D[16] B4 1300 1600 200 L 50 50 2 1 B
+X DDR_MEM_D[20] B5 1300 2000 200 L 50 50 2 1 B
+X DDR_MEM_D[23] B6 1300 2300 200 L 50 50 2 1 B
+X DDR_MEM_D[4] C1 1300 4400 200 L 50 50 2 1 B
+X DDR_MEM_D[29] C2 1300 900 200 L 50 50 2 1 B
+X DDR_MEM_D[27] C3 1300 700 200 L 50 50 2 1 B
+X DDR_MEM_D[24] C4 1300 400 200 L 50 50 2 1 B
+X DDR_MEM_D[21] C5 1300 2100 200 L 50 50 2 1 B
+X DDR_MEM_DM[2] C6 1300 1300 200 L 50 50 2 1 B
+X DDR_MEM_D[31] C7 1300 1100 200 L 50 50 2 1 B
+X DDR_MEM_D[0] D2 1300 4000 200 L 50 50 2 1 B
+X DDR_MEM_D[30] D3 1300 1000 200 L 50 50 2 1 B
+X DDR_MEM_D[25] D4 1300 500 200 L 50 50 2 1 B
+X DDR_MEM_DM[3] D5 1300 100 200 L 50 50 2 1 B
+X DDR_MEM_D[26] D6 1300 600 200 L 50 50 2 1 B
+X DDR_MEM_DQS_M[3] D7 1300 200 200 L 50 50 2 1 B
+X DDR_RSVD1 D8 -1300 -2700 200 R 50 50 2 1 P
+X DDR_MEM_D[6] E1 1300 4600 200 L 50 50 2 1 B
+X DDR_MEM_D[3] E2 1300 4300 200 L 50 50 2 1 B
+X DDR_MEM_DM[0] E5 1300 3700 200 L 50 50 2 1 B
+X DDR_MEM_D[28] E6 1300 800 200 L 50 50 2 1 B
+X DDR_MEM_DQS_P[3] E7 1300 300 200 L 50 50 2 1 B
+X DDR_RSVD0 E8 -1300 -2600 200 R 50 50 2 1 P
+X DDR_MEM_D[9] F1 1300 2900 200 L 50 50 2 1 B
+X DDR_MEM_DQS_P[0] F2 1300 3900 200 L 50 50 2 1 B
+X DDR_MEM_DQS_M[0] F3 1300 3800 200 L 50 50 2 1 B
+X DDR_MEM_D[2] F4 1300 4200 200 L 50 50 2 1 B
+X DDR_MEM_D[10] F5 1300 3000 200 L 50 50 2 1 B
+X DDR_CAL_0 F6 -1300 -4700 200 R 50 50 2 1 P
+X DDR_RSVD2 F8 -1300 -2800 200 R 50 50 2 1 P
+X DDR_RSVD3 F9 -1300 -2900 200 R 50 50 2 1 P
+X DDR_MEM_D[11] G1 1300 3100 200 L 50 50 2 1 B
+X DDR_MEM_D[7] G3 1300 4700 200 L 50 50 2 1 B
+X DDR_MEM_D[5] G4 1300 4500 200 L 50 50 2 1 B
+X DDR_MEM_DM[1] G5 1300 2500 200 L 50 50 2 1 B
+X DDR_MEM_D[12] H1 1300 3200 200 L 50 50 2 1 B
+X DDR_MEM_DQS_P[1] H2 1300 2700 200 L 50 50 2 1 B
+X DDR_MEM_DQS_M[1] H3 1300 2600 200 L 50 50 2 1 B
+X DDR_MEM_D[8] H4 1300 2800 200 L 50 50 2 1 B
+X DDR_MEM_ECC_D[0] H5 -1300 -2000 200 R 50 50 2 1 B
+X DDR_MEM_D[14] J2 1300 3400 200 L 50 50 2 1 B
+X DDR_MEM_D[13] J3 1300 3300 200 L 50 50 2 1 B
+X DDR_MEM_D[15] J4 1300 3500 200 L 50 50 2 1 B
+X DDR_MEM_ECC_DM J5 -1300 -2300 200 R 50 50 2 1 B
+X DDR_MEM_ECC_D[1] K1 -1300 -1900 200 R 50 50 2 1 B
+X DDR_MEM_ECC_DQS_P K2 -1300 -2100 200 R 50 50 2 1 B
+X DDR_MEM_ECC_DQS_M K3 -1300 -2200 200 R 50 50 2 1 B
+X DDR_MEM_ECC_D[2] K4 -1300 -1800 200 R 50 50 2 1 B
+X DDR_MEM_CLK K5 -1300 -1000 200 R 50 50 2 1 O
+X DDR_MEM_ECC_D[4] L1 -1300 -1600 200 R 50 50 2 1 B
+X DDR_MEM_ECC_D[3] L2 -1300 -1700 200 R 50 50 2 1 B
+X DDR_MEM_ECC_D[7] L3 -1300 -1300 200 R 50 50 2 1 B
+X DDR_MEM_ECC_D[5] L4 -1300 -1500 200 R 50 50 2 1 B
+X DDR_MEM_CLK_N L5 -1300 -1100 200 R 50 50 2 1 O
+X DDR_MEM_ECC_D[6] M1 -1300 -1400 200 R 50 50 2 1 B
+X DDR_MEM_RAS_N M2 -1300 300 200 R 50 50 2 1 O
+X DDR_MEM_CAS_N M3 -1300 400 200 R 50 50 2 1 O
+X DDR_MEM_BANK[0] M4 -1300 500 200 R 50 50 2 1 O
+X DDR_MEM_BANK[2] M5 -1300 700 200 R 50 50 2 1 O
+X DDR_MEM_WE_N N1 -1300 200 200 R 50 50 2 1 O
+X DDR_MEM_BANK[1] N2 -1300 600 200 R 50 50 2 1 O
+X DDR_MEM_ADDR[0] N3 -1300 800 200 R 50 50 2 1 O
+X DDR_MEM_ADDR[2] N4 -1300 1000 200 R 50 50 2 1 O
+X DDR_MEM_ADDR[5] N5 -1300 1300 200 R 50 50 2 1 O
+X DDR_MEM_ADDR[3] P3 -1300 1100 200 R 50 50 2 1 O
+X DDR_MEM_ADDR[6] P4 -1300 1400 200 R 50 50 2 1 O
+X DDR_MEM_ADDR[12] P5 -1300 2000 200 R 50 50 2 1 O
+X DDR_MEM_ADDR[1] R1 -1300 900 200 R 50 50 2 1 O
+X DDR_MEM_ADDR[7] R2 -1300 1500 200 R 50 50 2 1 O
+X DDR_MEM_ADDR[8] R3 -1300 1600 200 R 50 50 2 1 O
+X DDR_MEM_ADDR[11] R4 -1300 1900 200 R 50 50 2 1 O
+X DDR_MEM_D[32] R5 1300 -800 200 L 50 50 2 1 B
+X DDR_MEM_ADDR[4] T1 -1300 1200 200 R 50 50 2 1 O
+X DDR_MEM_ADDR[13] T2 -1300 2100 200 R 50 50 2 1 O
+X DDR_MEM_ADDR[9] T3 -1300 1700 200 R 50 50 2 1 O
+X DDR_MEM_D[34] T4 1300 -600 200 L 50 50 2 1 B
+X DDR_MEM_DM[4] T5 1300 -1100 200 L 50 50 2 1 B
+X DDR_MEM_ADDR[10] U1 -1300 1800 200 R 50 50 2 1 O
+X DDR_MEM_PARITY_IN U2 -1300 100 200 R 50 50 2 1 O
+X DDR_MEM_ADDR[14] U3 -1300 2200 200 R 50 50 2 1 O
+X DDR_MEM_DQS_M[4] U4 1300 -1000 200 L 50 50 2 1 B
+X DDR_MEM_D[39] U5 1300 -100 200 L 50 50 2 1 B
+X DDR_MEM_D[35] V2 1300 -500 200 L 50 50 2 1 B
+X DDR_MEM_ADDR[15] V3 -1300 2300 200 R 50 50 2 1 O
+X DDR_MEM_DQS_P[4] V4 1300 -900 200 L 50 50 2 1 B
+X DDR_MEM_D[40] V5 1300 -2000 200 L 50 50 2 1 B
+X DDR_MEM_D[33] W1 1300 -700 200 L 50 50 2 1 B
+X DDR_MEM_DM[6] W10 1300 -3500 200 L 50 50 2 1 B
+X DDR_MEM_D[49] W11 1300 -3100 200 L 50 50 2 1 B
+X DDR_MEM_D[54] W12 1300 -2600 200 L 50 50 2 1 B
+X DDR_MEM_D[38] W2 1300 -200 200 L 50 50 2 1 B
+X DDR_MEM_D[37] W3 1300 -300 200 L 50 50 2 1 B
+X DDR_MEM_DQS_M[5] W4 1300 -2200 200 L 50 50 2 1 B
+X DDR_MEM_DM[5] W5 1300 -2300 200 L 50 50 2 1 B
+X DDR_MEM_ERROR_N W6 -1300 0 200 R 50 50 2 1 I
+X DDR_MEM_CS_N[1] W7 -1300 -600 200 R 50 50 2 1 O
+X DDR_MEM_D[51] W8 1300 -2900 200 L 50 50 2 1 B
+X DDR_MEM_D[55] W9 1300 -2500 200 L 50 50 2 1 B
+X DDR_MEM_D[36] Y1 1300 -400 200 L 50 50 2 1 B
+X DDR_MEM_D[52] Y10 1300 -2800 200 L 50 50 2 1 B
+X DDR_MEM_D[50] Y11 1300 -3000 200 L 50 50 2 1 B
+X DDR_MEM_D[48] Y12 1300 -3200 200 L 50 50 2 1 B
+X DDR_MEM_D[43] Y2 1300 -1700 200 L 50 50 2 1 B
+X DDR_MEM_D[42] Y3 1300 -1800 200 L 50 50 2 1 B
+X DDR_MEM_DQS_P[5] Y4 1300 -2100 200 L 50 50 2 1 B
+X DDR_MEM_RESET_N Y5 -1300 -700 200 R 50 50 2 1 O
+X DDR_MEM_CS_N[0] Y6 -1300 -500 200 R 50 50 2 1 O
+X DDR_MEM_DQS_P[6] Y7 1300 -3300 200 L 50 50 2 1 B
+X DDR_MEM_DQS_M[7] Y8 1300 -4600 200 L 50 50 2 1 B
+X DDR_MEM_D[53] Y9 1300 -2700 200 L 50 50 2 1 B
+X GEMGXL_0_RXD_2 A10 -1200 400 200 R 50 50 3 1 I
+X GEMGXL_0_RX_DV A11 -1200 -200 200 R 50 50 3 1 I
+X GEMGXL_0_RXD_0 A12 -1200 600 200 R 50 50 3 1 I
+X GEMGXL_0_COL A13 -1200 -500 200 R 50 50 3 1 I
+X GEMGXL_0_RXD_5 A8 -1200 100 200 R 50 50 3 1 I
+X GEMGXL_0_RXD_1 B10 -1200 500 200 R 50 50 3 1 I
+X GEMGXL_0_RX_ER B11 -1200 -300 200 R 50 50 3 1 I
+X GEMGXL_0_TXD_0 B12 1200 400 200 L 50 50 3 1 O
+X GEMGXL_0_MDC B13 -1200 -700 200 R 50 50 3 1 O
+X GEMGXL_0_TX_EN B7 1200 -400 200 L 50 50 3 1 O
+X GEMGXL_0_TXD_6 B8 1200 -200 200 L 50 50 3 1 O
+X GEMGXL_0_TXD_4 C10 1200 0 200 L 50 50 3 1 O
+X GEMGXL_0_TXD_1 C11 1200 300 200 L 50 50 3 1 O
+X GEMGXL_0_MDIO C12 -1200 -800 200 R 50 50 3 1 B
+X GEMGXL_0_CRS C13 -1200 -400 200 R 50 50 3 1 I
+X GEMGXL_0_TX_CLK C8 1200 500 200 L 50 50 3 1 I
+X GEMGXL_0_RXD_6 C9 -1200 0 200 R 50 50 3 1 I
+X GEMGXL_0_TXD_5 D10 1200 -100 200 L 50 50 3 1 O
+X GEMGXL_0_TXD_2 D11 1200 200 200 L 50 50 3 1 O
+X GEMGXL_0_TXD_7 D9 1200 -300 200 L 50 50 3 1 O
+X GEMGXL_0_RXD_4 E10 -1200 200 200 R 50 50 3 1 I
+X GEMGXL_0_RXD_3 E11 -1200 300 200 R 50 50 3 1 I
+X GEMGXL_0_GTX_CLK E12 -1200 800 200 R 50 50 3 1 I
+X GEMGXL_0_RXD_7 E9 -1200 -100 200 R 50 50 3 1 I
+X GEMGXL_0_TX_ER F10 1200 -500 200 L 50 50 3 1 O
+X GEMGXL_0_TXD_3 F11 1200 100 200 L 50 50 3 1 O
+X GEMGXL_0_RX_CLK F12 -1200 700 200 R 50 50 3 1 I
+X GPIO_0_P_9 A21 -1000 400 200 R 50 50 4 1 B
+X UART_1_RXD AA14 1000 1000 200 L 50 50 4 1 I
+X UART_1_TXD AA15 1000 1100 200 L 50 50 4 1 O
+X QSPI_2_DQ_0 AA16 1000 700 200 L 50 50 4 1 B
+X QSPI_2_CS_0 AB14 1000 300 200 L 50 50 4 1 O
+X QSPI_2_DQ_1 AB15 1000 600 200 L 50 50 4 1 B
+X QSPI_2_DQ_2 AB16 1000 500 200 L 50 50 4 1 B
+X GPIO_0_P_11 B20 -1000 200 200 R 50 50 4 1 B
+X GPIO_0_P_12 B21 -1000 100 200 R 50 50 4 1 B
+X GPIO_0_P_14 B22 -1000 -100 200 R 50 50 4 1 B
+X GPIO_0_P_7 C20 -1000 600 200 R 50 50 4 1 B
+X GPIO_0_P_2 C21 -1000 1100 200 R 50 50 4 1 B
+X GPIO_0_P_1 C22 -1000 1200 200 R 50 50 4 1 B
+X GPIO_0_P_8 D19 -1000 500 200 R 50 50 4 1 B
+X GPIO_0_P_5 D20 -1000 800 200 R 50 50 4 1 B
+X GPIO_0_P_3 D21 -1000 1000 200 R 50 50 4 1 B
+X PWM_1_P_0 D22 -1000 -1100 200 R 50 50 4 1 B
+X GPIO_0_P_4 E18 -1000 900 200 R 50 50 4 1 B
+X GPIO_0_P_13 E19 -1000 0 200 R 50 50 4 1 B
+X GPIO_0_P_6 E20 -1000 700 200 R 50 50 4 1 B
+X GPIO_0_P_0 F17 -1000 1300 200 R 50 50 4 1 B
+X GPIO_0_P_10 F18 -1000 300 200 R 50 50 4 1 B
+X PWM_1_P_3 F19 -1000 -1400 200 R 50 50 4 1 B
+X PWM_0_P_2 F20 -1000 -900 200 R 50 50 4 1 B
+X PWM_0_P_1 F21 -1000 -800 200 R 50 50 4 1 B
+X QSPI_1_DQ_2 F22 1000 -900 200 L 50 50 4 1 B
+X GPIO_0_P_15 G17 -1000 -200 200 R 50 50 4 1 B
+X PWM_1_P_2 G18 -1000 -1300 200 R 50 50 4 1 B
+X PWM_0_P_0 G19 -1000 -700 200 R 50 50 4 1 B
+X PWM_0_P_3 G20 -1000 -1000 200 R 50 50 4 1 B
+X QSPI_1_CS_1 G21 1000 -1200 200 L 50 50 4 1 O
+X QSPI_1_DQ_0 G22 1000 -700 200 L 50 50 4 1 B
+X PWM_1_P_1 H17 -1000 -1200 200 R 50 50 4 1 B
+X QSPI_1_SCK H18 1000 -600 200 L 50 50 4 1 O
+X QSPI_1_CS_2 H19 1000 -1300 200 L 50 50 4 1 O
+X QSPI_0_DQ_3 H20 1000 -300 200 L 50 50 4 1 B
+X QSPI_0_DQ_0 H21 1000 0 200 L 50 50 4 1 B
+X QSPI_0_DQ_1 H22 1000 -100 200 L 50 50 4 1 B
+X QSPI_1_DQ_3 J17 1000 -1000 200 L 50 50 4 1 B
+X QSPI_1_DQ_1 J18 1000 -800 200 L 50 50 4 1 B
+X QSPI_0_CS_0 J19 1000 -400 200 L 50 50 4 1 O
+X QSPI_1_CS_3 J20 1000 -1400 200 L 50 50 4 1 O
+X QSPI_0_DQ_2 J21 1000 -200 200 L 50 50 4 1 B
+X QSPI_1_CS_0 K17 1000 -1100 200 L 50 50 4 1 O
+X QSPI_0_SCK K18 1000 100 200 L 50 50 4 1 O
+X I2C_0_SDA W13 -1000 -500 200 R 50 50 4 1 B
+X UART_0_RXD W14 1000 1200 200 L 50 50 4 1 I
+X QSPI_2_SCK W15 1000 800 200 L 50 50 4 1 O
+X UART_0_TXD Y13 1000 1300 200 L 50 50 4 1 O
+X I2C_0_SCL Y14 -1000 -400 200 R 50 50 4 1 B
+X QSPI_2_DQ_3 Y15 1000 400 200 L 50 50 4 1 B
+X HFXOSCIN A15 1100 -100 200 L 50 50 5 1 P
+X PRCI_RSVD0 A16 -1100 1200 200 R 50 50 5 1 P
+X PRCI_PORESET_N A17 -1100 -1200 200 R 50 50 5 1 I
+X MSEL_MSEL_0 A19 1100 -900 200 L 50 50 5 1 I
+X MSEL_MSEL_2 A20 1100 -1100 200 L 50 50 5 1 I
+X HFXOSCOUT B15 1100 -400 200 L 50 50 5 1 P
+X PRCI_RTCXALTCLKIN B16 -1100 1000 200 R 50 50 5 1 P
+X PRCI_RSVD6 B17 -1100 200 200 R 50 50 5 1 P
+X MSEL_MSEL_3 B19 1100 -1200 200 L 50 50 5 1 I
+X PRCI_RSVD15 C14 1100 300 200 L 50 50 5 1 P
+X PRCI_HFXSEL C15 -1100 -700 200 R 50 50 5 1 I
+X PRCI_RSVD4 C16 -1100 400 200 R 50 50 5 1 P
+X PRCI_ERESET_N C17 -1100 -900 200 R 50 50 5 1 I
+X MSEL_MSEL_1 C18 1100 -1000 200 L 50 50 5 1 I
+X JTAG_TDI C19 1100 900 200 L 50 50 5 1 I
+X PRCI_RSVD1 D13 -1100 800 200 R 50 50 5 1 P
+X PRCI_RSVD11 D14 -1100 -400 200 R 50 50 5 1 P
+X PRCI_RTCXSEL D15 -1100 1100 200 R 50 50 5 1 I
+X PRCI_RSVD3 D16 -1100 500 200 R 50 50 5 1 P
+X PRCI_RSVD10 D17 -1100 -300 200 R 50 50 5 1 P
+X JTAG_TCK D18 1100 1000 200 L 50 50 5 1 I
+X PRCI_RSVD2 E13 -1100 700 200 R 50 50 5 1 P
+X PRCI_RSVD12 E14 -1100 -500 200 R 50 50 5 1 P
+X PRCI_RSVD5 E15 -1100 300 200 R 50 50 5 1 P
+X PRCI_RSVD9 E16 -1100 -100 200 R 50 50 5 1 P
+X JTAG_TDO E17 1100 800 200 L 50 50 5 1 O
+X PRCI_RSVD14 F13 1100 400 200 L 50 50 5 1 P
+X PRCI_RSVD13 F14 1100 500 200 L 50 50 5 1 P
+X PRCI_HFXCLKIN F15 1100 100 200 L 50 50 5 1 I
+X JTAG_TMS F16 1100 700 200 L 50 50 5 1 I
+X PRCI_RSVD7 G13 -1100 100 200 R 50 50 5 1 P
+X PRCI_RSVD8 H13 -1100 0 200 R 50 50 5 1 P
+X VSS A1 0 -800 200 U 50 50 6 1 W
+X VSS A14 0 -800 200 U 50 50 6 1 P N
+X VSS A18 0 -800 200 U 50 50 6 1 P N
+X VSS A2 0 -800 200 U 50 50 6 1 P N
+X VSS A22 0 -800 200 U 50 50 6 1 P N
+X VSS A3 0 -800 200 U 50 50 6 1 P N
+X VSS A9 0 -800 200 U 50 50 6 1 P N
+X VDD AA17 -100 800 200 D 50 50 6 1 W
+X VSS AA2 0 -800 200 U 50 50 6 1 P N
+X VSS AB1 0 -800 200 U 50 50 6 1 P N
+X VSS AB10 0 -800 200 U 50 50 6 1 P N
+X VSS AB13 0 -800 200 U 50 50 6 1 P N
+X VSS AB17 0 -800 200 U 50 50 6 1 P N
+X VSS AB22 0 -800 200 U 50 50 6 1 P N
+X VSS AB4 0 -800 200 U 50 50 6 1 P N
+X VSS AB7 0 -800 200 U 50 50 6 1 P N
+X VDD B14 -100 800 200 D 50 50 6 1 P N
+X VDD B18 -100 800 200 D 50 50 6 1 P N
+X VDD B9 -100 800 200 D 50 50 6 1 P N
+X VSS D1 0 -800 200 U 50 50 6 1 P N
+X VSS D12 0 -800 200 U 50 50 6 1 P N
+X VDD E21 -100 800 200 D 50 50 6 1 P N
+X VSS E22 0 -800 200 U 50 50 6 1 P N
+X VDD E3 -100 800 200 D 50 50 6 1 P N
+X VSS E4 0 -800 200 U 50 50 6 1 P N
+X VSS F7 0 -800 200 U 50 50 6 1 P N
+X VSS G10 0 -800 200 U 50 50 6 1 P N
+X VDD G11 -100 800 200 D 50 50 6 1 P N
+X VSS G12 0 -800 200 U 50 50 6 1 P N
+X OTP_VDD G14 600 800 200 D 50 50 6 1 W
+X VDD G15 -100 800 200 D 50 50 6 1 P N
+X VSS G16 0 -800 200 U 50 50 6 1 P N
+X VSS G2 0 -800 200 U 50 50 6 1 P N
+X VSS G6 0 -800 200 U 50 50 6 1 P N
+X DDR_VDDQ G7 100 800 200 D 50 50 6 1 W
+X VSS G8 0 -800 200 U 50 50 6 1 P N
+X VDD G9 -100 800 200 D 50 50 6 1 P N
+X VDD H10 -100 800 200 D 50 50 6 1 P N
+X GIVSS H11 -500 -800 200 U 50 50 6 1 W
+X VDD H12 -100 800 200 D 50 50 6 1 P N
+X VDD H14 -100 800 200 D 50 50 6 1 P N
+X VSS H15 0 -800 200 U 50 50 6 1 P N
+X VDD H16 -100 800 200 D 50 50 6 1 P N
+X DDR_VDDQ H6 100 800 200 D 50 50 6 1 P N
+X VSS H7 0 -800 200 U 50 50 6 1 P N
+X VDD H8 -100 800 200 D 50 50 6 1 P N
+X VSS H9 0 -800 200 U 50 50 6 1 P N
+X VSS J1 0 -800 200 U 50 50 6 1 P N
+X VSS J10 0 -800 200 U 50 50 6 1 P N
+X GIVDD J11 -300 800 200 D 50 50 6 1 W
+X GEMGXLPLL_AVSS J12 -600 -800 200 U 50 50 6 1 W
+X DDRPLL_AVSS J13 400 -800 200 U 50 50 6 1 W
+X COREPLL_AVSS J14 600 -800 200 U 50 50 6 1 W
+X VDD J15 -100 800 200 D 50 50 6 1 P N
+X VSS J16 0 -800 200 U 50 50 6 1 P N
+X VSS J22 0 -800 200 U 50 50 6 1 P N
+X VSS J6 0 -800 200 U 50 50 6 1 P N
+X DDR_VDDQ J7 100 800 200 D 50 50 6 1 P N
+X VSS J8 0 -800 200 U 50 50 6 1 P N
+X VDD J9 -100 800 200 D 50 50 6 1 P N
+X VDD K10 -100 800 200 D 50 50 6 1 P N
+X VSS K11 0 -800 200 U 50 50 6 1 P N
+X GEMGXLPLL_AVDD K12 -400 800 200 D 50 50 6 1 W
+X DDRPLL_AVDD K13 400 800 200 D 50 50 6 1 W
+X COREPLL_AVDD K14 700 800 200 D 50 50 6 1 W
+X IVSS K15 -300 -800 200 U 50 50 6 1 W
+X IVDD K16 -600 800 200 D 50 50 6 1 W
+X VDD K21 -100 800 200 D 50 50 6 1 P N
+X DDR_VDDQ K6 100 800 200 D 50 50 6 1 P N
+X VSS K7 0 -800 200 U 50 50 6 1 P N
+X VDD K8 -100 800 200 D 50 50 6 1 P N
+X VSS K9 0 -800 200 U 50 50 6 1 P N
+X VSS L10 0 -800 200 U 50 50 6 1 P N
+X VDD L11 -100 800 200 D 50 50 6 1 P N
+X VSS L12 0 -800 200 U 50 50 6 1 P N
+X VDD L13 -100 800 200 D 50 50 6 1 P N
+X VSS L14 0 -800 200 U 50 50 6 1 P N
+X IVSS L15 -300 -800 200 U 50 50 6 1 P N
+X IVDD L16 -600 800 200 D 50 50 6 1 P N
+X VSS L6 0 -800 200 U 50 50 6 1 P N
+X DDR_VDDQ L7 100 800 200 D 50 50 6 1 P N
+X VSS L8 0 -800 200 U 50 50 6 1 P N
+X DDR_VDDPLL L9 300 800 200 D 50 50 6 1 P N
+X VDD M10 -100 800 200 D 50 50 6 1 P N
+X VSS M11 0 -800 200 U 50 50 6 1 P N
+X VDD M12 -100 800 200 D 50 50 6 1 P N
+X VSS M13 0 -800 200 U 50 50 6 1 P N
+X VDD M14 -100 800 200 D 50 50 6 1 P N
+X IVSS M15 -300 -800 200 U 50 50 6 1 P N
+X IVDD M16 -600 800 200 D 50 50 6 1 P N
+X DDR_VDDQ M6 100 800 200 D 50 50 6 1 P N
+X VSS M7 0 -800 200 U 50 50 6 1 P N
+X VDD M8 -100 800 200 D 50 50 6 1 P N
+X DDR_VDDPLL M9 300 800 200 D 50 50 6 1 W
+X VSS N10 0 -800 200 U 50 50 6 1 P N
+X VDD N11 -100 800 200 D 50 50 6 1 P N
+X VSS N12 0 -800 200 U 50 50 6 1 P N
+X VDD N13 -100 800 200 D 50 50 6 1 P N
+X VSS N14 0 -800 200 U 50 50 6 1 P N
+X IVSS N15 -300 -800 200 U 50 50 6 1 P N
+X IVDD N16 -600 800 200 D 50 50 6 1 P N
+X VSS N6 0 -800 200 U 50 50 6 1 P N
+X DDR_VDDQ N7 100 800 200 D 50 50 6 1 P N
+X VSS N8 0 -800 200 U 50 50 6 1 P N
+X VDD N9 -100 800 200 D 50 50 6 1 P N
+X VSS P1 0 -800 200 U 50 50 6 1 P N
+X VDD P10 -100 800 200 D 50 50 6 1 P N
+X VSS P11 0 -800 200 U 50 50 6 1 P N
+X VDD P12 -100 800 200 D 50 50 6 1 P N
+X VSS P13 0 -800 200 U 50 50 6 1 P N
+X VDD P14 -100 800 200 D 50 50 6 1 P N
+X VSS P15 0 -800 200 U 50 50 6 1 P N
+X VDD P16 -100 800 200 D 50 50 6 1 P N
+X VDD P2 -100 800 200 D 50 50 6 1 P N
+X VDD P21 -100 800 200 D 50 50 6 1 P N
+X VSS P22 0 -800 200 U 50 50 6 1 P N
+X DDR_VDDQ P6 100 800 200 D 50 50 6 1 P N
+X VSS P7 0 -800 200 U 50 50 6 1 P N
+X VDD P8 -100 800 200 D 50 50 6 1 P N
+X VSS P9 0 -800 200 U 50 50 6 1 P N
+X VSS R10 0 -800 200 U 50 50 6 1 P N
+X VDD R11 -100 800 200 D 50 50 6 1 P N
+X VSS R12 0 -800 200 U 50 50 6 1 P N
+X VDD R13 -100 800 200 D 50 50 6 1 P N
+X VSS R14 0 -800 200 U 50 50 6 1 P N
+X VDD R15 -100 800 200 D 50 50 6 1 P N
+X VSS R16 0 -800 200 U 50 50 6 1 P N
+X VSS R6 0 -800 200 U 50 50 6 1 P N
+X DDR_VDDQ R7 100 800 200 D 50 50 6 1 P N
+X VSS R8 0 -800 200 U 50 50 6 1 P N
+X VDD R9 -100 800 200 D 50 50 6 1 P N
+X VDD T10 -100 800 200 D 50 50 6 1 P N
+X VSS T11 0 -800 200 U 50 50 6 1 P N
+X VDD T12 -100 800 200 D 50 50 6 1 P N
+X VSS T13 0 -800 200 U 50 50 6 1 P N
+X VDD T14 -100 800 200 D 50 50 6 1 P N
+X VSS T15 0 -800 200 U 50 50 6 1 P N
+X VDD T16 -100 800 200 D 50 50 6 1 P N
+X VSS T17 0 -800 200 U 50 50 6 1 P N
+X DDR_VDDQ T6 100 800 200 D 50 50 6 1 P N
+X VSS T7 0 -800 200 U 50 50 6 1 P N
+X VDD T8 -100 800 200 D 50 50 6 1 P N
+X VSS T9 0 -800 200 U 50 50 6 1 P N
+X VSS U10 0 -800 200 U 50 50 6 1 P N
+X VDD U11 -100 800 200 D 50 50 6 1 P N
+X VSS U12 0 -800 200 U 50 50 6 1 P N
+X VDD U13 -100 800 200 D 50 50 6 1 P N
+X VSS U14 0 -800 200 U 50 50 6 1 P N
+X VDD U15 -100 800 200 D 50 50 6 1 P N
+X VSS U16 0 -800 200 U 50 50 6 1 P N
+X VSS U6 0 -800 200 U 50 50 6 1 P N
+X DDR_VDDQCK U7 200 800 200 D 50 50 6 1 W
+X VSS U8 0 -800 200 U 50 50 6 1 P N
+X VDD U9 -100 800 200 D 50 50 6 1 P N
+X VSS V1 0 -800 200 U 50 50 6 1 P N
+X VDD V10 -100 800 200 D 50 50 6 1 P N
+X VSS V11 0 -800 200 U 50 50 6 1 P N
+X VDD V12 -100 800 200 D 50 50 6 1 P N
+X VSS V13 0 -800 200 U 50 50 6 1 P N
+X VDD V14 -100 800 200 D 50 50 6 1 P N
+X VSS V15 0 -800 200 U 50 50 6 1 P N
+X VDD V21 -100 800 200 D 50 50 6 1 P N
+X VSS V22 0 -800 200 U 50 50 6 1 P N
+X VDD V6 -100 800 200 D 50 50 6 1 P N
+X VSS V7 0 -800 200 U 50 50 6 1 P N
+X VDD V8 -100 800 200 D 50 50 6 1 P N
+X VSS V9 0 -800 200 U 50 50 6 1 P N
 ENDDRAW
 ENDDEF
 #

From 08fc0f9b2696e04fad9e510aed36b2182dc920af Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Sat, 26 Jan 2019 10:19:23 +0200
Subject: [PATCH 021/201] split into two symbols: SFP, SFP+

---
 Interface_Optical.dcm | 10 ++++++--
 Interface_Optical.lib | 55 ++++++++++++++++++++++++++++++++++++-------
 2 files changed, 54 insertions(+), 11 deletions(-)

diff --git a/Interface_Optical.dcm b/Interface_Optical.dcm
index 731f84ff7a..5b5a0935a2 100644
--- a/Interface_Optical.dcm
+++ b/Interface_Optical.dcm
@@ -24,9 +24,15 @@ K opto IR
 F http://www.onsemi.com/pub/Collateral/QSE159-D.pdf
 $ENDCMP
 #
-$CMP SFP_SFP+_CONNECTOR
+$CMP SFP+_CONNECTOR
 D Small Form Factor Pluggable (SFP+) module, serial-to-serial data-agnostic optical transceiver
-K SFP transciever SFP+
+K SFP transciever
+F ~
+$ENDCMP
+#
+$CMP SFP_CONNECTOR
+D Small Form Factor Pluggable (SFP) module, serial-to-serial data-agnostic optical transceiver
+K SFP transciever SFP
 F https://members.snia.org/document/dl/25891
 $ENDCMP
 #
diff --git a/Interface_Optical.lib b/Interface_Optical.lib
index 2e628c1541..7be2a836b7 100644
--- a/Interface_Optical.lib
+++ b/Interface_Optical.lib
@@ -185,18 +185,18 @@ X Vcc 3 100 300 100 D 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #
-# SFP_SFP+_CONNECTOR
+# SFP+_CONNECTOR
 #
-DEF SFP_SFP+_CONNECTOR P 0 20 Y Y 1 F N
+DEF SFP+_CONNECTOR P 0 20 Y Y 1 F N
 F0 "P" -350 650 50 H V C CNN
-F1 "SFP_SFP+_CONNECTOR" 450 650 50 H V C CNN
+F1 "SFP+_CONNECTOR" 450 650 50 H V C CNN
 F2 "Connector:Connector_SFP_and_Cage.kicad_mod" 0 -850 50 H I C CNN
 F3 "" -450 650 50 H I C CNN
 $FPLIST
  SFP*
 $ENDFPLIST
 DRAW
-T 0 -50 0 50 0 0 0 SFP/SFP+ Normal 0 C C
+T 0 -50 0 50 0 0 0 SFP+ Normal 0 C C
 S -400 600 400 -600 0 0 10 f
 X VeeT 1 -100 -700 100 U 50 50 1 1 W
 X VeeR 10 0 -700 100 U 50 50 1 1 W
@@ -212,12 +212,49 @@ X TD- 19 500 -200 100 L 50 50 1 1 I
 X TX_FAULT 2 500 -400 100 L 50 50 1 1 C
 X VeeT 20 -100 -700 100 U 50 50 1 1 P N
 X TX_DISABLE 3 -500 -300 100 R 50 50 1 1 I
-X MOD_DEF(2)/SDA 4 -500 300 100 R 50 30 1 1 B
-X MOD_DEF(1)/SCL 5 -500 200 100 R 50 30 1 1 B
-X MOD_DEF(0)/MOD_ABS 6 -500 100 100 R 50 30 1 1 P
-X RS/RS0 7 -500 -100 100 R 50 50 1 1 I
+X SDA 4 -500 300 100 R 50 50 1 1 B
+X SCL 5 -500 200 100 R 50 50 1 1 B
+X MOD_ABS 6 -500 100 100 R 50 50 1 1 P
+X RS0 7 -500 -100 100 R 50 50 1 1 I
 X RX_LOS 8 500 400 100 L 50 50 1 1 C
-X VeeR/RS1 9 -500 -200 100 R 50 50 1 1 I
+X RS1 9 -500 -200 100 R 50 50 1 1 I
+X CAGE CAGE -200 -700 100 U 20 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# SFP_CONNECTOR
+#
+DEF SFP_CONNECTOR P 0 20 Y Y 1 F N
+F0 "P" -350 650 50 H V C CNN
+F1 "SFP_CONNECTOR" 450 650 50 H V C CNN
+F2 "Connector:Connector_SFP_and_Cage.kicad_mod" 0 -850 50 H I C CNN
+F3 "" -450 650 50 H I C CNN
+$FPLIST
+ SFP*
+$ENDFPLIST
+DRAW
+T 0 -50 0 50 0 0 0 SFP Normal 0 C C
+S -400 600 400 -600 0 0 10 f
+X VeeT 1 -100 -700 100 U 50 50 1 1 W
+X VeeR 10 0 -700 100 U 50 50 1 1 W
+X VeeR 11 0 -700 100 U 50 50 1 1 P N
+X RD- 12 500 100 100 L 50 50 1 1 O
+X RD+ 13 500 200 100 L 50 50 1 1 O
+X VeeR 14 0 -700 100 U 50 50 1 1 P N
+X VccR 15 0 700 100 D 50 50 1 1 W
+X VccT 16 -100 700 100 D 50 50 1 1 W
+X VeeT 17 -100 -700 100 U 50 50 1 1 P N
+X TD+ 18 500 -100 100 L 50 50 1 1 I
+X TD- 19 500 -200 100 L 50 50 1 1 I
+X TX_FAULT 2 500 -400 100 L 50 50 1 1 C
+X VeeT 20 -100 -700 100 U 50 50 1 1 P N
+X TX_DISABLE 3 -500 -200 100 R 50 50 1 1 I
+X MOD_DEF2 4 -500 300 100 R 50 50 1 1 B
+X MOD_DEF1 5 -500 200 100 R 50 50 1 1 B
+X MOD_DEF0 6 -500 100 100 R 50 50 1 1 P
+X RATE_SELECT 7 -500 -100 100 R 50 50 1 1 I
+X RX_LOS 8 500 400 100 L 50 50 1 1 C
+X VeeR 9 0 -700 100 U 50 50 1 1 P N
 X CAGE CAGE -200 -700 100 U 20 50 1 1 W
 ENDDRAW
 ENDDEF

From c477027dfa4da9b93812c49644b286b8b5b96342 Mon Sep 17 00:00:00 2001
From: Anton Lysak <antonlysak@gmail.com>
Date: Wed, 13 Feb 2019 00:19:22 +0600
Subject: [PATCH 022/201] Adding ICE40HX1K-TQ144

---
 FPGA_Lattice.dcm |   6 ++
 FPGA_Lattice.lib | 163 +++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 169 insertions(+)

diff --git a/FPGA_Lattice.dcm b/FPGA_Lattice.dcm
index e96a77c97c..328e498400 100644
--- a/FPGA_Lattice.dcm
+++ b/FPGA_Lattice.dcm
@@ -1,5 +1,11 @@
 EESchema-DOCLIB  Version 2.0
 #
+$CMP ICE40HX1K-TQ144
+D iCE40 HX FPGA, 1280 LUTs, 1.2V, TQFP-144
+K FPGA programmable logic
+F http://www.latticesemi.com/Products/FPGAandCPLD/iCE40
+$ENDCMP
+#
 $CMP ICE40HX8K-BG121
 D iCE40 HX FPGA, 7680 LUTs, 1.2V, BGA-121
 K FPGA programmable logic
diff --git a/FPGA_Lattice.lib b/FPGA_Lattice.lib
index 49f78a655e..4978b7de14 100644
--- a/FPGA_Lattice.lib
+++ b/FPGA_Lattice.lib
@@ -1,6 +1,169 @@
 EESchema-LIBRARY Version 2.4
 #encoding utf-8
 #
+# ICE40HX1K-TQ144
+#
+DEF ICE40HX1K-TQ144 U 0 20 Y Y 5 L N
+F0 "U" 100 1750 50 H V C CNN
+F1 "ICE40HX1K-TQ144" 400 1650 50 H V C CNN
+F2 "Package_QFP:TQFP-144_20x20mm_P0.5mm" 0 -1750 50 H I C CNN
+F3 "" -850 1200 50 H I C CNN
+$FPLIST
+ TQFP*20x20mm*
+$ENDFPLIST
+DRAW
+S -350 1350 350 -1350 1 1 10 f
+S -350 1350 350 -1600 2 1 10 f
+S -450 1250 450 -1250 3 1 10 f
+S -350 1450 350 -1450 4 1 10 f
+S -450 550 450 -550 5 1 10 f
+X IOT_73 112 -500 1000 150 R 50 50 1 1 B
+X IOT_74 113 -500 900 150 R 50 50 1 1 B
+X IOT_75 114 -500 800 150 R 50 50 1 1 B
+X IOT_76 115 -500 700 150 R 50 50 1 1 B
+X IOT_77 116 -500 600 150 R 50 50 1 1 B
+X IOT_78 117 -500 500 150 R 50 50 1 1 B
+X IOT_79 118 -500 400 150 R 50 50 1 1 B
+X IOT_80 119 -500 300 150 R 50 50 1 1 B
+X IOT_81 120 -500 200 150 R 50 50 1 1 B
+X IOT_82 121 -500 100 150 R 50 50 1 1 B
+X IOT_83 122 -500 0 150 R 50 50 1 1 B
+X VCCIO_0 123 0 1500 150 D 50 50 1 1 W
+X IOT_84_GBIN1 128 -500 -100 150 R 50 50 1 1 B
+X IOT_85_GBIN0 129 -500 -200 150 R 50 50 1 1 B
+X VCCIO_0 133 0 1500 150 D 50 50 1 1 P N
+X IOT_87 134 -500 -300 150 R 50 50 1 1 B
+X IOT_88 135 -500 -400 150 R 50 50 1 1 B
+X IOT_89 136 -500 -500 150 R 50 50 1 1 B
+X IOT_90 137 -500 -600 150 R 50 50 1 1 B
+X IOT_91 138 -500 -700 150 R 50 50 1 1 B
+X IOT_92 139 -500 -800 150 R 50 50 1 1 B
+X IOT_93 141 -500 -900 150 R 50 50 1 1 B
+X IOT_94 142 -500 -1000 150 R 50 50 1 1 B
+X IOT_95 143 -500 -1100 150 R 50 50 1 1 B
+X IOT_96 144 -500 -1200 150 R 50 50 1 1 B
+X NC 15 350 400 150 L 50 50 1 1 N N
+X NC 16 350 300 150 L 50 50 1 1 N N
+X NC 17 350 200 150 L 50 50 1 1 N N
+X NC 18 350 100 150 L 50 50 1 1 N N
+X NC 77 350 0 150 L 50 50 1 1 N N
+X VCCIO_1 100 0 1500 150 D 50 50 2 1 P N
+X IOR_67 101 -500 -1000 150 R 50 50 2 1 B
+X IOR_68 102 -500 -1100 150 R 50 50 2 1 B
+X IOR_69 104 -500 -1200 150 R 50 50 2 1 B
+X IOR_70 105 -500 -1300 150 R 50 50 2 1 B
+X IOR_71 106 -500 -1400 150 R 50 50 2 1 B
+X IOR_72 107 -500 -1500 150 R 50 50 2 1 B
+X NC 40 350 400 150 L 50 50 2 1 N N
+X NC 53 350 300 150 L 50 50 2 1 N N
+X NC 54 350 200 150 L 50 50 2 1 N N
+X NC 55 350 100 150 L 50 50 2 1 N N
+X IOR_48 73 -500 900 150 R 50 50 2 1 B
+X IOR_49 74 -500 800 150 R 50 50 2 1 B
+X IOR_50 75 -500 700 150 R 50 50 2 1 B
+X IOR_51 76 -500 600 150 R 50 50 2 1 B
+X IOR_52 78 -500 500 150 R 50 50 2 1 B
+X IOR_53 79 -500 400 150 R 50 50 2 1 B
+X IOR_54 80 -500 300 150 R 50 50 2 1 B
+X IOR_55 81 -500 200 150 R 50 50 2 1 B
+X NC 82 350 0 150 L 50 50 2 1 N N
+X IOR_56 87 -500 100 150 R 50 50 2 1 B
+X IOR_57 88 -500 0 150 R 50 50 2 1 B
+X VCCIO_1 89 0 1500 150 D 50 50 2 1 W
+X IOR_58 90 -500 -100 150 R 50 50 2 1 B
+X IOR_59 91 -500 -200 150 R 50 50 2 1 B
+X IOR_60_GBIN3 93 -500 -300 150 R 50 50 2 1 B
+X IOR_61_GBIN2 94 -500 -400 150 R 50 50 2 1 B
+X IOR_62 95 -500 -500 150 R 50 50 2 1 B
+X IOR_63 96 -500 -600 150 R 50 50 2 1 B
+X IOR_64 97 -500 -700 150 R 50 50 2 1 B
+X IOR_65 98 -500 -800 150 R 50 50 2 1 B
+X IOR_66 99 -500 -900 150 R 50 50 2 1 B
+X NC 110 450 100 150 L 50 50 3 1 N N
+X NC 124 450 0 150 L 50 50 3 1 N N
+X IOB_24 37 -600 800 150 R 50 50 3 1 B
+X IOB_25 38 -600 700 150 R 50 50 3 1 B
+X IOB_26 39 -600 600 150 R 50 50 3 1 B
+X IOB_27 41 -600 500 150 R 50 50 3 1 B
+X IOB_28 42 -600 400 150 R 50 50 3 1 B
+X IOB_29 43 -600 300 150 R 50 50 3 1 B
+X IOB_30 44 -600 200 150 R 50 50 3 1 B
+X IOB_31 45 -600 100 150 R 50 50 3 1 B
+X VCCIO_2 46 0 1400 150 D 50 50 3 1 W
+X IOB_32 47 -600 0 150 R 50 50 3 1 B
+X IOB_33 48 -600 -100 150 R 50 50 3 1 B
+X IOB_35_GBIN5 49 -600 -200 150 R 50 50 3 1 B
+X IOB_36_GBIN4 50 -600 -300 150 R 50 50 3 1 B
+X IOB_34 52 -600 -400 150 R 50 50 3 1 B
+X IOB_37 56 -600 -500 150 R 50 50 3 1 B
+X VCCIO_2 57 0 1400 150 D 50 50 3 1 P N
+X IOB_38 58 -600 -600 150 R 50 50 3 1 B
+X IOB_39 60 -600 -700 150 R 50 50 3 1 B
+X IOB_40 61 -600 -800 150 R 50 50 3 1 B
+X IOB_41 62 -600 -900 150 R 50 50 3 1 B
+X IOB_42_CBSEL0 63 -600 -1000 150 R 50 50 3 1 B
+X IOB_43_CBSEL1 64 -600 -1100 150 R 50 50 3 1 B
+X CDONE 65 600 1100 150 L 50 50 3 1 C
+X ~CRESET_B 66 -600 1100 150 R 50 50 3 1 I
+X NC 83 450 400 150 L 50 50 3 1 N N
+X NC 84 450 300 150 L 50 50 3 1 N N
+X NC 85 450 200 150 L 50 50 3 1 N N
+X IOL_1A 1 -500 1000 150 R 50 50 4 1 B
+X IOL_4B 10 -500 300 150 R 50 50 4 1 B
+X IOL_5A 11 -500 200 150 R 50 50 4 1 B
+X IOL_5B 12 -500 100 150 R 50 50 4 1 B
+X NC 125 350 400 150 L 50 50 4 1 N N
+X NC 126 350 300 150 L 50 50 4 1 N N
+X NC 127 350 200 150 L 50 50 4 1 N N
+X NC 130 350 100 150 L 50 50 4 1 N N
+X NC 131 350 0 150 L 50 50 4 1 N N
+X IOL_6A 19 -500 0 150 R 50 50 4 1 B
+X IOL_1B 2 -500 900 150 R 50 50 4 1 B
+X IOL_6B_GBIN7 20 -500 -100 150 R 50 50 4 1 B
+X IOL_7A_GBIN6 21 -500 -200 150 R 50 50 4 1 B
+X IOL_7B 22 -500 -300 150 R 50 50 4 1 B
+X IOL_8A 23 -500 -400 150 R 50 50 4 1 B
+X IOL_8B 24 -500 -500 150 R 50 50 4 1 B
+X IOL_9A 25 -500 -600 150 R 50 50 4 1 B
+X IOL_9B 26 -500 -700 150 R 50 50 4 1 B
+X IOL_10A 28 -500 -800 150 R 50 50 4 1 B
+X IOL_10B 29 -500 -900 150 R 50 50 4 1 B
+X IOL_2A 3 -500 800 150 R 50 50 4 1 B
+X VCCIO_3 30 0 1600 150 D 50 50 4 1 P N
+X IOL_11A 31 -500 -1000 150 R 50 50 4 1 B
+X IOL_11B 32 -500 -1100 150 R 50 50 4 1 B
+X IOL_12A 33 -500 -1200 150 R 50 50 4 1 B
+X IOL_12B 34 -500 -1300 150 R 50 50 4 1 B
+X IOL_2B 4 -500 700 150 R 50 50 4 1 B
+X VCCIO_3 6 0 1600 150 D 50 50 4 1 W
+X IOL_3A 7 -500 600 150 R 50 50 4 1 B
+X IOL_3B 8 -500 500 150 R 50 50 4 1 B
+X IOL_4A 9 -500 400 150 R 50 50 4 1 B
+X GND 103 -300 -700 150 U 50 50 5 1 P N
+X VPP_2V5 108 0 700 150 D 50 50 5 1 W
+X VPP_FAST 109 -100 700 150 D 50 50 5 1 W
+X VCC 111 100 700 150 D 50 50 5 1 P N
+X GND 13 -300 -700 150 U 50 50 5 1 P N
+X GND 132 -300 -700 150 U 50 50 5 1 P N
+X GND 14 -300 -700 150 U 50 50 5 1 P N
+X GND 140 -300 -700 150 U 50 50 5 1 P N
+X VCC 27 100 700 150 D 50 50 5 1 W
+X VCCPLL 35 600 300 150 L 50 50 5 1 W
+X GNDPLL 36 600 0 150 L 50 50 5 1 W
+X GND 5 -300 -700 150 U 50 50 5 1 W
+X VCC 51 100 700 150 D 50 50 5 1 P N
+X GND 59 -300 -700 150 U 50 50 5 1 P N
+X IOB_44_SDO 67 -600 100 150 R 50 50 5 1 B
+X IOB_45_SDI 68 -600 0 150 R 50 50 5 1 B
+X GND 69 -300 -700 150 U 50 50 5 1 P N
+X IOB_46_SCK 70 -600 -100 150 R 50 50 5 1 B
+X IOB_47_SS 71 -600 -200 150 R 50 50 5 1 B
+X VCC_SPI 72 -300 700 150 D 50 50 5 1 W
+X GND 86 -300 -700 150 U 50 50 5 1 P N
+X VCC 92 100 700 150 D 50 50 5 1 P N
+ENDDRAW
+ENDDEF
+#
 # ICE40HX8K-BG121
 #
 DEF ICE40HX8K-BG121 U 0 20 Y Y 5 L N

From 0d8253e47f2a8cba0f499adb84870fa2cff0a6f4 Mon Sep 17 00:00:00 2001
From: Anton Lysak <antonlysak@gmail.com>
Date: Wed, 13 Feb 2019 00:51:22 +0600
Subject: [PATCH 023/201] Fix pin length and placement

---
 FPGA_Lattice.lib | 304 +++++++++++++++++++++++------------------------
 1 file changed, 152 insertions(+), 152 deletions(-)

diff --git a/FPGA_Lattice.lib b/FPGA_Lattice.lib
index 4978b7de14..da9622f940 100644
--- a/FPGA_Lattice.lib
+++ b/FPGA_Lattice.lib
@@ -4,163 +4,163 @@ EESchema-LIBRARY Version 2.4
 # ICE40HX1K-TQ144
 #
 DEF ICE40HX1K-TQ144 U 0 20 Y Y 5 L N
-F0 "U" 100 1750 50 H V C CNN
-F1 "ICE40HX1K-TQ144" 400 1650 50 H V C CNN
+F0 "U" 200 1750 50 H V C CNN
+F1 "ICE40HX1K-TQ144" 500 1650 50 H V C CNN
 F2 "Package_QFP:TQFP-144_20x20mm_P0.5mm" 0 -1750 50 H I C CNN
-F3 "" -850 1200 50 H I C CNN
+F3 "" -850 1400 50 H I C CNN
 $FPLIST
  TQFP*20x20mm*
 $ENDFPLIST
 DRAW
-S -350 1350 350 -1350 1 1 10 f
-S -350 1350 350 -1600 2 1 10 f
-S -450 1250 450 -1250 3 1 10 f
-S -350 1450 350 -1450 4 1 10 f
-S -450 550 450 -550 5 1 10 f
-X IOT_73 112 -500 1000 150 R 50 50 1 1 B
-X IOT_74 113 -500 900 150 R 50 50 1 1 B
-X IOT_75 114 -500 800 150 R 50 50 1 1 B
-X IOT_76 115 -500 700 150 R 50 50 1 1 B
-X IOT_77 116 -500 600 150 R 50 50 1 1 B
-X IOT_78 117 -500 500 150 R 50 50 1 1 B
-X IOT_79 118 -500 400 150 R 50 50 1 1 B
-X IOT_80 119 -500 300 150 R 50 50 1 1 B
-X IOT_81 120 -500 200 150 R 50 50 1 1 B
-X IOT_82 121 -500 100 150 R 50 50 1 1 B
-X IOT_83 122 -500 0 150 R 50 50 1 1 B
-X VCCIO_0 123 0 1500 150 D 50 50 1 1 W
-X IOT_84_GBIN1 128 -500 -100 150 R 50 50 1 1 B
-X IOT_85_GBIN0 129 -500 -200 150 R 50 50 1 1 B
-X VCCIO_0 133 0 1500 150 D 50 50 1 1 P N
-X IOT_87 134 -500 -300 150 R 50 50 1 1 B
-X IOT_88 135 -500 -400 150 R 50 50 1 1 B
-X IOT_89 136 -500 -500 150 R 50 50 1 1 B
-X IOT_90 137 -500 -600 150 R 50 50 1 1 B
-X IOT_91 138 -500 -700 150 R 50 50 1 1 B
-X IOT_92 139 -500 -800 150 R 50 50 1 1 B
-X IOT_93 141 -500 -900 150 R 50 50 1 1 B
-X IOT_94 142 -500 -1000 150 R 50 50 1 1 B
-X IOT_95 143 -500 -1100 150 R 50 50 1 1 B
-X IOT_96 144 -500 -1200 150 R 50 50 1 1 B
-X NC 15 350 400 150 L 50 50 1 1 N N
-X NC 16 350 300 150 L 50 50 1 1 N N
-X NC 17 350 200 150 L 50 50 1 1 N N
-X NC 18 350 100 150 L 50 50 1 1 N N
-X NC 77 350 0 150 L 50 50 1 1 N N
-X VCCIO_1 100 0 1500 150 D 50 50 2 1 P N
-X IOR_67 101 -500 -1000 150 R 50 50 2 1 B
-X IOR_68 102 -500 -1100 150 R 50 50 2 1 B
-X IOR_69 104 -500 -1200 150 R 50 50 2 1 B
-X IOR_70 105 -500 -1300 150 R 50 50 2 1 B
-X IOR_71 106 -500 -1400 150 R 50 50 2 1 B
-X IOR_72 107 -500 -1500 150 R 50 50 2 1 B
-X NC 40 350 400 150 L 50 50 2 1 N N
-X NC 53 350 300 150 L 50 50 2 1 N N
-X NC 54 350 200 150 L 50 50 2 1 N N
-X NC 55 350 100 150 L 50 50 2 1 N N
-X IOR_48 73 -500 900 150 R 50 50 2 1 B
-X IOR_49 74 -500 800 150 R 50 50 2 1 B
-X IOR_50 75 -500 700 150 R 50 50 2 1 B
-X IOR_51 76 -500 600 150 R 50 50 2 1 B
-X IOR_52 78 -500 500 150 R 50 50 2 1 B
-X IOR_53 79 -500 400 150 R 50 50 2 1 B
-X IOR_54 80 -500 300 150 R 50 50 2 1 B
-X IOR_55 81 -500 200 150 R 50 50 2 1 B
-X NC 82 350 0 150 L 50 50 2 1 N N
-X IOR_56 87 -500 100 150 R 50 50 2 1 B
-X IOR_57 88 -500 0 150 R 50 50 2 1 B
-X VCCIO_1 89 0 1500 150 D 50 50 2 1 W
-X IOR_58 90 -500 -100 150 R 50 50 2 1 B
-X IOR_59 91 -500 -200 150 R 50 50 2 1 B
-X IOR_60_GBIN3 93 -500 -300 150 R 50 50 2 1 B
-X IOR_61_GBIN2 94 -500 -400 150 R 50 50 2 1 B
-X IOR_62 95 -500 -500 150 R 50 50 2 1 B
-X IOR_63 96 -500 -600 150 R 50 50 2 1 B
-X IOR_64 97 -500 -700 150 R 50 50 2 1 B
-X IOR_65 98 -500 -800 150 R 50 50 2 1 B
-X IOR_66 99 -500 -900 150 R 50 50 2 1 B
-X NC 110 450 100 150 L 50 50 3 1 N N
-X NC 124 450 0 150 L 50 50 3 1 N N
-X IOB_24 37 -600 800 150 R 50 50 3 1 B
-X IOB_25 38 -600 700 150 R 50 50 3 1 B
-X IOB_26 39 -600 600 150 R 50 50 3 1 B
-X IOB_27 41 -600 500 150 R 50 50 3 1 B
-X IOB_28 42 -600 400 150 R 50 50 3 1 B
-X IOB_29 43 -600 300 150 R 50 50 3 1 B
-X IOB_30 44 -600 200 150 R 50 50 3 1 B
-X IOB_31 45 -600 100 150 R 50 50 3 1 B
-X VCCIO_2 46 0 1400 150 D 50 50 3 1 W
-X IOB_32 47 -600 0 150 R 50 50 3 1 B
-X IOB_33 48 -600 -100 150 R 50 50 3 1 B
-X IOB_35_GBIN5 49 -600 -200 150 R 50 50 3 1 B
-X IOB_36_GBIN4 50 -600 -300 150 R 50 50 3 1 B
-X IOB_34 52 -600 -400 150 R 50 50 3 1 B
-X IOB_37 56 -600 -500 150 R 50 50 3 1 B
-X VCCIO_2 57 0 1400 150 D 50 50 3 1 P N
-X IOB_38 58 -600 -600 150 R 50 50 3 1 B
-X IOB_39 60 -600 -700 150 R 50 50 3 1 B
-X IOB_40 61 -600 -800 150 R 50 50 3 1 B
-X IOB_41 62 -600 -900 150 R 50 50 3 1 B
-X IOB_42_CBSEL0 63 -600 -1000 150 R 50 50 3 1 B
-X IOB_43_CBSEL1 64 -600 -1100 150 R 50 50 3 1 B
-X CDONE 65 600 1100 150 L 50 50 3 1 C
-X ~CRESET_B 66 -600 1100 150 R 50 50 3 1 I
-X NC 83 450 400 150 L 50 50 3 1 N N
-X NC 84 450 300 150 L 50 50 3 1 N N
-X NC 85 450 200 150 L 50 50 3 1 N N
-X IOL_1A 1 -500 1000 150 R 50 50 4 1 B
-X IOL_4B 10 -500 300 150 R 50 50 4 1 B
-X IOL_5A 11 -500 200 150 R 50 50 4 1 B
-X IOL_5B 12 -500 100 150 R 50 50 4 1 B
-X NC 125 350 400 150 L 50 50 4 1 N N
-X NC 126 350 300 150 L 50 50 4 1 N N
-X NC 127 350 200 150 L 50 50 4 1 N N
-X NC 130 350 100 150 L 50 50 4 1 N N
-X NC 131 350 0 150 L 50 50 4 1 N N
-X IOL_6A 19 -500 0 150 R 50 50 4 1 B
-X IOL_1B 2 -500 900 150 R 50 50 4 1 B
-X IOL_6B_GBIN7 20 -500 -100 150 R 50 50 4 1 B
-X IOL_7A_GBIN6 21 -500 -200 150 R 50 50 4 1 B
-X IOL_7B 22 -500 -300 150 R 50 50 4 1 B
-X IOL_8A 23 -500 -400 150 R 50 50 4 1 B
-X IOL_8B 24 -500 -500 150 R 50 50 4 1 B
-X IOL_9A 25 -500 -600 150 R 50 50 4 1 B
-X IOL_9B 26 -500 -700 150 R 50 50 4 1 B
-X IOL_10A 28 -500 -800 150 R 50 50 4 1 B
-X IOL_10B 29 -500 -900 150 R 50 50 4 1 B
-X IOL_2A 3 -500 800 150 R 50 50 4 1 B
-X VCCIO_3 30 0 1600 150 D 50 50 4 1 P N
-X IOL_11A 31 -500 -1000 150 R 50 50 4 1 B
-X IOL_11B 32 -500 -1100 150 R 50 50 4 1 B
-X IOL_12A 33 -500 -1200 150 R 50 50 4 1 B
-X IOL_12B 34 -500 -1300 150 R 50 50 4 1 B
-X IOL_2B 4 -500 700 150 R 50 50 4 1 B
-X VCCIO_3 6 0 1600 150 D 50 50 4 1 W
-X IOL_3A 7 -500 600 150 R 50 50 4 1 B
-X IOL_3B 8 -500 500 150 R 50 50 4 1 B
-X IOL_4A 9 -500 400 150 R 50 50 4 1 B
-X GND 103 -300 -700 150 U 50 50 5 1 P N
-X VPP_2V5 108 0 700 150 D 50 50 5 1 W
-X VPP_FAST 109 -100 700 150 D 50 50 5 1 W
-X VCC 111 100 700 150 D 50 50 5 1 P N
-X GND 13 -300 -700 150 U 50 50 5 1 P N
-X GND 132 -300 -700 150 U 50 50 5 1 P N
-X GND 14 -300 -700 150 U 50 50 5 1 P N
-X GND 140 -300 -700 150 U 50 50 5 1 P N
-X VCC 27 100 700 150 D 50 50 5 1 W
-X VCCPLL 35 600 300 150 L 50 50 5 1 W
-X GNDPLL 36 600 0 150 L 50 50 5 1 W
-X GND 5 -300 -700 150 U 50 50 5 1 W
-X VCC 51 100 700 150 D 50 50 5 1 P N
-X GND 59 -300 -700 150 U 50 50 5 1 P N
-X IOB_44_SDO 67 -600 100 150 R 50 50 5 1 B
-X IOB_45_SDI 68 -600 0 150 R 50 50 5 1 B
-X GND 69 -300 -700 150 U 50 50 5 1 P N
-X IOB_46_SCK 70 -600 -100 150 R 50 50 5 1 B
-X IOB_47_SS 71 -600 -200 150 R 50 50 5 1 B
-X VCC_SPI 72 -300 700 150 D 50 50 5 1 W
-X GND 86 -300 -700 150 U 50 50 5 1 P N
-X VCC 92 100 700 150 D 50 50 5 1 P N
+S -300 1300 300 -1300 1 1 10 f
+S -300 1500 300 -1500 2 1 10 f
+S -400 1200 400 -1200 3 1 10 f
+S -300 1400 300 -1400 4 1 10 f
+S -400 500 400 -500 5 1 10 f
+X IOT_73 112 -500 1000 200 R 50 50 1 1 B
+X IOT_74 113 -500 900 200 R 50 50 1 1 B
+X IOT_75 114 -500 800 200 R 50 50 1 1 B
+X IOT_76 115 -500 700 200 R 50 50 1 1 B
+X IOT_77 116 -500 600 200 R 50 50 1 1 B
+X IOT_78 117 -500 500 200 R 50 50 1 1 B
+X IOT_79 118 -500 400 200 R 50 50 1 1 B
+X IOT_80 119 -500 300 200 R 50 50 1 1 B
+X IOT_81 120 -500 200 200 R 50 50 1 1 B
+X IOT_82 121 -500 100 200 R 50 50 1 1 B
+X IOT_83 122 -500 0 200 R 50 50 1 1 B
+X VCCIO_0 123 100 1500 200 D 50 50 1 1 W
+X IOT_84_GBIN1 128 -500 -100 200 R 50 50 1 1 B
+X IOT_85_GBIN0 129 -500 -200 200 R 50 50 1 1 B
+X VCCIO_0 133 100 1500 200 D 50 50 1 1 P N
+X IOT_87 134 -500 -300 200 R 50 50 1 1 B
+X IOT_88 135 -500 -400 200 R 50 50 1 1 B
+X IOT_89 136 -500 -500 200 R 50 50 1 1 B
+X IOT_90 137 -500 -600 200 R 50 50 1 1 B
+X IOT_91 138 -500 -700 200 R 50 50 1 1 B
+X IOT_92 139 -500 -800 200 R 50 50 1 1 B
+X IOT_93 141 -500 -900 200 R 50 50 1 1 B
+X IOT_94 142 -500 -1000 200 R 50 50 1 1 B
+X IOT_95 143 -500 -1100 200 R 50 50 1 1 B
+X IOT_96 144 -500 -1200 200 R 50 50 1 1 B
+X NC 15 300 400 200 L 50 50 1 1 N N
+X NC 16 300 300 200 L 50 50 1 1 N N
+X NC 17 300 200 200 L 50 50 1 1 N N
+X NC 18 300 100 200 L 50 50 1 1 N N
+X NC 77 300 0 200 L 50 50 1 1 N N
+X VCCIO_1 100 0 1700 200 D 50 50 2 1 P N
+X IOR_67 101 -500 -800 200 R 50 50 2 1 B
+X IOR_68 102 -500 -900 200 R 50 50 2 1 B
+X IOR_69 104 -500 -1000 200 R 50 50 2 1 B
+X IOR_70 105 -500 -1100 200 R 50 50 2 1 B
+X IOR_71 106 -500 -1200 200 R 50 50 2 1 B
+X IOR_72 107 -500 -1300 200 R 50 50 2 1 B
+X NC 40 300 400 200 L 50 50 2 1 N N
+X NC 53 300 300 200 L 50 50 2 1 N N
+X NC 54 300 200 200 L 50 50 2 1 N N
+X NC 55 300 100 200 L 50 50 2 1 N N
+X IOR_48 73 -500 1100 200 R 50 50 2 1 B
+X IOR_49 74 -500 1000 200 R 50 50 2 1 B
+X IOR_50 75 -500 900 200 R 50 50 2 1 B
+X IOR_51 76 -500 800 200 R 50 50 2 1 B
+X IOR_52 78 -500 700 200 R 50 50 2 1 B
+X IOR_53 79 -500 600 200 R 50 50 2 1 B
+X IOR_54 80 -500 500 200 R 50 50 2 1 B
+X IOR_55 81 -500 400 200 R 50 50 2 1 B
+X NC 82 300 0 200 L 50 50 2 1 N N
+X IOR_56 87 -500 300 200 R 50 50 2 1 B
+X IOR_57 88 -500 200 200 R 50 50 2 1 B
+X VCCIO_1 89 0 1700 200 D 50 50 2 1 W
+X IOR_58 90 -500 100 200 R 50 50 2 1 B
+X IOR_59 91 -500 0 200 R 50 50 2 1 B
+X IOR_60_GBIN3 93 -500 -100 200 R 50 50 2 1 B
+X IOR_61_GBIN2 94 -500 -200 200 R 50 50 2 1 B
+X IOR_62 95 -500 -300 200 R 50 50 2 1 B
+X IOR_63 96 -500 -400 200 R 50 50 2 1 B
+X IOR_64 97 -500 -500 200 R 50 50 2 1 B
+X IOR_65 98 -500 -600 200 R 50 50 2 1 B
+X IOR_66 99 -500 -700 200 R 50 50 2 1 B
+X NC 110 400 100 200 L 50 50 3 1 N N
+X NC 124 400 0 200 L 50 50 3 1 N N
+X IOB_24 37 -600 800 200 R 50 50 3 1 B
+X IOB_25 38 -600 700 200 R 50 50 3 1 B
+X IOB_26 39 -600 600 200 R 50 50 3 1 B
+X IOB_27 41 -600 500 200 R 50 50 3 1 B
+X IOB_28 42 -600 400 200 R 50 50 3 1 B
+X IOB_29 43 -600 300 200 R 50 50 3 1 B
+X IOB_30 44 -600 200 200 R 50 50 3 1 B
+X IOB_31 45 -600 100 200 R 50 50 3 1 B
+X VCCIO_2 46 100 1400 200 D 50 50 3 1 W
+X IOB_32 47 -600 0 200 R 50 50 3 1 B
+X IOB_33 48 -600 -100 200 R 50 50 3 1 B
+X IOB_35_GBIN5 49 -600 -200 200 R 50 50 3 1 B
+X IOB_36_GBIN4 50 -600 -300 200 R 50 50 3 1 B
+X IOB_34 52 -600 -400 200 R 50 50 3 1 B
+X IOB_37 56 -600 -500 200 R 50 50 3 1 B
+X VCCIO_2 57 100 1400 200 D 50 50 3 1 P N
+X IOB_38 58 -600 -600 200 R 50 50 3 1 B
+X IOB_39 60 -600 -700 200 R 50 50 3 1 B
+X IOB_40 61 -600 -800 200 R 50 50 3 1 B
+X IOB_41 62 -600 -900 200 R 50 50 3 1 B
+X IOB_42_CBSEL0 63 -600 -1000 200 R 50 50 3 1 B
+X IOB_43_CBSEL1 64 -600 -1100 200 R 50 50 3 1 B
+X CDONE 65 600 800 200 L 50 50 3 1 C
+X ~CRESET_B 66 -600 1100 200 R 50 50 3 1 I
+X NC 83 400 400 200 L 50 50 3 1 N N
+X NC 84 400 300 200 L 50 50 3 1 N N
+X NC 85 400 200 200 L 50 50 3 1 N N
+X IOL_1A 1 -500 1000 200 R 50 50 4 1 B
+X IOL_4B 10 -500 300 200 R 50 50 4 1 B
+X IOL_5A 11 -500 200 200 R 50 50 4 1 B
+X IOL_5B 12 -500 100 200 R 50 50 4 1 B
+X NC 125 300 400 200 L 50 50 4 1 N N
+X NC 126 300 300 200 L 50 50 4 1 N N
+X NC 127 300 200 200 L 50 50 4 1 N N
+X NC 130 300 100 200 L 50 50 4 1 N N
+X NC 131 300 0 200 L 50 50 4 1 N N
+X IOL_6A 19 -500 0 200 R 50 50 4 1 B
+X IOL_1B 2 -500 900 200 R 50 50 4 1 B
+X IOL_6B_GBIN7 20 -500 -100 200 R 50 50 4 1 B
+X IOL_7A_GBIN6 21 -500 -200 200 R 50 50 4 1 B
+X IOL_7B 22 -500 -300 200 R 50 50 4 1 B
+X IOL_8A 23 -500 -400 200 R 50 50 4 1 B
+X IOL_8B 24 -500 -500 200 R 50 50 4 1 B
+X IOL_9A 25 -500 -600 200 R 50 50 4 1 B
+X IOL_9B 26 -500 -700 200 R 50 50 4 1 B
+X IOL_10A 28 -500 -800 200 R 50 50 4 1 B
+X IOL_10B 29 -500 -900 200 R 50 50 4 1 B
+X IOL_2A 3 -500 800 200 R 50 50 4 1 B
+X VCCIO_3 30 0 1600 200 D 50 50 4 1 P N
+X IOL_11A 31 -500 -1000 200 R 50 50 4 1 B
+X IOL_11B 32 -500 -1100 200 R 50 50 4 1 B
+X IOL_12A 33 -500 -1200 200 R 50 50 4 1 B
+X IOL_12B 34 -500 -1300 200 R 50 50 4 1 B
+X IOL_2B 4 -500 700 200 R 50 50 4 1 B
+X VCCIO_3 6 0 1600 200 D 50 50 4 1 W
+X IOL_3A 7 -500 600 200 R 50 50 4 1 B
+X IOL_3B 8 -500 500 200 R 50 50 4 1 B
+X IOL_4A 9 -500 400 200 R 50 50 4 1 B
+X GND 103 200 -700 200 U 50 50 5 1 P N
+X VPP_2V5 108 0 700 200 D 50 50 5 1 W
+X VPP_FAST 109 -100 700 200 D 50 50 5 1 W
+X VCC 111 100 700 200 D 50 50 5 1 P N
+X GND 13 200 -700 200 U 50 50 5 1 P N
+X GND 132 200 -700 200 U 50 50 5 1 P N
+X GND 14 200 -700 200 U 50 50 5 1 P N
+X GND 140 200 -700 200 U 50 50 5 1 P N
+X VCC 27 100 700 200 D 50 50 5 1 W
+X VCCPLL 35 600 200 200 L 50 50 5 1 W
+X GNDPLL 36 600 -100 200 L 50 50 5 1 W
+X GND 5 200 -700 200 U 50 50 5 1 W
+X VCC 51 100 700 200 D 50 50 5 1 P N
+X GND 59 200 -700 200 U 50 50 5 1 P N
+X IOB_44_SDO 67 -600 0 200 R 50 50 5 1 B
+X IOB_45_SDI 68 -600 -100 200 R 50 50 5 1 B
+X GND 69 200 -700 200 U 50 50 5 1 P N
+X IOB_46_SCK 70 -600 -200 200 R 50 50 5 1 B
+X IOB_47_SS 71 -600 -300 200 R 50 50 5 1 B
+X VCC_SPI 72 -300 700 200 D 50 50 5 1 W
+X GND 86 200 -700 200 U 50 50 5 1 P N
+X VCC 92 100 700 200 D 50 50 5 1 P N
 ENDDRAW
 ENDDEF
 #

From 796151267d47bbe57d8d2d72cccdb97689cdb044 Mon Sep 17 00:00:00 2001
From: "Hendrik v. Raven" <hendrik@consetetur.de>
Date: Sun, 3 Mar 2019 13:28:24 +0100
Subject: [PATCH 024/201] add generic SW_Push_DPDT

---
 Switch.dcm |  6 ++++++
 Switch.lib | 30 ++++++++++++++++++++++++++++++
 2 files changed, 36 insertions(+)

diff --git a/Switch.dcm b/Switch.dcm
index 1e11ae67cb..e2f16e08a9 100644
--- a/Switch.dcm
+++ b/Switch.dcm
@@ -198,6 +198,12 @@ K switch normally-open pushbutton push-button
 F ~
 $ENDCMP
 #
+$CMP SW_Push_DPDT
+D Momentary Switch, dual pole double throw
+K switch dual-pole double-throw spdt ON-ON
+F ~
+$ENDCMP
+#
 $CMP SW_Push_Dual
 D Push button switch, generic, symbol, four pins
 K switch normally-open pushbutton push-button
diff --git a/Switch.lib b/Switch.lib
index 07640ff898..f23f698f33 100644
--- a/Switch.lib
+++ b/Switch.lib
@@ -1021,6 +1021,36 @@ X 2 2 100 -100 0 L 50 50 0 1 P
 ENDDRAW
 ENDDEF
 #
+# SW_Push_DPDT
+#
+DEF SW_Push_DPDT SW 0 0 Y N 1 F N
+F0 "SW" 0 350 50 H V C CNN
+F1 "SW_Push_DPDT" 0 -400 50 H V C CNN
+F2 "" 0 200 50 H I C CNN
+F3 "" 0 200 50 H I C CNN
+DRAW
+C -80 -200 20 0 0 0 N
+C -80 200 20 0 0 0 N
+C 80 -300 20 0 0 0 N
+C 80 100 20 0 0 0 N
+C 80 -100 20 0 1 0 N
+C 80 300 20 0 1 0 N
+P 2 0 1 0 -60 -190 100 -120 N
+P 2 0 1 0 -60 210 100 280 N
+P 2 0 1 0 0 -90 0 -160 N
+P 2 0 1 0 0 -40 0 0 N
+P 2 0 1 0 0 50 0 90 N
+P 2 0 1 0 0 140 0 180 N
+P 2 0 1 0 0 310 0 240 N
+X A 1 200 300 100 L 50 50 1 1 P
+X B 2 -200 200 100 R 50 50 1 1 P
+X C 3 200 100 100 L 50 50 1 1 P
+X A 4 200 -100 100 L 50 50 1 1 P
+X B 5 -200 -200 100 R 50 50 1 1 P
+X C 6 200 -300 100 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
 # SW_Push_Dual
 #
 DEF SW_Push_Dual SW 0 40 Y N 1 F N

From 820dea69ec8c5bdadd6827c11fc34d038b8bccab Mon Sep 17 00:00:00 2001
From: marble <marble@chaoscomputer.club>
Date: Wed, 13 Mar 2019 14:20:33 +0100
Subject: [PATCH 025/201] added symbols for BD48xxx/BD49xxx series Standard
 CMOS Voltage Detector IC

---
 Power_Management.dcm | 48 +++++++++++++++++++++++++++
 Power_Management.lib | 77 ++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 125 insertions(+)

diff --git a/Power_Management.dcm b/Power_Management.dcm
index 146354cb81..4da018d856 100644
--- a/Power_Management.dcm
+++ b/Power_Management.dcm
@@ -180,6 +180,54 @@ K high side switch
 F https://www.infineon.com/dgdl/auir33402s.pdf?fileId=5546d462533600a4015355a88074135c
 $ENDCMP
 #
+$CMP BD48ExxG
+D Standard CMOS Voltage Detector IC, Open Drain Output, SSOP5
+K voltage detector open drain SSOP5
+F https://www.rohm.de/datasheet/BD4830FVE/bd48xxg-e
+$ENDCMP
+#
+$CMP BD48KxxG
+D Standard CMOS Voltage Detector IC, Open Drain Output, SSOP3(1pin GND) 
+K voltage detector open drain SSOP3
+F https://www.rohm.de/datasheet/BD4830FVE/bd48xxg-e
+$ENDCMP
+#
+$CMP BD48LxxG
+D Standard CMOS Voltage Detector IC, Open Drain Output, SSOP3(3pin GND) 
+K voltage detector open drain SSOP3
+F https://www.rohm.de/datasheet/BD4830FVE/bd48xxg-e
+$ENDCMP
+#
+$CMP BD48xxFVE
+D Standard CMOS Voltage Detector IC, Open Drain Output, VSOF5
+K voltage detector open drain VSOF5
+F https://www.rohm.de/datasheet/BD4830FVE/bd48xxg-e
+$ENDCMP
+#
+$CMP BD49ExxG
+D Standard CMOS Voltage Detector IC, CMOS Output, SSOP5
+K voltage detector cmos SSOP5
+F https://www.rohm.de/datasheet/BD4830FVE/bd48xxg-e
+$ENDCMP
+#
+$CMP BD49KxxG
+D Standard CMOS Voltage Detector IC, CMOS Output, SSOP3(1pin GND) 
+K voltage detector cmos SSOP3
+F https://www.rohm.de/datasheet/BD4830FVE/bd48xxg-e
+$ENDCMP
+#
+$CMP BD49LxxG
+D Standard CMOS Voltage Detector IC, CMOS Output, SSOP3(3pin GND) 
+K voltage detector cmos SSOP3
+F https://www.rohm.de/datasheet/BD4830FVE/bd48xxg-e
+$ENDCMP
+#
+$CMP BD49xxFVE
+D Standard CMOS Voltage Detector IC, CMOS Output, VSOF5
+K voltage detector cmos VSOF5
+F https://www.rohm.de/datasheet/BD4830FVE/bd48xxg-e
+$ENDCMP
+#
 $CMP BTN8982TA
 D High Current PN Half Bridge, TO-263-7
 K half bridge for motor drive applications
diff --git a/Power_Management.lib b/Power_Management.lib
index bbce44c333..146be2d650 100644
--- a/Power_Management.lib
+++ b/Power_Management.lib
@@ -310,6 +310,83 @@ X OUT 7 0 -300 100 U 50 50 1 1 P N
 ENDDRAW
 ENDDEF
 #
+# BD48ExxG
+#
+DEF BD48ExxG U 0 40 Y Y 1 F N
+F0 "U" -150 250 50 H V L CNN
+F1 "BD48ExxG" -200 0 50 V V C CNN
+F2 "Package_TO_SOT_SMD:SOT-23-5" 0 -500 50 H I C CNN
+F3 "" 0 -600 50 H I C CNN
+ALIAS BD49ExxG
+$FPLIST
+ *SOT-23*5*
+$ENDFPLIST
+DRAW
+S -150 200 300 -200 1 1 10 f
+X VOUT 1 400 0 100 L 50 50 1 1 O
+X VDD 2 0 300 100 D 50 50 1 1 W
+X GND 3 0 -300 100 U 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# BD48KxxG
+#
+DEF BD48KxxG U 0 40 Y Y 1 F N
+F0 "U" -150 250 50 H V L CNN
+F1 "BD48KxxG" -200 0 50 V V C CNN
+F2 "Package_TO_SOT_SMD:SOT-23" 0 -500 50 H I C CNN
+F3 "" 0 -600 50 H I C CNN
+ALIAS BD49KxxG
+$FPLIST
+ *SOT-23*
+$ENDFPLIST
+DRAW
+S -150 200 300 -200 1 1 10 f
+X GND 1 0 -300 100 U 50 50 1 1 W
+X VOUT 2 400 0 100 L 50 50 1 1 O
+X VDD 3 0 300 100 D 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# BD48LxxG
+#
+DEF BD48LxxG U 0 40 Y Y 1 F N
+F0 "U" -150 250 50 H V L CNN
+F1 "BD48LxxG" -200 0 50 V V C CNN
+F2 "Package_TO_SOT_SMD:SOT-23" 0 -500 50 H I C CNN
+F3 "" 0 -600 50 H I C CNN
+ALIAS BD49LxxG
+$FPLIST
+ *SOT-23*
+$ENDFPLIST
+DRAW
+S -150 200 300 -200 1 1 10 f
+X VOUT 1 400 0 100 L 50 50 1 1 O
+X VDD 2 0 300 100 D 50 50 1 1 W
+X GND 3 0 -300 100 U 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# BD48xxFVE
+#
+DEF BD48xxFVE U 0 40 Y Y 1 F N
+F0 "U" -150 250 50 H V L CNN
+F1 "BD48xxFVE" -200 0 50 V V C CNN
+F2 "Package_TO_SOT_SMD:VSOF5" 0 -500 50 H I C CNN
+F3 "" 0 -600 50 H I C CNN
+ALIAS BD49xxFVE
+$FPLIST
+ *VSOF*5*
+$ENDFPLIST
+DRAW
+S -150 200 300 -200 1 1 10 f
+X VOUT 1 400 0 100 L 50 50 1 1 O
+X GND 2 0 -300 100 U 50 50 1 1 P N
+X GND 4 0 -300 100 U 50 50 1 1 W
+X VDD 5 0 300 100 D 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
 # BTN8982TA
 #
 DEF BTN8982TA Q 0 20 Y Y 1 F N

From 8d9a728d2b8bf85fa19d9b36f744ea5d37a121ba Mon Sep 17 00:00:00 2001
From: Oliver Walters <oliver.henry.walters@gmail.com>
Date: Tue, 19 Mar 2019 15:34:21 +1100
Subject: [PATCH 026/201] Added SN65HVD1050DR CAN transceiver

---
 Interface_CAN_LIN.dcm |  6 ++++++
 Interface_CAN_LIN.lib | 23 +++++++++++++++++++++++
 2 files changed, 29 insertions(+)

diff --git a/Interface_CAN_LIN.dcm b/Interface_CAN_LIN.dcm
index 40d99406e6..f8f0a45365 100644
--- a/Interface_CAN_LIN.dcm
+++ b/Interface_CAN_LIN.dcm
@@ -252,6 +252,12 @@ K BUS CAN
 F http://www.nxp.com/documents/data_sheet/PCA82C251.pdf
 $ENDCMP
 #
+$CMP SN65HVD1050DR
+D CAN Bus Transceiver, EMC optimised, 5.0V, 1Mbps, SOIC
+K can transeiver ti canbus
+F http://www.ti.com/lit/ds/symlink/sn65hvd1050.pdf
+$ENDCMP
+#
 $CMP SN65HVD230
 D CAN Bus Transceivers, 3.3V, 1Mbps, Low-Power capabilities, SOIC
 K can transeiver ti low-power
diff --git a/Interface_CAN_LIN.lib b/Interface_CAN_LIN.lib
index dc94ef6a01..7cad512d44 100644
--- a/Interface_CAN_LIN.lib
+++ b/Interface_CAN_LIN.lib
@@ -925,6 +925,29 @@ X Rsl 8 -400 -100 200 R 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #
+# SN65HVD1050DR
+#
+DEF SN65HVD1050DR U 0 40 Y Y 1 F N
+F0 "U" -100 400 50 H V R CNN
+F1 "SN65HVD1050DR" -100 300 50 H V R CNN
+F2 "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm" 0 -500 50 H I C CNN
+F3 "" -100 400 50 H I C CNN
+$FPLIST
+ SOIC*3.9x4.9mm*P1.27mm*
+$ENDFPLIST
+DRAW
+S -300 200 300 -300 0 1 10 f
+X TXD 1 -400 100 100 R 50 50 1 1 I
+X GND 2 0 -400 100 U 50 50 1 1 W
+X VCC 3 0 300 100 D 50 50 1 1 W
+X RXD 4 -400 0 100 R 50 50 1 1 O
+X Vref 5 -400 -100 100 R 50 50 1 1 O
+X CANL 6 400 -100 100 L 50 50 1 1 B
+X CANH 7 400 0 100 L 50 50 1 1 B
+X S 8 -400 -200 100 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
 # SN65HVD230
 #
 DEF SN65HVD230 U 0 40 Y Y 1 F N

From 1f2c046979ef72001b8eabec375635fa45ec486b Mon Sep 17 00:00:00 2001
From: Oliver Walters <oliver.henry.walters@gmail.com>
Date: Tue, 19 Mar 2019 15:35:29 +1100
Subject: [PATCH 027/201] KLC fixes

---
 Interface_CAN_LIN.lib | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Interface_CAN_LIN.lib b/Interface_CAN_LIN.lib
index 7cad512d44..f4574a0244 100644
--- a/Interface_CAN_LIN.lib
+++ b/Interface_CAN_LIN.lib
@@ -927,7 +927,7 @@ ENDDEF
 #
 # SN65HVD1050DR
 #
-DEF SN65HVD1050DR U 0 40 Y Y 1 F N
+DEF SN65HVD1050DR U 0 20 Y Y 1 F N
 F0 "U" -100 400 50 H V R CNN
 F1 "SN65HVD1050DR" -100 300 50 H V R CNN
 F2 "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm" 0 -500 50 H I C CNN
@@ -941,7 +941,7 @@ X TXD 1 -400 100 100 R 50 50 1 1 I
 X GND 2 0 -400 100 U 50 50 1 1 W
 X VCC 3 0 300 100 D 50 50 1 1 W
 X RXD 4 -400 0 100 R 50 50 1 1 O
-X Vref 5 -400 -100 100 R 50 50 1 1 O
+X Vref 5 -400 -100 100 R 50 50 1 1 P
 X CANL 6 400 -100 100 L 50 50 1 1 B
 X CANH 7 400 0 100 L 50 50 1 1 B
 X S 8 -400 -200 100 R 50 50 1 1 I

From ec2c2204c04ef8abb6ecbf466f96c788f2e68fa1 Mon Sep 17 00:00:00 2001
From: Oliver Walters <oliver.henry.walters@gmail.com>
Date: Tue, 19 Mar 2019 17:06:16 +1100
Subject: [PATCH 028/201] Added MCP2542FD

- MCP2542WFD alias
---
 Interface_CAN_LIN.dcm | 12 ++++++++++++
 Interface_CAN_LIN.lib | 25 +++++++++++++++++++++++++
 2 files changed, 37 insertions(+)

diff --git a/Interface_CAN_LIN.dcm b/Interface_CAN_LIN.dcm
index 40d99406e6..e5a3897267 100644
--- a/Interface_CAN_LIN.dcm
+++ b/Interface_CAN_LIN.dcm
@@ -120,6 +120,18 @@ K CAN FD Controller SPI
 F https://ww1.microchip.com/downloads/en/DeviceDoc/20005688A.pdf
 $ENDCMP
 #
+$CMP MCP2542FD
+D CAN-FD Transceiver, Wake-Up on CAN activity, 8Mbps, 5V supply, STBY pin, DFN8 package
+K CAN transceiver
+F http://ww1.microchip.com/downloads/en/DeviceDoc/25167A.pdf
+$ENDCMP
+#
+$CMP MCP2542WFD
+D CAN-FD Transceiver, Wake-Up on CAN Pattern, 8Mbps, 5V supply, STBY pin, DFN8 package
+K CAN transceiver WUP
+F http://ww1.microchip.com/downloads/en/DeviceDoc/25167A.pdfs
+$ENDCMP
+#
 $CMP MCP2551-I-P
 D High-Speed CAN Transceiver, 1Mbps, 5V supply, PDIP8 package
 K High-Speed CAN Transceiver
diff --git a/Interface_CAN_LIN.lib b/Interface_CAN_LIN.lib
index dc94ef6a01..507f18ea71 100644
--- a/Interface_CAN_LIN.lib
+++ b/Interface_CAN_LIN.lib
@@ -510,6 +510,31 @@ X ~INT0~/GPIO0/XSTBY 9 600 -200 100 L 50 50 1 1 B
 ENDDRAW
 ENDDEF
 #
+# MCP2542FD
+#
+DEF MCP2542FD U 0 20 Y Y 1 F N
+F0 "U" -400 350 50 H V L CNN
+F1 "MCP2542FD" 100 350 50 H V L CNN
+F2 "Package_DFN_QFN:DFN-8-1EP_3x3mm_P0.65mm_EP1.55x2.4mm" 0 -500 50 H I C CIN
+F3 "" 0 0 50 H I C CNN
+ALIAS MCP2542WFD
+$FPLIST
+ DFN*1EP*3x3mm*P0.65mm*
+$ENDFPLIST
+DRAW
+S -400 300 400 -300 0 1 10 f
+X TXD 1 -500 200 100 R 50 50 1 1 I
+X VSS 2 0 -400 100 U 50 50 1 1 W
+X VDD 3 0 400 100 D 50 50 1 1 W
+X RXD 4 -500 100 100 R 50 50 1 1 O
+X VIO 5 -100 400 100 D 50 50 1 1 W
+X CANL 6 500 -100 100 L 50 50 1 1 B
+X CANH 7 500 100 100 L 50 50 1 1 B
+X STBY 8 -500 -200 100 R 50 50 1 1 I
+X PAD 9 -100 -400 100 U 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
 # MCP2551-I-P
 #
 DEF MCP2551-I-P U 0 40 Y Y 1 F N

From 673c2287671743d43ad8d060a89e204ea71f5795 Mon Sep 17 00:00:00 2001
From: Jorge Neiva <jneiva08@gmail.com>
Date: Fri, 22 Mar 2019 23:39:35 +0000
Subject: [PATCH 029/201] Add microcrystal RV-1805-C3

---
 Timer_RTC.dcm |  6 ++++++
 Timer_RTC.lib | 22 ++++++++++++++++++++++
 2 files changed, 28 insertions(+)

diff --git a/Timer_RTC.dcm b/Timer_RTC.dcm
index 22c07ffd94..45257de37b 100644
--- a/Timer_RTC.dcm
+++ b/Timer_RTC.dcm
@@ -114,4 +114,10 @@ K I2C RTC Clock Calendar
 F https://assets.nexperia.com/documents/data-sheet/PCF8563.pdf
 $ENDCMP
 #
+$CMP RV-1805-C3
+D Extreme Low Power, Real Time Clock/Calendar Module  I2C Interface,
+K Low Power RTC I2C
+F https://www.microcrystal.com/fileadmin/Media/Products/RTC/Datasheet/RV-1805-C3.pdf
+$ENDCMP
+#
 #End Doc Library
diff --git a/Timer_RTC.lib b/Timer_RTC.lib
index 1430073ab2..82a65dd68a 100644
--- a/Timer_RTC.lib
+++ b/Timer_RTC.lib
@@ -316,4 +316,26 @@ X VDD 8 0 400 100 D 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #
+# RV-1805-C3
+#
+DEF RV-1805-C3 U 0 20 Y Y 1 F N
+F0 "U" -350 550 50 H V C CNN
+F1 "RV-1805-C3" 400 550 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+S -400 500 400 -500 0 1 10 f
+X VDD 1 -100 600 100 D 50 50 1 1 W
+X ~RST 10 500 100 100 L 50 50 1 1 C
+X Cap_RC 2 -500 -200 100 R 50 50 1 1 P
+X CLK/~INT 3 500 -100 100 L 50 50 1 1 C
+X SCL 4 -500 200 100 R 50 50 1 1 I
+X SDA 5 -500 100 100 R 50 50 1 1 B
+X VSS 6 0 -600 100 U 50 50 1 1 W
+X VBACKUP 7 100 600 100 D 50 50 1 1 W
+X PSW 8 500 0 100 L 50 50 1 1 C
+X WDI 9 -500 -100 100 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
 #End Library

From 6ee3614543e54a29c36af4eb94da5b00b7333eef Mon Sep 17 00:00:00 2001
From: evanshultz <evan.shultz@gmail.com>
Date: Mon, 25 Mar 2019 08:53:28 -0700
Subject: [PATCH 030/201] Add G6SK-2 symbol

---
 Relay.dcm |  6 +++++
 Relay.lib | 70 +++++++++++++++++++++++++++++++++++++++++++++++++++++--
 2 files changed, 74 insertions(+), 2 deletions(-)

diff --git a/Relay.dcm b/Relay.dcm
index a5e9f9a4c8..3c13bbdc18 100644
--- a/Relay.dcm
+++ b/Relay.dcm
@@ -240,6 +240,12 @@ K Miniature Relay Dual Pole DPDT Omron
 F http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6s.pdf
 $ENDCMP
 #
+$CMP G6SK-2
+D Compact, Industry-Standard 2-pole relay, designed to switch 2A Signal Loads, Double-winding Latching
+K Miniature Relay Dual Pole DPDT Omron
+F http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6s.pdf
+$ENDCMP
+#
 $CMP G6SU-2
 D Compact, Industry-Standard 2-pole relay, designed to switch 2A Signal Loads, Single-winding Latching
 K Miniature Relay Dual Pole DPDT Omron
diff --git a/Relay.lib b/Relay.lib
index 625b9e3ede..f64ebf40a8 100644
--- a/Relay.lib
+++ b/Relay.lib
@@ -1410,7 +1410,7 @@ ENDDEF
 #
 # G6S-2
 #
-DEF G6S-2 K 0 40 Y Y 1 F N
+DEF G6S-2 K 0 20 Y Y 1 F N
 F0 "K" 650 150 50 H V L CNN
 F1 "G6S-2" 650 50 50 H V L CNN
 F2 "" 650 -50 50 H I L CNN
@@ -1462,9 +1462,75 @@ X ~ 9 400 -300 100 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
+# G6SK-2
+#
+DEF G6SK-2 K 0 20 Y Y 1 F N
+F0 "K" 950 150 50 H V L CNN
+F1 "G6SK-2" 950 50 50 H V L CNN
+F2 "" 650 -50 50 H I L CNN
+F3 "" -200 0 50 H I C CNN
+$FPLIST
+ Relay*DPDT*Omron*G6SK?2*
+$ENDFPLIST
+DRAW
+T 900 650 150 30 0 0 0 R:+ Normal 0 C C
+T 900 650 -150 30 0 0 0 R:- Normal 0 C C
+T 900 -450 150 30 0 0 0 S:+ Normal 0 C C
+T 900 -450 -150 30 0 0 0 S:- Normal 0 C C
+S -600 200 900 -200 0 1 10 f
+S -525 75 -275 -75 0 1 10 N
+S 575 75 825 -75 0 1 10 N
+P 2 0 1 10 -500 -75 -300 75 N
+P 2 0 1 0 -400 -200 -400 -75 N
+P 2 0 1 0 -400 200 -400 75 N
+P 2 0 1 10 -275 0 -250 0 N
+P 2 0 1 10 -225 0 -200 0 N
+P 2 0 1 10 -175 0 -150 0 N
+P 2 0 1 10 -125 0 -100 0 N
+P 2 0 1 0 -100 100 -100 200 N
+P 2 0 1 10 -75 0 -50 0 N
+P 2 0 1 10 -25 0 0 0 N
+P 2 0 1 20 0 -100 -75 150 N
+P 2 0 1 0 0 -100 0 -200 N
+P 2 0 1 10 25 0 50 0 N
+P 2 0 1 10 75 0 100 0 N
+P 2 0 1 0 100 100 100 200 N
+P 2 0 1 10 125 0 150 0 N
+P 2 0 1 10 175 0 200 0 N
+P 2 0 1 10 225 0 250 0 N
+P 2 0 1 10 275 0 300 0 N
+P 2 0 1 0 300 100 300 200 N
+P 2 0 1 10 325 0 350 0 N
+P 2 0 1 10 375 0 400 0 N
+P 2 0 1 20 400 -100 325 150 N
+P 2 0 1 0 400 -100 400 -200 N
+P 2 0 1 10 425 0 450 0 N
+P 2 0 1 10 475 0 500 0 N
+P 2 0 1 0 500 100 500 200 N
+P 2 0 1 10 525 0 550 0 N
+P 2 0 1 10 600 -75 800 75 N
+P 2 0 1 0 700 -200 700 -75 N
+P 2 0 1 0 700 200 700 75 N
+P 3 0 1 0 -100 100 -75 125 -100 150 F
+P 3 0 1 0 100 100 75 125 100 150 N
+P 3 0 1 0 300 100 325 125 300 150 F
+P 3 0 1 0 500 100 475 125 500 150 N
+X ~ 1 -400 300 100 D 50 50 1 1 P
+X ~ 10 300 300 100 D 50 50 1 1 P
+X ~ 12 -400 -300 100 U 50 50 1 1 P
+X ~ 3 -100 300 100 D 50 50 1 1 P
+X ~ 4 0 -300 100 U 50 50 1 1 P
+X ~ 5 100 300 100 D 50 50 1 1 P
+X ~ 6 700 300 100 D 50 50 1 1 P
+X ~ 7 700 -300 100 U 50 50 1 1 P
+X ~ 8 500 300 100 D 50 50 1 1 P
+X ~ 9 400 -300 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
 # G6SU-2
 #
-DEF G6SU-2 K 0 40 Y Y 1 F N
+DEF G6SU-2 K 0 20 Y Y 1 F N
 F0 "K" 650 150 50 H V L CNN
 F1 "G6SU-2" 650 50 50 H V L CNN
 F2 "" 650 -50 50 H I L CNN

From 4eb77eaa4ac2eb92bb68f054b1f693dad01ee435 Mon Sep 17 00:00:00 2001
From: jneiva08 <jneiva08@gmail.com>
Date: Wed, 27 Mar 2019 13:46:25 +0000
Subject: [PATCH 031/201] Added default footprint and filter

---
 Timer_RTC.lib | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Timer_RTC.lib b/Timer_RTC.lib
index 82a65dd68a..e1d6c00638 100644
--- a/Timer_RTC.lib
+++ b/Timer_RTC.lib
@@ -321,8 +321,11 @@ ENDDEF
 DEF RV-1805-C3 U 0 20 Y Y 1 F N
 F0 "U" -350 550 50 H V C CNN
 F1 "RV-1805-C3" 400 550 50 H V C CNN
-F2 "" 0 0 50 H I C CNN
+F2 "RTC:RTC_SMD_MicroCrystal_RV-1805-C3" 800 -550 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
+$FPLIST
+ *RV?1805*
+$ENDFPLIST
 DRAW
 S -400 500 400 -500 0 1 10 f
 X VDD 1 -100 600 100 D 50 50 1 1 W

From 9130399b5241847618dfda43d2459a9f40b3166e Mon Sep 17 00:00:00 2001
From: Thomas Puchinger <Thomas.Puchinger@tuwien.ac.at>
Date: Thu, 28 Mar 2019 09:30:11 +0100
Subject: [PATCH 032/201] Added AS72651

---
 Sensor_Optical.dcm |  6 ++++++
 Sensor_Optical.lib | 35 +++++++++++++++++++++++++++++++++++
 2 files changed, 41 insertions(+)

diff --git a/Sensor_Optical.dcm b/Sensor_Optical.dcm
index bed11be9c5..e3a2eaf9a4 100644
--- a/Sensor_Optical.dcm
+++ b/Sensor_Optical.dcm
@@ -66,6 +66,12 @@ K 6-Channel NIR Spectral_ID Device Electronic Shutter Smart Interface i2c uart
 F http://ams.com/eng/content/download/976611/2309519/498778
 $ENDCMP
 #
+$CMP AS72651
+D Smart Spectral Sensor
+K Smart 18-Channel VIS+NIR Spectral_ID Sensor with Electronic Shutter
+F https://ams.com/documents/20143/36005/AS7265x_DS000612_1-00.pdf/08051c8a-a7f6-6231-7993-2d3fe0bf38b8
+$ENDCMP
+#
 $CMP BP103
 D NPN Phototransistor
 K npn phototransistor
diff --git a/Sensor_Optical.lib b/Sensor_Optical.lib
index a441949f95..e9bba88500 100644
--- a/Sensor_Optical.lib
+++ b/Sensor_Optical.lib
@@ -174,6 +174,41 @@ X NF 9 500 -400 100 L 50 50 1 1 N N
 ENDDRAW
 ENDDEF
 #
+# AS72651
+#
+DEF AS72651 U 0 20 Y Y 1 F N
+F0 "U" -400 900 50 H V C CNN
+F1 "AS72651" -400 1000 50 H V C CNN
+F2 "Package_LGA:AMS_LGA-20_4.7x4.5mm_P0.65mm" 0 -1250 50 H I C CNN
+F3 "" 400 0 50 H I C CNN
+$FPLIST
+ AMS?LGA*4.7x4.5mm*P0.65mm*
+$ENDFPLIST
+DRAW
+S 500 -800 -500 800 0 1 10 f
+X SLV1_RESN 1 -600 -200 100 R 50 50 1 1 B
+X SDA_M 10 -600 0 100 R 50 50 1 1 B
+X RX/SCL_S 11 -600 400 100 R 50 50 1 1 B
+X TX/SDA_S 12 -600 300 100 R 50 50 1 1 B
+X INT 13 -600 200 100 R 50 50 1 1 O
+X VDD2 14 100 900 100 D 50 50 1 1 W
+X LED_DRV 15 600 300 100 L 50 50 1 1 O
+X GND 16 0 -900 100 U 50 50 1 1 W
+X VDD1 17 -100 900 100 D 50 50 1 1 W
+X LED_IND 18 600 400 100 L 50 50 1 1 O
+X NC 19 -600 -700 100 R 50 50 1 1 N N
+X RESN 2 -600 -400 100 R 50 50 1 1 I
+X SLV2_RESN 20 -600 -300 100 R 50 50 1 1 O
+X SCK 3 600 -400 100 L 50 50 1 1 O
+X MOSI 4 600 -300 100 L 50 50 1 1 B
+X MISO 5 600 -200 100 L 50 50 1 1 B
+X CSN 6 600 -500 100 L 50 50 1 1 O
+X NC 7 -600 -600 100 R 50 50 1 1 N N
+X I2C_ENB 8 -600 500 100 R 50 50 1 1 I
+X SCL_M 9 -600 -100 100 R 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
 # BP103
 #
 DEF BP103 Q 0 0 Y N 1 F N

From 7f24e083d8e55ae5371664234b9260b45c98ffaf Mon Sep 17 00:00:00 2001
From: Francesco Donadon <francesco.donadon@gmail.com>
Date: Thu, 28 Mar 2019 18:08:34 +0100
Subject: [PATCH 033/201] Moved OKI-78SR* symbols to Converter_DCDC library

According to request:
https://github.com/KiCad/kicad-symbols/pull/987#issuecomment-450592148
---
 Converter_DCDC.dcm      | 36 ++++++++++++++++++++++++++++++++++++
 Converter_DCDC.lib      | 38 ++++++++++++++++++++++++++++++++++++++
 Regulator_Switching.dcm | 36 ------------------------------------
 Regulator_Switching.lib | 38 --------------------------------------
 4 files changed, 74 insertions(+), 74 deletions(-)

diff --git a/Converter_DCDC.dcm b/Converter_DCDC.dcm
index ecaa185e2a..9c52501343 100644
--- a/Converter_DCDC.dcm
+++ b/Converter_DCDC.dcm
@@ -1,5 +1,41 @@
 EESchema-DOCLIB  Version 2.0
 #
+$CMP OKI-78SR-12_1.0-W36-C
+D 1.0A Step-Down DC/DC-Regulator, 15-36V input, 12V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_vertical
+K dc-dc murata Step-Down DC/DC-Regulator
+F https://power.murata.com/data/power/oki-78sr.pdf
+$ENDCMP
+#
+$CMP OKI-78SR-12_1.0-W36H-C
+D 1.0A Step-Down DC/DC-Regulator, 15-36V input, 12V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_horizontal
+K dc-dc murata Step-Down DC/DC-Regulator
+F https://power.murata.com/data/power/oki-78sr.pdf
+$ENDCMP
+#
+$CMP OKI-78SR-3.3_1.5-W36-C
+D 1.5A Step-Down DC/DC-Regulator, 7-36V input, 3.3V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_vertical
+K dc-dc murata Step-Down DC/DC-Regulator
+F https://power.murata.com/data/power/oki-78sr.pdf
+$ENDCMP
+#
+$CMP OKI-78SR-3.3_1.5-W36H-C
+D 1.5A Step-Down DC/DC-Regulator, 7-36V input, 3.3V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_horizontal
+K dc-dc murata Step-Down DC/DC-Regulator
+F https://power.murata.com/data/power/oki-78sr.pdf
+$ENDCMP
+#
+$CMP OKI-78SR-5_1.5-W36-C
+D 1.5A Step-Down DC/DC-Regulator, 7-36V input, 5V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_vertical
+K dc-dc murata Step-Down DC/DC-Regulator
+F https://power.murata.com/data/power/oki-78sr.pdf
+$ENDCMP
+#
+$CMP OKI-78SR-5_1.5-W36H-C
+D 1.5A Step-Down DC/DC-Regulator, 7-36V input, 5V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_horizontal
+K dc-dc murata Step-Down DC/DC-Regulator
+F https://power.murata.com/data/power/oki-78sr.pdf
+$ENDCMP
+#
 $CMP TC7662AxPA
 D Charge Pump DC-to-DC Converter, 3 - 18V, 40mA, DIP-8
 K charge pump DC-to-DC converter
diff --git a/Converter_DCDC.lib b/Converter_DCDC.lib
index 5c1095e982..d8e501e3ee 100644
--- a/Converter_DCDC.lib
+++ b/Converter_DCDC.lib
@@ -1,6 +1,44 @@
 EESchema-LIBRARY Version 2.4
 #encoding utf-8
 #
+# OKI-78SR-3.3_1.5-W36-C
+#
+DEF OKI-78SR-3.3_1.5-W36-C U 0 20 Y Y 1 F N
+F0 "U" -150 125 50 H V C CNN
+F1 "OKI-78SR-3.3_1.5-W36-C" 0 125 50 H V L CNN
+F2 "Converter_DCDC:Converter_DCDC_muRata_OKI-78SR_vertical" 50 -250 50 H I L CIN
+F3 "" 0 0 50 H I C CNN
+ALIAS OKI-78SR-5_1.5-W36-C OKI-78SR-12_1.0-W36-C
+$FPLIST
+ *OKI?78SR*vertical*
+$ENDFPLIST
+DRAW
+S -200 75 200 -200 0 1 10 f
+X IN 1 -300 0 100 R 50 50 1 1 W
+X GND 2 0 -300 100 U 50 50 1 1 W
+X OUT 3 300 0 100 L 50 50 1 1 w
+ENDDRAW
+ENDDEF
+#
+# OKI-78SR-3.3_1.5-W36H-C
+#
+DEF OKI-78SR-3.3_1.5-W36H-C U 0 20 Y Y 1 F N
+F0 "U" -150 125 50 H V C CNN
+F1 "OKI-78SR-3.3_1.5-W36H-C" 0 125 50 H V L CNN
+F2 "Converter_DCDC:Converter_DCDC_muRata_OKI-78SR_horizontal" 50 -250 50 H I L CIN
+F3 "" 0 0 50 H I C CNN
+ALIAS OKI-78SR-12_1.0-W36H-C OKI-78SR-5_1.5-W36H-C
+$FPLIST
+ *OKI?78SR*horizontal*
+$ENDFPLIST
+DRAW
+S -200 75 200 -200 0 1 10 f
+X IN 1 -300 0 100 R 50 50 1 1 W
+X GND 2 0 -300 100 U 50 50 1 1 W
+X OUT 3 300 0 100 L 50 50 1 1 w
+ENDDRAW
+ENDDEF
+#
 # TC7662AxPA
 #
 DEF TC7662AxPA U 0 20 Y Y 1 F N
diff --git a/Regulator_Switching.dcm b/Regulator_Switching.dcm
index f610a63bcb..2f26ff566a 100644
--- a/Regulator_Switching.dcm
+++ b/Regulator_Switching.dcm
@@ -3276,42 +3276,6 @@ K isolated isolation dc-dc converter transformer
 F http://power.murata.com/data/power/ncl/kdc_nxe2.pdf
 $ENDCMP
 #
-$CMP OKI-78SR-12_1.0-W36-C
-D 1.0A Step-Down DC/DC-Regulator, 15-36V input, 12V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_vertical
-K dc-dc murata Step-Down DC/DC-Regulator
-F https://power.murata.com/data/power/oki-78sr.pdf
-$ENDCMP
-#
-$CMP OKI-78SR-12_1.0-W36H-C
-D 1.0A Step-Down DC/DC-Regulator, 15-36V input, 12V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_horizontal
-K dc-dc murata Step-Down DC/DC-Regulator
-F https://power.murata.com/data/power/oki-78sr.pdf
-$ENDCMP
-#
-$CMP OKI-78SR-3.3_1.5-W36-C
-D 1.5A Step-Down DC/DC-Regulator, 7-36V input, 3.3V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_vertical
-K dc-dc murata Step-Down DC/DC-Regulator
-F https://power.murata.com/data/power/oki-78sr.pdf
-$ENDCMP
-#
-$CMP OKI-78SR-3.3_1.5-W36H-C
-D 1.5A Step-Down DC/DC-Regulator, 7-36V input, 3.3V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_horizontal
-K dc-dc murata Step-Down DC/DC-Regulator
-F https://power.murata.com/data/power/oki-78sr.pdf
-$ENDCMP
-#
-$CMP OKI-78SR-5_1.5-W36-C
-D 1.5A Step-Down DC/DC-Regulator, 7-36V input, 5V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_vertical
-K dc-dc murata Step-Down DC/DC-Regulator
-F https://power.murata.com/data/power/oki-78sr.pdf
-$ENDCMP
-#
-$CMP OKI-78SR-5_1.5-W36H-C
-D 1.5A Step-Down DC/DC-Regulator, 7-36V input, 5V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_horizontal
-K dc-dc murata Step-Down DC/DC-Regulator
-F https://power.murata.com/data/power/oki-78sr.pdf
-$ENDCMP
-#
 $CMP PAM2305AAB120
 D 1A, Step-Down DC/DC-Converter, 1.2V Fixed Output Voltage, 1.5MHz, TSOT-23
 K Voltage regulator switching buck fixed output analog
diff --git a/Regulator_Switching.lib b/Regulator_Switching.lib
index 6ced289b8f..9433b36e09 100644
--- a/Regulator_Switching.lib
+++ b/Regulator_Switching.lib
@@ -4041,44 +4041,6 @@ X +VOUT 8 500 200 100 L 50 50 1 1 w
 ENDDRAW
 ENDDEF
 #
-# OKI-78SR-3.3_1.5-W36-C
-#
-DEF OKI-78SR-3.3_1.5-W36-C U 0 20 Y Y 1 F N
-F0 "U" -150 125 50 H V C CNN
-F1 "OKI-78SR-3.3_1.5-W36-C" 0 125 50 H V L CNN
-F2 "Converter_DCDC:Converter_DCDC_muRata_OKI-78SR_vertical" 50 -250 50 H I L CIN
-F3 "" 0 0 50 H I C CNN
-ALIAS OKI-78SR-5_1.5-W36-C OKI-78SR-12_1.0-W36-C
-$FPLIST
- *OKI?78SR*vertical*
-$ENDFPLIST
-DRAW
-S -200 75 200 -200 0 1 10 f
-X IN 1 -300 0 100 R 50 50 1 1 W
-X GND 2 0 -300 100 U 50 50 1 1 W
-X OUT 3 300 0 100 L 50 50 1 1 w
-ENDDRAW
-ENDDEF
-#
-# OKI-78SR-3.3_1.5-W36H-C
-#
-DEF OKI-78SR-3.3_1.5-W36H-C U 0 20 Y Y 1 F N
-F0 "U" -150 125 50 H V C CNN
-F1 "OKI-78SR-3.3_1.5-W36H-C" 0 125 50 H V L CNN
-F2 "Converter_DCDC:Converter_DCDC_muRata_OKI-78SR_horizontal" 50 -250 50 H I L CIN
-F3 "" 0 0 50 H I C CNN
-ALIAS OKI-78SR-12_1.0-W36H-C OKI-78SR-5_1.5-W36H-C
-$FPLIST
- *OKI?78SR*horizontal*
-$ENDFPLIST
-DRAW
-S -200 75 200 -200 0 1 10 f
-X IN 1 -300 0 100 R 50 50 1 1 W
-X GND 2 0 -300 100 U 50 50 1 1 W
-X OUT 3 300 0 100 L 50 50 1 1 w
-ENDDRAW
-ENDDEF
-#
 # PAM2305AAB330
 #
 DEF PAM2305AAB330 U 0 20 Y Y 1 F N

From 578d902b8abbde25628fcb62b31771b93fdb46d6 Mon Sep 17 00:00:00 2001
From: Francesco Donadon <francesco.donadon@gmail.com>
Date: Thu, 28 Mar 2019 19:33:46 +0100
Subject: [PATCH 034/201] Corrected capitalization of footprints

---
 Converter_DCDC.lib | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Converter_DCDC.lib b/Converter_DCDC.lib
index d8e501e3ee..f486acc7fc 100644
--- a/Converter_DCDC.lib
+++ b/Converter_DCDC.lib
@@ -6,7 +6,7 @@ EESchema-LIBRARY Version 2.4
 DEF OKI-78SR-3.3_1.5-W36-C U 0 20 Y Y 1 F N
 F0 "U" -150 125 50 H V C CNN
 F1 "OKI-78SR-3.3_1.5-W36-C" 0 125 50 H V L CNN
-F2 "Converter_DCDC:Converter_DCDC_muRata_OKI-78SR_vertical" 50 -250 50 H I L CIN
+F2 "Converter_DCDC:Converter_DCDC_muRata_OKI-78SR_Vertical" 50 -250 50 H I L CIN
 F3 "" 0 0 50 H I C CNN
 ALIAS OKI-78SR-5_1.5-W36-C OKI-78SR-12_1.0-W36-C
 $FPLIST
@@ -25,7 +25,7 @@ ENDDEF
 DEF OKI-78SR-3.3_1.5-W36H-C U 0 20 Y Y 1 F N
 F0 "U" -150 125 50 H V C CNN
 F1 "OKI-78SR-3.3_1.5-W36H-C" 0 125 50 H V L CNN
-F2 "Converter_DCDC:Converter_DCDC_muRata_OKI-78SR_horizontal" 50 -250 50 H I L CIN
+F2 "Converter_DCDC:Converter_DCDC_muRata_OKI-78SR_Horizontal" 50 -250 50 H I L CIN
 F3 "" 0 0 50 H I C CNN
 ALIAS OKI-78SR-12_1.0-W36H-C OKI-78SR-5_1.5-W36H-C
 $FPLIST

From 3e8fdfdc57440f74fca065910b038611e7df9756 Mon Sep 17 00:00:00 2001
From: Oliver Walters <oliver.henry.walters@gmail.com>
Date: Fri, 29 Mar 2019 13:15:35 +1100
Subject: [PATCH 035/201] Changes as requested

---
 Interface_CAN_LIN.dcm |  6 +++---
 Interface_CAN_LIN.lib | 10 +++++-----
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/Interface_CAN_LIN.dcm b/Interface_CAN_LIN.dcm
index f8f0a45365..ec187952c8 100644
--- a/Interface_CAN_LIN.dcm
+++ b/Interface_CAN_LIN.dcm
@@ -252,9 +252,9 @@ K BUS CAN
 F http://www.nxp.com/documents/data_sheet/PCA82C251.pdf
 $ENDCMP
 #
-$CMP SN65HVD1050DR
-D CAN Bus Transceiver, EMC optimised, 5.0V, 1Mbps, SOIC
-K can transeiver ti canbus
+$CMP SN65HVD1050D
+D CAN Bus Transceiver, EMC optimised, 5.0V, 1Mbps, SOIC-8
+K can transceiver ti canbus
 F http://www.ti.com/lit/ds/symlink/sn65hvd1050.pdf
 $ENDCMP
 #
diff --git a/Interface_CAN_LIN.lib b/Interface_CAN_LIN.lib
index f4574a0244..e96925ca3c 100644
--- a/Interface_CAN_LIN.lib
+++ b/Interface_CAN_LIN.lib
@@ -925,11 +925,11 @@ X Rsl 8 -400 -100 200 R 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #
-# SN65HVD1050DR
+# SN65HVD1050D
 #
-DEF SN65HVD1050DR U 0 20 Y Y 1 F N
+DEF SN65HVD1050D U 0 20 Y Y 1 F N
 F0 "U" -100 400 50 H V R CNN
-F1 "SN65HVD1050DR" -100 300 50 H V R CNN
+F1 "SN65HVD1050D" -100 300 50 H V R CNN
 F2 "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm" 0 -500 50 H I C CNN
 F3 "" -100 400 50 H I C CNN
 $FPLIST
@@ -941,9 +941,9 @@ X TXD 1 -400 100 100 R 50 50 1 1 I
 X GND 2 0 -400 100 U 50 50 1 1 W
 X VCC 3 0 300 100 D 50 50 1 1 W
 X RXD 4 -400 0 100 R 50 50 1 1 O
-X Vref 5 -400 -100 100 R 50 50 1 1 P
+X VREF 5 400 0 100 L 50 50 1 1 P
 X CANL 6 400 -100 100 L 50 50 1 1 B
-X CANH 7 400 0 100 L 50 50 1 1 B
+X CANH 7 400 100 100 L 50 50 1 1 B
 X S 8 -400 -200 100 R 50 50 1 1 I
 ENDDRAW
 ENDDEF

From 14487c409f6b6902001405e622b1f32d43a0459b Mon Sep 17 00:00:00 2001
From: Francesco Donadon <francesco.donadon@gmail.com>
Date: Fri, 29 Mar 2019 09:02:03 +0100
Subject: [PATCH 036/201] Fix footprint filter capitalization

---
 Converter_DCDC.dcm | 12 ++++++------
 Converter_DCDC.lib |  4 ++--
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/Converter_DCDC.dcm b/Converter_DCDC.dcm
index 7c286fa44e..78867650bc 100644
--- a/Converter_DCDC.dcm
+++ b/Converter_DCDC.dcm
@@ -2233,37 +2233,37 @@ F https://power.murata.com/data/power/ncl/kdc_ncs1.pdf
 $ENDCMP
 #
 $CMP OKI-78SR-12_1.0-W36-C
-D 1.0A Step-Down DC/DC-Regulator, 15-36V input, 12V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_vertical
+D 1.0A Step-Down DC/DC-Regulator, 15-36V input, 12V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_Vertical
 K dc-dc murata Step-Down DC/DC-Regulator
 F https://power.murata.com/data/power/oki-78sr.pdf
 $ENDCMP
 #
 $CMP OKI-78SR-12_1.0-W36H-C
-D 1.0A Step-Down DC/DC-Regulator, 15-36V input, 12V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_horizontal
+D 1.0A Step-Down DC/DC-Regulator, 15-36V input, 12V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_Horizontal
 K dc-dc murata Step-Down DC/DC-Regulator
 F https://power.murata.com/data/power/oki-78sr.pdf
 $ENDCMP
 #
 $CMP OKI-78SR-3.3_1.5-W36-C
-D 1.5A Step-Down DC/DC-Regulator, 7-36V input, 3.3V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_vertical
+D 1.5A Step-Down DC/DC-Regulator, 7-36V input, 3.3V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_Vertical
 K dc-dc murata Step-Down DC/DC-Regulator
 F https://power.murata.com/data/power/oki-78sr.pdf
 $ENDCMP
 #
 $CMP OKI-78SR-3.3_1.5-W36H-C
-D 1.5A Step-Down DC/DC-Regulator, 7-36V input, 3.3V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_horizontal
+D 1.5A Step-Down DC/DC-Regulator, 7-36V input, 3.3V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_Horizontal
 K dc-dc murata Step-Down DC/DC-Regulator
 F https://power.murata.com/data/power/oki-78sr.pdf
 $ENDCMP
 #
 $CMP OKI-78SR-5_1.5-W36-C
-D 1.5A Step-Down DC/DC-Regulator, 7-36V input, 5V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_vertical
+D 1.5A Step-Down DC/DC-Regulator, 7-36V input, 5V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_Vertical
 K dc-dc murata Step-Down DC/DC-Regulator
 F https://power.murata.com/data/power/oki-78sr.pdf
 $ENDCMP
 #
 $CMP OKI-78SR-5_1.5-W36H-C
-D 1.5A Step-Down DC/DC-Regulator, 7-36V input, 5V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_horizontal
+D 1.5A Step-Down DC/DC-Regulator, 7-36V input, 5V fixed Output Voltage, LM78xx replacement, -40°C to +85°C, OKI-78SR_Horizontal
 K dc-dc murata Step-Down DC/DC-Regulator
 F https://power.murata.com/data/power/oki-78sr.pdf
 $ENDCMP
diff --git a/Converter_DCDC.lib b/Converter_DCDC.lib
index 7c084cb14c..dd98b5293d 100644
--- a/Converter_DCDC.lib
+++ b/Converter_DCDC.lib
@@ -577,7 +577,7 @@ F2 "Converter_DCDC:Converter_DCDC_muRata_OKI-78SR_Vertical" 50 -250 50 H I L CIN
 F3 "" 0 0 50 H I C CNN
 ALIAS OKI-78SR-5_1.5-W36-C OKI-78SR-12_1.0-W36-C
 $FPLIST
- *OKI?78SR*vertical*
+ *OKI?78SR*Vertical*
 $ENDFPLIST
 DRAW
 S -200 75 200 -200 0 1 10 f
@@ -596,7 +596,7 @@ F2 "Converter_DCDC:Converter_DCDC_muRata_OKI-78SR_Horizontal" 50 -250 50 H I L C
 F3 "" 0 0 50 H I C CNN
 ALIAS OKI-78SR-12_1.0-W36H-C OKI-78SR-5_1.5-W36H-C
 $FPLIST
- *OKI?78SR*horizontal*
+ *OKI?78SR*Horizontal*
 $ENDFPLIST
 DRAW
 S -200 75 200 -200 0 1 10 f

From f67e4483465e415bebdd39b1968852bb598189b3 Mon Sep 17 00:00:00 2001
From: Anton Lysak <antonlysak@gmail.com>
Date: Sat, 30 Mar 2019 19:15:29 +0600
Subject: [PATCH 037/201] Adding MXM3.0 connector

---
 Connector.dcm |   6 +
 Connector.lib | 301 ++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 307 insertions(+)

diff --git a/Connector.dcm b/Connector.dcm
index 3bff6148cc..a2432a1c0c 100644
--- a/Connector.dcm
+++ b/Connector.dcm
@@ -1128,6 +1128,12 @@ K LEMO connector
 F  ~
 $ENDCMP
 #
+$CMP MXM3.0
+D MXM3.0 connector
+K MXM3.0 connector
+F https://wenku.baidu.com/view/ecf588fbf705cc175527092d.html
+$ENDCMP
+#
 $CMP Micro_SD_Card
 D Micro SD Card Socket
 K connector SD microsd
diff --git a/Connector.lib b/Connector.lib
index a461bfcc4b..619ce68cae 100644
--- a/Connector.lib
+++ b/Connector.lib
@@ -10824,6 +10824,307 @@ X ~ 6 -500 200 100 R 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
+# MXM3.0
+#
+DEF MXM3.0 J 0 20 Y Y 2 L N
+F0 "J" 0 4300 50 H V C CNN
+F1 "MXM3.0" 0 4200 50 H V C CNN
+F2 "" 1400 4100 50 H I C CNN
+F3 "" 1400 4100 50 H I C CNN
+$FPLIST
+ *JAE?MM70?314?310B1*
+$ENDFPLIST
+DRAW
+S -600 4100 600 -4100 1 1 0 f
+S -600 -3200 600 3200 2 1 0 f
+X 5V 1 -800 3700 200 R 50 50 1 1 P
+X RSVD 10 800 3300 200 L 50 50 1 1 P
+X GND 100 800 -1200 200 L 50 50 1 1 P
+X GND 101 -800 -1300 200 R 50 50 1 1 P
+X PEX_TX6# 102 800 -1300 200 L 50 50 1 1 P
+X PEX_RX6# 103 -800 -1400 200 R 50 50 1 1 P
+X PEX_TX6 104 800 -1400 200 L 50 50 1 1 P
+X PEX_RX6 105 -800 -1500 200 R 50 50 1 1 P
+X GND 106 800 -1500 200 L 50 50 1 1 P
+X GND 107 -800 -1600 200 R 50 50 1 1 P
+X PEX_TX5# 108 800 -1600 200 L 50 50 1 1 P
+X PEX_RX5# 109 -800 -1700 200 R 50 50 1 1 P
+X GND 11 -800 3200 200 R 50 50 1 1 P
+X PEX_TX5 110 800 -1700 200 L 50 50 1 1 P
+X PEX_RX5 111 -800 -1800 200 R 50 50 1 1 P
+X GND 112 800 -1800 200 L 50 50 1 1 P
+X GND 113 -800 -1900 200 R 50 50 1 1 P
+X PEX_TX4# 114 800 -1900 200 L 50 50 1 1 P
+X PEX_RX4# 115 -800 -2000 200 R 50 50 1 1 P
+X PEX_TX4 116 800 -2000 200 L 50 50 1 1 P
+X PEX_RX4 117 -800 -2100 200 R 50 50 1 1 P
+X GND 118 800 -2100 200 L 50 50 1 1 P
+X GND 119 -800 -2200 200 R 50 50 1 1 P
+X RSVD 12 800 3200 200 L 50 50 1 1 P
+X PEX_TX3# 120 800 -2200 200 L 50 50 1 1 P
+X PEX_RX3# 121 -800 -2300 200 R 50 50 1 1 P
+X PEX_TX3 122 800 -2300 200 L 50 50 1 1 P
+X PEX_RX3 123 -800 -2400 200 R 50 50 1 1 P
+X GND 124 800 -2400 200 L 50 50 1 1 P
+X GND 125 -800 -2500 200 R 50 50 1 1 P
+X KEY 126 800 -2500 200 L 50 50 1 1 P
+X KEY 127 -800 -2600 200 R 50 50 1 1 P
+X KEY 128 800 -2600 200 L 50 50 1 1 P
+X KEY 129 -800 -2700 200 R 50 50 1 1 P
+X GND 13 -800 3100 200 R 50 50 1 1 P
+X KEY 130 800 -2700 200 L 50 50 1 1 P
+X KEY 131 -800 -2800 200 R 50 50 1 1 P
+X KEY 132 800 -2800 200 L 50 50 1 1 P
+X GND 133 -800 -2900 200 R 50 50 1 1 P
+X GND 134 800 -2900 200 L 50 50 1 1 P
+X PEX_RX2# 135 -800 -3000 200 R 50 50 1 1 P
+X PEX_TX2# 136 800 -3000 200 L 50 50 1 1 P
+X PEX_RX2 137 -800 -3100 200 R 50 50 1 1 P
+X PEX_TX2 138 800 -3100 200 L 50 50 1 1 P
+X GND 139 -800 -3200 200 R 50 50 1 1 P
+X RSVD 14 800 3100 200 L 50 50 1 1 P
+X GND 140 800 -3200 200 L 50 50 1 1 P
+X PEX_RX1# 141 -800 -3300 200 R 50 50 1 1 P
+X PEX_TX1# 142 800 -3300 200 L 50 50 1 1 P
+X PEX_RX1 143 -800 -3400 200 R 50 50 1 1 P
+X PEX_TX1 144 800 -3400 200 L 50 50 1 1 P
+X GND 145 -800 -3500 200 R 50 50 1 1 P
+X GND 146 800 -3500 200 L 50 50 1 1 P
+X PEX_RX0# 147 -800 -3600 200 R 50 50 1 1 P
+X PEX_TX0# 148 800 -3600 200 L 50 50 1 1 P
+X PEX_RX0 149 -800 -3700 200 R 50 50 1 1 P
+X GND 15 -800 3000 200 R 50 50 1 1 P
+X PEX_TX0 150 800 -3700 200 L 50 50 1 1 P
+X GND 151 -800 -3800 200 R 50 50 1 1 P
+X GND 152 800 -3800 200 L 50 50 1 1 P
+X PEX_REFCLK# 153 -800 -3900 200 R 50 50 1 1 P
+X PEX_CLK_REQ# 154 800 -3900 200 L 50 50 1 1 P
+X PEX_REFCLK 155 -800 -4000 200 R 50 50 1 1 P
+X PEX_RST# 156 800 -4000 200 L 50 50 1 1 P
+X RSVD 16 800 3000 200 L 50 50 1 1 P
+X GND 17 -800 2900 200 R 50 50 1 1 P
+X PWR_LEVEL 18 800 2900 200 L 50 50 1 1 P
+X PEX_STD_SW# 19 -800 2800 200 R 50 50 1 1 P
+X PRSNT_R# 2 800 3700 200 L 50 50 1 1 P
+X TH_OVERT# 20 800 2800 200 L 50 50 1 1 P
+X VGA_DISABLE# 21 -800 2700 200 R 50 50 1 1 P
+X TH_ALERT# 22 800 2700 200 L 50 50 1 1 P
+X PNL_PWR_EN 23 -800 2600 200 R 50 50 1 1 P
+X TH_PWN 24 800 2600 200 L 50 50 1 1 P
+X PNL_BL_EN 25 -800 2500 200 R 50 50 1 1 P
+X GPIO0 26 800 2500 200 L 50 50 1 1 P
+X PNL_BL_PWN 27 -800 2400 200 R 50 50 1 1 P
+X GPIO1 28 800 2400 200 L 50 50 1 1 P
+X HDMI_CEC 29 -800 2300 200 R 50 50 1 1 P
+X 5V 3 -800 3600 200 R 50 50 1 1 P
+X GPIO2 30 800 2300 200 L 50 50 1 1 P
+X DVI_HPD 31 -800 2200 200 R 50 50 1 1 P
+X SMB_DAT 32 800 2200 200 L 50 50 1 1 P
+X LVDS_DDC_DAT 33 -800 2100 200 R 50 50 1 1 P
+X SMB_CLK 34 800 2100 200 L 50 50 1 1 P
+X LVDS_DDC_CLK 35 -800 2000 200 R 50 50 1 1 P
+X GND 36 800 2000 200 L 50 50 1 1 P
+X GND 37 -800 1900 200 R 50 50 1 1 P
+X OEM 38 800 1900 200 L 50 50 1 1 P
+X OEM 39 -800 1800 200 R 50 50 1 1 P
+X WAKE# 4 800 3600 200 L 50 50 1 1 P
+X OEM 40 800 1800 200 L 50 50 1 1 P
+X OEM 41 -800 1700 200 R 50 50 1 1 P
+X OEM 42 800 1700 200 L 50 50 1 1 P
+X OEM 43 -800 1600 200 R 50 50 1 1 P
+X OEM 44 800 1600 200 L 50 50 1 1 P
+X OEM 45 -800 1500 200 R 50 50 1 1 P
+X GND 46 800 1500 200 L 50 50 1 1 P
+X GND 47 -800 1400 200 R 50 50 1 1 P
+X PEX_TX15# 48 800 1400 200 L 50 50 1 1 P
+X PEX_RX15# 49 -800 1300 200 R 50 50 1 1 P
+X 5V 5 -800 3500 200 R 50 50 1 1 P
+X PEX_TX15 50 800 1300 200 L 50 50 1 1 P
+X PEX_RX15 51 -800 1200 200 R 50 50 1 1 P
+X GND 52 800 1200 200 L 50 50 1 1 P
+X GND 53 -800 1100 200 R 50 50 1 1 P
+X PEX_TX14# 54 800 1100 200 L 50 50 1 1 P
+X PEX_RX14# 55 -800 1000 200 R 50 50 1 1 P
+X PEX_TX14 56 800 1000 200 L 50 50 1 1 P
+X PEX_RX14 57 -800 900 200 R 50 50 1 1 P
+X GND 58 800 900 200 L 50 50 1 1 P
+X GND 59 -800 800 200 R 50 50 1 1 P
+X PWR_GOOD 6 800 3500 200 L 50 50 1 1 P
+X PEX_TX13# 60 800 800 200 L 50 50 1 1 P
+X PEX_RX13# 61 -800 700 200 R 50 50 1 1 P
+X PEX_TX13 62 800 700 200 L 50 50 1 1 P
+X PEX_RX13 63 -800 600 200 R 50 50 1 1 P
+X GND 64 800 600 200 L 50 50 1 1 P
+X GND 65 -800 500 200 R 50 50 1 1 P
+X PEX_TX12# 66 800 500 200 L 50 50 1 1 P
+X PEX_RX12# 67 -800 400 200 R 50 50 1 1 P
+X PEX_TX12 68 800 400 200 L 50 50 1 1 P
+X PEX_RX12 69 -800 300 200 R 50 50 1 1 P
+X 5V 7 -800 3400 200 R 50 50 1 1 P
+X GND 70 800 300 200 L 50 50 1 1 P
+X GND 71 -800 200 200 R 50 50 1 1 P
+X PEX_TX11# 72 800 200 200 L 50 50 1 1 P
+X PEX_RX11# 73 -800 100 200 R 50 50 1 1 P
+X PEX_TX11 74 800 100 200 L 50 50 1 1 P
+X PEX_RX11 75 -800 0 200 R 50 50 1 1 P
+X GND 76 800 0 200 L 50 50 1 1 P
+X GND 77 -800 -100 200 R 50 50 1 1 P
+X PEX_TX10# 78 800 -100 200 L 50 50 1 1 P
+X PEX_RX10# 79 -800 -200 200 R 50 50 1 1 P
+X PWR_EN 8 800 3400 200 L 50 50 1 1 P
+X PEX_TX10 80 800 -200 200 L 50 50 1 1 P
+X PEX_RX10 81 -800 -300 200 R 50 50 1 1 P
+X GND 82 800 -300 200 L 50 50 1 1 P
+X GND 83 -800 -400 200 R 50 50 1 1 P
+X PEX_TX9# 84 800 -400 200 L 50 50 1 1 P
+X PEX_RX9# 85 -800 -500 200 R 50 50 1 1 P
+X PEX_TX9 86 800 -500 200 L 50 50 1 1 P
+X PEX_RX9 87 -800 -600 200 R 50 50 1 1 P
+X GND 88 800 -600 200 L 50 50 1 1 P
+X GND 89 -800 -700 200 R 50 50 1 1 P
+X 5V 9 -800 3300 200 R 50 50 1 1 P
+X PEX_TX8# 90 800 -700 200 L 50 50 1 1 P
+X PEX_RX8# 91 -800 -800 200 R 50 50 1 1 P
+X PEX_TX8 92 800 -800 200 L 50 50 1 1 P
+X PEX_RX8 93 -800 -900 200 R 50 50 1 1 P
+X GND 94 800 -900 200 L 50 50 1 1 P
+X GND 95 -800 -1000 200 R 50 50 1 1 P
+X PEX_TX7# 96 800 -1000 200 L 50 50 1 1 P
+X PEX_RX7# 97 -800 -1100 200 R 50 50 1 1 P
+X PEX_TX7 98 800 -1100 200 L 50 50 1 1 P
+X PEX_RX7 99 -800 -1200 200 R 50 50 1 1 P
+X PWR_SRC E1 -800 3900 200 R 50 50 1 1 P
+X PWR_SRC E2 800 3900 200 L 50 50 1 1 P
+X GND E3 -800 3800 200 R 50 50 1 1 P
+X GND E4 800 3800 200 L 50 50 1 1 P
+X GND 157 -800 3100 200 R 50 50 2 1 P
+X VGA_DDC_DAT 158 800 3100 200 L 50 50 2 1 P
+X RSVD 159 -800 3000 200 R 50 50 2 1 P
+X VGA_DDC_CLK 160 800 3000 200 L 50 50 2 1 P
+X RSVD 161 -800 2900 200 R 50 50 2 1 P
+X VGA_VSYNC 162 800 2900 200 L 50 50 2 1 P
+X RSVD 163 -800 2800 200 R 50 50 2 1 P
+X VGA_HSYNC 164 800 2800 200 L 50 50 2 1 P
+X RSVD 165 -800 2700 200 R 50 50 2 1 P
+X GND 166 800 2700 200 L 50 50 2 1 P
+X RSVD 167 -800 2600 200 R 50 50 2 1 P
+X VGA_RED 168 800 2600 200 L 50 50 2 1 P
+X LVDS_UCLK# 169 -800 2500 200 R 50 50 2 1 P
+X VGA_GREEN 170 800 2500 200 L 50 50 2 1 P
+X LVDS_UCLK 171 -800 2400 200 R 50 50 2 1 P
+X VGA_BLUE 172 800 2400 200 L 50 50 2 1 P
+X GND 173 -800 2300 200 R 50 50 2 1 P
+X GND 174 800 2300 200 L 50 50 2 1 P
+X LVDS_UTX3# 175 -800 2200 200 R 50 50 2 1 P
+X LVDS_LCLK# 176 800 2200 200 L 50 50 2 1 P
+X LVDS_UTX3 177 -800 2100 200 R 50 50 2 1 P
+X LVDS_LCLK 178 800 2100 200 L 50 50 2 1 P
+X GND 179 -800 2000 200 R 50 50 2 1 P
+X GND 180 800 2000 200 L 50 50 2 1 P
+X LVDS_UTX2# 181 -800 1900 200 R 50 50 2 1 P
+X LVDS_LTX3# 182 800 1900 200 L 50 50 2 1 P
+X LVDS_UTX2 183 -800 1800 200 R 50 50 2 1 P
+X LVDS_LTX3 184 800 1800 200 L 50 50 2 1 P
+X GND 185 -800 1700 200 R 50 50 2 1 P
+X GND 186 800 1700 200 L 50 50 2 1 P
+X LVDS_UTX1# 187 -800 1600 200 R 50 50 2 1 P
+X LVDS_LTX2# 188 800 1600 200 L 50 50 2 1 P
+X LVDS_UTX1 189 -800 1500 200 R 50 50 2 1 P
+X LVDS_LTX2 190 800 1500 200 L 50 50 2 1 P
+X GND 191 -800 1400 200 R 50 50 2 1 P
+X GND 192 800 1400 200 L 50 50 2 1 P
+X LVDS_UTX0# 193 -800 1300 200 R 50 50 2 1 P
+X LVDS_LTX1# 194 800 1300 200 L 50 50 2 1 P
+X LVDS_UTX0 195 -800 1200 200 R 50 50 2 1 P
+X LVDS_LTX1 196 800 1200 200 L 50 50 2 1 P
+X GND 197 -800 1100 200 R 50 50 2 1 P
+X GND 198 800 1100 200 L 50 50 2 1 P
+X DP_C_L0# 199 -800 1000 200 R 50 50 2 1 P
+X LVDS_LTX0# 200 800 1000 200 L 50 50 2 1 P
+X DP_C_L0 201 -800 900 200 R 50 50 2 1 P
+X LVDS_LTX0 202 800 900 200 L 50 50 2 1 P
+X GND 203 -800 800 200 R 50 50 2 1 P
+X GND 204 800 800 200 L 50 50 2 1 P
+X DP_C_L1# 205 -800 700 200 R 50 50 2 1 P
+X DP_D_L0# 206 800 700 200 L 50 50 2 1 P
+X DP_C_L1 207 -800 600 200 R 50 50 2 1 P
+X DP_D_L0 208 800 600 200 L 50 50 2 1 P
+X GND 209 -800 500 200 R 50 50 2 1 P
+X GND 210 800 500 200 L 50 50 2 1 P
+X DP_C_L2# 211 -800 400 200 R 50 50 2 1 P
+X DP_D_L1# 212 800 400 200 L 50 50 2 1 P
+X DP_C_L2 213 -800 300 200 R 50 50 2 1 P
+X DP_D_L1 214 800 300 200 L 50 50 2 1 P
+X GND 215 -800 200 200 R 50 50 2 1 P
+X GND 216 800 200 200 L 50 50 2 1 P
+X DP_C_L3# 217 -800 100 200 R 50 50 2 1 P
+X DP_D_L2# 218 800 100 200 L 50 50 2 1 P
+X DP_C_L3 219 -800 0 200 R 50 50 2 1 P
+X DP_D_L2 220 800 0 200 L 50 50 2 1 P
+X GND 221 -800 -100 200 R 50 50 2 1 P
+X GND 222 800 -100 200 L 50 50 2 1 P
+X DP_C_AUX# 223 -800 -200 200 R 50 50 2 1 P
+X DP_D_L3# 224 800 -200 200 L 50 50 2 1 P
+X DP_C_AUX 225 -800 -300 200 R 50 50 2 1 P
+X DP_D_L3 226 800 -300 200 L 50 50 2 1 P
+X RSVD 227 -800 -400 200 R 50 50 2 1 P
+X GND 228 800 -400 200 L 50 50 2 1 P
+X RSVD 229 -800 -500 200 R 50 50 2 1 P
+X DP_D_AUX# 230 800 -500 200 L 50 50 2 1 P
+X RSVD 231 -800 -600 200 R 50 50 2 1 P
+X DP_D_AUX 232 800 -600 200 L 50 50 2 1 P
+X RSVD 233 -800 -700 200 R 50 50 2 1 P
+X DP_C_HPD 234 800 -700 200 L 50 50 2 1 P
+X RSVD 235 -800 -800 200 R 50 50 2 1 P
+X DP_D_HPD 236 800 -800 200 L 50 50 2 1 P
+X RSVD 237 -800 -900 200 R 50 50 2 1 P
+X RSVD 238 800 -900 200 L 50 50 2 1 P
+X RSVD 239 -800 -1000 200 R 50 50 2 1 P
+X RSVD 240 800 -1000 200 L 50 50 2 1 P
+X RSVD 241 -800 -1100 200 R 50 50 2 1 P
+X RSVD 242 800 -1100 200 L 50 50 2 1 P
+X RSVD 243 -800 -1200 200 R 50 50 2 1 P
+X GND 244 800 -1200 200 L 50 50 2 1 P
+X RSVD 245 -800 -1300 200 R 50 50 2 1 P
+X DP_B_L0# 246 800 -1300 200 L 50 50 2 1 P
+X RSVD 247 -800 -1400 200 R 50 50 2 1 P
+X DP_B_L0 248 800 -1400 200 L 50 50 2 1 P
+X RSVD 249 -800 -1500 200 R 50 50 2 1 P
+X GND 250 800 -1500 200 L 50 50 2 1 P
+X GND 251 -800 -1600 200 R 50 50 2 1 P
+X DP_B_L1# 252 800 -1600 200 L 50 50 2 1 P
+X DP_A_L0# 253 -800 -1700 200 R 50 50 2 1 P
+X DP_B_L1 254 800 -1700 200 L 50 50 2 1 P
+X DP_A_L0 255 -800 -1800 200 R 50 50 2 1 P
+X GND 256 800 -1800 200 L 50 50 2 1 P
+X GND 257 -800 -1900 200 R 50 50 2 1 P
+X DP_B_L2# 258 800 -1900 200 L 50 50 2 1 P
+X DP_A_L1# 259 -800 -2000 200 R 50 50 2 1 P
+X DP_B_L2 260 800 -2000 200 L 50 50 2 1 P
+X DP_A_L1 261 -800 -2100 200 R 50 50 2 1 P
+X GND 262 800 -2100 200 L 50 50 2 1 P
+X GND 263 -800 -2200 200 R 50 50 2 1 P
+X DP_B_L3# 264 800 -2200 200 L 50 50 2 1 P
+X DP_A_L2# 265 -800 -2300 200 R 50 50 2 1 P
+X DP_B_L3 266 800 -2300 200 L 50 50 2 1 P
+X DP_A_L2 267 -800 -2400 200 R 50 50 2 1 P
+X GND 268 800 -2400 200 L 50 50 2 1 P
+X GND 269 -800 -2500 200 R 50 50 2 1 P
+X DP_B_AUX# 270 800 -2500 200 L 50 50 2 1 P
+X DP_A_L3# 271 -800 -2600 200 R 50 50 2 1 P
+X DP_B_AUX 272 800 -2600 200 L 50 50 2 1 P
+X DP_A_L3 273 -800 -2700 200 R 50 50 2 1 P
+X DP_B_HPD 274 800 -2700 200 L 50 50 2 1 P
+X GND 275 -800 -2800 200 R 50 50 2 1 P
+X DP_A_HPD 276 800 -2800 200 L 50 50 2 1 P
+X DP_A_AUX# 277 -800 -2900 200 R 50 50 2 1 P
+X 3V3 278 800 -2900 200 L 50 50 2 1 P
+X DP_A_AUX 279 -800 -3000 200 R 50 50 2 1 P
+X 3V3 280 800 -3000 200 L 50 50 2 1 P
+X PRSNT_L# 281 -800 -3100 200 R 50 50 2 1 P
+ENDDRAW
+ENDDEF
+#
 # Micro_SD_Card
 #
 DEF Micro_SD_Card J 0 40 Y Y 1 F N

From 0d7094b31277a27a9cc655f9452866192f1c9eb7 Mon Sep 17 00:00:00 2001
From: Anton Lysak <antonlysak@gmail.com>
Date: Sat, 30 Mar 2019 20:51:10 +0600
Subject: [PATCH 038/201] Fixed power pins types

---
 Connector.lib | 166 +++++++++++++++++++++++++-------------------------
 1 file changed, 83 insertions(+), 83 deletions(-)

diff --git a/Connector.lib b/Connector.lib
index 619ce68cae..583ea6b66c 100644
--- a/Connector.lib
+++ b/Connector.lib
@@ -10837,72 +10837,72 @@ $ENDFPLIST
 DRAW
 S -600 4100 600 -4100 1 1 0 f
 S -600 -3200 600 3200 2 1 0 f
-X 5V 1 -800 3700 200 R 50 50 1 1 P
+X 5V 1 -800 3700 200 R 50 50 1 1 W
 X RSVD 10 800 3300 200 L 50 50 1 1 P
-X GND 100 800 -1200 200 L 50 50 1 1 P
-X GND 101 -800 -1300 200 R 50 50 1 1 P
+X GND 100 800 -1200 200 L 50 50 1 1 W
+X GND 101 -800 -1300 200 R 50 50 1 1 W
 X PEX_TX6# 102 800 -1300 200 L 50 50 1 1 P
 X PEX_RX6# 103 -800 -1400 200 R 50 50 1 1 P
 X PEX_TX6 104 800 -1400 200 L 50 50 1 1 P
 X PEX_RX6 105 -800 -1500 200 R 50 50 1 1 P
-X GND 106 800 -1500 200 L 50 50 1 1 P
-X GND 107 -800 -1600 200 R 50 50 1 1 P
+X GND 106 800 -1500 200 L 50 50 1 1 W
+X GND 107 -800 -1600 200 R 50 50 1 1 W
 X PEX_TX5# 108 800 -1600 200 L 50 50 1 1 P
 X PEX_RX5# 109 -800 -1700 200 R 50 50 1 1 P
-X GND 11 -800 3200 200 R 50 50 1 1 P
+X GND 11 -800 3200 200 R 50 50 1 1 W
 X PEX_TX5 110 800 -1700 200 L 50 50 1 1 P
 X PEX_RX5 111 -800 -1800 200 R 50 50 1 1 P
-X GND 112 800 -1800 200 L 50 50 1 1 P
-X GND 113 -800 -1900 200 R 50 50 1 1 P
+X GND 112 800 -1800 200 L 50 50 1 1 W
+X GND 113 -800 -1900 200 R 50 50 1 1 W
 X PEX_TX4# 114 800 -1900 200 L 50 50 1 1 P
 X PEX_RX4# 115 -800 -2000 200 R 50 50 1 1 P
 X PEX_TX4 116 800 -2000 200 L 50 50 1 1 P
 X PEX_RX4 117 -800 -2100 200 R 50 50 1 1 P
-X GND 118 800 -2100 200 L 50 50 1 1 P
-X GND 119 -800 -2200 200 R 50 50 1 1 P
+X GND 118 800 -2100 200 L 50 50 1 1 W
+X GND 119 -800 -2200 200 R 50 50 1 1 W
 X RSVD 12 800 3200 200 L 50 50 1 1 P
 X PEX_TX3# 120 800 -2200 200 L 50 50 1 1 P
 X PEX_RX3# 121 -800 -2300 200 R 50 50 1 1 P
 X PEX_TX3 122 800 -2300 200 L 50 50 1 1 P
 X PEX_RX3 123 -800 -2400 200 R 50 50 1 1 P
-X GND 124 800 -2400 200 L 50 50 1 1 P
-X GND 125 -800 -2500 200 R 50 50 1 1 P
+X GND 124 800 -2400 200 L 50 50 1 1 W
+X GND 125 -800 -2500 200 R 50 50 1 1 W
 X KEY 126 800 -2500 200 L 50 50 1 1 P
 X KEY 127 -800 -2600 200 R 50 50 1 1 P
 X KEY 128 800 -2600 200 L 50 50 1 1 P
 X KEY 129 -800 -2700 200 R 50 50 1 1 P
-X GND 13 -800 3100 200 R 50 50 1 1 P
+X GND 13 -800 3100 200 R 50 50 1 1 W
 X KEY 130 800 -2700 200 L 50 50 1 1 P
 X KEY 131 -800 -2800 200 R 50 50 1 1 P
 X KEY 132 800 -2800 200 L 50 50 1 1 P
-X GND 133 -800 -2900 200 R 50 50 1 1 P
-X GND 134 800 -2900 200 L 50 50 1 1 P
+X GND 133 -800 -2900 200 R 50 50 1 1 W
+X GND 134 800 -2900 200 L 50 50 1 1 W
 X PEX_RX2# 135 -800 -3000 200 R 50 50 1 1 P
 X PEX_TX2# 136 800 -3000 200 L 50 50 1 1 P
 X PEX_RX2 137 -800 -3100 200 R 50 50 1 1 P
 X PEX_TX2 138 800 -3100 200 L 50 50 1 1 P
-X GND 139 -800 -3200 200 R 50 50 1 1 P
+X GND 139 -800 -3200 200 R 50 50 1 1 W
 X RSVD 14 800 3100 200 L 50 50 1 1 P
-X GND 140 800 -3200 200 L 50 50 1 1 P
+X GND 140 800 -3200 200 L 50 50 1 1 W
 X PEX_RX1# 141 -800 -3300 200 R 50 50 1 1 P
 X PEX_TX1# 142 800 -3300 200 L 50 50 1 1 P
 X PEX_RX1 143 -800 -3400 200 R 50 50 1 1 P
 X PEX_TX1 144 800 -3400 200 L 50 50 1 1 P
-X GND 145 -800 -3500 200 R 50 50 1 1 P
-X GND 146 800 -3500 200 L 50 50 1 1 P
+X GND 145 -800 -3500 200 R 50 50 1 1 W
+X GND 146 800 -3500 200 L 50 50 1 1 W
 X PEX_RX0# 147 -800 -3600 200 R 50 50 1 1 P
 X PEX_TX0# 148 800 -3600 200 L 50 50 1 1 P
 X PEX_RX0 149 -800 -3700 200 R 50 50 1 1 P
-X GND 15 -800 3000 200 R 50 50 1 1 P
+X GND 15 -800 3000 200 R 50 50 1 1 W
 X PEX_TX0 150 800 -3700 200 L 50 50 1 1 P
-X GND 151 -800 -3800 200 R 50 50 1 1 P
-X GND 152 800 -3800 200 L 50 50 1 1 P
+X GND 151 -800 -3800 200 R 50 50 1 1 W
+X GND 152 800 -3800 200 L 50 50 1 1 W
 X PEX_REFCLK# 153 -800 -3900 200 R 50 50 1 1 P
 X PEX_CLK_REQ# 154 800 -3900 200 L 50 50 1 1 P
 X PEX_REFCLK 155 -800 -4000 200 R 50 50 1 1 P
 X PEX_RST# 156 800 -4000 200 L 50 50 1 1 P
 X RSVD 16 800 3000 200 L 50 50 1 1 P
-X GND 17 -800 2900 200 R 50 50 1 1 P
+X GND 17 -800 2900 200 R 50 50 1 1 W
 X PWR_LEVEL 18 800 2900 200 L 50 50 1 1 P
 X PEX_STD_SW# 19 -800 2800 200 R 50 50 1 1 P
 X PRSNT_R# 2 800 3700 200 L 50 50 1 1 P
@@ -10916,7 +10916,7 @@ X GPIO0 26 800 2500 200 L 50 50 1 1 P
 X PNL_BL_PWN 27 -800 2400 200 R 50 50 1 1 P
 X GPIO1 28 800 2400 200 L 50 50 1 1 P
 X HDMI_CEC 29 -800 2300 200 R 50 50 1 1 P
-X 5V 3 -800 3600 200 R 50 50 1 1 P
+X 5V 3 -800 3600 200 R 50 50 1 1 W
 X GPIO2 30 800 2300 200 L 50 50 1 1 P
 X DVI_HPD 31 -800 2200 200 R 50 50 1 1 P
 X SMB_DAT 32 800 2200 200 L 50 50 1 1 P
@@ -10924,7 +10924,7 @@ X LVDS_DDC_DAT 33 -800 2100 200 R 50 50 1 1 P
 X SMB_CLK 34 800 2100 200 L 50 50 1 1 P
 X LVDS_DDC_CLK 35 -800 2000 200 R 50 50 1 1 P
 X GND 36 800 2000 200 L 50 50 1 1 P
-X GND 37 -800 1900 200 R 50 50 1 1 P
+X GND 37 -800 1900 200 R 50 50 1 1 W
 X OEM 38 800 1900 200 L 50 50 1 1 P
 X OEM 39 -800 1800 200 R 50 50 1 1 P
 X WAKE# 4 800 3600 200 L 50 50 1 1 P
@@ -10934,70 +10934,70 @@ X OEM 42 800 1700 200 L 50 50 1 1 P
 X OEM 43 -800 1600 200 R 50 50 1 1 P
 X OEM 44 800 1600 200 L 50 50 1 1 P
 X OEM 45 -800 1500 200 R 50 50 1 1 P
-X GND 46 800 1500 200 L 50 50 1 1 P
-X GND 47 -800 1400 200 R 50 50 1 1 P
+X GND 46 800 1500 200 L 50 50 1 1 W
+X GND 47 -800 1400 200 R 50 50 1 1 W
 X PEX_TX15# 48 800 1400 200 L 50 50 1 1 P
 X PEX_RX15# 49 -800 1300 200 R 50 50 1 1 P
-X 5V 5 -800 3500 200 R 50 50 1 1 P
+X 5V 5 -800 3500 200 R 50 50 1 1 W
 X PEX_TX15 50 800 1300 200 L 50 50 1 1 P
 X PEX_RX15 51 -800 1200 200 R 50 50 1 1 P
-X GND 52 800 1200 200 L 50 50 1 1 P
-X GND 53 -800 1100 200 R 50 50 1 1 P
+X GND 52 800 1200 200 L 50 50 1 1 W
+X GND 53 -800 1100 200 R 50 50 1 1 W
 X PEX_TX14# 54 800 1100 200 L 50 50 1 1 P
 X PEX_RX14# 55 -800 1000 200 R 50 50 1 1 P
 X PEX_TX14 56 800 1000 200 L 50 50 1 1 P
 X PEX_RX14 57 -800 900 200 R 50 50 1 1 P
-X GND 58 800 900 200 L 50 50 1 1 P
-X GND 59 -800 800 200 R 50 50 1 1 P
+X GND 58 800 900 200 L 50 50 1 1 W
+X GND 59 -800 800 200 R 50 50 1 1 W
 X PWR_GOOD 6 800 3500 200 L 50 50 1 1 P
 X PEX_TX13# 60 800 800 200 L 50 50 1 1 P
 X PEX_RX13# 61 -800 700 200 R 50 50 1 1 P
 X PEX_TX13 62 800 700 200 L 50 50 1 1 P
 X PEX_RX13 63 -800 600 200 R 50 50 1 1 P
-X GND 64 800 600 200 L 50 50 1 1 P
-X GND 65 -800 500 200 R 50 50 1 1 P
+X GND 64 800 600 200 L 50 50 1 1 W
+X GND 65 -800 500 200 R 50 50 1 1 W
 X PEX_TX12# 66 800 500 200 L 50 50 1 1 P
 X PEX_RX12# 67 -800 400 200 R 50 50 1 1 P
 X PEX_TX12 68 800 400 200 L 50 50 1 1 P
 X PEX_RX12 69 -800 300 200 R 50 50 1 1 P
-X 5V 7 -800 3400 200 R 50 50 1 1 P
-X GND 70 800 300 200 L 50 50 1 1 P
-X GND 71 -800 200 200 R 50 50 1 1 P
+X 5V 7 -800 3400 200 R 50 50 1 1 W
+X GND 70 800 300 200 L 50 50 1 1 W
+X GND 71 -800 200 200 R 50 50 1 1 W
 X PEX_TX11# 72 800 200 200 L 50 50 1 1 P
 X PEX_RX11# 73 -800 100 200 R 50 50 1 1 P
 X PEX_TX11 74 800 100 200 L 50 50 1 1 P
 X PEX_RX11 75 -800 0 200 R 50 50 1 1 P
-X GND 76 800 0 200 L 50 50 1 1 P
-X GND 77 -800 -100 200 R 50 50 1 1 P
+X GND 76 800 0 200 L 50 50 1 1 W
+X GND 77 -800 -100 200 R 50 50 1 1 W
 X PEX_TX10# 78 800 -100 200 L 50 50 1 1 P
 X PEX_RX10# 79 -800 -200 200 R 50 50 1 1 P
 X PWR_EN 8 800 3400 200 L 50 50 1 1 P
 X PEX_TX10 80 800 -200 200 L 50 50 1 1 P
 X PEX_RX10 81 -800 -300 200 R 50 50 1 1 P
-X GND 82 800 -300 200 L 50 50 1 1 P
-X GND 83 -800 -400 200 R 50 50 1 1 P
+X GND 82 800 -300 200 L 50 50 1 1 W
+X GND 83 -800 -400 200 R 50 50 1 1 W
 X PEX_TX9# 84 800 -400 200 L 50 50 1 1 P
 X PEX_RX9# 85 -800 -500 200 R 50 50 1 1 P
 X PEX_TX9 86 800 -500 200 L 50 50 1 1 P
 X PEX_RX9 87 -800 -600 200 R 50 50 1 1 P
-X GND 88 800 -600 200 L 50 50 1 1 P
-X GND 89 -800 -700 200 R 50 50 1 1 P
-X 5V 9 -800 3300 200 R 50 50 1 1 P
+X GND 88 800 -600 200 L 50 50 1 1 W
+X GND 89 -800 -700 200 R 50 50 1 1 W
+X 5V 9 -800 3300 200 R 50 50 1 1 W
 X PEX_TX8# 90 800 -700 200 L 50 50 1 1 P
 X PEX_RX8# 91 -800 -800 200 R 50 50 1 1 P
 X PEX_TX8 92 800 -800 200 L 50 50 1 1 P
 X PEX_RX8 93 -800 -900 200 R 50 50 1 1 P
-X GND 94 800 -900 200 L 50 50 1 1 P
-X GND 95 -800 -1000 200 R 50 50 1 1 P
+X GND 94 800 -900 200 L 50 50 1 1 W
+X GND 95 -800 -1000 200 R 50 50 1 1 W
 X PEX_TX7# 96 800 -1000 200 L 50 50 1 1 P
 X PEX_RX7# 97 -800 -1100 200 R 50 50 1 1 P
 X PEX_TX7 98 800 -1100 200 L 50 50 1 1 P
 X PEX_RX7 99 -800 -1200 200 R 50 50 1 1 P
-X PWR_SRC E1 -800 3900 200 R 50 50 1 1 P
-X PWR_SRC E2 800 3900 200 L 50 50 1 1 P
-X GND E3 -800 3800 200 R 50 50 1 1 P
-X GND E4 800 3800 200 L 50 50 1 1 P
-X GND 157 -800 3100 200 R 50 50 2 1 P
+X PWR_SRC E1 -800 3900 200 R 50 50 1 1 W
+X PWR_SRC E2 800 3900 200 L 50 50 1 1 W
+X GND E3 -800 3800 200 R 50 50 1 1 W
+X GND E4 800 3800 200 L 50 50 1 1 W
+X GND 157 -800 3100 200 R 50 50 2 1 W
 X VGA_DDC_DAT 158 800 3100 200 L 50 50 2 1 P
 X RSVD 159 -800 3000 200 R 50 50 2 1 P
 X VGA_DDC_CLK 160 800 3000 200 L 50 50 2 1 P
@@ -11006,69 +11006,69 @@ X VGA_VSYNC 162 800 2900 200 L 50 50 2 1 P
 X RSVD 163 -800 2800 200 R 50 50 2 1 P
 X VGA_HSYNC 164 800 2800 200 L 50 50 2 1 P
 X RSVD 165 -800 2700 200 R 50 50 2 1 P
-X GND 166 800 2700 200 L 50 50 2 1 P
+X GND 166 800 2700 200 L 50 50 2 1 W
 X RSVD 167 -800 2600 200 R 50 50 2 1 P
 X VGA_RED 168 800 2600 200 L 50 50 2 1 P
 X LVDS_UCLK# 169 -800 2500 200 R 50 50 2 1 P
 X VGA_GREEN 170 800 2500 200 L 50 50 2 1 P
 X LVDS_UCLK 171 -800 2400 200 R 50 50 2 1 P
 X VGA_BLUE 172 800 2400 200 L 50 50 2 1 P
-X GND 173 -800 2300 200 R 50 50 2 1 P
-X GND 174 800 2300 200 L 50 50 2 1 P
+X GND 173 -800 2300 200 R 50 50 2 1 W
+X GND 174 800 2300 200 L 50 50 2 1 W
 X LVDS_UTX3# 175 -800 2200 200 R 50 50 2 1 P
 X LVDS_LCLK# 176 800 2200 200 L 50 50 2 1 P
 X LVDS_UTX3 177 -800 2100 200 R 50 50 2 1 P
 X LVDS_LCLK 178 800 2100 200 L 50 50 2 1 P
-X GND 179 -800 2000 200 R 50 50 2 1 P
-X GND 180 800 2000 200 L 50 50 2 1 P
+X GND 179 -800 2000 200 R 50 50 2 1 W
+X GND 180 800 2000 200 L 50 50 2 1 W
 X LVDS_UTX2# 181 -800 1900 200 R 50 50 2 1 P
 X LVDS_LTX3# 182 800 1900 200 L 50 50 2 1 P
 X LVDS_UTX2 183 -800 1800 200 R 50 50 2 1 P
 X LVDS_LTX3 184 800 1800 200 L 50 50 2 1 P
-X GND 185 -800 1700 200 R 50 50 2 1 P
-X GND 186 800 1700 200 L 50 50 2 1 P
+X GND 185 -800 1700 200 R 50 50 2 1 W
+X GND 186 800 1700 200 L 50 50 2 1 W
 X LVDS_UTX1# 187 -800 1600 200 R 50 50 2 1 P
 X LVDS_LTX2# 188 800 1600 200 L 50 50 2 1 P
 X LVDS_UTX1 189 -800 1500 200 R 50 50 2 1 P
 X LVDS_LTX2 190 800 1500 200 L 50 50 2 1 P
-X GND 191 -800 1400 200 R 50 50 2 1 P
-X GND 192 800 1400 200 L 50 50 2 1 P
+X GND 191 -800 1400 200 R 50 50 2 1 W
+X GND 192 800 1400 200 L 50 50 2 1 W
 X LVDS_UTX0# 193 -800 1300 200 R 50 50 2 1 P
 X LVDS_LTX1# 194 800 1300 200 L 50 50 2 1 P
 X LVDS_UTX0 195 -800 1200 200 R 50 50 2 1 P
 X LVDS_LTX1 196 800 1200 200 L 50 50 2 1 P
-X GND 197 -800 1100 200 R 50 50 2 1 P
-X GND 198 800 1100 200 L 50 50 2 1 P
+X GND 197 -800 1100 200 R 50 50 2 1 W
+X GND 198 800 1100 200 L 50 50 2 1 W
 X DP_C_L0# 199 -800 1000 200 R 50 50 2 1 P
 X LVDS_LTX0# 200 800 1000 200 L 50 50 2 1 P
 X DP_C_L0 201 -800 900 200 R 50 50 2 1 P
 X LVDS_LTX0 202 800 900 200 L 50 50 2 1 P
-X GND 203 -800 800 200 R 50 50 2 1 P
-X GND 204 800 800 200 L 50 50 2 1 P
+X GND 203 -800 800 200 R 50 50 2 1 W
+X GND 204 800 800 200 L 50 50 2 1 W
 X DP_C_L1# 205 -800 700 200 R 50 50 2 1 P
 X DP_D_L0# 206 800 700 200 L 50 50 2 1 P
 X DP_C_L1 207 -800 600 200 R 50 50 2 1 P
 X DP_D_L0 208 800 600 200 L 50 50 2 1 P
-X GND 209 -800 500 200 R 50 50 2 1 P
-X GND 210 800 500 200 L 50 50 2 1 P
+X GND 209 -800 500 200 R 50 50 2 1 W
+X GND 210 800 500 200 L 50 50 2 1 W
 X DP_C_L2# 211 -800 400 200 R 50 50 2 1 P
 X DP_D_L1# 212 800 400 200 L 50 50 2 1 P
 X DP_C_L2 213 -800 300 200 R 50 50 2 1 P
 X DP_D_L1 214 800 300 200 L 50 50 2 1 P
-X GND 215 -800 200 200 R 50 50 2 1 P
-X GND 216 800 200 200 L 50 50 2 1 P
+X GND 215 -800 200 200 R 50 50 2 1 W
+X GND 216 800 200 200 L 50 50 2 1 W
 X DP_C_L3# 217 -800 100 200 R 50 50 2 1 P
 X DP_D_L2# 218 800 100 200 L 50 50 2 1 P
 X DP_C_L3 219 -800 0 200 R 50 50 2 1 P
 X DP_D_L2 220 800 0 200 L 50 50 2 1 P
-X GND 221 -800 -100 200 R 50 50 2 1 P
-X GND 222 800 -100 200 L 50 50 2 1 P
+X GND 221 -800 -100 200 R 50 50 2 1 W
+X GND 222 800 -100 200 L 50 50 2 1 W
 X DP_C_AUX# 223 -800 -200 200 R 50 50 2 1 P
 X DP_D_L3# 224 800 -200 200 L 50 50 2 1 P
 X DP_C_AUX 225 -800 -300 200 R 50 50 2 1 P
 X DP_D_L3 226 800 -300 200 L 50 50 2 1 P
 X RSVD 227 -800 -400 200 R 50 50 2 1 P
-X GND 228 800 -400 200 L 50 50 2 1 P
+X GND 228 800 -400 200 L 50 50 2 1 W
 X RSVD 229 -800 -500 200 R 50 50 2 1 P
 X DP_D_AUX# 230 800 -500 200 L 50 50 2 1 P
 X RSVD 231 -800 -600 200 R 50 50 2 1 P
@@ -11084,43 +11084,43 @@ X RSVD 240 800 -1000 200 L 50 50 2 1 P
 X RSVD 241 -800 -1100 200 R 50 50 2 1 P
 X RSVD 242 800 -1100 200 L 50 50 2 1 P
 X RSVD 243 -800 -1200 200 R 50 50 2 1 P
-X GND 244 800 -1200 200 L 50 50 2 1 P
+X GND 244 800 -1200 200 L 50 50 2 1 W
 X RSVD 245 -800 -1300 200 R 50 50 2 1 P
 X DP_B_L0# 246 800 -1300 200 L 50 50 2 1 P
 X RSVD 247 -800 -1400 200 R 50 50 2 1 P
 X DP_B_L0 248 800 -1400 200 L 50 50 2 1 P
 X RSVD 249 -800 -1500 200 R 50 50 2 1 P
-X GND 250 800 -1500 200 L 50 50 2 1 P
-X GND 251 -800 -1600 200 R 50 50 2 1 P
+X GND 250 800 -1500 200 L 50 50 2 1 W
+X GND 251 -800 -1600 200 R 50 50 2 1 W
 X DP_B_L1# 252 800 -1600 200 L 50 50 2 1 P
 X DP_A_L0# 253 -800 -1700 200 R 50 50 2 1 P
 X DP_B_L1 254 800 -1700 200 L 50 50 2 1 P
 X DP_A_L0 255 -800 -1800 200 R 50 50 2 1 P
-X GND 256 800 -1800 200 L 50 50 2 1 P
-X GND 257 -800 -1900 200 R 50 50 2 1 P
+X GND 256 800 -1800 200 L 50 50 2 1 W
+X GND 257 -800 -1900 200 R 50 50 2 1 W
 X DP_B_L2# 258 800 -1900 200 L 50 50 2 1 P
 X DP_A_L1# 259 -800 -2000 200 R 50 50 2 1 P
 X DP_B_L2 260 800 -2000 200 L 50 50 2 1 P
 X DP_A_L1 261 -800 -2100 200 R 50 50 2 1 P
-X GND 262 800 -2100 200 L 50 50 2 1 P
-X GND 263 -800 -2200 200 R 50 50 2 1 P
+X GND 262 800 -2100 200 L 50 50 2 1 W
+X GND 263 -800 -2200 200 R 50 50 2 1 W
 X DP_B_L3# 264 800 -2200 200 L 50 50 2 1 P
 X DP_A_L2# 265 -800 -2300 200 R 50 50 2 1 P
 X DP_B_L3 266 800 -2300 200 L 50 50 2 1 P
 X DP_A_L2 267 -800 -2400 200 R 50 50 2 1 P
-X GND 268 800 -2400 200 L 50 50 2 1 P
-X GND 269 -800 -2500 200 R 50 50 2 1 P
+X GND 268 800 -2400 200 L 50 50 2 1 W
+X GND 269 -800 -2500 200 R 50 50 2 1 W
 X DP_B_AUX# 270 800 -2500 200 L 50 50 2 1 P
 X DP_A_L3# 271 -800 -2600 200 R 50 50 2 1 P
 X DP_B_AUX 272 800 -2600 200 L 50 50 2 1 P
 X DP_A_L3 273 -800 -2700 200 R 50 50 2 1 P
 X DP_B_HPD 274 800 -2700 200 L 50 50 2 1 P
-X GND 275 -800 -2800 200 R 50 50 2 1 P
+X GND 275 -800 -2800 200 R 50 50 2 1 W
 X DP_A_HPD 276 800 -2800 200 L 50 50 2 1 P
 X DP_A_AUX# 277 -800 -2900 200 R 50 50 2 1 P
-X 3V3 278 800 -2900 200 L 50 50 2 1 P
+X 3V3 278 800 -2900 200 L 50 50 2 1 W
 X DP_A_AUX 279 -800 -3000 200 R 50 50 2 1 P
-X 3V3 280 800 -3000 200 L 50 50 2 1 P
+X 3V3 280 800 -3000 200 L 50 50 2 1 W
 X PRSNT_L# 281 -800 -3100 200 R 50 50 2 1 P
 ENDDRAW
 ENDDEF

From 70dde9bb35f6ceaee7c6fdf6e77f047b11b80b8f Mon Sep 17 00:00:00 2001
From: Anton Lysak <antonlysak@gmail.com>
Date: Sat, 30 Mar 2019 20:57:52 +0600
Subject: [PATCH 039/201] GND pin type fixed

---
 Connector.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Connector.lib b/Connector.lib
index 583ea6b66c..3dbffcf5f5 100644
--- a/Connector.lib
+++ b/Connector.lib
@@ -10923,7 +10923,7 @@ X SMB_DAT 32 800 2200 200 L 50 50 1 1 P
 X LVDS_DDC_DAT 33 -800 2100 200 R 50 50 1 1 P
 X SMB_CLK 34 800 2100 200 L 50 50 1 1 P
 X LVDS_DDC_CLK 35 -800 2000 200 R 50 50 1 1 P
-X GND 36 800 2000 200 L 50 50 1 1 P
+X GND 36 800 2000 200 L 50 50 1 1 W
 X GND 37 -800 1900 200 R 50 50 1 1 W
 X OEM 38 800 1900 200 L 50 50 1 1 P
 X OEM 39 -800 1800 200 R 50 50 1 1 P

From 442a074b09dff1d509b79c2682f7bf03b504e9c9 Mon Sep 17 00:00:00 2001
From: Anton Lysak <antonlysak@gmail.com>
Date: Sun, 31 Mar 2019 16:34:02 +0600
Subject: [PATCH 040/201] Reworked: pins grouped, units merged

---
 Connector.lib | 583 +++++++++++++++++++++++++-------------------------
 1 file changed, 291 insertions(+), 292 deletions(-)

diff --git a/Connector.lib b/Connector.lib
index 3dbffcf5f5..fbfb4145d4 100644
--- a/Connector.lib
+++ b/Connector.lib
@@ -10826,302 +10826,301 @@ ENDDEF
 #
 # MXM3.0
 #
-DEF MXM3.0 J 0 20 Y Y 2 L N
-F0 "J" 0 4300 50 H V C CNN
-F1 "MXM3.0" 0 4200 50 H V C CNN
-F2 "" 1400 4100 50 H I C CNN
-F3 "" 1400 4100 50 H I C CNN
+DEF MXM3.0 J 0 20 Y Y 1 F N
+F0 "J" 0 50 50 H V C CNN
+F1 "MXM3.0" 0 -50 50 H V C CNN
+F2 "" 50 5250 50 H I C CNN
+F3 "" 50 5250 50 H I C CNN
 $FPLIST
  *JAE?MM70?314?310B1*
 $ENDFPLIST
 DRAW
-S -600 4100 600 -4100 1 1 0 f
-S -600 -3200 600 3200 2 1 0 f
-X 5V 1 -800 3700 200 R 50 50 1 1 W
-X RSVD 10 800 3300 200 L 50 50 1 1 P
-X GND 100 800 -1200 200 L 50 50 1 1 W
-X GND 101 -800 -1300 200 R 50 50 1 1 W
-X PEX_TX6# 102 800 -1300 200 L 50 50 1 1 P
-X PEX_RX6# 103 -800 -1400 200 R 50 50 1 1 P
-X PEX_TX6 104 800 -1400 200 L 50 50 1 1 P
-X PEX_RX6 105 -800 -1500 200 R 50 50 1 1 P
-X GND 106 800 -1500 200 L 50 50 1 1 W
-X GND 107 -800 -1600 200 R 50 50 1 1 W
-X PEX_TX5# 108 800 -1600 200 L 50 50 1 1 P
-X PEX_RX5# 109 -800 -1700 200 R 50 50 1 1 P
-X GND 11 -800 3200 200 R 50 50 1 1 W
-X PEX_TX5 110 800 -1700 200 L 50 50 1 1 P
-X PEX_RX5 111 -800 -1800 200 R 50 50 1 1 P
-X GND 112 800 -1800 200 L 50 50 1 1 W
-X GND 113 -800 -1900 200 R 50 50 1 1 W
-X PEX_TX4# 114 800 -1900 200 L 50 50 1 1 P
-X PEX_RX4# 115 -800 -2000 200 R 50 50 1 1 P
-X PEX_TX4 116 800 -2000 200 L 50 50 1 1 P
-X PEX_RX4 117 -800 -2100 200 R 50 50 1 1 P
-X GND 118 800 -2100 200 L 50 50 1 1 W
-X GND 119 -800 -2200 200 R 50 50 1 1 W
-X RSVD 12 800 3200 200 L 50 50 1 1 P
-X PEX_TX3# 120 800 -2200 200 L 50 50 1 1 P
-X PEX_RX3# 121 -800 -2300 200 R 50 50 1 1 P
-X PEX_TX3 122 800 -2300 200 L 50 50 1 1 P
-X PEX_RX3 123 -800 -2400 200 R 50 50 1 1 P
-X GND 124 800 -2400 200 L 50 50 1 1 W
-X GND 125 -800 -2500 200 R 50 50 1 1 W
-X KEY 126 800 -2500 200 L 50 50 1 1 P
-X KEY 127 -800 -2600 200 R 50 50 1 1 P
-X KEY 128 800 -2600 200 L 50 50 1 1 P
-X KEY 129 -800 -2700 200 R 50 50 1 1 P
-X GND 13 -800 3100 200 R 50 50 1 1 W
-X KEY 130 800 -2700 200 L 50 50 1 1 P
-X KEY 131 -800 -2800 200 R 50 50 1 1 P
-X KEY 132 800 -2800 200 L 50 50 1 1 P
-X GND 133 -800 -2900 200 R 50 50 1 1 W
-X GND 134 800 -2900 200 L 50 50 1 1 W
-X PEX_RX2# 135 -800 -3000 200 R 50 50 1 1 P
-X PEX_TX2# 136 800 -3000 200 L 50 50 1 1 P
-X PEX_RX2 137 -800 -3100 200 R 50 50 1 1 P
-X PEX_TX2 138 800 -3100 200 L 50 50 1 1 P
-X GND 139 -800 -3200 200 R 50 50 1 1 W
-X RSVD 14 800 3100 200 L 50 50 1 1 P
-X GND 140 800 -3200 200 L 50 50 1 1 W
-X PEX_RX1# 141 -800 -3300 200 R 50 50 1 1 P
-X PEX_TX1# 142 800 -3300 200 L 50 50 1 1 P
-X PEX_RX1 143 -800 -3400 200 R 50 50 1 1 P
-X PEX_TX1 144 800 -3400 200 L 50 50 1 1 P
-X GND 145 -800 -3500 200 R 50 50 1 1 W
-X GND 146 800 -3500 200 L 50 50 1 1 W
-X PEX_RX0# 147 -800 -3600 200 R 50 50 1 1 P
-X PEX_TX0# 148 800 -3600 200 L 50 50 1 1 P
-X PEX_RX0 149 -800 -3700 200 R 50 50 1 1 P
-X GND 15 -800 3000 200 R 50 50 1 1 W
-X PEX_TX0 150 800 -3700 200 L 50 50 1 1 P
-X GND 151 -800 -3800 200 R 50 50 1 1 W
-X GND 152 800 -3800 200 L 50 50 1 1 W
-X PEX_REFCLK# 153 -800 -3900 200 R 50 50 1 1 P
-X PEX_CLK_REQ# 154 800 -3900 200 L 50 50 1 1 P
-X PEX_REFCLK 155 -800 -4000 200 R 50 50 1 1 P
-X PEX_RST# 156 800 -4000 200 L 50 50 1 1 P
-X RSVD 16 800 3000 200 L 50 50 1 1 P
-X GND 17 -800 2900 200 R 50 50 1 1 W
-X PWR_LEVEL 18 800 2900 200 L 50 50 1 1 P
-X PEX_STD_SW# 19 -800 2800 200 R 50 50 1 1 P
-X PRSNT_R# 2 800 3700 200 L 50 50 1 1 P
-X TH_OVERT# 20 800 2800 200 L 50 50 1 1 P
-X VGA_DISABLE# 21 -800 2700 200 R 50 50 1 1 P
-X TH_ALERT# 22 800 2700 200 L 50 50 1 1 P
-X PNL_PWR_EN 23 -800 2600 200 R 50 50 1 1 P
-X TH_PWN 24 800 2600 200 L 50 50 1 1 P
-X PNL_BL_EN 25 -800 2500 200 R 50 50 1 1 P
-X GPIO0 26 800 2500 200 L 50 50 1 1 P
-X PNL_BL_PWN 27 -800 2400 200 R 50 50 1 1 P
-X GPIO1 28 800 2400 200 L 50 50 1 1 P
-X HDMI_CEC 29 -800 2300 200 R 50 50 1 1 P
-X 5V 3 -800 3600 200 R 50 50 1 1 W
-X GPIO2 30 800 2300 200 L 50 50 1 1 P
-X DVI_HPD 31 -800 2200 200 R 50 50 1 1 P
-X SMB_DAT 32 800 2200 200 L 50 50 1 1 P
-X LVDS_DDC_DAT 33 -800 2100 200 R 50 50 1 1 P
-X SMB_CLK 34 800 2100 200 L 50 50 1 1 P
-X LVDS_DDC_CLK 35 -800 2000 200 R 50 50 1 1 P
-X GND 36 800 2000 200 L 50 50 1 1 W
-X GND 37 -800 1900 200 R 50 50 1 1 W
-X OEM 38 800 1900 200 L 50 50 1 1 P
-X OEM 39 -800 1800 200 R 50 50 1 1 P
-X WAKE# 4 800 3600 200 L 50 50 1 1 P
-X OEM 40 800 1800 200 L 50 50 1 1 P
-X OEM 41 -800 1700 200 R 50 50 1 1 P
-X OEM 42 800 1700 200 L 50 50 1 1 P
-X OEM 43 -800 1600 200 R 50 50 1 1 P
-X OEM 44 800 1600 200 L 50 50 1 1 P
-X OEM 45 -800 1500 200 R 50 50 1 1 P
-X GND 46 800 1500 200 L 50 50 1 1 W
-X GND 47 -800 1400 200 R 50 50 1 1 W
-X PEX_TX15# 48 800 1400 200 L 50 50 1 1 P
-X PEX_RX15# 49 -800 1300 200 R 50 50 1 1 P
-X 5V 5 -800 3500 200 R 50 50 1 1 W
-X PEX_TX15 50 800 1300 200 L 50 50 1 1 P
-X PEX_RX15 51 -800 1200 200 R 50 50 1 1 P
-X GND 52 800 1200 200 L 50 50 1 1 W
-X GND 53 -800 1100 200 R 50 50 1 1 W
-X PEX_TX14# 54 800 1100 200 L 50 50 1 1 P
-X PEX_RX14# 55 -800 1000 200 R 50 50 1 1 P
-X PEX_TX14 56 800 1000 200 L 50 50 1 1 P
-X PEX_RX14 57 -800 900 200 R 50 50 1 1 P
-X GND 58 800 900 200 L 50 50 1 1 W
-X GND 59 -800 800 200 R 50 50 1 1 W
-X PWR_GOOD 6 800 3500 200 L 50 50 1 1 P
-X PEX_TX13# 60 800 800 200 L 50 50 1 1 P
-X PEX_RX13# 61 -800 700 200 R 50 50 1 1 P
-X PEX_TX13 62 800 700 200 L 50 50 1 1 P
-X PEX_RX13 63 -800 600 200 R 50 50 1 1 P
-X GND 64 800 600 200 L 50 50 1 1 W
-X GND 65 -800 500 200 R 50 50 1 1 W
-X PEX_TX12# 66 800 500 200 L 50 50 1 1 P
-X PEX_RX12# 67 -800 400 200 R 50 50 1 1 P
-X PEX_TX12 68 800 400 200 L 50 50 1 1 P
-X PEX_RX12 69 -800 300 200 R 50 50 1 1 P
-X 5V 7 -800 3400 200 R 50 50 1 1 W
-X GND 70 800 300 200 L 50 50 1 1 W
-X GND 71 -800 200 200 R 50 50 1 1 W
-X PEX_TX11# 72 800 200 200 L 50 50 1 1 P
-X PEX_RX11# 73 -800 100 200 R 50 50 1 1 P
-X PEX_TX11 74 800 100 200 L 50 50 1 1 P
-X PEX_RX11 75 -800 0 200 R 50 50 1 1 P
-X GND 76 800 0 200 L 50 50 1 1 W
-X GND 77 -800 -100 200 R 50 50 1 1 W
-X PEX_TX10# 78 800 -100 200 L 50 50 1 1 P
-X PEX_RX10# 79 -800 -200 200 R 50 50 1 1 P
-X PWR_EN 8 800 3400 200 L 50 50 1 1 P
-X PEX_TX10 80 800 -200 200 L 50 50 1 1 P
-X PEX_RX10 81 -800 -300 200 R 50 50 1 1 P
-X GND 82 800 -300 200 L 50 50 1 1 W
-X GND 83 -800 -400 200 R 50 50 1 1 W
-X PEX_TX9# 84 800 -400 200 L 50 50 1 1 P
-X PEX_RX9# 85 -800 -500 200 R 50 50 1 1 P
-X PEX_TX9 86 800 -500 200 L 50 50 1 1 P
-X PEX_RX9 87 -800 -600 200 R 50 50 1 1 P
-X GND 88 800 -600 200 L 50 50 1 1 W
-X GND 89 -800 -700 200 R 50 50 1 1 W
-X 5V 9 -800 3300 200 R 50 50 1 1 W
-X PEX_TX8# 90 800 -700 200 L 50 50 1 1 P
-X PEX_RX8# 91 -800 -800 200 R 50 50 1 1 P
-X PEX_TX8 92 800 -800 200 L 50 50 1 1 P
-X PEX_RX8 93 -800 -900 200 R 50 50 1 1 P
-X GND 94 800 -900 200 L 50 50 1 1 W
-X GND 95 -800 -1000 200 R 50 50 1 1 W
-X PEX_TX7# 96 800 -1000 200 L 50 50 1 1 P
-X PEX_RX7# 97 -800 -1100 200 R 50 50 1 1 P
-X PEX_TX7 98 800 -1100 200 L 50 50 1 1 P
-X PEX_RX7 99 -800 -1200 200 R 50 50 1 1 P
-X PWR_SRC E1 -800 3900 200 R 50 50 1 1 W
-X PWR_SRC E2 800 3900 200 L 50 50 1 1 W
-X GND E3 -800 3800 200 R 50 50 1 1 W
-X GND E4 800 3800 200 L 50 50 1 1 W
-X GND 157 -800 3100 200 R 50 50 2 1 W
-X VGA_DDC_DAT 158 800 3100 200 L 50 50 2 1 P
-X RSVD 159 -800 3000 200 R 50 50 2 1 P
-X VGA_DDC_CLK 160 800 3000 200 L 50 50 2 1 P
-X RSVD 161 -800 2900 200 R 50 50 2 1 P
-X VGA_VSYNC 162 800 2900 200 L 50 50 2 1 P
-X RSVD 163 -800 2800 200 R 50 50 2 1 P
-X VGA_HSYNC 164 800 2800 200 L 50 50 2 1 P
-X RSVD 165 -800 2700 200 R 50 50 2 1 P
-X GND 166 800 2700 200 L 50 50 2 1 W
-X RSVD 167 -800 2600 200 R 50 50 2 1 P
-X VGA_RED 168 800 2600 200 L 50 50 2 1 P
-X LVDS_UCLK# 169 -800 2500 200 R 50 50 2 1 P
-X VGA_GREEN 170 800 2500 200 L 50 50 2 1 P
-X LVDS_UCLK 171 -800 2400 200 R 50 50 2 1 P
-X VGA_BLUE 172 800 2400 200 L 50 50 2 1 P
-X GND 173 -800 2300 200 R 50 50 2 1 W
-X GND 174 800 2300 200 L 50 50 2 1 W
-X LVDS_UTX3# 175 -800 2200 200 R 50 50 2 1 P
-X LVDS_LCLK# 176 800 2200 200 L 50 50 2 1 P
-X LVDS_UTX3 177 -800 2100 200 R 50 50 2 1 P
-X LVDS_LCLK 178 800 2100 200 L 50 50 2 1 P
-X GND 179 -800 2000 200 R 50 50 2 1 W
-X GND 180 800 2000 200 L 50 50 2 1 W
-X LVDS_UTX2# 181 -800 1900 200 R 50 50 2 1 P
-X LVDS_LTX3# 182 800 1900 200 L 50 50 2 1 P
-X LVDS_UTX2 183 -800 1800 200 R 50 50 2 1 P
-X LVDS_LTX3 184 800 1800 200 L 50 50 2 1 P
-X GND 185 -800 1700 200 R 50 50 2 1 W
-X GND 186 800 1700 200 L 50 50 2 1 W
-X LVDS_UTX1# 187 -800 1600 200 R 50 50 2 1 P
-X LVDS_LTX2# 188 800 1600 200 L 50 50 2 1 P
-X LVDS_UTX1 189 -800 1500 200 R 50 50 2 1 P
-X LVDS_LTX2 190 800 1500 200 L 50 50 2 1 P
-X GND 191 -800 1400 200 R 50 50 2 1 W
-X GND 192 800 1400 200 L 50 50 2 1 W
-X LVDS_UTX0# 193 -800 1300 200 R 50 50 2 1 P
-X LVDS_LTX1# 194 800 1300 200 L 50 50 2 1 P
-X LVDS_UTX0 195 -800 1200 200 R 50 50 2 1 P
-X LVDS_LTX1 196 800 1200 200 L 50 50 2 1 P
-X GND 197 -800 1100 200 R 50 50 2 1 W
-X GND 198 800 1100 200 L 50 50 2 1 W
-X DP_C_L0# 199 -800 1000 200 R 50 50 2 1 P
-X LVDS_LTX0# 200 800 1000 200 L 50 50 2 1 P
-X DP_C_L0 201 -800 900 200 R 50 50 2 1 P
-X LVDS_LTX0 202 800 900 200 L 50 50 2 1 P
-X GND 203 -800 800 200 R 50 50 2 1 W
-X GND 204 800 800 200 L 50 50 2 1 W
-X DP_C_L1# 205 -800 700 200 R 50 50 2 1 P
-X DP_D_L0# 206 800 700 200 L 50 50 2 1 P
-X DP_C_L1 207 -800 600 200 R 50 50 2 1 P
-X DP_D_L0 208 800 600 200 L 50 50 2 1 P
-X GND 209 -800 500 200 R 50 50 2 1 W
-X GND 210 800 500 200 L 50 50 2 1 W
-X DP_C_L2# 211 -800 400 200 R 50 50 2 1 P
-X DP_D_L1# 212 800 400 200 L 50 50 2 1 P
-X DP_C_L2 213 -800 300 200 R 50 50 2 1 P
-X DP_D_L1 214 800 300 200 L 50 50 2 1 P
-X GND 215 -800 200 200 R 50 50 2 1 W
-X GND 216 800 200 200 L 50 50 2 1 W
-X DP_C_L3# 217 -800 100 200 R 50 50 2 1 P
-X DP_D_L2# 218 800 100 200 L 50 50 2 1 P
-X DP_C_L3 219 -800 0 200 R 50 50 2 1 P
-X DP_D_L2 220 800 0 200 L 50 50 2 1 P
-X GND 221 -800 -100 200 R 50 50 2 1 W
-X GND 222 800 -100 200 L 50 50 2 1 W
-X DP_C_AUX# 223 -800 -200 200 R 50 50 2 1 P
-X DP_D_L3# 224 800 -200 200 L 50 50 2 1 P
-X DP_C_AUX 225 -800 -300 200 R 50 50 2 1 P
-X DP_D_L3 226 800 -300 200 L 50 50 2 1 P
-X RSVD 227 -800 -400 200 R 50 50 2 1 P
-X GND 228 800 -400 200 L 50 50 2 1 W
-X RSVD 229 -800 -500 200 R 50 50 2 1 P
-X DP_D_AUX# 230 800 -500 200 L 50 50 2 1 P
-X RSVD 231 -800 -600 200 R 50 50 2 1 P
-X DP_D_AUX 232 800 -600 200 L 50 50 2 1 P
-X RSVD 233 -800 -700 200 R 50 50 2 1 P
-X DP_C_HPD 234 800 -700 200 L 50 50 2 1 P
-X RSVD 235 -800 -800 200 R 50 50 2 1 P
-X DP_D_HPD 236 800 -800 200 L 50 50 2 1 P
-X RSVD 237 -800 -900 200 R 50 50 2 1 P
-X RSVD 238 800 -900 200 L 50 50 2 1 P
-X RSVD 239 -800 -1000 200 R 50 50 2 1 P
-X RSVD 240 800 -1000 200 L 50 50 2 1 P
-X RSVD 241 -800 -1100 200 R 50 50 2 1 P
-X RSVD 242 800 -1100 200 L 50 50 2 1 P
-X RSVD 243 -800 -1200 200 R 50 50 2 1 P
-X GND 244 800 -1200 200 L 50 50 2 1 W
-X RSVD 245 -800 -1300 200 R 50 50 2 1 P
-X DP_B_L0# 246 800 -1300 200 L 50 50 2 1 P
-X RSVD 247 -800 -1400 200 R 50 50 2 1 P
-X DP_B_L0 248 800 -1400 200 L 50 50 2 1 P
-X RSVD 249 -800 -1500 200 R 50 50 2 1 P
-X GND 250 800 -1500 200 L 50 50 2 1 W
-X GND 251 -800 -1600 200 R 50 50 2 1 W
-X DP_B_L1# 252 800 -1600 200 L 50 50 2 1 P
-X DP_A_L0# 253 -800 -1700 200 R 50 50 2 1 P
-X DP_B_L1 254 800 -1700 200 L 50 50 2 1 P
-X DP_A_L0 255 -800 -1800 200 R 50 50 2 1 P
-X GND 256 800 -1800 200 L 50 50 2 1 W
-X GND 257 -800 -1900 200 R 50 50 2 1 W
-X DP_B_L2# 258 800 -1900 200 L 50 50 2 1 P
-X DP_A_L1# 259 -800 -2000 200 R 50 50 2 1 P
-X DP_B_L2 260 800 -2000 200 L 50 50 2 1 P
-X DP_A_L1 261 -800 -2100 200 R 50 50 2 1 P
-X GND 262 800 -2100 200 L 50 50 2 1 W
-X GND 263 -800 -2200 200 R 50 50 2 1 W
-X DP_B_L3# 264 800 -2200 200 L 50 50 2 1 P
-X DP_A_L2# 265 -800 -2300 200 R 50 50 2 1 P
-X DP_B_L3 266 800 -2300 200 L 50 50 2 1 P
-X DP_A_L2 267 -800 -2400 200 R 50 50 2 1 P
-X GND 268 800 -2400 200 L 50 50 2 1 W
-X GND 269 -800 -2500 200 R 50 50 2 1 W
-X DP_B_AUX# 270 800 -2500 200 L 50 50 2 1 P
-X DP_A_L3# 271 -800 -2600 200 R 50 50 2 1 P
-X DP_B_AUX 272 800 -2600 200 L 50 50 2 1 P
-X DP_A_L3 273 -800 -2700 200 R 50 50 2 1 P
-X DP_B_HPD 274 800 -2700 200 L 50 50 2 1 P
-X GND 275 -800 -2800 200 R 50 50 2 1 W
-X DP_A_HPD 276 800 -2800 200 L 50 50 2 1 P
-X DP_A_AUX# 277 -800 -2900 200 R 50 50 2 1 P
-X 3V3 278 800 -2900 200 L 50 50 2 1 W
-X DP_A_AUX 279 -800 -3000 200 R 50 50 2 1 P
-X 3V3 280 800 -3000 200 L 50 50 2 1 W
-X PRSNT_L# 281 -800 -3100 200 R 50 50 2 1 P
+S -600 5200 600 -5400 1 1 0 f
+X 5V 1 -200 5400 200 D 50 50 1 1 W
+X RSVD 10 800 3100 200 L 50 50 1 1 B
+X GND 100 0 -5600 200 U 50 50 1 1 P N
+X GND 101 0 -5600 200 U 50 50 1 1 P N
+X PEX_TX6# 102 -800 600 200 R 50 50 1 1 I
+X PEX_RX6# 103 -800 3800 200 R 50 50 1 1 O
+X PEX_TX6 104 -800 500 200 R 50 50 1 1 I
+X PEX_RX6 105 -800 3700 200 R 50 50 1 1 O
+X GND 106 0 -5600 200 U 50 50 1 1 P N
+X GND 107 0 -5600 200 U 50 50 1 1 P N
+X PEX_TX5# 108 -800 800 200 R 50 50 1 1 I
+X PEX_RX5# 109 -800 4000 200 R 50 50 1 1 O
+X GND 11 0 -5600 200 U 50 50 1 1 P N
+X PEX_TX5 110 -800 700 200 R 50 50 1 1 I
+X PEX_RX5 111 -800 3900 200 R 50 50 1 1 O
+X GND 112 0 -5600 200 U 50 50 1 1 P N
+X GND 113 0 -5600 200 U 50 50 1 1 P N
+X PEX_TX4# 114 -800 1000 200 R 50 50 1 1 I
+X PEX_RX4# 115 -800 4200 200 R 50 50 1 1 O
+X PEX_TX4 116 -800 900 200 R 50 50 1 1 I
+X PEX_RX4 117 -800 4100 200 R 50 50 1 1 O
+X GND 118 0 -5600 200 U 50 50 1 1 P N
+X GND 119 0 -5600 200 U 50 50 1 1 P N
+X RSVD 12 800 3000 200 L 50 50 1 1 B
+X PEX_TX3# 120 -800 1200 200 R 50 50 1 1 I
+X PEX_RX3# 121 -800 4400 200 R 50 50 1 1 O
+X PEX_TX3 122 -800 1100 200 R 50 50 1 1 I
+X PEX_RX3 123 -800 4300 200 R 50 50 1 1 O
+X GND 124 0 -5600 200 U 50 50 1 1 P N
+X GND 125 0 -5600 200 U 50 50 1 1 P N
+X KEY 126 800 -100 200 L 50 50 1 1 P
+X KEY 127 800 -200 200 L 50 50 1 1 P
+X KEY 128 800 -300 200 L 50 50 1 1 P
+X KEY 129 800 -400 200 L 50 50 1 1 P
+X GND 13 0 -5600 200 U 50 50 1 1 P N
+X KEY 130 800 -500 200 L 50 50 1 1 P
+X KEY 131 800 -600 200 L 50 50 1 1 P
+X KEY 132 800 -700 200 L 50 50 1 1 P
+X GND 133 0 -5600 200 U 50 50 1 1 P N
+X GND 134 0 -5600 200 U 50 50 1 1 P N
+X PEX_RX2# 135 -800 4600 200 R 50 50 1 1 O
+X PEX_TX2# 136 -800 1400 200 R 50 50 1 1 I
+X PEX_RX2 137 -800 4500 200 R 50 50 1 1 O
+X PEX_TX2 138 -800 1300 200 R 50 50 1 1 I
+X GND 139 0 -5600 200 U 50 50 1 1 P N
+X RSVD 14 800 2900 200 L 50 50 1 1 B
+X GND 140 0 -5600 200 U 50 50 1 1 P N
+X PEX_RX1# 141 -800 4800 200 R 50 50 1 1 O
+X PEX_TX1# 142 -800 1600 200 R 50 50 1 1 I
+X PEX_RX1 143 -800 4700 200 R 50 50 1 1 O
+X PEX_TX1 144 -800 1500 200 R 50 50 1 1 I
+X GND 145 0 -5600 200 U 50 50 1 1 P N
+X GND 146 0 -5600 200 U 50 50 1 1 P N
+X PEX_RX0# 147 -800 5000 200 R 50 50 1 1 O
+X PEX_TX0# 148 -800 1800 200 R 50 50 1 1 I
+X PEX_RX0 149 -800 4900 200 R 50 50 1 1 O
+X GND 15 0 -5600 200 U 50 50 1 1 P N
+X PEX_TX0 150 -800 1700 200 R 50 50 1 1 I
+X GND 151 0 -5600 200 U 50 50 1 1 P N
+X GND 152 0 -5600 200 U 50 50 1 1 P N
+X PEX_REFCLK# 153 -800 -1400 200 R 50 50 1 1 I
+X PEX_CLK_REQ# 154 -800 -1700 200 R 50 50 1 1 O
+X PEX_REFCLK 155 -800 -1500 200 R 50 50 1 1 I
+X PEX_RST# 156 -800 -1800 200 R 50 50 1 1 I
+X GND 157 0 -5600 200 U 50 50 1 1 P N
+X VGA_DDC_DAT 158 800 4400 200 L 50 50 1 1 B
+X RSVD 159 800 2400 200 L 50 50 1 1 B
+X RSVD 16 800 2800 200 L 50 50 1 1 B
+X VGA_DDC_CLK 160 800 4500 200 L 50 50 1 1 O
+X RSVD 161 800 2300 200 L 50 50 1 1 B
+X VGA_VSYNC 162 800 4700 200 L 50 50 1 1 O
+X RSVD 163 800 2200 200 L 50 50 1 1 B
+X VGA_HSYNC 164 800 4600 200 L 50 50 1 1 O
+X RSVD 165 800 2100 200 L 50 50 1 1 B
+X GND 166 0 -5600 200 U 50 50 1 1 P N
+X RSVD 167 800 2000 200 L 50 50 1 1 B
+X VGA_RED 168 800 5000 200 L 50 50 1 1 O
+X LVDS_UCLK# 169 -800 -2100 200 R 50 50 1 1 O
+X GND 17 0 -5600 200 U 50 50 1 1 P N
+X VGA_GREEN 170 800 4900 200 L 50 50 1 1 O
+X LVDS_UCLK 171 -800 -2200 200 R 50 50 1 1 O
+X VGA_BLUE 172 800 4800 200 L 50 50 1 1 O
+X GND 173 0 -5600 200 U 50 50 1 1 P N
+X GND 174 0 -5600 200 U 50 50 1 1 P N
+X LVDS_UTX3# 175 -800 -2300 200 R 50 50 1 1 O
+X LVDS_LCLK# 176 -800 -3300 200 R 50 50 1 1 O
+X LVDS_UTX3 177 -800 -2400 200 R 50 50 1 1 O
+X LVDS_LCLK 178 -800 -3400 200 R 50 50 1 1 O
+X GND 179 0 -5600 200 U 50 50 1 1 P N
+X PWR_LEVEL 18 -800 -4900 200 R 50 50 1 1 I
+X GND 180 0 -5600 200 U 50 50 1 1 P N
+X LVDS_UTX2# 181 -800 -2500 200 R 50 50 1 1 O
+X LVDS_LTX3# 182 -800 -3500 200 R 50 50 1 1 O
+X LVDS_UTX2 183 -800 -2600 200 R 50 50 1 1 O
+X LVDS_LTX3 184 -800 -3600 200 R 50 50 1 1 O
+X GND 185 0 -5600 200 U 50 50 1 1 P N
+X GND 186 0 -5600 200 U 50 50 1 1 P N
+X LVDS_UTX1# 187 -800 -2700 200 R 50 50 1 1 O
+X LVDS_LTX2# 188 -800 -3700 200 R 50 50 1 1 O
+X LVDS_UTX1 189 -800 -2800 200 R 50 50 1 1 O
+X PEX_STD_SW# 19 -800 -1600 200 R 50 50 1 1 I
+X LVDS_LTX2 190 -800 -3800 200 R 50 50 1 1 O
+X GND 191 0 -5600 200 U 50 50 1 1 P N
+X GND 192 0 -5600 200 U 50 50 1 1 P N
+X LVDS_UTX0# 193 -800 -2900 200 R 50 50 1 1 O
+X LVDS_LTX1# 194 -800 -3900 200 R 50 50 1 1 O
+X LVDS_UTX0 195 -800 -3000 200 R 50 50 1 1 O
+X LVDS_LTX1 196 -800 -4000 200 R 50 50 1 1 O
+X GND 197 0 -5600 200 U 50 50 1 1 P N
+X GND 198 0 -5600 200 U 50 50 1 1 P N
+X DP_C_L0# 199 800 -3100 200 L 50 50 1 1 O
+X PRSNT_R# 2 800 3500 200 L 50 50 1 1 O
+X TH_OVERT# 20 -800 -4600 200 R 50 50 1 1 O
+X LVDS_LTX0# 200 -800 -4100 200 R 50 50 1 1 O
+X DP_C_L0 201 800 -3200 200 L 50 50 1 1 O
+X LVDS_LTX0 202 -800 -4200 200 R 50 50 1 1 O
+X GND 203 0 -5600 200 U 50 50 1 1 P N
+X GND 204 0 -5600 200 U 50 50 1 1 P N
+X DP_C_L1# 205 800 -3300 200 L 50 50 1 1 O
+X DP_D_L0# 206 800 -4200 200 L 50 50 1 1 O
+X DP_C_L1 207 800 -3400 200 L 50 50 1 1 O
+X DP_D_L0 208 800 -4300 200 L 50 50 1 1 O
+X GND 209 0 -5600 200 U 50 50 1 1 P N
+X VGA_DISABLE# 21 800 4200 200 L 50 50 1 1 I
+X GND 210 0 -5600 200 U 50 50 1 1 P N
+X DP_C_L2# 211 800 -3500 200 L 50 50 1 1 O
+X DP_D_L1# 212 800 -4400 200 L 50 50 1 1 O
+X DP_C_L2 213 800 -3600 200 L 50 50 1 1 O
+X DP_D_L1 214 800 -4500 200 L 50 50 1 1 O
+X GND 215 0 -5600 200 U 50 50 1 1 P N
+X GND 216 0 -5600 200 U 50 50 1 1 P N
+X DP_C_L3# 217 800 -3700 200 L 50 50 1 1 O
+X DP_D_L2# 218 800 -4600 200 L 50 50 1 1 O
+X DP_C_L3 219 800 -3800 200 L 50 50 1 1 O
+X TH_ALERT# 22 -800 -4700 200 R 50 50 1 1 B
+X DP_D_L2 220 800 -4700 200 L 50 50 1 1 O
+X GND 221 0 -5600 200 U 50 50 1 1 P N
+X GND 222 0 -5600 200 U 50 50 1 1 P N
+X DP_C_AUX# 223 800 -3900 200 L 50 50 1 1 B
+X DP_D_L3# 224 800 -4800 200 L 50 50 1 1 O
+X DP_C_AUX 225 800 -4000 200 L 50 50 1 1 B
+X DP_D_L3 226 800 -4900 200 L 50 50 1 1 O
+X RSVD 227 800 1900 200 L 50 50 1 1 B
+X GND 228 0 -5600 200 U 50 50 1 1 P N
+X RSVD 229 800 1800 200 L 50 50 1 1 B
+X PNL_PWR_EN 23 800 4100 200 L 50 50 1 1 O
+X DP_D_AUX# 230 800 -5000 200 L 50 50 1 1 B
+X RSVD 231 800 1700 200 L 50 50 1 1 B
+X DP_D_AUX 232 800 -5100 200 L 50 50 1 1 B
+X RSVD 233 800 1600 200 L 50 50 1 1 B
+X DP_C_HPD 234 800 -4100 200 L 50 50 1 1 I
+X RSVD 235 800 1500 200 L 50 50 1 1 B
+X DP_D_HPD 236 800 -5200 200 L 50 50 1 1 I
+X RSVD 237 800 1400 200 L 50 50 1 1 B
+X RSVD 238 800 2700 200 L 50 50 1 1 B
+X RSVD 239 800 1300 200 L 50 50 1 1 B
+X TH_PWN 24 -800 -4800 200 R 50 50 1 1 O
+X RSVD 240 800 2600 200 L 50 50 1 1 B
+X RSVD 241 800 1200 200 L 50 50 1 1 B
+X RSVD 242 800 2500 200 L 50 50 1 1 B
+X RSVD 243 800 1100 200 L 50 50 1 1 B
+X GND 244 0 -5600 200 U 50 50 1 1 P N
+X RSVD 245 800 1000 200 L 50 50 1 1 B
+X DP_B_L0# 246 800 -2000 200 L 50 50 1 1 O
+X RSVD 247 800 900 200 L 50 50 1 1 B
+X DP_B_L0 248 800 -2100 200 L 50 50 1 1 O
+X RSVD 249 800 800 200 L 50 50 1 1 B
+X PNL_BL_EN 25 800 4000 200 L 50 50 1 1 O
+X GND 250 0 -5600 200 U 50 50 1 1 P N
+X GND 251 0 -5600 200 U 50 50 1 1 P N
+X DP_B_L1# 252 800 -2200 200 L 50 50 1 1 O
+X DP_A_L0# 253 800 -900 200 L 50 50 1 1 O
+X DP_B_L1 254 800 -2300 200 L 50 50 1 1 O
+X DP_A_L0 255 800 -1000 200 L 50 50 1 1 O
+X GND 256 0 -5600 200 U 50 50 1 1 P N
+X GND 257 0 -5600 200 U 50 50 1 1 P N
+X DP_B_L2# 258 800 -2400 200 L 50 50 1 1 O
+X DP_A_L1# 259 800 -1100 200 L 50 50 1 1 O
+X GPIO0 26 800 3400 200 L 50 50 1 1 B
+X DP_B_L2 260 800 -2500 200 L 50 50 1 1 O
+X DP_A_L1 261 800 -1200 200 L 50 50 1 1 O
+X GND 262 0 -5600 200 U 50 50 1 1 P N
+X GND 263 0 -5600 200 U 50 50 1 1 P N
+X DP_B_L3# 264 800 -2600 200 L 50 50 1 1 O
+X DP_A_L2# 265 800 -1300 200 L 50 50 1 1 O
+X DP_B_L3 266 800 -2700 200 L 50 50 1 1 O
+X DP_A_L2 267 800 -1400 200 L 50 50 1 1 O
+X GND 268 0 -5600 200 U 50 50 1 1 P N
+X GND 269 0 -5600 200 U 50 50 1 1 P N
+X PNL_BL_PWN 27 800 3900 200 L 50 50 1 1 O
+X DP_B_AUX# 270 800 -2800 200 L 50 50 1 1 B
+X DP_A_L3# 271 800 -1500 200 L 50 50 1 1 O
+X DP_B_AUX 272 800 -2900 200 L 50 50 1 1 B
+X DP_A_L3 273 800 -1600 200 L 50 50 1 1 O
+X DP_B_HPD 274 800 -3000 200 L 50 50 1 1 I
+X GND 275 0 -5600 200 U 50 50 1 1 P N
+X DP_A_HPD 276 800 -1900 200 L 50 50 1 1 I
+X DP_A_AUX# 277 800 -1700 200 L 50 50 1 1 B
+X 3V3 278 200 5400 200 D 50 50 1 1 W
+X DP_A_AUX 279 800 -1800 200 L 50 50 1 1 B
+X GPIO1 28 800 3300 200 L 50 50 1 1 B
+X 3V3 280 200 5400 200 D 50 50 1 1 P N
+X PRSNT_L# 281 800 3600 200 L 50 50 1 1 O
+X HDMI_CEC 29 800 3800 200 L 50 50 1 1 B
+X 5V 3 -200 5400 200 D 50 50 1 1 P N
+X GPIO2 30 800 3200 200 L 50 50 1 1 B
+X DVI_HPD 31 -800 -2000 200 R 50 50 1 1 I
+X SMB_DAT 32 -800 -4400 200 R 50 50 1 1 B
+X LVDS_DDC_DAT 33 -800 -3100 200 R 50 50 1 1 B
+X SMB_CLK 34 -800 -4500 200 R 50 50 1 1 I
+X LVDS_DDC_CLK 35 -800 -3200 200 R 50 50 1 1 O
+X GND 36 0 -5600 200 U 50 50 1 1 P N
+X GND 37 0 -5600 200 U 50 50 1 1 P N
+X OEM 38 800 700 200 L 50 50 1 1 B
+X OEM 39 800 600 200 L 50 50 1 1 B
+X WAKE# 4 800 3700 200 L 50 50 1 1 O
+X OEM 40 800 500 200 L 50 50 1 1 B
+X OEM 41 800 300 200 L 50 50 1 1 B
+X OEM 42 800 400 200 L 50 50 1 1 B
+X OEM 43 800 200 200 L 50 50 1 1 B
+X OEM 44 800 100 200 L 50 50 1 1 B
+X OEM 45 800 0 200 L 50 50 1 1 B
+X GND 46 0 -5600 200 U 50 50 1 1 P N
+X GND 47 0 -5600 200 U 50 50 1 1 P N
+X PEX_TX15# 48 -800 -1200 200 R 50 50 1 1 I
+X PEX_RX15# 49 -800 2000 200 R 50 50 1 1 O
+X 5V 5 -200 5400 200 D 50 50 1 1 P N
+X PEX_TX15 50 -800 -1300 200 R 50 50 1 1 I
+X PEX_RX15 51 -800 1900 200 R 50 50 1 1 O
+X GND 52 0 -5600 200 U 50 50 1 1 P N
+X GND 53 0 -5600 200 U 50 50 1 1 P N
+X PEX_TX14# 54 -800 -1000 200 R 50 50 1 1 I
+X PEX_RX14# 55 -800 2200 200 R 50 50 1 1 O
+X PEX_TX14 56 -800 -1100 200 R 50 50 1 1 I
+X PEX_RX14 57 -800 2100 200 R 50 50 1 1 O
+X GND 58 0 -5600 200 U 50 50 1 1 P N
+X GND 59 0 -5600 200 U 50 50 1 1 P N
+X PWR_GOOD 6 -800 -5000 200 R 50 50 1 1 O
+X PEX_TX13# 60 -800 -800 200 R 50 50 1 1 I
+X PEX_RX13# 61 -800 2400 200 R 50 50 1 1 O
+X PEX_TX13 62 -800 -900 200 R 50 50 1 1 I
+X PEX_RX13 63 -800 2300 200 R 50 50 1 1 O
+X GND 64 0 -5600 200 U 50 50 1 1 P N
+X GND 65 0 -5600 200 U 50 50 1 1 P N
+X PEX_TX12# 66 -800 -600 200 R 50 50 1 1 I
+X PEX_RX12# 67 -800 2600 200 R 50 50 1 1 O
+X PEX_TX12 68 -800 -700 200 R 50 50 1 1 I
+X PEX_RX12 69 -800 2500 200 R 50 50 1 1 O
+X 5V 7 -200 5400 200 D 50 50 1 1 P N
+X GND 70 0 -5600 200 U 50 50 1 1 P N
+X GND 71 0 -5600 200 U 50 50 1 1 P N
+X PEX_TX11# 72 -800 -400 200 R 50 50 1 1 I
+X PEX_RX11# 73 -800 2800 200 R 50 50 1 1 O
+X PEX_TX11 74 -800 -500 200 R 50 50 1 1 I
+X PEX_RX11 75 -800 2700 200 R 50 50 1 1 O
+X GND 76 0 -5600 200 U 50 50 1 1 P N
+X GND 77 0 -5600 200 U 50 50 1 1 P N
+X PEX_TX10# 78 -800 -200 200 R 50 50 1 1 I
+X PEX_RX10# 79 -800 3000 200 R 50 50 1 1 O
+X PWR_EN 8 -800 -5100 200 R 50 50 1 1 I
+X PEX_TX10 80 -800 -300 200 R 50 50 1 1 I
+X PEX_RX10 81 -800 2900 200 R 50 50 1 1 O
+X GND 82 0 -5600 200 U 50 50 1 1 P N
+X GND 83 0 -5600 200 U 50 50 1 1 P N
+X PEX_TX9# 84 -800 0 200 R 50 50 1 1 I
+X PEX_RX9# 85 -800 3200 200 R 50 50 1 1 O
+X PEX_TX9 86 -800 -100 200 R 50 50 1 1 I
+X PEX_RX9 87 -800 3100 200 R 50 50 1 1 O
+X GND 88 0 -5600 200 U 50 50 1 1 P N
+X GND 89 0 -5600 200 U 50 50 1 1 P N
+X 5V 9 -200 5400 200 D 50 50 1 1 P N
+X PEX_TX8# 90 -800 200 200 R 50 50 1 1 I
+X PEX_RX8# 91 -800 3400 200 R 50 50 1 1 O
+X PEX_TX8 92 -800 100 200 R 50 50 1 1 I
+X PEX_RX8 93 -800 3300 200 R 50 50 1 1 O
+X GND 94 0 -5600 200 U 50 50 1 1 P N
+X GND 95 0 -5600 200 U 50 50 1 1 P N
+X PEX_TX7# 96 -800 400 200 R 50 50 1 1 I
+X PEX_RX7# 97 -800 3600 200 R 50 50 1 1 O
+X PEX_TX7 98 -800 300 200 R 50 50 1 1 I
+X PEX_RX7 99 -800 3500 200 R 50 50 1 1 O
+X PWR_SRC E1 0 5400 200 D 50 50 1 1 W
+X PWR_SRC E2 0 5400 200 D 50 50 1 1 P N
+X GND E3 0 -5600 200 U 50 50 1 1 W
+X GND E4 0 -5600 200 U 50 50 1 1 P N
 ENDDRAW
 ENDDEF
 #

From 57902d31263a738f85f6611cad5b9fe82081089a Mon Sep 17 00:00:00 2001
From: Anton Lysak <antonlysak@gmail.com>
Date: Sun, 31 Mar 2019 16:42:49 +0600
Subject: [PATCH 041/201] Travis errors fixed

---
 Connector.dcm |   2 +-
 Connector.lib | 576 +++++++++++++++++++++++++-------------------------
 2 files changed, 289 insertions(+), 289 deletions(-)

diff --git a/Connector.dcm b/Connector.dcm
index a2432a1c0c..2c036b0cff 100644
--- a/Connector.dcm
+++ b/Connector.dcm
@@ -1130,7 +1130,7 @@ $ENDCMP
 #
 $CMP MXM3.0
 D MXM3.0 connector
-K MXM3.0 connector
+K MXM connector
 F https://wenku.baidu.com/view/ecf588fbf705cc175527092d.html
 $ENDCMP
 #
diff --git a/Connector.lib b/Connector.lib
index fbfb4145d4..df352be9d6 100644
--- a/Connector.lib
+++ b/Connector.lib
@@ -10829,298 +10829,298 @@ ENDDEF
 DEF MXM3.0 J 0 20 Y Y 1 F N
 F0 "J" 0 50 50 H V C CNN
 F1 "MXM3.0" 0 -50 50 H V C CNN
-F2 "" 50 5250 50 H I C CNN
-F3 "" 50 5250 50 H I C CNN
+F2 "" 50 5350 50 H I C CNN
+F3 "" 50 5350 50 H I C CNN
 $FPLIST
  *JAE?MM70?314?310B1*
 $ENDFPLIST
 DRAW
-S -600 5200 600 -5400 1 1 0 f
-X 5V 1 -200 5400 200 D 50 50 1 1 W
-X RSVD 10 800 3100 200 L 50 50 1 1 B
-X GND 100 0 -5600 200 U 50 50 1 1 P N
-X GND 101 0 -5600 200 U 50 50 1 1 P N
-X PEX_TX6# 102 -800 600 200 R 50 50 1 1 I
-X PEX_RX6# 103 -800 3800 200 R 50 50 1 1 O
-X PEX_TX6 104 -800 500 200 R 50 50 1 1 I
-X PEX_RX6 105 -800 3700 200 R 50 50 1 1 O
-X GND 106 0 -5600 200 U 50 50 1 1 P N
-X GND 107 0 -5600 200 U 50 50 1 1 P N
-X PEX_TX5# 108 -800 800 200 R 50 50 1 1 I
-X PEX_RX5# 109 -800 4000 200 R 50 50 1 1 O
-X GND 11 0 -5600 200 U 50 50 1 1 P N
-X PEX_TX5 110 -800 700 200 R 50 50 1 1 I
-X PEX_RX5 111 -800 3900 200 R 50 50 1 1 O
-X GND 112 0 -5600 200 U 50 50 1 1 P N
-X GND 113 0 -5600 200 U 50 50 1 1 P N
-X PEX_TX4# 114 -800 1000 200 R 50 50 1 1 I
-X PEX_RX4# 115 -800 4200 200 R 50 50 1 1 O
-X PEX_TX4 116 -800 900 200 R 50 50 1 1 I
-X PEX_RX4 117 -800 4100 200 R 50 50 1 1 O
-X GND 118 0 -5600 200 U 50 50 1 1 P N
-X GND 119 0 -5600 200 U 50 50 1 1 P N
-X RSVD 12 800 3000 200 L 50 50 1 1 B
-X PEX_TX3# 120 -800 1200 200 R 50 50 1 1 I
-X PEX_RX3# 121 -800 4400 200 R 50 50 1 1 O
-X PEX_TX3 122 -800 1100 200 R 50 50 1 1 I
-X PEX_RX3 123 -800 4300 200 R 50 50 1 1 O
-X GND 124 0 -5600 200 U 50 50 1 1 P N
-X GND 125 0 -5600 200 U 50 50 1 1 P N
-X KEY 126 800 -100 200 L 50 50 1 1 P
-X KEY 127 800 -200 200 L 50 50 1 1 P
-X KEY 128 800 -300 200 L 50 50 1 1 P
-X KEY 129 800 -400 200 L 50 50 1 1 P
-X GND 13 0 -5600 200 U 50 50 1 1 P N
-X KEY 130 800 -500 200 L 50 50 1 1 P
-X KEY 131 800 -600 200 L 50 50 1 1 P
-X KEY 132 800 -700 200 L 50 50 1 1 P
-X GND 133 0 -5600 200 U 50 50 1 1 P N
-X GND 134 0 -5600 200 U 50 50 1 1 P N
-X PEX_RX2# 135 -800 4600 200 R 50 50 1 1 O
-X PEX_TX2# 136 -800 1400 200 R 50 50 1 1 I
-X PEX_RX2 137 -800 4500 200 R 50 50 1 1 O
-X PEX_TX2 138 -800 1300 200 R 50 50 1 1 I
-X GND 139 0 -5600 200 U 50 50 1 1 P N
-X RSVD 14 800 2900 200 L 50 50 1 1 B
-X GND 140 0 -5600 200 U 50 50 1 1 P N
-X PEX_RX1# 141 -800 4800 200 R 50 50 1 1 O
-X PEX_TX1# 142 -800 1600 200 R 50 50 1 1 I
-X PEX_RX1 143 -800 4700 200 R 50 50 1 1 O
-X PEX_TX1 144 -800 1500 200 R 50 50 1 1 I
-X GND 145 0 -5600 200 U 50 50 1 1 P N
-X GND 146 0 -5600 200 U 50 50 1 1 P N
-X PEX_RX0# 147 -800 5000 200 R 50 50 1 1 O
-X PEX_TX0# 148 -800 1800 200 R 50 50 1 1 I
-X PEX_RX0 149 -800 4900 200 R 50 50 1 1 O
-X GND 15 0 -5600 200 U 50 50 1 1 P N
-X PEX_TX0 150 -800 1700 200 R 50 50 1 1 I
-X GND 151 0 -5600 200 U 50 50 1 1 P N
-X GND 152 0 -5600 200 U 50 50 1 1 P N
-X PEX_REFCLK# 153 -800 -1400 200 R 50 50 1 1 I
-X PEX_CLK_REQ# 154 -800 -1700 200 R 50 50 1 1 O
-X PEX_REFCLK 155 -800 -1500 200 R 50 50 1 1 I
-X PEX_RST# 156 -800 -1800 200 R 50 50 1 1 I
-X GND 157 0 -5600 200 U 50 50 1 1 P N
-X VGA_DDC_DAT 158 800 4400 200 L 50 50 1 1 B
-X RSVD 159 800 2400 200 L 50 50 1 1 B
-X RSVD 16 800 2800 200 L 50 50 1 1 B
-X VGA_DDC_CLK 160 800 4500 200 L 50 50 1 1 O
-X RSVD 161 800 2300 200 L 50 50 1 1 B
-X VGA_VSYNC 162 800 4700 200 L 50 50 1 1 O
-X RSVD 163 800 2200 200 L 50 50 1 1 B
-X VGA_HSYNC 164 800 4600 200 L 50 50 1 1 O
-X RSVD 165 800 2100 200 L 50 50 1 1 B
-X GND 166 0 -5600 200 U 50 50 1 1 P N
-X RSVD 167 800 2000 200 L 50 50 1 1 B
-X VGA_RED 168 800 5000 200 L 50 50 1 1 O
-X LVDS_UCLK# 169 -800 -2100 200 R 50 50 1 1 O
-X GND 17 0 -5600 200 U 50 50 1 1 P N
-X VGA_GREEN 170 800 4900 200 L 50 50 1 1 O
-X LVDS_UCLK 171 -800 -2200 200 R 50 50 1 1 O
-X VGA_BLUE 172 800 4800 200 L 50 50 1 1 O
-X GND 173 0 -5600 200 U 50 50 1 1 P N
-X GND 174 0 -5600 200 U 50 50 1 1 P N
-X LVDS_UTX3# 175 -800 -2300 200 R 50 50 1 1 O
-X LVDS_LCLK# 176 -800 -3300 200 R 50 50 1 1 O
-X LVDS_UTX3 177 -800 -2400 200 R 50 50 1 1 O
-X LVDS_LCLK 178 -800 -3400 200 R 50 50 1 1 O
-X GND 179 0 -5600 200 U 50 50 1 1 P N
-X PWR_LEVEL 18 -800 -4900 200 R 50 50 1 1 I
-X GND 180 0 -5600 200 U 50 50 1 1 P N
-X LVDS_UTX2# 181 -800 -2500 200 R 50 50 1 1 O
-X LVDS_LTX3# 182 -800 -3500 200 R 50 50 1 1 O
-X LVDS_UTX2 183 -800 -2600 200 R 50 50 1 1 O
-X LVDS_LTX3 184 -800 -3600 200 R 50 50 1 1 O
-X GND 185 0 -5600 200 U 50 50 1 1 P N
-X GND 186 0 -5600 200 U 50 50 1 1 P N
-X LVDS_UTX1# 187 -800 -2700 200 R 50 50 1 1 O
-X LVDS_LTX2# 188 -800 -3700 200 R 50 50 1 1 O
-X LVDS_UTX1 189 -800 -2800 200 R 50 50 1 1 O
-X PEX_STD_SW# 19 -800 -1600 200 R 50 50 1 1 I
-X LVDS_LTX2 190 -800 -3800 200 R 50 50 1 1 O
-X GND 191 0 -5600 200 U 50 50 1 1 P N
-X GND 192 0 -5600 200 U 50 50 1 1 P N
-X LVDS_UTX0# 193 -800 -2900 200 R 50 50 1 1 O
-X LVDS_LTX1# 194 -800 -3900 200 R 50 50 1 1 O
-X LVDS_UTX0 195 -800 -3000 200 R 50 50 1 1 O
-X LVDS_LTX1 196 -800 -4000 200 R 50 50 1 1 O
-X GND 197 0 -5600 200 U 50 50 1 1 P N
-X GND 198 0 -5600 200 U 50 50 1 1 P N
-X DP_C_L0# 199 800 -3100 200 L 50 50 1 1 O
-X PRSNT_R# 2 800 3500 200 L 50 50 1 1 O
-X TH_OVERT# 20 -800 -4600 200 R 50 50 1 1 O
-X LVDS_LTX0# 200 -800 -4100 200 R 50 50 1 1 O
-X DP_C_L0 201 800 -3200 200 L 50 50 1 1 O
-X LVDS_LTX0 202 -800 -4200 200 R 50 50 1 1 O
-X GND 203 0 -5600 200 U 50 50 1 1 P N
-X GND 204 0 -5600 200 U 50 50 1 1 P N
-X DP_C_L1# 205 800 -3300 200 L 50 50 1 1 O
-X DP_D_L0# 206 800 -4200 200 L 50 50 1 1 O
-X DP_C_L1 207 800 -3400 200 L 50 50 1 1 O
-X DP_D_L0 208 800 -4300 200 L 50 50 1 1 O
-X GND 209 0 -5600 200 U 50 50 1 1 P N
-X VGA_DISABLE# 21 800 4200 200 L 50 50 1 1 I
-X GND 210 0 -5600 200 U 50 50 1 1 P N
-X DP_C_L2# 211 800 -3500 200 L 50 50 1 1 O
-X DP_D_L1# 212 800 -4400 200 L 50 50 1 1 O
-X DP_C_L2 213 800 -3600 200 L 50 50 1 1 O
-X DP_D_L1 214 800 -4500 200 L 50 50 1 1 O
-X GND 215 0 -5600 200 U 50 50 1 1 P N
-X GND 216 0 -5600 200 U 50 50 1 1 P N
-X DP_C_L3# 217 800 -3700 200 L 50 50 1 1 O
-X DP_D_L2# 218 800 -4600 200 L 50 50 1 1 O
-X DP_C_L3 219 800 -3800 200 L 50 50 1 1 O
-X TH_ALERT# 22 -800 -4700 200 R 50 50 1 1 B
-X DP_D_L2 220 800 -4700 200 L 50 50 1 1 O
-X GND 221 0 -5600 200 U 50 50 1 1 P N
-X GND 222 0 -5600 200 U 50 50 1 1 P N
-X DP_C_AUX# 223 800 -3900 200 L 50 50 1 1 B
-X DP_D_L3# 224 800 -4800 200 L 50 50 1 1 O
-X DP_C_AUX 225 800 -4000 200 L 50 50 1 1 B
-X DP_D_L3 226 800 -4900 200 L 50 50 1 1 O
-X RSVD 227 800 1900 200 L 50 50 1 1 B
-X GND 228 0 -5600 200 U 50 50 1 1 P N
-X RSVD 229 800 1800 200 L 50 50 1 1 B
-X PNL_PWR_EN 23 800 4100 200 L 50 50 1 1 O
-X DP_D_AUX# 230 800 -5000 200 L 50 50 1 1 B
-X RSVD 231 800 1700 200 L 50 50 1 1 B
-X DP_D_AUX 232 800 -5100 200 L 50 50 1 1 B
-X RSVD 233 800 1600 200 L 50 50 1 1 B
-X DP_C_HPD 234 800 -4100 200 L 50 50 1 1 I
-X RSVD 235 800 1500 200 L 50 50 1 1 B
-X DP_D_HPD 236 800 -5200 200 L 50 50 1 1 I
-X RSVD 237 800 1400 200 L 50 50 1 1 B
-X RSVD 238 800 2700 200 L 50 50 1 1 B
-X RSVD 239 800 1300 200 L 50 50 1 1 B
-X TH_PWN 24 -800 -4800 200 R 50 50 1 1 O
-X RSVD 240 800 2600 200 L 50 50 1 1 B
-X RSVD 241 800 1200 200 L 50 50 1 1 B
-X RSVD 242 800 2500 200 L 50 50 1 1 B
-X RSVD 243 800 1100 200 L 50 50 1 1 B
-X GND 244 0 -5600 200 U 50 50 1 1 P N
-X RSVD 245 800 1000 200 L 50 50 1 1 B
-X DP_B_L0# 246 800 -2000 200 L 50 50 1 1 O
-X RSVD 247 800 900 200 L 50 50 1 1 B
-X DP_B_L0 248 800 -2100 200 L 50 50 1 1 O
-X RSVD 249 800 800 200 L 50 50 1 1 B
-X PNL_BL_EN 25 800 4000 200 L 50 50 1 1 O
-X GND 250 0 -5600 200 U 50 50 1 1 P N
-X GND 251 0 -5600 200 U 50 50 1 1 P N
-X DP_B_L1# 252 800 -2200 200 L 50 50 1 1 O
-X DP_A_L0# 253 800 -900 200 L 50 50 1 1 O
-X DP_B_L1 254 800 -2300 200 L 50 50 1 1 O
-X DP_A_L0 255 800 -1000 200 L 50 50 1 1 O
-X GND 256 0 -5600 200 U 50 50 1 1 P N
-X GND 257 0 -5600 200 U 50 50 1 1 P N
-X DP_B_L2# 258 800 -2400 200 L 50 50 1 1 O
-X DP_A_L1# 259 800 -1100 200 L 50 50 1 1 O
-X GPIO0 26 800 3400 200 L 50 50 1 1 B
-X DP_B_L2 260 800 -2500 200 L 50 50 1 1 O
-X DP_A_L1 261 800 -1200 200 L 50 50 1 1 O
-X GND 262 0 -5600 200 U 50 50 1 1 P N
-X GND 263 0 -5600 200 U 50 50 1 1 P N
-X DP_B_L3# 264 800 -2600 200 L 50 50 1 1 O
-X DP_A_L2# 265 800 -1300 200 L 50 50 1 1 O
-X DP_B_L3 266 800 -2700 200 L 50 50 1 1 O
-X DP_A_L2 267 800 -1400 200 L 50 50 1 1 O
-X GND 268 0 -5600 200 U 50 50 1 1 P N
-X GND 269 0 -5600 200 U 50 50 1 1 P N
-X PNL_BL_PWN 27 800 3900 200 L 50 50 1 1 O
-X DP_B_AUX# 270 800 -2800 200 L 50 50 1 1 B
-X DP_A_L3# 271 800 -1500 200 L 50 50 1 1 O
-X DP_B_AUX 272 800 -2900 200 L 50 50 1 1 B
-X DP_A_L3 273 800 -1600 200 L 50 50 1 1 O
-X DP_B_HPD 274 800 -3000 200 L 50 50 1 1 I
-X GND 275 0 -5600 200 U 50 50 1 1 P N
-X DP_A_HPD 276 800 -1900 200 L 50 50 1 1 I
-X DP_A_AUX# 277 800 -1700 200 L 50 50 1 1 B
-X 3V3 278 200 5400 200 D 50 50 1 1 W
-X DP_A_AUX 279 800 -1800 200 L 50 50 1 1 B
-X GPIO1 28 800 3300 200 L 50 50 1 1 B
-X 3V3 280 200 5400 200 D 50 50 1 1 P N
-X PRSNT_L# 281 800 3600 200 L 50 50 1 1 O
-X HDMI_CEC 29 800 3800 200 L 50 50 1 1 B
-X 5V 3 -200 5400 200 D 50 50 1 1 P N
-X GPIO2 30 800 3200 200 L 50 50 1 1 B
-X DVI_HPD 31 -800 -2000 200 R 50 50 1 1 I
-X SMB_DAT 32 -800 -4400 200 R 50 50 1 1 B
-X LVDS_DDC_DAT 33 -800 -3100 200 R 50 50 1 1 B
-X SMB_CLK 34 -800 -4500 200 R 50 50 1 1 I
-X LVDS_DDC_CLK 35 -800 -3200 200 R 50 50 1 1 O
-X GND 36 0 -5600 200 U 50 50 1 1 P N
-X GND 37 0 -5600 200 U 50 50 1 1 P N
-X OEM 38 800 700 200 L 50 50 1 1 B
-X OEM 39 800 600 200 L 50 50 1 1 B
-X WAKE# 4 800 3700 200 L 50 50 1 1 O
-X OEM 40 800 500 200 L 50 50 1 1 B
-X OEM 41 800 300 200 L 50 50 1 1 B
-X OEM 42 800 400 200 L 50 50 1 1 B
-X OEM 43 800 200 200 L 50 50 1 1 B
-X OEM 44 800 100 200 L 50 50 1 1 B
-X OEM 45 800 0 200 L 50 50 1 1 B
-X GND 46 0 -5600 200 U 50 50 1 1 P N
-X GND 47 0 -5600 200 U 50 50 1 1 P N
-X PEX_TX15# 48 -800 -1200 200 R 50 50 1 1 I
-X PEX_RX15# 49 -800 2000 200 R 50 50 1 1 O
-X 5V 5 -200 5400 200 D 50 50 1 1 P N
-X PEX_TX15 50 -800 -1300 200 R 50 50 1 1 I
-X PEX_RX15 51 -800 1900 200 R 50 50 1 1 O
-X GND 52 0 -5600 200 U 50 50 1 1 P N
-X GND 53 0 -5600 200 U 50 50 1 1 P N
-X PEX_TX14# 54 -800 -1000 200 R 50 50 1 1 I
-X PEX_RX14# 55 -800 2200 200 R 50 50 1 1 O
-X PEX_TX14 56 -800 -1100 200 R 50 50 1 1 I
-X PEX_RX14 57 -800 2100 200 R 50 50 1 1 O
-X GND 58 0 -5600 200 U 50 50 1 1 P N
-X GND 59 0 -5600 200 U 50 50 1 1 P N
-X PWR_GOOD 6 -800 -5000 200 R 50 50 1 1 O
-X PEX_TX13# 60 -800 -800 200 R 50 50 1 1 I
-X PEX_RX13# 61 -800 2400 200 R 50 50 1 1 O
-X PEX_TX13 62 -800 -900 200 R 50 50 1 1 I
-X PEX_RX13 63 -800 2300 200 R 50 50 1 1 O
-X GND 64 0 -5600 200 U 50 50 1 1 P N
-X GND 65 0 -5600 200 U 50 50 1 1 P N
-X PEX_TX12# 66 -800 -600 200 R 50 50 1 1 I
-X PEX_RX12# 67 -800 2600 200 R 50 50 1 1 O
-X PEX_TX12 68 -800 -700 200 R 50 50 1 1 I
-X PEX_RX12 69 -800 2500 200 R 50 50 1 1 O
-X 5V 7 -200 5400 200 D 50 50 1 1 P N
-X GND 70 0 -5600 200 U 50 50 1 1 P N
-X GND 71 0 -5600 200 U 50 50 1 1 P N
-X PEX_TX11# 72 -800 -400 200 R 50 50 1 1 I
-X PEX_RX11# 73 -800 2800 200 R 50 50 1 1 O
-X PEX_TX11 74 -800 -500 200 R 50 50 1 1 I
-X PEX_RX11 75 -800 2700 200 R 50 50 1 1 O
-X GND 76 0 -5600 200 U 50 50 1 1 P N
-X GND 77 0 -5600 200 U 50 50 1 1 P N
-X PEX_TX10# 78 -800 -200 200 R 50 50 1 1 I
-X PEX_RX10# 79 -800 3000 200 R 50 50 1 1 O
-X PWR_EN 8 -800 -5100 200 R 50 50 1 1 I
-X PEX_TX10 80 -800 -300 200 R 50 50 1 1 I
-X PEX_RX10 81 -800 2900 200 R 50 50 1 1 O
-X GND 82 0 -5600 200 U 50 50 1 1 P N
-X GND 83 0 -5600 200 U 50 50 1 1 P N
-X PEX_TX9# 84 -800 0 200 R 50 50 1 1 I
-X PEX_RX9# 85 -800 3200 200 R 50 50 1 1 O
-X PEX_TX9 86 -800 -100 200 R 50 50 1 1 I
-X PEX_RX9 87 -800 3100 200 R 50 50 1 1 O
-X GND 88 0 -5600 200 U 50 50 1 1 P N
-X GND 89 0 -5600 200 U 50 50 1 1 P N
-X 5V 9 -200 5400 200 D 50 50 1 1 P N
-X PEX_TX8# 90 -800 200 200 R 50 50 1 1 I
-X PEX_RX8# 91 -800 3400 200 R 50 50 1 1 O
-X PEX_TX8 92 -800 100 200 R 50 50 1 1 I
-X PEX_RX8 93 -800 3300 200 R 50 50 1 1 O
-X GND 94 0 -5600 200 U 50 50 1 1 P N
-X GND 95 0 -5600 200 U 50 50 1 1 P N
-X PEX_TX7# 96 -800 400 200 R 50 50 1 1 I
-X PEX_RX7# 97 -800 3600 200 R 50 50 1 1 O
-X PEX_TX7 98 -800 300 200 R 50 50 1 1 I
-X PEX_RX7 99 -800 3500 200 R 50 50 1 1 O
-X PWR_SRC E1 0 5400 200 D 50 50 1 1 W
-X PWR_SRC E2 0 5400 200 D 50 50 1 1 P N
-X GND E3 0 -5600 200 U 50 50 1 1 W
-X GND E4 0 -5600 200 U 50 50 1 1 P N
+S -600 5300 600 -5300 1 1 10 f
+X 5V 1 -200 5500 200 D 50 50 1 1 W
+X RSVD 10 800 3200 200 L 50 50 1 1 B
+X GND 100 0 -5500 200 U 50 50 1 1 P N
+X GND 101 0 -5500 200 U 50 50 1 1 P N
+X PEX_TX6# 102 -800 700 200 R 50 50 1 1 I
+X PEX_RX6# 103 -800 3900 200 R 50 50 1 1 O
+X PEX_TX6 104 -800 600 200 R 50 50 1 1 I
+X PEX_RX6 105 -800 3800 200 R 50 50 1 1 O
+X GND 106 0 -5500 200 U 50 50 1 1 P N
+X GND 107 0 -5500 200 U 50 50 1 1 P N
+X PEX_TX5# 108 -800 900 200 R 50 50 1 1 I
+X PEX_RX5# 109 -800 4100 200 R 50 50 1 1 O
+X GND 11 0 -5500 200 U 50 50 1 1 P N
+X PEX_TX5 110 -800 800 200 R 50 50 1 1 I
+X PEX_RX5 111 -800 4000 200 R 50 50 1 1 O
+X GND 112 0 -5500 200 U 50 50 1 1 P N
+X GND 113 0 -5500 200 U 50 50 1 1 P N
+X PEX_TX4# 114 -800 1100 200 R 50 50 1 1 I
+X PEX_RX4# 115 -800 4300 200 R 50 50 1 1 O
+X PEX_TX4 116 -800 1000 200 R 50 50 1 1 I
+X PEX_RX4 117 -800 4200 200 R 50 50 1 1 O
+X GND 118 0 -5500 200 U 50 50 1 1 P N
+X GND 119 0 -5500 200 U 50 50 1 1 P N
+X RSVD 12 800 3100 200 L 50 50 1 1 B
+X PEX_TX3# 120 -800 1300 200 R 50 50 1 1 I
+X PEX_RX3# 121 -800 4500 200 R 50 50 1 1 O
+X PEX_TX3 122 -800 1200 200 R 50 50 1 1 I
+X PEX_RX3 123 -800 4400 200 R 50 50 1 1 O
+X GND 124 0 -5500 200 U 50 50 1 1 P N
+X GND 125 0 -5500 200 U 50 50 1 1 P N
+X KEY 126 800 0 200 L 50 50 1 1 P
+X KEY 127 800 -100 200 L 50 50 1 1 P
+X KEY 128 800 -200 200 L 50 50 1 1 P
+X KEY 129 800 -300 200 L 50 50 1 1 P
+X GND 13 0 -5500 200 U 50 50 1 1 P N
+X KEY 130 800 -400 200 L 50 50 1 1 P
+X KEY 131 800 -500 200 L 50 50 1 1 P
+X KEY 132 800 -600 200 L 50 50 1 1 P
+X GND 133 0 -5500 200 U 50 50 1 1 P N
+X GND 134 0 -5500 200 U 50 50 1 1 P N
+X PEX_RX2# 135 -800 4700 200 R 50 50 1 1 O
+X PEX_TX2# 136 -800 1500 200 R 50 50 1 1 I
+X PEX_RX2 137 -800 4600 200 R 50 50 1 1 O
+X PEX_TX2 138 -800 1400 200 R 50 50 1 1 I
+X GND 139 0 -5500 200 U 50 50 1 1 P N
+X RSVD 14 800 3000 200 L 50 50 1 1 B
+X GND 140 0 -5500 200 U 50 50 1 1 P N
+X PEX_RX1# 141 -800 4900 200 R 50 50 1 1 O
+X PEX_TX1# 142 -800 1700 200 R 50 50 1 1 I
+X PEX_RX1 143 -800 4800 200 R 50 50 1 1 O
+X PEX_TX1 144 -800 1600 200 R 50 50 1 1 I
+X GND 145 0 -5500 200 U 50 50 1 1 P N
+X GND 146 0 -5500 200 U 50 50 1 1 P N
+X PEX_RX0# 147 -800 5100 200 R 50 50 1 1 O
+X PEX_TX0# 148 -800 1900 200 R 50 50 1 1 I
+X PEX_RX0 149 -800 5000 200 R 50 50 1 1 O
+X GND 15 0 -5500 200 U 50 50 1 1 P N
+X PEX_TX0 150 -800 1800 200 R 50 50 1 1 I
+X GND 151 0 -5500 200 U 50 50 1 1 P N
+X GND 152 0 -5500 200 U 50 50 1 1 P N
+X PEX_REFCLK# 153 -800 -1300 200 R 50 50 1 1 I
+X PEX_CLK_REQ# 154 -800 -1600 200 R 50 50 1 1 O
+X PEX_REFCLK 155 -800 -1400 200 R 50 50 1 1 I
+X PEX_RST# 156 -800 -1700 200 R 50 50 1 1 I
+X GND 157 0 -5500 200 U 50 50 1 1 P N
+X VGA_DDC_DAT 158 800 4500 200 L 50 50 1 1 B
+X RSVD 159 800 2500 200 L 50 50 1 1 B
+X RSVD 16 800 2900 200 L 50 50 1 1 B
+X VGA_DDC_CLK 160 800 4600 200 L 50 50 1 1 O
+X RSVD 161 800 2400 200 L 50 50 1 1 B
+X VGA_VSYNC 162 800 4800 200 L 50 50 1 1 O
+X RSVD 163 800 2300 200 L 50 50 1 1 B
+X VGA_HSYNC 164 800 4700 200 L 50 50 1 1 O
+X RSVD 165 800 2200 200 L 50 50 1 1 B
+X GND 166 0 -5500 200 U 50 50 1 1 P N
+X RSVD 167 800 2100 200 L 50 50 1 1 B
+X VGA_RED 168 800 5100 200 L 50 50 1 1 O
+X LVDS_UCLK# 169 -800 -2000 200 R 50 50 1 1 O
+X GND 17 0 -5500 200 U 50 50 1 1 P N
+X VGA_GREEN 170 800 5000 200 L 50 50 1 1 O
+X LVDS_UCLK 171 -800 -2100 200 R 50 50 1 1 O
+X VGA_BLUE 172 800 4900 200 L 50 50 1 1 O
+X GND 173 0 -5500 200 U 50 50 1 1 P N
+X GND 174 0 -5500 200 U 50 50 1 1 P N
+X LVDS_UTX3# 175 -800 -2200 200 R 50 50 1 1 O
+X LVDS_LCLK# 176 -800 -3200 200 R 50 50 1 1 O
+X LVDS_UTX3 177 -800 -2300 200 R 50 50 1 1 O
+X LVDS_LCLK 178 -800 -3300 200 R 50 50 1 1 O
+X GND 179 0 -5500 200 U 50 50 1 1 P N
+X PWR_LEVEL 18 -800 -4800 200 R 50 50 1 1 I
+X GND 180 0 -5500 200 U 50 50 1 1 P N
+X LVDS_UTX2# 181 -800 -2400 200 R 50 50 1 1 O
+X LVDS_LTX3# 182 -800 -3400 200 R 50 50 1 1 O
+X LVDS_UTX2 183 -800 -2500 200 R 50 50 1 1 O
+X LVDS_LTX3 184 -800 -3500 200 R 50 50 1 1 O
+X GND 185 0 -5500 200 U 50 50 1 1 P N
+X GND 186 0 -5500 200 U 50 50 1 1 P N
+X LVDS_UTX1# 187 -800 -2600 200 R 50 50 1 1 O
+X LVDS_LTX2# 188 -800 -3600 200 R 50 50 1 1 O
+X LVDS_UTX1 189 -800 -2700 200 R 50 50 1 1 O
+X PEX_STD_SW# 19 -800 -1500 200 R 50 50 1 1 I
+X LVDS_LTX2 190 -800 -3700 200 R 50 50 1 1 O
+X GND 191 0 -5500 200 U 50 50 1 1 P N
+X GND 192 0 -5500 200 U 50 50 1 1 P N
+X LVDS_UTX0# 193 -800 -2800 200 R 50 50 1 1 O
+X LVDS_LTX1# 194 -800 -3800 200 R 50 50 1 1 O
+X LVDS_UTX0 195 -800 -2900 200 R 50 50 1 1 O
+X LVDS_LTX1 196 -800 -3900 200 R 50 50 1 1 O
+X GND 197 0 -5500 200 U 50 50 1 1 P N
+X GND 198 0 -5500 200 U 50 50 1 1 P N
+X DP_C_L0# 199 800 -3000 200 L 50 50 1 1 O
+X PRSNT_R# 2 800 3600 200 L 50 50 1 1 O
+X TH_OVERT# 20 -800 -4500 200 R 50 50 1 1 O
+X LVDS_LTX0# 200 -800 -4000 200 R 50 50 1 1 O
+X DP_C_L0 201 800 -3100 200 L 50 50 1 1 O
+X LVDS_LTX0 202 -800 -4100 200 R 50 50 1 1 O
+X GND 203 0 -5500 200 U 50 50 1 1 P N
+X GND 204 0 -5500 200 U 50 50 1 1 P N
+X DP_C_L1# 205 800 -3200 200 L 50 50 1 1 O
+X DP_D_L0# 206 800 -4100 200 L 50 50 1 1 O
+X DP_C_L1 207 800 -3300 200 L 50 50 1 1 O
+X DP_D_L0 208 800 -4200 200 L 50 50 1 1 O
+X GND 209 0 -5500 200 U 50 50 1 1 P N
+X VGA_DISABLE# 21 800 4300 200 L 50 50 1 1 I
+X GND 210 0 -5500 200 U 50 50 1 1 P N
+X DP_C_L2# 211 800 -3400 200 L 50 50 1 1 O
+X DP_D_L1# 212 800 -4300 200 L 50 50 1 1 O
+X DP_C_L2 213 800 -3500 200 L 50 50 1 1 O
+X DP_D_L1 214 800 -4400 200 L 50 50 1 1 O
+X GND 215 0 -5500 200 U 50 50 1 1 P N
+X GND 216 0 -5500 200 U 50 50 1 1 P N
+X DP_C_L3# 217 800 -3600 200 L 50 50 1 1 O
+X DP_D_L2# 218 800 -4500 200 L 50 50 1 1 O
+X DP_C_L3 219 800 -3700 200 L 50 50 1 1 O
+X TH_ALERT# 22 -800 -4600 200 R 50 50 1 1 B
+X DP_D_L2 220 800 -4600 200 L 50 50 1 1 O
+X GND 221 0 -5500 200 U 50 50 1 1 P N
+X GND 222 0 -5500 200 U 50 50 1 1 P N
+X DP_C_AUX# 223 800 -3800 200 L 50 50 1 1 B
+X DP_D_L3# 224 800 -4700 200 L 50 50 1 1 O
+X DP_C_AUX 225 800 -3900 200 L 50 50 1 1 B
+X DP_D_L3 226 800 -4800 200 L 50 50 1 1 O
+X RSVD 227 800 2000 200 L 50 50 1 1 B
+X GND 228 0 -5500 200 U 50 50 1 1 P N
+X RSVD 229 800 1900 200 L 50 50 1 1 B
+X PNL_PWR_EN 23 800 4200 200 L 50 50 1 1 O
+X DP_D_AUX# 230 800 -4900 200 L 50 50 1 1 B
+X RSVD 231 800 1800 200 L 50 50 1 1 B
+X DP_D_AUX 232 800 -5000 200 L 50 50 1 1 B
+X RSVD 233 800 1700 200 L 50 50 1 1 B
+X DP_C_HPD 234 800 -4000 200 L 50 50 1 1 I
+X RSVD 235 800 1600 200 L 50 50 1 1 B
+X DP_D_HPD 236 800 -5100 200 L 50 50 1 1 I
+X RSVD 237 800 1500 200 L 50 50 1 1 B
+X RSVD 238 800 2800 200 L 50 50 1 1 B
+X RSVD 239 800 1400 200 L 50 50 1 1 B
+X TH_PWN 24 -800 -4700 200 R 50 50 1 1 O
+X RSVD 240 800 2700 200 L 50 50 1 1 B
+X RSVD 241 800 1300 200 L 50 50 1 1 B
+X RSVD 242 800 2600 200 L 50 50 1 1 B
+X RSVD 243 800 1200 200 L 50 50 1 1 B
+X GND 244 0 -5500 200 U 50 50 1 1 P N
+X RSVD 245 800 1100 200 L 50 50 1 1 B
+X DP_B_L0# 246 800 -1900 200 L 50 50 1 1 O
+X RSVD 247 800 1000 200 L 50 50 1 1 B
+X DP_B_L0 248 800 -2000 200 L 50 50 1 1 O
+X RSVD 249 800 900 200 L 50 50 1 1 B
+X PNL_BL_EN 25 800 4100 200 L 50 50 1 1 O
+X GND 250 0 -5500 200 U 50 50 1 1 P N
+X GND 251 0 -5500 200 U 50 50 1 1 P N
+X DP_B_L1# 252 800 -2100 200 L 50 50 1 1 O
+X DP_A_L0# 253 800 -800 200 L 50 50 1 1 O
+X DP_B_L1 254 800 -2200 200 L 50 50 1 1 O
+X DP_A_L0 255 800 -900 200 L 50 50 1 1 O
+X GND 256 0 -5500 200 U 50 50 1 1 P N
+X GND 257 0 -5500 200 U 50 50 1 1 P N
+X DP_B_L2# 258 800 -2300 200 L 50 50 1 1 O
+X DP_A_L1# 259 800 -1000 200 L 50 50 1 1 O
+X GPIO0 26 800 3500 200 L 50 50 1 1 B
+X DP_B_L2 260 800 -2400 200 L 50 50 1 1 O
+X DP_A_L1 261 800 -1100 200 L 50 50 1 1 O
+X GND 262 0 -5500 200 U 50 50 1 1 P N
+X GND 263 0 -5500 200 U 50 50 1 1 P N
+X DP_B_L3# 264 800 -2500 200 L 50 50 1 1 O
+X DP_A_L2# 265 800 -1200 200 L 50 50 1 1 O
+X DP_B_L3 266 800 -2600 200 L 50 50 1 1 O
+X DP_A_L2 267 800 -1300 200 L 50 50 1 1 O
+X GND 268 0 -5500 200 U 50 50 1 1 P N
+X GND 269 0 -5500 200 U 50 50 1 1 P N
+X PNL_BL_PWN 27 800 4000 200 L 50 50 1 1 O
+X DP_B_AUX# 270 800 -2700 200 L 50 50 1 1 B
+X DP_A_L3# 271 800 -1400 200 L 50 50 1 1 O
+X DP_B_AUX 272 800 -2800 200 L 50 50 1 1 B
+X DP_A_L3 273 800 -1500 200 L 50 50 1 1 O
+X DP_B_HPD 274 800 -2900 200 L 50 50 1 1 I
+X GND 275 0 -5500 200 U 50 50 1 1 P N
+X DP_A_HPD 276 800 -1800 200 L 50 50 1 1 I
+X DP_A_AUX# 277 800 -1600 200 L 50 50 1 1 B
+X 3V3 278 200 5500 200 D 50 50 1 1 W
+X DP_A_AUX 279 800 -1700 200 L 50 50 1 1 B
+X GPIO1 28 800 3400 200 L 50 50 1 1 B
+X 3V3 280 200 5500 200 D 50 50 1 1 P N
+X PRSNT_L# 281 800 3700 200 L 50 50 1 1 O
+X HDMI_CEC 29 800 3900 200 L 50 50 1 1 B
+X 5V 3 -200 5500 200 D 50 50 1 1 P N
+X GPIO2 30 800 3300 200 L 50 50 1 1 B
+X DVI_HPD 31 -800 -1900 200 R 50 50 1 1 I
+X SMB_DAT 32 -800 -4300 200 R 50 50 1 1 B
+X LVDS_DDC_DAT 33 -800 -3000 200 R 50 50 1 1 B
+X SMB_CLK 34 -800 -4400 200 R 50 50 1 1 I
+X LVDS_DDC_CLK 35 -800 -3100 200 R 50 50 1 1 O
+X GND 36 0 -5500 200 U 50 50 1 1 P N
+X GND 37 0 -5500 200 U 50 50 1 1 P N
+X OEM 38 800 800 200 L 50 50 1 1 B
+X OEM 39 800 700 200 L 50 50 1 1 B
+X WAKE# 4 800 3800 200 L 50 50 1 1 O
+X OEM 40 800 600 200 L 50 50 1 1 B
+X OEM 41 800 400 200 L 50 50 1 1 B
+X OEM 42 800 500 200 L 50 50 1 1 B
+X OEM 43 800 300 200 L 50 50 1 1 B
+X OEM 44 800 200 200 L 50 50 1 1 B
+X OEM 45 800 100 200 L 50 50 1 1 B
+X GND 46 0 -5500 200 U 50 50 1 1 P N
+X GND 47 0 -5500 200 U 50 50 1 1 P N
+X PEX_TX15# 48 -800 -1100 200 R 50 50 1 1 I
+X PEX_RX15# 49 -800 2100 200 R 50 50 1 1 O
+X 5V 5 -200 5500 200 D 50 50 1 1 P N
+X PEX_TX15 50 -800 -1200 200 R 50 50 1 1 I
+X PEX_RX15 51 -800 2000 200 R 50 50 1 1 O
+X GND 52 0 -5500 200 U 50 50 1 1 P N
+X GND 53 0 -5500 200 U 50 50 1 1 P N
+X PEX_TX14# 54 -800 -900 200 R 50 50 1 1 I
+X PEX_RX14# 55 -800 2300 200 R 50 50 1 1 O
+X PEX_TX14 56 -800 -1000 200 R 50 50 1 1 I
+X PEX_RX14 57 -800 2200 200 R 50 50 1 1 O
+X GND 58 0 -5500 200 U 50 50 1 1 P N
+X GND 59 0 -5500 200 U 50 50 1 1 P N
+X PWR_GOOD 6 -800 -4900 200 R 50 50 1 1 O
+X PEX_TX13# 60 -800 -700 200 R 50 50 1 1 I
+X PEX_RX13# 61 -800 2500 200 R 50 50 1 1 O
+X PEX_TX13 62 -800 -800 200 R 50 50 1 1 I
+X PEX_RX13 63 -800 2400 200 R 50 50 1 1 O
+X GND 64 0 -5500 200 U 50 50 1 1 P N
+X GND 65 0 -5500 200 U 50 50 1 1 P N
+X PEX_TX12# 66 -800 -500 200 R 50 50 1 1 I
+X PEX_RX12# 67 -800 2700 200 R 50 50 1 1 O
+X PEX_TX12 68 -800 -600 200 R 50 50 1 1 I
+X PEX_RX12 69 -800 2600 200 R 50 50 1 1 O
+X 5V 7 -200 5500 200 D 50 50 1 1 P N
+X GND 70 0 -5500 200 U 50 50 1 1 P N
+X GND 71 0 -5500 200 U 50 50 1 1 P N
+X PEX_TX11# 72 -800 -300 200 R 50 50 1 1 I
+X PEX_RX11# 73 -800 2900 200 R 50 50 1 1 O
+X PEX_TX11 74 -800 -400 200 R 50 50 1 1 I
+X PEX_RX11 75 -800 2800 200 R 50 50 1 1 O
+X GND 76 0 -5500 200 U 50 50 1 1 P N
+X GND 77 0 -5500 200 U 50 50 1 1 P N
+X PEX_TX10# 78 -800 -100 200 R 50 50 1 1 I
+X PEX_RX10# 79 -800 3100 200 R 50 50 1 1 O
+X PWR_EN 8 -800 -5000 200 R 50 50 1 1 I
+X PEX_TX10 80 -800 -200 200 R 50 50 1 1 I
+X PEX_RX10 81 -800 3000 200 R 50 50 1 1 O
+X GND 82 0 -5500 200 U 50 50 1 1 P N
+X GND 83 0 -5500 200 U 50 50 1 1 P N
+X PEX_TX9# 84 -800 100 200 R 50 50 1 1 I
+X PEX_RX9# 85 -800 3300 200 R 50 50 1 1 O
+X PEX_TX9 86 -800 0 200 R 50 50 1 1 I
+X PEX_RX9 87 -800 3200 200 R 50 50 1 1 O
+X GND 88 0 -5500 200 U 50 50 1 1 P N
+X GND 89 0 -5500 200 U 50 50 1 1 P N
+X 5V 9 -200 5500 200 D 50 50 1 1 P N
+X PEX_TX8# 90 -800 300 200 R 50 50 1 1 I
+X PEX_RX8# 91 -800 3500 200 R 50 50 1 1 O
+X PEX_TX8 92 -800 200 200 R 50 50 1 1 I
+X PEX_RX8 93 -800 3400 200 R 50 50 1 1 O
+X GND 94 0 -5500 200 U 50 50 1 1 P N
+X GND 95 0 -5500 200 U 50 50 1 1 P N
+X PEX_TX7# 96 -800 500 200 R 50 50 1 1 I
+X PEX_RX7# 97 -800 3700 200 R 50 50 1 1 O
+X PEX_TX7 98 -800 400 200 R 50 50 1 1 I
+X PEX_RX7 99 -800 3600 200 R 50 50 1 1 O
+X PWR_SRC E1 0 5500 200 D 50 50 1 1 W
+X PWR_SRC E2 0 5500 200 D 50 50 1 1 P N
+X GND E3 0 -5500 200 U 50 50 1 1 W
+X GND E4 0 -5500 200 U 50 50 1 1 P N
 ENDDRAW
 ENDDEF
 #

From 34f04998575b1ed34f3d927a02ef1947a41a47d0 Mon Sep 17 00:00:00 2001
From: John Whitmore <johnfwhitmore@gmail.com>
Date: Tue, 2 Apr 2019 19:31:39 +0100
Subject: [PATCH 042/201] Added the NXP PCF8525T I2C Real Time Clock

Signed-off-by: John Whitmore <johnfwhitmore@gmail.com>
---
 Timer_RTC.dcm |  6 ++++++
 Timer_RTC.lib | 23 +++++++++++++++++++++++
 2 files changed, 29 insertions(+)

diff --git a/Timer_RTC.dcm b/Timer_RTC.dcm
index 22c07ffd94..6e27942646 100644
--- a/Timer_RTC.dcm
+++ b/Timer_RTC.dcm
@@ -102,6 +102,12 @@ K I2C RTC Alarm interrupt
 F http://www.st.com/resource/en/datasheet/m41t62.pdf
 $ENDCMP
 #
+$CMP PCF8523T
+D Realtime Clock/Calendar I2C Interface, SOIC-8
+K I2C RTC Clock Calendar
+F https://www.nxp.com/docs/en/data-sheet/PCF8523.pdf
+$ENDCMP
+#
 $CMP PCF8563T
 D Realtime Clock/Calendar I2C Interface, SOIC-8
 K I2C RTC Clock Calendar
diff --git a/Timer_RTC.lib b/Timer_RTC.lib
index 8ed08d60ff..81e6270b96 100644
--- a/Timer_RTC.lib
+++ b/Timer_RTC.lib
@@ -270,6 +270,29 @@ X SDA 9 -400 -200 100 R 50 50 1 1 B
 ENDDRAW
 ENDDEF
 #
+# PCF8523T
+#
+DEF PCF8523T U 0 40 Y Y 1 F N
+F0 "U" -300 450 50 H V L CNN
+F1 "PCF8523T" 150 450 50 H V L CNN
+F2 "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm" 850 -450 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ SOIC*3.9x4.9mm*P1.27mm*
+$ENDFPLIST
+DRAW
+S -300 400 300 -400 0 1 10 f
+X OSCI 1 -400 100 100 R 50 50 1 1 I
+X OSCO 2 -400 -100 100 R 50 50 1 1 O
+X VBAT 3 100 500 100 D 50 50 1 1 W
+X VSS 4 0 -500 100 U 50 50 1 1 W
+X SDA 5 400 0 100 L 50 50 1 1 B
+X SCL 6 400 100 100 L 50 50 1 1 I
+X INT1/CLKO 7 400 -200 100 L 50 50 1 1 O
+X VDD 8 -100 500 100 D 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
 # PCF8563T
 #
 DEF PCF8563T U 0 20 Y Y 1 F N

From be65e83597a8b311253faee2d585ba8c434147b2 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Hildo=20Guillardi=20J=C3=BAnior?=
 <hildogjr@users.noreply.github.com>
Date: Fri, 5 Apr 2019 11:55:57 -0300
Subject: [PATCH 043/201] Fix LEM LV25 doc link (#1712)

---
 Sensor_Voltage.dcm | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Sensor_Voltage.dcm b/Sensor_Voltage.dcm
index 294b4bfca1..83066e4e88 100644
--- a/Sensor_Voltage.dcm
+++ b/Sensor_Voltage.dcm
@@ -3,7 +3,7 @@ EESchema-DOCLIB  Version 2.0
 $CMP LV25-P
 D LEM Voltage transducer LV 25-P
 K Voltage transducer
-F http://www.lem.com/docs/products/lv_25-p.pdf
+F https://www.lem.com/sites/default/files/products_datasheets/lv_25-p.pdf
 $ENDCMP
 #
 #End Doc Library

From ec8fa75ac42663419d0c47fd8268e0eb9ebc5c7e Mon Sep 17 00:00:00 2001
From: Xathar <jneiva08@gmail.com>
Date: Fri, 5 Apr 2019 17:25:47 +0100
Subject: [PATCH 044/201] Add TPS2419 (#1706)

* Add TPS2419

* Updated symbol naming and added an alias
Updated footprint filter

* Changed RSET to Passive
Stack RSVD on GND
Changed ? to * in footprint filter

* Changed size of symbol to be more compact
---
 Power_Management.dcm | 12 ++++++++++++
 Power_Management.lib | 25 +++++++++++++++++++++++++
 2 files changed, 37 insertions(+)

diff --git a/Power_Management.dcm b/Power_Management.dcm
index f307ec00fc..1749142231 100644
--- a/Power_Management.dcm
+++ b/Power_Management.dcm
@@ -888,6 +888,18 @@ K quad channel power distribution/load switch
 F http://www.ti.com/lit/gpn/tps22993
 $ENDCMP
 #
+$CMP TPS2419D
+D N+1 and ORing Power Rail Controller with Enable, SOIC-8
+K ideal-diode or-ing
+F http://www.ti.com/lit/ds/symlink/tps2419.pdf
+$ENDCMP
+#
+$CMP TPS2419PW
+D N+1 and ORing Power Rail Controller with Enable, TSSOP-8
+K ideal-diode or-ing
+F http://www.ti.com/lit/ds/symlink/tps2419.pdf
+$ENDCMP
+#
 $CMP TPS2592xx
 D 5V/12V eFuse Protection Switch (VSON-10)
 K efuse protection switch
diff --git a/Power_Management.lib b/Power_Management.lib
index ed9b704903..058cb37bfb 100644
--- a/Power_Management.lib
+++ b/Power_Management.lib
@@ -2209,6 +2209,31 @@ X ON2 9 -500 600 100 R 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #
+# TPS2419D
+#
+DEF TPS2419D U 0 20 Y Y 1 F N
+F0 "U" -200 350 50 H V C CNN
+F1 "TPS2419D" 200 350 50 H V C CNN
+F2 "" 2100 -200 50 H I C CNN
+F3 "" 2100 -200 50 H I C CNN
+ALIAS TPS2419PW
+$FPLIST
+ TSSOP*4.4x3mm*P0.65mm*
+ SOIC*3.9x4.9mm*P1.27mm*
+$ENDFPLIST
+DRAW
+S -200 300 200 -300 0 1 10 f
+X RSET 1 300 -100 100 L 50 50 1 1 P
+X EN 2 -300 -100 100 R 50 50 1 1 I
+X GND 3 0 -400 100 U 50 50 1 1 P N
+X GND 4 0 -400 100 U 50 50 1 1 W
+X GATE 5 0 400 100 D 50 50 1 1 O
+X C 6 300 200 100 L 50 50 1 1 I
+X A 7 -300 200 100 R 50 50 1 1 I
+X BYP 8 -300 100 100 R 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
 # TPS2592xx
 #
 DEF TPS2592xx U 0 20 Y Y 1 F N

From e875a0c1c449c48550d4ebfc702c9d1ed1250b79 Mon Sep 17 00:00:00 2001
From: Daniel Mack <github@zonque.org>
Date: Sat, 6 Apr 2019 02:06:10 +0200
Subject: [PATCH 045/201] Driver_LED: Add MPQ2483 (#1681)

* Driver_LED: Add MPQ2483

This adds the MPQ2483 from Monolithic Power Systems. The datasheet is here:

  https://www.monolithicpower.com/pub/media/document/MPQ2483_r1.05.pdf

One note on the pin arrangement: the FB pin lives on the right side of the
symbol even though it's an input pin, because it is alway fed from the
switching loop that's fed from the BST pin.

* MPQ2483DQ: re-arrange pins, fix footprint filter

* MPQ2483DQ: re-arrange pins again

squash me

* MPQ2483DQ: re-arrange pins again

squash me

* MPQ2483DQ: re-arrange pins again, fix footprint filter

squash me
---
 Driver_LED.dcm |  6 ++++++
 Driver_LED.lib | 26 ++++++++++++++++++++++++++
 2 files changed, 32 insertions(+)

diff --git a/Driver_LED.dcm b/Driver_LED.dcm
index 51c28d468f..385193bc98 100644
--- a/Driver_LED.dcm
+++ b/Driver_LED.dcm
@@ -156,6 +156,12 @@ K Boost Buck Buck-Boost SEPIC Flyback
 F https://www.analog.com/media/en/technical-documentation/data-sheets/37551fd.pdf
 $ENDCMP
 #
+$CMP MPQ2483DQ
+D 55V, 2.5A Programmable Frequency LED Driver, DFN-10
+K LED driver
+F https://www.monolithicpower.com/pub/media/document/MPQ2483_r1.05.pdf
+$ENDCMP
+#
 $CMP PCA9685BS
 D 16-channel 12-bit PWM Fm+ I2C-bus LED controller RGBA QFN
 K PWM LED driver I2C QFN
diff --git a/Driver_LED.lib b/Driver_LED.lib
index 6295a13582..8d7d058a41 100644
--- a/Driver_LED.lib
+++ b/Driver_LED.lib
@@ -580,6 +580,32 @@ X SENSE 9 700 -200 100 L 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #
+# MPQ2483DQ
+#
+DEF MPQ2483DQ U 0 20 Y Y 1 F N
+F0 "U" -250 450 50 H V C CNN
+F1 "MPQ2483DQ" 300 450 50 H V C CNN
+F2 "Package_DFN_QFN:DFN-10-1EP_3x3mm_P0.5mm_EP1.7x2.5mm" 0 0 50 H I C CNN
+F3 "" -200 -200 50 H I C CNN
+$FPLIST
+ DFN*1EP*3x3mm*P0.5mm*
+$ENDFPLIST
+DRAW
+S -300 400 300 -400 0 1 10 f
+X VDD 1 0 500 100 D 50 50 1 1 W
+X SW 10 400 0 100 L 50 50 1 1 O
+X VSS 13 100 -500 100 U 50 50 1 1 P N
+X VSS 2 100 -500 100 U 50 50 1 1 W
+X OVP 3 400 -200 100 L 50 50 1 1 I
+X FB 4 400 -300 100 L 50 50 1 1 I
+X COMP 5 -400 -100 100 R 50 50 1 1 I
+X RSET 6 -400 0 100 R 50 50 1 1 I
+X EN/DIM 7 -400 100 100 R 50 50 1 1 I
+X INGND 8 -100 -500 100 U 50 50 1 1 W
+X BST 9 400 300 100 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
 # PCA9685BS
 #
 DEF PCA9685BS U 0 20 Y Y 1 F N

From 464c1f9456d0ff1a9ed8860f15ddacc2fb815134 Mon Sep 17 00:00:00 2001
From: Oliver <oliver.henry.walters@gmail.com>
Date: Sat, 6 Apr 2019 11:07:44 +1100
Subject: [PATCH 046/201] Added LTC7138 (#1710)

* Pin capitalization

* Added LTC7138

- Copied from LTC3638
- ANODE pin (16) instead of GND connection

* Move SW pin higher
---
 Regulator_Switching.dcm |  6 ++++++
 Regulator_Switching.lib | 38 +++++++++++++++++++++++++++++++++-----
 2 files changed, 39 insertions(+), 5 deletions(-)

diff --git a/Regulator_Switching.dcm b/Regulator_Switching.dcm
index 2b6123a48a..4b5321cff8 100644
--- a/Regulator_Switching.dcm
+++ b/Regulator_Switching.dcm
@@ -2640,6 +2640,12 @@ K step down switch manager I2C telemetry fault current sense
 F https://www.analog.com/media/en/technical-documentation/data-sheets/LTC3886-3886-1.pdf
 $ENDCMP
 #
+$CMP LTC7138
+D 400mA High efficiency 140V step-down converter, MSOP-16(12)
+K buck dc-dc switcher switching
+F https://www.analog.com/media/en/technical-documentation/data-sheets/7138f.pdf
+$ENDCMP
+#
 $CMP LTM8063
 D 40VIN, 2A Silent Switcher µModule Regulator, BGA-28
 K uModule DCDC
diff --git a/Regulator_Switching.lib b/Regulator_Switching.lib
index 44ca788242..a82e33e4be 100644
--- a/Regulator_Switching.lib
+++ b/Regulator_Switching.lib
@@ -3319,17 +3319,17 @@ DRAW
 S -300 400 300 -400 0 1 10 f
 X SW 1 400 200 100 L 50 50 1 1 P
 X SS 10 -400 -200 100 R 50 50 1 1 P
-X Iset 11 -400 -300 100 R 50 50 1 1 P
+X ISET 11 -400 -300 100 R 50 50 1 1 P
 X OVLO 12 -400 200 100 R 50 50 1 1 I
 X RUN 14 -400 300 100 R 50 50 1 1 I
 X GND 16 0 -500 100 U 50 50 1 1 P N
 X GND 17 0 -500 100 U 50 50 1 1 P N
-X Vin 3 0 500 100 D 50 50 1 1 W
+X VIN 3 0 500 100 D 50 50 1 1 W
 X FBO 5 400 -300 100 L 50 50 1 1 O
-X Vprg2 6 -400 0 100 R 50 50 1 1 I
-X Vprg1 7 -400 100 100 R 50 50 1 1 I
+X VPRG2 6 -400 0 100 R 50 50 1 1 I
+X VPRG1 7 -400 100 100 R 50 50 1 1 I
 X GND 8 0 -500 100 U 50 50 1 1 W
-X Vfb 9 400 -200 100 L 50 50 1 1 I
+X VFB 9 400 -200 100 L 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #
@@ -3395,6 +3395,34 @@ X Isense1+ 9 700 -700 100 L 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #
+# LTC7138
+#
+DEF LTC7138 U 0 20 Y Y 1 F N
+F0 "U" -310 450 50 H V L CNN
+F1 "LTC7138" 40 450 50 H V L CNN
+F2 "Package_SO:Linear_MSOP-12-16-1EP_3x4mm_P0.5mm" 50 -450 50 H I L CNN
+F3 "" 0 -100 50 H I C CNN
+$FPLIST
+ Linear*MSOP*12*16*EP*3x4mm*P0.5mm*
+$ENDFPLIST
+DRAW
+S -300 400 300 -400 0 1 10 f
+X SW 1 400 300 100 L 50 50 1 1 P
+X SS 10 -400 -200 100 R 50 50 1 1 P
+X ISET 11 -400 -300 100 R 50 50 1 1 P
+X OVLO 12 -400 200 100 R 50 50 1 1 I
+X RUN 14 -400 300 100 R 50 50 1 1 I
+X ANODE 16 400 0 100 L 50 50 1 1 P
+X GND 17 0 -500 100 U 50 50 1 1 P N
+X VIN 3 0 500 100 D 50 50 1 1 W
+X FBO 5 400 -300 100 L 50 50 1 1 O
+X VPRG2 6 -400 0 100 R 50 50 1 1 I
+X VPRG1 7 -400 100 100 R 50 50 1 1 I
+X GND 8 0 -500 100 U 50 50 1 1 W
+X VFB 9 400 -200 100 L 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
 # LTM8063
 #
 DEF LTM8063 U 0 20 Y Y 1 F N

From baa8aa575aff7561512f9f94b18e838963cef355 Mon Sep 17 00:00:00 2001
From: Daniel Mack <daniel@zonque.org>
Date: Sat, 6 Apr 2019 07:55:15 +0200
Subject: [PATCH 047/201] Driver_LED: MPQ2483DQ: Fix thermal pad assignment

Fix a small issue with the recently added MPQ2483DQ: the thermal pad has pin
number 11, not 13.
---
 Driver_LED.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Driver_LED.lib b/Driver_LED.lib
index 8d7d058a41..7ade6b301a 100644
--- a/Driver_LED.lib
+++ b/Driver_LED.lib
@@ -594,7 +594,7 @@ DRAW
 S -300 400 300 -400 0 1 10 f
 X VDD 1 0 500 100 D 50 50 1 1 W
 X SW 10 400 0 100 L 50 50 1 1 O
-X VSS 13 100 -500 100 U 50 50 1 1 P N
+X VSS 11 100 -500 100 U 50 50 1 1 P N
 X VSS 2 100 -500 100 U 50 50 1 1 W
 X OVP 3 400 -200 100 L 50 50 1 1 I
 X FB 4 400 -300 100 L 50 50 1 1 I

From 1ff67acbf07771639cbf3471ea13792f1281aef0 Mon Sep 17 00:00:00 2001
From: John Whitmore <johnfwhitmore@gmail.com>
Date: Sat, 6 Apr 2019 15:38:48 +0100
Subject: [PATCH 048/201] Changed pin name offset and changed name of pin 7

---
 Timer_RTC.lib | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Timer_RTC.lib b/Timer_RTC.lib
index 81e6270b96..34b1c23dbe 100644
--- a/Timer_RTC.lib
+++ b/Timer_RTC.lib
@@ -272,7 +272,7 @@ ENDDEF
 #
 # PCF8523T
 #
-DEF PCF8523T U 0 40 Y Y 1 F N
+DEF PCF8523T U 0 20 Y Y 1 F N
 F0 "U" -300 450 50 H V L CNN
 F1 "PCF8523T" 150 450 50 H V L CNN
 F2 "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm" 850 -450 50 H I C CNN
@@ -288,7 +288,7 @@ X VBAT 3 100 500 100 D 50 50 1 1 W
 X VSS 4 0 -500 100 U 50 50 1 1 W
 X SDA 5 400 0 100 L 50 50 1 1 B
 X SCL 6 400 100 100 L 50 50 1 1 I
-X INT1/CLKO 7 400 -200 100 L 50 50 1 1 O
+X ~INT1~/CLKO 7 400 -200 100 L 50 50 1 1 O
 X VDD 8 -100 500 100 D 50 50 1 1 W
 ENDDRAW
 ENDDEF

From 562fa3f651950e53c99b6c72668b775df894248f Mon Sep 17 00:00:00 2001
From: Daniel Mack <daniel@zonque.org>
Date: Sat, 6 Apr 2019 21:03:47 +0200
Subject: [PATCH 049/201] Regulator_SwitchedCapacitor: add TPS60151

Add TPS60151, a 5V, 140mA charge pump in a WSON-6 package.

The datasheet is here:

  https://www.ti.com/lit/ds/symlink/tps60151.pdf

Some space is left between the pins on the right side so a cap can fit in
the schematics.
---
 Regulator_SwitchedCapacitor.dcm |  6 ++++++
 Regulator_SwitchedCapacitor.lib | 21 +++++++++++++++++++++
 2 files changed, 27 insertions(+)

diff --git a/Regulator_SwitchedCapacitor.dcm b/Regulator_SwitchedCapacitor.dcm
index 790b2c5519..9263593bb4 100644
--- a/Regulator_SwitchedCapacitor.dcm
+++ b/Regulator_SwitchedCapacitor.dcm
@@ -72,6 +72,12 @@ K monolithic CMOS switched capacitor voltage converter invert double divide mult
 F http://datasheets.maximintegrated.com/en/ds/ICL7660-MAX1044.pdf
 $ENDCMP
 #
+$CMP TPS60151
+D 5V, 140mA charge-pump, WSON-6
+K charge pump
+F https://www.ti.com/lit/ds/symlink/tps60151.pdf
+$ENDCMP
+#
 $CMP TPS60500DGS
 D 250mA High-Efficiency Step-Down Charge Pump Regulator, Adjustable Output Voltage, MSOP-10
 K Regulator Step-Down Charge Pump TPS Texas Instruments Ti
diff --git a/Regulator_SwitchedCapacitor.lib b/Regulator_SwitchedCapacitor.lib
index 8c27b1a6c0..5c1f43a595 100644
--- a/Regulator_SwitchedCapacitor.lib
+++ b/Regulator_SwitchedCapacitor.lib
@@ -244,6 +244,27 @@ X V+ 8 -400 300 100 R 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #
+# TPS60151
+#
+DEF TPS60151 U 0 20 Y Y 1 F N
+F0 "U" -250 350 50 H V C CNN
+F1 "TPS60151" 250 350 50 H V C CNN
+F2 "Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm_ThermalVias" 100 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ WSON-6*1EP*2x2mm*P0.65mm*EP1x1.6mm*
+$ENDFPLIST
+DRAW
+S -300 300 300 -300 0 1 10 f
+X GND 1 0 -400 100 U 50 50 1 1 W
+X VIN 2 0 400 100 D 50 50 1 1 W
+X VOUT 3 400 200 100 L 50 50 1 1 w
+X CP+ 4 400 0 100 L 50 50 1 1 P
+X CP- 5 400 -200 100 L 50 50 1 1 P
+X ENA 6 -400 0 100 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
 # TPS60500DGS
 #
 DEF TPS60500DGS U 0 20 Y Y 1 F N

From 3dbf5347345ef46cdc9a56ac318411881434e4a5 Mon Sep 17 00:00:00 2001
From: Daniel Mack <daniel@zonque.org>
Date: Sun, 7 Apr 2019 20:46:01 +0200
Subject: [PATCH 050/201] TPS60151DRV: address review comments

* Rename TPS60151 to TPS60151DRV
* Move VIN to the left
* Add Pin 7 (EP)
* Fixed footprint filter
---
 Regulator_SwitchedCapacitor.dcm |  6 ++++++
 Regulator_SwitchedCapacitor.lib | 27 +++++++++++++++++++++++++--
 2 files changed, 31 insertions(+), 2 deletions(-)

diff --git a/Regulator_SwitchedCapacitor.dcm b/Regulator_SwitchedCapacitor.dcm
index 9263593bb4..cd38e0d7ef 100644
--- a/Regulator_SwitchedCapacitor.dcm
+++ b/Regulator_SwitchedCapacitor.dcm
@@ -78,6 +78,12 @@ K charge pump
 F https://www.ti.com/lit/ds/symlink/tps60151.pdf
 $ENDCMP
 #
+$CMP TPS60151DRV
+D 5V, 140mA charge-pump, WSON-6
+K charge pump
+F https://www.ti.com/lit/ds/symlink/tps60151.pdf
+$ENDCMP
+#
 $CMP TPS60500DGS
 D 250mA High-Efficiency Step-Down Charge Pump Regulator, Adjustable Output Voltage, MSOP-10
 K Regulator Step-Down Charge Pump TPS Texas Instruments Ti
diff --git a/Regulator_SwitchedCapacitor.lib b/Regulator_SwitchedCapacitor.lib
index 5c1f43a595..5846a7bdf5 100644
--- a/Regulator_SwitchedCapacitor.lib
+++ b/Regulator_SwitchedCapacitor.lib
@@ -252,16 +252,39 @@ F1 "TPS60151" 250 350 50 H V C CNN
 F2 "Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm_ThermalVias" 100 0 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
 $FPLIST
- WSON-6*1EP*2x2mm*P0.65mm*EP1x1.6mm*
+ WSON*1EP*2x2mm*P0.65mm*
 $ENDFPLIST
 DRAW
 S -300 300 300 -300 0 1 10 f
 X GND 1 0 -400 100 U 50 50 1 1 W
-X VIN 2 0 400 100 D 50 50 1 1 W
+X VIN 2 -300 200 100 R 50 50 1 1 W
 X VOUT 3 400 200 100 L 50 50 1 1 w
 X CP+ 4 400 0 100 L 50 50 1 1 P
 X CP- 5 400 -200 100 L 50 50 1 1 P
 X ENA 6 -400 0 100 R 50 50 1 1 I
+X EP 7 -100 -400 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# TPS60151DRV
+#
+DEF TPS60151DRV U 0 20 Y Y 1 F N
+F0 "U" -250 350 50 H V C CNN
+F1 "TPS60151DRV" 250 350 50 H V C CNN
+F2 "Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm_ThermalVias" 100 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ WSON*1EP*2x2mm*P0.65mm*
+$ENDFPLIST
+DRAW
+S -300 300 300 -300 0 1 10 f
+X GND 1 0 -400 100 U 50 50 1 1 W
+X VIN 2 -400 200 100 R 50 50 1 1 W
+X VOUT 3 400 200 100 L 50 50 1 1 w
+X CP+ 4 400 0 100 L 50 50 1 1 P
+X CP- 5 400 -200 100 L 50 50 1 1 P
+X ENA 6 -400 0 100 R 50 50 1 1 I
+X EP 7 -100 -400 100 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #

From c5f664d1828ff1176570a46d7ceb2f623e16c7cf Mon Sep 17 00:00:00 2001
From: Daniel Mack <daniel@zonque.org>
Date: Sun, 7 Apr 2019 23:12:59 +0200
Subject: [PATCH 051/201] TPS60151: finish the symbol rename by removing the
 part without package suffix

---
 Regulator_SwitchedCapacitor.dcm |  6 ------
 Regulator_SwitchedCapacitor.lib | 22 ----------------------
 2 files changed, 28 deletions(-)

diff --git a/Regulator_SwitchedCapacitor.dcm b/Regulator_SwitchedCapacitor.dcm
index cd38e0d7ef..4085dee33b 100644
--- a/Regulator_SwitchedCapacitor.dcm
+++ b/Regulator_SwitchedCapacitor.dcm
@@ -72,12 +72,6 @@ K monolithic CMOS switched capacitor voltage converter invert double divide mult
 F http://datasheets.maximintegrated.com/en/ds/ICL7660-MAX1044.pdf
 $ENDCMP
 #
-$CMP TPS60151
-D 5V, 140mA charge-pump, WSON-6
-K charge pump
-F https://www.ti.com/lit/ds/symlink/tps60151.pdf
-$ENDCMP
-#
 $CMP TPS60151DRV
 D 5V, 140mA charge-pump, WSON-6
 K charge pump
diff --git a/Regulator_SwitchedCapacitor.lib b/Regulator_SwitchedCapacitor.lib
index 5846a7bdf5..425922809e 100644
--- a/Regulator_SwitchedCapacitor.lib
+++ b/Regulator_SwitchedCapacitor.lib
@@ -244,28 +244,6 @@ X V+ 8 -400 300 100 R 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #
-# TPS60151
-#
-DEF TPS60151 U 0 20 Y Y 1 F N
-F0 "U" -250 350 50 H V C CNN
-F1 "TPS60151" 250 350 50 H V C CNN
-F2 "Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm_ThermalVias" 100 0 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
-$FPLIST
- WSON*1EP*2x2mm*P0.65mm*
-$ENDFPLIST
-DRAW
-S -300 300 300 -300 0 1 10 f
-X GND 1 0 -400 100 U 50 50 1 1 W
-X VIN 2 -300 200 100 R 50 50 1 1 W
-X VOUT 3 400 200 100 L 50 50 1 1 w
-X CP+ 4 400 0 100 L 50 50 1 1 P
-X CP- 5 400 -200 100 L 50 50 1 1 P
-X ENA 6 -400 0 100 R 50 50 1 1 I
-X EP 7 -100 -400 100 U 50 50 1 1 P
-ENDDRAW
-ENDDEF
-#
 # TPS60151DRV
 #
 DEF TPS60151DRV U 0 20 Y Y 1 F N

From 5c434ebe292c778ba0b76e841df9879186fdb739 Mon Sep 17 00:00:00 2001
From: evanshultz <evan.shultz@gmail.com>
Date: Mon, 8 Apr 2019 09:52:50 -0700
Subject: [PATCH 052/201] Nearly center the symbol

I can't center more without seriously changing the symbol and/or putting pins off-grid
---
 Relay.lib | 82 +++++++++++++++++++++++++++----------------------------
 1 file changed, 41 insertions(+), 41 deletions(-)

diff --git a/Relay.lib b/Relay.lib
index f64ebf40a8..588025dd88 100644
--- a/Relay.lib
+++ b/Relay.lib
@@ -1465,66 +1465,66 @@ ENDDEF
 # G6SK-2
 #
 DEF G6SK-2 K 0 20 Y Y 1 F N
-F0 "K" 950 150 50 H V L CNN
-F1 "G6SK-2" 950 50 50 H V L CNN
-F2 "" 650 -50 50 H I L CNN
-F3 "" -200 0 50 H I C CNN
+F0 "K" 850 150 50 H V L CNN
+F1 "G6SK-2" 850 50 50 H V L CNN
+F2 "" 550 -50 50 H I L CNN
+F3 "" -300 0 50 H I C CNN
 $FPLIST
  Relay*DPDT*Omron*G6SK?2*
 $ENDFPLIST
 DRAW
-T 900 650 150 30 0 0 0 R:+ Normal 0 C C
-T 900 650 -150 30 0 0 0 R:- Normal 0 C C
-T 900 -450 150 30 0 0 0 S:+ Normal 0 C C
-T 900 -450 -150 30 0 0 0 S:- Normal 0 C C
-S -600 200 900 -200 0 1 10 f
-S -525 75 -275 -75 0 1 10 N
-S 575 75 825 -75 0 1 10 N
-P 2 0 1 10 -500 -75 -300 75 N
-P 2 0 1 0 -400 -200 -400 -75 N
-P 2 0 1 0 -400 200 -400 75 N
+T 900 550 150 30 0 0 0 R:+ Normal 0 C C
+T 900 550 -150 30 0 0 0 R:- Normal 0 C C
+T 900 -550 150 30 0 0 0 S:+ Normal 0 C C
+T 900 -550 -150 30 0 0 0 S:- Normal 0 C C
+S -700 200 800 -200 0 1 10 f
+S -625 75 -375 -75 0 1 10 N
+S 475 75 725 -75 0 1 10 N
+P 2 0 1 10 -600 -75 -400 75 N
+P 2 0 1 0 -500 -200 -500 -75 N
+P 2 0 1 0 -500 200 -500 75 N
+P 2 0 1 10 -375 0 -350 0 N
+P 2 0 1 10 -325 0 -300 0 N
 P 2 0 1 10 -275 0 -250 0 N
 P 2 0 1 10 -225 0 -200 0 N
+P 2 0 1 0 -200 100 -200 200 N
 P 2 0 1 10 -175 0 -150 0 N
 P 2 0 1 10 -125 0 -100 0 N
-P 2 0 1 0 -100 100 -100 200 N
+P 2 0 1 20 -100 -100 -175 150 N
+P 2 0 1 0 -100 -100 -100 -200 N
 P 2 0 1 10 -75 0 -50 0 N
 P 2 0 1 10 -25 0 0 0 N
-P 2 0 1 20 0 -100 -75 150 N
-P 2 0 1 0 0 -100 0 -200 N
+P 2 0 1 0 0 100 0 200 N
 P 2 0 1 10 25 0 50 0 N
 P 2 0 1 10 75 0 100 0 N
-P 2 0 1 0 100 100 100 200 N
 P 2 0 1 10 125 0 150 0 N
 P 2 0 1 10 175 0 200 0 N
+P 2 0 1 0 200 100 200 200 N
 P 2 0 1 10 225 0 250 0 N
 P 2 0 1 10 275 0 300 0 N
-P 2 0 1 0 300 100 300 200 N
+P 2 0 1 20 300 -100 225 150 N
+P 2 0 1 0 300 -100 300 -200 N
 P 2 0 1 10 325 0 350 0 N
 P 2 0 1 10 375 0 400 0 N
-P 2 0 1 20 400 -100 325 150 N
-P 2 0 1 0 400 -100 400 -200 N
+P 2 0 1 0 400 100 400 200 N
 P 2 0 1 10 425 0 450 0 N
-P 2 0 1 10 475 0 500 0 N
-P 2 0 1 0 500 100 500 200 N
-P 2 0 1 10 525 0 550 0 N
-P 2 0 1 10 600 -75 800 75 N
-P 2 0 1 0 700 -200 700 -75 N
-P 2 0 1 0 700 200 700 75 N
-P 3 0 1 0 -100 100 -75 125 -100 150 F
-P 3 0 1 0 100 100 75 125 100 150 N
-P 3 0 1 0 300 100 325 125 300 150 F
-P 3 0 1 0 500 100 475 125 500 150 N
-X ~ 1 -400 300 100 D 50 50 1 1 P
-X ~ 10 300 300 100 D 50 50 1 1 P
-X ~ 12 -400 -300 100 U 50 50 1 1 P
-X ~ 3 -100 300 100 D 50 50 1 1 P
-X ~ 4 0 -300 100 U 50 50 1 1 P
-X ~ 5 100 300 100 D 50 50 1 1 P
-X ~ 6 700 300 100 D 50 50 1 1 P
-X ~ 7 700 -300 100 U 50 50 1 1 P
-X ~ 8 500 300 100 D 50 50 1 1 P
-X ~ 9 400 -300 100 U 50 50 1 1 P
+P 2 0 1 10 500 -75 700 75 N
+P 2 0 1 0 600 -200 600 -75 N
+P 2 0 1 0 600 200 600 75 N
+P 3 0 1 0 -200 100 -175 125 -200 150 F
+P 3 0 1 0 0 100 -25 125 0 150 N
+P 3 0 1 0 200 100 225 125 200 150 F
+P 3 0 1 0 400 100 375 125 400 150 N
+X ~ 1 -500 300 100 D 50 50 1 1 P
+X ~ 10 200 300 100 D 50 50 1 1 P
+X ~ 12 -500 -300 100 U 50 50 1 1 P
+X ~ 3 -200 300 100 D 50 50 1 1 P
+X ~ 4 -100 -300 100 U 50 50 1 1 P
+X ~ 5 0 300 100 D 50 50 1 1 P
+X ~ 6 600 300 100 D 50 50 1 1 P
+X ~ 7 600 -300 100 U 50 50 1 1 P
+X ~ 8 400 300 100 D 50 50 1 1 P
+X ~ 9 300 -300 100 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #

From e3f0cf65d8a501d4bfbdb8930fb4e5228e59aa23 Mon Sep 17 00:00:00 2001
From: Stefan <misca@hotmail.com>
Date: Mon, 8 Apr 2019 22:12:57 +0200
Subject: [PATCH 053/201] Added PIC18F4420-xP and PIC18F4520-xP (#875)

* Added PIC18F4420-xP and PIC18F4520-xP

* Changed RE3 to input

* Updated keywords for PIC18F4420-xP
---
 MCU_Microchip_PIC18.dcm | 12 +++++++++
 MCU_Microchip_PIC18.lib | 56 +++++++++++++++++++++++++++++++++++++++++
 2 files changed, 68 insertions(+)

diff --git a/MCU_Microchip_PIC18.dcm b/MCU_Microchip_PIC18.dcm
index 27b41b06ee..6ceda95977 100644
--- a/MCU_Microchip_PIC18.dcm
+++ b/MCU_Microchip_PIC18.dcm
@@ -264,6 +264,12 @@ K Flash-Based 8-Bit Microcontroller
 F http://ww1.microchip.com/downloads/en/DeviceDoc/39564c.pdf
 $ENDCMP
 #
+$CMP PIC18F4420-xP
+D 16K Flash, 768B SRAM, 256B EEPROM, ADC, DIP-40
+K Flash-Based 8bit CMOS Microcontroller
+F http://ww1.microchip.com/downloads/en/DeviceDoc/39631E.pdf
+$ENDCMP
+#
 $CMP PIC18F4431-IML
 D 16K Flash, 768B SRAM, 256B EEPROM, nanoWatt XLP, ADC, PWM, QFN44
 K Flash-Based 8-Bit Microcontroller XLP
@@ -366,6 +372,12 @@ K Flash-Based 8-Bit Microcontroller
 F http://ww1.microchip.com/downloads/en/DeviceDoc/39564c.pdf
 $ENDCMP
 #
+$CMP PIC18F4520-xP
+D 32K Flash, 1536b SRAM, 256b EEPROM, ADC, DIP-40
+K 32K Flash, 1536b SRAM, 256b EEPROM, ADC
+F http://ww1.microchip.com/downloads/en/DeviceDoc/39631E.pdf
+$ENDCMP
+#
 $CMP PIC18F4550-IML
 D 32K Flash, 2K SRAM, 256 EEPROM, USB, nanoWatt XLP, QFN44
 K Flash-Based 8-Bit Microcontroller XLP
diff --git a/MCU_Microchip_PIC18.lib b/MCU_Microchip_PIC18.lib
index 07475d7fe9..d82fd50221 100644
--- a/MCU_Microchip_PIC18.lib
+++ b/MCU_Microchip_PIC18.lib
@@ -1150,6 +1150,62 @@ X RB1/INT1 9 -1000 -300 150 R 50 50 1 1 B
 ENDDRAW
 ENDDEF
 #
+# PIC18F4420-xP
+#
+DEF PIC18F4420-xP U 0 20 Y Y 1 F N
+F0 "U" -550 1250 50 H V C CNN
+F1 "PIC18F4420-xP" 100 1250 50 H V L CNN
+F2 "Package_DIP:DIP-40_W15.24mm" 0 -1400 50 H I C CNN
+F3 "" 0 100 50 H I C CNN
+ALIAS PIC18F4520-xP
+$FPLIST
+ DIP*W15.24mm*
+$ENDFPLIST
+DRAW
+S -500 1200 500 -1200 0 1 10 f
+X RE3/~MCLR~ 1 -600 1100 100 R 50 50 1 1 I
+X RE2 10 -600 1000 100 R 50 50 1 1 B
+X VDD 11 0 1300 100 D 50 50 1 1 P N
+X VSS 12 0 -1300 100 U 50 50 1 1 P N
+X RA7 13 -600 -100 100 R 50 50 1 1 B
+X RA6 14 -600 0 100 R 50 50 1 1 B
+X RC0 15 600 600 100 L 50 50 1 1 B
+X RC1 16 600 500 100 L 50 50 1 1 B
+X RC2 17 600 400 100 L 50 50 1 1 B
+X RC3 18 600 300 100 L 50 50 1 1 B
+X RD0 19 600 -300 100 L 50 50 1 1 B
+X RA0 2 -600 600 100 R 50 50 1 1 B
+X RD1 20 600 -400 100 L 50 50 1 1 B
+X RD2 21 600 -500 100 L 50 50 1 1 B
+X RD3 22 600 -600 100 L 50 50 1 1 B
+X RC4 23 600 200 100 L 50 50 1 1 B
+X RC5 24 600 100 100 L 50 50 1 1 B
+X RC6 25 600 0 100 L 50 50 1 1 B
+X RC7 26 600 -100 100 L 50 50 1 1 B
+X RD4 27 600 -700 100 L 50 50 1 1 B
+X RD5 28 600 -800 100 L 50 50 1 1 B
+X RD6 29 600 -900 100 L 50 50 1 1 B
+X RA1 3 -600 500 100 R 50 50 1 1 B
+X RD7 30 600 -1000 100 L 50 50 1 1 B
+X VSS 31 0 -1300 100 U 50 50 1 1 W
+X VDD 32 0 1300 100 D 50 50 1 1 W
+X RB0 33 -600 -300 100 R 50 50 1 1 B
+X RB1 34 -600 -400 100 R 50 50 1 1 B
+X RB2 35 -600 -500 100 R 50 50 1 1 B
+X RB3 36 -600 -600 100 R 50 50 1 1 B
+X RB4 37 -600 -700 100 R 50 50 1 1 B
+X RB5 38 -600 -800 100 R 50 50 1 1 B
+X RB6 39 -600 -900 100 R 50 50 1 1 B
+X RA2 4 -600 400 100 R 50 50 1 1 B
+X RB7 40 -600 -1000 100 R 50 50 1 1 B
+X RA3 5 -600 300 100 R 50 50 1 1 B
+X RA4 6 -600 200 100 R 50 50 1 1 B
+X RA5 7 -600 100 100 R 50 50 1 1 B
+X RE0 8 -600 800 100 R 50 50 1 1 B
+X RE1 9 -600 900 100 R 50 50 1 1 B
+ENDDRAW
+ENDDEF
+#
 # PIC18F4450-IML
 #
 DEF PIC18F4450-IML U 0 50 Y Y 1 F N

From 573fea7f22957f8f05c2dba9ae4abe0a5ffd6dd5 Mon Sep 17 00:00:00 2001
From: aris-kimi <48727784+aris-kimi@users.noreply.github.com>
Date: Tue, 9 Apr 2019 01:59:40 +0300
Subject: [PATCH 054/201]  Added SN6505ADBVR SN6505BDBVR under
 regulators_switching (#1688)

* Added SN6505ADBVR SN6505BDBVR

* Synced

* Corrections

* Corrected footprint filters

* Synced

* Fixed footprint filter

* Add files via upload

* Change libraries

* Add files via upload

* fixed footprint filter and pin length
---
 Power_Management.dcm |  60 ++++++++------
 Power_Management.lib | 183 ++++++++++++++++++++++++-------------------
 2 files changed, 138 insertions(+), 105 deletions(-)

diff --git a/Power_Management.dcm b/Power_Management.dcm
index 1749142231..f711f227d8 100644
--- a/Power_Management.dcm
+++ b/Power_Management.dcm
@@ -1,5 +1,29 @@
 EESchema-DOCLIB  Version 2.0
 #
+$CMP AAT4610BIGV-1-T1
+D Current Limited Load Switch, SOT-23-5
+K Limit USB Active High
+F http://www.skyworksinc.com/uploads/documents/201937A.pdf
+$ENDCMP
+#
+$CMP AAT4610BIGV-T1
+D Current Limited Load Switch, SOT-23-5
+K Limit USB Active Low
+F http://www.skyworksinc.com/uploads/documents/201937A.pdf
+$ENDCMP
+#
+$CMP AAT4616IGV-1-T1
+D Adjustable Current Limited Load Switch, SOT-23-5
+K Limit USB Active High
+F http://www.skyworksinc.com/uploads/documents/AAT4616_201940E.pdf
+$ENDCMP
+#
+$CMP AAT4616IGV-T1
+D Adjustable Current Limited Load Switch, SOT-23-5
+K Limit USB Active Low
+F http://www.skyworksinc.com/uploads/documents/AAT4616_201940E.pdf
+$ENDCMP
+#
 $CMP AUIPS1041R
 D Intelligent Power Low Side Switch, 39V, 4.5A, DPAK-5L
 K low side switch
@@ -90,30 +114,6 @@ K high side switch
 F https://www.infineon.com/dgdl/auips7091.pdf?fileId=5546d462533600a4015355a7c0d21322
 $ENDCMP
 #
-$CMP AAT4616IGV-1-T1
-D Adjustable Current Limited Load Switch, SOT-23-5
-K Limit USB Active High
-F http://www.skyworksinc.com/uploads/documents/AAT4616_201940E.pdf
-$ENDCMP
-#
-$CMP AAT4616IGV-T1
-D Adjustable Current Limited Load Switch, SOT-23-5
-K Limit USB Active Low
-F http://www.skyworksinc.com/uploads/documents/AAT4616_201940E.pdf
-$ENDCMP
-#
-$CMP AAT4610BIGV-1-T1
-D Current Limited Load Switch, SOT-23-5
-K Limit USB Active High
-F http://www.skyworksinc.com/uploads/documents/201937A.pdf
-$ENDCMP
-#
-$CMP AAT4610BIGV-T1
-D Current Limited Load Switch, SOT-23-5
-K Limit USB Active Low
-F http://www.skyworksinc.com/uploads/documents/201937A.pdf
-$ENDCMP
-#
 $CMP AUIPS7111S
 D Current Sense High Side Switch, 65V, 30A, D2PAK-5L
 K high side switch
@@ -822,6 +822,18 @@ K power distribution switch
 F https://www.richtek.com/assets/product_file/RT9701/DS9701-16.pdf
 $ENDCMP
 #
+$CMP SN6505ADBV
+D Low Noise, 1A, Transformer Drivers for Isolated Power Supplies, 160 kHz, SOT-23-6
+K Transformer Drivers
+F http://www.ti.com/lit/ds/symlink/sn6505b.pdf
+$ENDCMP
+#
+$CMP SN6505BDBV
+D Low Noise, 1A, Transformer Drivers for Isolated Power Supplies, 420 kHz, SOT-23-6
+K Transformer Drivers
+F http://www.ti.com/lit/ds/symlink/sn6505b.pdf
+$ENDCMP
+#
 $CMP STM6600
 D Smart push-button on/off controller, power-on lockout, Low Power, 1.6-5.5V, TDFN12
 K push-button-controller low-power
diff --git a/Power_Management.lib b/Power_Management.lib
index 058cb37bfb..5d4cd87766 100644
--- a/Power_Management.lib
+++ b/Power_Management.lib
@@ -1,6 +1,86 @@
 EESchema-LIBRARY Version 2.4
 #encoding utf-8
 #
+# AAT4610BIGV-1-T1
+#
+DEF AAT4610BIGV-1-T1 U 0 20 Y Y 1 F N
+F0 "U" -250 -250 50 H V C CNN
+F1 "AAT4610BIGV-1-T1" 0 250 50 H V C CNN
+F2 "Package_TO_SOT_SMD:SOT-23-5" 0 350 50 H I C CNN
+F3 "" -50 300 50 H I C CNN
+$FPLIST
+ SOT?23*
+$ENDFPLIST
+DRAW
+S -300 200 300 -200 0 1 10 f
+X OUT 1 400 100 100 L 50 50 1 1 w
+X GND 2 0 -300 100 U 50 50 1 1 W
+X SET 3 400 -100 100 L 50 50 1 1 P
+X ON 4 -400 -100 100 R 50 50 1 1 I
+X IN 5 -400 100 100 R 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# AAT4610BIGV-T1
+#
+DEF AAT4610BIGV-T1 U 0 20 Y Y 1 F N
+F0 "U" -250 -250 50 H V C CNN
+F1 "AAT4610BIGV-T1" 0 250 50 H V C CNN
+F2 "Package_TO_SOT_SMD:SOT-23-5" 0 350 50 H I C CNN
+F3 "" -50 300 50 H I C CNN
+$FPLIST
+ SOT?23*
+$ENDFPLIST
+DRAW
+S -300 200 300 -200 0 1 10 f
+X OUT 1 400 100 100 L 50 50 1 1 w
+X GND 2 0 -300 100 U 50 50 1 1 W
+X SET 3 400 -100 100 L 50 50 1 1 P
+X ~ON 4 -400 -100 100 R 50 50 1 1 I
+X IN 5 -400 100 100 R 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# AAT4616IGV-1-T1
+#
+DEF AAT4616IGV-1-T1 U 0 20 Y Y 1 F N
+F0 "U" -250 -250 50 H V C CNN
+F1 "AAT4616IGV-1-T1" 0 250 50 H V C CNN
+F2 "Package_TO_SOT_SMD:SOT-23-5" 0 350 50 H I C CNN
+F3 "" -50 300 50 H I C CNN
+$FPLIST
+ SOT?23*
+$ENDFPLIST
+DRAW
+S -300 200 300 -200 0 1 10 f
+X OUT 1 400 100 100 L 50 50 1 1 w
+X GND 2 0 -300 100 U 50 50 1 1 W
+X SET 3 400 -100 100 L 50 50 1 1 P
+X ON 4 -400 -100 100 R 50 50 1 1 I
+X IN 5 -400 100 100 R 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# AAT4616IGV-T1
+#
+DEF AAT4616IGV-T1 U 0 20 Y Y 1 F N
+F0 "U" -250 -250 50 H V C CNN
+F1 "AAT4616IGV-T1" 0 250 50 H V C CNN
+F2 "Package_TO_SOT_SMD:SOT-23-5" 0 350 50 H I C CNN
+F3 "" -50 300 50 H I C CNN
+$FPLIST
+ SOT?23*
+$ENDFPLIST
+DRAW
+S -300 200 300 -200 0 1 10 f
+X OUT 1 400 100 100 L 50 50 1 1 w
+X GND 2 0 -300 100 U 50 50 1 1 W
+X SET 3 400 -100 100 L 50 50 1 1 P
+X ~ON 4 -400 -100 100 R 50 50 1 1 I
+X IN 5 -400 100 100 R 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
 # AUIPS1041R
 #
 DEF AUIPS1041R U 0 20 Y Y 1 F N
@@ -171,87 +251,6 @@ X OUT 5 0 -300 100 U 50 50 1 1 w
 ENDDRAW
 ENDDEF
 #
-#
-# AAT4616IGV-1-T1
-#
-DEF AAT4616IGV-1-T1 U 0 20 Y Y 1 F N
-F0 "U" -250 -250 50 H V C CNN
-F1 "AAT4616IGV-1-T1" 0 250 50 H V C CNN
-F2 "Package_TO_SOT_SMD:SOT-23-5" 0 350 50 H I C CNN
-F3 "" -50 300 50 H I C CNN
-$FPLIST
- SOT?23*
-$ENDFPLIST
-DRAW
-S -300 200 300 -200 0 1 10 f
-X OUT 1 400 100 100 L 50 50 1 1 w
-X GND 2 0 -300 100 U 50 50 1 1 W
-X SET 3 400 -100 100 L 50 50 1 1 P
-X ON 4 -400 -100 100 R 50 50 1 1 I
-X IN 5 -400 100 100 R 50 50 1 1 W
-ENDDRAW
-ENDDEF
-#
-# AAT4616IGV-T1
-#
-DEF AAT4616IGV-T1 U 0 20 Y Y 1 F N
-F0 "U" -250 -250 50 H V C CNN
-F1 "AAT4616IGV-T1" 0 250 50 H V C CNN
-F2 "Package_TO_SOT_SMD:SOT-23-5" 0 350 50 H I C CNN
-F3 "" -50 300 50 H I C CNN
-$FPLIST
- SOT?23*
-$ENDFPLIST
-DRAW
-S -300 200 300 -200 0 1 10 f
-X OUT 1 400 100 100 L 50 50 1 1 w
-X GND 2 0 -300 100 U 50 50 1 1 W
-X SET 3 400 -100 100 L 50 50 1 1 P
-X ~ON 4 -400 -100 100 R 50 50 1 1 I
-X IN 5 -400 100 100 R 50 50 1 1 W
-ENDDRAW
-ENDDEF
-#
-# AAT4610BIGV-1-T1
-#
-DEF AAT4610BIGV-1-T1 U 0 20 Y Y 1 F N
-F0 "U" -250 -250 50 H V C CNN
-F1 "AAT4610BIGV-1-T1" 0 250 50 H V C CNN
-F2 "Package_TO_SOT_SMD:SOT-23-5" 0 350 50 H I C CNN
-F3 "" -50 300 50 H I C CNN
-$FPLIST
- SOT?23*
-$ENDFPLIST
-DRAW
-S -300 200 300 -200 0 1 10 f
-X OUT 1 400 100 100 L 50 50 1 1 w
-X GND 2 0 -300 100 U 50 50 1 1 W
-X SET 3 400 -100 100 L 50 50 1 1 P
-X ON 4 -400 -100 100 R 50 50 1 1 I
-X IN 5 -400 100 100 R 50 50 1 1 W
-ENDDRAW
-ENDDEF
-#
-# AAT4610BIGV-T1
-#
-DEF AAT4610BIGV-T1 U 0 20 Y Y 1 F N
-F0 "U" -250 -250 50 H V C CNN
-F1 "AAT4610BIGV-T1" 0 250 50 H V C CNN
-F2 "Package_TO_SOT_SMD:SOT-23-5" 0 350 50 H I C CNN
-F3 "" -50 300 50 H I C CNN
-$FPLIST
- SOT?23*
-$ENDFPLIST
-DRAW
-S -300 200 300 -200 0 1 10 f
-X OUT 1 400 100 100 L 50 50 1 1 w
-X GND 2 0 -300 100 U 50 50 1 1 W
-X SET 3 400 -100 100 L 50 50 1 1 P
-X ~ON 4 -400 -100 100 R 50 50 1 1 I
-X IN 5 -400 100 100 R 50 50 1 1 W
-ENDDRAW
-ENDDEF
-#
 # AUIPS7111S
 #
 DEF AUIPS7111S U 0 20 Y Y 1 F N
@@ -1862,6 +1861,28 @@ X VOUT 5 500 0 150 L 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
+# SN6505ADBV
+#
+DEF SN6505ADBV U 0 20 Y Y 1 F N
+F0 "U" -200 250 50 H V C CNN
+F1 "SN6505ADBV" 300 250 50 H V C CNN
+F2 "Package_TO_SOT_SMD:SOT-23-6" 0 -400 50 H I C CNN
+F3 "" -300 250 50 H I C CNN
+ALIAS SN6505BDBV
+$FPLIST
+ SOT?23*
+$ENDFPLIST
+DRAW
+S -200 200 200 -200 0 1 10 f
+X D1 1 300 100 100 L 50 50 1 1 C
+X VCC 2 0 300 100 D 50 50 1 1 W
+X D2 3 300 -100 100 L 50 50 1 1 C
+X GND 4 0 -300 100 U 50 50 1 1 W
+X EN 5 -300 -100 100 R 50 50 1 1 I
+X CLK 6 -300 100 100 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
 # STM6600
 #
 DEF STM6600 U 0 40 Y Y 1 F N

From 68b04ecf5272b9e8d318a759e8f4c8d91dad93c8 Mon Sep 17 00:00:00 2001
From: Oliver <oliver.henry.walters@gmail.com>
Date: Wed, 10 Apr 2019 01:00:22 +1000
Subject: [PATCH 055/201] NLSV2T244 (#1682)

* NLSV2T244

- Added three footprint variants of the same IC
- Dual non-inverting level translator

* Fixed part naming

* Fixed incorrect pins

* Updated footprint to match manufacturer-specific naming

* Fixed footprint filter

* Added OnSemi
---
 Logic_LevelTranslator.dcm | 18 ++++++++
 Logic_LevelTranslator.lib | 87 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 105 insertions(+)

diff --git a/Logic_LevelTranslator.dcm b/Logic_LevelTranslator.dcm
index 142e920d61..e6dfe0ae9a 100644
--- a/Logic_LevelTranslator.dcm
+++ b/Logic_LevelTranslator.dcm
@@ -24,6 +24,24 @@ K SIM Card Level Shifter
 F https://www.onsemi.com/pub/Collateral/NCN4555-D.PDF
 $ENDCMP
 #
+$CMP NLSV2T244D
+D Dual-Bit Dual-Supply Non-Inverting Level Translator, Output Enable, SOIC-8
+K Level-Shifter CMOS-TTL-Translation
+F http://www.onsemi.com/pub/Collateral/NLSV2T244-D.PDF
+$ENDCMP
+#
+$CMP NLSV2T244DM
+D Dual-Bit Dual-Supply Non-Inverting Level Translator, Output Enable, MSOP-8
+K Level-Shifter CMOS-TTL-Translation
+F http://www.onsemi.com/pub/Collateral/NLSV2T244-D.PDF
+$ENDCMP
+#
+$CMP NLSV2T244MU
+D Dual-Bit Dual-Supply Non-Inverting Level Translator, Output Enable, UDFN-8
+K Level-Shifter CMOS-TTL-Translation
+F http://www.onsemi.com/pub/Collateral/NLSV2T244-D.PDF
+$ENDCMP
+#
 $CMP SN74AUP1T34DCK
 D 1-Bit Unidirectional Voltage-Level Translator, SC-70
 K Noninverting
diff --git a/Logic_LevelTranslator.lib b/Logic_LevelTranslator.lib
index 250622f5d1..95c97b960d 100644
--- a/Logic_LevelTranslator.lib
+++ b/Logic_LevelTranslator.lib
@@ -105,6 +105,93 @@ X SIM_RST 9 500 -100 100 L 50 50 1 1 O
 ENDDRAW
 ENDDEF
 #
+# NLSV2T244D
+#
+DEF NLSV2T244D U 0 20 Y Y 1 F N
+F0 "U" -250 450 50 H V C CNN
+F1 "NLSV2T244D" 150 450 50 H V L CNN
+F2 "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm" 50 -550 50 H I C CNN
+F3 "" -900 -550 50 H I C CNN
+$FPLIST
+ SOIC*3.9x4.9mm*P1.27mm*
+$ENDFPLIST
+DRAW
+S -300 400 300 -400 0 1 10 f
+P 2 0 1 0 -150 -100 -50 -100 N
+P 2 0 1 0 -150 100 -50 100 N
+P 2 0 1 0 150 -100 50 -100 N
+P 2 0 1 0 150 100 50 100 N
+P 4 0 1 0 -50 -150 -50 -50 50 -100 -50 -150 N
+P 4 0 1 0 -50 50 -50 150 50 100 -50 50 N
+X VCCA 1 -100 500 100 D 50 50 1 1 W
+X A1 2 -400 100 100 R 50 50 1 1 I
+X A2 3 -400 -100 100 R 50 50 1 1 I
+X ~OE 4 -400 -300 100 R 50 50 1 1 I
+X GND 5 0 -500 100 U 50 50 1 1 W
+X B2 6 400 -100 100 L 50 50 1 1 O
+X B1 7 400 100 100 L 50 50 1 1 O
+X VCCB 8 100 500 100 D 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# NLSV2T244DM
+#
+DEF NLSV2T244DM U 0 20 Y Y 1 F N
+F0 "U" -250 450 50 H V C CNN
+F1 "NLSV2T244DM" 150 450 50 H V L CNN
+F2 "Package_SO:MSOP-8_3x3mm_P0.65mm" 50 -550 50 H I C CNN
+F3 "" -900 -550 50 H I C CNN
+$FPLIST
+ MSOP*3x3mm*P0.65mm*
+$ENDFPLIST
+DRAW
+S -300 400 300 -400 0 1 10 f
+P 2 0 1 0 -150 -100 -50 -100 N
+P 2 0 1 0 -150 100 -50 100 N
+P 2 0 1 0 150 -100 50 -100 N
+P 2 0 1 0 150 100 50 100 N
+P 4 0 1 0 -50 -150 -50 -50 50 -100 -50 -150 N
+P 4 0 1 0 -50 50 -50 150 50 100 -50 50 N
+X VCCA 1 -100 500 100 D 50 50 1 1 W
+X A1 2 -400 100 100 R 50 50 1 1 I
+X A2 3 -400 -100 100 R 50 50 1 1 I
+X ~OE 4 -400 -300 100 R 50 50 1 1 I
+X GND 5 0 -500 100 U 50 50 1 1 W
+X B2 6 400 -100 100 L 50 50 1 1 O
+X B1 7 400 100 100 L 50 50 1 1 O
+X VCCB 8 100 500 100 D 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# NLSV2T244MU
+#
+DEF NLSV2T244MU U 0 20 Y Y 1 F N
+F0 "U" -250 450 50 H V C CNN
+F1 "NLSV2T244MU" 150 450 50 H V L CNN
+F2 "Package_DFN_QFN:OnSemi_UDFN-8_1.2x1.8mm_P0.4mm" 50 -550 50 H I C CNN
+F3 "" -900 -550 50 H I C CNN
+$FPLIST
+ OnSemi*UDFN*1.2x1.8mm*P0.4mm*
+$ENDFPLIST
+DRAW
+S -300 400 300 -400 0 1 10 f
+P 2 0 1 0 -150 -100 -50 -100 N
+P 2 0 1 0 -150 100 -50 100 N
+P 2 0 1 0 150 -100 50 -100 N
+P 2 0 1 0 150 100 50 100 N
+P 4 0 1 0 -50 -150 -50 -50 50 -100 -50 -150 N
+P 4 0 1 0 -50 50 -50 150 50 100 -50 50 N
+X VCCA 1 -100 500 100 D 50 50 1 1 W
+X A1 2 -400 100 100 R 50 50 1 1 I
+X A2 3 -400 -100 100 R 50 50 1 1 I
+X ~OE 4 -400 -300 100 R 50 50 1 1 I
+X GND 5 0 -500 100 U 50 50 1 1 W
+X B2 6 400 -100 100 L 50 50 1 1 O
+X B1 7 400 100 100 L 50 50 1 1 O
+X VCCB 8 100 500 100 D 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
 # SN74AUP1T34DCK
 #
 DEF SN74AUP1T34DCK U 0 20 Y Y 1 F N

From 4d6131b0242b62f7323eef276fea1028154ffaf5 Mon Sep 17 00:00:00 2001
From: Daniel Mack <github@zonque.org>
Date: Tue, 9 Apr 2019 17:54:59 +0200
Subject: [PATCH 056/201] Audio: Add CS4270 Codec (#1676)

* Audio: Add CS4270 Codec

The CS4270 is a 24-Bit, 192-kHz Stereo Audio CODEC in a TSSOP-24 package.

The datasheet is here:

  https://statics.cirrus.com/pubs/proDatasheet/CS4270_F1.pdf

* Audio: cs4270: fix some minor pin arrangements

* Bring digital audio inputs to the top
* Align digital an analog audio pins
* Move MUTEA and MUTEB to the right side
* Change FIL+ and VQ to passive type

* Audio: CS4270: some more pin rearrangements
---
 Audio.dcm |  6 ++++++
 Audio.lib | 39 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 45 insertions(+)

diff --git a/Audio.dcm b/Audio.dcm
index 6a7b1cf08e..b6dc38b5ea 100644
--- a/Audio.dcm
+++ b/Audio.dcm
@@ -102,6 +102,12 @@ K audio codec 2ch 24bit 192kHz
 F https://d3uzseaevmutz1.cloudfront.net/pubs/proDatasheet/CS4245_F3.pdf
 $ENDCMP
 #
+$CMP CS4270
+D 24-Bit, 192-kHz Stereo Audio CODEC, TSSOP-24
+K Audio Codec
+F https://statics.cirrus.com/pubs/proDatasheet/CS4270_F1.pdf
+$ENDCMP
+#
 $CMP CS43L21
 D Low-Power, Stereo Digital-to-Analog Converter, QFN-32
 K audio dac 2ch 24bit 96kHz
diff --git a/Audio.lib b/Audio.lib
index 2ed4e93fe8..824231a4c8 100644
--- a/Audio.lib
+++ b/Audio.lib
@@ -663,6 +663,45 @@ X AIN2A 9 -900 1000 100 R 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #
+# CS4270
+#
+DEF CS4270 U 0 20 Y Y 1 F N
+F0 "U" -450 850 50 H V C CNN
+F1 "CS4270" 350 850 50 H V C CNN
+F2 "Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm" 0 0 50 H I C CNN
+F3 "" 0 1000 50 V I C CNN
+$FPLIST
+ TSSOP*4.4x7.8mm*P0.65mm*
+$ENDFPLIST
+DRAW
+S -500 800 500 -800 0 1 10 f
+X SDIN 1 -600 700 100 R 50 50 1 0 I
+X SCL/CCLK/M0 10 -600 -200 100 R 50 50 1 0 I
+X AD0/~CS~/I2S/~LJ 11 -600 -300 100 R 50 50 1 0 I
+X AD1/CDIN/MDIV1 12 -600 -400 100 R 50 50 1 0 I
+X AD2/MDIV2 13 -600 -500 100 R 50 50 1 0 I
+X ~RST 14 -600 -600 100 R 50 50 1 0 I
+X AINA 15 -600 200 100 R 50 50 1 0 I
+X AINB 16 -600 100 100 R 50 50 1 0 I
+X VQ 17 600 -600 100 L 50 50 1 0 P
+X FIL+ 18 600 -500 100 L 50 50 1 0 P
+X VA 19 0 900 100 D 50 50 1 0 W
+X LRCLK 2 -600 600 100 R 50 50 1 0 B
+X AGND 20 100 -900 100 U 50 50 1 0 W
+X ~MUTEA 21 600 -100 100 L 50 50 1 0 I
+X OUTA 22 600 200 100 L 50 50 1 0 O
+X OUTB 23 600 100 100 L 50 50 1 0 O
+X ~MUTEB 24 600 -200 100 L 50 50 1 0 I
+X MCLK 3 -600 500 100 R 50 50 1 0 I
+X SCLK 4 -600 400 100 R 50 50 1 0 B
+X VD 5 -100 900 100 D 50 50 1 0 W
+X DGND 6 0 -900 100 U 50 50 1 0 W
+X SDOUT 7 600 700 100 L 50 50 1 0 O
+X VLC 8 100 900 100 D 50 50 1 0 W
+X SDA/CDOUT/M1 9 -600 -100 100 R 50 50 1 0 B
+ENDDRAW
+ENDDEF
+#
 # CS43L21
 #
 DEF CS43L21 U 0 20 Y Y 1 F N

From 55bce93f5ca9b73d0017bec7729f4c345e7ed320 Mon Sep 17 00:00:00 2001
From: Joel <myfreescalewebpage@free.fr>
Date: Tue, 9 Apr 2019 22:07:30 +0200
Subject: [PATCH 057/201] Fix CY7C65215 (#1726)

* Interface USB: CY7C65215, fix pin 20 name and position

* Revert "Interface USB: CY7C65215, fix pin 20 name and position"

This reverts commit e0a31adffaacb1c8455aeef16015905f3e6345ff.

* Interface USB: CY7C65215, pin 20 fix name and position
---
 Interface_USB.lib | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Interface_USB.lib b/Interface_USB.lib
index 9fee410281..d7aa679542 100644
--- a/Interface_USB.lib
+++ b/Interface_USB.lib
@@ -211,7 +211,7 @@ F1 "CP2102N-A01-GQFN28" 1050 1250 50 H V R CNN
 F2 "Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm" 450 -1200 50 H I L CNN
 F3 "" 50 -750 50 H I C CNN
 $FPLIST
- QFN*1EP*5x5mm*P0.5mm* 
+ QFN*1EP*5x5mm*P0.5mm*
 $ENDFPLIST
 DRAW
 S -400 1200 400 -1200 0 1 10 f
@@ -486,7 +486,7 @@ X VSSD 17 0 -1200 100 U 50 50 1 1 W
 X ~nXRES 18 -700 700 100 R 50 50 1 1 I
 X VBUS 19 700 700 100 L 50 50 1 1 w
 X SCB0_0/GPIO_8 2 -700 400 100 R 50 50 1 1 B
-X VDDD 20 200 900 100 D 50 50 1 1 W
+X VSSD 20 -200 -1200 100 U 50 50 1 1 W
 X GPIO_17 21 700 -300 100 L 50 50 1 1 T
 X GPIO_18 22 700 -200 100 L 50 50 1 1 T
 X VDDD 23 0 900 100 D 50 50 1 1 W

From 5281dd5ea1d583d6810a674e09a6809cbedbb0f3 Mon Sep 17 00:00:00 2001
From: Thomas Puchinger <Thomas.Puchinger@tuwien.ac.at>
Date: Tue, 9 Apr 2019 22:13:16 +0200
Subject: [PATCH 058/201] Review fix

---
 Sensor_Optical.dcm |  2 +-
 Sensor_Optical.lib | 50 +++++++++++++++++++++++-----------------------
 2 files changed, 26 insertions(+), 26 deletions(-)

diff --git a/Sensor_Optical.dcm b/Sensor_Optical.dcm
index e3a2eaf9a4..a26fecbc9f 100644
--- a/Sensor_Optical.dcm
+++ b/Sensor_Optical.dcm
@@ -68,7 +68,7 @@ $ENDCMP
 #
 $CMP AS72651
 D Smart Spectral Sensor
-K Smart 18-Channel VIS+NIR Spectral_ID Sensor with Electronic Shutter
+K Smart 18-Channel VIS+NIR Spectral_ID Sensor with Electronic Shutter, LGA-20
 F https://ams.com/documents/20143/36005/AS7265x_DS000612_1-00.pdf/08051c8a-a7f6-6231-7993-2d3fe0bf38b8
 $ENDCMP
 #
diff --git a/Sensor_Optical.lib b/Sensor_Optical.lib
index e9bba88500..dcdc06b327 100644
--- a/Sensor_Optical.lib
+++ b/Sensor_Optical.lib
@@ -177,35 +177,35 @@ ENDDEF
 # AS72651
 #
 DEF AS72651 U 0 20 Y Y 1 F N
-F0 "U" -400 900 50 H V C CNN
-F1 "AS72651" -400 1000 50 H V C CNN
-F2 "Package_LGA:AMS_LGA-20_4.7x4.5mm_P0.65mm" 0 -1250 50 H I C CNN
-F3 "" 400 0 50 H I C CNN
+F0 "U" -300 800 50 H V C CNN
+F1 "AS72651" 300 800 50 H V C CNN
+F2 "Package_LGA:AMS_LGA-20_4.7x4.5mm_P0.65mm" 0 -1100 50 H I C CNN
+F3 "" 400 -100 50 H I C CNN
 $FPLIST
  AMS?LGA*4.7x4.5mm*P0.65mm*
 $ENDFPLIST
 DRAW
-S 500 -800 -500 800 0 1 10 f
-X SLV1_RESN 1 -600 -200 100 R 50 50 1 1 B
-X SDA_M 10 -600 0 100 R 50 50 1 1 B
-X RX/SCL_S 11 -600 400 100 R 50 50 1 1 B
-X TX/SDA_S 12 -600 300 100 R 50 50 1 1 B
-X INT 13 -600 200 100 R 50 50 1 1 O
-X VDD2 14 100 900 100 D 50 50 1 1 W
-X LED_DRV 15 600 300 100 L 50 50 1 1 O
-X GND 16 0 -900 100 U 50 50 1 1 W
-X VDD1 17 -100 900 100 D 50 50 1 1 W
-X LED_IND 18 600 400 100 L 50 50 1 1 O
-X NC 19 -600 -700 100 R 50 50 1 1 N N
-X RESN 2 -600 -400 100 R 50 50 1 1 I
-X SLV2_RESN 20 -600 -300 100 R 50 50 1 1 O
-X SCK 3 600 -400 100 L 50 50 1 1 O
-X MOSI 4 600 -300 100 L 50 50 1 1 B
-X MISO 5 600 -200 100 L 50 50 1 1 B
-X CSN 6 600 -500 100 L 50 50 1 1 O
-X NC 7 -600 -600 100 R 50 50 1 1 N N
-X I2C_ENB 8 -600 500 100 R 50 50 1 1 I
-X SCL_M 9 -600 -100 100 R 50 50 1 1 O
+S 400 -700 -400 700 0 1 10 f
+X ~SLV1_RES 1 -500 -200 100 R 50 50 1 1 O
+X SDA_M 10 -500 -100 100 R 50 50 1 1 B
+X RX/SCL_S 11 -500 400 100 R 50 50 1 1 I
+X TX/SDA_S 12 -500 300 100 R 50 50 1 1 B
+X INT 13 -500 500 100 R 50 50 1 1 O
+X VDD2 14 100 800 100 D 50 50 1 1 W
+X LED_DRV 15 500 300 100 L 50 50 1 1 O
+X GND 16 0 -800 100 U 50 50 1 1 W
+X VDD1 17 -100 800 100 D 50 50 1 1 W
+X LED_IND 18 500 400 100 L 50 50 1 1 O
+X NC 19 400 -500 100 L 50 50 1 1 N N
+X ~RES 2 -500 -500 100 R 50 50 1 1 I
+X ~SLV2_RES 20 -500 -300 100 R 50 50 1 1 O
+X SCK 3 500 -200 100 L 50 50 1 1 O
+X MOSI 4 500 0 100 L 50 50 1 1 O
+X MISO 5 500 -100 100 L 50 50 1 1 I
+X ~CS 6 500 -300 100 L 50 50 1 1 O
+X NC 7 400 -400 100 L 50 50 1 1 N N
+X I2C_ENB 8 -500 200 100 R 50 50 1 1 I
+X SCL_M 9 -500 0 100 R 50 50 1 1 O
 ENDDRAW
 ENDDEF
 #

From 7585fa59b8ebf0117cc366189118f38813a00edc Mon Sep 17 00:00:00 2001
From: Jorge Neiva <jneiva08@gmail.com>
Date: Tue, 9 Apr 2019 21:15:32 +0100
Subject: [PATCH 059/201] remake of symbol

---
 Timer_RTC.dcm |  2 +-
 Timer_RTC.lib | 16 ++++++++--------
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/Timer_RTC.dcm b/Timer_RTC.dcm
index 45257de37b..95cae407e3 100644
--- a/Timer_RTC.dcm
+++ b/Timer_RTC.dcm
@@ -115,7 +115,7 @@ F https://assets.nexperia.com/documents/data-sheet/PCF8563.pdf
 $ENDCMP
 #
 $CMP RV-1805-C3
-D Extreme Low Power, Real Time Clock/Calendar Module  I2C Interface,
+D Realtime Clock/Calendar I2C Interface, Extreme Low Power, MicroCrystal C3
 K Low Power RTC I2C
 F https://www.microcrystal.com/fileadmin/Media/Products/RTC/Datasheet/RV-1805-C3.pdf
 $ENDCMP
diff --git a/Timer_RTC.lib b/Timer_RTC.lib
index e1d6c00638..0dcb2e9267 100644
--- a/Timer_RTC.lib
+++ b/Timer_RTC.lib
@@ -319,23 +319,23 @@ ENDDEF
 # RV-1805-C3
 #
 DEF RV-1805-C3 U 0 20 Y Y 1 F N
-F0 "U" -350 550 50 H V C CNN
-F1 "RV-1805-C3" 400 550 50 H V C CNN
-F2 "RTC:RTC_SMD_MicroCrystal_RV-1805-C3" 800 -550 50 H I C CNN
+F0 "U" -350 350 50 H V C CNN
+F1 "RV-1805-C3" 300 350 50 H V C CNN
+F2 "Package_SON:RTC_SMD_MicroCrystal_C3_2.5x3.7mm" 1000 -350 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
 $FPLIST
- *RV?1805*
+ *MicroCrystal?C3*
 $ENDFPLIST
 DRAW
-S -400 500 400 -500 0 1 10 f
-X VDD 1 -100 600 100 D 50 50 1 1 W
+S 400 300 -400 -300 0 1 10 f
+X VDD 1 -100 400 100 D 50 50 1 1 W
 X ~RST 10 500 100 100 L 50 50 1 1 C
 X Cap_RC 2 -500 -200 100 R 50 50 1 1 P
 X CLK/~INT 3 500 -100 100 L 50 50 1 1 C
 X SCL 4 -500 200 100 R 50 50 1 1 I
 X SDA 5 -500 100 100 R 50 50 1 1 B
-X VSS 6 0 -600 100 U 50 50 1 1 W
-X VBACKUP 7 100 600 100 D 50 50 1 1 W
+X VSS 6 0 -400 100 U 50 50 1 1 W
+X VBACKUP 7 0 400 100 D 50 50 1 1 W
 X PSW 8 500 0 100 L 50 50 1 1 C
 X WDI 9 -500 -100 100 R 50 50 1 1 I
 ENDDRAW

From a54f9e9bdf80c2252e35fd48c07c18eeed6c6b2f Mon Sep 17 00:00:00 2001
From: Joel <myfreescalewebpage@free.fr>
Date: Tue, 9 Apr 2019 22:47:23 +0200
Subject: [PATCH 060/201] Add Texas TPS568215 (#1610)

* Regulator Switching: TPS568215, creation

* Regulator Switching: TPS568215, fixes following review
---
 Regulator_Switching.dcm |  6 ++++++
 Regulator_Switching.lib | 33 +++++++++++++++++++++++++++++++++
 2 files changed, 39 insertions(+)

diff --git a/Regulator_Switching.dcm b/Regulator_Switching.dcm
index 4b5321cff8..9e86df9f61 100644
--- a/Regulator_Switching.dcm
+++ b/Regulator_Switching.dcm
@@ -5100,6 +5100,12 @@ K step-down dcdc voltage regulator
 F http://www.ti.com/lit/ds/symlink/tps563200.pdf
 $ENDCMP
 #
+$CMP TPS568215RNN
+D 4.5V-17V Input, 8A Synchronous Step-Down SWIFT Converter, Adjustable Output, 400kHz/800kHz/1.2MHz Switching Frequency, Texas VQFN-18
+K switching buck converter step-down
+F http://www.ti.com/lit/ds/symlink/tps568215.pdf
+$ENDCMP
+#
 $CMP TPS61041DBV
 D Synchronous Boost Regulator, Adjustable Output up to 28V, SOT-23-5
 K Step-Up Boost DC-DC Regulator Adjustable
diff --git a/Regulator_Switching.lib b/Regulator_Switching.lib
index a82e33e4be..e1f71cbf08 100644
--- a/Regulator_Switching.lib
+++ b/Regulator_Switching.lib
@@ -5663,6 +5663,39 @@ X VBST 6 400 0 100 L 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #
+# TPS568215RNN
+#
+DEF TPS568215RNN U 0 20 Y Y 1 F N
+F0 "U" -250 550 50 H V C CNN
+F1 "TPS568215RNN" 200 550 50 H V C CNN
+F2 "Package_DFN_QFN:Texas_RNN0018A" 0 -950 50 H I C CNN
+F3 "" 350 600 50 H I C CNN
+$FPLIST
+ Texas*RNN0018A*
+$ENDFPLIST
+DRAW
+S -300 500 300 -500 0 1 10 f
+X BOOT 1 400 200 100 L 50 50 1 1 P
+X PGND 10 100 -600 100 U 50 50 1 1 P N
+X VIN 11 -400 400 100 R 50 50 1 1 P N
+X AGND 12 -100 -600 100 U 50 50 1 1 W
+X FB 13 400 0 100 L 50 50 1 1 I
+X SS 14 -400 -200 100 R 50 50 1 1 P
+X EN 15 -400 200 100 R 50 50 1 1 I
+X PGOOD 16 400 -200 100 L 50 50 1 1 C
+X VREG5 17 -400 -100 100 R 50 50 1 1 P
+X MODE 18 -400 0 100 R 50 50 1 1 I
+X VIN 2 -400 400 100 R 50 50 1 1 W
+X PGND 3 100 -600 100 U 50 50 1 1 W
+X PGND 4 100 -600 100 U 50 50 1 1 P N
+X PGND 5 100 -600 100 U 50 50 1 1 P N
+X SW 6 400 400 100 L 50 50 1 1 w
+X SW 7 400 400 100 L 50 50 1 1 P N
+X PGND 8 100 -600 100 U 50 50 1 1 P N
+X PGND 9 100 -600 100 U 50 50 1 1 P N
+ENDDRAW
+ENDDEF
+#
 # TPS61041DDC
 #
 DEF TPS61041DDC U 0 20 Y Y 1 F N

From 8f873db2b0ae3b119dbe53160edc3b7dc1e07ab0 Mon Sep 17 00:00:00 2001
From: Jorge Neiva <jneiva08@gmail.com>
Date: Tue, 9 Apr 2019 21:55:44 +0100
Subject: [PATCH 061/201] fix footprint filter

---
 Timer_RTC.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Timer_RTC.lib b/Timer_RTC.lib
index 0dcb2e9267..959d638f4b 100644
--- a/Timer_RTC.lib
+++ b/Timer_RTC.lib
@@ -324,7 +324,7 @@ F1 "RV-1805-C3" 300 350 50 H V C CNN
 F2 "Package_SON:RTC_SMD_MicroCrystal_C3_2.5x3.7mm" 1000 -350 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
 $FPLIST
- *MicroCrystal?C3*
+ RTC*SMD*MicroCrystal*C3*2.5x3.7mm*
 $ENDFPLIST
 DRAW
 S 400 300 -400 -300 0 1 10 f

From d99e386d4742f2b802be435d49322f1acf679b1f Mon Sep 17 00:00:00 2001
From: John Whitmore <johnfwhitmore@gmail.com>
Date: Wed, 10 Apr 2019 06:45:42 +0100
Subject: [PATCH 062/201] Relayout of symbol and correction of pin

Changed pin type to "Open Collector" there isn't an open drain type?

Signed-off-by: John Whitmore <johnfwhitmore@gmail.com>
---
 Timer_RTC.lib | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/Timer_RTC.lib b/Timer_RTC.lib
index 34b1c23dbe..cfa54b24f5 100644
--- a/Timer_RTC.lib
+++ b/Timer_RTC.lib
@@ -281,15 +281,15 @@ $FPLIST
  SOIC*3.9x4.9mm*P1.27mm*
 $ENDFPLIST
 DRAW
-S -300 400 300 -400 0 1 10 f
-X OSCI 1 -400 100 100 R 50 50 1 1 I
-X OSCO 2 -400 -100 100 R 50 50 1 1 O
-X VBAT 3 100 500 100 D 50 50 1 1 W
+S -400 200 400 -400 0 1 0 f
+X OSCI 1 -500 -200 100 R 50 50 1 1 I
+X OSCO 2 -500 -300 100 R 50 50 1 1 O
+X VBAT 3 100 300 100 D 50 50 1 1 W
 X VSS 4 0 -500 100 U 50 50 1 1 W
-X SDA 5 400 0 100 L 50 50 1 1 B
-X SCL 6 400 100 100 L 50 50 1 1 I
-X ~INT1~/CLKO 7 400 -200 100 L 50 50 1 1 O
-X VDD 8 -100 500 100 D 50 50 1 1 W
+X SDA 5 -500 0 100 R 50 50 1 1 B
+X SCL 6 -500 100 100 R 50 50 1 1 I
+X ~INT1~/CLKOUT 7 500 -100 100 L 50 50 1 1 C
+X VDD 8 -100 300 100 D 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #

From e1a15efcb92217d16ac2bcf90ffcbb9c65c19de5 Mon Sep 17 00:00:00 2001
From: John Whitmore <johnfwhitmore@gmail.com>
Date: Wed, 10 Apr 2019 06:52:11 +0100
Subject: [PATCH 063/201] Corrected outline thickness

Signed-off-by: John Whitmore <johnfwhitmore@gmail.com>
---
 Timer_RTC.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Timer_RTC.lib b/Timer_RTC.lib
index cfa54b24f5..e08d9141b6 100644
--- a/Timer_RTC.lib
+++ b/Timer_RTC.lib
@@ -281,7 +281,7 @@ $FPLIST
  SOIC*3.9x4.9mm*P1.27mm*
 $ENDFPLIST
 DRAW
-S -400 200 400 -400 0 1 0 f
+S -400 200 400 -400 0 1 10 f
 X OSCI 1 -500 -200 100 R 50 50 1 1 I
 X OSCO 2 -500 -300 100 R 50 50 1 1 O
 X VBAT 3 100 300 100 D 50 50 1 1 W

From de490cff4ad5e7522caf5b4cb3ff938cc17c225a Mon Sep 17 00:00:00 2001
From: jneiva08 <jneiva08@gmail.com>
Date: Wed, 10 Apr 2019 08:38:45 +0100
Subject: [PATCH 064/201] Add RV-8523-C3 RTC

---
 Timer_RTC.dcm |  6 ++++++
 Timer_RTC.lib | 25 +++++++++++++++++++++++++
 2 files changed, 31 insertions(+)

diff --git a/Timer_RTC.dcm b/Timer_RTC.dcm
index 95cae407e3..e5dd4d6714 100644
--- a/Timer_RTC.dcm
+++ b/Timer_RTC.dcm
@@ -120,4 +120,10 @@ K Low Power RTC I2C
 F https://www.microcrystal.com/fileadmin/Media/Products/RTC/Datasheet/RV-1805-C3.pdf
 $ENDCMP
 #
+$CMP RV-8523-C3
+D Realtime Clock/Calendar I2C Interface, Low Power, 1.2 V to 5.5 V, MicroCrystal C3
+K Low Power RTC I2C
+F https://www.microcrystal.com/fileadmin/Media/Products/RTC/Datasheet/RV-8523-C3.pdf
+$ENDCMP
+#
 #End Doc Library
diff --git a/Timer_RTC.lib b/Timer_RTC.lib
index b062086b86..ffc9ebb04c 100644
--- a/Timer_RTC.lib
+++ b/Timer_RTC.lib
@@ -341,4 +341,29 @@ X WDI 9 -500 -100 100 R 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #
+# RV-8523-C3
+#
+DEF RV-8523-C3 U 0 20 Y Y 1 F N
+F0 "U" -350 350 50 H V C CNN
+F1 "RV-8523-C3" 300 350 50 H V C CNN
+F2 "Package_SON:RTC_SMD_MicroCrystal_C3_2.5x3.7mm" 1000 -350 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ RTC*SMD*MicroCrystal*C3*2.5x3.7mm*
+$ENDFPLIST
+DRAW
+S 400 300 -400 -300 0 1 10 f
+X VDD 1 -100 400 100 D 50 50 1 1 W
+X NC 10 -400 -200 100 R 50 50 1 1 N N
+X ~INT_1 2 500 100 100 L 50 50 1 1 C
+X SCL 3 -500 200 100 R 50 50 1 1 I
+X SDA 4 -500 100 100 R 50 50 1 1 B
+X CLKOUT 5 500 -100 100 L 50 50 1 1 C
+X ~INT_2 6 500 0 100 L 50 50 1 1 C
+X VSS 7 0 -400 100 U 50 50 1 1 W
+X VBACKUP 8 0 400 100 D 50 50 1 1 W
+X NC 9 -400 -100 100 R 50 50 1 1 N N
+ENDDRAW
+ENDDEF
+#
 #End Library

From 537e711252e46f4ffef31c36a065f23a2dce07d8 Mon Sep 17 00:00:00 2001
From: Oliver Walters <oliver.henry.walters@gmail.com>
Date: Wed, 10 Apr 2019 22:49:15 +1000
Subject: [PATCH 065/201] Upated part naming

Also stacked PAD with GND pin
---
 Interface_CAN_LIN.dcm |  8 ++++----
 Interface_CAN_LIN.lib | 10 +++++-----
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/Interface_CAN_LIN.dcm b/Interface_CAN_LIN.dcm
index e5a3897267..6d0131043f 100644
--- a/Interface_CAN_LIN.dcm
+++ b/Interface_CAN_LIN.dcm
@@ -120,14 +120,14 @@ K CAN FD Controller SPI
 F https://ww1.microchip.com/downloads/en/DeviceDoc/20005688A.pdf
 $ENDCMP
 #
-$CMP MCP2542FD
-D CAN-FD Transceiver, Wake-Up on CAN activity, 8Mbps, 5V supply, STBY pin, DFN8 package
+$CMP MCP2542FDxMF
+D CAN-FD Transceiver, Wake-Up on CAN activity, 8Mbps, 5V supply, STBY pin, DFN-8
 K CAN transceiver
 F http://ww1.microchip.com/downloads/en/DeviceDoc/25167A.pdf
 $ENDCMP
 #
-$CMP MCP2542WFD
-D CAN-FD Transceiver, Wake-Up on CAN Pattern, 8Mbps, 5V supply, STBY pin, DFN8 package
+$CMP MCP2542WFDxMF
+D CAN-FD Transceiver, Wake-Up on CAN Pattern, 8Mbps, 5V supply, STBY pin, DFN-8
 K CAN transceiver WUP
 F http://ww1.microchip.com/downloads/en/DeviceDoc/25167A.pdfs
 $ENDCMP
diff --git a/Interface_CAN_LIN.lib b/Interface_CAN_LIN.lib
index 507f18ea71..ac3ad066a3 100644
--- a/Interface_CAN_LIN.lib
+++ b/Interface_CAN_LIN.lib
@@ -510,14 +510,14 @@ X ~INT0~/GPIO0/XSTBY 9 600 -200 100 L 50 50 1 1 B
 ENDDRAW
 ENDDEF
 #
-# MCP2542FD
+# MCP2542FDxMF
 #
-DEF MCP2542FD U 0 20 Y Y 1 F N
+DEF MCP2542FDxMF U 0 20 Y Y 1 F N
 F0 "U" -400 350 50 H V L CNN
-F1 "MCP2542FD" 100 350 50 H V L CNN
+F1 "MCP2542FDxMF" 100 350 50 H V L CNN
 F2 "Package_DFN_QFN:DFN-8-1EP_3x3mm_P0.65mm_EP1.55x2.4mm" 0 -500 50 H I C CIN
 F3 "" 0 0 50 H I C CNN
-ALIAS MCP2542WFD
+ALIAS MCP2542WFDxMF
 $FPLIST
  DFN*1EP*3x3mm*P0.65mm*
 $ENDFPLIST
@@ -531,7 +531,7 @@ X VIO 5 -100 400 100 D 50 50 1 1 W
 X CANL 6 500 -100 100 L 50 50 1 1 B
 X CANH 7 500 100 100 L 50 50 1 1 B
 X STBY 8 -500 -200 100 R 50 50 1 1 I
-X PAD 9 -100 -400 100 U 50 50 1 1 W
+X PAD 9 0 -400 100 U 50 50 1 1 P N
 ENDDRAW
 ENDDEF
 #

From d92540fedda35ff48d9caa219f3a1423d10f232b Mon Sep 17 00:00:00 2001
From: Oliver Walters <oliver.henry.walters@gmail.com>
Date: Wed, 10 Apr 2019 22:53:22 +1000
Subject: [PATCH 066/201] Fixed datasheet references

---
 Interface_CAN_LIN.dcm | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Interface_CAN_LIN.dcm b/Interface_CAN_LIN.dcm
index 6d0131043f..b14103a20c 100644
--- a/Interface_CAN_LIN.dcm
+++ b/Interface_CAN_LIN.dcm
@@ -123,13 +123,13 @@ $ENDCMP
 $CMP MCP2542FDxMF
 D CAN-FD Transceiver, Wake-Up on CAN activity, 8Mbps, 5V supply, STBY pin, DFN-8
 K CAN transceiver
-F http://ww1.microchip.com/downloads/en/DeviceDoc/25167A.pdf
+F http://ww1.microchip.com/downloads/en/DeviceDoc/MCP2542FD-4FD-MCP2542WFD-4WFD-Data-Sheet20005514B.pdf
 $ENDCMP
 #
 $CMP MCP2542WFDxMF
 D CAN-FD Transceiver, Wake-Up on CAN Pattern, 8Mbps, 5V supply, STBY pin, DFN-8
 K CAN transceiver WUP
-F http://ww1.microchip.com/downloads/en/DeviceDoc/25167A.pdfs
+F http://ww1.microchip.com/downloads/en/DeviceDoc/MCP2542FD-4FD-MCP2542WFD-4WFD-Data-Sheet20005514B.pdf
 $ENDCMP
 #
 $CMP MCP2551-I-P

From 05acffc80debc3ec406c37a68ea81a86f5dcb95f Mon Sep 17 00:00:00 2001
From: Oliver Walters <oliver.henry.walters@gmail.com>
Date: Wed, 10 Apr 2019 22:53:57 +1000
Subject: [PATCH 067/201] Added package dims to differentiate from 3x2mm part
 in same series

---
 Interface_CAN_LIN.dcm | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Interface_CAN_LIN.dcm b/Interface_CAN_LIN.dcm
index b14103a20c..cae49db679 100644
--- a/Interface_CAN_LIN.dcm
+++ b/Interface_CAN_LIN.dcm
@@ -121,13 +121,13 @@ F https://ww1.microchip.com/downloads/en/DeviceDoc/20005688A.pdf
 $ENDCMP
 #
 $CMP MCP2542FDxMF
-D CAN-FD Transceiver, Wake-Up on CAN activity, 8Mbps, 5V supply, STBY pin, DFN-8
+D CAN-FD Transceiver, Wake-Up on CAN activity, 8Mbps, 5V supply, STBY pin, 3x3 DFN-8
 K CAN transceiver
 F http://ww1.microchip.com/downloads/en/DeviceDoc/MCP2542FD-4FD-MCP2542WFD-4WFD-Data-Sheet20005514B.pdf
 $ENDCMP
 #
 $CMP MCP2542WFDxMF
-D CAN-FD Transceiver, Wake-Up on CAN Pattern, 8Mbps, 5V supply, STBY pin, DFN-8
+D CAN-FD Transceiver, Wake-Up on CAN Pattern, 8Mbps, 5V supply, STBY pin, 3x3 DFN-8 
 K CAN transceiver WUP
 F http://ww1.microchip.com/downloads/en/DeviceDoc/MCP2542FD-4FD-MCP2542WFD-4WFD-Data-Sheet20005514B.pdf
 $ENDCMP

From 5a889d84a01afc62e7020c33fd0002344c5a5db0 Mon Sep 17 00:00:00 2001
From: Oliver Walters <oliver.henry.walters@gmail.com>
Date: Wed, 10 Apr 2019 23:01:43 +1000
Subject: [PATCH 068/201] Adjusted symbol shape to match existing ones

---
 Interface_CAN_LIN.lib | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/Interface_CAN_LIN.lib b/Interface_CAN_LIN.lib
index e96925ca3c..1e5a0c8678 100644
--- a/Interface_CAN_LIN.lib
+++ b/Interface_CAN_LIN.lib
@@ -928,23 +928,23 @@ ENDDEF
 # SN65HVD1050D
 #
 DEF SN65HVD1050D U 0 20 Y Y 1 F N
-F0 "U" -100 400 50 H V R CNN
-F1 "SN65HVD1050D" -100 300 50 H V R CNN
+F0 "U" -350 350 50 H V R CNN
+F1 "SN65HVD1050D" 50 350 50 H V L CNN
 F2 "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm" 0 -500 50 H I C CNN
 F3 "" -100 400 50 H I C CNN
 $FPLIST
  SOIC*3.9x4.9mm*P1.27mm*
 $ENDFPLIST
 DRAW
-S -300 200 300 -300 0 1 10 f
-X TXD 1 -400 100 100 R 50 50 1 1 I
+S -400 300 400 -300 0 1 10 f
+X TXD 1 -500 100 100 R 50 50 1 1 I
 X GND 2 0 -400 100 U 50 50 1 1 W
-X VCC 3 0 300 100 D 50 50 1 1 W
-X RXD 4 -400 0 100 R 50 50 1 1 O
-X VREF 5 400 0 100 L 50 50 1 1 P
-X CANL 6 400 -100 100 L 50 50 1 1 B
-X CANH 7 400 100 100 L 50 50 1 1 B
-X S 8 -400 -200 100 R 50 50 1 1 I
+X VCC 3 0 400 100 D 50 50 1 1 W
+X RXD 4 -500 0 100 R 50 50 1 1 O
+X VREF 5 500 0 100 L 50 50 1 1 P
+X CANL 6 500 -100 100 L 50 50 1 1 B
+X CANH 7 500 100 100 L 50 50 1 1 B
+X S 8 -500 -200 100 R 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #

From 79086d4b070dc68860d487661d4afd734ceb1a5e Mon Sep 17 00:00:00 2001
From: Oliver Walters <oliver.henry.walters@gmail.com>
Date: Wed, 10 Apr 2019 23:02:41 +1000
Subject: [PATCH 069/201] Fixed position of Tx and Rx pins

---
 Interface_CAN_LIN.lib | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Interface_CAN_LIN.lib b/Interface_CAN_LIN.lib
index 1e5a0c8678..c220675639 100644
--- a/Interface_CAN_LIN.lib
+++ b/Interface_CAN_LIN.lib
@@ -937,10 +937,10 @@ $FPLIST
 $ENDFPLIST
 DRAW
 S -400 300 400 -300 0 1 10 f
-X TXD 1 -500 100 100 R 50 50 1 1 I
+X TXD 1 -500 200 100 R 50 50 1 1 I
 X GND 2 0 -400 100 U 50 50 1 1 W
 X VCC 3 0 400 100 D 50 50 1 1 W
-X RXD 4 -500 0 100 R 50 50 1 1 O
+X RXD 4 -500 100 100 R 50 50 1 1 O
 X VREF 5 500 0 100 L 50 50 1 1 P
 X CANL 6 500 -100 100 L 50 50 1 1 B
 X CANH 7 500 100 100 L 50 50 1 1 B

From 874e57ed02414b036ef981b58d23f39b144a27ce Mon Sep 17 00:00:00 2001
From: Oliver Walters <oliver.henry.walters@gmail.com>
Date: Wed, 10 Apr 2019 23:06:31 +1000
Subject: [PATCH 070/201] Fixed pin-9 (renamed to VSS)

---
 Interface_CAN_LIN.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Interface_CAN_LIN.lib b/Interface_CAN_LIN.lib
index ac3ad066a3..776864bb0e 100644
--- a/Interface_CAN_LIN.lib
+++ b/Interface_CAN_LIN.lib
@@ -531,7 +531,7 @@ X VIO 5 -100 400 100 D 50 50 1 1 W
 X CANL 6 500 -100 100 L 50 50 1 1 B
 X CANH 7 500 100 100 L 50 50 1 1 B
 X STBY 8 -500 -200 100 R 50 50 1 1 I
-X PAD 9 0 -400 100 U 50 50 1 1 P N
+X VSS 9 0 -400 100 U 50 50 1 1 P N
 ENDDRAW
 ENDDEF
 #

From b40be11881b86012b8cbb89d1f4f69e5980c0b3f Mon Sep 17 00:00:00 2001
From: Oliver <oliver.henry.walters@gmail.com>
Date: Thu, 11 Apr 2019 01:21:46 +1000
Subject: [PATCH 071/201] Added MCP14A030x (#1006)

* Added MCP14A030x

* Fix datasheet reference

* Changes as requested

- Stacked PAD onto GND pin
- Replaced wildcard with x
- Selected more appropriate footprint

* Fixed footprint filters
---
 Driver_FET.dcm | 18 +++++++++++++
 Driver_FET.lib | 72 ++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 90 insertions(+)

diff --git a/Driver_FET.dcm b/Driver_FET.dcm
index ccf4439182..48f907ee81 100644
--- a/Driver_FET.dcm
+++ b/Driver_FET.dcm
@@ -774,6 +774,24 @@ K mosfet gate driver
 F http://ww1.microchip.com/downloads/en/DeviceDoc/20002092F.pdf
 $ENDCMP
 #
+$CMP MCP14A0303xMNY
+D Dual 3A-Peak MOSFET Driver, inverting outputs, DFN-8
+K Driver, Dual MOSFET
+F http://ww1.microchip.com/downloads/en/DeviceDoc/MCP14A0303_4_5-Data-Sheet-20006046A.pdf
+$ENDCMP
+#
+$CMP MCP14A0304xMNY
+D Dual 3A-Peak MOSFET Driver, non-inverting outputs, DFN-8
+K Driver, Dual MOSFET
+F http://ww1.microchip.com/downloads/en/DeviceDoc/MCP14A0303_4_5-Data-Sheet-20006046A.pdf
+$ENDCMP
+#
+$CMP MCP14A0305xMNY
+D Dual 3A-Peak MOSFET Driver, inverting/non-inverting outputs, DFN-8
+K Driver, Dual MOSFET
+F http://ww1.microchip.com/downloads/en/DeviceDoc/MCP14A0303_4_5-Data-Sheet-20006046A.pdf
+$ENDCMP
+#
 $CMP MIC4426
 D Dual 1.5A-Peak Low-Side MOSFET Driver, DIP-8/SOIC-8/MSOP-8
 K Driver, Dual MOSFET
diff --git a/Driver_FET.lib b/Driver_FET.lib
index 4ddec060cf..61b552a840 100644
--- a/Driver_FET.lib
+++ b/Driver_FET.lib
@@ -1719,6 +1719,78 @@ X Vdd 5 0 300 100 D 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #
+# MCP14A0303xMNY
+#
+DEF MCP14A0303xMNY U 0 20 Y Y 1 F N
+F0 "U" -300 350 50 H V L CNN
+F1 "MCP14A0303xMNY" 50 350 50 H V L CNN
+F2 "Package_DFN_QFN:WDFN-8-1EP_3x2mm_P0.5mm_EP1.3x1.4mm" 0 750 50 H I C CNN
+F3 "" 0 -300 50 H I C CNN
+$FPLIST
+ WDFN*1EP*3x2mm*P0.5mm*EP1.3x1.4mm*
+$ENDFPLIST
+DRAW
+S -300 -300 300 300 0 1 10 f
+X ENA 1 -400 200 100 R 50 50 1 1 I
+X INA 2 -400 100 100 R 50 50 1 1 I
+X GND 3 0 -400 100 U 50 50 1 1 W
+X INB 4 -400 -100 100 R 50 50 1 1 I
+X ~OUTB 5 400 -100 100 L 50 50 1 1 O
+X V+ 6 0 400 100 D 50 50 1 1 W
+X ~OUTA 7 400 100 100 L 50 50 1 1 O
+X ENB 8 -400 -200 100 R 50 50 1 1 I
+X GND 9 0 -400 100 U 50 50 1 1 P N
+ENDDRAW
+ENDDEF
+#
+# MCP14A0304xMNY
+#
+DEF MCP14A0304xMNY U 0 20 Y Y 1 F N
+F0 "U" -300 350 50 H V L CNN
+F1 "MCP14A0304xMNY" 50 350 50 H V L CNN
+F2 "Package_DFN_QFN:WDFN-8-1EP_3x2mm_P0.5mm_EP1.3x1.4mm" 0 750 50 H I C CNN
+F3 "" 0 -300 50 H I C CNN
+$FPLIST
+ WDFN*1EP*3x2mm*P0.5mm*EP1.3x1.4mm*
+$ENDFPLIST
+DRAW
+S -300 -300 300 300 0 1 10 f
+X ENA 1 -400 200 100 R 50 50 1 1 I
+X INA 2 -400 100 100 R 50 50 1 1 I
+X GND 3 0 -400 100 U 50 50 1 1 W
+X INB 4 -400 -100 100 R 50 50 1 1 I
+X OUTB 5 400 -100 100 L 50 50 1 1 O
+X V+ 6 0 400 100 D 50 50 1 1 W
+X OUTA 7 400 100 100 L 50 50 1 1 O
+X ENB 8 -400 -200 100 R 50 50 1 1 I
+X GND 9 0 -400 100 U 50 50 1 1 P N
+ENDDRAW
+ENDDEF
+#
+# MCP14A0305xMNY
+#
+DEF MCP14A0305xMNY U 0 20 Y Y 1 F N
+F0 "U" -300 350 50 H V L CNN
+F1 "MCP14A0305xMNY" 50 350 50 H V L CNN
+F2 "Package_DFN_QFN:WDFN-8-1EP_3x2mm_P0.5mm_EP1.3x1.4mm" 0 750 50 H I C CNN
+F3 "" 0 -300 50 H I C CNN
+$FPLIST
+ WDFN*1EP*3x2mm*P0.5mm*EP1.3x1.4mm*
+$ENDFPLIST
+DRAW
+S -300 -300 300 300 0 1 10 f
+X ENA 1 -400 200 100 R 50 50 1 1 I
+X INA 2 -400 100 100 R 50 50 1 1 I
+X GND 3 0 -400 100 U 50 50 1 1 W
+X INB 4 -400 -100 100 R 50 50 1 1 I
+X OUTB 5 400 -100 100 L 50 50 1 1 O
+X V+ 6 0 400 100 D 50 50 1 1 W
+X ~OUTA 7 400 100 100 L 50 50 1 1 O
+X ENB 8 -400 -200 100 R 50 50 1 1 I
+X GND 9 0 -400 100 U 50 50 1 1 P N
+ENDDRAW
+ENDDEF
+#
 # MIC4426
 #
 DEF MIC4426 U 0 20 Y Y 1 F N

From 33e2dce31c65e2140db77cb9c67f84d1609317b7 Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Wed, 10 Apr 2019 20:20:46 +0300
Subject: [PATCH 072/201] 2.8mm EP

---
 RF.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/RF.lib b/RF.lib
index 2a74c4afbe..eaa1f9de13 100644
--- a/RF.lib
+++ b/RF.lib
@@ -132,7 +132,7 @@ ENDDEF
 DEF HMC394LP4 U 0 20 Y Y 1 F N
 F0 "U" -200 550 50 H V C CNN
 F1 "HMC394LP4" 250 550 50 H V C CNN
-F2 "Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm" 0 -750 50 H I C CNN
+F2 "Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.8x2.8mm" 0 -750 50 H I C CNN
 F3 "" 0 200 50 H I C CNN
 $FPLIST
  QFN*1EP*4x4mm*P0.5mm*

From d0e9f25f44c095e8211e12550ae9e2d002bf67d9 Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Wed, 10 Apr 2019 20:32:43 +0300
Subject: [PATCH 073/201] remove symbol, to resolve merge conflict

---
 RF.dcm |  6 ------
 RF.lib | 40 ----------------------------------------
 2 files changed, 46 deletions(-)

diff --git a/RF.dcm b/RF.dcm
index a5ce9705e7..c1ddc11847 100644
--- a/RF.dcm
+++ b/RF.dcm
@@ -18,12 +18,6 @@ K Low Power RF Transciever
 F http://www.ti.com/lit/ds/symlink/cc2500.pdf
 $ENDCMP
 #
-$CMP HMC394LP4
-D GaAs HBT Programmable 5-bit Counter, DC - 2.2 GHz, QFN-24-1EP
-K counter prescaler programmable frequency divider
-F https://www.analog.com/media/en/technical-documentation/data-sheets/hmc394.pdf
-$ENDCMP
-#
 $CMP MAADSS0008
 D 0-2GHz, 15dB step attenuator, SOT-23-5
 K RF attenuator
diff --git a/RF.lib b/RF.lib
index eaa1f9de13..c0fdbed49e 100644
--- a/RF.lib
+++ b/RF.lib
@@ -127,46 +127,6 @@ X AVDD 9 100 600 100 D 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #
-# HMC394LP4
-#
-DEF HMC394LP4 U 0 20 Y Y 1 F N
-F0 "U" -200 550 50 H V C CNN
-F1 "HMC394LP4" 250 550 50 H V C CNN
-F2 "Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.8x2.8mm" 0 -750 50 H I C CNN
-F3 "" 0 200 50 H I C CNN
-$FPLIST
- QFN*1EP*4x4mm*P0.5mm*
-$ENDFPLIST
-DRAW
-S -250 500 250 -500 0 1 10 f
-X A0 1 400 0 150 L 50 50 1 1 I
-X GND 10 0 -600 100 U 50 50 1 1 P N
-X GND 11 0 -600 100 U 50 50 1 1 P N
-X GND 12 0 -600 100 U 50 50 1 1 P N
-X ~IN 13 -400 200 150 R 50 50 1 1 I
-X IN 14 -400 400 150 R 50 50 1 1 I
-X GND 15 0 -600 100 U 50 50 1 1 P N
-X OUT 16 400 400 150 L 50 50 1 1 O
-X ~OUT 17 400 200 150 L 50 50 1 1 O
-X GND 18 0 -600 100 U 50 50 1 1 P N
-X GND 19 0 -600 100 U 50 50 1 1 P N
-X A1 2 400 -100 150 L 50 50 1 1 I
-X GND 20 0 -600 100 U 50 50 1 1 P N
-X GND 21 0 -600 100 U 50 50 1 1 P N
-X GND 22 0 -600 100 U 50 50 1 1 P N
-X VCC 23 0 600 100 D 50 50 1 1 P N
-X VCC 24 0 600 100 D 50 50 1 1 P N
-X GND 25 0 -600 100 U 50 50 1 1 P N
-X A2 3 400 -200 150 L 50 50 1 1 I
-X A3 4 400 -300 150 L 50 50 1 1 I
-X A4 5 400 -400 150 L 50 50 1 1 I
-X GND 6 0 -600 100 U 50 50 1 1 W
-X VCC 7 0 600 100 D 50 50 1 1 W
-X VCC 8 0 600 100 D 50 50 1 1 P N
-X GND 9 0 -600 100 U 50 50 1 1 P N
-ENDDRAW
-ENDDEF
-#
 # MAADSS0008
 #
 DEF MAADSS0008 U 0 20 Y Y 1 F N

From d514160a40699c1c3481d2235ac9cab451ca5b1f Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Wed, 10 Apr 2019 20:34:05 +0300
Subject: [PATCH 074/201] import symbol

---
 RF.dcm |  6 ++++++
 RF.lib | 40 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 46 insertions(+)

diff --git a/RF.dcm b/RF.dcm
index fcedf75b6f..37a8af1a33 100644
--- a/RF.dcm
+++ b/RF.dcm
@@ -54,6 +54,12 @@ K RF coupler
 F https://cdn.anaren.com/product-documents/Xinger/DirectionalCouplers/DC4759J5020AHF/DC4759J5020AHF_DataSheet(Rev_E).pdf
 $ENDCMP
 #
+$CMP HMC394LP4
+D GaAs HBT Programmable 5-bit Counter, DC - 2.2 GHz, QFN-24-1EP
+K counter prescaler programmable frequency divider
+F https://www.analog.com/media/en/technical-documentation/data-sheets/hmc394.pdf
+$ENDCMP
+#
 $CMP HMC431
 D 5.5-6.1GHz VCO, QFN-24
 K vco rf
diff --git a/RF.lib b/RF.lib
index ce45aa0c00..05e08988dc 100644
--- a/RF.lib
+++ b/RF.lib
@@ -287,6 +287,46 @@ X Direct 6 400 100 100 L 50 40 1 1 O
 ENDDRAW
 ENDDEF
 #
+# HMC394LP4
+#
+DEF HMC394LP4 U 0 20 Y Y 1 F N
+F0 "U" -200 550 50 H V C CNN
+F1 "HMC394LP4" 250 550 50 H V C CNN
+F2 "Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.8x2.8mm" 0 -750 50 H I C CNN
+F3 "" 0 200 50 H I C CNN
+$FPLIST
+ QFN*1EP*4x4mm*P0.5mm*
+$ENDFPLIST
+DRAW
+S -250 500 250 -500 0 1 10 f
+X A0 1 400 0 150 L 50 50 1 1 I
+X GND 10 0 -600 100 U 50 50 1 1 P N
+X GND 11 0 -600 100 U 50 50 1 1 P N
+X GND 12 0 -600 100 U 50 50 1 1 P N
+X ~IN 13 -400 200 150 R 50 50 1 1 I
+X IN 14 -400 400 150 R 50 50 1 1 I
+X GND 15 0 -600 100 U 50 50 1 1 P N
+X OUT 16 400 400 150 L 50 50 1 1 O
+X ~OUT 17 400 200 150 L 50 50 1 1 O
+X GND 18 0 -600 100 U 50 50 1 1 P N
+X GND 19 0 -600 100 U 50 50 1 1 P N
+X A1 2 400 -100 150 L 50 50 1 1 I
+X GND 20 0 -600 100 U 50 50 1 1 P N
+X GND 21 0 -600 100 U 50 50 1 1 P N
+X GND 22 0 -600 100 U 50 50 1 1 P N
+X VCC 23 0 600 100 D 50 50 1 1 P N
+X VCC 24 0 600 100 D 50 50 1 1 P N
+X GND 25 0 -600 100 U 50 50 1 1 P N
+X A2 3 400 -200 150 L 50 50 1 1 I
+X A3 4 400 -300 150 L 50 50 1 1 I
+X A4 5 400 -400 150 L 50 50 1 1 I
+X GND 6 0 -600 100 U 50 50 1 1 W
+X VCC 7 0 600 100 D 50 50 1 1 W
+X VCC 8 0 600 100 D 50 50 1 1 P N
+X GND 9 0 -600 100 U 50 50 1 1 P N
+ENDDRAW
+ENDDEF
+#
 # HMC431
 #
 DEF HMC431 U 0 20 Y Y 1 F N

From 400c74decd5fe2a7d1e86bd7d425bbbf2bf34a56 Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Wed, 10 Apr 2019 20:46:55 +0300
Subject: [PATCH 075/201] changes as suggested by reviewer: 'x' in name, pin 5
 passive, 'soic-8' ends description, footprint with 2.4x3.1mm EP

---
 Amplifier_Operational.dcm |  4 ++--
 Amplifier_Operational.lib | 10 +++++-----
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/Amplifier_Operational.dcm b/Amplifier_Operational.dcm
index 7a745727e3..5537bce9cd 100644
--- a/Amplifier_Operational.dcm
+++ b/Amplifier_Operational.dcm
@@ -1128,8 +1128,8 @@ K single opamp
 F http://www.ti.com/lit/ds/symlink/ne5534.pdf
 $ENDCMP
 #
-$CMP THS3491IDDA
-D 900-MHz, 500-mA High-Power Output Current Feedback Operational Amplifier
+$CMP THS3491xDDA
+D 900-MHz, 500-mA High-Power Output Current Feedback Operational Amplifier, SOIC-8
 K opamp single current feedback wideband
 F http://www.ti.com/lit/ds/symlink/ths3491.pdf
 $ENDCMP
diff --git a/Amplifier_Operational.lib b/Amplifier_Operational.lib
index 910a8c7d79..d45bb2d2d9 100644
--- a/Amplifier_Operational.lib
+++ b/Amplifier_Operational.lib
@@ -1703,12 +1703,12 @@ X ~DIS 5 0 -300 200 U 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #
-# THS3491IDDA
+# THS3491xDDA
 #
-DEF THS3491IDDA U 0 5 Y Y 1 F N
+DEF THS3491xDDA U 0 5 Y Y 1 F N
 F0 "U" 150 150 50 H V C CNN
-F1 "THS3491IDDA" 400 -100 50 H V C CNN
-F2 "Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.35x2.35mm" 0 -600 50 H I C CNN
+F1 "THS3491xDDA" 400 -100 50 H V C CNN
+F2 "Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.4x3.1mm" 0 -600 50 H I C CNN
 F3 "" 150 150 50 H I C CNN
 $FPLIST
  SOIC?8*EP*
@@ -1719,7 +1719,7 @@ X REF 1 0 -300 200 U 50 30 1 1 I
 X - 2 -300 -100 100 R 50 50 1 1 I
 X + 3 -300 100 100 R 50 50 1 1 I
 X V- 4 -100 -300 150 U 50 50 1 1 W
-X NC 5 100 300 250 D 50 20 1 1 N
+X NC 5 100 300 250 D 50 20 1 1 P
 X ~ 6 300 0 100 L 50 50 1 1 O
 X V+ 7 -100 300 150 D 50 50 1 1 W
 X ~PD 8 0 300 200 D 50 30 1 1 I

From 4a7f30fe5fa5aa024efd7a26a96b7d5c771494e0 Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Wed, 10 Apr 2019 21:14:54 +0300
Subject: [PATCH 076/201] update footprint

---
 Amplifier_Operational.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Amplifier_Operational.lib b/Amplifier_Operational.lib
index d45bb2d2d9..1ecea2e246 100644
--- a/Amplifier_Operational.lib
+++ b/Amplifier_Operational.lib
@@ -1708,7 +1708,7 @@ ENDDEF
 DEF THS3491xDDA U 0 5 Y Y 1 F N
 F0 "U" 150 150 50 H V C CNN
 F1 "THS3491xDDA" 400 -100 50 H V C CNN
-F2 "Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.4x3.1mm" 0 -600 50 H I C CNN
+F2 "Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.95x4.9mm_Mask2.4x3.1mm" 0 -600 50 H I C CNN
 F3 "" 150 150 50 H I C CNN
 $FPLIST
  SOIC?8*EP*

From efac21f302f3aa1ec02d4d3fb80528a9260ce7f4 Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Wed, 10 Apr 2019 21:48:29 +0300
Subject: [PATCH 077/201] changes as suggested by review.

---
 RF.lib | 32 ++++++++++++++++----------------
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/RF.lib b/RF.lib
index 05e08988dc..7e031f4c88 100644
--- a/RF.lib
+++ b/RF.lib
@@ -290,39 +290,39 @@ ENDDEF
 # HMC394LP4
 #
 DEF HMC394LP4 U 0 20 Y Y 1 F N
-F0 "U" -200 550 50 H V C CNN
-F1 "HMC394LP4" 250 550 50 H V C CNN
+F0 "U" -400 550 50 H V C CNN
+F1 "HMC394LP4" 450 550 50 H V C CNN
 F2 "Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.8x2.8mm" 0 -750 50 H I C CNN
 F3 "" 0 200 50 H I C CNN
 $FPLIST
  QFN*1EP*4x4mm*P0.5mm*
 $ENDFPLIST
 DRAW
-S -250 500 250 -500 0 1 10 f
-X A0 1 400 0 150 L 50 50 1 1 I
+S -400 500 400 -500 0 1 10 f
+X A0 1 -500 0 100 R 50 50 1 1 I
 X GND 10 0 -600 100 U 50 50 1 1 P N
 X GND 11 0 -600 100 U 50 50 1 1 P N
 X GND 12 0 -600 100 U 50 50 1 1 P N
-X ~IN 13 -400 200 150 R 50 50 1 1 I
-X IN 14 -400 400 150 R 50 50 1 1 I
+X ~IN 13 -500 200 100 R 50 50 1 1 I
+X IN 14 -500 400 100 R 50 50 1 1 I
 X GND 15 0 -600 100 U 50 50 1 1 P N
-X OUT 16 400 400 150 L 50 50 1 1 O
-X ~OUT 17 400 200 150 L 50 50 1 1 O
+X OUT 16 500 400 100 L 50 50 1 1 O
+X ~OUT 17 500 200 100 L 50 50 1 1 O
 X GND 18 0 -600 100 U 50 50 1 1 P N
 X GND 19 0 -600 100 U 50 50 1 1 P N
-X A1 2 400 -100 150 L 50 50 1 1 I
+X A1 2 -500 -100 100 R 50 50 1 1 I
 X GND 20 0 -600 100 U 50 50 1 1 P N
 X GND 21 0 -600 100 U 50 50 1 1 P N
 X GND 22 0 -600 100 U 50 50 1 1 P N
-X VCC 23 0 600 100 D 50 50 1 1 P N
-X VCC 24 0 600 100 D 50 50 1 1 P N
+X VCC 23 100 600 100 D 50 50 1 1 W
+X VCC 24 200 600 100 D 50 50 1 1 W
 X GND 25 0 -600 100 U 50 50 1 1 P N
-X A2 3 400 -200 150 L 50 50 1 1 I
-X A3 4 400 -300 150 L 50 50 1 1 I
-X A4 5 400 -400 150 L 50 50 1 1 I
+X A2 3 -500 -200 100 R 50 50 1 1 I
+X A3 4 -500 -300 100 R 50 50 1 1 I
+X A4 5 -500 -400 100 R 50 50 1 1 I
 X GND 6 0 -600 100 U 50 50 1 1 W
-X VCC 7 0 600 100 D 50 50 1 1 W
-X VCC 8 0 600 100 D 50 50 1 1 P N
+X VCC 7 -200 600 100 D 50 50 1 1 W
+X VCC 8 -100 600 100 D 50 50 1 1 W
 X GND 9 0 -600 100 U 50 50 1 1 P N
 ENDDRAW
 ENDDEF

From 94ae427e5623814a7408289917596c61d2eace62 Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Wed, 10 Apr 2019 22:00:40 +0300
Subject: [PATCH 078/201] footprint, fp-filter, nc-pin

---
 Amplifier_Operational.lib | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Amplifier_Operational.lib b/Amplifier_Operational.lib
index 1ecea2e246..5e80d9b23a 100644
--- a/Amplifier_Operational.lib
+++ b/Amplifier_Operational.lib
@@ -1708,10 +1708,10 @@ ENDDEF
 DEF THS3491xDDA U 0 5 Y Y 1 F N
 F0 "U" 150 150 50 H V C CNN
 F1 "THS3491xDDA" 400 -100 50 H V C CNN
-F2 "Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.95x4.9mm_Mask2.4x3.1mm" 0 -600 50 H I C CNN
+F2 "Package_SO:Texas_R-PDSO-G8_EP2.95x4.9mm_Mask2.4x3.1mm" 0 -600 50 H I C CNN
 F3 "" 150 150 50 H I C CNN
 $FPLIST
- SOIC?8*EP*
+ SOIC*1EP*3.9x4.9mm*P1.27mm*
 $ENDFPLIST
 DRAW
 P 4 1 1 10 -200 200 200 0 -200 -200 -200 200 f
@@ -1719,7 +1719,7 @@ X REF 1 0 -300 200 U 50 30 1 1 I
 X - 2 -300 -100 100 R 50 50 1 1 I
 X + 3 -300 100 100 R 50 50 1 1 I
 X V- 4 -100 -300 150 U 50 50 1 1 W
-X NC 5 100 300 250 D 50 20 1 1 P
+X NC 5 -200 0 100 R 50 50 1 1 N N
 X ~ 6 300 0 100 L 50 50 1 1 O
 X V+ 7 -100 300 150 D 50 50 1 1 W
 X ~PD 8 0 300 200 D 50 30 1 1 I

From f8393ec38f5f3e988f5aad62a8464e92889d59a9 Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Wed, 10 Apr 2019 22:12:32 +0300
Subject: [PATCH 079/201] fp-filter

---
 Amplifier_Operational.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Amplifier_Operational.lib b/Amplifier_Operational.lib
index 5e80d9b23a..bd6f9a6906 100644
--- a/Amplifier_Operational.lib
+++ b/Amplifier_Operational.lib
@@ -1711,7 +1711,7 @@ F1 "THS3491xDDA" 400 -100 50 H V C CNN
 F2 "Package_SO:Texas_R-PDSO-G8_EP2.95x4.9mm_Mask2.4x3.1mm" 0 -600 50 H I C CNN
 F3 "" 150 150 50 H I C CNN
 $FPLIST
- SOIC*1EP*3.9x4.9mm*P1.27mm*
+ Texas*R*PDSO*G8*EP*
 $ENDFPLIST
 DRAW
 P 4 1 1 10 -200 200 200 0 -200 -200 -200 200 f

From 0400d6c97179dceba16ba10ece3b433b192e283e Mon Sep 17 00:00:00 2001
From: Thomas Puchinger <Thomas.Puchinger@tuwien.ac.at>
Date: Wed, 10 Apr 2019 21:57:52 +0200
Subject: [PATCH 080/201] Switched description and keywords

---
 Sensor_Optical.dcm | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Sensor_Optical.dcm b/Sensor_Optical.dcm
index a26fecbc9f..89afcea65a 100644
--- a/Sensor_Optical.dcm
+++ b/Sensor_Optical.dcm
@@ -67,8 +67,8 @@ F http://ams.com/eng/content/download/976611/2309519/498778
 $ENDCMP
 #
 $CMP AS72651
-D Smart Spectral Sensor
-K Smart 18-Channel VIS+NIR Spectral_ID Sensor with Electronic Shutter, LGA-20
+D Smart 18-Channel VIS+NIR Spectral_ID Sensor with Electronic Shutter, LGA-20
+K Smart Spectral Sensor
 F https://ams.com/documents/20143/36005/AS7265x_DS000612_1-00.pdf/08051c8a-a7f6-6231-7993-2d3fe0bf38b8
 $ENDCMP
 #

From c0f965de1c0f3f0f81617f5395ece077145c14b1 Mon Sep 17 00:00:00 2001
From: John Whitmore <johnfwhitmore@gmail.com>
Date: Wed, 10 Apr 2019 23:29:51 +0100
Subject: [PATCH 081/201] Centered the symbol correctly

Signed-off-by: John Whitmore <johnfwhitmore@gmail.com>
---
 Timer_RTC.lib | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/Timer_RTC.lib b/Timer_RTC.lib
index e08d9141b6..135e01baf4 100644
--- a/Timer_RTC.lib
+++ b/Timer_RTC.lib
@@ -273,23 +273,23 @@ ENDDEF
 # PCF8523T
 #
 DEF PCF8523T U 0 20 Y Y 1 F N
-F0 "U" -300 450 50 H V L CNN
-F1 "PCF8523T" 150 450 50 H V L CNN
-F2 "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm" 850 -450 50 H I C CNN
+F0 "U" -400 350 50 H V L CNN
+F1 "PCF8523T" 150 350 50 H V L CNN
+F2 "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm" 800 -350 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
 $FPLIST
  SOIC*3.9x4.9mm*P1.27mm*
 $ENDFPLIST
 DRAW
-S -400 200 400 -400 0 1 10 f
-X OSCI 1 -500 -200 100 R 50 50 1 1 I
-X OSCO 2 -500 -300 100 R 50 50 1 1 O
-X VBAT 3 100 300 100 D 50 50 1 1 W
-X VSS 4 0 -500 100 U 50 50 1 1 W
-X SDA 5 -500 0 100 R 50 50 1 1 B
-X SCL 6 -500 100 100 R 50 50 1 1 I
-X ~INT1~/CLKOUT 7 500 -100 100 L 50 50 1 1 C
-X VDD 8 -100 300 100 D 50 50 1 1 W
+S -400 300 400 -300 0 1 10 f
+X OSCI 1 -500 -100 100 R 50 50 1 1 I
+X OSCO 2 -500 -200 100 R 50 50 1 1 O
+X VBAT 3 100 400 100 D 50 50 1 1 W
+X VSS 4 0 -400 100 U 50 50 1 1 W
+X SDA 5 -500 100 100 R 50 50 1 1 B
+X SCL 6 -500 200 100 R 50 50 1 1 I
+X ~INT1~/CLKOUT 7 500 0 100 L 50 50 1 1 C
+X VDD 8 -100 400 100 D 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #

From 81ec8c157a38b7491f59cfc921e4c350c9061f4f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Antonio=20V=C3=A1zquez?= <antoniovazquezblanco@gmail.com>
Date: Thu, 11 Apr 2019 11:38:26 +0200
Subject: [PATCH 082/201] Interface_UART: Add ADM2682E and ADM2687E

---
 Interface_UART.dcm |  11 ++++
 Interface_UART.lib | 145 +++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 156 insertions(+)

diff --git a/Interface_UART.dcm b/Interface_UART.dcm
index d22170c249..ec1a239a38 100644
--- a/Interface_UART.dcm
+++ b/Interface_UART.dcm
@@ -75,6 +75,17 @@ K RS485 Transciever,RS422 Transciever
 F www.analog.com/media/en/technical-documentation/data-sheets/ADM2582E_2587E.pdf
 $ENDCMP
 #
+$CMP ADM2682E
+D Isolated RS485/RS422 Transciever, Integrated Isolated DC-DC Converter, 16Mbps, SOIC-16W
+K RS485 Transciever, RS422 Transciever
+F https://www.analog.com/media/en/technical-documentation/data-sheets/ADM2682E_2687E.pdf
+$ENDCMP
+#
+$CMP ADM2687E
+D Isolated RS485/RS422 Transciever, Integrated Isolated DC-DC Converter, 500kbps, SOIC-16W
+K RS485 Transciever, RS422 Transciever
+$ENDCMP
+#
 $CMP GD65232DB
 D Multiple RS-232 Driver and Receiver, SSOP-20
 K RS232 UART Driver Receiver Interface
diff --git a/Interface_UART.lib b/Interface_UART.lib
index 7ca9224bc9..aa054b2d3a 100644
--- a/Interface_UART.lib
+++ b/Interface_UART.lib
@@ -542,6 +542,151 @@ X GND1 9 -600 -400 100 R 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #
+# ADM2682E
+#
+DEF ADM2682E U 0 20 Y Y 1 F N
+F0 "U" -450 550 50 H V C CNN
+F1 "ADM2682E" 300 550 50 H V C CNN
+F2 "Package_SO:SOIC-16W_7.5x12.8mm_P1.27mm" 0 -600 50 H I C CNN
+F3 "" 0 150 50 H I C CNN
+ALIAS ADM2687E
+$FPLIST
+ SOIC*7.5x12.8mm*P1.27mm*
+$ENDFPLIST
+DRAW
+A -20 -270 10 -899 899 1 0 0 N -20 -280 -20 -260
+A -20 -250 10 -899 899 1 0 0 N -20 -260 -20 -240
+A -20 -230 10 -899 899 1 0 0 N -20 -240 -20 -220
+A -20 -170 10 -899 899 1 0 0 N -20 -180 -20 -160
+A -20 -150 10 -899 899 1 0 0 N -20 -160 -20 -140
+A -20 -130 10 -899 899 1 0 0 N -20 -140 -20 -120
+A -20 -70 10 -899 899 1 0 0 N -20 -80 -20 -60
+A -20 -50 10 -899 899 1 0 0 N -20 -60 -20 -40
+A -20 -30 10 -899 899 1 0 0 N -20 -40 -20 -20
+A -20 180 10 -899 899 1 0 0 N -20 170 -20 190
+A -20 200 10 -899 899 1 0 0 N -20 190 -20 210
+A -20 220 10 -899 899 1 0 0 N -20 210 -20 230
+A -20 280 10 -899 899 1 0 0 N -20 270 -20 290
+A -20 300 10 -899 899 1 0 0 N -20 290 -20 310
+A -20 320 10 -899 899 1 0 0 N -20 310 -20 330
+A 20 -270 10 901 -901 1 0 0 N 20 -260 20 -280
+A 20 -250 10 901 -901 1 0 0 N 20 -240 20 -260
+A 20 -230 10 901 -901 1 0 0 N 20 -220 20 -240
+A 20 -170 10 901 -901 1 0 0 N 20 -160 20 -180
+A 20 -150 10 901 -901 1 0 0 N 20 -140 20 -160
+A 20 -130 10 901 -901 1 0 0 N 20 -120 20 -140
+A 20 -70 10 901 -901 1 0 0 N 20 -60 20 -80
+A 20 -50 10 901 -901 1 0 0 N 20 -40 20 -60
+A 20 -30 10 901 -901 1 0 0 N 20 -20 20 -40
+A 20 180 10 901 -901 1 0 0 N 20 190 20 170
+A 20 200 10 901 -901 1 0 0 N 20 210 20 190
+A 20 220 10 901 -901 1 0 0 N 20 230 20 210
+A 20 280 10 901 -901 1 0 0 N 20 290 20 270
+A 20 300 10 901 -901 1 0 0 N 20 310 20 290
+A 20 320 10 901 -901 1 0 0 N 20 330 20 310
+C -300 -280 5 0 1 0 N
+C 310 -75 5 1 1 0 N
+C 335 -275 5 1 1 0 N
+T 0 290 -50 25 0 0 0 D Normal 0 C C
+T 0 305 -250 25 0 0 0 R Normal 0 C C
+T 0 -160 -250 25 0 1 0 DECODE Normal 0 C C
+T 0 160 -150 25 0 1 0 DECODE Normal 0 C C
+T 0 160 -50 25 0 1 0 DECODE Normal 0 C C
+T 0 -160 -150 25 0 1 0 ENCODE Normal 0 C C
+T 0 -160 -50 25 0 1 0 ENCODE Normal 0 C C
+T 0 160 -250 25 0 1 0 ENCODE Normal 0 C C
+T 0 -195 300 25 0 1 0 OSCILLATOR Normal 0 C C
+T 0 190 300 25 0 1 0 RECTIFIER Normal 0 C C
+T 0 190 200 25 0 1 0 REGULATOR Normal 0 C C
+S -50 -210 50 -290 1 0 0 N
+S -50 -110 50 -190 1 0 0 N
+S -50 -10 50 -90 1 0 0 N
+S -50 240 50 160 1 0 0 N
+S -50 340 50 260 1 0 0 N
+S 75 -225 245 -275 1 0 0 N
+S 75 -125 245 -175 1 0 0 N
+S 75 -25 245 -75 1 0 0 N
+S 75 225 305 175 1 0 0 N
+S 75 340 305 260 1 0 0 N
+S -500 500 500 -550 1 1 10 f
+S -75 -225 -245 -275 1 1 0 N
+S -75 -125 -245 -175 1 1 0 N
+S -75 -25 -245 -75 1 1 0 N
+S -75 340 -315 260 1 1 0 N
+P 2 1 0 0 -245 -250 -270 -250 N
+P 2 1 0 0 -245 -150 -270 -150 N
+P 2 1 0 0 -245 -50 -270 -50 N
+P 2 1 0 0 -200 200 -200 260 N
+P 2 1 0 0 -200 200 -50 200 N
+P 2 1 0 0 -75 -250 -50 -250 N
+P 2 1 0 0 -75 -150 -50 -150 N
+P 2 1 0 0 -75 -50 -50 -50 N
+P 2 1 0 0 -75 300 -50 300 N
+P 2 1 0 0 -50 -280 -20 -280 N
+P 2 1 0 0 -50 -220 -20 -220 N
+P 2 1 0 0 -50 -180 -20 -180 N
+P 2 1 0 0 -50 -120 -20 -120 N
+P 2 1 0 0 -50 -80 -20 -80 N
+P 2 1 0 0 -50 -20 -20 -20 N
+P 2 1 0 0 -50 170 -20 170 N
+P 2 1 0 0 -50 230 -20 230 N
+P 2 1 0 0 -50 270 -20 270 N
+P 2 1 0 0 -50 330 -20 330 N
+P 2 1 0 0 0 -475 0 -525 N
+P 2 1 0 0 0 -400 0 -450 N
+P 2 1 0 0 0 -325 0 -375 N
+P 2 1 0 0 0 25 0 75 N
+P 2 1 0 0 0 100 0 150 N
+P 2 1 0 0 0 400 0 350 N
+P 2 1 0 0 0 475 0 425 N
+P 2 1 0 0 50 -280 20 -280 N
+P 2 1 0 0 50 -220 20 -220 N
+P 2 1 0 0 50 -180 20 -180 N
+P 2 1 0 0 50 -120 20 -120 N
+P 2 1 0 0 50 -80 20 -80 N
+P 2 1 0 0 50 -20 20 -20 N
+P 2 1 0 0 50 170 20 170 N
+P 2 1 0 0 50 230 20 230 N
+P 2 1 0 0 50 270 20 270 N
+P 2 1 0 0 50 330 20 330 N
+P 2 1 0 0 75 -250 50 -250 N
+P 2 1 0 0 75 -150 50 -150 N
+P 2 1 0 0 75 -50 50 -50 N
+P 2 1 0 0 75 200 50 200 N
+P 2 1 0 0 75 300 50 300 N
+P 2 1 0 0 245 -250 270 -250 N
+P 2 1 0 0 245 -150 290 -150 N
+P 2 1 0 0 245 -50 270 -50 N
+P 2 0 1 0 290 -150 290 -80 N
+P 3 0 1 0 -365 -350 -300 -350 -300 -285 N
+P 4 0 1 0 325 -225 375 -225 375 -200 415 -200 N
+P 4 0 1 0 415 -300 375 -300 375 -275 340 -275 N
+P 4 0 1 0 415 0 375 0 375 -25 295 -25 N
+P 6 0 1 0 415 -100 380 -100 375 -100 375 -80 375 -75 320 -75 N
+P 4 1 1 0 -330 -250 -270 -210 -270 -290 -330 -250 N
+P 4 1 1 0 -265 -150 -325 -110 -325 -190 -265 -150 N
+P 4 1 1 0 -265 -50 -325 -10 -325 -90 -265 -50 N
+P 4 1 1 0 265 -250 325 -210 325 -290 265 -250 N
+P 4 1 1 0 330 -50 270 -10 270 -90 330 -50 N
+X GND1 1 -600 -450 100 R 50 50 1 1 W
+X VISOOUT 10 600 400 100 L 50 50 1 1 W
+X Y 11 600 0 100 L 50 50 1 1 O
+X Z 12 600 -100 100 L 50 50 1 1 O
+X B 13 600 -300 100 L 50 50 1 1 I
+X A 14 600 -200 100 L 50 50 1 1 I
+X VISOIN 15 600 100 100 L 50 50 1 1 W
+X GND2 16 600 -450 100 L 50 50 1 1 W N
+X Vcc 2 -600 400 100 R 50 50 1 1 W
+X RXD 3 -600 -250 100 R 50 50 1 1 O
+X ~RE 4 -600 -350 100 R 50 50 1 1 I
+X DE 5 -600 -150 100 R 50 50 1 1 I
+X TXD 6 -600 -50 100 R 50 50 1 1 I
+X Vcc 7 -600 400 100 R 50 50 1 1 W N
+X GND1 8 -600 -450 100 R 50 50 1 1 W N
+X GND2 9 600 -450 100 L 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
 # GD65232DB
 #
 DEF GD65232DB U 0 40 Y Y 1 F N

From 82c02812c0ee25560a1da7053df1f6cee72e9dab Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Antonio=20V=C3=A1zquez?= <antoniovazquezblanco@gmail.com>
Date: Thu, 11 Apr 2019 12:31:37 +0200
Subject: [PATCH 083/201] Interface_UART: Fix ADM2682E pin positionin

---
 Interface_UART.lib | 263 +++++++++++++++++++++++----------------------
 1 file changed, 132 insertions(+), 131 deletions(-)

diff --git a/Interface_UART.lib b/Interface_UART.lib
index aa054b2d3a..304a63c7db 100644
--- a/Interface_UART.lib
+++ b/Interface_UART.lib
@@ -547,143 +547,144 @@ ENDDEF
 DEF ADM2682E U 0 20 Y Y 1 F N
 F0 "U" -450 550 50 H V C CNN
 F1 "ADM2682E" 300 550 50 H V C CNN
-F2 "Package_SO:SOIC-16W_7.5x12.8mm_P1.27mm" 0 -600 50 H I C CNN
-F3 "" 0 150 50 H I C CNN
+F2 "Package_SO:SOIC-16W_7.5x12.8mm_P1.27mm" 0 -550 50 H I C CNN
+F3 "" 0 725 50 H I C CNN
 ALIAS ADM2687E
 $FPLIST
  SOIC*7.5x12.8mm*P1.27mm*
 $ENDFPLIST
 DRAW
-A -20 -270 10 -899 899 1 0 0 N -20 -280 -20 -260
-A -20 -250 10 -899 899 1 0 0 N -20 -260 -20 -240
-A -20 -230 10 -899 899 1 0 0 N -20 -240 -20 -220
-A -20 -170 10 -899 899 1 0 0 N -20 -180 -20 -160
-A -20 -150 10 -899 899 1 0 0 N -20 -160 -20 -140
-A -20 -130 10 -899 899 1 0 0 N -20 -140 -20 -120
-A -20 -70 10 -899 899 1 0 0 N -20 -80 -20 -60
-A -20 -50 10 -899 899 1 0 0 N -20 -60 -20 -40
-A -20 -30 10 -899 899 1 0 0 N -20 -40 -20 -20
-A -20 180 10 -899 899 1 0 0 N -20 170 -20 190
-A -20 200 10 -899 899 1 0 0 N -20 190 -20 210
-A -20 220 10 -899 899 1 0 0 N -20 210 -20 230
-A -20 280 10 -899 899 1 0 0 N -20 270 -20 290
-A -20 300 10 -899 899 1 0 0 N -20 290 -20 310
-A -20 320 10 -899 899 1 0 0 N -20 310 -20 330
-A 20 -270 10 901 -901 1 0 0 N 20 -260 20 -280
-A 20 -250 10 901 -901 1 0 0 N 20 -240 20 -260
-A 20 -230 10 901 -901 1 0 0 N 20 -220 20 -240
-A 20 -170 10 901 -901 1 0 0 N 20 -160 20 -180
-A 20 -150 10 901 -901 1 0 0 N 20 -140 20 -160
-A 20 -130 10 901 -901 1 0 0 N 20 -120 20 -140
-A 20 -70 10 901 -901 1 0 0 N 20 -60 20 -80
-A 20 -50 10 901 -901 1 0 0 N 20 -40 20 -60
-A 20 -30 10 901 -901 1 0 0 N 20 -20 20 -40
-A 20 180 10 901 -901 1 0 0 N 20 190 20 170
-A 20 200 10 901 -901 1 0 0 N 20 210 20 190
-A 20 220 10 901 -901 1 0 0 N 20 230 20 210
-A 20 280 10 901 -901 1 0 0 N 20 290 20 270
-A 20 300 10 901 -901 1 0 0 N 20 310 20 290
-A 20 320 10 901 -901 1 0 0 N 20 330 20 310
-C -300 -280 5 0 1 0 N
-C 310 -75 5 1 1 0 N
-C 335 -275 5 1 1 0 N
-T 0 290 -50 25 0 0 0 D Normal 0 C C
-T 0 305 -250 25 0 0 0 R Normal 0 C C
-T 0 -160 -250 25 0 1 0 DECODE Normal 0 C C
-T 0 160 -150 25 0 1 0 DECODE Normal 0 C C
-T 0 160 -50 25 0 1 0 DECODE Normal 0 C C
-T 0 -160 -150 25 0 1 0 ENCODE Normal 0 C C
-T 0 -160 -50 25 0 1 0 ENCODE Normal 0 C C
-T 0 160 -250 25 0 1 0 ENCODE Normal 0 C C
-T 0 -195 300 25 0 1 0 OSCILLATOR Normal 0 C C
-T 0 190 300 25 0 1 0 RECTIFIER Normal 0 C C
-T 0 190 200 25 0 1 0 REGULATOR Normal 0 C C
-S -50 -210 50 -290 1 0 0 N
-S -50 -110 50 -190 1 0 0 N
-S -50 -10 50 -90 1 0 0 N
-S -50 240 50 160 1 0 0 N
-S -50 340 50 260 1 0 0 N
-S 75 -225 245 -275 1 0 0 N
-S 75 -125 245 -175 1 0 0 N
-S 75 -25 245 -75 1 0 0 N
-S 75 225 305 175 1 0 0 N
-S 75 340 305 260 1 0 0 N
-S -500 500 500 -550 1 1 10 f
-S -75 -225 -245 -275 1 1 0 N
-S -75 -125 -245 -175 1 1 0 N
-S -75 -25 -245 -75 1 1 0 N
-S -75 340 -315 260 1 1 0 N
-P 2 1 0 0 -245 -250 -270 -250 N
-P 2 1 0 0 -245 -150 -270 -150 N
-P 2 1 0 0 -245 -50 -270 -50 N
-P 2 1 0 0 -200 200 -200 260 N
-P 2 1 0 0 -200 200 -50 200 N
-P 2 1 0 0 -75 -250 -50 -250 N
-P 2 1 0 0 -75 -150 -50 -150 N
-P 2 1 0 0 -75 -50 -50 -50 N
-P 2 1 0 0 -75 300 -50 300 N
-P 2 1 0 0 -50 -280 -20 -280 N
-P 2 1 0 0 -50 -220 -20 -220 N
-P 2 1 0 0 -50 -180 -20 -180 N
-P 2 1 0 0 -50 -120 -20 -120 N
-P 2 1 0 0 -50 -80 -20 -80 N
-P 2 1 0 0 -50 -20 -20 -20 N
-P 2 1 0 0 -50 170 -20 170 N
-P 2 1 0 0 -50 230 -20 230 N
-P 2 1 0 0 -50 270 -20 270 N
-P 2 1 0 0 -50 330 -20 330 N
-P 2 1 0 0 0 -475 0 -525 N
-P 2 1 0 0 0 -400 0 -450 N
-P 2 1 0 0 0 -325 0 -375 N
-P 2 1 0 0 0 25 0 75 N
-P 2 1 0 0 0 100 0 150 N
-P 2 1 0 0 0 400 0 350 N
-P 2 1 0 0 0 475 0 425 N
-P 2 1 0 0 50 -280 20 -280 N
-P 2 1 0 0 50 -220 20 -220 N
-P 2 1 0 0 50 -180 20 -180 N
-P 2 1 0 0 50 -120 20 -120 N
-P 2 1 0 0 50 -80 20 -80 N
-P 2 1 0 0 50 -20 20 -20 N
-P 2 1 0 0 50 170 20 170 N
-P 2 1 0 0 50 230 20 230 N
-P 2 1 0 0 50 270 20 270 N
-P 2 1 0 0 50 330 20 330 N
-P 2 1 0 0 75 -250 50 -250 N
-P 2 1 0 0 75 -150 50 -150 N
-P 2 1 0 0 75 -50 50 -50 N
-P 2 1 0 0 75 200 50 200 N
-P 2 1 0 0 75 300 50 300 N
-P 2 1 0 0 245 -250 270 -250 N
-P 2 1 0 0 245 -150 290 -150 N
-P 2 1 0 0 245 -50 270 -50 N
-P 2 0 1 0 290 -150 290 -80 N
-P 3 0 1 0 -365 -350 -300 -350 -300 -285 N
-P 4 0 1 0 325 -225 375 -225 375 -200 415 -200 N
-P 4 0 1 0 415 -300 375 -300 375 -275 340 -275 N
-P 4 0 1 0 415 0 375 0 375 -25 295 -25 N
-P 6 0 1 0 415 -100 380 -100 375 -100 375 -80 375 -75 320 -75 N
-P 4 1 1 0 -330 -250 -270 -210 -270 -290 -330 -250 N
-P 4 1 1 0 -265 -150 -325 -110 -325 -190 -265 -150 N
-P 4 1 1 0 -265 -50 -325 -10 -325 -90 -265 -50 N
-P 4 1 1 0 265 -250 325 -210 325 -290 265 -250 N
-P 4 1 1 0 330 -50 270 -10 270 -90 330 -50 N
-X GND1 1 -600 -450 100 R 50 50 1 1 W
+A -20 -220 10 -899 899 1 0 0 N -20 -230 -20 -210
+A -20 -200 10 -899 899 1 0 0 N -20 -210 -20 -190
+A -20 -180 10 -899 899 1 0 0 N -20 -190 -20 -170
+A -20 -120 10 -899 899 1 0 0 N -20 -130 -20 -110
+A -20 -100 10 -899 899 1 0 0 N -20 -110 -20 -90
+A -20 -80 10 -899 899 1 0 0 N -20 -90 -20 -70
+A -20 -20 10 -899 899 1 0 0 N -20 -30 -20 -10
+A -20 0 10 -899 899 1 0 0 N -20 -10 -20 10
+A -20 20 10 -899 899 1 0 0 N -20 10 -20 30
+A -20 205 10 -899 899 1 0 0 N -20 195 -20 215
+A -20 225 10 -899 899 1 0 0 N -20 215 -20 235
+A -20 245 10 -899 899 1 0 0 N -20 235 -20 255
+A -20 305 10 -899 899 1 0 0 N -20 295 -20 315
+A -20 325 10 -899 899 1 0 0 N -20 315 -20 335
+A -20 345 10 -899 899 1 0 0 N -20 335 -20 355
+A 20 -220 10 901 -901 1 0 0 N 20 -210 20 -230
+A 20 -200 10 901 -901 1 0 0 N 20 -190 20 -210
+A 20 -180 10 901 -901 1 0 0 N 20 -170 20 -190
+A 20 -120 10 901 -901 1 0 0 N 20 -110 20 -130
+A 20 -100 10 901 -901 1 0 0 N 20 -90 20 -110
+A 20 -80 10 901 -901 1 0 0 N 20 -70 20 -90
+A 20 -20 10 901 -901 1 0 0 N 20 -10 20 -30
+A 20 0 10 901 -901 1 0 0 N 20 10 20 -10
+A 20 20 10 901 -901 1 0 0 N 20 30 20 10
+A 20 205 10 901 -901 1 0 0 N 20 215 20 195
+A 20 225 10 901 -901 1 0 0 N 20 235 20 215
+A 20 245 10 901 -901 1 0 0 N 20 255 20 235
+A 20 305 10 901 -901 1 0 0 N 20 315 20 295
+A 20 325 10 901 -901 1 0 0 N 20 335 20 315
+A 20 345 10 901 -901 1 0 0 N 20 355 20 335
+C -300 -230 5 0 1 0 N
+C 310 -25 5 1 1 0 N
+C 335 -225 5 1 1 0 N
+T 0 290 0 25 0 0 0 D Normal 0 C C
+T 0 305 -200 25 0 0 0 R Normal 0 C C
+T 0 -160 -200 25 0 1 0 DECODE Normal 0 C C
+T 0 160 -100 25 0 1 0 DECODE Normal 0 C C
+T 0 160 0 25 0 1 0 DECODE Normal 0 C C
+T 0 -160 -100 25 0 1 0 ENCODE Normal 0 C C
+T 0 -160 0 25 0 1 0 ENCODE Normal 0 C C
+T 0 160 -200 25 0 1 0 ENCODE Normal 0 C C
+T 0 -195 325 25 0 1 0 OSCILLATOR Normal 0 C C
+T 0 190 325 25 0 1 0 RECTIFIER Normal 0 C C
+T 0 190 225 25 0 1 0 REGULATOR Normal 0 C C
+S -50 -160 50 -240 1 0 0 N
+S -50 -60 50 -140 1 0 0 N
+S -50 40 50 -40 1 0 0 N
+S -50 265 50 185 1 0 0 N
+S -50 365 50 285 1 0 0 N
+S 75 -175 245 -225 1 0 0 N
+S 75 -75 245 -125 1 0 0 N
+S 75 25 245 -25 1 0 0 N
+S 75 250 305 200 1 0 0 N
+S 75 350 305 300 1 0 0 N
+S -500 500 500 -500 1 1 10 f
+S -75 -175 -245 -225 1 1 0 N
+S -75 -75 -245 -125 1 1 0 N
+S -75 25 -245 -25 1 1 0 N
+S -75 350 -315 300 1 1 0 N
+P 2 1 0 0 -245 -200 -270 -200 N
+P 2 1 0 0 -245 -100 -270 -100 N
+P 2 1 0 0 -245 0 -270 0 N
+P 2 1 0 0 -200 225 -200 300 N
+P 2 1 0 0 -200 225 -50 225 N
+P 2 1 0 0 -75 -200 -50 -200 N
+P 2 1 0 0 -75 -100 -50 -100 N
+P 2 1 0 0 -75 0 -50 0 N
+P 2 1 0 0 -75 325 -50 325 N
+P 2 1 0 0 -50 -230 -20 -230 N
+P 2 1 0 0 -50 -170 -20 -170 N
+P 2 1 0 0 -50 -130 -20 -130 N
+P 2 1 0 0 -50 -70 -20 -70 N
+P 2 1 0 0 -50 -30 -20 -30 N
+P 2 1 0 0 -50 30 -20 30 N
+P 2 1 0 0 -50 195 -20 195 N
+P 2 1 0 0 -50 255 -20 255 N
+P 2 1 0 0 -50 295 -20 295 N
+P 2 1 0 0 -50 355 -20 355 N
+P 2 1 0 0 0 -450 0 -400 N
+P 2 1 0 0 0 -350 0 -300 N
+P 2 1 0 0 0 -250 0 -240 N
+P 2 1 0 0 0 50 0 100 N
+P 2 1 0 0 0 150 0 185 N
+P 2 1 0 0 0 365 0 400 N
+P 2 1 0 0 0 500 0 450 N
+P 2 1 0 0 50 -230 20 -230 N
+P 2 1 0 0 50 -170 20 -170 N
+P 2 1 0 0 50 -130 20 -130 N
+P 2 1 0 0 50 -70 20 -70 N
+P 2 1 0 0 50 -30 20 -30 N
+P 2 1 0 0 50 30 20 30 N
+P 2 1 0 0 50 195 20 195 N
+P 2 1 0 0 50 255 20 255 N
+P 2 1 0 0 50 295 20 295 N
+P 2 1 0 0 50 355 20 355 N
+P 2 1 0 0 75 -200 50 -200 N
+P 2 1 0 0 75 -100 50 -100 N
+P 2 1 0 0 75 0 50 0 N
+P 2 1 0 0 75 225 50 225 N
+P 2 1 0 0 75 325 50 325 N
+P 2 1 0 0 185 250 185 300 N
+P 2 1 0 0 245 -200 270 -200 N
+P 2 1 0 0 245 -100 290 -100 N
+P 2 1 0 0 245 0 270 0 N
+P 2 0 1 0 290 -100 290 -30 N
+P 3 0 1 0 -365 -300 -300 -300 -300 -235 N
+P 4 0 1 0 325 -175 375 -175 375 -150 415 -150 N
+P 4 0 1 0 415 -250 375 -250 375 -225 340 -225 N
+P 4 0 1 0 415 50 375 50 375 25 295 25 N
+P 6 0 1 0 415 -50 380 -50 375 -50 375 -30 375 -25 320 -25 N
+P 4 1 1 0 -330 -200 -270 -160 -270 -240 -330 -200 N
+P 4 1 1 0 -265 -100 -325 -60 -325 -140 -265 -100 N
+P 4 1 1 0 -265 0 -325 40 -325 -40 -265 0 N
+P 4 1 1 0 265 -200 325 -160 325 -240 265 -200 N
+P 4 1 1 0 330 0 270 40 270 -40 330 0 N
+X GND1 1 -600 -400 100 R 50 50 1 1 W
 X VISOOUT 10 600 400 100 L 50 50 1 1 W
-X Y 11 600 0 100 L 50 50 1 1 O
-X Z 12 600 -100 100 L 50 50 1 1 O
-X B 13 600 -300 100 L 50 50 1 1 I
-X A 14 600 -200 100 L 50 50 1 1 I
-X VISOIN 15 600 100 100 L 50 50 1 1 W
-X GND2 16 600 -450 100 L 50 50 1 1 W N
-X Vcc 2 -600 400 100 R 50 50 1 1 W
-X RXD 3 -600 -250 100 R 50 50 1 1 O
-X ~RE 4 -600 -350 100 R 50 50 1 1 I
-X DE 5 -600 -150 100 R 50 50 1 1 I
-X TXD 6 -600 -50 100 R 50 50 1 1 I
-X Vcc 7 -600 400 100 R 50 50 1 1 W N
-X GND1 8 -600 -450 100 R 50 50 1 1 W N
-X GND2 9 600 -450 100 L 50 50 1 1 W
+X Y 11 600 50 100 L 50 50 1 1 O
+X Z 12 600 -50 100 L 50 50 1 1 O
+X B 13 600 -250 100 L 50 50 1 1 I
+X A 14 600 -150 100 L 50 50 1 1 I
+X VISOIN 15 600 150 100 L 50 50 1 1 W
+X GND2 16 600 -400 100 L 50 50 1 1 W N
+X VCC 2 -600 400 100 R 50 50 1 1 W
+X RXD 3 -600 -200 100 R 50 50 1 1 O
+X ~RE 4 -600 -300 100 R 50 50 1 1 I
+X DE 5 -600 -100 100 R 50 50 1 1 I
+X TXD 6 -600 0 100 R 50 50 1 1 I
+X VCC 7 -600 400 100 R 50 50 1 1 W N
+X GND1 8 -600 -400 100 R 50 50 1 1 W N
+X GND2 9 600 -400 100 L 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #

From e912eadcafb6dc201ccaa4e4591f6f811c8af70e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Antonio=20V=C3=A1zquez?= <antoniovazquezblanco@gmail.com>
Date: Thu, 11 Apr 2019 13:15:10 +0200
Subject: [PATCH 084/201] Interface_UART: Fix ADM2682E pin positionin

---
 Interface_UART.lib | 79 +++++++++++++++++++++++-----------------------
 1 file changed, 39 insertions(+), 40 deletions(-)

diff --git a/Interface_UART.lib b/Interface_UART.lib
index 304a63c7db..146d99159b 100644
--- a/Interface_UART.lib
+++ b/Interface_UART.lib
@@ -585,16 +585,16 @@ A 20 305 10 901 -901 1 0 0 N 20 315 20 295
 A 20 325 10 901 -901 1 0 0 N 20 335 20 315
 A 20 345 10 901 -901 1 0 0 N 20 355 20 335
 C -300 -230 5 0 1 0 N
-C 310 -25 5 1 1 0 N
-C 335 -225 5 1 1 0 N
-T 0 290 0 25 0 0 0 D Normal 0 C C
-T 0 305 -200 25 0 0 0 R Normal 0 C C
-T 0 -160 -200 25 0 1 0 DECODE Normal 0 C C
-T 0 160 -100 25 0 1 0 DECODE Normal 0 C C
-T 0 160 0 25 0 1 0 DECODE Normal 0 C C
-T 0 -160 -100 25 0 1 0 ENCODE Normal 0 C C
-T 0 -160 0 25 0 1 0 ENCODE Normal 0 C C
-T 0 160 -200 25 0 1 0 ENCODE Normal 0 C C
+C 340 -75 5 1 1 0 N
+C 365 -275 5 1 1 0 N
+T 0 320 -50 25 0 0 0 D Normal 0 C C
+T 0 335 -250 25 0 0 0 R Normal 0 C C
+T 0 -150 -200 25 0 1 0 DECODE Normal 0 C C
+T 0 150 -100 25 0 1 0 DECODE Normal 0 C C
+T 0 150 0 25 0 1 0 DECODE Normal 0 C C
+T 0 -150 -100 25 0 1 0 ENCODE Normal 0 C C
+T 0 -150 0 25 0 1 0 ENCODE Normal 0 C C
+T 0 150 -200 25 0 1 0 ENCODE Normal 0 C C
 T 0 -195 325 25 0 1 0 OSCILLATOR Normal 0 C C
 T 0 190 325 25 0 1 0 RECTIFIER Normal 0 C C
 T 0 190 225 25 0 1 0 REGULATOR Normal 0 C C
@@ -603,25 +603,25 @@ S -50 -60 50 -140 1 0 0 N
 S -50 40 50 -40 1 0 0 N
 S -50 265 50 185 1 0 0 N
 S -50 365 50 285 1 0 0 N
-S 75 -175 245 -225 1 0 0 N
-S 75 -75 245 -125 1 0 0 N
-S 75 25 245 -25 1 0 0 N
+S 65 -175 235 -225 1 0 0 N
+S 65 -75 235 -125 1 0 0 N
+S 65 25 235 -25 1 0 0 N
 S 75 250 305 200 1 0 0 N
 S 75 350 305 300 1 0 0 N
 S -500 500 500 -500 1 1 10 f
-S -75 -175 -245 -225 1 1 0 N
-S -75 -75 -245 -125 1 1 0 N
-S -75 25 -245 -25 1 1 0 N
 S -75 350 -315 300 1 1 0 N
-P 2 1 0 0 -245 -200 -270 -200 N
-P 2 1 0 0 -245 -100 -270 -100 N
-P 2 1 0 0 -245 0 -270 0 N
+S -65 -175 -235 -225 1 1 0 N
+S -65 -75 -235 -125 1 1 0 N
+S -65 25 -235 -25 1 1 0 N
+P 2 1 0 0 -235 -200 -270 -200 N
+P 2 1 0 0 -235 -100 -270 -100 N
+P 2 1 0 0 -235 0 -270 0 N
 P 2 1 0 0 -200 225 -200 300 N
 P 2 1 0 0 -200 225 -50 225 N
-P 2 1 0 0 -75 -200 -50 -200 N
-P 2 1 0 0 -75 -100 -50 -100 N
-P 2 1 0 0 -75 0 -50 0 N
 P 2 1 0 0 -75 325 -50 325 N
+P 2 1 0 0 -65 -200 -50 -200 N
+P 2 1 0 0 -65 -100 -50 -100 N
+P 2 1 0 0 -65 0 -50 0 N
 P 2 1 0 0 -50 -230 -20 -230 N
 P 2 1 0 0 -50 -170 -20 -170 N
 P 2 1 0 0 -50 -130 -20 -130 N
@@ -649,33 +649,32 @@ P 2 1 0 0 50 195 20 195 N
 P 2 1 0 0 50 255 20 255 N
 P 2 1 0 0 50 295 20 295 N
 P 2 1 0 0 50 355 20 355 N
-P 2 1 0 0 75 -200 50 -200 N
-P 2 1 0 0 75 -100 50 -100 N
-P 2 1 0 0 75 0 50 0 N
+P 2 1 0 0 65 -200 50 -200 N
+P 2 1 0 0 65 -100 50 -100 N
+P 2 1 0 0 65 0 50 0 N
 P 2 1 0 0 75 225 50 225 N
 P 2 1 0 0 75 325 50 325 N
 P 2 1 0 0 185 250 185 300 N
-P 2 1 0 0 245 -200 270 -200 N
-P 2 1 0 0 245 -100 290 -100 N
-P 2 1 0 0 245 0 270 0 N
-P 2 0 1 0 290 -100 290 -30 N
 P 3 0 1 0 -365 -300 -300 -300 -300 -235 N
-P 4 0 1 0 325 -175 375 -175 375 -150 415 -150 N
-P 4 0 1 0 415 -250 375 -250 375 -225 340 -225 N
-P 4 0 1 0 415 50 375 50 375 25 295 25 N
-P 6 0 1 0 415 -50 380 -50 375 -50 375 -30 375 -25 320 -25 N
+P 3 0 1 0 235 -100 320 -100 320 -80 N
+P 4 0 1 0 295 -250 270 -250 270 -200 235 -200 N
+P 4 0 1 0 300 -50 275 -50 275 0 235 0 N
+P 4 0 1 0 355 -225 385 -225 385 -200 420 -200 N
+P 4 0 1 0 370 -275 385 -275 385 -300 420 -300 N
+P 4 0 1 0 420 -100 385 -100 385 -75 345 -75 N
+P 4 0 1 0 420 0 385 0 385 -25 325 -25 N
 P 4 1 1 0 -330 -200 -270 -160 -270 -240 -330 -200 N
 P 4 1 1 0 -265 -100 -325 -60 -325 -140 -265 -100 N
 P 4 1 1 0 -265 0 -325 40 -325 -40 -265 0 N
-P 4 1 1 0 265 -200 325 -160 325 -240 265 -200 N
-P 4 1 1 0 330 0 270 40 270 -40 330 0 N
+P 4 1 1 0 295 -250 355 -210 355 -290 295 -250 N
+P 4 1 1 0 360 -50 300 -10 300 -90 360 -50 N
 X GND1 1 -600 -400 100 R 50 50 1 1 W
 X VISOOUT 10 600 400 100 L 50 50 1 1 W
-X Y 11 600 50 100 L 50 50 1 1 O
-X Z 12 600 -50 100 L 50 50 1 1 O
-X B 13 600 -250 100 L 50 50 1 1 I
-X A 14 600 -150 100 L 50 50 1 1 I
-X VISOIN 15 600 150 100 L 50 50 1 1 W
+X Y 11 600 0 100 L 50 50 1 1 O
+X Z 12 600 -100 100 L 50 50 1 1 O
+X B 13 600 -300 100 L 50 50 1 1 I
+X A 14 600 -200 100 L 50 50 1 1 I
+X VISOIN 15 600 100 100 L 50 50 1 1 W
 X GND2 16 600 -400 100 L 50 50 1 1 W N
 X VCC 2 -600 400 100 R 50 50 1 1 W
 X RXD 3 -600 -200 100 R 50 50 1 1 O

From 35af139b6d5d0f6a11d9d4487bf3838ee78f9fe1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Antonio=20V=C3=A1zquez?= <antoniovazquezblanco@gmail.com>
Date: Thu, 11 Apr 2019 13:18:48 +0200
Subject: [PATCH 085/201] Interface_UART: Fix ADM2682E pin types and aliases
 documentation

---
 Interface_UART.dcm | 1 +
 Interface_UART.lib | 6 +++---
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/Interface_UART.dcm b/Interface_UART.dcm
index ec1a239a38..57631288b7 100644
--- a/Interface_UART.dcm
+++ b/Interface_UART.dcm
@@ -84,6 +84,7 @@ $ENDCMP
 $CMP ADM2687E
 D Isolated RS485/RS422 Transciever, Integrated Isolated DC-DC Converter, 500kbps, SOIC-16W
 K RS485 Transciever, RS422 Transciever
+F https://www.analog.com/media/en/technical-documentation/data-sheets/ADM2682E_2687E.pdf
 $ENDCMP
 #
 $CMP GD65232DB
diff --git a/Interface_UART.lib b/Interface_UART.lib
index 146d99159b..c64ee5c683 100644
--- a/Interface_UART.lib
+++ b/Interface_UART.lib
@@ -675,14 +675,14 @@ X Z 12 600 -100 100 L 50 50 1 1 O
 X B 13 600 -300 100 L 50 50 1 1 I
 X A 14 600 -200 100 L 50 50 1 1 I
 X VISOIN 15 600 100 100 L 50 50 1 1 W
-X GND2 16 600 -400 100 L 50 50 1 1 W N
+X GND2 16 600 -400 100 L 50 50 1 1 P N
 X VCC 2 -600 400 100 R 50 50 1 1 W
 X RXD 3 -600 -200 100 R 50 50 1 1 O
 X ~RE 4 -600 -300 100 R 50 50 1 1 I
 X DE 5 -600 -100 100 R 50 50 1 1 I
 X TXD 6 -600 0 100 R 50 50 1 1 I
-X VCC 7 -600 400 100 R 50 50 1 1 W N
-X GND1 8 -600 -400 100 R 50 50 1 1 W N
+X VCC 7 -600 400 100 R 50 50 1 1 P N
+X GND1 8 -600 -400 100 R 50 50 1 1 P N
 X GND2 9 600 -400 100 L 50 50 1 1 W
 ENDDRAW
 ENDDEF

From cf5c7415b152f183e4b1de5eefb3eede6e6c0fce Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Antonio=20V=C3=A1zquez?= <antoniovazquezblanco@gmail.com>
Date: Thu, 11 Apr 2019 15:30:10 +0200
Subject: [PATCH 086/201] Interface_UART: Add ADM2682E keywords

---
 Interface_UART.dcm | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Interface_UART.dcm b/Interface_UART.dcm
index 57631288b7..c14b474cf2 100644
--- a/Interface_UART.dcm
+++ b/Interface_UART.dcm
@@ -77,13 +77,13 @@ $ENDCMP
 #
 $CMP ADM2682E
 D Isolated RS485/RS422 Transciever, Integrated Isolated DC-DC Converter, 16Mbps, SOIC-16W
-K RS485 Transciever, RS422 Transciever
+K RS485 Transciever, RS422 Transciever, Isopower
 F https://www.analog.com/media/en/technical-documentation/data-sheets/ADM2682E_2687E.pdf
 $ENDCMP
 #
 $CMP ADM2687E
 D Isolated RS485/RS422 Transciever, Integrated Isolated DC-DC Converter, 500kbps, SOIC-16W
-K RS485 Transciever, RS422 Transciever
+K RS485 Transciever, RS422 Transciever, Isopower
 F https://www.analog.com/media/en/technical-documentation/data-sheets/ADM2682E_2687E.pdf
 $ENDCMP
 #

From 7fc20292d6fc753ef16e8dacd1be8e12aa46133a Mon Sep 17 00:00:00 2001
From: John Whitmore <johnfwhitmore@gmail.com>
Date: Thu, 11 Apr 2019 19:27:34 +0100
Subject: [PATCH 087/201] PCF8523TK

The same symbol as for the PCF8523T but changed footprint

Signed-off-by: John Whitmore <johnfwhitmore@gmail.com>
---
 Timer_RTC.dcm |  6 ++++++
 Timer_RTC.lib | 23 +++++++++++++++++++++++
 2 files changed, 29 insertions(+)

diff --git a/Timer_RTC.dcm b/Timer_RTC.dcm
index ccde7d9c80..8157bdbd9e 100644
--- a/Timer_RTC.dcm
+++ b/Timer_RTC.dcm
@@ -108,6 +108,12 @@ K I2C RTC Clock Calendar
 F https://www.nxp.com/docs/en/data-sheet/PCF8523.pdf
 $ENDCMP
 #
+$CMP PCF8523TK
+D Realtime Clock/Calendar I2C Interface, HVSON8
+K I2C RTC Clock Calendar
+F https://www.nxp.com/docs/en/data-sheet/PCF8523.pdf
+$ENDCMP
+#
 $CMP PCF8563T
 D Realtime Clock/Calendar I2C Interface, SOIC-8
 K I2C RTC Clock Calendar
diff --git a/Timer_RTC.lib b/Timer_RTC.lib
index d41a796ab5..d0694b6f81 100644
--- a/Timer_RTC.lib
+++ b/Timer_RTC.lib
@@ -293,6 +293,29 @@ X VDD 8 -100 400 100 D 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #
+# PCF8523TK
+#
+DEF PCF8523TK U 0 20 Y Y 1 F N
+F0 "U" -400 350 50 H V L CNN
+F1 "PCF8523TK" 150 350 50 H V L CNN
+F2 "Package_SON:HVSON-8-1EP_4x4mm_P0.8mm_EP2.2x3.1mm" 800 -350 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ HVSON*8*
+$ENDFPLIST
+DRAW
+S -400 300 400 -300 0 1 10 f
+X OSCI 1 -500 -100 100 R 50 50 1 1 I
+X OSCO 2 -500 -200 100 R 50 50 1 1 O
+X VBAT 3 100 400 100 D 50 50 1 1 W
+X VSS 4 0 -400 100 U 50 50 1 1 W
+X SDA 5 -500 100 100 R 50 50 1 1 B
+X SCL 6 -500 200 100 R 50 50 1 1 I
+X ~INT1~/CLKOUT 7 500 0 100 L 50 50 1 1 C
+X VDD 8 -100 400 100 D 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
 # PCF8563T
 #
 DEF PCF8563T U 0 20 Y Y 1 F N

From bf4603bd73d6266831dda7fcae3fdaef4d1fa782 Mon Sep 17 00:00:00 2001
From: John Whitmore <johnfwhitmore@gmail.com>
Date: Thu, 11 Apr 2019 20:28:33 +0100
Subject: [PATCH 088/201] Corrected footprint details.

Signed-off-by: John Whitmore <johnfwhitmore@gmail.com>
---
 Timer_RTC.dcm | 2 +-
 Timer_RTC.lib | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/Timer_RTC.dcm b/Timer_RTC.dcm
index 8157bdbd9e..99a7e766c0 100644
--- a/Timer_RTC.dcm
+++ b/Timer_RTC.dcm
@@ -109,7 +109,7 @@ F https://www.nxp.com/docs/en/data-sheet/PCF8523.pdf
 $ENDCMP
 #
 $CMP PCF8523TK
-D Realtime Clock/Calendar I2C Interface, HVSON8
+D Realtime Clock/Calendar I2C Interface, HVSON-8
 K I2C RTC Clock Calendar
 F https://www.nxp.com/docs/en/data-sheet/PCF8523.pdf
 $ENDCMP
diff --git a/Timer_RTC.lib b/Timer_RTC.lib
index d0694b6f81..c146e8ea5f 100644
--- a/Timer_RTC.lib
+++ b/Timer_RTC.lib
@@ -301,7 +301,7 @@ F1 "PCF8523TK" 150 350 50 H V L CNN
 F2 "Package_SON:HVSON-8-1EP_4x4mm_P0.8mm_EP2.2x3.1mm" 800 -350 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
 $FPLIST
- HVSON*8*
+ HVSON*1EP*4x4mm*P0.8mm*
 $ENDFPLIST
 DRAW
 S -400 300 400 -300 0 1 10 f

From d72acfddf7f161ed129988d5e9e1166eb3542e23 Mon Sep 17 00:00:00 2001
From: Song Qiang <songqiang1304521@gmail.com>
Date: Sat, 8 Dec 2018 17:34:50 +0800
Subject: [PATCH 089/201] Add support for USR USR-C322 3Mbps UART-WIFI Module.

Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
---
 RF_WiFi.dcm |  6 ++++++
 RF_WiFi.lib | 61 ++++++++++++++++++++++++++++++++++++++++++++++++++++-
 2 files changed, 66 insertions(+), 1 deletion(-)

diff --git a/RF_WiFi.dcm b/RF_WiFi.dcm
index 80072df5bd..3c3bc765b8 100644
--- a/RF_WiFi.dcm
+++ b/RF_WiFi.dcm
@@ -6,4 +6,10 @@ K WiFi IEEE802.11 b/g/n
 F http://www.hi-flying.com/index.php?route=tool/upload/download&code=190ec6c62d497905ed783d140f8e5af7a753b8ab
 $ENDCMP
 #
+$CMP USR-C322
+D 802.11 b/g/n Wi-Fi Module
+K WiFi IEEE802.11 b/g/n
+F https://www.usriot.com/download/WIFI/USR-C322%20User%20Manual%20V2.3.pdf
+$ENDCMP
+#
 #End Doc Library
diff --git a/RF_WiFi.lib b/RF_WiFi.lib
index 8ade0697cf..f2e45a74b1 100644
--- a/RF_WiFi.lib
+++ b/RF_WiFi.lib
@@ -1,4 +1,4 @@
-EESchema-LIBRARY Version 2.3
+EESchema-LIBRARY Version 2.4
 #encoding utf-8
 #
 # HF-A11-SMT
@@ -38,4 +38,63 @@ X TX- 9 800 -100 200 L 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
+# USR-C322
+#
+DEF USR-C322 U 0 20 Y Y 1 F N
+F0 "U" -600 1100 50 H V C CNN
+F1 "USR-C322" 400 1100 50 H V C CNN
+F2 "RF_WiFi:USR-C322" -100 -400 50 H I C CNN
+F3 "" -500 1100 50 H I C CNN
+$FPLIST
+ USR?C322*
+$ENDFPLIST
+DRAW
+S -600 1000 600 -1000 1 1 10 f
+X GND 1 0 -1100 100 U 50 50 1 1 W
+X NC 10 600 -600 100 L 50 50 1 1 N N
+X GND 11 0 -1100 100 U 50 50 1 1 P N
+X GND 12 0 -1100 100 U 50 50 1 1 P N
+X VBT_CC 13 -100 1100 100 D 50 50 1 1 W
+X VDD_ANA2 14 0 1100 100 D 50 50 1 1 W
+X GPIO2 15 700 700 100 L 50 50 1 1 B
+X NC 16 600 -700 100 L 50 50 1 1 N N
+X GND 17 0 -1100 100 U 50 50 1 1 P N
+X GPIO3 18 700 600 100 L 50 50 1 1 B
+X UART0_TX 19 -700 900 100 R 50 50 1 1 O
+X GPIO0 2 700 900 100 L 50 50 1 1 B
+X UART0_RX 20 -700 800 100 R 50 50 1 1 I
+X ~RELOAD 21 -700 0 100 R 50 50 1 1 I
+X ~READY 22 -700 -200 100 R 50 50 1 1 C
+X ~LINK 23 -700 -300 100 R 50 50 1 1 C
+X UART0_CTS 24 -700 700 100 R 50 50 1 1 I
+X UART0_RTS 25 -700 600 100 R 50 50 1 1 O
+X GPIO4 26 700 500 100 L 50 50 1 1 B
+X GPIO5 27 700 400 100 L 50 50 1 1 B
+X GND 28 0 -1100 100 U 50 50 1 1 P N
+X GND 29 0 -1100 100 U 50 50 1 1 P N
+X GPIO1 3 700 800 100 L 50 50 1 1 B
+X UART1_TX 30 -700 400 100 R 50 50 1 1 O
+X UART1_RX 31 -700 300 100 R 50 50 1 1 I
+X GPIO6 32 700 300 100 L 50 50 1 1 B
+X GPIO7 33 700 200 100 L 50 50 1 1 B
+X GPIO8 34 700 100 100 L 50 50 1 1 B
+X GPIO9 35 700 0 100 L 50 50 1 1 B
+X GPIO10 36 700 -100 100 L 50 50 1 1 B
+X GPIO11 37 700 -200 100 L 50 50 1 1 B
+X GPIO12 38 700 -300 100 L 50 50 1 1 B
+X NC 39 600 -800 100 L 50 50 1 1 N N
+X ~RESET 4 -700 100 100 R 50 50 1 1 I
+X NC 40 600 -900 100 L 50 50 1 1 N N
+X GPIO13 41 700 -400 100 L 50 50 1 1 B
+X NC 42 300 -1000 100 U 50 50 1 1 N N
+X NC 43 200 -1000 100 U 50 50 1 1 N N
+X GND 44 0 -1100 100 U 50 50 1 1 P N
+X SOP2 5 -700 -700 100 R 50 50 1 1 P
+X SOP1 6 -700 -600 100 R 50 50 1 1 P
+X SOP0 7 -700 -500 100 R 50 50 1 1 P
+X ANA_DC-DC 8 -700 -900 100 R 50 50 1 1 P
+X NC 9 600 -500 100 L 50 50 1 1 N N
+ENDDRAW
+ENDDEF
+#
 #End Library

From b3b899478427a2086ea33773e8c034ae1987e9d9 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Antonio=20V=C3=A1zquez?= <antoniovazquezblanco@gmail.com>
Date: Thu, 11 Apr 2019 16:01:55 +0200
Subject: [PATCH 090/201] Regulator_Linear: Allow kicad to reorganize DCM files

---
 Regulator_Linear.dcm | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/Regulator_Linear.dcm b/Regulator_Linear.dcm
index 48af25dd8b..b9f2775504 100644
--- a/Regulator_Linear.dcm
+++ b/Regulator_Linear.dcm
@@ -3732,26 +3732,26 @@ K LDO low noise
 F https://www.analog.com/media/en/technical-documentation/data-sheets/3032ff.pdf
 $ENDCMP
 #
-$CMP LT3032-3.3
-D 150mA, Dual Low Dropout Linear Regulator, Positive/Negative Low Noise, 3.3V Output, DFN-14
+$CMP LT3032-12
+D 150mA, Dual Low Dropout Linear Regulator, Positive/Negative Low Noise, 12V Output, DFN-14
 K LDO low noise
 F https://www.analog.com/media/en/technical-documentation/data-sheets/3032ff.pdf
 $ENDCMP
 #
-$CMP LT3032-5
-D 150mA, Dual Low Dropout Linear Regulator, Positive/Negative Low Noise, 5V Output, DFN-14
+$CMP LT3032-15
+D 150mA, Dual Low Dropout Linear Regulator, Positive/Negative Low Noise, 15V Output, DFN-14
 K LDO low noise
 F https://www.analog.com/media/en/technical-documentation/data-sheets/3032ff.pdf
 $ENDCMP
 #
-$CMP LT3032-12
-D 150mA, Dual Low Dropout Linear Regulator, Positive/Negative Low Noise, 12V Output, DFN-14
+$CMP LT3032-3.3
+D 150mA, Dual Low Dropout Linear Regulator, Positive/Negative Low Noise, 3.3V Output, DFN-14
 K LDO low noise
 F https://www.analog.com/media/en/technical-documentation/data-sheets/3032ff.pdf
 $ENDCMP
 #
-$CMP LT3032-15
-D 150mA, Dual Low Dropout Linear Regulator, Positive/Negative Low Noise, 15V Output, DFN-14
+$CMP LT3032-5
+D 150mA, Dual Low Dropout Linear Regulator, Positive/Negative Low Noise, 5V Output, DFN-14
 K LDO low noise
 F https://www.analog.com/media/en/technical-documentation/data-sheets/3032ff.pdf
 $ENDCMP

From 9e6cbe362af0e071d8c7cab7e7370a709bfab008 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Antonio=20V=C3=A1zquez?= <antoniovazquezblanco@gmail.com>
Date: Fri, 12 Apr 2019 11:18:11 +0200
Subject: [PATCH 091/201] Regulator_Linear: Add MCP1754S-5002ECB and improve
 MCP1754S-5002ECB description

---
 Regulator_Linear.dcm | 30 ++++++++++++++++++++++++------
 Regulator_Linear.lib | 19 +++++++++++++++++++
 2 files changed, 43 insertions(+), 6 deletions(-)

diff --git a/Regulator_Linear.dcm b/Regulator_Linear.dcm
index b9f2775504..1305804291 100644
--- a/Regulator_Linear.dcm
+++ b/Regulator_Linear.dcm
@@ -4387,20 +4387,38 @@ F http://ww1.microchip.com/downloads/en/DeviceDoc/20005122B.pdf
 $ENDCMP
 #
 $CMP MCP1754-1802E_SOT89
-D Fixed 150mA Low Dropout Voltage Regulator, Positive, SOT-89
-K REGULATOR LDO
+D Fixed 150mA Low Dropout Voltage Regulator, Positive, 1.8V output, SOT-89
+K Regulator LDO
 F http://ww1.microchip.com/downloads/en/DeviceDoc/20002276C.pdf
 $ENDCMP
 #
 $CMP MCP1754-3302E_SOT89
-D Fixed 150mA Low Dropout Voltage Regulator, Positive, SOT-89
-K REGULATOR LDO
+D Fixed 150mA Low Dropout Voltage Regulator, Positive, 3.3V output, SOT-89
+K Regulator LDO
 F http://ww1.microchip.com/downloads/en/DeviceDoc/20002276C.pdf
 $ENDCMP
 #
 $CMP MCP1754-5002E_SOT89
-D Fixed 150mA Low Dropout Voltage Regulator, Positive, SOT-89
-K REGULATOR LDO
+D Fixed 150mA Low Dropout Voltage Regulator, Positive, 5V output, SOT-89
+K Regulator LDO
+F http://ww1.microchip.com/downloads/en/DeviceDoc/20002276C.pdf
+$ENDCMP
+#
+$CMP MCP1754S-1802ECB
+D Fixed 150mA Low Dropout Voltage Regulator, Positive, 1.8V output, SOT-23
+K Regulator LDO
+F http://ww1.microchip.com/downloads/en/DeviceDoc/20002276C.pdf
+$ENDCMP
+#
+$CMP MCP1754S-3302ECB
+D Fixed 150mA Low Dropout Voltage Regulator, Positive, 3.3V output, SOT-23
+K Regulator LDO
+F http://ww1.microchip.com/downloads/en/DeviceDoc/20002276C.pdf
+$ENDCMP
+#
+$CMP MCP1754S-5002ECB
+D Fixed 150mA Low Dropout Voltage Regulator, Positive, 5V output, SOT-23
+K Regulator LDO
 F http://ww1.microchip.com/downloads/en/DeviceDoc/20002276C.pdf
 $ENDCMP
 #
diff --git a/Regulator_Linear.lib b/Regulator_Linear.lib
index 153f764d42..1494a4a7ce 100644
--- a/Regulator_Linear.lib
+++ b/Regulator_Linear.lib
@@ -2979,6 +2979,25 @@ X VO 3 300 0 100 L 50 50 1 1 w
 ENDDRAW
 ENDDEF
 #
+# MCP1754S-5002ECB
+#
+DEF MCP1754S-5002ECB U 0 10 Y Y 1 F N
+F0 "U" -150 125 50 H V C CNN
+F1 "MCP1754S-5002ECB" -25 125 50 H V L CNN
+F2 "Package_TO_SOT_SMD:SOT-23" 0 225 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+ALIAS MCP1754S-3302ECB MCP1754S-1802ECB
+$FPLIST
+ SOT?23*
+$ENDFPLIST
+DRAW
+S -200 -200 200 75 0 1 10 f
+X GND 1 0 -300 100 U 50 50 1 1 W
+X VO 2 300 0 100 L 50 50 1 1 w
+X VI 3 -300 0 100 R 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
 # MCP1804x-1802xDB
 #
 DEF MCP1804x-1802xDB U 0 10 Y Y 1 F N

From 15beaa01cddb1535868175499cbdd2d422bd8ee8 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Antonio=20V=C3=A1zquez?= <antoniovazquezblanco@gmail.com>
Date: Fri, 12 Apr 2019 11:21:01 +0200
Subject: [PATCH 092/201] Regulator_Linear:Fix MCP1754 pin offset

---
 Regulator_Linear.lib | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Regulator_Linear.lib b/Regulator_Linear.lib
index 1494a4a7ce..eef4fd9aa9 100644
--- a/Regulator_Linear.lib
+++ b/Regulator_Linear.lib
@@ -2962,7 +2962,7 @@ ENDDEF
 #
 # MCP1754-5002E_SOT89
 #
-DEF MCP1754-5002E_SOT89 U 0 10 Y Y 1 F N
+DEF MCP1754-5002E_SOT89 U 0 20 Y Y 1 F N
 F0 "U" -150 125 50 H V C CNN
 F1 "MCP1754-5002E_SOT89" -25 125 50 H V L CNN
 F2 "Package_TO_SOT_SMD:SOT-89-3" 0 225 50 H I C CNN
@@ -2981,7 +2981,7 @@ ENDDEF
 #
 # MCP1754S-5002ECB
 #
-DEF MCP1754S-5002ECB U 0 10 Y Y 1 F N
+DEF MCP1754S-5002ECB U 0 20 Y Y 1 F N
 F0 "U" -150 125 50 H V C CNN
 F1 "MCP1754S-5002ECB" -25 125 50 H V L CNN
 F2 "Package_TO_SOT_SMD:SOT-23" 0 225 50 H I C CNN

From 806b170dee1ff7e68db8f4c11880423b56947c4b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Antonio=20V=C3=A1zquez?= <antoniovazquezblanco@gmail.com>
Date: Fri, 12 Apr 2019 11:38:43 +0200
Subject: [PATCH 093/201] Regulator_Linear: Wildcard temperature indicator in
 MCP1754 MPN

---
 Regulator_Linear.dcm | 18 ++++++++++++++++++
 Regulator_Linear.lib | 19 +++++++++++++++++++
 2 files changed, 37 insertions(+)

diff --git a/Regulator_Linear.dcm b/Regulator_Linear.dcm
index 1305804291..75eb7f0a98 100644
--- a/Regulator_Linear.dcm
+++ b/Regulator_Linear.dcm
@@ -4410,18 +4410,36 @@ K Regulator LDO
 F http://ww1.microchip.com/downloads/en/DeviceDoc/20002276C.pdf
 $ENDCMP
 #
+$CMP MCP1754S-1802xCB
+D Fixed 150mA Low Dropout Voltage Regulator, Positive, 1.8V output, SOT-23
+K Regulator LDO
+F http://ww1.microchip.com/downloads/en/DeviceDoc/20002276C.pdf
+$ENDCMP
+#
 $CMP MCP1754S-3302ECB
 D Fixed 150mA Low Dropout Voltage Regulator, Positive, 3.3V output, SOT-23
 K Regulator LDO
 F http://ww1.microchip.com/downloads/en/DeviceDoc/20002276C.pdf
 $ENDCMP
 #
+$CMP MCP1754S-3302xCB
+D Fixed 150mA Low Dropout Voltage Regulator, Positive, 3.3V output, SOT-23
+K Regulator LDO
+F http://ww1.microchip.com/downloads/en/DeviceDoc/20002276C.pdf
+$ENDCMP
+#
 $CMP MCP1754S-5002ECB
 D Fixed 150mA Low Dropout Voltage Regulator, Positive, 5V output, SOT-23
 K Regulator LDO
 F http://ww1.microchip.com/downloads/en/DeviceDoc/20002276C.pdf
 $ENDCMP
 #
+$CMP MCP1754S-5002xCB
+D Fixed 150mA Low Dropout Voltage Regulator, Positive, 5V output, SOT-23
+K Regulator LDO
+F http://ww1.microchip.com/downloads/en/DeviceDoc/20002276C.pdf
+$ENDCMP
+#
 $CMP MCP1804x-1802xDB
 D 150mA, 28V LDO Regulator With Shutdown, 1.8V Fixed Output, SOT-223
 K linear regulator ldo fixed positive
diff --git a/Regulator_Linear.lib b/Regulator_Linear.lib
index eef4fd9aa9..f8d8de9ec0 100644
--- a/Regulator_Linear.lib
+++ b/Regulator_Linear.lib
@@ -2998,6 +2998,25 @@ X VI 3 -300 0 100 R 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #
+# MCP1754S-5002xCB
+#
+DEF MCP1754S-5002xCB U 0 20 Y Y 1 F N
+F0 "U" -150 125 50 H V C CNN
+F1 "MCP1754S-5002xCB" -25 125 50 H V L CNN
+F2 "Package_TO_SOT_SMD:SOT-23" 0 225 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+ALIAS MCP1754S-3302xCB MCP1754S-1802xCB
+$FPLIST
+ SOT?23*
+$ENDFPLIST
+DRAW
+S -200 -200 200 75 0 1 10 f
+X GND 1 0 -300 100 U 50 50 1 1 W
+X VO 2 300 0 100 L 50 50 1 1 w
+X VI 3 -300 0 100 R 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
 # MCP1804x-1802xDB
 #
 DEF MCP1804x-1802xDB U 0 10 Y Y 1 F N

From 75eb8a437bf2c6d3c91a710492cd0ebd3bdb02ee Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Antonio=20V=C3=A1zquez?= <antoniovazquezblanco@gmail.com>
Date: Fri, 12 Apr 2019 11:39:19 +0200
Subject: [PATCH 094/201] Regulator_Linear: Delete duplicated elements
 generated by KiCad

---
 Regulator_Linear.dcm | 18 ------------------
 Regulator_Linear.lib | 19 -------------------
 2 files changed, 37 deletions(-)

diff --git a/Regulator_Linear.dcm b/Regulator_Linear.dcm
index 75eb7f0a98..a145544aa6 100644
--- a/Regulator_Linear.dcm
+++ b/Regulator_Linear.dcm
@@ -4404,36 +4404,18 @@ K Regulator LDO
 F http://ww1.microchip.com/downloads/en/DeviceDoc/20002276C.pdf
 $ENDCMP
 #
-$CMP MCP1754S-1802ECB
-D Fixed 150mA Low Dropout Voltage Regulator, Positive, 1.8V output, SOT-23
-K Regulator LDO
-F http://ww1.microchip.com/downloads/en/DeviceDoc/20002276C.pdf
-$ENDCMP
-#
 $CMP MCP1754S-1802xCB
 D Fixed 150mA Low Dropout Voltage Regulator, Positive, 1.8V output, SOT-23
 K Regulator LDO
 F http://ww1.microchip.com/downloads/en/DeviceDoc/20002276C.pdf
 $ENDCMP
 #
-$CMP MCP1754S-3302ECB
-D Fixed 150mA Low Dropout Voltage Regulator, Positive, 3.3V output, SOT-23
-K Regulator LDO
-F http://ww1.microchip.com/downloads/en/DeviceDoc/20002276C.pdf
-$ENDCMP
-#
 $CMP MCP1754S-3302xCB
 D Fixed 150mA Low Dropout Voltage Regulator, Positive, 3.3V output, SOT-23
 K Regulator LDO
 F http://ww1.microchip.com/downloads/en/DeviceDoc/20002276C.pdf
 $ENDCMP
 #
-$CMP MCP1754S-5002ECB
-D Fixed 150mA Low Dropout Voltage Regulator, Positive, 5V output, SOT-23
-K Regulator LDO
-F http://ww1.microchip.com/downloads/en/DeviceDoc/20002276C.pdf
-$ENDCMP
-#
 $CMP MCP1754S-5002xCB
 D Fixed 150mA Low Dropout Voltage Regulator, Positive, 5V output, SOT-23
 K Regulator LDO
diff --git a/Regulator_Linear.lib b/Regulator_Linear.lib
index f8d8de9ec0..b80ed8c967 100644
--- a/Regulator_Linear.lib
+++ b/Regulator_Linear.lib
@@ -2979,25 +2979,6 @@ X VO 3 300 0 100 L 50 50 1 1 w
 ENDDRAW
 ENDDEF
 #
-# MCP1754S-5002ECB
-#
-DEF MCP1754S-5002ECB U 0 20 Y Y 1 F N
-F0 "U" -150 125 50 H V C CNN
-F1 "MCP1754S-5002ECB" -25 125 50 H V L CNN
-F2 "Package_TO_SOT_SMD:SOT-23" 0 225 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
-ALIAS MCP1754S-3302ECB MCP1754S-1802ECB
-$FPLIST
- SOT?23*
-$ENDFPLIST
-DRAW
-S -200 -200 200 75 0 1 10 f
-X GND 1 0 -300 100 U 50 50 1 1 W
-X VO 2 300 0 100 L 50 50 1 1 w
-X VI 3 -300 0 100 R 50 50 1 1 W
-ENDDRAW
-ENDDEF
-#
 # MCP1754S-5002xCB
 #
 DEF MCP1754S-5002xCB U 0 20 Y Y 1 F N

From 8743975ce907bb4e3ef31a517343e1577a9f1c4e Mon Sep 17 00:00:00 2001
From: jstjst <jonas@gappert.de>
Date: Fri, 12 Apr 2019 16:19:36 +0200
Subject: [PATCH 095/201] added TPS3808

---
 Power_Supervisor.dcm |  6 ++++++
 Power_Supervisor.lib | 21 +++++++++++++++++++++
 2 files changed, 27 insertions(+)

diff --git a/Power_Supervisor.dcm b/Power_Supervisor.dcm
index 6a63e0ec4d..3d22ba42eb 100644
--- a/Power_Supervisor.dcm
+++ b/Power_Supervisor.dcm
@@ -354,6 +354,12 @@ K protection overvoltage unvervoltage monitor
 F http://www.ti.com/lit/ds/symlink/tps3702.pdf
 $ENDCMP
 #
+$CMP TPS3808DBV
+D Low-Quiescent-Current, Programmable-Delay Supervisory Circuit
+K supply voltage supervisor
+F http://www.ti.com/lit/ds/symlink/tps3808.pdf
+$ENDCMP
+#
 $CMP TPS3831
 D 150-nA, Ultralow Power, Supply Voltage Monitor, X2SON-4
 K supply voltage supervisor
diff --git a/Power_Supervisor.lib b/Power_Supervisor.lib
index ddae6702c4..18c57b8197 100644
--- a/Power_Supervisor.lib
+++ b/Power_Supervisor.lib
@@ -448,6 +448,27 @@ X OV 6 400 100 100 L 50 50 1 1 O
 ENDDRAW
 ENDDEF
 #
+# TPS3808DBV
+#
+DEF TPS3808DBV U 0 10 Y Y 1 F N
+F0 "U" 0 350 50 H V L CNN
+F1 "TPS3808DBV" 0 250 50 H V L CNN
+F2 "Package_TO_SOT_SMD:SOT-23-6" -100 0 50 H I C CNN
+F3 "" -100 0 50 H I C CNN
+$FPLIST
+ Package*TO*SOT*SMD*SOT-23-6*
+$ENDFPLIST
+DRAW
+S -300 200 300 -200 0 1 10 f
+X ~RESET 1 400 0 100 L 50 50 1 1 O
+X GND 2 0 -300 100 U 50 50 1 1 W
+X ~MR 3 -400 0 100 R 50 50 1 1 I
+X CT 4 -400 -100 100 R 50 50 1 1 I
+X SENSE 5 -400 100 100 R 50 50 1 1 I
+X VDD 6 0 300 100 D 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
 # TPS3831
 #
 DEF TPS3831 U 0 10 Y Y 1 F N

From 733bc271f68767cbf05cefc24e0d5623cc159923 Mon Sep 17 00:00:00 2001
From: jstjst <jonas@gappert.de>
Date: Fri, 12 Apr 2019 16:48:18 +0200
Subject: [PATCH 096/201] fixed issues

---
 Power_Supervisor.lib | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Power_Supervisor.lib b/Power_Supervisor.lib
index 18c57b8197..be7199d2b8 100644
--- a/Power_Supervisor.lib
+++ b/Power_Supervisor.lib
@@ -450,13 +450,13 @@ ENDDEF
 #
 # TPS3808DBV
 #
-DEF TPS3808DBV U 0 10 Y Y 1 F N
+DEF TPS3808DBV U 0 20 Y Y 1 F N
 F0 "U" 0 350 50 H V L CNN
 F1 "TPS3808DBV" 0 250 50 H V L CNN
 F2 "Package_TO_SOT_SMD:SOT-23-6" -100 0 50 H I C CNN
 F3 "" -100 0 50 H I C CNN
 $FPLIST
- Package*TO*SOT*SMD*SOT-23-6*
+ Package*TO*SOT*SMD*SOT*23*
 $ENDFPLIST
 DRAW
 S -300 200 300 -200 0 1 10 f

From 04e505cf4f6ec9fc392c3a281a66e658aa3ef904 Mon Sep 17 00:00:00 2001
From: jstjst <jonas@gappert.de>
Date: Fri, 12 Apr 2019 18:29:32 +0200
Subject: [PATCH 097/201] added TLV733PDBV

---
 Regulator_Linear.dcm | 22 ++++++++++++++--------
 Regulator_Linear.lib | 20 ++++++++++++++++++++
 2 files changed, 34 insertions(+), 8 deletions(-)

diff --git a/Regulator_Linear.dcm b/Regulator_Linear.dcm
index 48af25dd8b..f6ec59e912 100644
--- a/Regulator_Linear.dcm
+++ b/Regulator_Linear.dcm
@@ -3732,26 +3732,26 @@ K LDO low noise
 F https://www.analog.com/media/en/technical-documentation/data-sheets/3032ff.pdf
 $ENDCMP
 #
-$CMP LT3032-3.3
-D 150mA, Dual Low Dropout Linear Regulator, Positive/Negative Low Noise, 3.3V Output, DFN-14
+$CMP LT3032-12
+D 150mA, Dual Low Dropout Linear Regulator, Positive/Negative Low Noise, 12V Output, DFN-14
 K LDO low noise
 F https://www.analog.com/media/en/technical-documentation/data-sheets/3032ff.pdf
 $ENDCMP
 #
-$CMP LT3032-5
-D 150mA, Dual Low Dropout Linear Regulator, Positive/Negative Low Noise, 5V Output, DFN-14
+$CMP LT3032-15
+D 150mA, Dual Low Dropout Linear Regulator, Positive/Negative Low Noise, 15V Output, DFN-14
 K LDO low noise
 F https://www.analog.com/media/en/technical-documentation/data-sheets/3032ff.pdf
 $ENDCMP
 #
-$CMP LT3032-12
-D 150mA, Dual Low Dropout Linear Regulator, Positive/Negative Low Noise, 12V Output, DFN-14
+$CMP LT3032-3.3
+D 150mA, Dual Low Dropout Linear Regulator, Positive/Negative Low Noise, 3.3V Output, DFN-14
 K LDO low noise
 F https://www.analog.com/media/en/technical-documentation/data-sheets/3032ff.pdf
 $ENDCMP
 #
-$CMP LT3032-15
-D 150mA, Dual Low Dropout Linear Regulator, Positive/Negative Low Noise, 15V Output, DFN-14
+$CMP LT3032-5
+D 150mA, Dual Low Dropout Linear Regulator, Positive/Negative Low Noise, 5V Output, DFN-14
 K LDO low noise
 F https://www.analog.com/media/en/technical-documentation/data-sheets/3032ff.pdf
 $ENDCMP
@@ -5796,6 +5796,12 @@ K LDO Regulator Fixed Positive
 F http://www.ti.com/lit/ds/symlink/tlv713p.pdf
 $ENDCMP
 #
+$CMP TLV733PDBV
+D Capacitor-Free, 300-mA, Low-Dropout Regulator
+K LDO
+F http://www.ti.com/lit/ds/symlink/tlv733p.pdf
+$ENDCMP
+#
 $CMP TLV75509PDBV
 D 500mA Low IQ Small Size Low Dropout Voltage Regulator, Fixed Output 0.9V, SOT-23-5
 K LDO Regulator Fixed Positive
diff --git a/Regulator_Linear.lib b/Regulator_Linear.lib
index 153f764d42..6bba77232d 100644
--- a/Regulator_Linear.lib
+++ b/Regulator_Linear.lib
@@ -3758,6 +3758,26 @@ X OUT 5 300 100 100 L 50 50 1 1 w
 ENDDRAW
 ENDDEF
 #
+# TLV733PDBV
+#
+DEF TLV733PDBV U 0 20 Y Y 1 F N
+F0 "U" -150 250 50 H V C CNN
+F1 "TLV733PDBV" 250 250 50 H V C CNN
+F2 "Package_TO_SOT_SMD:SOT-23-5" 0 0 50 H I C CNN
+F3 "" 200 -100 50 H I C CNN
+$FPLIST
+ Package*TO*SOT*SMD*SOT*23*
+$ENDFPLIST
+DRAW
+S -200 200 200 -200 0 1 0 f
+X IN 1 -300 100 100 R 50 50 1 1 W
+X GND 2 0 -300 100 U 50 50 1 1 W
+X EN 3 -300 0 100 R 50 50 1 1 I
+X NC 4 300 0 100 L 50 50 1 1 N N
+X OUT 5 300 100 100 L 50 50 1 1 w
+ENDDRAW
+ENDDEF
+#
 # TPS51200DRC
 #
 DEF TPS51200DRC U 0 20 Y Y 1 F N

From 0a7ac20b143ed8604891339ba1c3aebb43fe65b4 Mon Sep 17 00:00:00 2001
From: jstjst <jonas@gappert.de>
Date: Fri, 12 Apr 2019 18:36:08 +0200
Subject: [PATCH 098/201] fixed issues

---
 Regulator_Linear.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Regulator_Linear.lib b/Regulator_Linear.lib
index 6bba77232d..54ac146056 100644
--- a/Regulator_Linear.lib
+++ b/Regulator_Linear.lib
@@ -3769,7 +3769,7 @@ $FPLIST
  Package*TO*SOT*SMD*SOT*23*
 $ENDFPLIST
 DRAW
-S -200 200 200 -200 0 1 0 f
+S -200 200 200 -200 0 1 10 f
 X IN 1 -300 100 100 R 50 50 1 1 W
 X GND 2 0 -300 100 U 50 50 1 1 W
 X EN 3 -300 0 100 R 50 50 1 1 I

From 259c4b9786e524e5acab6696386ded76f0d9c8fb Mon Sep 17 00:00:00 2001
From: JonathSpirit <guillaume.guillet@outlook.com>
Date: Fri, 12 Apr 2019 22:16:00 +0200
Subject: [PATCH 099/201] The 74HC244 is a tri-state buffer, but the symbol
 have simple output.

---
 74xx.lib | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/74xx.lib b/74xx.lib
index 41f830d1b2..1d40655477 100644
--- a/74xx.lib
+++ b/74xx.lib
@@ -205,23 +205,23 @@ P 4 1 0 6 50 0 -50 50 -50 -50 50 0 N
 X 1OE 1 -500 -400 200 R 50 50 1 0 I I
 X GND 10 0 -800 200 U 50 50 1 0 W
 X 2A3 11 -500 -200 200 R 50 50 1 0 I
-X 1Y3 12 500 200 200 L 50 50 1 0 O
+X 1Y3 12 500 200 200 L 50 50 1 0 T
 X 2A2 13 -500 -100 200 R 50 50 1 0 I
-X 1Y2 14 500 300 200 L 50 50 1 0 O
+X 1Y2 14 500 300 200 L 50 50 1 0 T
 X 2A1 15 -500 0 200 R 50 50 1 0 I
-X 1Y1 16 500 400 200 L 50 50 1 0 O
+X 1Y1 16 500 400 200 L 50 50 1 0 T
 X 2A0 17 -500 100 200 R 50 50 1 0 I
-X 1Y0 18 500 500 200 L 50 50 1 0 O
+X 1Y0 18 500 500 200 L 50 50 1 0 T
 X 2OE 19 -500 -500 200 R 50 50 1 0 I I
 X 1A0 2 -500 500 200 R 50 50 1 0 I
 X VCC 20 0 800 200 D 50 50 1 0 W
-X 2Y0 3 500 100 200 L 50 50 1 0 O
+X 2Y0 3 500 100 200 L 50 50 1 0 T
 X 1A1 4 -500 400 200 R 50 50 1 0 I
-X 2Y1 5 500 0 200 L 50 50 1 0 O
+X 2Y1 5 500 0 200 L 50 50 1 0 T
 X 1A2 6 -500 300 200 R 50 50 1 0 I
-X 2Y2 7 500 -100 200 L 50 50 1 0 O
+X 2Y2 7 500 -100 200 L 50 50 1 0 T
 X 1A3 8 -500 200 200 R 50 50 1 0 I
-X 2Y3 9 500 -200 200 L 50 50 1 0 O
+X 2Y3 9 500 -200 200 L 50 50 1 0 T
 ENDDRAW
 ENDDEF
 #

From 3b3a475df1caca8f1b8ef74284ff219eb9ae1dd3 Mon Sep 17 00:00:00 2001
From: JonathSpirit <guillaume.guillet@outlook.com>
Date: Fri, 12 Apr 2019 22:52:41 +0200
Subject: [PATCH 100/201] This commit fix the Travis violation S3.6 "Pin name
 position offset" Pin offset (40) should be 20mils unless required by symbol
 geometry

---
 74xx.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/74xx.lib b/74xx.lib
index 1d40655477..3cb11cb83c 100644
--- a/74xx.lib
+++ b/74xx.lib
@@ -189,7 +189,7 @@ ENDDEF
 #
 # 74HC244
 #
-DEF 74HC244 U 0 40 Y Y 1 L N
+DEF 74HC244 U 0 20 Y Y 1 F N
 F0 "U" -300 650 50 H V C CNN
 F1 "74HC244" -300 -650 50 H V C CNN
 F2 "" 0 0 50 H I C CNN

From 6871e95634453859e602ba43aa01da49b6b29683 Mon Sep 17 00:00:00 2001
From: Roger Jia Rong Jhang <roger225@gmail.com>
Date: Sun, 14 Apr 2019 00:52:51 +0800
Subject: [PATCH 101/201] add TXS0102DCT, DCU, DQE, YZP

---
 Logic_LevelTranslator.dcm |  24 +++++++
 Logic_LevelTranslator.lib | 148 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 172 insertions(+)

diff --git a/Logic_LevelTranslator.dcm b/Logic_LevelTranslator.dcm
index e6dfe0ae9a..69220d62a3 100644
--- a/Logic_LevelTranslator.dcm
+++ b/Logic_LevelTranslator.dcm
@@ -156,6 +156,30 @@ K Level-Shifter CMOS-TTL-Translation
 F http://www.ti.com/lit/ds/symlink/txb0304.pdf
 $ENDCMP
 #
+$CMP TXS0102DCT
+D 2-Bit Bidirectional Voltage-Level Shifter for Open-Drain and Push-Pull Application, SSOP-8
+K Level-Shifter CMOS-TTL-Translation
+F http://www.ti.com/lit/gpn/txs0102
+$ENDCMP
+#
+$CMP TXS0102DCU
+D 2-Bit Bidirectional Voltage-Level Shifter for Open-Drain and Push-Pull Application, VSSOP-8
+K Level-Shifter CMOS-TTL-Translation
+F http://www.ti.com/lit/gpn/txs0102
+$ENDCMP
+#
+$CMP TXS0102DQE
+D 2-Bit Bidirectional Voltage-Level Shifter for Open-Drain and Push-Pull Application, X2SON-8
+K Level-Shifter CMOS-TTL-Translation
+F http://www.ti.com/lit/gpn/txs0102
+$ENDCMP
+#
+$CMP TXS0102YZP
+D 2-Bit Bidirectional Voltage-Level Shifter for Open-Drain and Push-Pull Application, DSBGA-8
+K Level-Shifter CMOS-TTL-Translation
+F http://www.ti.com/lit/gpn/txs0102
+$ENDCMP
+#
 $CMP TXS0108EPW
 D Bidirectional  level-shifting voltage translator, TSSOP-20
 K 8-bit
diff --git a/Logic_LevelTranslator.lib b/Logic_LevelTranslator.lib
index 95c97b960d..3dd2635c45 100644
--- a/Logic_LevelTranslator.lib
+++ b/Logic_LevelTranslator.lib
@@ -908,6 +908,154 @@ X B2 9 400 100 100 L 50 50 1 1 T
 ENDDRAW
 ENDDEF
 #
+# TXS0102DCT
+#
+DEF TXS0102DCT U 0 20 Y Y 1 F N
+F0 "U" -250 450 50 H V C CNN
+F1 "TXS0102DCT" 150 450 50 H V L CNN
+F2 "Package_SO:SSOP-8_2.95x2.8mm_P0.65mm" 0 -550 50 H I C CNN
+F3 "" 0 -20 50 H I C CNN
+$FPLIST
+ SSOP*P0.65mm*
+$ENDFPLIST
+DRAW
+S -300 400 300 -400 0 1 10 f
+P 2 0 1 0 -170 -100 -50 -100 N
+P 2 0 1 0 -80 -60 80 -60 N
+P 2 0 1 0 -60 -50 60 -50 N
+P 2 0 1 0 -50 -100 -50 -60 N
+P 2 0 1 0 0 -50 0 -10 N
+P 2 0 1 0 50 -100 50 -60 N
+P 2 0 1 0 170 -100 50 -100 N
+P 2 1 1 0 -170 100 -50 100 N
+P 2 1 1 0 -80 140 80 140 N
+P 2 1 1 0 -60 150 60 150 N
+P 2 1 1 0 -50 100 -50 140 N
+P 2 1 1 0 0 150 0 190 N
+P 2 1 1 0 50 100 50 140 N
+P 2 1 1 0 170 100 50 100 N
+X B2 1 400 -100 100 L 50 50 1 1 B
+X GND 2 0 -500 100 U 50 50 1 1 W
+X VCCA 3 -100 500 100 D 50 50 1 1 W
+X A2 4 -400 -100 100 R 50 50 1 1 B
+X A1 5 -400 100 100 R 50 50 1 1 B
+X OE 6 -400 -300 100 R 50 50 1 1 I
+X VCCB 7 100 500 100 D 50 50 1 1 W
+X B1 8 400 100 100 L 50 50 1 1 B
+ENDDRAW
+ENDDEF
+#
+# TXS0102DCU
+#
+DEF TXS0102DCU U 0 20 Y Y 1 F N
+F0 "U" -250 450 50 H V C CNN
+F1 "TXS0102DCU" 150 450 50 H V L CNN
+F2 "Package_SO:VSSOP-8_2.4x2.1mm_P0.5mm" 0 -550 50 H I C CNN
+F3 "" 0 -20 50 H I C CNN
+$FPLIST
+ VSSOP*P0.5mm*
+$ENDFPLIST
+DRAW
+S -300 400 300 -400 0 1 10 f
+P 2 0 1 0 -170 -100 -50 -100 N
+P 2 0 1 0 -80 -60 80 -60 N
+P 2 0 1 0 -60 -50 60 -50 N
+P 2 0 1 0 -50 -100 -50 -60 N
+P 2 0 1 0 0 -50 0 -10 N
+P 2 0 1 0 50 -100 50 -60 N
+P 2 0 1 0 170 -100 50 -100 N
+P 2 1 1 0 -170 100 -50 100 N
+P 2 1 1 0 -80 140 80 140 N
+P 2 1 1 0 -60 150 60 150 N
+P 2 1 1 0 -50 100 -50 140 N
+P 2 1 1 0 0 150 0 190 N
+P 2 1 1 0 50 100 50 140 N
+P 2 1 1 0 170 100 50 100 N
+X B2 1 400 -100 100 L 50 50 1 1 B
+X GND 2 0 -500 100 U 50 50 1 1 W
+X VCCA 3 -100 500 100 D 50 50 1 1 W
+X A2 4 -400 -100 100 R 50 50 1 1 B
+X A1 5 -400 100 100 R 50 50 1 1 B
+X OE 6 -400 -300 100 R 50 50 1 1 I
+X VCCB 7 100 500 100 D 50 50 1 1 W
+X B1 8 400 100 100 L 50 50 1 1 B
+ENDDRAW
+ENDDEF
+#
+# TXS0102DQE
+#
+DEF TXS0102DQE U 0 20 Y Y 1 F N
+F0 "U" -250 450 50 H V C CNN
+F1 "TXS0102DQE" 150 450 50 H V L CNN
+F2 "Package_SON:X2SON-8_1.4x1mm_P0.35mm" 0 -550 50 H I C CNN
+F3 "" 0 -20 50 H I C CNN
+$FPLIST
+ X2SON*1.4x1mm*P0.35mm*
+$ENDFPLIST
+DRAW
+S -300 400 300 -400 0 1 10 f
+P 2 0 1 0 -170 -100 -50 -100 N
+P 2 0 1 0 -80 -60 80 -60 N
+P 2 0 1 0 -60 -50 60 -50 N
+P 2 0 1 0 -50 -100 -50 -60 N
+P 2 0 1 0 0 -50 0 -10 N
+P 2 0 1 0 50 -100 50 -60 N
+P 2 0 1 0 170 -100 50 -100 N
+P 2 1 1 0 -170 100 -50 100 N
+P 2 1 1 0 -80 140 80 140 N
+P 2 1 1 0 -60 150 60 150 N
+P 2 1 1 0 -50 100 -50 140 N
+P 2 1 1 0 0 150 0 190 N
+P 2 1 1 0 50 100 50 140 N
+P 2 1 1 0 170 100 50 100 N
+X VCCA 1 -100 500 100 D 50 50 1 1 W
+X A1 2 -400 100 100 R 50 50 1 1 B
+X A2 3 -400 -100 100 R 50 50 1 1 B
+X GND 4 0 -500 100 U 50 50 1 1 W
+X OE 5 -400 -300 100 R 50 50 1 1 I
+X B2 6 400 -100 100 L 50 50 1 1 B
+X B1 7 400 100 100 L 50 50 1 1 B
+X VCCB 8 100 500 100 D 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# TXS0102YZP
+#
+DEF TXS0102YZP U 0 20 Y Y 1 F N
+F0 "U" -250 450 50 H V C CNN
+F1 "TXS0102YZP" 150 450 50 H V L CNN
+F2 "Package_BGA:Texas_DSBGA-8_0.9x1.9mm_Layout2x4_P0.5mm" 0 -550 50 H I C CNN
+F3 "" 0 -20 50 H I C CNN
+$FPLIST
+ Texas*DSBGA*0.9x1.9mm*Layout2x4*P0.5mm
+$ENDFPLIST
+DRAW
+S -300 400 300 -400 0 1 10 f
+P 2 0 1 0 -170 -100 -50 -100 N
+P 2 0 1 0 -80 -60 80 -60 N
+P 2 0 1 0 -60 -50 60 -50 N
+P 2 0 1 0 -50 -100 -50 -60 N
+P 2 0 1 0 0 -50 0 -10 N
+P 2 0 1 0 50 -100 50 -60 N
+P 2 0 1 0 170 -100 50 -100 N
+P 2 1 1 0 -170 100 -50 100 N
+P 2 1 1 0 -80 140 80 140 N
+P 2 1 1 0 -60 150 60 150 N
+P 2 1 1 0 -50 100 -50 140 N
+P 2 1 1 0 0 150 0 190 N
+P 2 1 1 0 50 100 50 140 N
+P 2 1 1 0 170 100 50 100 N
+X B2 A1 400 -100 100 L 50 50 1 1 B
+X B1 A2 400 100 100 L 50 50 1 1 B
+X GND B1 0 -500 100 U 50 50 1 1 W
+X VCCB B2 100 500 100 D 50 50 1 1 W
+X VCCA C1 -100 500 100 D 50 50 1 1 W
+X OE C2 -400 -300 100 R 50 50 1 1 I
+X A2 D1 -400 -100 100 R 50 50 1 1 B
+X A1 D2 -400 100 100 R 50 50 1 1 B
+ENDDRAW
+ENDDEF
+#
 # TXS0108EPW
 #
 DEF TXS0108EPW U 0 20 Y Y 1 F N

From 9d73005b4faff20e00d26fb3b2944b2e8389cb11 Mon Sep 17 00:00:00 2001
From: Roger Jia Rong Jhang <roger225@gmail.com>
Date: Sun, 14 Apr 2019 01:08:52 +0800
Subject: [PATCH 102/201] fix Footprint filters for TXS0102YZP

---
 Logic_LevelTranslator.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Logic_LevelTranslator.lib b/Logic_LevelTranslator.lib
index 3dd2635c45..0521d011bc 100644
--- a/Logic_LevelTranslator.lib
+++ b/Logic_LevelTranslator.lib
@@ -1027,7 +1027,7 @@ F1 "TXS0102YZP" 150 450 50 H V L CNN
 F2 "Package_BGA:Texas_DSBGA-8_0.9x1.9mm_Layout2x4_P0.5mm" 0 -550 50 H I C CNN
 F3 "" 0 -20 50 H I C CNN
 $FPLIST
- Texas*DSBGA*0.9x1.9mm*Layout2x4*P0.5mm
+ Texas*DSBGA*0.9x1.9mm*Layout2x4*P0.5mm*
 $ENDFPLIST
 DRAW
 S -300 400 300 -400 0 1 10 f

From 51b343e8cdcf30f124b3065972106cd9b60b4805 Mon Sep 17 00:00:00 2001
From: Oskar Wallgren <oskar.wallgren13@gmail.com>
Date: Sat, 13 Apr 2019 20:56:39 +0200
Subject: [PATCH 103/201] THAT2181: Description typo

Description is copied from THAT2180 which is pre-trimmed. This is not the case
for THAT2181.
---
 Amplifier_Audio.dcm | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Amplifier_Audio.dcm b/Amplifier_Audio.dcm
index a06b86e2c4..5514620244 100644
--- a/Amplifier_Audio.dcm
+++ b/Amplifier_Audio.dcm
@@ -445,7 +445,7 @@ F http://www.thatcorp.com/datashts/THAT_2180-Series_Datasheet.pdf
 $ENDCMP
 #
 $CMP THAT2181
-D Blackmer Pre-Trimmed IC Voltage Controlled Amplifiers, SIP-8/SOIC-8
+D Blackmer Trimmable IC Voltage Controlled Amplifiers, SIP-8/SOIC-8
 K audio vca
 F http://www.thatcorp.com/datashts/THAT_2181-Series_Datasheet.pdf
 $ENDCMP

From 15cdf8d083eff7bd2eb9c7f433b2969805249028 Mon Sep 17 00:00:00 2001
From: jstjst <jonas@gappert.de>
Date: Sat, 13 Apr 2019 23:49:39 +0200
Subject: [PATCH 104/201] added ExpressCard connector

---
 Connector.dcm |  6 ++++++
 Connector.lib | 39 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 45 insertions(+)

diff --git a/Connector.dcm b/Connector.dcm
index 3bff6148cc..4af461c193 100644
--- a/Connector.dcm
+++ b/Connector.dcm
@@ -1050,6 +1050,12 @@ K circular DIN connector
 F http://www.mouser.com/ds/2/18/40_c091_abd_e-75918.pdf
 $ENDCMP
 #
+$CMP ExpressCard
+D ExpressCard
+K expresscard pci express
+F https://web.archive.org/web/20180809060653/http://www.usb.org/developers/expresscard/EC_specifications/ExpressCard_2_0_FINAL.pdf
+$ENDCMP
+#
 $CMP HDMI_A
 D HDMI type A connector
 K hdmi conn
diff --git a/Connector.lib b/Connector.lib
index a461bfcc4b..391dbc2c3d 100644
--- a/Connector.lib
+++ b/Connector.lib
@@ -10386,6 +10386,45 @@ X ~ 8 0 -300 100 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
+# ExpressCard
+#
+DEF ExpressCard J 0 20 Y Y 1 F N
+F0 "J" 450 1450 50 H V C CNN
+F1 "ExpressCard" 300 -1450 50 H V C CNN
+F2 "" 200 -2100 50 H I C CNN
+F3 "" 200 -2100 50 H I C CNN
+DRAW
+T 900 -300 0 120 0 0 0 ExpressCard Normal 1 C C
+S -500 1400 500 -1400 0 1 0 f
+X GND 1 0 -1500 100 U 50 50 1 1 w
+X 1V5 10 200 1500 100 D 50 50 1 1 w
+X WAKE# 11 600 -600 100 L 50 50 1 1 I
+X 3V3_AUX 12 0 1500 100 D 50 50 1 1 w
+X PERST# 13 600 -500 100 L 50 50 1 1 O
+X 3V3 14 -200 1500 100 D 50 50 1 1 w
+X 3V3 15 -300 1500 100 D 50 50 1 1 w
+X CLKREQ# 16 600 -300 100 L 50 50 1 1 I
+X CPPE# 17 600 -200 100 L 50 50 1 1 I
+X REFCLK- 18 600 0 100 L 50 50 1 1 O
+X REFCLK+ 19 600 100 100 L 50 50 1 1 O
+X USB_DM 2 600 900 100 L 50 50 1 1 B
+X GND 20 -100 -1500 100 U 50 50 1 1 w
+X PERn0/SSRX- 21 600 300 100 L 50 50 1 1 I
+X PERp0/SSRX+ 22 600 400 100 L 50 50 1 1 I
+X GND 23 -200 -1500 100 U 50 50 1 1 w
+X PETn0/SSTX- 24 600 600 100 L 50 50 1 1 O
+X PETp0/SSTX+ 25 600 700 100 L 50 50 1 1 O
+X GND 26 -300 -1500 100 U 50 50 1 1 w
+X USB_DP 3 600 1000 100 L 50 50 1 1 B
+X CPUSB# 4 600 -900 100 L 50 50 1 1 I
+X USB3# 5 600 -800 100 L 50 50 1 1 B
+X RESERVED 6 600 -1300 100 L 50 50 1 1 N N
+X SMBCLK 7 600 -1200 100 L 50 50 1 1 B
+X SMDDATA 8 600 -1100 100 L 50 50 1 1 B
+X 1V5 9 300 1500 100 D 50 50 1 1 w
+ENDDRAW
+ENDDEF
+#
 # HDMI_A
 #
 DEF HDMI_A J 0 20 Y Y 1 F N

From 196e81c085354cbd304f5e7774743687fb5be7a6 Mon Sep 17 00:00:00 2001
From: jstjst <jonas@gappert.de>
Date: Sun, 14 Apr 2019 00:00:58 +0200
Subject: [PATCH 105/201] fixed issues

---
 Connector.dcm | 2 +-
 Connector.lib | 5 ++++-
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/Connector.dcm b/Connector.dcm
index 4af461c193..68fd318ba4 100644
--- a/Connector.dcm
+++ b/Connector.dcm
@@ -1051,7 +1051,7 @@ F http://www.mouser.com/ds/2/18/40_c091_abd_e-75918.pdf
 $ENDCMP
 #
 $CMP ExpressCard
-D ExpressCard
+D ExpressCard connector
 K expresscard pci express
 F https://web.archive.org/web/20180809060653/http://www.usb.org/developers/expresscard/EC_specifications/ExpressCard_2_0_FINAL.pdf
 $ENDCMP
diff --git a/Connector.lib b/Connector.lib
index 391dbc2c3d..b5e4e44614 100644
--- a/Connector.lib
+++ b/Connector.lib
@@ -10393,9 +10393,12 @@ F0 "J" 450 1450 50 H V C CNN
 F1 "ExpressCard" 300 -1450 50 H V C CNN
 F2 "" 200 -2100 50 H I C CNN
 F3 "" 200 -2100 50 H I C CNN
+$FPLIST
+ ExpressCard*
+$ENDFPLIST
 DRAW
 T 900 -300 0 120 0 0 0 ExpressCard Normal 1 C C
-S -500 1400 500 -1400 0 1 0 f
+S -500 1400 500 -1400 0 1 10 f
 X GND 1 0 -1500 100 U 50 50 1 1 w
 X 1V5 10 200 1500 100 D 50 50 1 1 w
 X WAKE# 11 600 -600 100 L 50 50 1 1 I

From 07183e16c849451a5f42dc3103da77fbe27155f6 Mon Sep 17 00:00:00 2001
From: jstjst <jonas@gappert.de>
Date: Sun, 14 Apr 2019 00:53:08 +0200
Subject: [PATCH 106/201] added TPS2500/2501

---
 Interface_USB.dcm | 12 ++++++++++++
 Interface_USB.lib | 27 +++++++++++++++++++++++++++
 2 files changed, 39 insertions(+)

diff --git a/Interface_USB.dcm b/Interface_USB.dcm
index f1eab7907a..8636b4650e 100644
--- a/Interface_USB.dcm
+++ b/Interface_USB.dcm
@@ -300,6 +300,18 @@ K USB UART Converter
 F http://ww1.microchip.com/downloads/en/DeviceDoc/200022228D.pdf
 $ENDCMP
 #
+$CMP TPS2500
+D Integrated USB power Switch with Boost Converter
+K USB switch boost
+F http://www.ti.com/lit/ds/symlink/tps2500.pdf
+$ENDCMP
+#
+$CMP TPS2501
+D Integrated USB power Switch with Boost Converter
+K USB switch boost
+F http://www.ti.com/lit/ds/symlink/tps2500.pdf
+$ENDCMP
+#
 $CMP TPS2513
 D USB Dedicated Charging Port Controller
 K USB Charge
diff --git a/Interface_USB.lib b/Interface_USB.lib
index d7aa679542..e7429bde88 100644
--- a/Interface_USB.lib
+++ b/Interface_USB.lib
@@ -1540,6 +1540,33 @@ X GP3 9 -900 -200 100 R 50 50 1 1 B
 ENDDRAW
 ENDDEF
 #
+# TPS2500
+#
+DEF TPS2500 U 0 20 Y Y 1 F N
+F0 "U" -350 -450 50 H V C CNN
+F1 "TPS2500" 250 -450 50 H V C CNN
+F2 "Package_SON:Texas_S-PVSON-N10" 0 0 50 H I C CNN
+F3 "" -100 -200 50 H I C CNN
+ALIAS TPS2501
+$FPLIST
+ Package*SON*Texas*S*PVSON*N10*
+$ENDFPLIST
+DRAW
+S -400 400 400 -400 0 1 10 f
+X SW 1 0 500 100 D 50 50 1 1 I
+X AUX 10 500 200 100 L 50 50 1 1 w
+X PAD 11 0 -500 100 U 50 50 1 1 W
+X PGND 2 500 -300 100 L 50 50 1 1 W
+X IN 3 -500 300 100 R 50 50 1 1 W
+X EN 4 -500 200 100 R 50 50 1 1 I
+X GND 5 -500 -300 100 R 50 50 1 1 W
+X ILIM 6 -500 -100 100 R 50 50 1 1 I
+X ENUSB 7 500 100 100 L 50 50 1 1 I
+X ~FAULT 8 500 -100 100 L 50 50 1 1 C
+X USB 9 500 300 100 L 50 50 1 1 w
+ENDDRAW
+ENDDEF
+#
 # TPS2513
 #
 DEF TPS2513 U 0 40 Y Y 1 F N

From 1c87b9ba05de1c5005a3510bb7eddceaa90ebde8 Mon Sep 17 00:00:00 2001
From: John Whitmore <johnfwhitmore@gmail.com>
Date: Sun, 14 Apr 2019 12:20:38 +0100
Subject: [PATCH 107/201] Added symbol for the Vishay H11AA1 Optocoupler

---
 Isolator.dcm |  6 ++++++
 Isolator.lib | 40 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 46 insertions(+)

diff --git a/Isolator.dcm b/Isolator.dcm
index 8b21034a36..c637065a46 100644
--- a/Isolator.dcm
+++ b/Isolator.dcm
@@ -282,6 +282,12 @@ K NPN AC DC Optocoupler
 F http://www.everlight.com/file/ProductFile/EL814.pdf
 $ENDCMP
 #
+$CMP H11AA1
+D AC/DC NPN Optocoupler, DIP-6
+K NPN AC DC Optocoupler
+F https://www.vishay.com/docs/83608/h11aa1.pdf
+$ENDCMP
+#
 $CMP H11L1
 D Schmitt Trigger Output Optocoupler, High Speed, DIP-6, 1.6mA turn on threshold
 K High Speed Schmitt Optocoupler
diff --git a/Isolator.lib b/Isolator.lib
index 441851d977..7b85152b8b 100644
--- a/Isolator.lib
+++ b/Isolator.lib
@@ -1964,6 +1964,46 @@ X ~ 4 300 100 100 L 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
+# H11AA1
+#
+DEF H11AA1 U 0 40 Y Y 1 F N
+F0 "U" -210 195 50 H V L CNN
+F1 "H11AA1" 25 195 50 H V L CNN
+F2 "Package_DIP:DIP-6_W7.62mm" -490 -195 50 H I L CIN
+F3 "" 760 630 50 H I L CNN
+$FPLIST
+ DIP*W7.62mm*
+$ENDFPLIST
+DRAW
+S -200 150 200 -150 1 1 10 f
+P 2 0 1 10 -80 25 -30 25 N
+P 2 0 1 6 -55 -100 -125 -100 N
+P 2 0 1 0 -55 -25 -55 -100 N
+P 2 0 1 0 -55 25 -55 -25 N
+P 2 0 1 0 -55 25 -55 100 N
+P 2 0 1 6 -55 100 -125 100 N
+P 4 0 1 10 -55 25 -80 -25 -30 -25 -55 25 N
+P 2 1 1 10 -150 -25 -100 -25 N
+P 2 1 1 0 105 -55 150 -100 N
+P 2 1 1 0 105 -45 150 0 N
+P 2 1 1 0 150 -100 200 -100 N
+P 2 1 1 0 150 0 200 0 N
+P 3 1 1 14 105 -10 105 -90 105 -90 N
+P 4 1 1 0 -200 -100 -125 -100 -125 100 -200 100 N
+P 4 1 1 10 -125 -25 -150 25 -100 25 -125 -25 N
+P 4 1 1 0 145 -95 135 -75 125 -85 145 -95 N
+P 4 1 1 0 200 100 75 100 75 -50 100 -50 N
+P 5 1 1 0 -5 -20 45 -20 30 -25 30 -15 45 -20 N
+P 5 1 1 0 -5 20 45 20 30 15 30 25 45 20 N
+X ~ 1 -300 100 100 R 50 50 1 1 P
+X ~ 2 -300 -100 100 R 50 50 1 1 P
+X NC 3 -200 0 100 R 50 50 1 1 N N
+X ~ 4 300 -100 100 L 50 50 1 1 P
+X ~ 5 300 0 100 L 50 50 1 1 P
+X ~ 6 300 100 100 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
 # H11L1
 #
 DEF H11L1 U 0 40 Y Y 1 F N

From 842b650bb6cf80f1fae7b9467aad89c453c931ad Mon Sep 17 00:00:00 2001
From: Anton Lysak <antonlysak@gmail.com>
Date: Sun, 14 Apr 2019 20:13:20 +0600
Subject: [PATCH 108/201] Shrunk a little, changed pin length to 150 mil,
 removed 'KEY' pins, changed footprint filter

---
 Connector.lib | 575 +++++++++++++++++++++++++-------------------------
 1 file changed, 284 insertions(+), 291 deletions(-)

diff --git a/Connector.lib b/Connector.lib
index df352be9d6..d8f22ddea0 100644
--- a/Connector.lib
+++ b/Connector.lib
@@ -10827,300 +10827,293 @@ ENDDEF
 # MXM3.0
 #
 DEF MXM3.0 J 0 20 Y Y 1 F N
-F0 "J" 0 50 50 H V C CNN
-F1 "MXM3.0" 0 -50 50 H V C CNN
+F0 "J" 0 100 50 H V C CNN
+F1 "MXM3.0" 0 0 50 H V C CNN
 F2 "" 50 5350 50 H I C CNN
 F3 "" 50 5350 50 H I C CNN
 $FPLIST
- *JAE?MM70?314?310B1*
-$ENDFPLIST
-DRAW
-S -600 5300 600 -5300 1 1 10 f
-X 5V 1 -200 5500 200 D 50 50 1 1 W
-X RSVD 10 800 3200 200 L 50 50 1 1 B
-X GND 100 0 -5500 200 U 50 50 1 1 P N
-X GND 101 0 -5500 200 U 50 50 1 1 P N
-X PEX_TX6# 102 -800 700 200 R 50 50 1 1 I
-X PEX_RX6# 103 -800 3900 200 R 50 50 1 1 O
-X PEX_TX6 104 -800 600 200 R 50 50 1 1 I
-X PEX_RX6 105 -800 3800 200 R 50 50 1 1 O
-X GND 106 0 -5500 200 U 50 50 1 1 P N
-X GND 107 0 -5500 200 U 50 50 1 1 P N
-X PEX_TX5# 108 -800 900 200 R 50 50 1 1 I
-X PEX_RX5# 109 -800 4100 200 R 50 50 1 1 O
-X GND 11 0 -5500 200 U 50 50 1 1 P N
-X PEX_TX5 110 -800 800 200 R 50 50 1 1 I
-X PEX_RX5 111 -800 4000 200 R 50 50 1 1 O
-X GND 112 0 -5500 200 U 50 50 1 1 P N
-X GND 113 0 -5500 200 U 50 50 1 1 P N
-X PEX_TX4# 114 -800 1100 200 R 50 50 1 1 I
-X PEX_RX4# 115 -800 4300 200 R 50 50 1 1 O
-X PEX_TX4 116 -800 1000 200 R 50 50 1 1 I
-X PEX_RX4 117 -800 4200 200 R 50 50 1 1 O
-X GND 118 0 -5500 200 U 50 50 1 1 P N
-X GND 119 0 -5500 200 U 50 50 1 1 P N
-X RSVD 12 800 3100 200 L 50 50 1 1 B
-X PEX_TX3# 120 -800 1300 200 R 50 50 1 1 I
-X PEX_RX3# 121 -800 4500 200 R 50 50 1 1 O
-X PEX_TX3 122 -800 1200 200 R 50 50 1 1 I
-X PEX_RX3 123 -800 4400 200 R 50 50 1 1 O
-X GND 124 0 -5500 200 U 50 50 1 1 P N
-X GND 125 0 -5500 200 U 50 50 1 1 P N
-X KEY 126 800 0 200 L 50 50 1 1 P
-X KEY 127 800 -100 200 L 50 50 1 1 P
-X KEY 128 800 -200 200 L 50 50 1 1 P
-X KEY 129 800 -300 200 L 50 50 1 1 P
-X GND 13 0 -5500 200 U 50 50 1 1 P N
-X KEY 130 800 -400 200 L 50 50 1 1 P
-X KEY 131 800 -500 200 L 50 50 1 1 P
-X KEY 132 800 -600 200 L 50 50 1 1 P
-X GND 133 0 -5500 200 U 50 50 1 1 P N
-X GND 134 0 -5500 200 U 50 50 1 1 P N
-X PEX_RX2# 135 -800 4700 200 R 50 50 1 1 O
-X PEX_TX2# 136 -800 1500 200 R 50 50 1 1 I
-X PEX_RX2 137 -800 4600 200 R 50 50 1 1 O
-X PEX_TX2 138 -800 1400 200 R 50 50 1 1 I
-X GND 139 0 -5500 200 U 50 50 1 1 P N
-X RSVD 14 800 3000 200 L 50 50 1 1 B
-X GND 140 0 -5500 200 U 50 50 1 1 P N
-X PEX_RX1# 141 -800 4900 200 R 50 50 1 1 O
-X PEX_TX1# 142 -800 1700 200 R 50 50 1 1 I
-X PEX_RX1 143 -800 4800 200 R 50 50 1 1 O
-X PEX_TX1 144 -800 1600 200 R 50 50 1 1 I
-X GND 145 0 -5500 200 U 50 50 1 1 P N
-X GND 146 0 -5500 200 U 50 50 1 1 P N
-X PEX_RX0# 147 -800 5100 200 R 50 50 1 1 O
-X PEX_TX0# 148 -800 1900 200 R 50 50 1 1 I
-X PEX_RX0 149 -800 5000 200 R 50 50 1 1 O
-X GND 15 0 -5500 200 U 50 50 1 1 P N
-X PEX_TX0 150 -800 1800 200 R 50 50 1 1 I
-X GND 151 0 -5500 200 U 50 50 1 1 P N
-X GND 152 0 -5500 200 U 50 50 1 1 P N
-X PEX_REFCLK# 153 -800 -1300 200 R 50 50 1 1 I
-X PEX_CLK_REQ# 154 -800 -1600 200 R 50 50 1 1 O
-X PEX_REFCLK 155 -800 -1400 200 R 50 50 1 1 I
-X PEX_RST# 156 -800 -1700 200 R 50 50 1 1 I
-X GND 157 0 -5500 200 U 50 50 1 1 P N
-X VGA_DDC_DAT 158 800 4500 200 L 50 50 1 1 B
-X RSVD 159 800 2500 200 L 50 50 1 1 B
-X RSVD 16 800 2900 200 L 50 50 1 1 B
-X VGA_DDC_CLK 160 800 4600 200 L 50 50 1 1 O
-X RSVD 161 800 2400 200 L 50 50 1 1 B
-X VGA_VSYNC 162 800 4800 200 L 50 50 1 1 O
-X RSVD 163 800 2300 200 L 50 50 1 1 B
-X VGA_HSYNC 164 800 4700 200 L 50 50 1 1 O
-X RSVD 165 800 2200 200 L 50 50 1 1 B
-X GND 166 0 -5500 200 U 50 50 1 1 P N
-X RSVD 167 800 2100 200 L 50 50 1 1 B
-X VGA_RED 168 800 5100 200 L 50 50 1 1 O
-X LVDS_UCLK# 169 -800 -2000 200 R 50 50 1 1 O
-X GND 17 0 -5500 200 U 50 50 1 1 P N
-X VGA_GREEN 170 800 5000 200 L 50 50 1 1 O
-X LVDS_UCLK 171 -800 -2100 200 R 50 50 1 1 O
-X VGA_BLUE 172 800 4900 200 L 50 50 1 1 O
-X GND 173 0 -5500 200 U 50 50 1 1 P N
-X GND 174 0 -5500 200 U 50 50 1 1 P N
-X LVDS_UTX3# 175 -800 -2200 200 R 50 50 1 1 O
-X LVDS_LCLK# 176 -800 -3200 200 R 50 50 1 1 O
-X LVDS_UTX3 177 -800 -2300 200 R 50 50 1 1 O
-X LVDS_LCLK 178 -800 -3300 200 R 50 50 1 1 O
-X GND 179 0 -5500 200 U 50 50 1 1 P N
-X PWR_LEVEL 18 -800 -4800 200 R 50 50 1 1 I
-X GND 180 0 -5500 200 U 50 50 1 1 P N
-X LVDS_UTX2# 181 -800 -2400 200 R 50 50 1 1 O
-X LVDS_LTX3# 182 -800 -3400 200 R 50 50 1 1 O
-X LVDS_UTX2 183 -800 -2500 200 R 50 50 1 1 O
-X LVDS_LTX3 184 -800 -3500 200 R 50 50 1 1 O
-X GND 185 0 -5500 200 U 50 50 1 1 P N
-X GND 186 0 -5500 200 U 50 50 1 1 P N
-X LVDS_UTX1# 187 -800 -2600 200 R 50 50 1 1 O
-X LVDS_LTX2# 188 -800 -3600 200 R 50 50 1 1 O
-X LVDS_UTX1 189 -800 -2700 200 R 50 50 1 1 O
-X PEX_STD_SW# 19 -800 -1500 200 R 50 50 1 1 I
-X LVDS_LTX2 190 -800 -3700 200 R 50 50 1 1 O
-X GND 191 0 -5500 200 U 50 50 1 1 P N
-X GND 192 0 -5500 200 U 50 50 1 1 P N
-X LVDS_UTX0# 193 -800 -2800 200 R 50 50 1 1 O
-X LVDS_LTX1# 194 -800 -3800 200 R 50 50 1 1 O
-X LVDS_UTX0 195 -800 -2900 200 R 50 50 1 1 O
-X LVDS_LTX1 196 -800 -3900 200 R 50 50 1 1 O
-X GND 197 0 -5500 200 U 50 50 1 1 P N
-X GND 198 0 -5500 200 U 50 50 1 1 P N
-X DP_C_L0# 199 800 -3000 200 L 50 50 1 1 O
-X PRSNT_R# 2 800 3600 200 L 50 50 1 1 O
-X TH_OVERT# 20 -800 -4500 200 R 50 50 1 1 O
-X LVDS_LTX0# 200 -800 -4000 200 R 50 50 1 1 O
-X DP_C_L0 201 800 -3100 200 L 50 50 1 1 O
-X LVDS_LTX0 202 -800 -4100 200 R 50 50 1 1 O
-X GND 203 0 -5500 200 U 50 50 1 1 P N
-X GND 204 0 -5500 200 U 50 50 1 1 P N
-X DP_C_L1# 205 800 -3200 200 L 50 50 1 1 O
-X DP_D_L0# 206 800 -4100 200 L 50 50 1 1 O
-X DP_C_L1 207 800 -3300 200 L 50 50 1 1 O
-X DP_D_L0 208 800 -4200 200 L 50 50 1 1 O
-X GND 209 0 -5500 200 U 50 50 1 1 P N
-X VGA_DISABLE# 21 800 4300 200 L 50 50 1 1 I
-X GND 210 0 -5500 200 U 50 50 1 1 P N
-X DP_C_L2# 211 800 -3400 200 L 50 50 1 1 O
-X DP_D_L1# 212 800 -4300 200 L 50 50 1 1 O
-X DP_C_L2 213 800 -3500 200 L 50 50 1 1 O
-X DP_D_L1 214 800 -4400 200 L 50 50 1 1 O
-X GND 215 0 -5500 200 U 50 50 1 1 P N
-X GND 216 0 -5500 200 U 50 50 1 1 P N
-X DP_C_L3# 217 800 -3600 200 L 50 50 1 1 O
-X DP_D_L2# 218 800 -4500 200 L 50 50 1 1 O
-X DP_C_L3 219 800 -3700 200 L 50 50 1 1 O
-X TH_ALERT# 22 -800 -4600 200 R 50 50 1 1 B
-X DP_D_L2 220 800 -4600 200 L 50 50 1 1 O
-X GND 221 0 -5500 200 U 50 50 1 1 P N
-X GND 222 0 -5500 200 U 50 50 1 1 P N
-X DP_C_AUX# 223 800 -3800 200 L 50 50 1 1 B
-X DP_D_L3# 224 800 -4700 200 L 50 50 1 1 O
-X DP_C_AUX 225 800 -3900 200 L 50 50 1 1 B
-X DP_D_L3 226 800 -4800 200 L 50 50 1 1 O
-X RSVD 227 800 2000 200 L 50 50 1 1 B
-X GND 228 0 -5500 200 U 50 50 1 1 P N
-X RSVD 229 800 1900 200 L 50 50 1 1 B
-X PNL_PWR_EN 23 800 4200 200 L 50 50 1 1 O
-X DP_D_AUX# 230 800 -4900 200 L 50 50 1 1 B
-X RSVD 231 800 1800 200 L 50 50 1 1 B
-X DP_D_AUX 232 800 -5000 200 L 50 50 1 1 B
-X RSVD 233 800 1700 200 L 50 50 1 1 B
-X DP_C_HPD 234 800 -4000 200 L 50 50 1 1 I
-X RSVD 235 800 1600 200 L 50 50 1 1 B
-X DP_D_HPD 236 800 -5100 200 L 50 50 1 1 I
-X RSVD 237 800 1500 200 L 50 50 1 1 B
-X RSVD 238 800 2800 200 L 50 50 1 1 B
-X RSVD 239 800 1400 200 L 50 50 1 1 B
-X TH_PWN 24 -800 -4700 200 R 50 50 1 1 O
-X RSVD 240 800 2700 200 L 50 50 1 1 B
-X RSVD 241 800 1300 200 L 50 50 1 1 B
-X RSVD 242 800 2600 200 L 50 50 1 1 B
-X RSVD 243 800 1200 200 L 50 50 1 1 B
-X GND 244 0 -5500 200 U 50 50 1 1 P N
-X RSVD 245 800 1100 200 L 50 50 1 1 B
-X DP_B_L0# 246 800 -1900 200 L 50 50 1 1 O
-X RSVD 247 800 1000 200 L 50 50 1 1 B
-X DP_B_L0 248 800 -2000 200 L 50 50 1 1 O
-X RSVD 249 800 900 200 L 50 50 1 1 B
-X PNL_BL_EN 25 800 4100 200 L 50 50 1 1 O
-X GND 250 0 -5500 200 U 50 50 1 1 P N
-X GND 251 0 -5500 200 U 50 50 1 1 P N
-X DP_B_L1# 252 800 -2100 200 L 50 50 1 1 O
-X DP_A_L0# 253 800 -800 200 L 50 50 1 1 O
-X DP_B_L1 254 800 -2200 200 L 50 50 1 1 O
-X DP_A_L0 255 800 -900 200 L 50 50 1 1 O
-X GND 256 0 -5500 200 U 50 50 1 1 P N
-X GND 257 0 -5500 200 U 50 50 1 1 P N
-X DP_B_L2# 258 800 -2300 200 L 50 50 1 1 O
-X DP_A_L1# 259 800 -1000 200 L 50 50 1 1 O
-X GPIO0 26 800 3500 200 L 50 50 1 1 B
-X DP_B_L2 260 800 -2400 200 L 50 50 1 1 O
-X DP_A_L1 261 800 -1100 200 L 50 50 1 1 O
-X GND 262 0 -5500 200 U 50 50 1 1 P N
-X GND 263 0 -5500 200 U 50 50 1 1 P N
-X DP_B_L3# 264 800 -2500 200 L 50 50 1 1 O
-X DP_A_L2# 265 800 -1200 200 L 50 50 1 1 O
-X DP_B_L3 266 800 -2600 200 L 50 50 1 1 O
-X DP_A_L2 267 800 -1300 200 L 50 50 1 1 O
-X GND 268 0 -5500 200 U 50 50 1 1 P N
-X GND 269 0 -5500 200 U 50 50 1 1 P N
-X PNL_BL_PWN 27 800 4000 200 L 50 50 1 1 O
-X DP_B_AUX# 270 800 -2700 200 L 50 50 1 1 B
-X DP_A_L3# 271 800 -1400 200 L 50 50 1 1 O
-X DP_B_AUX 272 800 -2800 200 L 50 50 1 1 B
-X DP_A_L3 273 800 -1500 200 L 50 50 1 1 O
-X DP_B_HPD 274 800 -2900 200 L 50 50 1 1 I
-X GND 275 0 -5500 200 U 50 50 1 1 P N
-X DP_A_HPD 276 800 -1800 200 L 50 50 1 1 I
-X DP_A_AUX# 277 800 -1600 200 L 50 50 1 1 B
-X 3V3 278 200 5500 200 D 50 50 1 1 W
-X DP_A_AUX 279 800 -1700 200 L 50 50 1 1 B
-X GPIO1 28 800 3400 200 L 50 50 1 1 B
-X 3V3 280 200 5500 200 D 50 50 1 1 P N
-X PRSNT_L# 281 800 3700 200 L 50 50 1 1 O
-X HDMI_CEC 29 800 3900 200 L 50 50 1 1 B
-X 5V 3 -200 5500 200 D 50 50 1 1 P N
-X GPIO2 30 800 3300 200 L 50 50 1 1 B
-X DVI_HPD 31 -800 -1900 200 R 50 50 1 1 I
-X SMB_DAT 32 -800 -4300 200 R 50 50 1 1 B
-X LVDS_DDC_DAT 33 -800 -3000 200 R 50 50 1 1 B
-X SMB_CLK 34 -800 -4400 200 R 50 50 1 1 I
-X LVDS_DDC_CLK 35 -800 -3100 200 R 50 50 1 1 O
-X GND 36 0 -5500 200 U 50 50 1 1 P N
-X GND 37 0 -5500 200 U 50 50 1 1 P N
-X OEM 38 800 800 200 L 50 50 1 1 B
-X OEM 39 800 700 200 L 50 50 1 1 B
-X WAKE# 4 800 3800 200 L 50 50 1 1 O
-X OEM 40 800 600 200 L 50 50 1 1 B
-X OEM 41 800 400 200 L 50 50 1 1 B
-X OEM 42 800 500 200 L 50 50 1 1 B
-X OEM 43 800 300 200 L 50 50 1 1 B
-X OEM 44 800 200 200 L 50 50 1 1 B
-X OEM 45 800 100 200 L 50 50 1 1 B
-X GND 46 0 -5500 200 U 50 50 1 1 P N
-X GND 47 0 -5500 200 U 50 50 1 1 P N
-X PEX_TX15# 48 -800 -1100 200 R 50 50 1 1 I
-X PEX_RX15# 49 -800 2100 200 R 50 50 1 1 O
-X 5V 5 -200 5500 200 D 50 50 1 1 P N
-X PEX_TX15 50 -800 -1200 200 R 50 50 1 1 I
-X PEX_RX15 51 -800 2000 200 R 50 50 1 1 O
-X GND 52 0 -5500 200 U 50 50 1 1 P N
-X GND 53 0 -5500 200 U 50 50 1 1 P N
-X PEX_TX14# 54 -800 -900 200 R 50 50 1 1 I
-X PEX_RX14# 55 -800 2300 200 R 50 50 1 1 O
-X PEX_TX14 56 -800 -1000 200 R 50 50 1 1 I
-X PEX_RX14 57 -800 2200 200 R 50 50 1 1 O
-X GND 58 0 -5500 200 U 50 50 1 1 P N
-X GND 59 0 -5500 200 U 50 50 1 1 P N
-X PWR_GOOD 6 -800 -4900 200 R 50 50 1 1 O
-X PEX_TX13# 60 -800 -700 200 R 50 50 1 1 I
-X PEX_RX13# 61 -800 2500 200 R 50 50 1 1 O
-X PEX_TX13 62 -800 -800 200 R 50 50 1 1 I
-X PEX_RX13 63 -800 2400 200 R 50 50 1 1 O
-X GND 64 0 -5500 200 U 50 50 1 1 P N
-X GND 65 0 -5500 200 U 50 50 1 1 P N
-X PEX_TX12# 66 -800 -500 200 R 50 50 1 1 I
-X PEX_RX12# 67 -800 2700 200 R 50 50 1 1 O
-X PEX_TX12 68 -800 -600 200 R 50 50 1 1 I
-X PEX_RX12 69 -800 2600 200 R 50 50 1 1 O
-X 5V 7 -200 5500 200 D 50 50 1 1 P N
-X GND 70 0 -5500 200 U 50 50 1 1 P N
-X GND 71 0 -5500 200 U 50 50 1 1 P N
-X PEX_TX11# 72 -800 -300 200 R 50 50 1 1 I
-X PEX_RX11# 73 -800 2900 200 R 50 50 1 1 O
-X PEX_TX11 74 -800 -400 200 R 50 50 1 1 I
-X PEX_RX11 75 -800 2800 200 R 50 50 1 1 O
-X GND 76 0 -5500 200 U 50 50 1 1 P N
-X GND 77 0 -5500 200 U 50 50 1 1 P N
-X PEX_TX10# 78 -800 -100 200 R 50 50 1 1 I
-X PEX_RX10# 79 -800 3100 200 R 50 50 1 1 O
-X PWR_EN 8 -800 -5000 200 R 50 50 1 1 I
-X PEX_TX10 80 -800 -200 200 R 50 50 1 1 I
-X PEX_RX10 81 -800 3000 200 R 50 50 1 1 O
-X GND 82 0 -5500 200 U 50 50 1 1 P N
-X GND 83 0 -5500 200 U 50 50 1 1 P N
-X PEX_TX9# 84 -800 100 200 R 50 50 1 1 I
-X PEX_RX9# 85 -800 3300 200 R 50 50 1 1 O
-X PEX_TX9 86 -800 0 200 R 50 50 1 1 I
-X PEX_RX9 87 -800 3200 200 R 50 50 1 1 O
-X GND 88 0 -5500 200 U 50 50 1 1 P N
-X GND 89 0 -5500 200 U 50 50 1 1 P N
-X 5V 9 -200 5500 200 D 50 50 1 1 P N
-X PEX_TX8# 90 -800 300 200 R 50 50 1 1 I
-X PEX_RX8# 91 -800 3500 200 R 50 50 1 1 O
-X PEX_TX8 92 -800 200 200 R 50 50 1 1 I
-X PEX_RX8 93 -800 3400 200 R 50 50 1 1 O
-X GND 94 0 -5500 200 U 50 50 1 1 P N
-X GND 95 0 -5500 200 U 50 50 1 1 P N
-X PEX_TX7# 96 -800 500 200 R 50 50 1 1 I
-X PEX_RX7# 97 -800 3700 200 R 50 50 1 1 O
-X PEX_TX7 98 -800 400 200 R 50 50 1 1 I
-X PEX_RX7 99 -800 3600 200 R 50 50 1 1 O
-X PWR_SRC E1 0 5500 200 D 50 50 1 1 W
-X PWR_SRC E2 0 5500 200 D 50 50 1 1 P N
-X GND E3 0 -5500 200 U 50 50 1 1 W
-X GND E4 0 -5500 200 U 50 50 1 1 P N
+ *MM70*
+$ENDFPLIST
+DRAW
+S -550 5250 550 -5250 1 1 10 f
+X 5V 1 -100 5400 150 D 50 50 1 1 W
+X RSVD 10 700 3200 150 L 50 50 1 1 B
+X GND 100 0 -5400 150 U 50 50 1 1 P N
+X GND 101 0 -5400 150 U 50 50 1 1 P N
+X PEX_TX6# 102 -700 700 150 R 50 50 1 1 I
+X PEX_RX6# 103 -700 3900 150 R 50 50 1 1 O
+X PEX_TX6 104 -700 600 150 R 50 50 1 1 I
+X PEX_RX6 105 -700 3800 150 R 50 50 1 1 O
+X GND 106 0 -5400 150 U 50 50 1 1 P N
+X GND 107 0 -5400 150 U 50 50 1 1 P N
+X PEX_TX5# 108 -700 900 150 R 50 50 1 1 I
+X PEX_RX5# 109 -700 4100 150 R 50 50 1 1 O
+X GND 11 0 -5400 150 U 50 50 1 1 P N
+X PEX_TX5 110 -700 800 150 R 50 50 1 1 I
+X PEX_RX5 111 -700 4000 150 R 50 50 1 1 O
+X GND 112 0 -5400 150 U 50 50 1 1 P N
+X GND 113 0 -5400 150 U 50 50 1 1 P N
+X PEX_TX4# 114 -700 1100 150 R 50 50 1 1 I
+X PEX_RX4# 115 -700 4300 150 R 50 50 1 1 O
+X PEX_TX4 116 -700 1000 150 R 50 50 1 1 I
+X PEX_RX4 117 -700 4200 150 R 50 50 1 1 O
+X GND 118 0 -5400 150 U 50 50 1 1 P N
+X GND 119 0 -5400 150 U 50 50 1 1 P N
+X RSVD 12 700 3100 150 L 50 50 1 1 B
+X PEX_TX3# 120 -700 1300 150 R 50 50 1 1 I
+X PEX_RX3# 121 -700 4500 150 R 50 50 1 1 O
+X PEX_TX3 122 -700 1200 150 R 50 50 1 1 I
+X PEX_RX3 123 -700 4400 150 R 50 50 1 1 O
+X GND 124 0 -5400 150 U 50 50 1 1 P N
+X GND 125 0 -5400 150 U 50 50 1 1 P N
+X GND 13 0 -5400 150 U 50 50 1 1 P N
+X GND 133 0 -5400 150 U 50 50 1 1 P N
+X GND 134 0 -5400 150 U 50 50 1 1 P N
+X PEX_RX2# 135 -700 4700 150 R 50 50 1 1 O
+X PEX_TX2# 136 -700 1500 150 R 50 50 1 1 I
+X PEX_RX2 137 -700 4600 150 R 50 50 1 1 O
+X PEX_TX2 138 -700 1400 150 R 50 50 1 1 I
+X GND 139 0 -5400 150 U 50 50 1 1 P N
+X RSVD 14 700 3000 150 L 50 50 1 1 B
+X GND 140 0 -5400 150 U 50 50 1 1 P N
+X PEX_RX1# 141 -700 4900 150 R 50 50 1 1 O
+X PEX_TX1# 142 -700 1700 150 R 50 50 1 1 I
+X PEX_RX1 143 -700 4800 150 R 50 50 1 1 O
+X PEX_TX1 144 -700 1600 150 R 50 50 1 1 I
+X GND 145 0 -5400 150 U 50 50 1 1 P N
+X GND 146 0 -5400 150 U 50 50 1 1 P N
+X PEX_RX0# 147 -700 5100 150 R 50 50 1 1 O
+X PEX_TX0# 148 -700 1900 150 R 50 50 1 1 I
+X PEX_RX0 149 -700 5000 150 R 50 50 1 1 O
+X GND 15 0 -5400 150 U 50 50 1 1 P N
+X PEX_TX0 150 -700 1800 150 R 50 50 1 1 I
+X GND 151 0 -5400 150 U 50 50 1 1 P N
+X GND 152 0 -5400 150 U 50 50 1 1 P N
+X PEX_REFCLK# 153 -700 -1300 150 R 50 50 1 1 I
+X PEX_CLK_REQ# 154 -700 -1600 150 R 50 50 1 1 O
+X PEX_REFCLK 155 -700 -1400 150 R 50 50 1 1 I
+X PEX_RST# 156 -700 -1700 150 R 50 50 1 1 I
+X GND 157 0 -5400 150 U 50 50 1 1 P N
+X VGA_DDC_DAT 158 700 4500 150 L 50 50 1 1 B
+X RSVD 159 700 2500 150 L 50 50 1 1 B
+X RSVD 16 700 2900 150 L 50 50 1 1 B
+X VGA_DDC_CLK 160 700 4600 150 L 50 50 1 1 O
+X RSVD 161 700 2400 150 L 50 50 1 1 B
+X VGA_VSYNC 162 700 4800 150 L 50 50 1 1 O
+X RSVD 163 700 2300 150 L 50 50 1 1 B
+X VGA_HSYNC 164 700 4700 150 L 50 50 1 1 O
+X RSVD 165 700 2200 150 L 50 50 1 1 B
+X GND 166 0 -5400 150 U 50 50 1 1 P N
+X RSVD 167 700 2100 150 L 50 50 1 1 B
+X VGA_RED 168 700 5100 150 L 50 50 1 1 O
+X LVDS_UCLK# 169 -700 -2000 150 R 50 50 1 1 O
+X GND 17 0 -5400 150 U 50 50 1 1 P N
+X VGA_GREEN 170 700 5000 150 L 50 50 1 1 O
+X LVDS_UCLK 171 -700 -2100 150 R 50 50 1 1 O
+X VGA_BLUE 172 700 4900 150 L 50 50 1 1 O
+X GND 173 0 -5400 150 U 50 50 1 1 P N
+X GND 174 0 -5400 150 U 50 50 1 1 P N
+X LVDS_UTX3# 175 -700 -2200 150 R 50 50 1 1 O
+X LVDS_LCLK# 176 -700 -3200 150 R 50 50 1 1 O
+X LVDS_UTX3 177 -700 -2300 150 R 50 50 1 1 O
+X LVDS_LCLK 178 -700 -3300 150 R 50 50 1 1 O
+X GND 179 0 -5400 150 U 50 50 1 1 P N
+X PWR_LEVEL 18 -700 -4800 150 R 50 50 1 1 I
+X GND 180 0 -5400 150 U 50 50 1 1 P N
+X LVDS_UTX2# 181 -700 -2400 150 R 50 50 1 1 O
+X LVDS_LTX3# 182 -700 -3400 150 R 50 50 1 1 O
+X LVDS_UTX2 183 -700 -2500 150 R 50 50 1 1 O
+X LVDS_LTX3 184 -700 -3500 150 R 50 50 1 1 O
+X GND 185 0 -5400 150 U 50 50 1 1 P N
+X GND 186 0 -5400 150 U 50 50 1 1 P N
+X LVDS_UTX1# 187 -700 -2600 150 R 50 50 1 1 O
+X LVDS_LTX2# 188 -700 -3600 150 R 50 50 1 1 O
+X LVDS_UTX1 189 -700 -2700 150 R 50 50 1 1 O
+X PEX_STD_SW# 19 -700 -1500 150 R 50 50 1 1 I
+X LVDS_LTX2 190 -700 -3700 150 R 50 50 1 1 O
+X GND 191 0 -5400 150 U 50 50 1 1 P N
+X GND 192 0 -5400 150 U 50 50 1 1 P N
+X LVDS_UTX0# 193 -700 -2800 150 R 50 50 1 1 O
+X LVDS_LTX1# 194 -700 -3800 150 R 50 50 1 1 O
+X LVDS_UTX0 195 -700 -2900 150 R 50 50 1 1 O
+X LVDS_LTX1 196 -700 -3900 150 R 50 50 1 1 O
+X GND 197 0 -5400 150 U 50 50 1 1 P N
+X GND 198 0 -5400 150 U 50 50 1 1 P N
+X DP_C_L0# 199 700 -3000 150 L 50 50 1 1 O
+X PRSNT_R# 2 700 3600 150 L 50 50 1 1 O
+X TH_OVERT# 20 -700 -4500 150 R 50 50 1 1 O
+X LVDS_LTX0# 200 -700 -4000 150 R 50 50 1 1 O
+X DP_C_L0 201 700 -3100 150 L 50 50 1 1 O
+X LVDS_LTX0 202 -700 -4100 150 R 50 50 1 1 O
+X GND 203 0 -5400 150 U 50 50 1 1 P N
+X GND 204 0 -5400 150 U 50 50 1 1 P N
+X DP_C_L1# 205 700 -3200 150 L 50 50 1 1 O
+X DP_D_L0# 206 700 -4100 150 L 50 50 1 1 O
+X DP_C_L1 207 700 -3300 150 L 50 50 1 1 O
+X DP_D_L0 208 700 -4200 150 L 50 50 1 1 O
+X GND 209 0 -5400 150 U 50 50 1 1 P N
+X VGA_DISABLE# 21 700 4300 150 L 50 50 1 1 I
+X GND 210 0 -5400 150 U 50 50 1 1 P N
+X DP_C_L2# 211 700 -3400 150 L 50 50 1 1 O
+X DP_D_L1# 212 700 -4300 150 L 50 50 1 1 O
+X DP_C_L2 213 700 -3500 150 L 50 50 1 1 O
+X DP_D_L1 214 700 -4400 150 L 50 50 1 1 O
+X GND 215 0 -5400 150 U 50 50 1 1 P N
+X GND 216 0 -5400 150 U 50 50 1 1 P N
+X DP_C_L3# 217 700 -3600 150 L 50 50 1 1 O
+X DP_D_L2# 218 700 -4500 150 L 50 50 1 1 O
+X DP_C_L3 219 700 -3700 150 L 50 50 1 1 O
+X TH_ALERT# 22 -700 -4600 150 R 50 50 1 1 B
+X DP_D_L2 220 700 -4600 150 L 50 50 1 1 O
+X GND 221 0 -5400 150 U 50 50 1 1 P N
+X GND 222 0 -5400 150 U 50 50 1 1 P N
+X DP_C_AUX# 223 700 -3800 150 L 50 50 1 1 B
+X DP_D_L3# 224 700 -4700 150 L 50 50 1 1 O
+X DP_C_AUX 225 700 -3900 150 L 50 50 1 1 B
+X DP_D_L3 226 700 -4800 150 L 50 50 1 1 O
+X RSVD 227 700 2000 150 L 50 50 1 1 B
+X GND 228 0 -5400 150 U 50 50 1 1 P N
+X RSVD 229 700 1900 150 L 50 50 1 1 B
+X PNL_PWR_EN 23 700 4200 150 L 50 50 1 1 O
+X DP_D_AUX# 230 700 -4900 150 L 50 50 1 1 B
+X RSVD 231 700 1800 150 L 50 50 1 1 B
+X DP_D_AUX 232 700 -5000 150 L 50 50 1 1 B
+X RSVD 233 700 1700 150 L 50 50 1 1 B
+X DP_C_HPD 234 700 -4000 150 L 50 50 1 1 I
+X RSVD 235 700 1600 150 L 50 50 1 1 B
+X DP_D_HPD 236 700 -5100 150 L 50 50 1 1 I
+X RSVD 237 700 1500 150 L 50 50 1 1 B
+X RSVD 238 700 2800 150 L 50 50 1 1 B
+X RSVD 239 700 1400 150 L 50 50 1 1 B
+X TH_PWN 24 -700 -4700 150 R 50 50 1 1 O
+X RSVD 240 700 2700 150 L 50 50 1 1 B
+X RSVD 241 700 1300 150 L 50 50 1 1 B
+X RSVD 242 700 2600 150 L 50 50 1 1 B
+X RSVD 243 700 1200 150 L 50 50 1 1 B
+X GND 244 0 -5400 150 U 50 50 1 1 P N
+X RSVD 245 700 1100 150 L 50 50 1 1 B
+X DP_B_L0# 246 700 -1900 150 L 50 50 1 1 O
+X RSVD 247 700 1000 150 L 50 50 1 1 B
+X DP_B_L0 248 700 -2000 150 L 50 50 1 1 O
+X RSVD 249 700 900 150 L 50 50 1 1 B
+X PNL_BL_EN 25 700 4100 150 L 50 50 1 1 O
+X GND 250 0 -5400 150 U 50 50 1 1 P N
+X GND 251 0 -5400 150 U 50 50 1 1 P N
+X DP_B_L1# 252 700 -2100 150 L 50 50 1 1 O
+X DP_A_L0# 253 700 -800 150 L 50 50 1 1 O
+X DP_B_L1 254 700 -2200 150 L 50 50 1 1 O
+X DP_A_L0 255 700 -900 150 L 50 50 1 1 O
+X GND 256 0 -5400 150 U 50 50 1 1 P N
+X GND 257 0 -5400 150 U 50 50 1 1 P N
+X DP_B_L2# 258 700 -2300 150 L 50 50 1 1 O
+X DP_A_L1# 259 700 -1000 150 L 50 50 1 1 O
+X GPIO0 26 700 3500 150 L 50 50 1 1 B
+X DP_B_L2 260 700 -2400 150 L 50 50 1 1 O
+X DP_A_L1 261 700 -1100 150 L 50 50 1 1 O
+X GND 262 0 -5400 150 U 50 50 1 1 P N
+X GND 263 0 -5400 150 U 50 50 1 1 P N
+X DP_B_L3# 264 700 -2500 150 L 50 50 1 1 O
+X DP_A_L2# 265 700 -1200 150 L 50 50 1 1 O
+X DP_B_L3 266 700 -2600 150 L 50 50 1 1 O
+X DP_A_L2 267 700 -1300 150 L 50 50 1 1 O
+X GND 268 0 -5400 150 U 50 50 1 1 P N
+X GND 269 0 -5400 150 U 50 50 1 1 P N
+X PNL_BL_PWN 27 700 4000 150 L 50 50 1 1 O
+X DP_B_AUX# 270 700 -2700 150 L 50 50 1 1 B
+X DP_A_L3# 271 700 -1400 150 L 50 50 1 1 O
+X DP_B_AUX 272 700 -2800 150 L 50 50 1 1 B
+X DP_A_L3 273 700 -1500 150 L 50 50 1 1 O
+X DP_B_HPD 274 700 -2900 150 L 50 50 1 1 I
+X GND 275 0 -5400 150 U 50 50 1 1 P N
+X DP_A_HPD 276 700 -1800 150 L 50 50 1 1 I
+X DP_A_AUX# 277 700 -1600 150 L 50 50 1 1 B
+X 3V3 278 100 5400 150 D 50 50 1 1 W
+X DP_A_AUX 279 700 -1700 150 L 50 50 1 1 B
+X GPIO1 28 700 3400 150 L 50 50 1 1 B
+X 3V3 280 100 5400 150 D 50 50 1 1 P N
+X PRSNT_L# 281 700 3700 150 L 50 50 1 1 O
+X HDMI_CEC 29 700 3900 150 L 50 50 1 1 B
+X 5V 3 -100 5400 150 D 50 50 1 1 P N
+X GPIO2 30 700 3300 150 L 50 50 1 1 B
+X DVI_HPD 31 -700 -1900 150 R 50 50 1 1 I
+X SMB_DAT 32 -700 -4300 150 R 50 50 1 1 B
+X LVDS_DDC_DAT 33 -700 -3000 150 R 50 50 1 1 B
+X SMB_CLK 34 -700 -4400 150 R 50 50 1 1 I
+X LVDS_DDC_CLK 35 -700 -3100 150 R 50 50 1 1 O
+X GND 36 0 -5400 150 U 50 50 1 1 P N
+X GND 37 0 -5400 150 U 50 50 1 1 P N
+X OEM 38 700 800 150 L 50 50 1 1 B
+X OEM 39 700 700 150 L 50 50 1 1 B
+X WAKE# 4 700 3800 150 L 50 50 1 1 O
+X OEM 40 700 600 150 L 50 50 1 1 B
+X OEM 41 700 400 150 L 50 50 1 1 B
+X OEM 42 700 500 150 L 50 50 1 1 B
+X OEM 43 700 300 150 L 50 50 1 1 B
+X OEM 44 700 200 150 L 50 50 1 1 B
+X OEM 45 700 100 150 L 50 50 1 1 B
+X GND 46 0 -5400 150 U 50 50 1 1 P N
+X GND 47 0 -5400 150 U 50 50 1 1 P N
+X PEX_TX15# 48 -700 -1100 150 R 50 50 1 1 I
+X PEX_RX15# 49 -700 2100 150 R 50 50 1 1 O
+X 5V 5 -100 5400 150 D 50 50 1 1 P N
+X PEX_TX15 50 -700 -1200 150 R 50 50 1 1 I
+X PEX_RX15 51 -700 2000 150 R 50 50 1 1 O
+X GND 52 0 -5400 150 U 50 50 1 1 P N
+X GND 53 0 -5400 150 U 50 50 1 1 P N
+X PEX_TX14# 54 -700 -900 150 R 50 50 1 1 I
+X PEX_RX14# 55 -700 2300 150 R 50 50 1 1 O
+X PEX_TX14 56 -700 -1000 150 R 50 50 1 1 I
+X PEX_RX14 57 -700 2200 150 R 50 50 1 1 O
+X GND 58 0 -5400 150 U 50 50 1 1 P N
+X GND 59 0 -5400 150 U 50 50 1 1 P N
+X PWR_GOOD 6 -700 -4900 150 R 50 50 1 1 O
+X PEX_TX13# 60 -700 -700 150 R 50 50 1 1 I
+X PEX_RX13# 61 -700 2500 150 R 50 50 1 1 O
+X PEX_TX13 62 -700 -800 150 R 50 50 1 1 I
+X PEX_RX13 63 -700 2400 150 R 50 50 1 1 O
+X GND 64 0 -5400 150 U 50 50 1 1 P N
+X GND 65 0 -5400 150 U 50 50 1 1 P N
+X PEX_TX12# 66 -700 -500 150 R 50 50 1 1 I
+X PEX_RX12# 67 -700 2700 150 R 50 50 1 1 O
+X PEX_TX12 68 -700 -600 150 R 50 50 1 1 I
+X PEX_RX12 69 -700 2600 150 R 50 50 1 1 O
+X 5V 7 -100 5400 150 D 50 50 1 1 P N
+X GND 70 0 -5400 150 U 50 50 1 1 P N
+X GND 71 0 -5400 150 U 50 50 1 1 P N
+X PEX_TX11# 72 -700 -300 150 R 50 50 1 1 I
+X PEX_RX11# 73 -700 2900 150 R 50 50 1 1 O
+X PEX_TX11 74 -700 -400 150 R 50 50 1 1 I
+X PEX_RX11 75 -700 2800 150 R 50 50 1 1 O
+X GND 76 0 -5400 150 U 50 50 1 1 P N
+X GND 77 0 -5400 150 U 50 50 1 1 P N
+X PEX_TX10# 78 -700 -100 150 R 50 50 1 1 I
+X PEX_RX10# 79 -700 3100 150 R 50 50 1 1 O
+X PWR_EN 8 -700 -5000 150 R 50 50 1 1 I
+X PEX_TX10 80 -700 -200 150 R 50 50 1 1 I
+X PEX_RX10 81 -700 3000 150 R 50 50 1 1 O
+X GND 82 0 -5400 150 U 50 50 1 1 P N
+X GND 83 0 -5400 150 U 50 50 1 1 P N
+X PEX_TX9# 84 -700 100 150 R 50 50 1 1 I
+X PEX_RX9# 85 -700 3300 150 R 50 50 1 1 O
+X PEX_TX9 86 -700 0 150 R 50 50 1 1 I
+X PEX_RX9 87 -700 3200 150 R 50 50 1 1 O
+X GND 88 0 -5400 150 U 50 50 1 1 P N
+X GND 89 0 -5400 150 U 50 50 1 1 P N
+X 5V 9 -100 5400 150 D 50 50 1 1 P N
+X PEX_TX8# 90 -700 300 150 R 50 50 1 1 I
+X PEX_RX8# 91 -700 3500 150 R 50 50 1 1 O
+X PEX_TX8 92 -700 200 150 R 50 50 1 1 I
+X PEX_RX8 93 -700 3400 150 R 50 50 1 1 O
+X GND 94 0 -5400 150 U 50 50 1 1 P N
+X GND 95 0 -5400 150 U 50 50 1 1 P N
+X PEX_TX7# 96 -700 500 150 R 50 50 1 1 I
+X PEX_RX7# 97 -700 3700 150 R 50 50 1 1 O
+X PEX_TX7 98 -700 400 150 R 50 50 1 1 I
+X PEX_RX7 99 -700 3600 150 R 50 50 1 1 O
+X PWR_SRC E1 0 5400 150 D 50 50 1 1 W
+X PWR_SRC E2 0 5400 150 D 50 50 1 1 P N
+X GND E3 0 -5400 150 U 50 50 1 1 W
+X GND E4 0 -5400 150 U 50 50 1 1 P N
 ENDDRAW
 ENDDEF
 #

From 95be93f07ee305cd4ecd7adb34c6ba1edb4b7116 Mon Sep 17 00:00:00 2001
From: Anton Lysak <antonlysak@gmail.com>
Date: Sun, 14 Apr 2019 21:05:51 +0600
Subject: [PATCH 109/201] Changed footprint filter, moved power pins

---
 FPGA_Lattice.lib | 202 +++++++++++++++++++++++------------------------
 1 file changed, 101 insertions(+), 101 deletions(-)

diff --git a/FPGA_Lattice.lib b/FPGA_Lattice.lib
index da9622f940..eb97cd8441 100644
--- a/FPGA_Lattice.lib
+++ b/FPGA_Lattice.lib
@@ -4,81 +4,81 @@ EESchema-LIBRARY Version 2.4
 # ICE40HX1K-TQ144
 #
 DEF ICE40HX1K-TQ144 U 0 20 Y Y 5 L N
-F0 "U" 200 1750 50 H V C CNN
-F1 "ICE40HX1K-TQ144" 500 1650 50 H V C CNN
+F0 "U" 250 1800 50 H V C CNN
+F1 "ICE40HX1K-TQ144" 550 1700 50 H V C CNN
 F2 "Package_QFP:TQFP-144_20x20mm_P0.5mm" 0 -1750 50 H I C CNN
 F3 "" -850 1400 50 H I C CNN
 $FPLIST
- TQFP*20x20mm*
+ TQFP*20x20mm*P0.5mm*
 $ENDFPLIST
 DRAW
-S -300 1300 300 -1300 1 1 10 f
-S -300 1500 300 -1500 2 1 10 f
+S -300 1200 300 -1200 1 1 10 f
+S -300 1300 300 -1300 2 1 10 f
 S -400 1200 400 -1200 3 1 10 f
-S -300 1400 300 -1400 4 1 10 f
+S -300 1300 300 -1300 4 1 10 f
 S -400 500 400 -500 5 1 10 f
-X IOT_73 112 -500 1000 200 R 50 50 1 1 B
-X IOT_74 113 -500 900 200 R 50 50 1 1 B
-X IOT_75 114 -500 800 200 R 50 50 1 1 B
-X IOT_76 115 -500 700 200 R 50 50 1 1 B
-X IOT_77 116 -500 600 200 R 50 50 1 1 B
-X IOT_78 117 -500 500 200 R 50 50 1 1 B
-X IOT_79 118 -500 400 200 R 50 50 1 1 B
-X IOT_80 119 -500 300 200 R 50 50 1 1 B
-X IOT_81 120 -500 200 200 R 50 50 1 1 B
-X IOT_82 121 -500 100 200 R 50 50 1 1 B
-X IOT_83 122 -500 0 200 R 50 50 1 1 B
-X VCCIO_0 123 100 1500 200 D 50 50 1 1 W
-X IOT_84_GBIN1 128 -500 -100 200 R 50 50 1 1 B
-X IOT_85_GBIN0 129 -500 -200 200 R 50 50 1 1 B
-X VCCIO_0 133 100 1500 200 D 50 50 1 1 P N
-X IOT_87 134 -500 -300 200 R 50 50 1 1 B
-X IOT_88 135 -500 -400 200 R 50 50 1 1 B
-X IOT_89 136 -500 -500 200 R 50 50 1 1 B
-X IOT_90 137 -500 -600 200 R 50 50 1 1 B
-X IOT_91 138 -500 -700 200 R 50 50 1 1 B
-X IOT_92 139 -500 -800 200 R 50 50 1 1 B
-X IOT_93 141 -500 -900 200 R 50 50 1 1 B
-X IOT_94 142 -500 -1000 200 R 50 50 1 1 B
-X IOT_95 143 -500 -1100 200 R 50 50 1 1 B
-X IOT_96 144 -500 -1200 200 R 50 50 1 1 B
+X IOT_73 112 -500 1100 200 R 50 50 1 1 B
+X IOT_74 113 -500 1000 200 R 50 50 1 1 B
+X IOT_75 114 -500 900 200 R 50 50 1 1 B
+X IOT_76 115 -500 800 200 R 50 50 1 1 B
+X IOT_77 116 -500 700 200 R 50 50 1 1 B
+X IOT_78 117 -500 600 200 R 50 50 1 1 B
+X IOT_79 118 -500 500 200 R 50 50 1 1 B
+X IOT_80 119 -500 400 200 R 50 50 1 1 B
+X IOT_81 120 -500 300 200 R 50 50 1 1 B
+X IOT_82 121 -500 200 200 R 50 50 1 1 B
+X IOT_83 122 -500 100 200 R 50 50 1 1 B
+X VCCIO_0 123 100 1400 200 D 50 50 1 1 W
+X IOT_84_GBIN1 128 -500 0 200 R 50 50 1 1 B
+X IOT_85_GBIN0 129 -500 -100 200 R 50 50 1 1 B
+X VCCIO_0 133 100 1400 200 D 50 50 1 1 P N
+X IOT_87 134 -500 -200 200 R 50 50 1 1 B
+X IOT_88 135 -500 -300 200 R 50 50 1 1 B
+X IOT_89 136 -500 -400 200 R 50 50 1 1 B
+X IOT_90 137 -500 -500 200 R 50 50 1 1 B
+X IOT_91 138 -500 -600 200 R 50 50 1 1 B
+X IOT_92 139 -500 -700 200 R 50 50 1 1 B
+X IOT_93 141 -500 -800 200 R 50 50 1 1 B
+X IOT_94 142 -500 -900 200 R 50 50 1 1 B
+X IOT_95 143 -500 -1000 200 R 50 50 1 1 B
+X IOT_96 144 -500 -1100 200 R 50 50 1 1 B
 X NC 15 300 400 200 L 50 50 1 1 N N
 X NC 16 300 300 200 L 50 50 1 1 N N
 X NC 17 300 200 200 L 50 50 1 1 N N
-X NC 18 300 100 200 L 50 50 1 1 N N
-X NC 77 300 0 200 L 50 50 1 1 N N
-X VCCIO_1 100 0 1700 200 D 50 50 2 1 P N
-X IOR_67 101 -500 -800 200 R 50 50 2 1 B
-X IOR_68 102 -500 -900 200 R 50 50 2 1 B
-X IOR_69 104 -500 -1000 200 R 50 50 2 1 B
-X IOR_70 105 -500 -1100 200 R 50 50 2 1 B
-X IOR_71 106 -500 -1200 200 R 50 50 2 1 B
-X IOR_72 107 -500 -1300 200 R 50 50 2 1 B
+X NC 18 300 -200 200 L 50 50 1 1 N N
+X NC 77 300 -300 200 L 50 50 1 1 N N
+X VCCIO_1 100 100 1500 200 D 50 50 2 1 P N
+X IOR_67 101 -500 -700 200 R 50 50 2 1 B
+X IOR_68 102 -500 -800 200 R 50 50 2 1 B
+X IOR_69 104 -500 -900 200 R 50 50 2 1 B
+X IOR_70 105 -500 -1000 200 R 50 50 2 1 B
+X IOR_71 106 -500 -1100 200 R 50 50 2 1 B
+X IOR_72 107 -500 -1200 200 R 50 50 2 1 B
 X NC 40 300 400 200 L 50 50 2 1 N N
 X NC 53 300 300 200 L 50 50 2 1 N N
 X NC 54 300 200 200 L 50 50 2 1 N N
-X NC 55 300 100 200 L 50 50 2 1 N N
-X IOR_48 73 -500 1100 200 R 50 50 2 1 B
-X IOR_49 74 -500 1000 200 R 50 50 2 1 B
-X IOR_50 75 -500 900 200 R 50 50 2 1 B
-X IOR_51 76 -500 800 200 R 50 50 2 1 B
-X IOR_52 78 -500 700 200 R 50 50 2 1 B
-X IOR_53 79 -500 600 200 R 50 50 2 1 B
-X IOR_54 80 -500 500 200 R 50 50 2 1 B
-X IOR_55 81 -500 400 200 R 50 50 2 1 B
-X NC 82 300 0 200 L 50 50 2 1 N N
-X IOR_56 87 -500 300 200 R 50 50 2 1 B
-X IOR_57 88 -500 200 200 R 50 50 2 1 B
-X VCCIO_1 89 0 1700 200 D 50 50 2 1 W
-X IOR_58 90 -500 100 200 R 50 50 2 1 B
-X IOR_59 91 -500 0 200 R 50 50 2 1 B
-X IOR_60_GBIN3 93 -500 -100 200 R 50 50 2 1 B
-X IOR_61_GBIN2 94 -500 -200 200 R 50 50 2 1 B
-X IOR_62 95 -500 -300 200 R 50 50 2 1 B
-X IOR_63 96 -500 -400 200 R 50 50 2 1 B
-X IOR_64 97 -500 -500 200 R 50 50 2 1 B
-X IOR_65 98 -500 -600 200 R 50 50 2 1 B
-X IOR_66 99 -500 -700 200 R 50 50 2 1 B
+X NC 55 300 -200 200 L 50 50 2 1 N N
+X IOR_48 73 -500 1200 200 R 50 50 2 1 B
+X IOR_49 74 -500 1100 200 R 50 50 2 1 B
+X IOR_50 75 -500 1000 200 R 50 50 2 1 B
+X IOR_51 76 -500 900 200 R 50 50 2 1 B
+X IOR_52 78 -500 800 200 R 50 50 2 1 B
+X IOR_53 79 -500 700 200 R 50 50 2 1 B
+X IOR_54 80 -500 600 200 R 50 50 2 1 B
+X IOR_55 81 -500 500 200 R 50 50 2 1 B
+X NC 82 300 -300 200 L 50 50 2 1 N N
+X IOR_56 87 -500 400 200 R 50 50 2 1 B
+X IOR_57 88 -500 300 200 R 50 50 2 1 B
+X VCCIO_1 89 100 1500 200 D 50 50 2 1 W
+X IOR_58 90 -500 200 200 R 50 50 2 1 B
+X IOR_59 91 -500 100 200 R 50 50 2 1 B
+X IOR_60_GBIN3 93 -500 0 200 R 50 50 2 1 B
+X IOR_61_GBIN2 94 -500 -100 200 R 50 50 2 1 B
+X IOR_62 95 -500 -200 200 R 50 50 2 1 B
+X IOR_63 96 -500 -300 200 R 50 50 2 1 B
+X IOR_64 97 -500 -400 200 R 50 50 2 1 B
+X IOR_65 98 -500 -500 200 R 50 50 2 1 B
+X IOR_66 99 -500 -600 200 R 50 50 2 1 B
 X NC 110 400 100 200 L 50 50 3 1 N N
 X NC 124 400 0 200 L 50 50 3 1 N N
 X IOB_24 37 -600 800 200 R 50 50 3 1 B
@@ -108,58 +108,58 @@ X ~CRESET_B 66 -600 1100 200 R 50 50 3 1 I
 X NC 83 400 400 200 L 50 50 3 1 N N
 X NC 84 400 300 200 L 50 50 3 1 N N
 X NC 85 400 200 200 L 50 50 3 1 N N
-X IOL_1A 1 -500 1000 200 R 50 50 4 1 B
-X IOL_4B 10 -500 300 200 R 50 50 4 1 B
-X IOL_5A 11 -500 200 200 R 50 50 4 1 B
-X IOL_5B 12 -500 100 200 R 50 50 4 1 B
+X IOL_1A 1 -500 1100 200 R 50 50 4 1 B
+X IOL_4B 10 -500 400 200 R 50 50 4 1 B
+X IOL_5A 11 -500 300 200 R 50 50 4 1 B
+X IOL_5B 12 -500 200 200 R 50 50 4 1 B
 X NC 125 300 400 200 L 50 50 4 1 N N
 X NC 126 300 300 200 L 50 50 4 1 N N
 X NC 127 300 200 200 L 50 50 4 1 N N
-X NC 130 300 100 200 L 50 50 4 1 N N
-X NC 131 300 0 200 L 50 50 4 1 N N
-X IOL_6A 19 -500 0 200 R 50 50 4 1 B
-X IOL_1B 2 -500 900 200 R 50 50 4 1 B
-X IOL_6B_GBIN7 20 -500 -100 200 R 50 50 4 1 B
-X IOL_7A_GBIN6 21 -500 -200 200 R 50 50 4 1 B
-X IOL_7B 22 -500 -300 200 R 50 50 4 1 B
-X IOL_8A 23 -500 -400 200 R 50 50 4 1 B
-X IOL_8B 24 -500 -500 200 R 50 50 4 1 B
-X IOL_9A 25 -500 -600 200 R 50 50 4 1 B
-X IOL_9B 26 -500 -700 200 R 50 50 4 1 B
-X IOL_10A 28 -500 -800 200 R 50 50 4 1 B
-X IOL_10B 29 -500 -900 200 R 50 50 4 1 B
-X IOL_2A 3 -500 800 200 R 50 50 4 1 B
-X VCCIO_3 30 0 1600 200 D 50 50 4 1 P N
-X IOL_11A 31 -500 -1000 200 R 50 50 4 1 B
-X IOL_11B 32 -500 -1100 200 R 50 50 4 1 B
-X IOL_12A 33 -500 -1200 200 R 50 50 4 1 B
-X IOL_12B 34 -500 -1300 200 R 50 50 4 1 B
-X IOL_2B 4 -500 700 200 R 50 50 4 1 B
-X VCCIO_3 6 0 1600 200 D 50 50 4 1 W
-X IOL_3A 7 -500 600 200 R 50 50 4 1 B
-X IOL_3B 8 -500 500 200 R 50 50 4 1 B
-X IOL_4A 9 -500 400 200 R 50 50 4 1 B
-X GND 103 200 -700 200 U 50 50 5 1 P N
+X NC 130 300 -200 200 L 50 50 4 1 N N
+X NC 131 300 -300 200 L 50 50 4 1 N N
+X IOL_6A 19 -500 100 200 R 50 50 4 1 B
+X IOL_1B 2 -500 1000 200 R 50 50 4 1 B
+X IOL_6B_GBIN7 20 -500 0 200 R 50 50 4 1 B
+X IOL_7A_GBIN6 21 -500 -100 200 R 50 50 4 1 B
+X IOL_7B 22 -500 -200 200 R 50 50 4 1 B
+X IOL_8A 23 -500 -300 200 R 50 50 4 1 B
+X IOL_8B 24 -500 -400 200 R 50 50 4 1 B
+X IOL_9A 25 -500 -500 200 R 50 50 4 1 B
+X IOL_9B 26 -500 -600 200 R 50 50 4 1 B
+X IOL_10A 28 -500 -700 200 R 50 50 4 1 B
+X IOL_10B 29 -500 -800 200 R 50 50 4 1 B
+X IOL_2A 3 -500 900 200 R 50 50 4 1 B
+X VCCIO_3 30 100 1500 200 D 50 50 4 1 P N
+X IOL_11A 31 -500 -900 200 R 50 50 4 1 B
+X IOL_11B 32 -500 -1000 200 R 50 50 4 1 B
+X IOL_12A 33 -500 -1100 200 R 50 50 4 1 B
+X IOL_12B 34 -500 -1200 200 R 50 50 4 1 B
+X IOL_2B 4 -500 800 200 R 50 50 4 1 B
+X VCCIO_3 6 100 1500 200 D 50 50 4 1 W
+X IOL_3A 7 -500 700 200 R 50 50 4 1 B
+X IOL_3B 8 -500 600 200 R 50 50 4 1 B
+X IOL_4A 9 -500 500 200 R 50 50 4 1 B
+X GND 103 100 -700 200 U 50 50 5 1 P N
 X VPP_2V5 108 0 700 200 D 50 50 5 1 W
 X VPP_FAST 109 -100 700 200 D 50 50 5 1 W
 X VCC 111 100 700 200 D 50 50 5 1 P N
-X GND 13 200 -700 200 U 50 50 5 1 P N
-X GND 132 200 -700 200 U 50 50 5 1 P N
-X GND 14 200 -700 200 U 50 50 5 1 P N
-X GND 140 200 -700 200 U 50 50 5 1 P N
+X GND 13 100 -700 200 U 50 50 5 1 P N
+X GND 132 100 -700 200 U 50 50 5 1 P N
+X GND 14 100 -700 200 U 50 50 5 1 P N
+X GND 140 100 -700 200 U 50 50 5 1 P N
 X VCC 27 100 700 200 D 50 50 5 1 W
-X VCCPLL 35 600 200 200 L 50 50 5 1 W
-X GNDPLL 36 600 -100 200 L 50 50 5 1 W
-X GND 5 200 -700 200 U 50 50 5 1 W
+X VCCPLL 35 300 700 200 D 50 50 5 1 W
+X GNDPLL 36 300 -700 200 U 50 50 5 1 W
+X GND 5 100 -700 200 U 50 50 5 1 W
 X VCC 51 100 700 200 D 50 50 5 1 P N
-X GND 59 200 -700 200 U 50 50 5 1 P N
+X GND 59 100 -700 200 U 50 50 5 1 P N
 X IOB_44_SDO 67 -600 0 200 R 50 50 5 1 B
 X IOB_45_SDI 68 -600 -100 200 R 50 50 5 1 B
-X GND 69 200 -700 200 U 50 50 5 1 P N
+X GND 69 100 -700 200 U 50 50 5 1 P N
 X IOB_46_SCK 70 -600 -200 200 R 50 50 5 1 B
 X IOB_47_SS 71 -600 -300 200 R 50 50 5 1 B
 X VCC_SPI 72 -300 700 200 D 50 50 5 1 W
-X GND 86 200 -700 200 U 50 50 5 1 P N
+X GND 86 100 -700 200 U 50 50 5 1 P N
 X VCC 92 100 700 200 D 50 50 5 1 P N
 ENDDRAW
 ENDDEF

From 75be70f6935cf15bd1e40547959b61c203dd908f Mon Sep 17 00:00:00 2001
From: Anton Lysak <antonlysak@gmail.com>
Date: Sun, 14 Apr 2019 21:16:44 +0600
Subject: [PATCH 110/201] Trying to fix centering

---
 FPGA_Lattice.lib | 100 +++++++++++++++++++++++------------------------
 1 file changed, 50 insertions(+), 50 deletions(-)

diff --git a/FPGA_Lattice.lib b/FPGA_Lattice.lib
index eb97cd8441..54412a780b 100644
--- a/FPGA_Lattice.lib
+++ b/FPGA_Lattice.lib
@@ -16,7 +16,7 @@ S -300 1200 300 -1200 1 1 10 f
 S -300 1300 300 -1300 2 1 10 f
 S -400 1200 400 -1200 3 1 10 f
 S -300 1300 300 -1300 4 1 10 f
-S -400 500 400 -500 5 1 10 f
+S -400 600 400 -600 5 1 10 f
 X IOT_73 112 -500 1100 200 R 50 50 1 1 B
 X IOT_74 113 -500 1000 200 R 50 50 1 1 B
 X IOT_75 114 -500 900 200 R 50 50 1 1 B
@@ -45,8 +45,8 @@ X IOT_96 144 -500 -1100 200 R 50 50 1 1 B
 X NC 15 300 400 200 L 50 50 1 1 N N
 X NC 16 300 300 200 L 50 50 1 1 N N
 X NC 17 300 200 200 L 50 50 1 1 N N
-X NC 18 300 -200 200 L 50 50 1 1 N N
-X NC 77 300 -300 200 L 50 50 1 1 N N
+X NC 18 300 -300 200 L 50 50 1 1 N N
+X NC 77 300 -400 200 L 50 50 1 1 N N
 X VCCIO_1 100 100 1500 200 D 50 50 2 1 P N
 X IOR_67 101 -500 -700 200 R 50 50 2 1 B
 X IOR_68 102 -500 -800 200 R 50 50 2 1 B
@@ -57,7 +57,7 @@ X IOR_72 107 -500 -1200 200 R 50 50 2 1 B
 X NC 40 300 400 200 L 50 50 2 1 N N
 X NC 53 300 300 200 L 50 50 2 1 N N
 X NC 54 300 200 200 L 50 50 2 1 N N
-X NC 55 300 -200 200 L 50 50 2 1 N N
+X NC 55 300 -300 200 L 50 50 2 1 N N
 X IOR_48 73 -500 1200 200 R 50 50 2 1 B
 X IOR_49 74 -500 1100 200 R 50 50 2 1 B
 X IOR_50 75 -500 1000 200 R 50 50 2 1 B
@@ -66,7 +66,7 @@ X IOR_52 78 -500 800 200 R 50 50 2 1 B
 X IOR_53 79 -500 700 200 R 50 50 2 1 B
 X IOR_54 80 -500 600 200 R 50 50 2 1 B
 X IOR_55 81 -500 500 200 R 50 50 2 1 B
-X NC 82 300 -300 200 L 50 50 2 1 N N
+X NC 82 300 -400 200 L 50 50 2 1 N N
 X IOR_56 87 -500 400 200 R 50 50 2 1 B
 X IOR_57 88 -500 300 200 R 50 50 2 1 B
 X VCCIO_1 89 100 1500 200 D 50 50 2 1 W
@@ -79,35 +79,35 @@ X IOR_63 96 -500 -300 200 R 50 50 2 1 B
 X IOR_64 97 -500 -400 200 R 50 50 2 1 B
 X IOR_65 98 -500 -500 200 R 50 50 2 1 B
 X IOR_66 99 -500 -600 200 R 50 50 2 1 B
-X NC 110 400 100 200 L 50 50 3 1 N N
-X NC 124 400 0 200 L 50 50 3 1 N N
-X IOB_24 37 -600 800 200 R 50 50 3 1 B
-X IOB_25 38 -600 700 200 R 50 50 3 1 B
-X IOB_26 39 -600 600 200 R 50 50 3 1 B
-X IOB_27 41 -600 500 200 R 50 50 3 1 B
-X IOB_28 42 -600 400 200 R 50 50 3 1 B
-X IOB_29 43 -600 300 200 R 50 50 3 1 B
-X IOB_30 44 -600 200 200 R 50 50 3 1 B
-X IOB_31 45 -600 100 200 R 50 50 3 1 B
+X NC 110 400 -300 200 L 50 50 3 1 N N
+X NC 124 400 -400 200 L 50 50 3 1 N N
+X IOB_24 37 -600 900 200 R 50 50 3 1 B
+X IOB_25 38 -600 800 200 R 50 50 3 1 B
+X IOB_26 39 -600 700 200 R 50 50 3 1 B
+X IOB_27 41 -600 600 200 R 50 50 3 1 B
+X IOB_28 42 -600 500 200 R 50 50 3 1 B
+X IOB_29 43 -600 400 200 R 50 50 3 1 B
+X IOB_30 44 -600 300 200 R 50 50 3 1 B
+X IOB_31 45 -600 200 200 R 50 50 3 1 B
 X VCCIO_2 46 100 1400 200 D 50 50 3 1 W
-X IOB_32 47 -600 0 200 R 50 50 3 1 B
-X IOB_33 48 -600 -100 200 R 50 50 3 1 B
-X IOB_35_GBIN5 49 -600 -200 200 R 50 50 3 1 B
-X IOB_36_GBIN4 50 -600 -300 200 R 50 50 3 1 B
-X IOB_34 52 -600 -400 200 R 50 50 3 1 B
-X IOB_37 56 -600 -500 200 R 50 50 3 1 B
+X IOB_32 47 -600 100 200 R 50 50 3 1 B
+X IOB_33 48 -600 0 200 R 50 50 3 1 B
+X IOB_35_GBIN5 49 -600 -100 200 R 50 50 3 1 B
+X IOB_36_GBIN4 50 -600 -200 200 R 50 50 3 1 B
+X IOB_34 52 -600 -300 200 R 50 50 3 1 B
+X IOB_37 56 -600 -400 200 R 50 50 3 1 B
 X VCCIO_2 57 100 1400 200 D 50 50 3 1 P N
-X IOB_38 58 -600 -600 200 R 50 50 3 1 B
-X IOB_39 60 -600 -700 200 R 50 50 3 1 B
-X IOB_40 61 -600 -800 200 R 50 50 3 1 B
-X IOB_41 62 -600 -900 200 R 50 50 3 1 B
-X IOB_42_CBSEL0 63 -600 -1000 200 R 50 50 3 1 B
-X IOB_43_CBSEL1 64 -600 -1100 200 R 50 50 3 1 B
+X IOB_38 58 -600 -500 200 R 50 50 3 1 B
+X IOB_39 60 -600 -600 200 R 50 50 3 1 B
+X IOB_40 61 -600 -700 200 R 50 50 3 1 B
+X IOB_41 62 -600 -800 200 R 50 50 3 1 B
+X IOB_42_CBSEL0 63 -600 -900 200 R 50 50 3 1 B
+X IOB_43_CBSEL1 64 -600 -1000 200 R 50 50 3 1 B
 X CDONE 65 600 800 200 L 50 50 3 1 C
 X ~CRESET_B 66 -600 1100 200 R 50 50 3 1 I
 X NC 83 400 400 200 L 50 50 3 1 N N
 X NC 84 400 300 200 L 50 50 3 1 N N
-X NC 85 400 200 200 L 50 50 3 1 N N
+X NC 85 400 0 200 L 50 50 3 1 N N
 X IOL_1A 1 -500 1100 200 R 50 50 4 1 B
 X IOL_4B 10 -500 400 200 R 50 50 4 1 B
 X IOL_5A 11 -500 300 200 R 50 50 4 1 B
@@ -139,28 +139,28 @@ X VCCIO_3 6 100 1500 200 D 50 50 4 1 W
 X IOL_3A 7 -500 700 200 R 50 50 4 1 B
 X IOL_3B 8 -500 600 200 R 50 50 4 1 B
 X IOL_4A 9 -500 500 200 R 50 50 4 1 B
-X GND 103 100 -700 200 U 50 50 5 1 P N
-X VPP_2V5 108 0 700 200 D 50 50 5 1 W
-X VPP_FAST 109 -100 700 200 D 50 50 5 1 W
-X VCC 111 100 700 200 D 50 50 5 1 P N
-X GND 13 100 -700 200 U 50 50 5 1 P N
-X GND 132 100 -700 200 U 50 50 5 1 P N
-X GND 14 100 -700 200 U 50 50 5 1 P N
-X GND 140 100 -700 200 U 50 50 5 1 P N
-X VCC 27 100 700 200 D 50 50 5 1 W
-X VCCPLL 35 300 700 200 D 50 50 5 1 W
-X GNDPLL 36 300 -700 200 U 50 50 5 1 W
-X GND 5 100 -700 200 U 50 50 5 1 W
-X VCC 51 100 700 200 D 50 50 5 1 P N
-X GND 59 100 -700 200 U 50 50 5 1 P N
-X IOB_44_SDO 67 -600 0 200 R 50 50 5 1 B
-X IOB_45_SDI 68 -600 -100 200 R 50 50 5 1 B
-X GND 69 100 -700 200 U 50 50 5 1 P N
-X IOB_46_SCK 70 -600 -200 200 R 50 50 5 1 B
-X IOB_47_SS 71 -600 -300 200 R 50 50 5 1 B
-X VCC_SPI 72 -300 700 200 D 50 50 5 1 W
-X GND 86 100 -700 200 U 50 50 5 1 P N
-X VCC 92 100 700 200 D 50 50 5 1 P N
+X GND 103 0 -800 200 U 50 50 5 1 P N
+X VPP_2V5 108 0 800 200 D 50 50 5 1 W
+X VPP_FAST 109 -100 800 200 D 50 50 5 1 W
+X VCC 111 100 800 200 D 50 50 5 1 P N
+X GND 13 0 -800 200 U 50 50 5 1 P N
+X GND 132 0 -800 200 U 50 50 5 1 P N
+X GND 14 0 -800 200 U 50 50 5 1 P N
+X GND 140 0 -800 200 U 50 50 5 1 P N
+X VCC 27 100 800 200 D 50 50 5 1 W
+X VCCPLL 35 300 800 200 D 50 50 5 1 W
+X GNDPLL 36 300 -800 200 U 50 50 5 1 W
+X GND 5 0 -800 200 U 50 50 5 1 W
+X VCC 51 100 800 200 D 50 50 5 1 P N
+X GND 59 0 -800 200 U 50 50 5 1 P N
+X IOB_44_SDO 67 -600 100 200 R 50 50 5 1 B
+X IOB_45_SDI 68 -600 0 200 R 50 50 5 1 B
+X GND 69 0 -800 200 U 50 50 5 1 P N
+X IOB_46_SCK 70 -600 -100 200 R 50 50 5 1 B
+X IOB_47_SS 71 -600 -200 200 R 50 50 5 1 B
+X VCC_SPI 72 -300 800 200 D 50 50 5 1 W
+X GND 86 0 -800 200 U 50 50 5 1 P N
+X VCC 92 100 800 200 D 50 50 5 1 P N
 ENDDRAW
 ENDDEF
 #

From fb60ce0308c86dd5d3e3ba7a303de4d5c837e320 Mon Sep 17 00:00:00 2001
From: Anton Lysak <antonlysak@gmail.com>
Date: Sun, 14 Apr 2019 21:22:41 +0600
Subject: [PATCH 111/201] Shrunk E part

---
 FPGA_Lattice.lib | 46 +++++++++++++++++++++++-----------------------
 1 file changed, 23 insertions(+), 23 deletions(-)

diff --git a/FPGA_Lattice.lib b/FPGA_Lattice.lib
index 54412a780b..e9e36a8dc0 100644
--- a/FPGA_Lattice.lib
+++ b/FPGA_Lattice.lib
@@ -16,7 +16,7 @@ S -300 1200 300 -1200 1 1 10 f
 S -300 1300 300 -1300 2 1 10 f
 S -400 1200 400 -1200 3 1 10 f
 S -300 1300 300 -1300 4 1 10 f
-S -400 600 400 -600 5 1 10 f
+S -400 500 400 -500 5 1 10 f
 X IOT_73 112 -500 1100 200 R 50 50 1 1 B
 X IOT_74 113 -500 1000 200 R 50 50 1 1 B
 X IOT_75 114 -500 900 200 R 50 50 1 1 B
@@ -139,28 +139,28 @@ X VCCIO_3 6 100 1500 200 D 50 50 4 1 W
 X IOL_3A 7 -500 700 200 R 50 50 4 1 B
 X IOL_3B 8 -500 600 200 R 50 50 4 1 B
 X IOL_4A 9 -500 500 200 R 50 50 4 1 B
-X GND 103 0 -800 200 U 50 50 5 1 P N
-X VPP_2V5 108 0 800 200 D 50 50 5 1 W
-X VPP_FAST 109 -100 800 200 D 50 50 5 1 W
-X VCC 111 100 800 200 D 50 50 5 1 P N
-X GND 13 0 -800 200 U 50 50 5 1 P N
-X GND 132 0 -800 200 U 50 50 5 1 P N
-X GND 14 0 -800 200 U 50 50 5 1 P N
-X GND 140 0 -800 200 U 50 50 5 1 P N
-X VCC 27 100 800 200 D 50 50 5 1 W
-X VCCPLL 35 300 800 200 D 50 50 5 1 W
-X GNDPLL 36 300 -800 200 U 50 50 5 1 W
-X GND 5 0 -800 200 U 50 50 5 1 W
-X VCC 51 100 800 200 D 50 50 5 1 P N
-X GND 59 0 -800 200 U 50 50 5 1 P N
-X IOB_44_SDO 67 -600 100 200 R 50 50 5 1 B
-X IOB_45_SDI 68 -600 0 200 R 50 50 5 1 B
-X GND 69 0 -800 200 U 50 50 5 1 P N
-X IOB_46_SCK 70 -600 -100 200 R 50 50 5 1 B
-X IOB_47_SS 71 -600 -200 200 R 50 50 5 1 B
-X VCC_SPI 72 -300 800 200 D 50 50 5 1 W
-X GND 86 0 -800 200 U 50 50 5 1 P N
-X VCC 92 100 800 200 D 50 50 5 1 P N
+X GND 103 100 -700 200 U 50 50 5 1 P N
+X VPP_2V5 108 0 700 200 D 50 50 5 1 W
+X VPP_FAST 109 -100 700 200 D 50 50 5 1 W
+X VCC 111 100 700 200 D 50 50 5 1 P N
+X GND 13 100 -700 200 U 50 50 5 1 P N
+X GND 132 100 -700 200 U 50 50 5 1 P N
+X GND 14 100 -700 200 U 50 50 5 1 P N
+X GND 140 100 -700 200 U 50 50 5 1 P N
+X VCC 27 100 700 200 D 50 50 5 1 W
+X VCCPLL 35 300 700 200 D 50 50 5 1 W
+X GNDPLL 36 300 -700 200 U 50 50 5 1 W
+X GND 5 100 -700 200 U 50 50 5 1 W
+X VCC 51 100 700 200 D 50 50 5 1 P N
+X GND 59 100 -700 200 U 50 50 5 1 P N
+X IOB_44_SDO 67 -600 0 200 R 50 50 5 1 B
+X IOB_45_SDI 68 -600 -100 200 R 50 50 5 1 B
+X GND 69 100 -700 200 U 50 50 5 1 P N
+X IOB_46_SCK 70 -600 -200 200 R 50 50 5 1 B
+X IOB_47_SS 71 -600 -300 200 R 50 50 5 1 B
+X VCC_SPI 72 -300 700 200 D 50 50 5 1 W
+X GND 86 100 -700 200 U 50 50 5 1 P N
+X VCC 92 100 700 200 D 50 50 5 1 P N
 ENDDRAW
 ENDDEF
 #

From 5908f89da2d1568bb1d44305067382b82b0e6073 Mon Sep 17 00:00:00 2001
From: Anton Lysak <antonlysak@gmail.com>
Date: Sun, 14 Apr 2019 21:32:18 +0600
Subject: [PATCH 112/201] Changed F part, fixed pin name position offset, fixed
 footprint filter

---
 MCU_SiFive.lib | 338 ++++++++++++++++++++++++-------------------------
 1 file changed, 169 insertions(+), 169 deletions(-)

diff --git a/MCU_SiFive.lib b/MCU_SiFive.lib
index a8b25b1ac9..1567e4ad95 100644
--- a/MCU_SiFive.lib
+++ b/MCU_SiFive.lib
@@ -67,13 +67,13 @@ ENDDEF
 #
 # FU540-C000
 #
-DEF FU540-C000 U 0 40 Y Y 6 L N
+DEF FU540-C000 U 0 20 Y Y 6 L N
 F0 "U" 0 50 50 H V C CNN
 F1 "FU540-C000" 0 -50 50 H V C CNN
 F2 "Package_BGA:BGA-484_23.0x23.0mm_Layout22x22_P1.0mm" 150 -50 50 H I C CNN
 F3 "" 0 5000 50 H I C CNN
 $FPLIST
- BGA?484*23.0x23.0mm*P1.0mm*
+ BGA*23.0x23.0mm*P1.0mm*
 $ENDFPLIST
 DRAW
 S -900 -1800 900 1800 1 1 10 f
@@ -81,7 +81,7 @@ S -1100 -4850 1100 4850 2 1 10 f
 S -1000 -900 1000 900 3 1 10 f
 S -800 -1500 800 1500 4 1 10 f
 S -900 -1300 900 1300 5 1 10 f
-S -800 -600 800 600 6 1 10 f
+S -800 -700 800 700 6 1 10 f
 X CL_0_B2C_D_2 AA18 -1100 1400 200 R 50 50 1 1 I
 X CL_0_B2C_D_8 AA19 -1100 800 200 R 50 50 1 1 I
 X CL_0_B2C_D_23 AA20 -1100 -700 200 R 50 50 1 1 I
@@ -399,173 +399,173 @@ X PRCI_HFXCLKIN F15 1100 100 200 L 50 50 5 1 I
 X JTAG_TMS F16 1100 700 200 L 50 50 5 1 I
 X PRCI_RSVD7 G13 -1100 100 200 R 50 50 5 1 P
 X PRCI_RSVD8 H13 -1100 0 200 R 50 50 5 1 P
-X VSS A1 0 -800 200 U 50 50 6 1 W
-X VSS A14 0 -800 200 U 50 50 6 1 P N
-X VSS A18 0 -800 200 U 50 50 6 1 P N
-X VSS A2 0 -800 200 U 50 50 6 1 P N
-X VSS A22 0 -800 200 U 50 50 6 1 P N
-X VSS A3 0 -800 200 U 50 50 6 1 P N
-X VSS A9 0 -800 200 U 50 50 6 1 P N
-X VDD AA17 -100 800 200 D 50 50 6 1 W
-X VSS AA2 0 -800 200 U 50 50 6 1 P N
-X VSS AB1 0 -800 200 U 50 50 6 1 P N
-X VSS AB10 0 -800 200 U 50 50 6 1 P N
-X VSS AB13 0 -800 200 U 50 50 6 1 P N
-X VSS AB17 0 -800 200 U 50 50 6 1 P N
-X VSS AB22 0 -800 200 U 50 50 6 1 P N
-X VSS AB4 0 -800 200 U 50 50 6 1 P N
-X VSS AB7 0 -800 200 U 50 50 6 1 P N
-X VDD B14 -100 800 200 D 50 50 6 1 P N
-X VDD B18 -100 800 200 D 50 50 6 1 P N
-X VDD B9 -100 800 200 D 50 50 6 1 P N
-X VSS D1 0 -800 200 U 50 50 6 1 P N
-X VSS D12 0 -800 200 U 50 50 6 1 P N
-X VDD E21 -100 800 200 D 50 50 6 1 P N
-X VSS E22 0 -800 200 U 50 50 6 1 P N
-X VDD E3 -100 800 200 D 50 50 6 1 P N
-X VSS E4 0 -800 200 U 50 50 6 1 P N
-X VSS F7 0 -800 200 U 50 50 6 1 P N
-X VSS G10 0 -800 200 U 50 50 6 1 P N
-X VDD G11 -100 800 200 D 50 50 6 1 P N
-X VSS G12 0 -800 200 U 50 50 6 1 P N
-X OTP_VDD G14 600 800 200 D 50 50 6 1 W
-X VDD G15 -100 800 200 D 50 50 6 1 P N
-X VSS G16 0 -800 200 U 50 50 6 1 P N
-X VSS G2 0 -800 200 U 50 50 6 1 P N
-X VSS G6 0 -800 200 U 50 50 6 1 P N
-X DDR_VDDQ G7 100 800 200 D 50 50 6 1 W
-X VSS G8 0 -800 200 U 50 50 6 1 P N
-X VDD G9 -100 800 200 D 50 50 6 1 P N
-X VDD H10 -100 800 200 D 50 50 6 1 P N
-X GIVSS H11 -500 -800 200 U 50 50 6 1 W
-X VDD H12 -100 800 200 D 50 50 6 1 P N
-X VDD H14 -100 800 200 D 50 50 6 1 P N
-X VSS H15 0 -800 200 U 50 50 6 1 P N
-X VDD H16 -100 800 200 D 50 50 6 1 P N
-X DDR_VDDQ H6 100 800 200 D 50 50 6 1 P N
-X VSS H7 0 -800 200 U 50 50 6 1 P N
-X VDD H8 -100 800 200 D 50 50 6 1 P N
-X VSS H9 0 -800 200 U 50 50 6 1 P N
-X VSS J1 0 -800 200 U 50 50 6 1 P N
-X VSS J10 0 -800 200 U 50 50 6 1 P N
+X VSS A1 -100 -900 200 U 50 50 6 1 W
+X VSS A14 -100 -900 200 U 50 50 6 1 P N
+X VSS A18 -100 -900 200 U 50 50 6 1 P N
+X VSS A2 -100 -900 200 U 50 50 6 1 P N
+X VSS A22 -100 -900 200 U 50 50 6 1 P N
+X VSS A3 -100 -900 200 U 50 50 6 1 P N
+X VSS A9 -100 -900 200 U 50 50 6 1 P N
+X VDD AA17 -100 900 200 D 50 50 6 1 W
+X VSS AA2 -100 -900 200 U 50 50 6 1 P N
+X VSS AB1 -100 -900 200 U 50 50 6 1 P N
+X VSS AB10 -100 -900 200 U 50 50 6 1 P N
+X VSS AB13 -100 -900 200 U 50 50 6 1 P N
+X VSS AB17 -100 -900 200 U 50 50 6 1 P N
+X VSS AB22 -100 -900 200 U 50 50 6 1 P N
+X VSS AB4 -100 -900 200 U 50 50 6 1 P N
+X VSS AB7 -100 -900 200 U 50 50 6 1 P N
+X VDD B14 -100 900 200 D 50 50 6 1 P N
+X VDD B18 -100 900 200 D 50 50 6 1 P N
+X VDD B9 -100 900 200 D 50 50 6 1 P N
+X VSS D1 -100 -900 200 U 50 50 6 1 P N
+X VSS D12 -100 -900 200 U 50 50 6 1 P N
+X VDD E21 -100 900 200 D 50 50 6 1 P N
+X VSS E22 -100 -900 200 U 50 50 6 1 P N
+X VDD E3 -100 900 200 D 50 50 6 1 P N
+X VSS E4 -100 -900 200 U 50 50 6 1 P N
+X VSS F7 -100 -900 200 U 50 50 6 1 P N
+X VSS G10 -100 -900 200 U 50 50 6 1 P N
+X VDD G11 -100 900 200 D 50 50 6 1 P N
+X VSS G12 -100 -900 200 U 50 50 6 1 P N
+X OTP_VDD G14 600 900 200 D 50 50 6 1 W
+X VDD G15 -100 900 200 D 50 50 6 1 P N
+X VSS G16 -100 -900 200 U 50 50 6 1 P N
+X VSS G2 -100 -900 200 U 50 50 6 1 P N
+X VSS G6 -100 -900 200 U 50 50 6 1 P N
+X DDR_VDDQ G7 100 900 200 D 50 50 6 1 W
+X VSS G8 -100 -900 200 U 50 50 6 1 P N
+X VDD G9 -100 900 200 D 50 50 6 1 P N
+X VDD H10 -100 900 200 D 50 50 6 1 P N
+X GIVSS H11 -300 -900 200 U 50 50 6 1 W
+X VDD H12 -100 900 200 D 50 50 6 1 P N
+X VDD H14 -100 900 200 D 50 50 6 1 P N
+X VSS H15 -100 -900 200 U 50 50 6 1 P N
+X VDD H16 -100 900 200 D 50 50 6 1 P N
+X DDR_VDDQ H6 100 900 200 D 50 50 6 1 P N
+X VSS H7 -100 -900 200 U 50 50 6 1 P N
+X VDD H8 -100 900 200 D 50 50 6 1 P N
+X VSS H9 -100 -900 200 U 50 50 6 1 P N
+X VSS J1 -100 -900 200 U 50 50 6 1 P N
+X VSS J10 -100 -900 200 U 50 50 6 1 P N
 X GIVDD J11 -300 800 200 D 50 50 6 1 W
-X GEMGXLPLL_AVSS J12 -600 -800 200 U 50 50 6 1 W
-X DDRPLL_AVSS J13 400 -800 200 U 50 50 6 1 W
-X COREPLL_AVSS J14 600 -800 200 U 50 50 6 1 W
-X VDD J15 -100 800 200 D 50 50 6 1 P N
-X VSS J16 0 -800 200 U 50 50 6 1 P N
-X VSS J22 0 -800 200 U 50 50 6 1 P N
-X VSS J6 0 -800 200 U 50 50 6 1 P N
-X DDR_VDDQ J7 100 800 200 D 50 50 6 1 P N
-X VSS J8 0 -800 200 U 50 50 6 1 P N
-X VDD J9 -100 800 200 D 50 50 6 1 P N
-X VDD K10 -100 800 200 D 50 50 6 1 P N
-X VSS K11 0 -800 200 U 50 50 6 1 P N
-X GEMGXLPLL_AVDD K12 -400 800 200 D 50 50 6 1 W
-X DDRPLL_AVDD K13 400 800 200 D 50 50 6 1 W
-X COREPLL_AVDD K14 700 800 200 D 50 50 6 1 W
-X IVSS K15 -300 -800 200 U 50 50 6 1 W
-X IVDD K16 -600 800 200 D 50 50 6 1 W
-X VDD K21 -100 800 200 D 50 50 6 1 P N
-X DDR_VDDQ K6 100 800 200 D 50 50 6 1 P N
-X VSS K7 0 -800 200 U 50 50 6 1 P N
-X VDD K8 -100 800 200 D 50 50 6 1 P N
-X VSS K9 0 -800 200 U 50 50 6 1 P N
-X VSS L10 0 -800 200 U 50 50 6 1 P N
-X VDD L11 -100 800 200 D 50 50 6 1 P N
-X VSS L12 0 -800 200 U 50 50 6 1 P N
-X VDD L13 -100 800 200 D 50 50 6 1 P N
-X VSS L14 0 -800 200 U 50 50 6 1 P N
-X IVSS L15 -300 -800 200 U 50 50 6 1 P N
-X IVDD L16 -600 800 200 D 50 50 6 1 P N
-X VSS L6 0 -800 200 U 50 50 6 1 P N
-X DDR_VDDQ L7 100 800 200 D 50 50 6 1 P N
-X VSS L8 0 -800 200 U 50 50 6 1 P N
-X DDR_VDDPLL L9 300 800 200 D 50 50 6 1 P N
-X VDD M10 -100 800 200 D 50 50 6 1 P N
-X VSS M11 0 -800 200 U 50 50 6 1 P N
-X VDD M12 -100 800 200 D 50 50 6 1 P N
-X VSS M13 0 -800 200 U 50 50 6 1 P N
-X VDD M14 -100 800 200 D 50 50 6 1 P N
-X IVSS M15 -300 -800 200 U 50 50 6 1 P N
-X IVDD M16 -600 800 200 D 50 50 6 1 P N
-X DDR_VDDQ M6 100 800 200 D 50 50 6 1 P N
-X VSS M7 0 -800 200 U 50 50 6 1 P N
-X VDD M8 -100 800 200 D 50 50 6 1 P N
-X DDR_VDDPLL M9 300 800 200 D 50 50 6 1 W
-X VSS N10 0 -800 200 U 50 50 6 1 P N
-X VDD N11 -100 800 200 D 50 50 6 1 P N
-X VSS N12 0 -800 200 U 50 50 6 1 P N
-X VDD N13 -100 800 200 D 50 50 6 1 P N
-X VSS N14 0 -800 200 U 50 50 6 1 P N
-X IVSS N15 -300 -800 200 U 50 50 6 1 P N
-X IVDD N16 -600 800 200 D 50 50 6 1 P N
-X VSS N6 0 -800 200 U 50 50 6 1 P N
-X DDR_VDDQ N7 100 800 200 D 50 50 6 1 P N
-X VSS N8 0 -800 200 U 50 50 6 1 P N
-X VDD N9 -100 800 200 D 50 50 6 1 P N
-X VSS P1 0 -800 200 U 50 50 6 1 P N
-X VDD P10 -100 800 200 D 50 50 6 1 P N
-X VSS P11 0 -800 200 U 50 50 6 1 P N
-X VDD P12 -100 800 200 D 50 50 6 1 P N
-X VSS P13 0 -800 200 U 50 50 6 1 P N
-X VDD P14 -100 800 200 D 50 50 6 1 P N
-X VSS P15 0 -800 200 U 50 50 6 1 P N
-X VDD P16 -100 800 200 D 50 50 6 1 P N
-X VDD P2 -100 800 200 D 50 50 6 1 P N
-X VDD P21 -100 800 200 D 50 50 6 1 P N
-X VSS P22 0 -800 200 U 50 50 6 1 P N
-X DDR_VDDQ P6 100 800 200 D 50 50 6 1 P N
-X VSS P7 0 -800 200 U 50 50 6 1 P N
-X VDD P8 -100 800 200 D 50 50 6 1 P N
-X VSS P9 0 -800 200 U 50 50 6 1 P N
-X VSS R10 0 -800 200 U 50 50 6 1 P N
-X VDD R11 -100 800 200 D 50 50 6 1 P N
-X VSS R12 0 -800 200 U 50 50 6 1 P N
-X VDD R13 -100 800 200 D 50 50 6 1 P N
-X VSS R14 0 -800 200 U 50 50 6 1 P N
-X VDD R15 -100 800 200 D 50 50 6 1 P N
-X VSS R16 0 -800 200 U 50 50 6 1 P N
-X VSS R6 0 -800 200 U 50 50 6 1 P N
-X DDR_VDDQ R7 100 800 200 D 50 50 6 1 P N
-X VSS R8 0 -800 200 U 50 50 6 1 P N
-X VDD R9 -100 800 200 D 50 50 6 1 P N
-X VDD T10 -100 800 200 D 50 50 6 1 P N
-X VSS T11 0 -800 200 U 50 50 6 1 P N
-X VDD T12 -100 800 200 D 50 50 6 1 P N
-X VSS T13 0 -800 200 U 50 50 6 1 P N
-X VDD T14 -100 800 200 D 50 50 6 1 P N
-X VSS T15 0 -800 200 U 50 50 6 1 P N
-X VDD T16 -100 800 200 D 50 50 6 1 P N
-X VSS T17 0 -800 200 U 50 50 6 1 P N
-X DDR_VDDQ T6 100 800 200 D 50 50 6 1 P N
-X VSS T7 0 -800 200 U 50 50 6 1 P N
-X VDD T8 -100 800 200 D 50 50 6 1 P N
-X VSS T9 0 -800 200 U 50 50 6 1 P N
-X VSS U10 0 -800 200 U 50 50 6 1 P N
-X VDD U11 -100 800 200 D 50 50 6 1 P N
-X VSS U12 0 -800 200 U 50 50 6 1 P N
-X VDD U13 -100 800 200 D 50 50 6 1 P N
-X VSS U14 0 -800 200 U 50 50 6 1 P N
-X VDD U15 -100 800 200 D 50 50 6 1 P N
-X VSS U16 0 -800 200 U 50 50 6 1 P N
-X VSS U6 0 -800 200 U 50 50 6 1 P N
-X DDR_VDDQCK U7 200 800 200 D 50 50 6 1 W
-X VSS U8 0 -800 200 U 50 50 6 1 P N
-X VDD U9 -100 800 200 D 50 50 6 1 P N
-X VSS V1 0 -800 200 U 50 50 6 1 P N
-X VDD V10 -100 800 200 D 50 50 6 1 P N
-X VSS V11 0 -800 200 U 50 50 6 1 P N
-X VDD V12 -100 800 200 D 50 50 6 1 P N
-X VSS V13 0 -800 200 U 50 50 6 1 P N
-X VDD V14 -100 800 200 D 50 50 6 1 P N
-X VSS V15 0 -800 200 U 50 50 6 1 P N
-X VDD V21 -100 800 200 D 50 50 6 1 P N
-X VSS V22 0 -800 200 U 50 50 6 1 P N
-X VDD V6 -100 800 200 D 50 50 6 1 P N
-X VSS V7 0 -800 200 U 50 50 6 1 P N
-X VDD V8 -100 800 200 D 50 50 6 1 P N
-X VSS V9 0 -800 200 U 50 50 6 1 P N
+X GEMGXLPLL_AVSS J12 -400 -900 200 U 50 50 6 1 W
+X DDRPLL_AVSS J13 400 -900 200 U 50 50 6 1 W
+X COREPLL_AVSS J14 700 -900 200 U 50 50 6 1 W
+X VDD J15 -100 900 200 D 50 50 6 1 P N
+X VSS J16 -100 -900 200 U 50 50 6 1 P N
+X VSS J22 -100 -900 200 U 50 50 6 1 P N
+X VSS J6 -100 -900 200 U 50 50 6 1 P N
+X DDR_VDDQ J7 100 900 200 D 50 50 6 1 P N
+X VSS J8 -100 -900 200 U 50 50 6 1 P N
+X VDD J9 -100 900 200 D 50 50 6 1 P N
+X VDD K10 -100 900 200 D 50 50 6 1 P N
+X VSS K11 -100 -900 200 U 50 50 6 1 P N
+X GEMGXLPLL_AVDD K12 -400 900 200 D 50 50 6 1 W
+X DDRPLL_AVDD K13 400 900 200 D 50 50 6 1 W
+X COREPLL_AVDD K14 700 900 200 D 50 50 6 1 W
+X IVSS K15 -600 -900 200 U 50 50 6 1 W
+X IVDD K16 -600 900 200 D 50 50 6 1 W
+X VDD K21 -100 900 200 D 50 50 6 1 P N
+X DDR_VDDQ K6 100 900 200 D 50 50 6 1 P N
+X VSS K7 -100 -900 200 U 50 50 6 1 P N
+X VDD K8 -100 900 200 D 50 50 6 1 P N
+X VSS K9 -100 -900 200 U 50 50 6 1 P N
+X VSS L10 -100 -900 200 U 50 50 6 1 P N
+X VDD L11 -100 900 200 D 50 50 6 1 P N
+X VSS L12 -100 -900 200 U 50 50 6 1 P N
+X VDD L13 -100 900 200 D 50 50 6 1 P N
+X VSS L14 -100 -900 200 U 50 50 6 1 P N
+X IVSS L15 -600 -900 200 U 50 50 6 1 P N
+X IVDD L16 -600 900 200 D 50 50 6 1 P N
+X VSS L6 -100 -900 200 U 50 50 6 1 P N
+X DDR_VDDQ L7 100 900 200 D 50 50 6 1 P N
+X VSS L8 -100 -900 200 U 50 50 6 1 P N
+X DDR_VDDPLL L9 300 900 200 D 50 50 6 1 P N
+X VDD M10 -100 900 200 D 50 50 6 1 P N
+X VSS M11 -100 -900 200 U 50 50 6 1 P N
+X VDD M12 -100 900 200 D 50 50 6 1 P N
+X VSS M13 -100 -900 200 U 50 50 6 1 P N
+X VDD M14 -100 900 200 D 50 50 6 1 P N
+X IVSS M15 -600 -900 200 U 50 50 6 1 P N
+X IVDD M16 -600 900 200 D 50 50 6 1 P N
+X DDR_VDDQ M6 100 900 200 D 50 50 6 1 P N
+X VSS M7 -100 -900 200 U 50 50 6 1 P N
+X VDD M8 -100 900 200 D 50 50 6 1 P N
+X DDR_VDDPLL M9 300 900 200 D 50 50 6 1 W
+X VSS N10 -100 -900 200 U 50 50 6 1 P N
+X VDD N11 -100 900 200 D 50 50 6 1 P N
+X VSS N12 -100 -900 200 U 50 50 6 1 P N
+X VDD N13 -100 900 200 D 50 50 6 1 P N
+X VSS N14 -100 -900 200 U 50 50 6 1 P N
+X IVSS N15 -600 -900 200 U 50 50 6 1 P N
+X IVDD N16 -600 900 200 D 50 50 6 1 P N
+X VSS N6 -100 -900 200 U 50 50 6 1 P N
+X DDR_VDDQ N7 100 900 200 D 50 50 6 1 P N
+X VSS N8 -100 -900 200 U 50 50 6 1 P N
+X VDD N9 -100 900 200 D 50 50 6 1 P N
+X VSS P1 -100 -900 200 U 50 50 6 1 P N
+X VDD P10 -100 900 200 D 50 50 6 1 P N
+X VSS P11 -100 -900 200 U 50 50 6 1 P N
+X VDD P12 -100 900 200 D 50 50 6 1 P N
+X VSS P13 -100 -900 200 U 50 50 6 1 P N
+X VDD P14 -100 900 200 D 50 50 6 1 P N
+X VSS P15 -100 -900 200 U 50 50 6 1 P N
+X VDD P16 -100 900 200 D 50 50 6 1 P N
+X VDD P2 -100 900 200 D 50 50 6 1 P N
+X VDD P21 -100 900 200 D 50 50 6 1 P N
+X VSS P22 -100 -900 200 U 50 50 6 1 P N
+X DDR_VDDQ P6 100 900 200 D 50 50 6 1 P N
+X VSS P7 -100 -900 200 U 50 50 6 1 P N
+X VDD P8 -100 900 200 D 50 50 6 1 P N
+X VSS P9 -100 -900 200 U 50 50 6 1 P N
+X VSS R10 -100 -900 200 U 50 50 6 1 P N
+X VDD R11 -100 900 200 D 50 50 6 1 P N
+X VSS R12 -100 -900 200 U 50 50 6 1 P N
+X VDD R13 -100 900 200 D 50 50 6 1 P N
+X VSS R14 -100 -900 200 U 50 50 6 1 P N
+X VDD R15 -100 900 200 D 50 50 6 1 P N
+X VSS R16 -100 -900 200 U 50 50 6 1 P N
+X VSS R6 -100 -900 200 U 50 50 6 1 P N
+X DDR_VDDQ R7 100 900 200 D 50 50 6 1 P N
+X VSS R8 -100 -900 200 U 50 50 6 1 P N
+X VDD R9 -100 900 200 D 50 50 6 1 P N
+X VDD T10 -100 900 200 D 50 50 6 1 P N
+X VSS T11 -100 -900 200 U 50 50 6 1 P N
+X VDD T12 -100 900 200 D 50 50 6 1 P N
+X VSS T13 -100 -900 200 U 50 50 6 1 P N
+X VDD T14 -100 900 200 D 50 50 6 1 P N
+X VSS T15 -100 -900 200 U 50 50 6 1 P N
+X VDD T16 -100 900 200 D 50 50 6 1 P N
+X VSS T17 -100 -900 200 U 50 50 6 1 P N
+X DDR_VDDQ T6 100 900 200 D 50 50 6 1 P N
+X VSS T7 -100 -900 200 U 50 50 6 1 P N
+X VDD T8 -100 900 200 D 50 50 6 1 P N
+X VSS T9 -100 -900 200 U 50 50 6 1 P N
+X VSS U10 -100 -900 200 U 50 50 6 1 P N
+X VDD U11 -100 900 200 D 50 50 6 1 P N
+X VSS U12 -100 -900 200 U 50 50 6 1 P N
+X VDD U13 -100 900 200 D 50 50 6 1 P N
+X VSS U14 -100 -900 200 U 50 50 6 1 P N
+X VDD U15 -100 900 200 D 50 50 6 1 P N
+X VSS U16 -100 -900 200 U 50 50 6 1 P N
+X VSS U6 -100 -900 200 U 50 50 6 1 P N
+X DDR_VDDQCK U7 200 900 200 D 50 50 6 1 W
+X VSS U8 -100 -900 200 U 50 50 6 1 P N
+X VDD U9 -100 900 200 D 50 50 6 1 P N
+X VSS V1 -100 -900 200 U 50 50 6 1 P N
+X VDD V10 -100 900 200 D 50 50 6 1 P N
+X VSS V11 -100 -900 200 U 50 50 6 1 P N
+X VDD V12 -100 900 200 D 50 50 6 1 P N
+X VSS V13 -100 -900 200 U 50 50 6 1 P N
+X VDD V14 -100 900 200 D 50 50 6 1 P N
+X VSS V15 -100 -900 200 U 50 50 6 1 P N
+X VDD V21 -100 900 200 D 50 50 6 1 P N
+X VSS V22 -100 -900 200 U 50 50 6 1 P N
+X VDD V6 -100 900 200 D 50 50 6 1 P N
+X VSS V7 -100 -900 200 U 50 50 6 1 P N
+X VDD V8 -100 900 200 D 50 50 6 1 P N
+X VSS V9 -100 -900 200 U 50 50 6 1 P N
 ENDDRAW
 ENDDEF
 #

From dcff5605203720137345fb22c0958a75f530ca9d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rene=20P=C3=B6schl?= <poeschlr@gmail.com>
Date: Sun, 14 Apr 2019 18:30:27 +0200
Subject: [PATCH 113/201] Revert "Move CH376 from Memory_Controller to to
 Interface (#1144) (#1176)" (#1747)

This reverts commit e0139d2c66f58797aeb8046865e6acc74251ab02.
---
 Interface.dcm         |  6 ------
 Interface.lib         | 35 -----------------------------------
 Memory_Controller.dcm |  9 +++++++++
 Memory_Controller.lib | 39 +++++++++++++++++++++++++++++++++++++++
 sym-lib-table         |  1 +
 5 files changed, 49 insertions(+), 41 deletions(-)
 create mode 100644 Memory_Controller.dcm
 create mode 100644 Memory_Controller.lib

diff --git a/Interface.dcm b/Interface.dcm
index 735d9f359e..0c1d477d1b 100644
--- a/Interface.dcm
+++ b/Interface.dcm
@@ -123,12 +123,6 @@ K Direct Digital Synthesizer DDS
 F https://www.analog.com/static/imported-files/data_sheets/AD9951.pdf
 $ENDCMP
 #
-$CMP CH376T
-D File Management USB Flash Card SD Interface, SSOP-20
-K USB Mass-Storage SD Card Interface
-F https://www.mpja.com/download/ch376ds1.pdf
-$ENDCMP
-#
 $CMP DS90C124
 D DC-Balanced 24-Bit FPD-Link II Deserializer, TQFP-48
 K DC-Balanced 24-Bit FPD-Link II Deserializer
diff --git a/Interface.lib b/Interface.lib
index a4805e0c30..4f2e752fe0 100644
--- a/Interface.lib
+++ b/Interface.lib
@@ -932,41 +932,6 @@ X OSC/REFCLK 9 -1100 300 150 R 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #
-# CH376T
-#
-DEF CH376T U 0 20 Y Y 1 F N
-F0 "U" -450 800 50 H V L CNN
-F1 "CH376T" 250 800 50 H V L CNN
-F2 "Package_SO:SSOP-20_5.3x7.2mm_P0.65mm" 0 -1000 50 H I C CIN
-F3 "" 0 100 50 H I C CNN
-$FPLIST
- SSOP*5.3x7.2mm*P0.65mm*
-$ENDFPLIST
-DRAW
-S -450 750 450 -750 0 1 10 f
-X ~INT 1 -600 -300 150 R 50 50 1 1 O
-X GND 10 0 -900 150 U 50 50 1 1 W
-X XI 11 600 -300 150 L 50 50 1 1 I
-X XO 12 600 -600 150 L 50 50 1 1 O
-X ~SCS 13 -600 100 150 R 50 50 1 1 I
-X SCK 14 -600 200 150 R 50 50 1 1 I
-X SDI 15 -600 400 150 R 50 50 1 1 I
-X SDO 16 -600 300 150 R 50 50 1 1 T
-X SD_CS 17 600 0 150 L 50 50 1 1 C
-X SD_DO 18 600 200 150 L 50 50 1 1 O
-X SD_CK 19 600 100 150 L 50 50 1 1 O
-X RSTI 2 -600 600 150 R 50 50 1 1 I
-X VCC 20 -100 900 150 D 50 50 1 1 W
-X ~SPI 3 -600 -100 150 R 50 50 1 1 I
-X TXD 4 -600 -600 150 R 50 50 1 1 B
-X RXD 5 -600 -500 150 R 50 50 1 1 I
-X SD_DI 6 600 300 150 L 50 50 1 1 I
-X V3 7 100 900 150 D 50 50 1 1 P
-X UD+ 8 600 600 150 L 50 50 1 1 B
-X UD- 9 600 500 150 L 50 50 1 1 B
-ENDDRAW
-ENDDEF
-#
 # DS90C124
 #
 DEF DS90C124 U 0 40 Y Y 1 F N
diff --git a/Memory_Controller.dcm b/Memory_Controller.dcm
new file mode 100644
index 0000000000..36bdb18450
--- /dev/null
+++ b/Memory_Controller.dcm
@@ -0,0 +1,9 @@
+EESchema-DOCLIB  Version 2.0
+#
+$CMP CH376T
+D File Management USB Flash Card SD Interface, SSOP-20
+K File Management USB Flash Card SD Interface
+F http://iteadstudio.com/store/images/produce/Platform/FPGA/BlackGold/CH376DS1.PDF
+$ENDCMP
+#
+#End Doc Library
diff --git a/Memory_Controller.lib b/Memory_Controller.lib
new file mode 100644
index 0000000000..92efc8208c
--- /dev/null
+++ b/Memory_Controller.lib
@@ -0,0 +1,39 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# CH376T
+#
+DEF CH376T U 0 40 Y Y 1 F N
+F0 "U" -450 800 50 H V L CNN
+F1 "CH376T" 250 800 50 H V L CNN
+F2 "Package_SO:SSOP-20_5.3x7.2mm_P0.65mm" 0 -1000 50 H I C CIN
+F3 "" 0 100 50 H I C CNN
+$FPLIST
+ SSOP*5.3x7.2mm*P0.65mm*
+$ENDFPLIST
+DRAW
+S -450 750 450 -750 0 1 10 f
+X ~INT~ 1 -600 -300 150 R 50 50 1 1 O
+X RSTI 2 -600 600 150 R 50 50 1 1 I
+X ~SPI~ 3 -600 -100 150 R 50 50 1 1 I
+X TXD 4 -600 -600 150 R 50 50 1 1 I
+X RXD 5 -600 -500 150 R 50 50 1 1 B
+X SD_DI 6 600 300 150 L 50 50 1 1 I
+X V3 7 100 900 150 D 50 50 1 1 W
+X UD+ 8 600 600 150 L 50 50 1 1 B
+X UD- 9 600 500 150 L 50 50 1 1 B
+X GND 10 0 -900 150 U 50 50 1 1 W
+X VCC 20 -100 900 150 D 50 50 1 1 W
+X XI 11 600 -300 150 L 50 50 1 1 I
+X XO 12 600 -600 150 L 50 50 1 1 O
+X ~SCS 13 -600 100 150 R 50 50 1 1 I
+X SCK 14 -600 200 150 R 50 50 1 1 I
+X SDI 15 -600 400 150 R 50 50 1 1 I
+X SDO 16 -600 300 150 R 50 50 1 1 O
+X SD_CS 17 600 0 150 L 50 50 1 1 C
+X SD_DO 18 600 200 150 L 50 50 1 1 O
+X SD_CK 19 600 100 150 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/sym-lib-table b/sym-lib-table
index 4cce736abb..4ffdde5429 100644
--- a/sym-lib-table
+++ b/sym-lib-table
@@ -79,6 +79,7 @@
   (lib (name LED)(type Legacy)(uri ${KICAD_SYMBOL_DIR}/LED.lib)(options "")(descr "Light Emitting Diode (LED) symbols"))
   (lib (name Logic_LevelTranslator)(type Legacy)(uri ${KICAD_SYMBOL_DIR}/Logic_LevelTranslator.lib)(options "")(descr "Logic level translators and level shifters"))
   (lib (name Logic_Programmable)(type Legacy)(uri ${KICAD_SYMBOL_DIR}/Logic_Programmable.lib)(options "")(descr "Programmable logic symbols"))
+  (lib (name Memory_Controller)(type Legacy)(uri ${KICAD_SYMBOL_DIR}/Memory_Controller.lib)(options "")(descr "Memory controller devices"))
   (lib (name Memory_EPROM)(type Legacy)(uri ${KICAD_SYMBOL_DIR}/Memory_EPROM.lib)(options "")(descr "EPROM memory"))
   (lib (name Memory_EEPROM)(type Legacy)(uri ${KICAD_SYMBOL_DIR}/Memory_EEPROM.lib)(options "")(descr "EEPROM memory"))
   (lib (name Memory_Flash)(type Legacy)(uri ${KICAD_SYMBOL_DIR}/Memory_Flash.lib)(options "")(descr "Flash memory"))

From fd251bc185070b537d55ab05bd9f30e3232fa115 Mon Sep 17 00:00:00 2001
From: Anton Lysak <antonlysak@gmail.com>
Date: Mon, 15 Apr 2019 02:28:53 +0600
Subject: [PATCH 114/201] Fix GIVDD pin

---
 MCU_SiFive.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/MCU_SiFive.lib b/MCU_SiFive.lib
index da7ca1f076..26be786a59 100644
--- a/MCU_SiFive.lib
+++ b/MCU_SiFive.lib
@@ -448,7 +448,7 @@ X VDD H8 -100 900 200 D 50 50 6 1 P N
 X VSS H9 -100 -900 200 U 50 50 6 1 P N
 X VSS J1 -100 -900 200 U 50 50 6 1 P N
 X VSS J10 -100 -900 200 U 50 50 6 1 P N
-X GIVDD J11 -300 800 200 D 50 50 6 1 W
+X GIVDD J11 -300 900 200 D 50 50 6 1 W
 X GEMGXLPLL_AVSS J12 -400 -900 200 U 50 50 6 1 W
 X DDRPLL_AVSS J13 400 -900 200 U 50 50 6 1 W
 X COREPLL_AVSS J14 700 -900 200 U 50 50 6 1 W

From 53e1aa13ce3d1f2f74bb7dbb3d0bc6a8fb180862 Mon Sep 17 00:00:00 2001
From: jstjst <jonas@gappert.de>
Date: Mon, 15 Apr 2019 00:02:30 +0200
Subject: [PATCH 115/201] fixed review issues

---
 Connector.lib | 42 +++++++++++++++++++++---------------------
 1 file changed, 21 insertions(+), 21 deletions(-)

diff --git a/Connector.lib b/Connector.lib
index b5e4e44614..00357415ca 100644
--- a/Connector.lib
+++ b/Connector.lib
@@ -10397,33 +10397,33 @@ $FPLIST
  ExpressCard*
 $ENDFPLIST
 DRAW
-T 900 -300 0 120 0 0 0 ExpressCard Normal 1 C C
+T 900 -300 0 50 0 0 0 ExpressCard Normal 0 C C
 S -500 1400 500 -1400 0 1 10 f
 X GND 1 0 -1500 100 U 50 50 1 1 w
 X 1V5 10 200 1500 100 D 50 50 1 1 w
-X WAKE# 11 600 -600 100 L 50 50 1 1 I
+X ~WAKE 11 600 -500 100 L 50 50 1 1 I
 X 3V3_AUX 12 0 1500 100 D 50 50 1 1 w
-X PERST# 13 600 -500 100 L 50 50 1 1 O
+X ~PERST 13 600 -400 100 L 50 50 1 1 O
 X 3V3 14 -200 1500 100 D 50 50 1 1 w
 X 3V3 15 -300 1500 100 D 50 50 1 1 w
-X CLKREQ# 16 600 -300 100 L 50 50 1 1 I
-X CPPE# 17 600 -200 100 L 50 50 1 1 I
-X REFCLK- 18 600 0 100 L 50 50 1 1 O
-X REFCLK+ 19 600 100 100 L 50 50 1 1 O
-X USB_DM 2 600 900 100 L 50 50 1 1 B
-X GND 20 -100 -1500 100 U 50 50 1 1 w
-X PERn0/SSRX- 21 600 300 100 L 50 50 1 1 I
-X PERp0/SSRX+ 22 600 400 100 L 50 50 1 1 I
-X GND 23 -200 -1500 100 U 50 50 1 1 w
-X PETn0/SSTX- 24 600 600 100 L 50 50 1 1 O
-X PETp0/SSTX+ 25 600 700 100 L 50 50 1 1 O
-X GND 26 -300 -1500 100 U 50 50 1 1 w
-X USB_DP 3 600 1000 100 L 50 50 1 1 B
-X CPUSB# 4 600 -900 100 L 50 50 1 1 I
-X USB3# 5 600 -800 100 L 50 50 1 1 B
-X RESERVED 6 600 -1300 100 L 50 50 1 1 N N
-X SMBCLK 7 600 -1200 100 L 50 50 1 1 B
-X SMDDATA 8 600 -1100 100 L 50 50 1 1 B
+X ~CLKREQ 16 600 -200 100 L 50 50 1 1 I
+X ~CPPE 17 600 -100 100 L 50 50 1 1 I
+X REFCLK- 18 600 100 100 L 50 50 1 1 O
+X REFCLK+ 19 600 200 100 L 50 50 1 1 O
+X USBD- 2 600 1000 100 L 50 50 1 1 B
+X GND 20 0 -1500 100 U 50 50 1 1 w N
+X PERn0/SSRX- 21 600 400 100 L 50 50 1 1 I
+X PERp0/SSRX+ 22 600 500 100 L 50 50 1 1 I
+X GND 23 0 -1500 100 U 50 50 1 1 w N
+X PETn0/SSTX- 24 600 700 100 L 50 50 1 1 O
+X PETp0/SSTX+ 25 600 800 100 L 50 50 1 1 O
+X GND 26 0 -1500 100 U 50 50 1 1 w N
+X USBD+ 3 600 1100 100 L 50 50 1 1 B
+X ~CPUSB 4 600 -800 100 L 50 50 1 1 I
+X ~USB3 5 600 -700 100 L 50 50 1 1 B
+X RESERVED 6 600 -1300 100 L 50 50 1 1 P
+X SMBCLK 7 600 -1100 100 L 50 50 1 1 O
+X SMDDATA 8 600 -1000 100 L 50 50 1 1 B
 X 1V5 9 300 1500 100 D 50 50 1 1 w
 ENDDRAW
 ENDDEF

From 321334dfab4da9fb030fd2b8a1617c3539e127a5 Mon Sep 17 00:00:00 2001
From: jneiva08 <jneiva08@gmail.com>
Date: Mon, 15 Apr 2019 09:54:52 +0100
Subject: [PATCH 116/201] Add LT3580 DFN and MSOP

---
 Regulator_Switching.dcm | 12 ++++++++++++
 Regulator_Switching.lib | 26 ++++++++++++++++++++++++++
 2 files changed, 38 insertions(+)

diff --git a/Regulator_Switching.dcm b/Regulator_Switching.dcm
index 9e86df9f61..77727499f1 100644
--- a/Regulator_Switching.dcm
+++ b/Regulator_Switching.dcm
@@ -2430,6 +2430,18 @@ K DC/DC converter CCD Bias Boost
 F https://www.analog.com/media/en/technical-documentation/data-sheets/3472f.pdf
 $ENDCMP
 #
+$CMP LT3580EDD
+D Boost/Inverting DC/DC Converter with 2A Switch, Soft-Start, and Synchronization, DFN-8
+K boost inverting dc-dc
+F https://www.analog.com/media/en/technical-documentation/data-sheets/3580fg.pdf
+$ENDCMP
+#
+$CMP LT3580EMS8E
+D Boost/Inverting DC/DC Converter with 2A Switch, Soft-Start, and Synchronization, MSOP-8
+K boost inverting dc-dc
+F https://www.analog.com/media/en/technical-documentation/data-sheets/3580fg.pdf
+$ENDCMP
+#
 $CMP LT3748xMS
 D 100V Isolated Flyback Controller, MSOP-16
 K isolated flyback controller
diff --git a/Regulator_Switching.lib b/Regulator_Switching.lib
index e1f71cbf08..90192db8c3 100644
--- a/Regulator_Switching.lib
+++ b/Regulator_Switching.lib
@@ -2839,6 +2839,32 @@ X SSP 9 -100 -500 100 U 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #
+# LT3580EDD
+#
+DEF LT3580EDD U 0 20 Y Y 1 F N
+F0 "U" -250 450 50 H V C CNN
+F1 "LT3580EDD" 250 450 50 H V C CNN
+F2 "" 0 -450 50 H I C CNN
+F3 "" -1550 -400 50 H I C CNN
+ALIAS LT3580EMS8E
+$FPLIST
+ DFN*1EP*3x3mm*P0.5mm*
+ MSOP*1EP*3x3mm*P0.65mm*
+$ENDFPLIST
+DRAW
+S -300 400 300 -400 0 1 10 f
+X FB 1 400 -100 100 L 50 50 1 1 I
+X VC 2 -400 0 100 R 50 50 1 1 I
+X VIN 3 0 500 100 D 50 50 1 1 W
+X SW 4 400 200 100 L 50 50 1 1 I
+X ~SHDN 5 -400 200 100 R 50 50 1 1 I
+X RT 6 -400 -100 100 R 50 50 1 1 I
+X SS 7 -400 -200 100 R 50 50 1 1 I
+X SYNC 8 400 -200 100 L 50 50 1 1 I
+X GND 9 0 -500 100 U 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
 # LT3748xMS
 #
 DEF LT3748xMS U 0 20 Y Y 1 F N

From 4e1bcda138283d6515603db48436147040213dd0 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Hildo=20Guillardi=20J=C3=BAnior?=
 <hildogjr@users.noreply.github.com>
Date: Mon, 15 Apr 2019 13:16:15 -0300
Subject: [PATCH 117/201] Datasheet MCP9700

---
 Sensor_Temperature.dcm | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Sensor_Temperature.dcm b/Sensor_Temperature.dcm
index c37688ce12..23deb83976 100644
--- a/Sensor_Temperature.dcm
+++ b/Sensor_Temperature.dcm
@@ -339,7 +339,7 @@ $ENDCMP
 $CMP MCP9700AT-ELT
 D Low power, analog thermistor temperature sensor, ±2C accuracy, -40C to +125C, in SC-70-5
 K temperature sensor thermistor
-F http://ww1.microchip.com/downloads/en/DeviceDoc/21942e.pdf
+F http://ww1.microchip.com/downloads/en/DeviceDoc/20001942G.pdf
 $ENDCMP
 #
 $CMP MCP9700AT-ETT

From b034c33a0416a4533852a9b5d2e81eb3feff0577 Mon Sep 17 00:00:00 2001
From: John Whitmore <johnfwhitmore@gmail.com>
Date: Mon, 15 Apr 2019 18:14:01 +0100
Subject: [PATCH 118/201] Added pin 9 for the Exposed pad/Vss

---
 Timer_RTC.lib | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Timer_RTC.lib b/Timer_RTC.lib
index c146e8ea5f..d3b0b37c11 100644
--- a/Timer_RTC.lib
+++ b/Timer_RTC.lib
@@ -313,6 +313,7 @@ X SDA 5 -500 100 100 R 50 50 1 1 B
 X SCL 6 -500 200 100 R 50 50 1 1 I
 X ~INT1~/CLKOUT 7 500 0 100 L 50 50 1 1 C
 X VDD 8 -100 400 100 D 50 50 1 1 W
+X VSS 9 0 -400 100 U 50 50 1 1 P N
 ENDDRAW
 ENDDEF
 #

From e5500304f5e3a5cc4c60cd4063dd61308e1c158e Mon Sep 17 00:00:00 2001
From: Anton Lysak <antonlysak@gmail.com>
Date: Mon, 15 Apr 2019 23:21:35 +0600
Subject: [PATCH 119/201] Pin length changed to 150 mil

---
 FPGA_Lattice.lib | 298 +++++++++++++++++++++++------------------------
 1 file changed, 149 insertions(+), 149 deletions(-)

diff --git a/FPGA_Lattice.lib b/FPGA_Lattice.lib
index e9e36a8dc0..3213f37735 100644
--- a/FPGA_Lattice.lib
+++ b/FPGA_Lattice.lib
@@ -12,155 +12,155 @@ $FPLIST
  TQFP*20x20mm*P0.5mm*
 $ENDFPLIST
 DRAW
-S -300 1200 300 -1200 1 1 10 f
-S -300 1300 300 -1300 2 1 10 f
-S -400 1200 400 -1200 3 1 10 f
-S -300 1300 300 -1300 4 1 10 f
-S -400 500 400 -500 5 1 10 f
-X IOT_73 112 -500 1100 200 R 50 50 1 1 B
-X IOT_74 113 -500 1000 200 R 50 50 1 1 B
-X IOT_75 114 -500 900 200 R 50 50 1 1 B
-X IOT_76 115 -500 800 200 R 50 50 1 1 B
-X IOT_77 116 -500 700 200 R 50 50 1 1 B
-X IOT_78 117 -500 600 200 R 50 50 1 1 B
-X IOT_79 118 -500 500 200 R 50 50 1 1 B
-X IOT_80 119 -500 400 200 R 50 50 1 1 B
-X IOT_81 120 -500 300 200 R 50 50 1 1 B
-X IOT_82 121 -500 200 200 R 50 50 1 1 B
-X IOT_83 122 -500 100 200 R 50 50 1 1 B
-X VCCIO_0 123 100 1400 200 D 50 50 1 1 W
-X IOT_84_GBIN1 128 -500 0 200 R 50 50 1 1 B
-X IOT_85_GBIN0 129 -500 -100 200 R 50 50 1 1 B
-X VCCIO_0 133 100 1400 200 D 50 50 1 1 P N
-X IOT_87 134 -500 -200 200 R 50 50 1 1 B
-X IOT_88 135 -500 -300 200 R 50 50 1 1 B
-X IOT_89 136 -500 -400 200 R 50 50 1 1 B
-X IOT_90 137 -500 -500 200 R 50 50 1 1 B
-X IOT_91 138 -500 -600 200 R 50 50 1 1 B
-X IOT_92 139 -500 -700 200 R 50 50 1 1 B
-X IOT_93 141 -500 -800 200 R 50 50 1 1 B
-X IOT_94 142 -500 -900 200 R 50 50 1 1 B
-X IOT_95 143 -500 -1000 200 R 50 50 1 1 B
-X IOT_96 144 -500 -1100 200 R 50 50 1 1 B
-X NC 15 300 400 200 L 50 50 1 1 N N
-X NC 16 300 300 200 L 50 50 1 1 N N
-X NC 17 300 200 200 L 50 50 1 1 N N
-X NC 18 300 -300 200 L 50 50 1 1 N N
-X NC 77 300 -400 200 L 50 50 1 1 N N
-X VCCIO_1 100 100 1500 200 D 50 50 2 1 P N
-X IOR_67 101 -500 -700 200 R 50 50 2 1 B
-X IOR_68 102 -500 -800 200 R 50 50 2 1 B
-X IOR_69 104 -500 -900 200 R 50 50 2 1 B
-X IOR_70 105 -500 -1000 200 R 50 50 2 1 B
-X IOR_71 106 -500 -1100 200 R 50 50 2 1 B
-X IOR_72 107 -500 -1200 200 R 50 50 2 1 B
-X NC 40 300 400 200 L 50 50 2 1 N N
-X NC 53 300 300 200 L 50 50 2 1 N N
-X NC 54 300 200 200 L 50 50 2 1 N N
-X NC 55 300 -300 200 L 50 50 2 1 N N
-X IOR_48 73 -500 1200 200 R 50 50 2 1 B
-X IOR_49 74 -500 1100 200 R 50 50 2 1 B
-X IOR_50 75 -500 1000 200 R 50 50 2 1 B
-X IOR_51 76 -500 900 200 R 50 50 2 1 B
-X IOR_52 78 -500 800 200 R 50 50 2 1 B
-X IOR_53 79 -500 700 200 R 50 50 2 1 B
-X IOR_54 80 -500 600 200 R 50 50 2 1 B
-X IOR_55 81 -500 500 200 R 50 50 2 1 B
-X NC 82 300 -400 200 L 50 50 2 1 N N
-X IOR_56 87 -500 400 200 R 50 50 2 1 B
-X IOR_57 88 -500 300 200 R 50 50 2 1 B
-X VCCIO_1 89 100 1500 200 D 50 50 2 1 W
-X IOR_58 90 -500 200 200 R 50 50 2 1 B
-X IOR_59 91 -500 100 200 R 50 50 2 1 B
-X IOR_60_GBIN3 93 -500 0 200 R 50 50 2 1 B
-X IOR_61_GBIN2 94 -500 -100 200 R 50 50 2 1 B
-X IOR_62 95 -500 -200 200 R 50 50 2 1 B
-X IOR_63 96 -500 -300 200 R 50 50 2 1 B
-X IOR_64 97 -500 -400 200 R 50 50 2 1 B
-X IOR_65 98 -500 -500 200 R 50 50 2 1 B
-X IOR_66 99 -500 -600 200 R 50 50 2 1 B
-X NC 110 400 -300 200 L 50 50 3 1 N N
-X NC 124 400 -400 200 L 50 50 3 1 N N
-X IOB_24 37 -600 900 200 R 50 50 3 1 B
-X IOB_25 38 -600 800 200 R 50 50 3 1 B
-X IOB_26 39 -600 700 200 R 50 50 3 1 B
-X IOB_27 41 -600 600 200 R 50 50 3 1 B
-X IOB_28 42 -600 500 200 R 50 50 3 1 B
-X IOB_29 43 -600 400 200 R 50 50 3 1 B
-X IOB_30 44 -600 300 200 R 50 50 3 1 B
-X IOB_31 45 -600 200 200 R 50 50 3 1 B
-X VCCIO_2 46 100 1400 200 D 50 50 3 1 W
-X IOB_32 47 -600 100 200 R 50 50 3 1 B
-X IOB_33 48 -600 0 200 R 50 50 3 1 B
-X IOB_35_GBIN5 49 -600 -100 200 R 50 50 3 1 B
-X IOB_36_GBIN4 50 -600 -200 200 R 50 50 3 1 B
-X IOB_34 52 -600 -300 200 R 50 50 3 1 B
-X IOB_37 56 -600 -400 200 R 50 50 3 1 B
-X VCCIO_2 57 100 1400 200 D 50 50 3 1 P N
-X IOB_38 58 -600 -500 200 R 50 50 3 1 B
-X IOB_39 60 -600 -600 200 R 50 50 3 1 B
-X IOB_40 61 -600 -700 200 R 50 50 3 1 B
-X IOB_41 62 -600 -800 200 R 50 50 3 1 B
-X IOB_42_CBSEL0 63 -600 -900 200 R 50 50 3 1 B
-X IOB_43_CBSEL1 64 -600 -1000 200 R 50 50 3 1 B
-X CDONE 65 600 800 200 L 50 50 3 1 C
-X ~CRESET_B 66 -600 1100 200 R 50 50 3 1 I
-X NC 83 400 400 200 L 50 50 3 1 N N
-X NC 84 400 300 200 L 50 50 3 1 N N
-X NC 85 400 0 200 L 50 50 3 1 N N
-X IOL_1A 1 -500 1100 200 R 50 50 4 1 B
-X IOL_4B 10 -500 400 200 R 50 50 4 1 B
-X IOL_5A 11 -500 300 200 R 50 50 4 1 B
-X IOL_5B 12 -500 200 200 R 50 50 4 1 B
-X NC 125 300 400 200 L 50 50 4 1 N N
-X NC 126 300 300 200 L 50 50 4 1 N N
-X NC 127 300 200 200 L 50 50 4 1 N N
-X NC 130 300 -200 200 L 50 50 4 1 N N
-X NC 131 300 -300 200 L 50 50 4 1 N N
-X IOL_6A 19 -500 100 200 R 50 50 4 1 B
-X IOL_1B 2 -500 1000 200 R 50 50 4 1 B
-X IOL_6B_GBIN7 20 -500 0 200 R 50 50 4 1 B
-X IOL_7A_GBIN6 21 -500 -100 200 R 50 50 4 1 B
-X IOL_7B 22 -500 -200 200 R 50 50 4 1 B
-X IOL_8A 23 -500 -300 200 R 50 50 4 1 B
-X IOL_8B 24 -500 -400 200 R 50 50 4 1 B
-X IOL_9A 25 -500 -500 200 R 50 50 4 1 B
-X IOL_9B 26 -500 -600 200 R 50 50 4 1 B
-X IOL_10A 28 -500 -700 200 R 50 50 4 1 B
-X IOL_10B 29 -500 -800 200 R 50 50 4 1 B
-X IOL_2A 3 -500 900 200 R 50 50 4 1 B
-X VCCIO_3 30 100 1500 200 D 50 50 4 1 P N
-X IOL_11A 31 -500 -900 200 R 50 50 4 1 B
-X IOL_11B 32 -500 -1000 200 R 50 50 4 1 B
-X IOL_12A 33 -500 -1100 200 R 50 50 4 1 B
-X IOL_12B 34 -500 -1200 200 R 50 50 4 1 B
-X IOL_2B 4 -500 800 200 R 50 50 4 1 B
-X VCCIO_3 6 100 1500 200 D 50 50 4 1 W
-X IOL_3A 7 -500 700 200 R 50 50 4 1 B
-X IOL_3B 8 -500 600 200 R 50 50 4 1 B
-X IOL_4A 9 -500 500 200 R 50 50 4 1 B
-X GND 103 100 -700 200 U 50 50 5 1 P N
-X VPP_2V5 108 0 700 200 D 50 50 5 1 W
-X VPP_FAST 109 -100 700 200 D 50 50 5 1 W
-X VCC 111 100 700 200 D 50 50 5 1 P N
-X GND 13 100 -700 200 U 50 50 5 1 P N
-X GND 132 100 -700 200 U 50 50 5 1 P N
-X GND 14 100 -700 200 U 50 50 5 1 P N
-X GND 140 100 -700 200 U 50 50 5 1 P N
-X VCC 27 100 700 200 D 50 50 5 1 W
-X VCCPLL 35 300 700 200 D 50 50 5 1 W
-X GNDPLL 36 300 -700 200 U 50 50 5 1 W
-X GND 5 100 -700 200 U 50 50 5 1 W
-X VCC 51 100 700 200 D 50 50 5 1 P N
-X GND 59 100 -700 200 U 50 50 5 1 P N
-X IOB_44_SDO 67 -600 0 200 R 50 50 5 1 B
-X IOB_45_SDI 68 -600 -100 200 R 50 50 5 1 B
-X GND 69 100 -700 200 U 50 50 5 1 P N
-X IOB_46_SCK 70 -600 -200 200 R 50 50 5 1 B
-X IOB_47_SS 71 -600 -300 200 R 50 50 5 1 B
-X VCC_SPI 72 -300 700 200 D 50 50 5 1 W
-X GND 86 100 -700 200 U 50 50 5 1 P N
-X VCC 92 100 700 200 D 50 50 5 1 P N
+S -350 1250 350 -1250 1 1 10 f
+S -350 1350 350 -1350 2 1 10 f
+S -450 1250 450 -1250 3 1 10 f
+S -350 1350 350 -1350 4 1 10 f
+S -450 550 450 -550 5 1 10 f
+X IOT_73 112 -500 1100 150 R 50 50 1 1 B
+X IOT_74 113 -500 1000 150 R 50 50 1 1 B
+X IOT_75 114 -500 900 150 R 50 50 1 1 B
+X IOT_76 115 -500 800 150 R 50 50 1 1 B
+X IOT_77 116 -500 700 150 R 50 50 1 1 B
+X IOT_78 117 -500 600 150 R 50 50 1 1 B
+X IOT_79 118 -500 500 150 R 50 50 1 1 B
+X IOT_80 119 -500 400 150 R 50 50 1 1 B
+X IOT_81 120 -500 300 150 R 50 50 1 1 B
+X IOT_82 121 -500 200 150 R 50 50 1 1 B
+X IOT_83 122 -500 100 150 R 50 50 1 1 B
+X VCCIO_0 123 0 1400 150 D 50 50 1 1 W
+X IOT_84_GBIN1 128 -500 0 150 R 50 50 1 1 B
+X IOT_85_GBIN0 129 -500 -100 150 R 50 50 1 1 B
+X VCCIO_0 133 0 1400 150 D 50 50 1 1 P N
+X IOT_87 134 -500 -200 150 R 50 50 1 1 B
+X IOT_88 135 -500 -300 150 R 50 50 1 1 B
+X IOT_89 136 -500 -400 150 R 50 50 1 1 B
+X IOT_90 137 -500 -500 150 R 50 50 1 1 B
+X IOT_91 138 -500 -600 150 R 50 50 1 1 B
+X IOT_92 139 -500 -700 150 R 50 50 1 1 B
+X IOT_93 141 -500 -800 150 R 50 50 1 1 B
+X IOT_94 142 -500 -900 150 R 50 50 1 1 B
+X IOT_95 143 -500 -1000 150 R 50 50 1 1 B
+X IOT_96 144 -500 -1100 150 R 50 50 1 1 B
+X NC 15 300 400 150 L 50 50 1 1 N N
+X NC 16 300 300 150 L 50 50 1 1 N N
+X NC 17 300 200 150 L 50 50 1 1 N N
+X NC 18 300 -300 150 L 50 50 1 1 N N
+X NC 77 300 -400 150 L 50 50 1 1 N N
+X VCCIO_1 100 0 1500 150 D 50 50 2 1 P N
+X IOR_67 101 -500 -700 150 R 50 50 2 1 B
+X IOR_68 102 -500 -800 150 R 50 50 2 1 B
+X IOR_69 104 -500 -900 150 R 50 50 2 1 B
+X IOR_70 105 -500 -1000 150 R 50 50 2 1 B
+X IOR_71 106 -500 -1100 150 R 50 50 2 1 B
+X IOR_72 107 -500 -1200 150 R 50 50 2 1 B
+X NC 40 300 400 150 L 50 50 2 1 N N
+X NC 53 300 300 150 L 50 50 2 1 N N
+X NC 54 300 200 150 L 50 50 2 1 N N
+X NC 55 300 -300 150 L 50 50 2 1 N N
+X IOR_48 73 -500 1200 150 R 50 50 2 1 B
+X IOR_49 74 -500 1100 150 R 50 50 2 1 B
+X IOR_50 75 -500 1000 150 R 50 50 2 1 B
+X IOR_51 76 -500 900 150 R 50 50 2 1 B
+X IOR_52 78 -500 800 150 R 50 50 2 1 B
+X IOR_53 79 -500 700 150 R 50 50 2 1 B
+X IOR_54 80 -500 600 150 R 50 50 2 1 B
+X IOR_55 81 -500 500 150 R 50 50 2 1 B
+X NC 82 300 -400 150 L 50 50 2 1 N N
+X IOR_56 87 -500 400 150 R 50 50 2 1 B
+X IOR_57 88 -500 300 150 R 50 50 2 1 B
+X VCCIO_1 89 0 1500 150 D 50 50 2 1 W
+X IOR_58 90 -500 200 150 R 50 50 2 1 B
+X IOR_59 91 -500 100 150 R 50 50 2 1 B
+X IOR_60_GBIN3 93 -500 0 150 R 50 50 2 1 B
+X IOR_61_GBIN2 94 -500 -100 150 R 50 50 2 1 B
+X IOR_62 95 -500 -200 150 R 50 50 2 1 B
+X IOR_63 96 -500 -300 150 R 50 50 2 1 B
+X IOR_64 97 -500 -400 150 R 50 50 2 1 B
+X IOR_65 98 -500 -500 150 R 50 50 2 1 B
+X IOR_66 99 -500 -600 150 R 50 50 2 1 B
+X NC 110 400 -300 150 L 50 50 3 1 N N
+X NC 124 400 -400 150 L 50 50 3 1 N N
+X IOB_24 37 -600 900 150 R 50 50 3 1 B
+X IOB_25 38 -600 800 150 R 50 50 3 1 B
+X IOB_26 39 -600 700 150 R 50 50 3 1 B
+X IOB_27 41 -600 600 150 R 50 50 3 1 B
+X IOB_28 42 -600 500 150 R 50 50 3 1 B
+X IOB_29 43 -600 400 150 R 50 50 3 1 B
+X IOB_30 44 -600 300 150 R 50 50 3 1 B
+X IOB_31 45 -600 200 150 R 50 50 3 1 B
+X VCCIO_2 46 0 1400 150 D 50 50 3 1 W
+X IOB_32 47 -600 100 150 R 50 50 3 1 B
+X IOB_33 48 -600 0 150 R 50 50 3 1 B
+X IOB_35_GBIN5 49 -600 -100 150 R 50 50 3 1 B
+X IOB_36_GBIN4 50 -600 -200 150 R 50 50 3 1 B
+X IOB_34 52 -600 -300 150 R 50 50 3 1 B
+X IOB_37 56 -600 -400 150 R 50 50 3 1 B
+X VCCIO_2 57 0 1400 150 D 50 50 3 1 P N
+X IOB_38 58 -600 -500 150 R 50 50 3 1 B
+X IOB_39 60 -600 -600 150 R 50 50 3 1 B
+X IOB_40 61 -600 -700 150 R 50 50 3 1 B
+X IOB_41 62 -600 -800 150 R 50 50 3 1 B
+X IOB_42_CBSEL0 63 -600 -900 150 R 50 50 3 1 B
+X IOB_43_CBSEL1 64 -600 -1000 150 R 50 50 3 1 B
+X CDONE 65 600 800 150 L 50 50 3 1 C
+X ~CRESET_B 66 -600 1100 150 R 50 50 3 1 I
+X NC 83 400 400 150 L 50 50 3 1 N N
+X NC 84 400 300 150 L 50 50 3 1 N N
+X NC 85 400 0 150 L 50 50 3 1 N N
+X IOL_1A 1 -500 1100 150 R 50 50 4 1 B
+X IOL_4B 10 -500 400 150 R 50 50 4 1 B
+X IOL_5A 11 -500 300 150 R 50 50 4 1 B
+X IOL_5B 12 -500 200 150 R 50 50 4 1 B
+X NC 125 300 400 150 L 50 50 4 1 N N
+X NC 126 300 300 150 L 50 50 4 1 N N
+X NC 127 300 200 150 L 50 50 4 1 N N
+X NC 130 300 -200 150 L 50 50 4 1 N N
+X NC 131 300 -300 150 L 50 50 4 1 N N
+X IOL_6A 19 -500 100 150 R 50 50 4 1 B
+X IOL_1B 2 -500 1000 150 R 50 50 4 1 B
+X IOL_6B_GBIN7 20 -500 0 150 R 50 50 4 1 B
+X IOL_7A_GBIN6 21 -500 -100 150 R 50 50 4 1 B
+X IOL_7B 22 -500 -200 150 R 50 50 4 1 B
+X IOL_8A 23 -500 -300 150 R 50 50 4 1 B
+X IOL_8B 24 -500 -400 150 R 50 50 4 1 B
+X IOL_9A 25 -500 -500 150 R 50 50 4 1 B
+X IOL_9B 26 -500 -600 150 R 50 50 4 1 B
+X IOL_10A 28 -500 -700 150 R 50 50 4 1 B
+X IOL_10B 29 -500 -800 150 R 50 50 4 1 B
+X IOL_2A 3 -500 900 150 R 50 50 4 1 B
+X VCCIO_3 30 0 1500 150 D 50 50 4 1 P N
+X IOL_11A 31 -500 -900 150 R 50 50 4 1 B
+X IOL_11B 32 -500 -1000 150 R 50 50 4 1 B
+X IOL_12A 33 -500 -1100 150 R 50 50 4 1 B
+X IOL_12B 34 -500 -1200 150 R 50 50 4 1 B
+X IOL_2B 4 -500 800 150 R 50 50 4 1 B
+X VCCIO_3 6 0 1500 150 D 50 50 4 1 W
+X IOL_3A 7 -500 700 150 R 50 50 4 1 B
+X IOL_3B 8 -500 600 150 R 50 50 4 1 B
+X IOL_4A 9 -500 500 150 R 50 50 4 1 B
+X GND 103 0 -700 150 U 50 50 5 1 P N
+X VPP_2V5 108 100 700 150 D 50 50 5 1 W
+X VPP_FAST 109 -100 700 150 D 50 50 5 1 W
+X VCC 111 0 700 150 D 50 50 5 1 P N
+X GND 13 0 -700 150 U 50 50 5 1 P N
+X GND 132 0 -700 150 U 50 50 5 1 P N
+X GND 14 0 -700 150 U 50 50 5 1 P N
+X GND 140 0 -700 150 U 50 50 5 1 P N
+X VCC 27 0 700 150 D 50 50 5 1 W
+X VCCPLL 35 300 700 150 D 50 50 5 1 W
+X GNDPLL 36 300 -700 150 U 50 50 5 1 W
+X GND 5 0 -700 150 U 50 50 5 1 W
+X VCC 51 0 700 150 D 50 50 5 1 P N
+X GND 59 0 -700 150 U 50 50 5 1 P N
+X IOB_44_SDO 67 -600 0 150 R 50 50 5 1 B
+X IOB_45_SDI 68 -600 -100 150 R 50 50 5 1 B
+X GND 69 0 -700 150 U 50 50 5 1 P N
+X IOB_46_SCK 70 -600 -200 150 R 50 50 5 1 B
+X IOB_47_SS 71 -600 -300 150 R 50 50 5 1 B
+X VCC_SPI 72 -300 700 150 D 50 50 5 1 W
+X GND 86 0 -700 150 U 50 50 5 1 P N
+X VCC 92 0 700 150 D 50 50 5 1 P N
 ENDDRAW
 ENDDEF
 #

From 66855d70114df95c781666a2c6b8f5b20358801e Mon Sep 17 00:00:00 2001
From: Anton Lysak <antonlysak@gmail.com>
Date: Mon, 15 Apr 2019 23:34:20 +0600
Subject: [PATCH 120/201] Trying to fix center

---
 FPGA_Lattice.lib | 52 ++++++++++++++++++++++++------------------------
 1 file changed, 26 insertions(+), 26 deletions(-)

diff --git a/FPGA_Lattice.lib b/FPGA_Lattice.lib
index 3213f37735..7cc8cbb66d 100644
--- a/FPGA_Lattice.lib
+++ b/FPGA_Lattice.lib
@@ -80,34 +80,34 @@ X IOR_64 97 -500 -400 150 R 50 50 2 1 B
 X IOR_65 98 -500 -500 150 R 50 50 2 1 B
 X IOR_66 99 -500 -600 150 R 50 50 2 1 B
 X NC 110 400 -300 150 L 50 50 3 1 N N
-X NC 124 400 -400 150 L 50 50 3 1 N N
-X IOB_24 37 -600 900 150 R 50 50 3 1 B
-X IOB_25 38 -600 800 150 R 50 50 3 1 B
-X IOB_26 39 -600 700 150 R 50 50 3 1 B
-X IOB_27 41 -600 600 150 R 50 50 3 1 B
-X IOB_28 42 -600 500 150 R 50 50 3 1 B
-X IOB_29 43 -600 400 150 R 50 50 3 1 B
-X IOB_30 44 -600 300 150 R 50 50 3 1 B
-X IOB_31 45 -600 200 150 R 50 50 3 1 B
+X NC 124 400 -800 150 L 50 50 3 1 N N
+X IOB_24 37 -600 800 150 R 50 50 3 1 B
+X IOB_25 38 -600 700 150 R 50 50 3 1 B
+X IOB_26 39 -600 600 150 R 50 50 3 1 B
+X IOB_27 41 -600 500 150 R 50 50 3 1 B
+X IOB_28 42 -600 400 150 R 50 50 3 1 B
+X IOB_29 43 -600 300 150 R 50 50 3 1 B
+X IOB_30 44 -600 200 150 R 50 50 3 1 B
+X IOB_31 45 -600 100 150 R 50 50 3 1 B
 X VCCIO_2 46 0 1400 150 D 50 50 3 1 W
-X IOB_32 47 -600 100 150 R 50 50 3 1 B
-X IOB_33 48 -600 0 150 R 50 50 3 1 B
-X IOB_35_GBIN5 49 -600 -100 150 R 50 50 3 1 B
-X IOB_36_GBIN4 50 -600 -200 150 R 50 50 3 1 B
-X IOB_34 52 -600 -300 150 R 50 50 3 1 B
-X IOB_37 56 -600 -400 150 R 50 50 3 1 B
+X IOB_32 47 -600 0 150 R 50 50 3 1 B
+X IOB_33 48 -600 -100 150 R 50 50 3 1 B
+X IOB_35_GBIN5 49 -600 -200 150 R 50 50 3 1 B
+X IOB_36_GBIN4 50 -600 -300 150 R 50 50 3 1 B
+X IOB_34 52 -600 -400 150 R 50 50 3 1 B
+X IOB_37 56 -600 -500 150 R 50 50 3 1 B
 X VCCIO_2 57 0 1400 150 D 50 50 3 1 P N
-X IOB_38 58 -600 -500 150 R 50 50 3 1 B
-X IOB_39 60 -600 -600 150 R 50 50 3 1 B
-X IOB_40 61 -600 -700 150 R 50 50 3 1 B
-X IOB_41 62 -600 -800 150 R 50 50 3 1 B
-X IOB_42_CBSEL0 63 -600 -900 150 R 50 50 3 1 B
-X IOB_43_CBSEL1 64 -600 -1000 150 R 50 50 3 1 B
+X IOB_38 58 -600 -600 150 R 50 50 3 1 B
+X IOB_39 60 -600 -700 150 R 50 50 3 1 B
+X IOB_40 61 -600 -800 150 R 50 50 3 1 B
+X IOB_41 62 -600 -900 150 R 50 50 3 1 B
+X IOB_42_CBSEL0 63 -600 -1000 150 R 50 50 3 1 B
+X IOB_43_CBSEL1 64 -600 -1100 150 R 50 50 3 1 B
 X CDONE 65 600 800 150 L 50 50 3 1 C
 X ~CRESET_B 66 -600 1100 150 R 50 50 3 1 I
 X NC 83 400 400 150 L 50 50 3 1 N N
 X NC 84 400 300 150 L 50 50 3 1 N N
-X NC 85 400 0 150 L 50 50 3 1 N N
+X NC 85 400 -400 150 L 50 50 3 1 N N
 X IOL_1A 1 -500 1100 150 R 50 50 4 1 B
 X IOL_4B 10 -500 400 150 R 50 50 4 1 B
 X IOL_5A 11 -500 300 150 R 50 50 4 1 B
@@ -153,11 +153,11 @@ X GNDPLL 36 300 -700 150 U 50 50 5 1 W
 X GND 5 0 -700 150 U 50 50 5 1 W
 X VCC 51 0 700 150 D 50 50 5 1 P N
 X GND 59 0 -700 150 U 50 50 5 1 P N
-X IOB_44_SDO 67 -600 0 150 R 50 50 5 1 B
-X IOB_45_SDI 68 -600 -100 150 R 50 50 5 1 B
+X IOB_44_SDO 67 -600 100 150 R 50 50 5 1 B
+X IOB_45_SDI 68 -600 0 150 R 50 50 5 1 B
 X GND 69 0 -700 150 U 50 50 5 1 P N
-X IOB_46_SCK 70 -600 -200 150 R 50 50 5 1 B
-X IOB_47_SS 71 -600 -300 150 R 50 50 5 1 B
+X IOB_46_SCK 70 -600 -100 150 R 50 50 5 1 B
+X IOB_47_SS 71 -600 -200 150 R 50 50 5 1 B
 X VCC_SPI 72 -300 700 150 D 50 50 5 1 W
 X GND 86 0 -700 150 U 50 50 5 1 P N
 X VCC 92 0 700 150 D 50 50 5 1 P N

From 5ddc1708c96d0cb7a983c37f332f0374cb005fcb Mon Sep 17 00:00:00 2001
From: Anton Lysak <antonlysak@gmail.com>
Date: Mon, 15 Apr 2019 23:42:51 +0600
Subject: [PATCH 121/201] One more try to fix center

---
 FPGA_Lattice.lib | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/FPGA_Lattice.lib b/FPGA_Lattice.lib
index 7cc8cbb66d..677eb71066 100644
--- a/FPGA_Lattice.lib
+++ b/FPGA_Lattice.lib
@@ -4,9 +4,9 @@ EESchema-LIBRARY Version 2.4
 # ICE40HX1K-TQ144
 #
 DEF ICE40HX1K-TQ144 U 0 20 Y Y 5 L N
-F0 "U" 250 1800 50 H V C CNN
-F1 "ICE40HX1K-TQ144" 550 1700 50 H V C CNN
-F2 "Package_QFP:TQFP-144_20x20mm_P0.5mm" 0 -1750 50 H I C CNN
+F0 "U" -400 1450 50 H V C CNN
+F1 "ICE40HX1K-TQ144" 450 1450 50 H V C CNN
+F2 "Package_QFP:TQFP-144_20x20mm_P0.5mm" 0 -1450 50 H I C CNN
 F3 "" -850 1400 50 H I C CNN
 $FPLIST
  TQFP*20x20mm*P0.5mm*

From 0d74b14dbad132b8e2698266980a860eae4b7635 Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Tue, 16 Apr 2019 19:46:45 +0300
Subject: [PATCH 122/201] add ONET1191P 11.3Gbps limiting amplifier, QFN-16

---
 Interface.dcm |  6 ++++++
 Interface.lib | 32 ++++++++++++++++++++++++++++++++
 2 files changed, 38 insertions(+)

diff --git a/Interface.dcm b/Interface.dcm
index 0c1d477d1b..47c3fbc6fa 100644
--- a/Interface.dcm
+++ b/Interface.dcm
@@ -309,6 +309,12 @@ K clock buffer
 F https://www.onsemi.com/pub/Collateral/NB3N551-D.PDF
 $ENDCMP
 #
+$CMP ONET1191P
+D 11.3-Gbps Limiting Amplifier, QFN-16
+K limiting amplifier gigabit ethernet sfp sfp+
+F http://www.ti.com/lit/ds/symlink/onet1191p.pdf
+$ENDCMP
+#
 $CMP PCA9306
 D Dual bidirectional I2C Bus and SMBus voltage level translator
 K Dual bidirectional I2C Bus and SMBus voltage level translator
diff --git a/Interface.lib b/Interface.lib
index 4f2e752fe0..da14732869 100644
--- a/Interface.lib
+++ b/Interface.lib
@@ -1949,6 +1949,38 @@ X EP 9 100 -400 100 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
+# ONET1191P
+#
+DEF ONET1191P U 0 20 Y Y 1 F N
+F0 "U" -250 600 50 H V C CNN
+F1 "ONET1191P" 250 550 50 H V C CNN
+F2 "Package_DFN_QFN:UQFN-16-1EP_3x3mm_P0.5mm_EP1.68x1.68mm" 0 -900 50 H I C CNN
+F3 "" 0 350 50 H I C CNN
+$FPLIST
+ QFN*EP*P0.5mm*
+$ENDFPLIST
+DRAW
+S -300 500 300 -500 0 1 10 f
+X VCC 1 0 600 100 D 50 50 1 1 W
+X LOS 10 400 -400 100 L 50 50 1 1 C
+X DIS 11 -400 -300 100 R 50 50 1 1 I
+X VAR 12 400 -300 100 L 50 50 1 1 I
+X GND 13 0 -600 100 U 50 50 1 1 P N
+X DOUT- 14 400 -100 100 L 50 50 1 1 O
+X DOUT+ 15 400 100 100 L 50 50 1 1 O
+X GND 16 0 -600 100 U 50 50 1 1 P N
+X GND 17 0 -600 100 U 50 50 1 1 P N
+X VCC 2 0 600 100 D 50 50 1 1 W N
+X GND 3 0 -600 100 U 50 50 1 1 W
+X GND 4 0 -600 100 U 50 50 1 1 P N
+X COC- 5 -400 400 100 R 50 50 1 1 P
+X COC+ 6 -400 300 100 R 50 50 1 1 P
+X DIN+ 7 -400 100 100 R 50 50 1 1 I
+X DIN- 8 -400 -100 100 R 50 50 1 1 I
+X TH 9 -400 -400 100 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
 # PCA9306
 #
 DEF PCA9306 U 0 40 Y Y 1 F N

From f4d68fcc081d2345ba6d76b53925e0f8c66852a1 Mon Sep 17 00:00:00 2001
From: John Whitmore <johnfwhitmore@gmail.com>
Date: Tue, 16 Apr 2019 17:48:21 +0100
Subject: [PATCH 123/201] PCF8523TS Addition of TSSOP-14 Symbol

---
 Timer_RTC.dcm |  6 ++++++
 Timer_RTC.lib | 29 +++++++++++++++++++++++++++++
 2 files changed, 35 insertions(+)

diff --git a/Timer_RTC.dcm b/Timer_RTC.dcm
index 99a7e766c0..a1a8d6636b 100644
--- a/Timer_RTC.dcm
+++ b/Timer_RTC.dcm
@@ -114,6 +114,12 @@ K I2C RTC Clock Calendar
 F https://www.nxp.com/docs/en/data-sheet/PCF8523.pdf
 $ENDCMP
 #
+$CMP PCF8523TS
+D Realtime Clock/Calendar I2C Interface, TSSOP-14
+K I2C RTC Clock Calendar
+F https://www.nxp.com/docs/en/data-sheet/PCF8523.pdf
+$ENDCMP
+#
 $CMP PCF8563T
 D Realtime Clock/Calendar I2C Interface, SOIC-8
 K I2C RTC Clock Calendar
diff --git a/Timer_RTC.lib b/Timer_RTC.lib
index d3b0b37c11..997f948baa 100644
--- a/Timer_RTC.lib
+++ b/Timer_RTC.lib
@@ -317,6 +317,35 @@ X VSS 9 0 -400 100 U 50 50 1 1 P N
 ENDDRAW
 ENDDEF
 #
+# PCF8523TS
+#
+DEF PCF8523TS U 0 20 Y Y 1 F N
+F0 "U" -400 350 50 H V L CNN
+F1 "PCF8523TS" 150 350 50 H V L CNN
+F2 "Package_SO:TSSOP-14_4.4x5mm_P0.65mm" 800 -350 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ TSSOP*4.4x5mm*
+$ENDFPLIST
+DRAW
+S -400 300 400 -300 0 1 10 f
+X OSCI 1 -500 -100 100 R 50 50 1 1 I
+X SDA 10 -500 100 100 R 50 50 1 1 B
+X SCL 11 -500 200 100 R 50 50 1 1 I
+X NC 12 -300 0 100 L 50 50 1 1 N N
+X ~INT1~/CLKOUT 13 500 0 100 L 50 50 1 1 C
+X VDD 14 -100 400 100 D 50 50 1 1 W
+X OSCO 2 -500 -200 100 R 50 50 1 1 O
+X NC 3 -300 0 100 L 50 50 1 1 N N
+X VBAT 4 100 400 100 D 50 50 1 1 W
+X VSS 5 0 -400 100 U 50 50 1 1 W
+X NC 6 -300 0 100 L 50 50 1 1 N N
+X ~INT2 7 500 150 100 L 50 50 1 1 C
+X CLKOUT 8 500 -150 100 L 50 50 1 1 O
+X NC 9 -300 0 100 L 50 50 1 1 N N
+ENDDRAW
+ENDDEF
+#
 # PCF8563T
 #
 DEF PCF8563T U 0 20 Y Y 1 F N

From 3514aa08e5d9d21af22019abcf627c97fba6c69e Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Tue, 16 Apr 2019 19:55:49 +0300
Subject: [PATCH 124/201] suggest footprint EP1.7x1.7, invisible vcc pin to
 passive

---
 Interface.lib | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Interface.lib b/Interface.lib
index da14732869..1df251a870 100644
--- a/Interface.lib
+++ b/Interface.lib
@@ -1954,7 +1954,7 @@ ENDDEF
 DEF ONET1191P U 0 20 Y Y 1 F N
 F0 "U" -250 600 50 H V C CNN
 F1 "ONET1191P" 250 550 50 H V C CNN
-F2 "Package_DFN_QFN:UQFN-16-1EP_3x3mm_P0.5mm_EP1.68x1.68mm" 0 -900 50 H I C CNN
+F2 "Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm" 0 -900 50 H I C CNN
 F3 "" 0 350 50 H I C CNN
 $FPLIST
  QFN*EP*P0.5mm*
@@ -1970,7 +1970,7 @@ X DOUT- 14 400 -100 100 L 50 50 1 1 O
 X DOUT+ 15 400 100 100 L 50 50 1 1 O
 X GND 16 0 -600 100 U 50 50 1 1 P N
 X GND 17 0 -600 100 U 50 50 1 1 P N
-X VCC 2 0 600 100 D 50 50 1 1 W N
+X VCC 2 0 600 100 D 50 50 1 1 P N
 X GND 3 0 -600 100 U 50 50 1 1 W
 X GND 4 0 -600 100 U 50 50 1 1 P N
 X COC- 5 -400 400 100 R 50 50 1 1 P

From 89f9663cf10e90b1eac4c5b8f42d8b1321f71288 Mon Sep 17 00:00:00 2001
From: John Whitmore <johnfwhitmore@gmail.com>
Date: Tue, 16 Apr 2019 17:58:52 +0100
Subject: [PATCH 125/201] Corrected pin so place on grid

---
 Timer_RTC.lib | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Timer_RTC.lib b/Timer_RTC.lib
index 997f948baa..4ff327b48d 100644
--- a/Timer_RTC.lib
+++ b/Timer_RTC.lib
@@ -340,8 +340,8 @@ X NC 3 -300 0 100 L 50 50 1 1 N N
 X VBAT 4 100 400 100 D 50 50 1 1 W
 X VSS 5 0 -400 100 U 50 50 1 1 W
 X NC 6 -300 0 100 L 50 50 1 1 N N
-X ~INT2 7 500 150 100 L 50 50 1 1 C
-X CLKOUT 8 500 -150 100 L 50 50 1 1 O
+X ~INT2 7 500 100 100 L 50 50 1 1 C
+X CLKOUT 8 500 -100 100 L 50 50 1 1 O
 X NC 9 -300 0 100 L 50 50 1 1 N N
 ENDDRAW
 ENDDEF

From 36f7c249d71cb323ec9b69777b3e1ec44a8c1667 Mon Sep 17 00:00:00 2001
From: John Whitmore <johnfwhitmore@gmail.com>
Date: Tue, 16 Apr 2019 18:07:55 +0100
Subject: [PATCH 126/201] Unstacked the NC Pins

---
 Timer_RTC.lib | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Timer_RTC.lib b/Timer_RTC.lib
index 4ff327b48d..be39caaf92 100644
--- a/Timer_RTC.lib
+++ b/Timer_RTC.lib
@@ -336,13 +336,13 @@ X NC 12 -300 0 100 L 50 50 1 1 N N
 X ~INT1~/CLKOUT 13 500 0 100 L 50 50 1 1 C
 X VDD 14 -100 400 100 D 50 50 1 1 W
 X OSCO 2 -500 -200 100 R 50 50 1 1 O
-X NC 3 -300 0 100 L 50 50 1 1 N N
+X NC 3 -200 -200 100 D 50 50 1 1 N N
 X VBAT 4 100 400 100 D 50 50 1 1 W
 X VSS 5 0 -400 100 U 50 50 1 1 W
-X NC 6 -300 0 100 L 50 50 1 1 N N
+X NC 6 -100 -200 100 D 50 50 1 1 N N
 X ~INT2 7 500 100 100 L 50 50 1 1 C
 X CLKOUT 8 500 -100 100 L 50 50 1 1 O
-X NC 9 -300 0 100 L 50 50 1 1 N N
+X NC 9 200 -200 100 D 50 50 1 1 N N
 ENDDRAW
 ENDDEF
 #

From 02e05d2898e553b67b73f5079e5b2602b4e48cd8 Mon Sep 17 00:00:00 2001
From: jneiva08 <jneiva08@gmail.com>
Date: Wed, 17 Apr 2019 11:10:37 +0100
Subject: [PATCH 127/201] Update datasheet Changed Position offset to 20mils

---
 Sensor.dcm | 2 +-
 Sensor.lib | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/Sensor.dcm b/Sensor.dcm
index 5928da5e90..84700e253e 100644
--- a/Sensor.dcm
+++ b/Sensor.dcm
@@ -63,7 +63,7 @@ $ENDCMP
 $CMP SHT1x
 D Temperature and humidity module
 K digital temperature humidity sensor
-F https://www.sensirion.com/fileadmin/user_upload/customers/sensirion/Dokumente/2_Humidity_Sensors/Sensirion_Humidity_Sensors_SHT1x_Datasheet.pdf
+F https://www.sensirion.com/fileadmin/user_upload/customers/sensirion/Dokumente/0_Datasheets/Humidity/Sensirion_Humidity_Sensors_SHT1x_Datasheet.pdf
 $ENDCMP
 #
 #End Doc Library
diff --git a/Sensor.lib b/Sensor.lib
index aa6cd7cedc..f0bd5226cf 100644
--- a/Sensor.lib
+++ b/Sensor.lib
@@ -252,7 +252,7 @@ ENDDEF
 #
 # SHT1x
 #
-DEF SHT1x U 0 40 Y Y 1 F N
+DEF SHT1x U 0 20 Y Y 1 F N
 F0 "U" 150 250 50 H V C CNN
 F1 "SHT1x" 100 -250 50 H V C CNN
 F2 "Sensor:SHT1x" 150 250 50 H I C CNN

From 830874b7af135bde1b346c6e4b104e2d991decfc Mon Sep 17 00:00:00 2001
From: John Whitmore <johnfwhitmore@gmail.com>
Date: Wed, 17 Apr 2019 21:13:12 +0100
Subject: [PATCH 128/201] Updated to include comments from PR

---
 Timer_RTC.lib | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/Timer_RTC.lib b/Timer_RTC.lib
index be39caaf92..9fbeae9a00 100644
--- a/Timer_RTC.lib
+++ b/Timer_RTC.lib
@@ -325,24 +325,24 @@ F1 "PCF8523TS" 150 350 50 H V L CNN
 F2 "Package_SO:TSSOP-14_4.4x5mm_P0.65mm" 800 -350 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
 $FPLIST
- TSSOP*4.4x5mm*
+ TSSOP*4.4x5mm*P0.65mm*
 $ENDFPLIST
 DRAW
 S -400 300 400 -300 0 1 10 f
 X OSCI 1 -500 -100 100 R 50 50 1 1 I
 X SDA 10 -500 100 100 R 50 50 1 1 B
 X SCL 11 -500 200 100 R 50 50 1 1 I
-X NC 12 -300 0 100 L 50 50 1 1 N N
+X NC 12 -400 0 100 L 50 50 1 1 N N
 X ~INT1~/CLKOUT 13 500 0 100 L 50 50 1 1 C
 X VDD 14 -100 400 100 D 50 50 1 1 W
 X OSCO 2 -500 -200 100 R 50 50 1 1 O
-X NC 3 -200 -200 100 D 50 50 1 1 N N
+X NC 3 -200 -300 100 D 50 50 1 1 N N
 X VBAT 4 100 400 100 D 50 50 1 1 W
 X VSS 5 0 -400 100 U 50 50 1 1 W
-X NC 6 -100 -200 100 D 50 50 1 1 N N
+X NC 6 -100 -300 100 D 50 50 1 1 N N
 X ~INT2 7 500 100 100 L 50 50 1 1 C
-X CLKOUT 8 500 -100 100 L 50 50 1 1 O
-X NC 9 200 -200 100 D 50 50 1 1 N N
+X CLKOUT 8 500 -100 100 L 50 50 1 1 C
+X NC 9 200 -300 100 D 50 50 1 1 N N
 ENDDRAW
 ENDDEF
 #

From 04da217fa66efd99e3f31822889661c84f1b9b8b Mon Sep 17 00:00:00 2001
From: pyroesp <nicolaslopezesp@gmail.com>
Date: Wed, 17 Apr 2019 23:11:54 +0200
Subject: [PATCH 129/201] fix swapped pins 12 & 13 on DS1267_SOIC symbol

---
 Potentiometer_Digital.lib | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Potentiometer_Digital.lib b/Potentiometer_Digital.lib
index c4a26acac7..fd363c4782 100644
--- a/Potentiometer_Digital.lib
+++ b/Potentiometer_Digital.lib
@@ -209,8 +209,8 @@ P 5 0 1 0 123 -81 123 -121 83 -101 123 -81 123 -81 f
 X VB 1 100 -500 100 U 50 50 1 1 W
 X COUT 10 -400 -200 100 R 50 50 1 1 O
 X L0 11 400 100 100 L 50 50 1 1 P
-X W0 12 400 200 100 L 50 50 1 1 P
-X H0 13 400 300 100 L 50 50 1 1 P
+X H0 12 400 300 100 L 50 50 1 1 P
+X W0 13 400 200 100 L 50 50 1 1 P
 X SOUT 14 -400 -100 100 R 50 50 1 1 O
 X VCC 16 0 500 100 D 50 50 1 1 W
 X H1 3 400 0 100 L 50 50 1 1 P

From a01cbdb87fb8b511f9bb79397891154d10ee99cc Mon Sep 17 00:00:00 2001
From: A W <anders.e.e.wallin@gmail.com>
Date: Thu, 18 Apr 2019 11:15:54 +0300
Subject: [PATCH 130/201] footprint, fp-filter, DISABLE pin name

---
 Interface.dcm |  4 ++--
 Interface.lib | 12 ++++++------
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/Interface.dcm b/Interface.dcm
index 47c3fbc6fa..e23d6ef22c 100644
--- a/Interface.dcm
+++ b/Interface.dcm
@@ -309,8 +309,8 @@ K clock buffer
 F https://www.onsemi.com/pub/Collateral/NB3N551-D.PDF
 $ENDCMP
 #
-$CMP ONET1191P
-D 11.3-Gbps Limiting Amplifier, QFN-16
+$CMP ONET1191PRGT
+D 11.3-Gbps Limiting Amplifier, VQFN-16
 K limiting amplifier gigabit ethernet sfp sfp+
 F http://www.ti.com/lit/ds/symlink/onet1191p.pdf
 $ENDCMP
diff --git a/Interface.lib b/Interface.lib
index 1df251a870..07766ff6e1 100644
--- a/Interface.lib
+++ b/Interface.lib
@@ -1949,21 +1949,21 @@ X EP 9 100 -400 100 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
-# ONET1191P
+# ONET1191PRGT
 #
-DEF ONET1191P U 0 20 Y Y 1 F N
+DEF ONET1191PRGT U 0 20 Y Y 1 F N
 F0 "U" -250 600 50 H V C CNN
-F1 "ONET1191P" 250 550 50 H V C CNN
-F2 "Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm" 0 -900 50 H I C CNN
+F1 "ONET1191PRGT" 250 550 50 H V C CNN
+F2 "Package_DFN_QFN:VQFN-16-1EP_3x3mm_P0.5mm_EP1.68x1.68mm" 0 -900 50 H I C CNN
 F3 "" 0 350 50 H I C CNN
 $FPLIST
- QFN*EP*P0.5mm*
+ VQFN*1EP*3x3mm*P0.5mm*
 $ENDFPLIST
 DRAW
 S -300 500 300 -500 0 1 10 f
 X VCC 1 0 600 100 D 50 50 1 1 W
 X LOS 10 400 -400 100 L 50 50 1 1 C
-X DIS 11 -400 -300 100 R 50 50 1 1 I
+X DISABLE 11 -400 -300 100 R 50 50 1 1 I
 X VAR 12 400 -300 100 L 50 50 1 1 I
 X GND 13 0 -600 100 U 50 50 1 1 P N
 X DOUT- 14 400 -100 100 L 50 50 1 1 O

From 1039d78a70a61f2943e032a778156d7f45aeea52 Mon Sep 17 00:00:00 2001
From: A W <anders.e.e.wallin@gmail.com>
Date: Thu, 18 Apr 2019 11:26:43 +0300
Subject: [PATCH 131/201] move ref and name

---
 Interface.lib | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Interface.lib b/Interface.lib
index 07766ff6e1..c7ad0d37e1 100644
--- a/Interface.lib
+++ b/Interface.lib
@@ -1952,8 +1952,8 @@ ENDDEF
 # ONET1191PRGT
 #
 DEF ONET1191PRGT U 0 20 Y Y 1 F N
-F0 "U" -250 600 50 H V C CNN
-F1 "ONET1191PRGT" 250 550 50 H V C CNN
+F0 "U" -300 550 50 H V C CNN
+F1 "ONET1191PRGT" 350 550 50 H V C CNN
 F2 "Package_DFN_QFN:VQFN-16-1EP_3x3mm_P0.5mm_EP1.68x1.68mm" 0 -900 50 H I C CNN
 F3 "" 0 350 50 H I C CNN
 $FPLIST

From aad7ce1da3ea83b7e0968fc343a348a2b347723d Mon Sep 17 00:00:00 2001
From: Tim Pambor <tp@osasysteme.de>
Date: Thu, 18 Apr 2019 17:05:29 +0200
Subject: [PATCH 132/201] Add CPC1002N

---
 Relay_SolidState.dcm |  6 ++++++
 Relay_SolidState.lib | 44 ++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 50 insertions(+)

diff --git a/Relay_SolidState.dcm b/Relay_SolidState.dcm
index 9265889ac6..7daec4d9c1 100644
--- a/Relay_SolidState.dcm
+++ b/Relay_SolidState.dcm
@@ -24,6 +24,12 @@ K MOSFET Output Photorelay 1-Form-A
 F https://docs.broadcom.com/docs/AV02-0173EN
 $ENDCMP
 #
+$CMP CPC1002N
+D Form A, Solid State Relay (Photo MOSFET) 60V, 0.7A, 0.55Ohm, SO-4
+K MOSFET Output Photorelay 1-Form-A
+F http://www.ixysic.com/home/pdfs.nsf/www/CPC1002N.pdf/$file/CPC1002N.pdf
+$ENDCMP
+#
 $CMP CPC1017N
 D Form A, Solid State Relay (Photo MOSFET) 60V, 0.1A, 16Ohm, SO-4
 K MOSFET Output Photorelay 1-Form-A
diff --git a/Relay_SolidState.lib b/Relay_SolidState.lib
index 23aa47815e..2574ee6f8a 100644
--- a/Relay_SolidState.lib
+++ b/Relay_SolidState.lib
@@ -120,6 +120,50 @@ X ~ 4 300 100 100 L 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
+# CPC1002N
+#
+DEF CPC1002N U 0 40 Y Y 1 F N
+F0 "U" -200 200 50 H V L CNN
+F1 "CPC1002N" 0 200 50 H V L CNN
+F2 "Housings_SSOP:SOP-4_3.8x4.1mm_Pitch2.54mm" -200 -200 50 H I L CIN
+F3 "" -50 0 50 H I L CNN
+$FPLIST
+ SOP*3.8x4.1mm*Pitch2.54mm*
+$ENDFPLIST
+DRAW
+C 110 -55 5 0 1 0 N
+C 110 -30 5 0 1 0 N
+C 110 55 5 0 1 0 N
+S -200 150 200 -150 0 1 10 f
+P 2 0 1 0 -150 -25 -100 -25 N
+P 2 0 1 0 -125 25 -125 -25 N
+P 2 0 1 8 40 30 40 -30 N
+P 2 0 1 0 55 -30 110 -30 N
+P 2 0 1 0 55 30 110 30 N
+P 2 0 1 0 110 -30 110 -55 N
+P 2 0 1 0 110 30 110 55 N
+P 2 0 1 0 135 15 165 15 N
+P 3 0 1 0 -200 100 -125 100 -125 25 N
+P 3 0 1 0 -125 -25 -125 -100 -200 -100 N
+P 3 0 1 14 60 -25 60 -35 60 -35 N
+P 3 0 1 14 60 5 60 -5 60 -5 N
+P 3 0 1 14 60 35 60 25 60 25 N
+P 3 0 1 0 65 0 110 0 110 -30 N
+P 3 0 1 0 110 -55 110 -100 200 -100 N
+P 3 0 1 0 110 55 110 100 200 100 N
+P 4 0 1 0 -125 -25 -150 25 -100 25 -125 -25 N
+P 4 0 1 0 70 0 90 5 90 -5 70 0 N
+P 4 0 1 0 110 -55 150 -55 150 55 110 55 N
+P 4 0 1 0 150 15 135 -15 165 -15 150 15 N
+P 5 0 1 0 -75 -20 -25 -20 -40 -25 -40 -15 -25 -20 N
+P 5 0 1 0 -75 20 -25 20 -40 15 -40 25 -25 20 N
+X ~ 1 -300 100 100 R 50 50 1 1 P
+X ~ 2 -300 -100 100 R 50 50 1 1 P
+X ~ 3 300 -100 100 L 50 50 1 1 P
+X ~ 4 300 100 100 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
 # CPC1017N
 #
 DEF CPC1017N U 0 40 Y Y 1 F N

From f28c602bcfe5ab8a656674eb940c09e478bf9089 Mon Sep 17 00:00:00 2001
From: Tim Pambor <tp@osasysteme.de>
Date: Thu, 18 Apr 2019 17:08:27 +0200
Subject: [PATCH 133/201] Add LTV-247

---
 Isolator.dcm |  6 ++++++
 Isolator.lib | 43 +++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 49 insertions(+)

diff --git a/Isolator.dcm b/Isolator.dcm
index 8b21034a36..6e8e788bbf 100644
--- a/Isolator.dcm
+++ b/Isolator.dcm
@@ -486,6 +486,12 @@ K 4Ch Quad Digital Isolator 25Mbps
 F http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=iso7342fc&fileType=pdf
 $ENDCMP
 #
+$CMP LTV-247
+D DC Quad Optocoupler, Vce 80V, CTR 100-600%, SOP16
+K NPN DC Quad Optocoupler
+F http://optoelectronics.liteon.com/upload/download/DS70-2009-0014/LTV-2X7%20sereis%20Mar17.PDF
+$ENDCMP
+#
 $CMP LTV-352T
 D DC Darlington Optocoupler, Vce 300V, CTR 1000%, SO-4
 K NPN Darlington DC Optocoupler
diff --git a/Isolator.lib b/Isolator.lib
index 441851d977..b9d814fda6 100644
--- a/Isolator.lib
+++ b/Isolator.lib
@@ -2860,6 +2860,49 @@ X GND2 9 400 300 100 L 50 50 1 1 P N
 ENDDRAW
 ENDDEF
 #
+# LTV-247
+#
+DEF LTV-247 U 0 40 Y Y 4 F N
+F0 "U" -200 200 50 H V L CNN
+F1 "LTV-247" 0 200 50 H V L CNN
+F2 "Package_SO:SOP-16_4.4x10.4mm_P1.27mm" -200 -200 50 H I L CIN
+F3 "" 0 0 50 H I L CNN
+$FPLIST
+ SOP*4.4x10.4mm*P1.27mm
+$ENDFPLIST
+DRAW
+S -200 150 200 -150 0 1 10 f
+P 2 0 1 10 -125 -25 -75 -25 N
+P 2 0 1 0 100 25 175 100 N
+P 2 0 1 0 175 -100 100 -25 F
+P 2 0 1 0 175 -100 200 -100 N
+P 2 0 1 0 175 100 200 100 N
+P 3 0 1 0 -100 -25 -100 -100 -200 -100 N
+P 3 0 1 20 100 75 100 -75 100 -75 N
+P 4 0 1 0 -200 100 -100 100 -100 -50 -100 25 N
+P 4 0 1 10 -100 -25 -125 25 -75 25 -100 -25 N
+P 5 0 1 0 -20 -20 30 -20 15 -25 15 -15 30 -20 N
+P 5 0 1 0 -20 20 30 20 15 15 15 25 30 20 N
+P 5 0 1 0 120 -65 140 -45 160 -85 120 -65 120 -65 F
+X ~ 1 -300 100 100 R 50 50 1 1 P
+X ~ 15 300 -100 100 L 50 50 1 1 P
+X ~ 16 300 100 100 L 50 50 1 1 P
+X ~ 2 -300 -100 100 R 50 50 1 1 P
+X ~ 13 300 -100 100 L 50 50 2 1 P
+X ~ 14 300 100 100 L 50 50 2 1 P
+X ~ 3 -300 100 100 R 50 50 2 1 P
+X ~ 4 -300 -100 100 R 50 50 2 1 P
+X ~ 11 300 -100 100 L 50 50 3 1 P
+X ~ 12 300 100 100 L 50 50 3 1 P
+X ~ 5 -300 100 100 R 50 50 3 1 P
+X ~ 6 -300 -100 100 R 50 50 3 1 P
+X ~ 10 300 100 100 L 50 50 4 1 P
+X ~ 7 -300 100 100 R 50 50 4 1 P
+X ~ 8 -300 -100 100 R 50 50 4 1 P
+X ~ 9 300 -100 100 L 50 50 4 1 P
+ENDDRAW
+ENDDEF
+#
 # LTV-352T
 #
 DEF LTV-352T U 0 40 Y Y 1 F N

From a9454cd6c4a8267c2748d26108f55b6b8df13a32 Mon Sep 17 00:00:00 2001
From: Tim Pambor <tp@osasysteme.de>
Date: Thu, 18 Apr 2019 17:25:39 +0200
Subject: [PATCH 134/201] Change pin offset to 20mil and add missing * in
 footprint filter

---
 Isolator.lib | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Isolator.lib b/Isolator.lib
index b9d814fda6..5e35f077c8 100644
--- a/Isolator.lib
+++ b/Isolator.lib
@@ -2862,13 +2862,13 @@ ENDDEF
 #
 # LTV-247
 #
-DEF LTV-247 U 0 40 Y Y 4 F N
+DEF LTV-247 U 0 20 Y Y 4 F N
 F0 "U" -200 200 50 H V L CNN
 F1 "LTV-247" 0 200 50 H V L CNN
 F2 "Package_SO:SOP-16_4.4x10.4mm_P1.27mm" -200 -200 50 H I L CIN
 F3 "" 0 0 50 H I L CNN
 $FPLIST
- SOP*4.4x10.4mm*P1.27mm
+ SOP*4.4x10.4mm*P1.27mm*
 $ENDFPLIST
 DRAW
 S -200 150 200 -150 0 1 10 f

From 533561d3afc7ad15f22897fece23fc450cb5f5e8 Mon Sep 17 00:00:00 2001
From: Tim Pambor <tp@osasysteme.de>
Date: Thu, 18 Apr 2019 17:39:38 +0200
Subject: [PATCH 135/201] Fix footprint and pin offset

---
 Relay_SolidState.lib | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Relay_SolidState.lib b/Relay_SolidState.lib
index 2574ee6f8a..e414fa4aa4 100644
--- a/Relay_SolidState.lib
+++ b/Relay_SolidState.lib
@@ -122,13 +122,13 @@ ENDDEF
 #
 # CPC1002N
 #
-DEF CPC1002N U 0 40 Y Y 1 F N
+DEF CPC1002N U 0 20 Y Y 1 F N
 F0 "U" -200 200 50 H V L CNN
 F1 "CPC1002N" 0 200 50 H V L CNN
-F2 "Housings_SSOP:SOP-4_3.8x4.1mm_Pitch2.54mm" -200 -200 50 H I L CIN
+F2 "Package_SO:SOP-4_3.8x4.1mm_P2.54mm" -200 -200 50 H I L CIN
 F3 "" -50 0 50 H I L CNN
 $FPLIST
- SOP*3.8x4.1mm*Pitch2.54mm*
+ SOP*3.8x4.1mm*P2.54mm*
 $ENDFPLIST
 DRAW
 C 110 -55 5 0 1 0 N

From 3c539bc14c6c161a88a20df71e32ca4e8940f0a7 Mon Sep 17 00:00:00 2001
From: John Whitmore <johnfwhitmore@gmail.com>
Date: Thu, 18 Apr 2019 16:40:45 +0100
Subject: [PATCH 136/201] Corrected NC Pin Orientation and Output pin.

---
 Timer_RTC.lib | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/Timer_RTC.lib b/Timer_RTC.lib
index 9fbeae9a00..81e3a67f39 100644
--- a/Timer_RTC.lib
+++ b/Timer_RTC.lib
@@ -332,17 +332,17 @@ S -400 300 400 -300 0 1 10 f
 X OSCI 1 -500 -100 100 R 50 50 1 1 I
 X SDA 10 -500 100 100 R 50 50 1 1 B
 X SCL 11 -500 200 100 R 50 50 1 1 I
-X NC 12 -400 0 100 L 50 50 1 1 N N
-X ~INT1~/CLKOUT 13 500 0 100 L 50 50 1 1 C
+X NC 12 200 -300 100 U 50 50 1 1 N N
+X ~INT1~/CLKOUT 13 500 0 100 L 50 50 1 1 O
 X VDD 14 -100 400 100 D 50 50 1 1 W
 X OSCO 2 -500 -200 100 R 50 50 1 1 O
-X NC 3 -200 -300 100 D 50 50 1 1 N N
+X NC 3 -200 -300 100 U 50 50 1 1 N N
 X VBAT 4 100 400 100 D 50 50 1 1 W
 X VSS 5 0 -400 100 U 50 50 1 1 W
-X NC 6 -100 -300 100 D 50 50 1 1 N N
+X NC 6 -100 -300 100 U 50 50 1 1 N N
 X ~INT2 7 500 100 100 L 50 50 1 1 C
 X CLKOUT 8 500 -100 100 L 50 50 1 1 C
-X NC 9 200 -300 100 D 50 50 1 1 N N
+X NC 9 100 -300 100 U 50 50 1 1 N N
 ENDDRAW
 ENDDEF
 #

From db5cfcb69324ba49883676e9e2132935c3ae0ce4 Mon Sep 17 00:00:00 2001
From: jstjst <jonas@gappert.de>
Date: Thu, 18 Apr 2019 21:55:37 +0200
Subject: [PATCH 137/201] fixed review issues

---
 Power_Supervisor.dcm | 2 +-
 Power_Supervisor.lib | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/Power_Supervisor.dcm b/Power_Supervisor.dcm
index 3d22ba42eb..904cf7c5ac 100644
--- a/Power_Supervisor.dcm
+++ b/Power_Supervisor.dcm
@@ -355,7 +355,7 @@ F http://www.ti.com/lit/ds/symlink/tps3702.pdf
 $ENDCMP
 #
 $CMP TPS3808DBV
-D Low-Quiescent-Current, Programmable-Delay Supervisory Circuit
+D Low-Quiescent-Current, Programmable-Delay Supervisory Circuit, SOT-23-6
 K supply voltage supervisor
 F http://www.ti.com/lit/ds/symlink/tps3808.pdf
 $ENDCMP
diff --git a/Power_Supervisor.lib b/Power_Supervisor.lib
index be7199d2b8..8d594e684e 100644
--- a/Power_Supervisor.lib
+++ b/Power_Supervisor.lib
@@ -456,7 +456,7 @@ F1 "TPS3808DBV" 0 250 50 H V L CNN
 F2 "Package_TO_SOT_SMD:SOT-23-6" -100 0 50 H I C CNN
 F3 "" -100 0 50 H I C CNN
 $FPLIST
- Package*TO*SOT*SMD*SOT*23*
+ SOT?23*
 $ENDFPLIST
 DRAW
 S -300 200 300 -200 0 1 10 f

From 18ae0ffc47db37fb4777c73e7373529d5f555fd1 Mon Sep 17 00:00:00 2001
From: jstjst <jonas@gappert.de>
Date: Thu, 18 Apr 2019 22:20:48 +0200
Subject: [PATCH 138/201] fixed review issues tlv733xxp is now alias of
 LD39015M08R Added all voltage versions

---
 Regulator_Linear.dcm | 56 +++++++++++++++++++++++++++++++++++++++++---
 Regulator_Linear.lib | 22 +----------------
 2 files changed, 54 insertions(+), 24 deletions(-)

diff --git a/Regulator_Linear.dcm b/Regulator_Linear.dcm
index f6ec59e912..e25fe3c3fb 100644
--- a/Regulator_Linear.dcm
+++ b/Regulator_Linear.dcm
@@ -5796,9 +5796,59 @@ K LDO Regulator Fixed Positive
 F http://www.ti.com/lit/ds/symlink/tlv713p.pdf
 $ENDCMP
 #
-$CMP TLV733PDBV
-D Capacitor-Free, 300-mA, Low-Dropout Regulator
-K LDO
+$CMP TLV73310PDBV
+D 300mA Capacitor-Free Low Dropout Voltage Regulator, Fixed Output 1.0V, SOT-23-5
+K 300mA LDO Regulator Fixed Positive Capacitor-Free
+F http://www.ti.com/lit/ds/symlink/tlv733p.pdf
+$ENDCMP
+#
+$CMP TLV73311PDBV
+D 300mA Capacitor-Free Low Dropout Voltage Regulator, Fixed Output 1.1V, SOT-23-5
+K 300mA LDO Regulator Fixed Positive Capacitor-Free
+F http://www.ti.com/lit/ds/symlink/tlv733p.pdf
+$ENDCMP
+#
+$CMP TLV73312PDBV
+D 300mA Capacitor-Free Low Dropout Voltage Regulator, Fixed Output 1.2V, SOT-23-5
+K 300mA LDO Regulator Fixed Positive Capacitor-Free
+F http://www.ti.com/lit/ds/symlink/tlv733p.pdf
+$ENDCMP
+#
+$CMP TLV73315PDBV
+D 300mA Capacitor-Free Low Dropout Voltage Regulator, Fixed Output 1.5V, SOT-23-5
+K 300mA LDO Regulator Fixed Positive Capacitor-Free
+F http://www.ti.com/lit/ds/symlink/tlv733p.pdf
+$ENDCMP
+#
+$CMP TLV73318PDBV
+D 300mA Capacitor-Free Low Dropout Voltage Regulator, Fixed Output 1.8V, SOT-23-5
+K 300mA LDO Regulator Fixed Positive Capacitor-Free
+F http://www.ti.com/lit/ds/symlink/tlv733p.pdf
+$ENDCMP
+#
+$CMP TLV73325PDBV
+D 300mA Capacitor-Free Low Dropout Voltage Regulator, Fixed Output 2.5V, SOT-23-5
+K 300mA LDO Regulator Fixed Positive Capacitor-Free
+F http://www.ti.com/lit/ds/symlink/tlv733p.pdf
+$ENDCMP
+$CMP TLV733285PDBV
+D 300mA Capacitor-Free Low Dropout Voltage Regulator, Fixed Output 2.85V, SOT-23-5
+K 300mA LDO Regulator Fixed Positive Capacitor-Free
+F http://www.ti.com/lit/ds/symlink/tlv733p.pdf
+$ENDCMP
+$CMP TLV73328PDBV
+D 300mA Capacitor-Free Low Dropout Voltage Regulator, Fixed Output 2.8V, SOT-23-5
+K 300mA LDO Regulator Fixed Positive Capacitor-Free
+F http://www.ti.com/lit/ds/symlink/tlv733p.pdf
+$ENDCMP
+$CMP TLV73330PDBV
+D 300mA Capacitor-Free Low Dropout Voltage Regulator, Fixed Output 3.0V, SOT-23-5
+K 300mA LDO Regulator Fixed Positive Capacitor-Free
+F http://www.ti.com/lit/ds/symlink/tlv733p.pdf
+$ENDCMP
+$CMP TLV73333PDBV
+D 300mA Capacitor-Free Low Dropout Voltage Regulator, Fixed Output 3.3V, SOT-23-5
+K 300mA LDO Regulator Fixed Positive Capacitor-Free
 F http://www.ti.com/lit/ds/symlink/tlv733p.pdf
 $ENDCMP
 #
diff --git a/Regulator_Linear.lib b/Regulator_Linear.lib
index 54ac146056..761f74b6e3 100644
--- a/Regulator_Linear.lib
+++ b/Regulator_Linear.lib
@@ -728,7 +728,7 @@ F0 "U" -150 225 50 H V C CNN
 F1 "LD39015M08R" 0 225 50 H V L CNN
 F2 "Package_TO_SOT_SMD:SOT-23-5" 0 325 50 H I C CIN
 F3 "" 0 0 50 H I C CNN
-ALIAS LD39015M10R LD39015M12R LD39015M125R LD39015M15R LD39015M18R LD39015M25R LD39015M33R
+ALIAS LD39015M10R LD39015M12R LD39015M125R LD39015M15R LD39015M18R LD39015M25R LD39015M33R TLV73310PDBV TLV73311PDBV TLV73312PDBV TLV73315PDBV TLV73318PDBV TLV73325PDBV TLV733285PDBV TLV73328PDBV TLV73330PDBV TLV73333PDBV
 $FPLIST
  SOT?23*
 $ENDFPLIST
@@ -3758,26 +3758,6 @@ X OUT 5 300 100 100 L 50 50 1 1 w
 ENDDRAW
 ENDDEF
 #
-# TLV733PDBV
-#
-DEF TLV733PDBV U 0 20 Y Y 1 F N
-F0 "U" -150 250 50 H V C CNN
-F1 "TLV733PDBV" 250 250 50 H V C CNN
-F2 "Package_TO_SOT_SMD:SOT-23-5" 0 0 50 H I C CNN
-F3 "" 200 -100 50 H I C CNN
-$FPLIST
- Package*TO*SOT*SMD*SOT*23*
-$ENDFPLIST
-DRAW
-S -200 200 200 -200 0 1 10 f
-X IN 1 -300 100 100 R 50 50 1 1 W
-X GND 2 0 -300 100 U 50 50 1 1 W
-X EN 3 -300 0 100 R 50 50 1 1 I
-X NC 4 300 0 100 L 50 50 1 1 N N
-X OUT 5 300 100 100 L 50 50 1 1 w
-ENDDRAW
-ENDDEF
-#
 # TPS51200DRC
 #
 DEF TPS51200DRC U 0 20 Y Y 1 F N

From b5fe7f32ff1c58509f7020f6137f0911dac08a3a Mon Sep 17 00:00:00 2001
From: jstjst <jonas@gappert.de>
Date: Thu, 18 Apr 2019 22:42:31 +0200
Subject: [PATCH 139/201] set Pins 20/23/26 to passive

---
 Connector.lib | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Connector.lib b/Connector.lib
index 00357415ca..35edf4db58 100644
--- a/Connector.lib
+++ b/Connector.lib
@@ -10411,13 +10411,13 @@ X ~CPPE 17 600 -100 100 L 50 50 1 1 I
 X REFCLK- 18 600 100 100 L 50 50 1 1 O
 X REFCLK+ 19 600 200 100 L 50 50 1 1 O
 X USBD- 2 600 1000 100 L 50 50 1 1 B
-X GND 20 0 -1500 100 U 50 50 1 1 w N
+X GND 20 0 -1500 100 U 50 50 1 1 P N
 X PERn0/SSRX- 21 600 400 100 L 50 50 1 1 I
 X PERp0/SSRX+ 22 600 500 100 L 50 50 1 1 I
-X GND 23 0 -1500 100 U 50 50 1 1 w N
+X GND 23 0 -1500 100 U 50 50 1 1 P N
 X PETn0/SSTX- 24 600 700 100 L 50 50 1 1 O
 X PETp0/SSTX+ 25 600 800 100 L 50 50 1 1 O
-X GND 26 0 -1500 100 U 50 50 1 1 w N
+X GND 26 0 -1500 100 U 50 50 1 1 P N
 X USBD+ 3 600 1100 100 L 50 50 1 1 B
 X ~CPUSB 4 600 -800 100 L 50 50 1 1 I
 X ~USB3 5 600 -700 100 L 50 50 1 1 B

From bdfb66d5ff7b8af0ab45248ace9d6a5d8dd7d82e Mon Sep 17 00:00:00 2001
From: Tim Pambor <tp@osasysteme.de>
Date: Fri, 19 Apr 2019 11:48:33 +0200
Subject: [PATCH 140/201] Change package in description to SOP-4

---
 Relay_SolidState.dcm | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Relay_SolidState.dcm b/Relay_SolidState.dcm
index 7daec4d9c1..3efbd5e404 100644
--- a/Relay_SolidState.dcm
+++ b/Relay_SolidState.dcm
@@ -25,7 +25,7 @@ F https://docs.broadcom.com/docs/AV02-0173EN
 $ENDCMP
 #
 $CMP CPC1002N
-D Form A, Solid State Relay (Photo MOSFET) 60V, 0.7A, 0.55Ohm, SO-4
+D Form A, Solid State Relay (Photo MOSFET) 60V, 0.7A, 0.55Ohm, SOP-4
 K MOSFET Output Photorelay 1-Form-A
 F http://www.ixysic.com/home/pdfs.nsf/www/CPC1002N.pdf/$file/CPC1002N.pdf
 $ENDCMP

From 3d1f55c7b75fc78c831b686dc0f2ad096c8fe29c Mon Sep 17 00:00:00 2001
From: Tim Pambor <tp@osasysteme.de>
Date: Fri, 19 Apr 2019 11:50:26 +0200
Subject: [PATCH 141/201] Fix description

---
 Isolator.dcm | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Isolator.dcm b/Isolator.dcm
index 6e8e788bbf..8c9974145f 100644
--- a/Isolator.dcm
+++ b/Isolator.dcm
@@ -487,7 +487,7 @@ F http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=iso7342
 $ENDCMP
 #
 $CMP LTV-247
-D DC Quad Optocoupler, Vce 80V, CTR 100-600%, SOP16
+D DC Quad Optocoupler, Vce 80V, CTR 100-600%, SOP-16
 K NPN DC Quad Optocoupler
 F http://optoelectronics.liteon.com/upload/download/DS70-2009-0014/LTV-2X7%20sereis%20Mar17.PDF
 $ENDCMP

From 726f8164537fae930080663f3368249c3c39ee18 Mon Sep 17 00:00:00 2001
From: Tim Pambor <tp@osasysteme.de>
Date: Fri, 19 Apr 2019 12:15:08 +0200
Subject: [PATCH 142/201] Add TCA9554

---
 Interface_Expansion.dcm |  6 ++++++
 Interface_Expansion.lib | 34 ++++++++++++++++++++++++++++++++++
 2 files changed, 40 insertions(+)

diff --git a/Interface_Expansion.dcm b/Interface_Expansion.dcm
index d6a0be9d0a..e5203a69ee 100644
--- a/Interface_Expansion.dcm
+++ b/Interface_Expansion.dcm
@@ -198,6 +198,12 @@ K Low voltage 8-channel I2C switch with reset
 F http://www.ti.com/lit/ds/symlink/tca9548a.pdf
 $ENDCMP
 #
+$CMP TCA9554
+D 8 Bit Port/Expander, I2C SMBUS, Interrupt output, TSSOP-16, SSOP-16, SOIC-16
+K SMBUS I2C Expander
+F http://www.ti.com/lit/ds/symlink/tca9554.pdf
+$ENDCMP
+#
 $CMP TCA9555DBR
 D 16-bit I/O expander, I2C and SMBus interface, interrupts, w/ pull-ups, SSOP-24 package
 K ti parallel port
diff --git a/Interface_Expansion.lib b/Interface_Expansion.lib
index 63f4dff1d7..75c33418aa 100644
--- a/Interface_Expansion.lib
+++ b/Interface_Expansion.lib
@@ -1071,6 +1071,40 @@ X SC2 9 400 300 100 L 50 50 1 1 B
 ENDDRAW
 ENDDEF
 #
+# TCA9554
+#
+DEF TCA9554 U 0 40 Y Y 1 F N
+F0 "U" -250 500 50 H V L CNN
+F1 "TCA9554" 100 500 50 H V L CNN
+F2 "" 950 -550 50 H I C CNN
+F3 "" 100 -100 50 H I C CNN
+$FPLIST
+ TSSOP*4.4x5mm*P0.65mm*
+ SSOP*3.9x4.9mm*P0.635mm*
+ SSOP*5.3x6.2mm*P0.65mm*
+ SOIC*7.5x10.3mm*P1.27mm*
+$ENDFPLIST
+DRAW
+S -250 -550 250 450 0 1 10 f
+X A0 1 -400 -200 150 R 50 50 1 1 I
+X P5 10 400 -200 150 L 50 50 1 1 B
+X P6 11 400 -300 150 L 50 50 1 1 B
+X P7 12 400 -400 150 L 50 50 1 1 B
+X ~INT~ 13 -400 100 150 R 50 50 1 1 C
+X SCL 14 -400 300 150 R 50 50 1 1 I
+X SDA 15 -400 200 150 R 50 50 1 1 B
+X VDD 16 0 600 150 D 50 50 1 1 W
+X A1 2 -400 -300 150 R 50 50 1 1 I
+X A2 3 -400 -400 150 R 50 50 1 1 I
+X P0 4 400 300 150 L 50 50 1 1 B
+X P1 5 400 200 150 L 50 50 1 1 B
+X P2 6 400 100 150 L 50 50 1 1 B
+X P3 7 400 0 150 L 50 50 1 1 B
+X GND 8 0 -700 150 U 50 50 1 1 W
+X P4 9 400 -100 150 L 50 50 1 1 B
+ENDDRAW
+ENDDEF
+#
 # TPIC6595
 #
 DEF TPIC6595 U 0 15 Y Y 1 F N

From 6ddcebed99090cc1da64c99fb4f2af928ac7c139 Mon Sep 17 00:00:00 2001
From: Tim Pambor <tp@osasysteme.de>
Date: Fri, 19 Apr 2019 12:18:22 +0200
Subject: [PATCH 143/201] Correct footprint of TCA9534 from SO-20 to SO-16

---
 Interface_Expansion.dcm | 2 +-
 Interface_Expansion.lib | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/Interface_Expansion.dcm b/Interface_Expansion.dcm
index d6a0be9d0a..221812428e 100644
--- a/Interface_Expansion.dcm
+++ b/Interface_Expansion.dcm
@@ -133,7 +133,7 @@ F http://www.st.com/resource/en/datasheet/stmpe1600.pdf
 $ENDCMP
 #
 $CMP TCA9534
-D 8 Bit Port/Expander, I2C SMBUS, Interrupt output, TSSOP-16, SOIC-20
+D 8 Bit Port/Expander, I2C SMBUS, Interrupt output, TSSOP-16, SOIC-16
 K SMBUS I2C Expander
 F http://www.ti.com/lit/ds/symlink/tca9534.pdf
 $ENDCMP
diff --git a/Interface_Expansion.lib b/Interface_Expansion.lib
index 63f4dff1d7..dbfec8d9a8 100644
--- a/Interface_Expansion.lib
+++ b/Interface_Expansion.lib
@@ -812,7 +812,7 @@ F2 "" 950 -550 50 H I C CNN
 F3 "" 100 -100 50 H I C CNN
 $FPLIST
  TSSOP*4.4x5mm*P0.65mm*
- SOIC*7.5x12.8mm*P1.27mm*
+ SOIC*7.5x10.3mm*P1.27mm*
 $ENDFPLIST
 DRAW
 S -250 -550 250 450 0 1 10 f

From de9e8f1a7695fab71c2d79c461ae3f569b7ce637 Mon Sep 17 00:00:00 2001
From: Tim Pambor <tp@osasysteme.de>
Date: Fri, 19 Apr 2019 12:32:18 +0200
Subject: [PATCH 144/201] Change pin offset to 20mil

---
 Interface_Expansion.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Interface_Expansion.lib b/Interface_Expansion.lib
index 75c33418aa..95a29f28f8 100644
--- a/Interface_Expansion.lib
+++ b/Interface_Expansion.lib
@@ -1073,7 +1073,7 @@ ENDDEF
 #
 # TCA9554
 #
-DEF TCA9554 U 0 40 Y Y 1 F N
+DEF TCA9554 U 0 20 Y Y 1 F N
 F0 "U" -250 500 50 H V L CNN
 F1 "TCA9554" 100 500 50 H V L CNN
 F2 "" 950 -550 50 H I C CNN

From 561afc1f0caa51a109e9cc4b0bcdd254347ea2fd Mon Sep 17 00:00:00 2001
From: Tim Pambor <tp@osasysteme.de>
Date: Fri, 19 Apr 2019 12:33:25 +0200
Subject: [PATCH 145/201] Change pin name offset to 20mil

---
 Interface_Expansion.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Interface_Expansion.lib b/Interface_Expansion.lib
index dbfec8d9a8..42b0908e76 100644
--- a/Interface_Expansion.lib
+++ b/Interface_Expansion.lib
@@ -805,7 +805,7 @@ ENDDEF
 #
 # TCA9534
 #
-DEF TCA9534 U 0 40 Y Y 1 F N
+DEF TCA9534 U 0 20 Y Y 1 F N
 F0 "U" -250 500 50 H V L CNN
 F1 "TCA9534" 100 500 50 H V L CNN
 F2 "" 950 -550 50 H I C CNN

From 675da11c87fc2d9b42ea85f0ac5de863fe5aa8a0 Mon Sep 17 00:00:00 2001
From: andreil <andreil499@gmail.com>
Date: Fri, 19 Apr 2019 15:07:31 +0300
Subject: [PATCH 146/201] Fix pinout TXB0108DQSR

---
 Logic_LevelTranslator.lib | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/Logic_LevelTranslator.lib b/Logic_LevelTranslator.lib
index 95c97b960d..4bc87a08f3 100644
--- a/Logic_LevelTranslator.lib
+++ b/Logic_LevelTranslator.lib
@@ -836,15 +836,15 @@ DRAW
 S -300 600 300 -600 0 1 10 f
 X A1 1 -400 300 100 R 50 50 1 1 B
 X A8 10 -400 -400 100 R 50 50 1 1 B
-X GND 11 0 -700 100 U 50 50 1 1 W
-X B8 12 400 -400 100 L 50 50 1 1 B
-X B7 13 400 -300 100 L 50 50 1 1 B
-X B6 14 400 -200 100 L 50 50 1 1 B
-X B5 15 400 -100 100 L 50 50 1 1 B
-X B4 16 400 0 100 L 50 50 1 1 B
-X B3 17 400 100 100 L 50 50 1 1 B
-X B2 18 400 200 100 L 50 50 1 1 B
-X VCCB 19 100 700 100 D 50 50 1 1 W
+X B8 11 400 -400 100 L 50 50 1 1 B
+X B7 12 400 -300 100 L 50 50 1 1 B
+X B6 13 400 -200 100 L 50 50 1 1 B
+X B5 14 400 -100 100 L 50 50 1 1 B
+X GND 15 0 -700 100 U 50 50 1 1 W
+X VCCB 16 100 700 100 D 50 50 1 1 W
+X B4 17 400 0 100 L 50 50 1 1 B
+X B3 18 400 100 100 L 50 50 1 1 B
+X B2 19 400 200 100 L 50 50 1 1 B
 X A2 2 -400 200 100 R 50 50 1 1 B
 X B1 20 400 300 100 L 50 50 1 1 B
 X A3 3 -400 100 100 R 50 50 1 1 B

From 9aeeeee561c6430fa550f1ab90e4a9b849459205 Mon Sep 17 00:00:00 2001
From: Jorge Neiva <jneiva08@gmail.com>
Date: Fri, 19 Apr 2019 14:30:54 +0100
Subject: [PATCH 147/201] Split symbol for each packaged Changed SW to open
 collector Changed FB, VC, RT and SS to passive

---
 Regulator_Switching.dcm |  4 ++--
 Regulator_Switching.lib | 42 +++++++++++++++++++++++++++++++----------
 2 files changed, 34 insertions(+), 12 deletions(-)

diff --git a/Regulator_Switching.dcm b/Regulator_Switching.dcm
index 77727499f1..c9a3a70e8a 100644
--- a/Regulator_Switching.dcm
+++ b/Regulator_Switching.dcm
@@ -2430,13 +2430,13 @@ K DC/DC converter CCD Bias Boost
 F https://www.analog.com/media/en/technical-documentation/data-sheets/3472f.pdf
 $ENDCMP
 #
-$CMP LT3580EDD
+$CMP LT3580xDD
 D Boost/Inverting DC/DC Converter with 2A Switch, Soft-Start, and Synchronization, DFN-8
 K boost inverting dc-dc
 F https://www.analog.com/media/en/technical-documentation/data-sheets/3580fg.pdf
 $ENDCMP
 #
-$CMP LT3580EMS8E
+$CMP LT3580xMS8E
 D Boost/Inverting DC/DC Converter with 2A Switch, Soft-Start, and Synchronization, MSOP-8
 K boost inverting dc-dc
 F https://www.analog.com/media/en/technical-documentation/data-sheets/3580fg.pdf
diff --git a/Regulator_Switching.lib b/Regulator_Switching.lib
index 90192db8c3..c9335b17ac 100644
--- a/Regulator_Switching.lib
+++ b/Regulator_Switching.lib
@@ -2839,27 +2839,49 @@ X SSP 9 -100 -500 100 U 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #
-# LT3580EDD
+# LT3580xDD
 #
-DEF LT3580EDD U 0 20 Y Y 1 F N
+DEF LT3580xDD U 0 20 Y Y 1 F N
 F0 "U" -250 450 50 H V C CNN
-F1 "LT3580EDD" 250 450 50 H V C CNN
-F2 "" 0 -450 50 H I C CNN
+F1 "LT3580xDD" 250 450 50 H V C CNN
+F2 "Package_DFN_QFN:DFN-8-1EP_3x3mm_P0.5mm_EP1.66x2.38mm" 1250 -450 50 H I C CNN
 F3 "" -1550 -400 50 H I C CNN
-ALIAS LT3580EMS8E
 $FPLIST
  DFN*1EP*3x3mm*P0.5mm*
+$ENDFPLIST
+DRAW
+S -300 400 300 -400 0 1 10 f
+X FB 1 400 -100 100 L 50 50 1 1 P
+X VC 2 -400 0 100 R 50 50 1 1 P
+X VIN 3 0 500 100 D 50 50 1 1 W
+X SW 4 400 200 100 L 50 50 1 1 C
+X ~SHDN 5 -400 200 100 R 50 50 1 1 I
+X RT 6 -400 -100 100 R 50 50 1 1 P
+X SS 7 -400 -200 100 R 50 50 1 1 P
+X SYNC 8 400 -200 100 L 50 50 1 1 I
+X GND 9 0 -500 100 U 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# LT3580xMS8E
+#
+DEF LT3580xMS8E U 0 20 Y Y 1 F N
+F0 "U" -250 450 50 H V C CNN
+F1 "LT3580xMS8E" 300 450 50 H V C CNN
+F2 "Package_SO:MSOP-8-1EP_3x3mm_P0.65mm_EP1.68x1.88mm" 1200 -450 50 H I C CNN
+F3 "" -1550 -400 50 H I C CNN
+$FPLIST
  MSOP*1EP*3x3mm*P0.65mm*
 $ENDFPLIST
 DRAW
 S -300 400 300 -400 0 1 10 f
-X FB 1 400 -100 100 L 50 50 1 1 I
-X VC 2 -400 0 100 R 50 50 1 1 I
+X FB 1 400 -100 100 L 50 50 1 1 P
+X VC 2 -400 0 100 R 50 50 1 1 P
 X VIN 3 0 500 100 D 50 50 1 1 W
-X SW 4 400 200 100 L 50 50 1 1 I
+X SW 4 400 200 100 L 50 50 1 1 C
 X ~SHDN 5 -400 200 100 R 50 50 1 1 I
-X RT 6 -400 -100 100 R 50 50 1 1 I
-X SS 7 -400 -200 100 R 50 50 1 1 I
+X RT 6 -400 -100 100 R 50 50 1 1 P
+X SS 7 -400 -200 100 R 50 50 1 1 P
 X SYNC 8 400 -200 100 L 50 50 1 1 I
 X GND 9 0 -500 100 U 50 50 1 1 W
 ENDDRAW

From e0228c6139e73891b5638474d221bcc0bb8f23da Mon Sep 17 00:00:00 2001
From: Tim Pambor <tp@osasysteme.de>
Date: Fri, 19 Apr 2019 17:17:05 +0200
Subject: [PATCH 148/201] Add alias of TPS7A90 to TPS7A91

---
 Regulator_Linear.dcm | 6 ++++++
 Regulator_Linear.lib | 1 +
 2 files changed, 7 insertions(+)

diff --git a/Regulator_Linear.dcm b/Regulator_Linear.dcm
index e25fe3c3fb..06f493d3e1 100644
--- a/Regulator_Linear.dcm
+++ b/Regulator_Linear.dcm
@@ -6548,6 +6548,12 @@ K linear regulator ldo voltage
 F http://www.ti.com/lit/ds/symlink/tps7a7200.pdf
 $ENDCMP
 #
+$CMP TPS7A90
+D 0.5A, High-Accuracy, Low-Noise LDO Voltage Regulator, Texas S-PDSO-N10
+K LDO voltage regulator
+F http://www.ti.com/lit/ds/symlink/tps7a90.pdf
+$ENDCMP
+#
 $CMP TPS7A91
 D 1A, High-Accuracy, Low-Noise LDO Voltage Regulator, Texas S-PDSO-N10
 K LDO voltage regulator
diff --git a/Regulator_Linear.lib b/Regulator_Linear.lib
index 761f74b6e3..42cad01c0e 100644
--- a/Regulator_Linear.lib
+++ b/Regulator_Linear.lib
@@ -4596,6 +4596,7 @@ F0 "U" -250 450 50 H V C CNN
 F1 "TPS7A91" 150 450 50 H V C CNN
 F2 "Package_DFN_QFN:Texas_S-PDSO-N10_EP1.2x2mm" 0 50 50 H I C CNN
 F3 "" 0 100 50 H I C CNN
+ALIAS TPS7A90
 $FPLIST
  Texas*S*PDSO*
 $ENDFPLIST

From fdb6241d28f4a95a37f99b8d0017e4f68842a9ff Mon Sep 17 00:00:00 2001
From: Jorge Neiva <jneiva08@gmail.com>
Date: Fri, 19 Apr 2019 16:20:02 +0100
Subject: [PATCH 149/201] Add LT3514 QFN-28

---
 Regulator_Switching.dcm |  6 ++++++
 Regulator_Switching.lib | 44 +++++++++++++++++++++++++++++++++++++++++
 2 files changed, 50 insertions(+)

diff --git a/Regulator_Switching.dcm b/Regulator_Switching.dcm
index 9e86df9f61..b2b089f2af 100644
--- a/Regulator_Switching.dcm
+++ b/Regulator_Switching.dcm
@@ -2430,6 +2430,12 @@ K DC/DC converter CCD Bias Boost
 F https://www.analog.com/media/en/technical-documentation/data-sheets/3472f.pdf
 $ENDCMP
 #
+$CMP LT3514xUFD
+D Triple Step-Down Switching Regulator with 100% Duty Cycle Operation, QFN-28
+K triple step-down
+F https://www.analog.com/media/en/technical-documentation/data-sheets/3514fa.pdf
+$ENDCMP
+#
 $CMP LT3748xMS
 D 100V Isolated Flyback Controller, MSOP-16
 K isolated flyback controller
diff --git a/Regulator_Switching.lib b/Regulator_Switching.lib
index e1f71cbf08..12c041a3b8 100644
--- a/Regulator_Switching.lib
+++ b/Regulator_Switching.lib
@@ -2839,6 +2839,50 @@ X SSP 9 -100 -500 100 U 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #
+# LT3514xUFD
+#
+DEF LT3514xUFD U 0 20 Y Y 1 F N
+F0 "U" -300 950 50 H V C CNN
+F1 "LT3514xUFD" 300 950 50 H V C CNN
+F2 "Package_DFN_QFN:QFN-28-1EP_4x5mm_P0.5mm_EP2.65x3.65mm_ThermalVias" 1550 -950 50 H I C CNN
+F3 "" -300 950 50 H I C CNN
+$FPLIST
+ QFN*4x5mm*P0.5mm*EP2.65x3.65mm*
+$ENDFPLIST
+DRAW
+S -400 900 400 -900 0 1 10 f
+X NC 1 -400 200 100 R 50 50 1 1 N N
+X GND 10 0 -1000 100 U 50 50 1 1 P N
+X VIN 11 0 1000 100 D 50 50 1 1 P N
+X RUN/SS4 12 -500 -500 100 R 50 50 1 1 I
+X RUN/SS1 13 -500 -300 100 R 50 50 1 1 I
+X NC 14 -400 -100 100 R 50 50 1 1 N N
+X RUN/SS3 15 -500 -400 100 R 50 50 1 1 I
+X EN/UVLO 16 -500 700 100 R 50 50 1 1 I
+X RT/SYNC 17 -500 -700 100 R 50 50 1 1 P
+X GND 18 0 -1000 100 U 50 50 1 1 P N
+X FB4 19 500 -800 100 L 50 50 1 1 P
+X NC 2 -400 100 100 R 50 50 1 1 N N
+X FB1 20 500 400 100 L 50 50 1 1 P
+X FB3 21 500 -200 100 L 50 50 1 1 P
+X NC 22 -400 -200 100 R 50 50 1 1 N N
+X PG 23 -500 0 100 R 50 50 1 1 C
+X SW5 24 -500 500 100 R 50 50 1 1 C
+X SKY 25 -500 300 100 R 50 50 1 1 O
+X VIN 26 0 1000 100 D 50 50 1 1 P N
+X GND 27 0 -1000 100 U 50 50 1 1 P N
+X VIN 28 0 1000 100 D 50 50 1 1 W
+X GND 29 0 -1000 100 U 50 50 1 1 W
+X DA3 3 500 -100 100 L 50 50 1 1 P
+X SW3 4 500 100 100 L 50 50 1 1 O
+X SW1 5 500 700 100 L 50 50 1 1 O
+X DA1 6 500 500 100 L 50 50 1 1 P
+X SW4 7 500 -500 100 L 50 50 1 1 O
+X DA4 8 500 -700 100 L 50 50 1 1 P
+X VIN 9 0 1000 100 D 50 50 1 1 P N
+ENDDRAW
+ENDDEF
+#
 # LT3748xMS
 #
 DEF LT3748xMS U 0 20 Y Y 1 F N

From c01b45fc270064555facfb0096c8be9ab9f91642 Mon Sep 17 00:00:00 2001
From: Jorge Neiva <jneiva08@gmail.com>
Date: Fri, 19 Apr 2019 21:14:02 +0100
Subject: [PATCH 150/201] Changed footpint filter Moved placed EN/UVLO Changed
 SWx to Power Output Changed DAx and FBx to Input Changed SKY to passive

---
 Regulator_Switching.lib | 26 +++++++++++++-------------
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/Regulator_Switching.lib b/Regulator_Switching.lib
index 12c041a3b8..0e3815b1d7 100644
--- a/Regulator_Switching.lib
+++ b/Regulator_Switching.lib
@@ -2847,7 +2847,7 @@ F1 "LT3514xUFD" 300 950 50 H V C CNN
 F2 "Package_DFN_QFN:QFN-28-1EP_4x5mm_P0.5mm_EP2.65x3.65mm_ThermalVias" 1550 -950 50 H I C CNN
 F3 "" -300 950 50 H I C CNN
 $FPLIST
- QFN*4x5mm*P0.5mm*EP2.65x3.65mm*
+ QFN*4x5mm*P0.5mm*
 $ENDFPLIST
 DRAW
 S -400 900 400 -900 0 1 10 f
@@ -2858,27 +2858,27 @@ X RUN/SS4 12 -500 -500 100 R 50 50 1 1 I
 X RUN/SS1 13 -500 -300 100 R 50 50 1 1 I
 X NC 14 -400 -100 100 R 50 50 1 1 N N
 X RUN/SS3 15 -500 -400 100 R 50 50 1 1 I
-X EN/UVLO 16 -500 700 100 R 50 50 1 1 I
+X EN/UVLO 16 -500 300 100 R 50 50 1 1 I
 X RT/SYNC 17 -500 -700 100 R 50 50 1 1 P
 X GND 18 0 -1000 100 U 50 50 1 1 P N
-X FB4 19 500 -800 100 L 50 50 1 1 P
+X FB4 19 500 -800 100 L 50 50 1 1 I
 X NC 2 -400 100 100 R 50 50 1 1 N N
-X FB1 20 500 400 100 L 50 50 1 1 P
-X FB3 21 500 -200 100 L 50 50 1 1 P
+X FB1 20 500 400 100 L 50 50 1 1 I
+X FB3 21 500 -200 100 L 50 50 1 1 I
 X NC 22 -400 -200 100 R 50 50 1 1 N N
 X PG 23 -500 0 100 R 50 50 1 1 C
-X SW5 24 -500 500 100 R 50 50 1 1 C
-X SKY 25 -500 300 100 R 50 50 1 1 O
+X SW5 24 -500 700 100 R 50 50 1 1 C
+X SKY 25 -500 500 100 R 50 50 1 1 P
 X VIN 26 0 1000 100 D 50 50 1 1 P N
 X GND 27 0 -1000 100 U 50 50 1 1 P N
 X VIN 28 0 1000 100 D 50 50 1 1 W
 X GND 29 0 -1000 100 U 50 50 1 1 W
-X DA3 3 500 -100 100 L 50 50 1 1 P
-X SW3 4 500 100 100 L 50 50 1 1 O
-X SW1 5 500 700 100 L 50 50 1 1 O
-X DA1 6 500 500 100 L 50 50 1 1 P
-X SW4 7 500 -500 100 L 50 50 1 1 O
-X DA4 8 500 -700 100 L 50 50 1 1 P
+X DA3 3 500 -100 100 L 50 50 1 1 I
+X SW3 4 500 100 100 L 50 50 1 1 w
+X SW1 5 500 700 100 L 50 50 1 1 w
+X DA1 6 500 500 100 L 50 50 1 1 I
+X SW4 7 500 -500 100 L 50 50 1 1 w
+X DA4 8 500 -700 100 L 50 50 1 1 I
 X VIN 9 0 1000 100 D 50 50 1 1 P N
 ENDDRAW
 ENDDEF

From afa68d73adb79140a8bc5a2da964c587b7b81d36 Mon Sep 17 00:00:00 2001
From: Jorge Neiva <jneiva08@gmail.com>
Date: Fri, 19 Apr 2019 21:17:29 +0100
Subject: [PATCH 151/201] Changed FB to Input

---
 Regulator_Switching.lib | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Regulator_Switching.lib b/Regulator_Switching.lib
index c9335b17ac..2ee2469bcf 100644
--- a/Regulator_Switching.lib
+++ b/Regulator_Switching.lib
@@ -2851,7 +2851,7 @@ $FPLIST
 $ENDFPLIST
 DRAW
 S -300 400 300 -400 0 1 10 f
-X FB 1 400 -100 100 L 50 50 1 1 P
+X FB 1 400 -100 100 L 50 50 1 1 I
 X VC 2 -400 0 100 R 50 50 1 1 P
 X VIN 3 0 500 100 D 50 50 1 1 W
 X SW 4 400 200 100 L 50 50 1 1 C
@@ -2875,7 +2875,7 @@ $FPLIST
 $ENDFPLIST
 DRAW
 S -300 400 300 -400 0 1 10 f
-X FB 1 400 -100 100 L 50 50 1 1 P
+X FB 1 400 -100 100 L 50 50 1 1 I
 X VC 2 -400 0 100 R 50 50 1 1 P
 X VIN 3 0 500 100 D 50 50 1 1 W
 X SW 4 400 200 100 L 50 50 1 1 C

From 1fd1e7b0e7ea2b6d45ff6b800f300b976965c8e2 Mon Sep 17 00:00:00 2001
From: Jorge Neiva <jneiva08@gmail.com>
Date: Fri, 19 Apr 2019 22:04:28 +0100
Subject: [PATCH 152/201] Fixed missing $ENDCMP

---
 Regulator_Switching.dcm | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Regulator_Switching.dcm b/Regulator_Switching.dcm
index 3e5b6c56af..9bbfb91c67 100644
--- a/Regulator_Switching.dcm
+++ b/Regulator_Switching.dcm
@@ -2434,6 +2434,7 @@ $CMP LT3514xUFD
 D Triple Step-Down Switching Regulator with 100% Duty Cycle Operation, QFN-28
 K triple step-down
 F https://www.analog.com/media/en/technical-documentation/data-sheets/3514fa.pdf
+$ENDCMP
 #
 $CMP LT3580xDD
 D Boost/Inverting DC/DC Converter with 2A Switch, Soft-Start, and Synchronization, DFN-8

From 636249373d22ac501fb0cefb5ff9f4a9c4f8c260 Mon Sep 17 00:00:00 2001
From: Roger Jia Rong Jhang <roger225@gmail.com>
Date: Sat, 20 Apr 2019 14:26:43 +0800
Subject: [PATCH 153/201] revise TXS0102DCT, TXS0102DCU after review

---
 Logic_LevelTranslator.lib | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Logic_LevelTranslator.lib b/Logic_LevelTranslator.lib
index 0521d011bc..3193d056ce 100644
--- a/Logic_LevelTranslator.lib
+++ b/Logic_LevelTranslator.lib
@@ -916,7 +916,7 @@ F1 "TXS0102DCT" 150 450 50 H V L CNN
 F2 "Package_SO:SSOP-8_2.95x2.8mm_P0.65mm" 0 -550 50 H I C CNN
 F3 "" 0 -20 50 H I C CNN
 $FPLIST
- SSOP*P0.65mm*
+ SSOP*2.95x2.8mm*P0.65mm*
 $ENDFPLIST
 DRAW
 S -300 400 300 -400 0 1 10 f
@@ -950,10 +950,10 @@ ENDDEF
 DEF TXS0102DCU U 0 20 Y Y 1 F N
 F0 "U" -250 450 50 H V C CNN
 F1 "TXS0102DCU" 150 450 50 H V L CNN
-F2 "Package_SO:VSSOP-8_2.4x2.1mm_P0.5mm" 0 -550 50 H I C CNN
+F2 "Package_SO:VSSOP-8_2.3x2mm_P0.5mm" 0 -550 50 H I C CNN
 F3 "" 0 -20 50 H I C CNN
 $FPLIST
- VSSOP*P0.5mm*
+ VSSOP*2.3x2.0mm*P0.5mm*
 $ENDFPLIST
 DRAW
 S -300 400 300 -400 0 1 10 f

From 7c088a0af2363e683c23a56f653a8e26d28a62d1 Mon Sep 17 00:00:00 2001
From: Roger Jia Rong Jhang <roger225@gmail.com>
Date: Sat, 20 Apr 2019 14:38:50 +0800
Subject: [PATCH 154/201] fix Footprint filters for TXS0102DCU

---
 Logic_LevelTranslator.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Logic_LevelTranslator.lib b/Logic_LevelTranslator.lib
index 3193d056ce..551615f223 100644
--- a/Logic_LevelTranslator.lib
+++ b/Logic_LevelTranslator.lib
@@ -953,7 +953,7 @@ F1 "TXS0102DCU" 150 450 50 H V L CNN
 F2 "Package_SO:VSSOP-8_2.3x2mm_P0.5mm" 0 -550 50 H I C CNN
 F3 "" 0 -20 50 H I C CNN
 $FPLIST
- VSSOP*2.3x2.0mm*P0.5mm*
+ VSSOP*2.3x2mm*P0.5mm*
 $ENDFPLIST
 DRAW
 S -300 400 300 -400 0 1 10 f

From e03ca4aa534d9bf8fe431aacbdaa053a6d9e8e83 Mon Sep 17 00:00:00 2001
From: Tim Pambor <tp@osasysteme.de>
Date: Sat, 20 Apr 2019 09:42:27 +0200
Subject: [PATCH 155/201] Change pin length to 100mil

---
 Interface_Expansion.lib | 32 ++++++++++++++++----------------
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/Interface_Expansion.lib b/Interface_Expansion.lib
index 95a29f28f8..7da611b531 100644
--- a/Interface_Expansion.lib
+++ b/Interface_Expansion.lib
@@ -1086,22 +1086,22 @@ $FPLIST
 $ENDFPLIST
 DRAW
 S -250 -550 250 450 0 1 10 f
-X A0 1 -400 -200 150 R 50 50 1 1 I
-X P5 10 400 -200 150 L 50 50 1 1 B
-X P6 11 400 -300 150 L 50 50 1 1 B
-X P7 12 400 -400 150 L 50 50 1 1 B
-X ~INT~ 13 -400 100 150 R 50 50 1 1 C
-X SCL 14 -400 300 150 R 50 50 1 1 I
-X SDA 15 -400 200 150 R 50 50 1 1 B
-X VDD 16 0 600 150 D 50 50 1 1 W
-X A1 2 -400 -300 150 R 50 50 1 1 I
-X A2 3 -400 -400 150 R 50 50 1 1 I
-X P0 4 400 300 150 L 50 50 1 1 B
-X P1 5 400 200 150 L 50 50 1 1 B
-X P2 6 400 100 150 L 50 50 1 1 B
-X P3 7 400 0 150 L 50 50 1 1 B
-X GND 8 0 -700 150 U 50 50 1 1 W
-X P4 9 400 -100 150 L 50 50 1 1 B
+X A0 1 -350 -200 100 R 50 50 1 1 I
+X P5 10 350 -200 100 L 50 50 1 1 B
+X P6 11 350 -300 100 L 50 50 1 1 B
+X P7 12 350 -400 100 L 50 50 1 1 B
+X ~INT~ 13 -350 100 100 R 50 50 1 1 C
+X SCL 14 -350 300 100 R 50 50 1 1 I
+X SDA 15 -350 200 100 R 50 50 1 1 B
+X VDD 16 0 550 100 D 50 50 1 1 W
+X A1 2 -350 -300 100 R 50 50 1 1 I
+X A2 3 -350 -400 100 R 50 50 1 1 I
+X P0 4 350 300 100 L 50 50 1 1 B
+X P1 5 350 200 100 L 50 50 1 1 B
+X P2 6 350 100 100 L 50 50 1 1 B
+X P3 7 350 0 100 L 50 50 1 1 B
+X GND 8 0 -650 100 U 50 50 1 1 W
+X P4 9 350 -100 100 L 50 50 1 1 B
 ENDDRAW
 ENDDEF
 #

From c73f522d8f3d3fb22078f578f818efb76c371827 Mon Sep 17 00:00:00 2001
From: Tim Pambor <tp@osasysteme.de>
Date: Sat, 20 Apr 2019 10:04:42 +0200
Subject: [PATCH 156/201] Add TCA9554PWR

---
 Interface_Expansion.dcm |  4 ++--
 Interface_Expansion.lib | 11 ++++-------
 2 files changed, 6 insertions(+), 9 deletions(-)

diff --git a/Interface_Expansion.dcm b/Interface_Expansion.dcm
index e5203a69ee..c1ed8fb64e 100644
--- a/Interface_Expansion.dcm
+++ b/Interface_Expansion.dcm
@@ -198,8 +198,8 @@ K Low voltage 8-channel I2C switch with reset
 F http://www.ti.com/lit/ds/symlink/tca9548a.pdf
 $ENDCMP
 #
-$CMP TCA9554
-D 8 Bit Port/Expander, I2C SMBUS, Interrupt output, TSSOP-16, SSOP-16, SOIC-16
+$CMP TCA9554PWR
+D 8 Bit Port/Expander, I2C SMBUS, Interrupt output, TSSOP-16
 K SMBUS I2C Expander
 F http://www.ti.com/lit/ds/symlink/tca9554.pdf
 $ENDCMP
diff --git a/Interface_Expansion.lib b/Interface_Expansion.lib
index 7da611b531..481bbb01aa 100644
--- a/Interface_Expansion.lib
+++ b/Interface_Expansion.lib
@@ -1071,18 +1071,15 @@ X SC2 9 400 300 100 L 50 50 1 1 B
 ENDDRAW
 ENDDEF
 #
-# TCA9554
+# TCA9554PWR
 #
-DEF TCA9554 U 0 20 Y Y 1 F N
+DEF TCA9554PWR U 0 20 Y Y 1 F N
 F0 "U" -250 500 50 H V L CNN
-F1 "TCA9554" 100 500 50 H V L CNN
-F2 "" 950 -550 50 H I C CNN
+F1 "TCA9554PWR" 100 500 50 H V L CNN
+F2 "Package_SO:TSSOP-16_4.4x5mm_P0.65mm" 950 -550 50 H I C CNN
 F3 "" 100 -100 50 H I C CNN
 $FPLIST
  TSSOP*4.4x5mm*P0.65mm*
- SSOP*3.9x4.9mm*P0.635mm*
- SSOP*5.3x6.2mm*P0.65mm*
- SOIC*7.5x10.3mm*P1.27mm*
 $ENDFPLIST
 DRAW
 S -250 -550 250 450 0 1 10 f

From f532d25adb9d02e24ea918ace2a5199dce9422ca Mon Sep 17 00:00:00 2001
From: Tim Pambor <tp@osasysteme.de>
Date: Sat, 20 Apr 2019 10:09:23 +0200
Subject: [PATCH 157/201] Add TCA9554DBQR

---
 Interface_Expansion.dcm |  6 ++++++
 Interface_Expansion.lib | 31 +++++++++++++++++++++++++++++++
 2 files changed, 37 insertions(+)

diff --git a/Interface_Expansion.dcm b/Interface_Expansion.dcm
index c1ed8fb64e..ac7a395624 100644
--- a/Interface_Expansion.dcm
+++ b/Interface_Expansion.dcm
@@ -198,6 +198,12 @@ K Low voltage 8-channel I2C switch with reset
 F http://www.ti.com/lit/ds/symlink/tca9548a.pdf
 $ENDCMP
 #
+$CMP TCA9554DBQR
+D 8 Bit Port/Expander, I2C SMBUS, Interrupt output, SSOP-16
+K SMBUS I2C Expander
+F http://www.ti.com/lit/ds/symlink/tca9554.pdf
+$ENDCMP
+#
 $CMP TCA9554PWR
 D 8 Bit Port/Expander, I2C SMBUS, Interrupt output, TSSOP-16
 K SMBUS I2C Expander
diff --git a/Interface_Expansion.lib b/Interface_Expansion.lib
index 481bbb01aa..c72e13f001 100644
--- a/Interface_Expansion.lib
+++ b/Interface_Expansion.lib
@@ -1071,6 +1071,37 @@ X SC2 9 400 300 100 L 50 50 1 1 B
 ENDDRAW
 ENDDEF
 #
+# TCA9554DBQR
+#
+DEF TCA9554DBQR U 0 20 Y Y 1 F N
+F0 "U" -250 500 50 H V L CNN
+F1 "TCA9554DBQR" 100 500 50 H V L CNN
+F2 "Package_SO:SSOP-16_3.9x4.9mm_P0.635mm" 950 -550 50 H I C CNN
+F3 "" 100 -100 50 H I C CNN
+$FPLIST
+ SSOP*3.9x4.9mm*P0.635mm*
+$ENDFPLIST
+DRAW
+S -250 -550 250 450 0 1 10 f
+X A0 1 -350 -200 100 R 50 50 1 1 I
+X P5 10 350 -200 100 L 50 50 1 1 B
+X P6 11 350 -300 100 L 50 50 1 1 B
+X P7 12 350 -400 100 L 50 50 1 1 B
+X ~INT~ 13 -350 100 100 R 50 50 1 1 C
+X SCL 14 -350 300 100 R 50 50 1 1 I
+X SDA 15 -350 200 100 R 50 50 1 1 B
+X VDD 16 0 550 100 D 50 50 1 1 W
+X A1 2 -350 -300 100 R 50 50 1 1 I
+X A2 3 -350 -400 100 R 50 50 1 1 I
+X P0 4 350 300 100 L 50 50 1 1 B
+X P1 5 350 200 100 L 50 50 1 1 B
+X P2 6 350 100 100 L 50 50 1 1 B
+X P3 7 350 0 100 L 50 50 1 1 B
+X GND 8 0 -650 100 U 50 50 1 1 W
+X P4 9 350 -100 100 L 50 50 1 1 B
+ENDDRAW
+ENDDEF
+#
 # TCA9554PWR
 #
 DEF TCA9554PWR U 0 20 Y Y 1 F N

From 44097f6c3e9b470a7d285d9236e3ac83a669fd76 Mon Sep 17 00:00:00 2001
From: Tim Pambor <tp@osasysteme.de>
Date: Sat, 20 Apr 2019 10:09:58 +0200
Subject: [PATCH 158/201] Add TCA9554DBR

---
 Interface_Expansion.dcm |  6 ++++++
 Interface_Expansion.lib | 31 +++++++++++++++++++++++++++++++
 2 files changed, 37 insertions(+)

diff --git a/Interface_Expansion.dcm b/Interface_Expansion.dcm
index ac7a395624..9ad14932ab 100644
--- a/Interface_Expansion.dcm
+++ b/Interface_Expansion.dcm
@@ -204,6 +204,12 @@ K SMBUS I2C Expander
 F http://www.ti.com/lit/ds/symlink/tca9554.pdf
 $ENDCMP
 #
+$CMP TCA9554DBR
+D 8 Bit Port/Expander, I2C SMBUS, Interrupt output, SSOP-16
+K SMBUS I2C Expander
+F http://www.ti.com/lit/ds/symlink/tca9554.pdf
+$ENDCMP
+#
 $CMP TCA9554PWR
 D 8 Bit Port/Expander, I2C SMBUS, Interrupt output, TSSOP-16
 K SMBUS I2C Expander
diff --git a/Interface_Expansion.lib b/Interface_Expansion.lib
index c72e13f001..e5ecabb13e 100644
--- a/Interface_Expansion.lib
+++ b/Interface_Expansion.lib
@@ -1102,6 +1102,37 @@ X P4 9 350 -100 100 L 50 50 1 1 B
 ENDDRAW
 ENDDEF
 #
+# TCA9554DBR
+#
+DEF TCA9554DBR U 0 20 Y Y 1 F N
+F0 "U" -250 500 50 H V L CNN
+F1 "TCA9554DBR" 100 500 50 H V L CNN
+F2 "Package_SO:SSOP-16_5.3x6.2mm_P0.65mm" 950 -550 50 H I C CNN
+F3 "" 100 -100 50 H I C CNN
+$FPLIST
+ SSOP*5.3x6.2mm*P0.65mm*
+$ENDFPLIST
+DRAW
+S -250 -550 250 450 0 1 10 f
+X A0 1 -350 -200 100 R 50 50 1 1 I
+X P5 10 350 -200 100 L 50 50 1 1 B
+X P6 11 350 -300 100 L 50 50 1 1 B
+X P7 12 350 -400 100 L 50 50 1 1 B
+X ~INT~ 13 -350 100 100 R 50 50 1 1 C
+X SCL 14 -350 300 100 R 50 50 1 1 I
+X SDA 15 -350 200 100 R 50 50 1 1 B
+X VDD 16 0 550 100 D 50 50 1 1 W
+X A1 2 -350 -300 100 R 50 50 1 1 I
+X A2 3 -350 -400 100 R 50 50 1 1 I
+X P0 4 350 300 100 L 50 50 1 1 B
+X P1 5 350 200 100 L 50 50 1 1 B
+X P2 6 350 100 100 L 50 50 1 1 B
+X P3 7 350 0 100 L 50 50 1 1 B
+X GND 8 0 -650 100 U 50 50 1 1 W
+X P4 9 350 -100 100 L 50 50 1 1 B
+ENDDRAW
+ENDDEF
+#
 # TCA9554PWR
 #
 DEF TCA9554PWR U 0 20 Y Y 1 F N

From ecc7fb4ff9c20f711b024f738153b3e6d6beace9 Mon Sep 17 00:00:00 2001
From: Tim Pambor <tp@osasysteme.de>
Date: Sat, 20 Apr 2019 10:03:41 +0200
Subject: [PATCH 159/201] Add TCA9554DWR

---
 Interface_Expansion.dcm | 12 ++++++++++++
 Interface_Expansion.lib | 32 ++++++++++++++++++++++++++++++++
 2 files changed, 44 insertions(+)

diff --git a/Interface_Expansion.dcm b/Interface_Expansion.dcm
index 9ad14932ab..25e0b8aba7 100644
--- a/Interface_Expansion.dcm
+++ b/Interface_Expansion.dcm
@@ -210,6 +210,18 @@ K SMBUS I2C Expander
 F http://www.ti.com/lit/ds/symlink/tca9554.pdf
 $ENDCMP
 #
+$CMP TCA9554DWR
+D 8 Bit Port/Expander, I2C SMBUS, Interrupt output, SOIC-16
+K SMBUS I2C Expander
+F http://www.ti.com/lit/ds/symlink/tca9554.pdf
+$ENDCMP
+#
+$CMP TCA9554DWT
+D 8 Bit Port/Expander, I2C SMBUS, Interrupt output, SOIC-16
+K SMBUS I2C Expander
+F http://www.ti.com/lit/ds/symlink/tca9554.pdf
+$ENDCMP
+#
 $CMP TCA9554PWR
 D 8 Bit Port/Expander, I2C SMBUS, Interrupt output, TSSOP-16
 K SMBUS I2C Expander
diff --git a/Interface_Expansion.lib b/Interface_Expansion.lib
index e5ecabb13e..e72683e302 100644
--- a/Interface_Expansion.lib
+++ b/Interface_Expansion.lib
@@ -1133,6 +1133,38 @@ X P4 9 350 -100 100 L 50 50 1 1 B
 ENDDRAW
 ENDDEF
 #
+# TCA9554DWR
+#
+DEF TCA9554DWR U 0 20 Y Y 1 F N
+F0 "U" -250 500 50 H V L CNN
+F1 "TCA9554DWR" 100 500 50 H V L CNN
+F2 "Package_SO:SOIC-16W_7.5x10.3mm_P1.27mm" 950 -550 50 H I C CNN
+F3 "" 100 -100 50 H I C CNN
+ALIAS TCA9554DWT
+$FPLIST
+ SOIC*7.5x10.3mm*P1.27mm*
+$ENDFPLIST
+DRAW
+S -250 -550 250 450 0 1 10 f
+X A0 1 -350 -200 100 R 50 50 1 1 I
+X P5 10 350 -200 100 L 50 50 1 1 B
+X P6 11 350 -300 100 L 50 50 1 1 B
+X P7 12 350 -400 100 L 50 50 1 1 B
+X ~INT~ 13 -350 100 100 R 50 50 1 1 C
+X SCL 14 -350 300 100 R 50 50 1 1 I
+X SDA 15 -350 200 100 R 50 50 1 1 B
+X VDD 16 0 550 100 D 50 50 1 1 W
+X A1 2 -350 -300 100 R 50 50 1 1 I
+X A2 3 -350 -400 100 R 50 50 1 1 I
+X P0 4 350 300 100 L 50 50 1 1 B
+X P1 5 350 200 100 L 50 50 1 1 B
+X P2 6 350 100 100 L 50 50 1 1 B
+X P3 7 350 0 100 L 50 50 1 1 B
+X GND 8 0 -650 100 U 50 50 1 1 W
+X P4 9 350 -100 100 L 50 50 1 1 B
+ENDDRAW
+ENDDEF
+#
 # TCA9554PWR
 #
 DEF TCA9554PWR U 0 20 Y Y 1 F N

From 73c4c4691dd102d7c1a2d278c51ee8656350a397 Mon Sep 17 00:00:00 2001
From: Tim Pambor <tp@osasysteme.de>
Date: Sat, 20 Apr 2019 10:20:18 +0200
Subject: [PATCH 160/201] Fix pins off-grid

---
 Interface_Expansion.lib | 152 ++++++++++++++++++++--------------------
 1 file changed, 76 insertions(+), 76 deletions(-)

diff --git a/Interface_Expansion.lib b/Interface_Expansion.lib
index e72683e302..d8b66b29dd 100644
--- a/Interface_Expansion.lib
+++ b/Interface_Expansion.lib
@@ -1074,70 +1074,70 @@ ENDDEF
 # TCA9554DBQR
 #
 DEF TCA9554DBQR U 0 20 Y Y 1 F N
-F0 "U" -250 500 50 H V L CNN
-F1 "TCA9554DBQR" 100 500 50 H V L CNN
+F0 "U" -300 450 50 H V L CNN
+F1 "TCA9554DBQR" 100 450 50 H V L CNN
 F2 "Package_SO:SSOP-16_3.9x4.9mm_P0.635mm" 950 -550 50 H I C CNN
 F3 "" 100 -100 50 H I C CNN
 $FPLIST
  SSOP*3.9x4.9mm*P0.635mm*
 $ENDFPLIST
 DRAW
-S -250 -550 250 450 0 1 10 f
-X A0 1 -350 -200 100 R 50 50 1 1 I
-X P5 10 350 -200 100 L 50 50 1 1 B
-X P6 11 350 -300 100 L 50 50 1 1 B
-X P7 12 350 -400 100 L 50 50 1 1 B
-X ~INT~ 13 -350 100 100 R 50 50 1 1 C
-X SCL 14 -350 300 100 R 50 50 1 1 I
-X SDA 15 -350 200 100 R 50 50 1 1 B
-X VDD 16 0 550 100 D 50 50 1 1 W
-X A1 2 -350 -300 100 R 50 50 1 1 I
-X A2 3 -350 -400 100 R 50 50 1 1 I
-X P0 4 350 300 100 L 50 50 1 1 B
-X P1 5 350 200 100 L 50 50 1 1 B
-X P2 6 350 100 100 L 50 50 1 1 B
-X P3 7 350 0 100 L 50 50 1 1 B
-X GND 8 0 -650 100 U 50 50 1 1 W
-X P4 9 350 -100 100 L 50 50 1 1 B
+S -300 -500 300 400 0 1 10 f
+X A0 1 -400 -200 100 R 50 50 1 1 I
+X P5 10 400 -200 100 L 50 50 1 1 B
+X P6 11 400 -300 100 L 50 50 1 1 B
+X P7 12 400 -400 100 L 50 50 1 1 B
+X ~INT~ 13 -400 100 100 R 50 50 1 1 C
+X SCL 14 -400 300 100 R 50 50 1 1 I
+X SDA 15 -400 200 100 R 50 50 1 1 B
+X VDD 16 0 500 100 D 50 50 1 1 W
+X A1 2 -400 -300 100 R 50 50 1 1 I
+X A2 3 -400 -400 100 R 50 50 1 1 I
+X P0 4 400 300 100 L 50 50 1 1 B
+X P1 5 400 200 100 L 50 50 1 1 B
+X P2 6 400 100 100 L 50 50 1 1 B
+X P3 7 400 0 100 L 50 50 1 1 B
+X GND 8 0 -600 100 U 50 50 1 1 W
+X P4 9 400 -100 100 L 50 50 1 1 B
 ENDDRAW
 ENDDEF
 #
 # TCA9554DBR
 #
 DEF TCA9554DBR U 0 20 Y Y 1 F N
-F0 "U" -250 500 50 H V L CNN
-F1 "TCA9554DBR" 100 500 50 H V L CNN
+F0 "U" -300 450 50 H V L CNN
+F1 "TCA9554DBR" 100 450 50 H V L CNN
 F2 "Package_SO:SSOP-16_5.3x6.2mm_P0.65mm" 950 -550 50 H I C CNN
 F3 "" 100 -100 50 H I C CNN
 $FPLIST
  SSOP*5.3x6.2mm*P0.65mm*
 $ENDFPLIST
 DRAW
-S -250 -550 250 450 0 1 10 f
-X A0 1 -350 -200 100 R 50 50 1 1 I
-X P5 10 350 -200 100 L 50 50 1 1 B
-X P6 11 350 -300 100 L 50 50 1 1 B
-X P7 12 350 -400 100 L 50 50 1 1 B
-X ~INT~ 13 -350 100 100 R 50 50 1 1 C
-X SCL 14 -350 300 100 R 50 50 1 1 I
-X SDA 15 -350 200 100 R 50 50 1 1 B
-X VDD 16 0 550 100 D 50 50 1 1 W
-X A1 2 -350 -300 100 R 50 50 1 1 I
-X A2 3 -350 -400 100 R 50 50 1 1 I
-X P0 4 350 300 100 L 50 50 1 1 B
-X P1 5 350 200 100 L 50 50 1 1 B
-X P2 6 350 100 100 L 50 50 1 1 B
-X P3 7 350 0 100 L 50 50 1 1 B
-X GND 8 0 -650 100 U 50 50 1 1 W
-X P4 9 350 -100 100 L 50 50 1 1 B
+S -300 -500 300 400 0 1 10 f
+X A0 1 -400 -200 100 R 50 50 1 1 I
+X P5 10 400 -200 100 L 50 50 1 1 B
+X P6 11 400 -300 100 L 50 50 1 1 B
+X P7 12 400 -400 100 L 50 50 1 1 B
+X ~INT~ 13 -400 100 100 R 50 50 1 1 C
+X SCL 14 -400 300 100 R 50 50 1 1 I
+X SDA 15 -400 200 100 R 50 50 1 1 B
+X VDD 16 0 500 100 D 50 50 1 1 W
+X A1 2 -400 -300 100 R 50 50 1 1 I
+X A2 3 -400 -400 100 R 50 50 1 1 I
+X P0 4 400 300 100 L 50 50 1 1 B
+X P1 5 400 200 100 L 50 50 1 1 B
+X P2 6 400 100 100 L 50 50 1 1 B
+X P3 7 400 0 100 L 50 50 1 1 B
+X GND 8 0 -600 100 U 50 50 1 1 W
+X P4 9 400 -100 100 L 50 50 1 1 B
 ENDDRAW
 ENDDEF
 #
 # TCA9554DWR
 #
 DEF TCA9554DWR U 0 20 Y Y 1 F N
-F0 "U" -250 500 50 H V L CNN
-F1 "TCA9554DWR" 100 500 50 H V L CNN
+F0 "U" -300 450 50 H V L CNN
+F1 "TCA9554DWR" 100 450 50 H V L CNN
 F2 "Package_SO:SOIC-16W_7.5x10.3mm_P1.27mm" 950 -550 50 H I C CNN
 F3 "" 100 -100 50 H I C CNN
 ALIAS TCA9554DWT
@@ -1145,54 +1145,54 @@ $FPLIST
  SOIC*7.5x10.3mm*P1.27mm*
 $ENDFPLIST
 DRAW
-S -250 -550 250 450 0 1 10 f
-X A0 1 -350 -200 100 R 50 50 1 1 I
-X P5 10 350 -200 100 L 50 50 1 1 B
-X P6 11 350 -300 100 L 50 50 1 1 B
-X P7 12 350 -400 100 L 50 50 1 1 B
-X ~INT~ 13 -350 100 100 R 50 50 1 1 C
-X SCL 14 -350 300 100 R 50 50 1 1 I
-X SDA 15 -350 200 100 R 50 50 1 1 B
-X VDD 16 0 550 100 D 50 50 1 1 W
-X A1 2 -350 -300 100 R 50 50 1 1 I
-X A2 3 -350 -400 100 R 50 50 1 1 I
-X P0 4 350 300 100 L 50 50 1 1 B
-X P1 5 350 200 100 L 50 50 1 1 B
-X P2 6 350 100 100 L 50 50 1 1 B
-X P3 7 350 0 100 L 50 50 1 1 B
-X GND 8 0 -650 100 U 50 50 1 1 W
-X P4 9 350 -100 100 L 50 50 1 1 B
+S -300 -500 300 400 0 1 10 f
+X A0 1 -400 -200 100 R 50 50 1 1 I
+X P5 10 400 -200 100 L 50 50 1 1 B
+X P6 11 400 -300 100 L 50 50 1 1 B
+X P7 12 400 -400 100 L 50 50 1 1 B
+X ~INT~ 13 -400 100 100 R 50 50 1 1 C
+X SCL 14 -400 300 100 R 50 50 1 1 I
+X SDA 15 -400 200 100 R 50 50 1 1 B
+X VDD 16 0 500 100 D 50 50 1 1 W
+X A1 2 -400 -300 100 R 50 50 1 1 I
+X A2 3 -400 -400 100 R 50 50 1 1 I
+X P0 4 400 300 100 L 50 50 1 1 B
+X P1 5 400 200 100 L 50 50 1 1 B
+X P2 6 400 100 100 L 50 50 1 1 B
+X P3 7 400 0 100 L 50 50 1 1 B
+X GND 8 0 -600 100 U 50 50 1 1 W
+X P4 9 400 -100 100 L 50 50 1 1 B
 ENDDRAW
 ENDDEF
 #
 # TCA9554PWR
 #
 DEF TCA9554PWR U 0 20 Y Y 1 F N
-F0 "U" -250 500 50 H V L CNN
-F1 "TCA9554PWR" 100 500 50 H V L CNN
+F0 "U" -300 450 50 H V L CNN
+F1 "TCA9554PWR" 100 450 50 H V L CNN
 F2 "Package_SO:TSSOP-16_4.4x5mm_P0.65mm" 950 -550 50 H I C CNN
 F3 "" 100 -100 50 H I C CNN
 $FPLIST
  TSSOP*4.4x5mm*P0.65mm*
 $ENDFPLIST
 DRAW
-S -250 -550 250 450 0 1 10 f
-X A0 1 -350 -200 100 R 50 50 1 1 I
-X P5 10 350 -200 100 L 50 50 1 1 B
-X P6 11 350 -300 100 L 50 50 1 1 B
-X P7 12 350 -400 100 L 50 50 1 1 B
-X ~INT~ 13 -350 100 100 R 50 50 1 1 C
-X SCL 14 -350 300 100 R 50 50 1 1 I
-X SDA 15 -350 200 100 R 50 50 1 1 B
-X VDD 16 0 550 100 D 50 50 1 1 W
-X A1 2 -350 -300 100 R 50 50 1 1 I
-X A2 3 -350 -400 100 R 50 50 1 1 I
-X P0 4 350 300 100 L 50 50 1 1 B
-X P1 5 350 200 100 L 50 50 1 1 B
-X P2 6 350 100 100 L 50 50 1 1 B
-X P3 7 350 0 100 L 50 50 1 1 B
-X GND 8 0 -650 100 U 50 50 1 1 W
-X P4 9 350 -100 100 L 50 50 1 1 B
+S -300 -500 300 400 0 1 10 f
+X A0 1 -400 -200 100 R 50 50 1 1 I
+X P5 10 400 -200 100 L 50 50 1 1 B
+X P6 11 400 -300 100 L 50 50 1 1 B
+X P7 12 400 -400 100 L 50 50 1 1 B
+X ~INT~ 13 -400 100 100 R 50 50 1 1 C
+X SCL 14 -400 300 100 R 50 50 1 1 I
+X SDA 15 -400 200 100 R 50 50 1 1 B
+X VDD 16 0 500 100 D 50 50 1 1 W
+X A1 2 -400 -300 100 R 50 50 1 1 I
+X A2 3 -400 -400 100 R 50 50 1 1 I
+X P0 4 400 300 100 L 50 50 1 1 B
+X P1 5 400 200 100 L 50 50 1 1 B
+X P2 6 400 100 100 L 50 50 1 1 B
+X P3 7 400 0 100 L 50 50 1 1 B
+X GND 8 0 -600 100 U 50 50 1 1 W
+X P4 9 400 -100 100 L 50 50 1 1 B
 ENDDRAW
 ENDDEF
 #

From 98fd814f10bdca705bef3251bc1b31ee8b4710cf Mon Sep 17 00:00:00 2001
From: jstjst <jonas@gappert.de>
Date: Sat, 20 Apr 2019 11:58:47 +0200
Subject: [PATCH 161/201] fixed review issues

---
 Interface_USB.dcm |  8 ++++----
 Interface_USB.lib | 38 +++++++++++++++++++-------------------
 2 files changed, 23 insertions(+), 23 deletions(-)

diff --git a/Interface_USB.dcm b/Interface_USB.dcm
index 8636b4650e..9a898844db 100644
--- a/Interface_USB.dcm
+++ b/Interface_USB.dcm
@@ -300,14 +300,14 @@ K USB UART Converter
 F http://ww1.microchip.com/downloads/en/DeviceDoc/200022228D.pdf
 $ENDCMP
 #
-$CMP TPS2500
-D Integrated USB power Switch with Boost Converter
+$CMP TPS2500DRC
+D Integrated USB power Switch with Boost Converter, High-Efficiency Eco-mode Control Scheme, Texas S-PVSON-10
 K USB switch boost
 F http://www.ti.com/lit/ds/symlink/tps2500.pdf
 $ENDCMP
 #
-$CMP TPS2501
-D Integrated USB power Switch with Boost Converter
+$CMP TPS2501DRC
+D Integrated USB power Switch with Boost Converter, Constant Frequency, Texas S-PVSON-10
 K USB switch boost
 F http://www.ti.com/lit/ds/symlink/tps2500.pdf
 $ENDCMP
diff --git a/Interface_USB.lib b/Interface_USB.lib
index e7429bde88..ec5b36a234 100644
--- a/Interface_USB.lib
+++ b/Interface_USB.lib
@@ -1540,30 +1540,30 @@ X GP3 9 -900 -200 100 R 50 50 1 1 B
 ENDDRAW
 ENDDEF
 #
-# TPS2500
+# TPS2500DRC
 #
-DEF TPS2500 U 0 20 Y Y 1 F N
-F0 "U" -350 -450 50 H V C CNN
-F1 "TPS2500" 250 -450 50 H V C CNN
+DEF TPS2500DRC U 0 20 Y Y 1 F N
+F0 "U" -300 -450 50 H V L CNN
+F1 "TPS2500DRC" -300 350 50 H V L CNN
 F2 "Package_SON:Texas_S-PVSON-N10" 0 0 50 H I C CNN
-F3 "" -100 -200 50 H I C CNN
-ALIAS TPS2501
+F3 "" -100 -300 50 H I C CNN
+ALIAS TPS2501DRC
 $FPLIST
- Package*SON*Texas*S*PVSON*N10*
+ Texas*S*PVSON*N10*
 $ENDFPLIST
 DRAW
-S -400 400 400 -400 0 1 10 f
-X SW 1 0 500 100 D 50 50 1 1 I
-X AUX 10 500 200 100 L 50 50 1 1 w
-X PAD 11 0 -500 100 U 50 50 1 1 W
-X PGND 2 500 -300 100 L 50 50 1 1 W
-X IN 3 -500 300 100 R 50 50 1 1 W
-X EN 4 -500 200 100 R 50 50 1 1 I
-X GND 5 -500 -300 100 R 50 50 1 1 W
-X ILIM 6 -500 -100 100 R 50 50 1 1 I
-X ENUSB 7 500 100 100 L 50 50 1 1 I
-X ~FAULT 8 500 -100 100 L 50 50 1 1 C
-X USB 9 500 300 100 L 50 50 1 1 w
+S -300 300 300 -400 0 1 10 f
+X SW 1 -400 200 100 R 50 50 1 1 I
+X AUX 10 400 100 100 L 50 50 1 1 w
+X PAD 11 0 -500 100 U 50 50 1 1 P N
+X PGND 2 0 -500 100 U 50 50 1 1 P N
+X IN 3 -400 100 100 R 50 50 1 1 W
+X EN 4 -400 -100 100 R 50 50 1 1 I
+X GND 5 0 -500 100 U 50 50 1 1 W
+X ILIM 6 -400 -300 100 R 50 50 1 1 I
+X ENUSB 7 -400 -200 100 R 50 50 1 1 I
+X ~FAULT 8 400 -200 100 L 50 50 1 1 C
+X USB 9 400 200 100 L 50 50 1 1 w
 ENDDRAW
 ENDDEF
 #

From 92ea29e7c0772a898ac16261adc9ed0858ed83cb Mon Sep 17 00:00:00 2001
From: John Whitmore <johnfwhitmore@gmail.com>
Date: Sat, 20 Apr 2019 14:02:38 +0100
Subject: [PATCH 162/201] Changed pin name offset to 20 mils.

---
 Isolator.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Isolator.lib b/Isolator.lib
index 7b85152b8b..15abe8fe8a 100644
--- a/Isolator.lib
+++ b/Isolator.lib
@@ -1966,7 +1966,7 @@ ENDDEF
 #
 # H11AA1
 #
-DEF H11AA1 U 0 40 Y Y 1 F N
+DEF H11AA1 U 0 20 Y Y 1 F N
 F0 "U" -210 195 50 H V L CNN
 F1 "H11AA1" 25 195 50 H V L CNN
 F2 "Package_DIP:DIP-6_W7.62mm" -490 -195 50 H I L CIN

From b35fd77fb8d254ed6bfba8e29f2fc1ba027afe77 Mon Sep 17 00:00:00 2001
From: Anton Lysak <antonlysak@gmail.com>
Date: Sat, 20 Apr 2019 19:49:25 +0600
Subject: [PATCH 163/201] Datasheet removed, pin names and order fixed

---
 Connector.dcm |  1 -
 Connector.lib | 40 ++++++++++++++++++++--------------------
 2 files changed, 20 insertions(+), 21 deletions(-)

diff --git a/Connector.dcm b/Connector.dcm
index 2c036b0cff..e20a9970c0 100644
--- a/Connector.dcm
+++ b/Connector.dcm
@@ -1131,7 +1131,6 @@ $ENDCMP
 $CMP MXM3.0
 D MXM3.0 connector
 K MXM connector
-F https://wenku.baidu.com/view/ecf588fbf705cc175527092d.html
 $ENDCMP
 #
 $CMP Micro_SD_Card
diff --git a/Connector.lib b/Connector.lib
index d8f22ddea0..1fd60bc4d0 100644
--- a/Connector.lib
+++ b/Connector.lib
@@ -10895,16 +10895,16 @@ X PEX_REFCLK 155 -700 -1400 150 R 50 50 1 1 I
 X PEX_RST# 156 -700 -1700 150 R 50 50 1 1 I
 X GND 157 0 -5400 150 U 50 50 1 1 P N
 X VGA_DDC_DAT 158 700 4500 150 L 50 50 1 1 B
-X RSVD 159 700 2500 150 L 50 50 1 1 B
+X RSVD 159 700 2800 150 L 50 50 1 1 B
 X RSVD 16 700 2900 150 L 50 50 1 1 B
 X VGA_DDC_CLK 160 700 4600 150 L 50 50 1 1 O
-X RSVD 161 700 2400 150 L 50 50 1 1 B
+X RSVD 161 700 2700 150 L 50 50 1 1 B
 X VGA_VSYNC 162 700 4800 150 L 50 50 1 1 O
-X RSVD 163 700 2300 150 L 50 50 1 1 B
+X RSVD 163 700 2600 150 L 50 50 1 1 B
 X VGA_HSYNC 164 700 4700 150 L 50 50 1 1 O
-X RSVD 165 700 2200 150 L 50 50 1 1 B
+X RSVD 165 700 2500 150 L 50 50 1 1 B
 X GND 166 0 -5400 150 U 50 50 1 1 P N
-X RSVD 167 700 2100 150 L 50 50 1 1 B
+X RSVD 167 700 2400 150 L 50 50 1 1 B
 X VGA_RED 168 700 5100 150 L 50 50 1 1 O
 X LVDS_UCLK# 169 -700 -2000 150 R 50 50 1 1 O
 X GND 17 0 -5400 150 U 50 50 1 1 P N
@@ -10971,24 +10971,24 @@ X DP_C_AUX# 223 700 -3800 150 L 50 50 1 1 B
 X DP_D_L3# 224 700 -4700 150 L 50 50 1 1 O
 X DP_C_AUX 225 700 -3900 150 L 50 50 1 1 B
 X DP_D_L3 226 700 -4800 150 L 50 50 1 1 O
-X RSVD 227 700 2000 150 L 50 50 1 1 B
+X RSVD 227 700 2300 150 L 50 50 1 1 B
 X GND 228 0 -5400 150 U 50 50 1 1 P N
-X RSVD 229 700 1900 150 L 50 50 1 1 B
+X RSVD 229 700 2200 150 L 50 50 1 1 B
 X PNL_PWR_EN 23 700 4200 150 L 50 50 1 1 O
 X DP_D_AUX# 230 700 -4900 150 L 50 50 1 1 B
-X RSVD 231 700 1800 150 L 50 50 1 1 B
+X RSVD 231 700 2100 150 L 50 50 1 1 B
 X DP_D_AUX 232 700 -5000 150 L 50 50 1 1 B
-X RSVD 233 700 1700 150 L 50 50 1 1 B
+X RSVD 233 700 2000 150 L 50 50 1 1 B
 X DP_C_HPD 234 700 -4000 150 L 50 50 1 1 I
-X RSVD 235 700 1600 150 L 50 50 1 1 B
+X RSVD 235 700 1900 150 L 50 50 1 1 B
 X DP_D_HPD 236 700 -5100 150 L 50 50 1 1 I
-X RSVD 237 700 1500 150 L 50 50 1 1 B
-X RSVD 238 700 2800 150 L 50 50 1 1 B
-X RSVD 239 700 1400 150 L 50 50 1 1 B
-X TH_PWN 24 -700 -4700 150 R 50 50 1 1 O
-X RSVD 240 700 2700 150 L 50 50 1 1 B
-X RSVD 241 700 1300 150 L 50 50 1 1 B
-X RSVD 242 700 2600 150 L 50 50 1 1 B
+X RSVD 237 700 1800 150 L 50 50 1 1 B
+X RSVD 238 700 1700 150 L 50 50 1 1 B
+X RSVD 239 700 1600 150 L 50 50 1 1 B
+X TH_PWM 24 -700 -4700 150 R 50 50 1 1 O
+X RSVD 240 700 1500 150 L 50 50 1 1 B
+X RSVD 241 700 1400 150 L 50 50 1 1 B
+X RSVD 242 700 1300 150 L 50 50 1 1 B
 X RSVD 243 700 1200 150 L 50 50 1 1 B
 X GND 244 0 -5400 150 U 50 50 1 1 P N
 X RSVD 245 700 1100 150 L 50 50 1 1 B
@@ -11018,7 +11018,7 @@ X DP_B_L3 266 700 -2600 150 L 50 50 1 1 O
 X DP_A_L2 267 700 -1300 150 L 50 50 1 1 O
 X GND 268 0 -5400 150 U 50 50 1 1 P N
 X GND 269 0 -5400 150 U 50 50 1 1 P N
-X PNL_BL_PWN 27 700 4000 150 L 50 50 1 1 O
+X PNL_BL_PWM 27 700 4000 150 L 50 50 1 1 O
 X DP_B_AUX# 270 700 -2700 150 L 50 50 1 1 B
 X DP_A_L3# 271 700 -1400 150 L 50 50 1 1 O
 X DP_B_AUX 272 700 -2800 150 L 50 50 1 1 B
@@ -11046,8 +11046,8 @@ X OEM 38 700 800 150 L 50 50 1 1 B
 X OEM 39 700 700 150 L 50 50 1 1 B
 X WAKE# 4 700 3800 150 L 50 50 1 1 O
 X OEM 40 700 600 150 L 50 50 1 1 B
-X OEM 41 700 400 150 L 50 50 1 1 B
-X OEM 42 700 500 150 L 50 50 1 1 B
+X OEM 41 700 500 150 L 50 50 1 1 B
+X OEM 42 700 400 150 L 50 50 1 1 B
 X OEM 43 700 300 150 L 50 50 1 1 B
 X OEM 44 700 200 150 L 50 50 1 1 B
 X OEM 45 700 100 150 L 50 50 1 1 B

From 471a6415787edae8f4b14b8ce1a6c94c353ed558 Mon Sep 17 00:00:00 2001
From: Anton Lysak <antonlysak@gmail.com>
Date: Sat, 20 Apr 2019 20:19:22 +0600
Subject: [PATCH 164/201] Fixed pins 35/36, unit C width is the same as other
 units now

---
 FPGA_Lattice.lib | 78 ++++++++++++++++++++++++------------------------
 1 file changed, 39 insertions(+), 39 deletions(-)

diff --git a/FPGA_Lattice.lib b/FPGA_Lattice.lib
index 677eb71066..b0734c8a0b 100644
--- a/FPGA_Lattice.lib
+++ b/FPGA_Lattice.lib
@@ -5,7 +5,7 @@ EESchema-LIBRARY Version 2.4
 #
 DEF ICE40HX1K-TQ144 U 0 20 Y Y 5 L N
 F0 "U" -400 1450 50 H V C CNN
-F1 "ICE40HX1K-TQ144" 450 1450 50 H V C CNN
+F1 "ICE40HX1K-TQ144" 500 1450 50 H V C CNN
 F2 "Package_QFP:TQFP-144_20x20mm_P0.5mm" 0 -1450 50 H I C CNN
 F3 "" -850 1400 50 H I C CNN
 $FPLIST
@@ -14,7 +14,7 @@ $ENDFPLIST
 DRAW
 S -350 1250 350 -1250 1 1 10 f
 S -350 1350 350 -1350 2 1 10 f
-S -450 1250 450 -1250 3 1 10 f
+S -350 1250 350 -1250 3 1 10 f
 S -350 1350 350 -1350 4 1 10 f
 S -450 550 450 -550 5 1 10 f
 X IOT_73 112 -500 1100 150 R 50 50 1 1 B
@@ -28,10 +28,10 @@ X IOT_80 119 -500 400 150 R 50 50 1 1 B
 X IOT_81 120 -500 300 150 R 50 50 1 1 B
 X IOT_82 121 -500 200 150 R 50 50 1 1 B
 X IOT_83 122 -500 100 150 R 50 50 1 1 B
-X VCCIO_0 123 0 1400 150 D 50 50 1 1 W
+X VCCIO_0 123 100 1400 150 D 50 50 1 1 W
 X IOT_84_GBIN1 128 -500 0 150 R 50 50 1 1 B
 X IOT_85_GBIN0 129 -500 -100 150 R 50 50 1 1 B
-X VCCIO_0 133 0 1400 150 D 50 50 1 1 P N
+X VCCIO_0 133 100 1400 150 D 50 50 1 1 P N
 X IOT_87 134 -500 -200 150 R 50 50 1 1 B
 X IOT_88 135 -500 -300 150 R 50 50 1 1 B
 X IOT_89 136 -500 -400 150 R 50 50 1 1 B
@@ -47,7 +47,7 @@ X NC 16 300 300 150 L 50 50 1 1 N N
 X NC 17 300 200 150 L 50 50 1 1 N N
 X NC 18 300 -300 150 L 50 50 1 1 N N
 X NC 77 300 -400 150 L 50 50 1 1 N N
-X VCCIO_1 100 0 1500 150 D 50 50 2 1 P N
+X VCCIO_1 100 100 1500 150 D 50 50 2 1 P N
 X IOR_67 101 -500 -700 150 R 50 50 2 1 B
 X IOR_68 102 -500 -800 150 R 50 50 2 1 B
 X IOR_69 104 -500 -900 150 R 50 50 2 1 B
@@ -69,7 +69,7 @@ X IOR_55 81 -500 500 150 R 50 50 2 1 B
 X NC 82 300 -400 150 L 50 50 2 1 N N
 X IOR_56 87 -500 400 150 R 50 50 2 1 B
 X IOR_57 88 -500 300 150 R 50 50 2 1 B
-X VCCIO_1 89 0 1500 150 D 50 50 2 1 W
+X VCCIO_1 89 100 1500 150 D 50 50 2 1 W
 X IOR_58 90 -500 200 150 R 50 50 2 1 B
 X IOR_59 91 -500 100 150 R 50 50 2 1 B
 X IOR_60_GBIN3 93 -500 0 150 R 50 50 2 1 B
@@ -79,35 +79,35 @@ X IOR_63 96 -500 -300 150 R 50 50 2 1 B
 X IOR_64 97 -500 -400 150 R 50 50 2 1 B
 X IOR_65 98 -500 -500 150 R 50 50 2 1 B
 X IOR_66 99 -500 -600 150 R 50 50 2 1 B
-X NC 110 400 -300 150 L 50 50 3 1 N N
-X NC 124 400 -800 150 L 50 50 3 1 N N
-X IOB_24 37 -600 800 150 R 50 50 3 1 B
-X IOB_25 38 -600 700 150 R 50 50 3 1 B
-X IOB_26 39 -600 600 150 R 50 50 3 1 B
-X IOB_27 41 -600 500 150 R 50 50 3 1 B
-X IOB_28 42 -600 400 150 R 50 50 3 1 B
-X IOB_29 43 -600 300 150 R 50 50 3 1 B
-X IOB_30 44 -600 200 150 R 50 50 3 1 B
-X IOB_31 45 -600 100 150 R 50 50 3 1 B
-X VCCIO_2 46 0 1400 150 D 50 50 3 1 W
-X IOB_32 47 -600 0 150 R 50 50 3 1 B
-X IOB_33 48 -600 -100 150 R 50 50 3 1 B
-X IOB_35_GBIN5 49 -600 -200 150 R 50 50 3 1 B
-X IOB_36_GBIN4 50 -600 -300 150 R 50 50 3 1 B
-X IOB_34 52 -600 -400 150 R 50 50 3 1 B
-X IOB_37 56 -600 -500 150 R 50 50 3 1 B
-X VCCIO_2 57 0 1400 150 D 50 50 3 1 P N
-X IOB_38 58 -600 -600 150 R 50 50 3 1 B
-X IOB_39 60 -600 -700 150 R 50 50 3 1 B
-X IOB_40 61 -600 -800 150 R 50 50 3 1 B
-X IOB_41 62 -600 -900 150 R 50 50 3 1 B
-X IOB_42_CBSEL0 63 -600 -1000 150 R 50 50 3 1 B
-X IOB_43_CBSEL1 64 -600 -1100 150 R 50 50 3 1 B
-X CDONE 65 600 800 150 L 50 50 3 1 C
-X ~CRESET_B 66 -600 1100 150 R 50 50 3 1 I
-X NC 83 400 400 150 L 50 50 3 1 N N
-X NC 84 400 300 150 L 50 50 3 1 N N
-X NC 85 400 -400 150 L 50 50 3 1 N N
+X NC 110 300 -400 150 L 50 50 3 1 N N
+X NC 124 300 -800 150 L 50 50 3 1 N N
+X IOB_24 37 -500 800 150 R 50 50 3 1 B
+X IOB_25 38 -500 700 150 R 50 50 3 1 B
+X IOB_26 39 -500 600 150 R 50 50 3 1 B
+X IOB_27 41 -500 500 150 R 50 50 3 1 B
+X IOB_28 42 -500 400 150 R 50 50 3 1 B
+X IOB_29 43 -500 300 150 R 50 50 3 1 B
+X IOB_30 44 -500 200 150 R 50 50 3 1 B
+X IOB_31 45 -500 100 150 R 50 50 3 1 B
+X VCCIO_2 46 100 1400 150 D 50 50 3 1 W
+X IOB_32 47 -500 0 150 R 50 50 3 1 B
+X IOB_33 48 -500 -100 150 R 50 50 3 1 B
+X IOB_35_GBIN5 49 -500 -200 150 R 50 50 3 1 B
+X IOB_36_GBIN4 50 -500 -300 150 R 50 50 3 1 B
+X IOB_34 52 -500 -400 150 R 50 50 3 1 B
+X IOB_37 56 -500 -500 150 R 50 50 3 1 B
+X VCCIO_2 57 100 1400 150 D 50 50 3 1 P N
+X IOB_38 58 -500 -600 150 R 50 50 3 1 B
+X IOB_39 60 -500 -700 150 R 50 50 3 1 B
+X IOB_40 61 -500 -800 150 R 50 50 3 1 B
+X IOB_41 62 -500 -900 150 R 50 50 3 1 B
+X IOB_42_CBSEL0 63 -500 -1000 150 R 50 50 3 1 B
+X IOB_43_CBSEL1 64 -500 -1100 150 R 50 50 3 1 B
+X CDONE 65 500 800 150 L 50 50 3 1 C
+X ~CRESET_B 66 -500 1100 150 R 50 50 3 1 I
+X NC 83 300 400 150 L 50 50 3 1 N N
+X NC 84 300 300 150 L 50 50 3 1 N N
+X NC 85 300 -500 150 L 50 50 3 1 N N
 X IOL_1A 1 -500 1100 150 R 50 50 4 1 B
 X IOL_4B 10 -500 400 150 R 50 50 4 1 B
 X IOL_5A 11 -500 300 150 R 50 50 4 1 B
@@ -129,13 +129,13 @@ X IOL_9B 26 -500 -600 150 R 50 50 4 1 B
 X IOL_10A 28 -500 -700 150 R 50 50 4 1 B
 X IOL_10B 29 -500 -800 150 R 50 50 4 1 B
 X IOL_2A 3 -500 900 150 R 50 50 4 1 B
-X VCCIO_3 30 0 1500 150 D 50 50 4 1 P N
+X VCCIO_3 30 100 1500 150 D 50 50 4 1 P N
 X IOL_11A 31 -500 -900 150 R 50 50 4 1 B
 X IOL_11B 32 -500 -1000 150 R 50 50 4 1 B
 X IOL_12A 33 -500 -1100 150 R 50 50 4 1 B
 X IOL_12B 34 -500 -1200 150 R 50 50 4 1 B
 X IOL_2B 4 -500 800 150 R 50 50 4 1 B
-X VCCIO_3 6 0 1500 150 D 50 50 4 1 W
+X VCCIO_3 6 100 1500 150 D 50 50 4 1 W
 X IOL_3A 7 -500 700 150 R 50 50 4 1 B
 X IOL_3B 8 -500 600 150 R 50 50 4 1 B
 X IOL_4A 9 -500 500 150 R 50 50 4 1 B
@@ -148,8 +148,8 @@ X GND 132 0 -700 150 U 50 50 5 1 P N
 X GND 14 0 -700 150 U 50 50 5 1 P N
 X GND 140 0 -700 150 U 50 50 5 1 P N
 X VCC 27 0 700 150 D 50 50 5 1 W
-X VCCPLL 35 300 700 150 D 50 50 5 1 W
-X GNDPLL 36 300 -700 150 U 50 50 5 1 W
+X GNDPLL 35 300 -700 150 U 50 50 5 1 W
+X VCCPLL 36 300 700 150 D 50 50 5 1 W
 X GND 5 0 -700 150 U 50 50 5 1 W
 X VCC 51 0 700 150 D 50 50 5 1 P N
 X GND 59 0 -700 150 U 50 50 5 1 P N

From 3177b86fb8d41e35f531c1aec1f1b4bdd3e69e1f Mon Sep 17 00:00:00 2001
From: jstjst <jonas@gappert.de>
Date: Sat, 20 Apr 2019 16:20:21 +0200
Subject: [PATCH 165/201] fixed issues

---
 Interface_USB.lib | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/Interface_USB.lib b/Interface_USB.lib
index ec5b36a234..732f64a891 100644
--- a/Interface_USB.lib
+++ b/Interface_USB.lib
@@ -1553,14 +1553,14 @@ $FPLIST
 $ENDFPLIST
 DRAW
 S -300 300 300 -400 0 1 10 f
-X SW 1 -400 200 100 R 50 50 1 1 I
+X SW 1 -400 200 100 R 50 50 1 1 W
 X AUX 10 400 100 100 L 50 50 1 1 w
-X PAD 11 0 -500 100 U 50 50 1 1 P N
-X PGND 2 0 -500 100 U 50 50 1 1 P N
+X GND 11 0 -500 100 U 50 50 1 1 P N
+X GND 2 0 -500 100 U 50 50 1 1 P N
 X IN 3 -400 100 100 R 50 50 1 1 W
 X EN 4 -400 -100 100 R 50 50 1 1 I
 X GND 5 0 -500 100 U 50 50 1 1 W
-X ILIM 6 -400 -300 100 R 50 50 1 1 I
+X ILIM 6 -400 -300 100 R 50 50 1 1 P
 X ENUSB 7 -400 -200 100 R 50 50 1 1 I
 X ~FAULT 8 400 -200 100 L 50 50 1 1 C
 X USB 9 400 200 100 L 50 50 1 1 w

From a8e9fc1b248411117bcda4dfcdfb109ae4466a25 Mon Sep 17 00:00:00 2001
From: Tim Pambor <tp@osasysteme.de>
Date: Sat, 20 Apr 2019 16:57:10 +0200
Subject: [PATCH 166/201] Add AM26LV32xD

---
 Interface.dcm |  6 ++++
 Interface.lib | 77 +++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 83 insertions(+)

diff --git a/Interface.dcm b/Interface.dcm
index e23d6ef22c..cb52705442 100644
--- a/Interface.dcm
+++ b/Interface.dcm
@@ -123,6 +123,12 @@ K Direct Digital Synthesizer DDS
 F https://www.analog.com/static/imported-files/data_sheets/AD9951.pdf
 $ENDCMP
 #
+$CMP AM26LV32xD
+D 32Mbps 3.3V RS485 Quad Line Receivers, SOIC-16
+K receiver rs485 rs422 differential
+F http://www.ti.com/lit/ds/symlink/am26lv32.pdf
+$ENDCMP
+#
 $CMP DS90C124
 D DC-Balanced 24-Bit FPD-Link II Deserializer, TQFP-48
 K DC-Balanced 24-Bit FPD-Link II Deserializer
diff --git a/Interface.lib b/Interface.lib
index c7ad0d37e1..c9195c40f4 100644
--- a/Interface.lib
+++ b/Interface.lib
@@ -932,6 +932,83 @@ X OSC/REFCLK 9 -1100 300 150 R 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #
+# AM26LV32xD
+#
+DEF AM26LV32xD U 0 20 Y Y 1 F N
+F0 "U" -350 950 50 H V C CNN
+F1 "AM26LV32xD" 400 950 50 H V C CNN
+F2 "Package_SO:SOIC-16_3.9x9.9mm_P1.27mm" 1000 -950 50 H I C CNN
+F3 "" 0 -400 50 H I C CNN
+$FPLIST
+ SOIC*16*3.9x9.9mm*P1.27mm*
+$ENDFPLIST
+DRAW
+A -272 0 132 320 -320 0 1 5 N -160 70 -160 -70
+A -110 -20 92 775 125 0 1 5 N -90 70 -20 0
+A -110 20 92 -775 -125 0 1 5 N -90 -70 -20 0
+C -190 650 10 0 1 0 N
+C -160 -50 10 0 1 0 N
+C 0 -300 10 0 1 0 F
+C 0 0 10 0 1 0 F
+C 0 300 10 0 1 0 F
+C -190 -750 10 1 1 0 N
+C -190 -450 10 1 1 0 N
+C -190 350 10 1 1 0 N
+S -400 900 400 -900 0 1 10 f
+P 2 0 1 5 -230 650 -200 650 N
+P 2 0 1 5 -230 750 -180 750 N
+P 2 0 1 5 -160 -70 -90 -70 N
+P 2 0 1 5 -90 70 -160 70 N
+P 2 0 1 5 -40 -700 250 -700 N
+P 2 0 1 5 -40 -400 250 -400 N
+P 2 0 1 5 -40 400 250 400 N
+P 2 0 1 5 -40 700 250 700 N
+P 2 0 1 0 -20 0 0 0 N
+P 2 0 1 5 0 0 0 -600 N
+P 2 0 1 5 0 300 0 0 N
+P 3 0 1 5 -230 -750 -230 -800 -250 -800 N
+P 3 0 1 5 -230 -650 -230 -600 -250 -600 N
+P 3 0 1 5 -230 -450 -230 -500 -250 -500 N
+P 3 0 1 5 -230 -350 -230 -290 -250 -290 N
+P 3 0 1 5 -230 350 -230 300 -250 300 N
+P 3 0 1 5 -230 450 -230 500 -250 500 N
+P 3 0 1 5 -230 750 -230 800 -250 800 N
+P 3 0 1 5 0 -600 -110 -600 -110 -660 N
+P 3 0 1 5 0 -300 -110 -300 -110 -360 N
+P 3 0 1 5 0 300 -110 300 -110 360 N
+P 4 0 1 5 -250 100 -200 100 -200 50 -150 50 N
+P 4 0 1 5 -230 650 -230 600 -240 600 -250 600 N
+P 4 0 1 5 -180 780 -180 620 -40 700 -180 780 N
+P 4 0 1 5 -170 -50 -200 -50 -200 -100 -250 -100 N
+P 4 0 1 5 0 300 0 600 -110 600 -110 660 N
+P 2 1 1 5 -230 -750 -200 -750 N
+P 2 1 1 5 -230 -650 -180 -650 N
+P 2 1 1 5 -230 -450 -200 -450 N
+P 2 1 1 5 -230 -350 -180 -350 N
+P 2 1 1 5 -230 350 -200 350 N
+P 2 1 1 5 -230 450 -180 450 N
+P 4 1 1 5 -180 -620 -180 -780 -40 -700 -180 -620 N
+P 4 1 1 5 -180 -320 -180 -480 -40 -400 -180 -320 N
+P 4 1 1 5 -180 480 -180 320 -40 400 -180 480 N
+X 1B 1 -500 600 100 R 50 50 1 1 I
+X 3A 10 -500 -300 100 R 50 50 1 1 I
+X 3Y 11 500 -400 100 L 50 50 1 1 T
+X ~EN 12 -500 -100 100 R 50 50 1 1 I
+X 4Y 13 500 -700 100 L 50 50 1 1 T
+X 4A 14 -500 -600 100 R 50 50 1 1 I
+X 4B 15 -500 -800 100 R 50 50 1 1 I
+X VDD 16 100 1000 100 D 50 50 1 1 W
+X 1A 2 -500 800 100 R 50 50 1 1 I
+X 1Y 3 500 700 100 L 50 50 1 1 T
+X EN 4 -500 100 100 R 50 50 1 1 I
+X 2Y 5 500 400 100 L 50 50 1 1 T
+X 2A 6 -500 500 100 R 50 50 1 1 I
+X 2B 7 -500 300 100 R 50 50 1 1 I
+X GND 8 100 -1000 100 U 50 50 1 1 W
+X 3B 9 -500 -500 100 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
 # DS90C124
 #
 DEF DS90C124 U 0 40 Y Y 1 F N

From 964b042086f4c0d230483d0b15ae7594d66d6b04 Mon Sep 17 00:00:00 2001
From: Tim Pambor <tp@osasysteme.de>
Date: Sat, 20 Apr 2019 17:18:30 +0200
Subject: [PATCH 167/201] Add AM26LV32xNS

---
 Interface.dcm |  6 ++++
 Interface.lib | 77 +++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 83 insertions(+)

diff --git a/Interface.dcm b/Interface.dcm
index cb52705442..86a2a6686e 100644
--- a/Interface.dcm
+++ b/Interface.dcm
@@ -129,6 +129,12 @@ K receiver rs485 rs422 differential
 F http://www.ti.com/lit/ds/symlink/am26lv32.pdf
 $ENDCMP
 #
+$CMP AM26LV32xNS
+D 32Mbps 3.3V RS485 Quad Line Receivers, SO-16
+K receiver rs485 rs422 differential
+F http://www.ti.com/lit/ds/symlink/am26lv32.pdf
+$ENDCMP
+#
 $CMP DS90C124
 D DC-Balanced 24-Bit FPD-Link II Deserializer, TQFP-48
 K DC-Balanced 24-Bit FPD-Link II Deserializer
diff --git a/Interface.lib b/Interface.lib
index c9195c40f4..dd58f1fe5d 100644
--- a/Interface.lib
+++ b/Interface.lib
@@ -1009,6 +1009,83 @@ X 3B 9 -500 -500 100 R 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #
+# AM26LV32xNS
+#
+DEF AM26LV32xNS U 0 20 Y Y 1 F N
+F0 "U" -350 950 50 H V C CNN
+F1 "AM26LV32xNS" 400 950 50 H V C CNN
+F2 "Package_SO:SOIC-16W_5.3x10.2mm_P1.27mm" 1000 -950 50 H I C CNN
+F3 "" 0 -400 50 H I C CNN
+$FPLIST
+ SOIC*5.3x10.2mm*P1.27mm*
+$ENDFPLIST
+DRAW
+A -272 0 132 320 -320 0 1 5 N -160 70 -160 -70
+A -110 -20 92 775 125 0 1 5 N -90 70 -20 0
+A -110 20 92 -775 -125 0 1 5 N -90 -70 -20 0
+C -190 650 10 0 1 0 N
+C -160 -50 10 0 1 0 N
+C 0 -300 10 0 1 0 F
+C 0 0 10 0 1 0 F
+C 0 300 10 0 1 0 F
+C -190 -750 10 1 1 0 N
+C -190 -450 10 1 1 0 N
+C -190 350 10 1 1 0 N
+S -400 900 400 -900 0 1 10 f
+P 2 0 1 5 -230 650 -200 650 N
+P 2 0 1 5 -230 750 -180 750 N
+P 2 0 1 5 -160 -70 -90 -70 N
+P 2 0 1 5 -90 70 -160 70 N
+P 2 0 1 5 -40 -700 250 -700 N
+P 2 0 1 5 -40 -400 250 -400 N
+P 2 0 1 5 -40 400 250 400 N
+P 2 0 1 5 -40 700 250 700 N
+P 2 0 1 0 -20 0 0 0 N
+P 2 0 1 5 0 0 0 -600 N
+P 2 0 1 5 0 300 0 0 N
+P 3 0 1 5 -230 -750 -230 -800 -250 -800 N
+P 3 0 1 5 -230 -650 -230 -600 -250 -600 N
+P 3 0 1 5 -230 -450 -230 -500 -250 -500 N
+P 3 0 1 5 -230 -350 -230 -290 -250 -290 N
+P 3 0 1 5 -230 350 -230 300 -250 300 N
+P 3 0 1 5 -230 450 -230 500 -250 500 N
+P 3 0 1 5 -230 750 -230 800 -250 800 N
+P 3 0 1 5 0 -600 -110 -600 -110 -660 N
+P 3 0 1 5 0 -300 -110 -300 -110 -360 N
+P 3 0 1 5 0 300 -110 300 -110 360 N
+P 4 0 1 5 -250 100 -200 100 -200 50 -150 50 N
+P 4 0 1 5 -230 650 -230 600 -240 600 -250 600 N
+P 4 0 1 5 -180 780 -180 620 -40 700 -180 780 N
+P 4 0 1 5 -170 -50 -200 -50 -200 -100 -250 -100 N
+P 4 0 1 5 0 300 0 600 -110 600 -110 660 N
+P 2 1 1 5 -230 -750 -200 -750 N
+P 2 1 1 5 -230 -650 -180 -650 N
+P 2 1 1 5 -230 -450 -200 -450 N
+P 2 1 1 5 -230 -350 -180 -350 N
+P 2 1 1 5 -230 350 -200 350 N
+P 2 1 1 5 -230 450 -180 450 N
+P 4 1 1 5 -180 -620 -180 -780 -40 -700 -180 -620 N
+P 4 1 1 5 -180 -320 -180 -480 -40 -400 -180 -320 N
+P 4 1 1 5 -180 480 -180 320 -40 400 -180 480 N
+X 1B 1 -500 600 100 R 50 50 1 1 I
+X 3A 10 -500 -300 100 R 50 50 1 1 I
+X 3Y 11 500 -400 100 L 50 50 1 1 T
+X ~EN 12 -500 -100 100 R 50 50 1 1 I
+X 4Y 13 500 -700 100 L 50 50 1 1 T
+X 4A 14 -500 -600 100 R 50 50 1 1 I
+X 4B 15 -500 -800 100 R 50 50 1 1 I
+X VDD 16 100 1000 100 D 50 50 1 1 W
+X 1A 2 -500 800 100 R 50 50 1 1 I
+X 1Y 3 500 700 100 L 50 50 1 1 T
+X EN 4 -500 100 100 R 50 50 1 1 I
+X 2Y 5 500 400 100 L 50 50 1 1 T
+X 2A 6 -500 500 100 R 50 50 1 1 I
+X 2B 7 -500 300 100 R 50 50 1 1 I
+X GND 8 100 -1000 100 U 50 50 1 1 W
+X 3B 9 -500 -500 100 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
 # DS90C124
 #
 DEF DS90C124 U 0 40 Y Y 1 F N

From 1b06f31e7729d44d66bd6c65feb6e22dca49da84 Mon Sep 17 00:00:00 2001
From: Tim Pambor <tp@osasysteme.de>
Date: Sat, 20 Apr 2019 19:52:41 +0200
Subject: [PATCH 168/201] Remove package suffix

---
 Interface_Expansion.dcm | 14 ++++----------
 Interface_Expansion.lib | 33 ++++++++++++++++-----------------
 2 files changed, 20 insertions(+), 27 deletions(-)

diff --git a/Interface_Expansion.dcm b/Interface_Expansion.dcm
index 25e0b8aba7..80cd22b5b5 100644
--- a/Interface_Expansion.dcm
+++ b/Interface_Expansion.dcm
@@ -198,31 +198,25 @@ K Low voltage 8-channel I2C switch with reset
 F http://www.ti.com/lit/ds/symlink/tca9548a.pdf
 $ENDCMP
 #
-$CMP TCA9554DBQR
+$CMP TCA9554DB
 D 8 Bit Port/Expander, I2C SMBUS, Interrupt output, SSOP-16
 K SMBUS I2C Expander
 F http://www.ti.com/lit/ds/symlink/tca9554.pdf
 $ENDCMP
 #
-$CMP TCA9554DBR
+$CMP TCA9554DBQ
 D 8 Bit Port/Expander, I2C SMBUS, Interrupt output, SSOP-16
 K SMBUS I2C Expander
 F http://www.ti.com/lit/ds/symlink/tca9554.pdf
 $ENDCMP
 #
-$CMP TCA9554DWR
+$CMP TCA9554DW
 D 8 Bit Port/Expander, I2C SMBUS, Interrupt output, SOIC-16
 K SMBUS I2C Expander
 F http://www.ti.com/lit/ds/symlink/tca9554.pdf
 $ENDCMP
 #
-$CMP TCA9554DWT
-D 8 Bit Port/Expander, I2C SMBUS, Interrupt output, SOIC-16
-K SMBUS I2C Expander
-F http://www.ti.com/lit/ds/symlink/tca9554.pdf
-$ENDCMP
-#
-$CMP TCA9554PWR
+$CMP TCA9554PW
 D 8 Bit Port/Expander, I2C SMBUS, Interrupt output, TSSOP-16
 K SMBUS I2C Expander
 F http://www.ti.com/lit/ds/symlink/tca9554.pdf
diff --git a/Interface_Expansion.lib b/Interface_Expansion.lib
index d8b66b29dd..0aa43e6169 100644
--- a/Interface_Expansion.lib
+++ b/Interface_Expansion.lib
@@ -1071,15 +1071,15 @@ X SC2 9 400 300 100 L 50 50 1 1 B
 ENDDRAW
 ENDDEF
 #
-# TCA9554DBQR
+# TCA9554DB
 #
-DEF TCA9554DBQR U 0 20 Y Y 1 F N
+DEF TCA9554DB U 0 20 Y Y 1 F N
 F0 "U" -300 450 50 H V L CNN
-F1 "TCA9554DBQR" 100 450 50 H V L CNN
-F2 "Package_SO:SSOP-16_3.9x4.9mm_P0.635mm" 950 -550 50 H I C CNN
+F1 "TCA9554DB" 100 450 50 H V L CNN
+F2 "Package_SO:SSOP-16_5.3x6.2mm_P0.65mm" 950 -550 50 H I C CNN
 F3 "" 100 -100 50 H I C CNN
 $FPLIST
- SSOP*3.9x4.9mm*P0.635mm*
+ SSOP*5.3x6.2mm*P0.65mm*
 $ENDFPLIST
 DRAW
 S -300 -500 300 400 0 1 10 f
@@ -1102,15 +1102,15 @@ X P4 9 400 -100 100 L 50 50 1 1 B
 ENDDRAW
 ENDDEF
 #
-# TCA9554DBR
+# TCA9554DBQ
 #
-DEF TCA9554DBR U 0 20 Y Y 1 F N
+DEF TCA9554DBQ U 0 20 Y Y 1 F N
 F0 "U" -300 450 50 H V L CNN
-F1 "TCA9554DBR" 100 450 50 H V L CNN
-F2 "Package_SO:SSOP-16_5.3x6.2mm_P0.65mm" 950 -550 50 H I C CNN
+F1 "TCA9554DBQ" 100 450 50 H V L CNN
+F2 "Package_SO:SSOP-16_3.9x4.9mm_P0.635mm" 950 -550 50 H I C CNN
 F3 "" 100 -100 50 H I C CNN
 $FPLIST
- SSOP*5.3x6.2mm*P0.65mm*
+ SSOP*3.9x4.9mm*P0.635mm*
 $ENDFPLIST
 DRAW
 S -300 -500 300 400 0 1 10 f
@@ -1133,14 +1133,13 @@ X P4 9 400 -100 100 L 50 50 1 1 B
 ENDDRAW
 ENDDEF
 #
-# TCA9554DWR
+# TCA9554DW
 #
-DEF TCA9554DWR U 0 20 Y Y 1 F N
+DEF TCA9554DW U 0 20 Y Y 1 F N
 F0 "U" -300 450 50 H V L CNN
-F1 "TCA9554DWR" 100 450 50 H V L CNN
+F1 "TCA9554DW" 100 450 50 H V L CNN
 F2 "Package_SO:SOIC-16W_7.5x10.3mm_P1.27mm" 950 -550 50 H I C CNN
 F3 "" 100 -100 50 H I C CNN
-ALIAS TCA9554DWT
 $FPLIST
  SOIC*7.5x10.3mm*P1.27mm*
 $ENDFPLIST
@@ -1165,11 +1164,11 @@ X P4 9 400 -100 100 L 50 50 1 1 B
 ENDDRAW
 ENDDEF
 #
-# TCA9554PWR
+# TCA9554PW
 #
-DEF TCA9554PWR U 0 20 Y Y 1 F N
+DEF TCA9554PW U 0 20 Y Y 1 F N
 F0 "U" -300 450 50 H V L CNN
-F1 "TCA9554PWR" 100 450 50 H V L CNN
+F1 "TCA9554PW" 100 450 50 H V L CNN
 F2 "Package_SO:TSSOP-16_4.4x5mm_P0.65mm" 950 -550 50 H I C CNN
 F3 "" 100 -100 50 H I C CNN
 $FPLIST

From 6e1a3da357d96a65fd893712edd2bc51eda76b4c Mon Sep 17 00:00:00 2001
From: Tim Pambor <tp@osasysteme.de>
Date: Sat, 20 Apr 2019 19:57:40 +0200
Subject: [PATCH 169/201] Rename pin 4 and 12 to G and ~G Center VDD and GND
 pins Remove pin count from footprint filter

---
 Interface.lib | 26 +++++++++++++-------------
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/Interface.lib b/Interface.lib
index dd58f1fe5d..325efdb96d 100644
--- a/Interface.lib
+++ b/Interface.lib
@@ -940,7 +940,7 @@ F1 "AM26LV32xD" 400 950 50 H V C CNN
 F2 "Package_SO:SOIC-16_3.9x9.9mm_P1.27mm" 1000 -950 50 H I C CNN
 F3 "" 0 -400 50 H I C CNN
 $FPLIST
- SOIC*16*3.9x9.9mm*P1.27mm*
+ SOIC*3.9x9.9mm*P1.27mm*
 $ENDFPLIST
 DRAW
 A -272 0 132 320 -320 0 1 5 N -160 70 -160 -70
@@ -976,10 +976,10 @@ P 3 0 1 5 -230 750 -230 800 -250 800 N
 P 3 0 1 5 0 -600 -110 -600 -110 -660 N
 P 3 0 1 5 0 -300 -110 -300 -110 -360 N
 P 3 0 1 5 0 300 -110 300 -110 360 N
-P 4 0 1 5 -250 100 -200 100 -200 50 -150 50 N
+P 4 0 1 5 -300 100 -200 100 -200 50 -150 50 N
 P 4 0 1 5 -230 650 -230 600 -240 600 -250 600 N
 P 4 0 1 5 -180 780 -180 620 -40 700 -180 780 N
-P 4 0 1 5 -170 -50 -200 -50 -200 -100 -250 -100 N
+P 4 0 1 5 -170 -50 -200 -50 -200 -100 -300 -100 N
 P 4 0 1 5 0 300 0 600 -110 600 -110 660 N
 P 2 1 1 5 -230 -750 -200 -750 N
 P 2 1 1 5 -230 -650 -180 -650 N
@@ -993,18 +993,18 @@ P 4 1 1 5 -180 480 -180 320 -40 400 -180 480 N
 X 1B 1 -500 600 100 R 50 50 1 1 I
 X 3A 10 -500 -300 100 R 50 50 1 1 I
 X 3Y 11 500 -400 100 L 50 50 1 1 T
-X ~EN 12 -500 -100 100 R 50 50 1 1 I
+X ~G 12 -500 -100 100 R 50 50 1 1 I
 X 4Y 13 500 -700 100 L 50 50 1 1 T
 X 4A 14 -500 -600 100 R 50 50 1 1 I
 X 4B 15 -500 -800 100 R 50 50 1 1 I
-X VDD 16 100 1000 100 D 50 50 1 1 W
+X VDD 16 0 1000 100 D 50 50 1 1 W
 X 1A 2 -500 800 100 R 50 50 1 1 I
 X 1Y 3 500 700 100 L 50 50 1 1 T
-X EN 4 -500 100 100 R 50 50 1 1 I
+X G 4 -500 100 100 R 50 50 1 1 I
 X 2Y 5 500 400 100 L 50 50 1 1 T
 X 2A 6 -500 500 100 R 50 50 1 1 I
 X 2B 7 -500 300 100 R 50 50 1 1 I
-X GND 8 100 -1000 100 U 50 50 1 1 W
+X GND 8 0 -1000 100 U 50 50 1 1 W
 X 3B 9 -500 -500 100 R 50 50 1 1 I
 ENDDRAW
 ENDDEF
@@ -1053,10 +1053,10 @@ P 3 0 1 5 -230 750 -230 800 -250 800 N
 P 3 0 1 5 0 -600 -110 -600 -110 -660 N
 P 3 0 1 5 0 -300 -110 -300 -110 -360 N
 P 3 0 1 5 0 300 -110 300 -110 360 N
-P 4 0 1 5 -250 100 -200 100 -200 50 -150 50 N
+P 4 0 1 5 -300 100 -200 100 -200 50 -150 50 N
 P 4 0 1 5 -230 650 -230 600 -240 600 -250 600 N
 P 4 0 1 5 -180 780 -180 620 -40 700 -180 780 N
-P 4 0 1 5 -170 -50 -200 -50 -200 -100 -250 -100 N
+P 4 0 1 5 -170 -50 -200 -50 -200 -100 -300 -100 N
 P 4 0 1 5 0 300 0 600 -110 600 -110 660 N
 P 2 1 1 5 -230 -750 -200 -750 N
 P 2 1 1 5 -230 -650 -180 -650 N
@@ -1070,18 +1070,18 @@ P 4 1 1 5 -180 480 -180 320 -40 400 -180 480 N
 X 1B 1 -500 600 100 R 50 50 1 1 I
 X 3A 10 -500 -300 100 R 50 50 1 1 I
 X 3Y 11 500 -400 100 L 50 50 1 1 T
-X ~EN 12 -500 -100 100 R 50 50 1 1 I
+X ~G 12 -500 -100 100 R 50 50 1 1 I
 X 4Y 13 500 -700 100 L 50 50 1 1 T
 X 4A 14 -500 -600 100 R 50 50 1 1 I
 X 4B 15 -500 -800 100 R 50 50 1 1 I
-X VDD 16 100 1000 100 D 50 50 1 1 W
+X VDD 16 0 1000 100 D 50 50 1 1 W
 X 1A 2 -500 800 100 R 50 50 1 1 I
 X 1Y 3 500 700 100 L 50 50 1 1 T
-X EN 4 -500 100 100 R 50 50 1 1 I
+X G 4 -500 100 100 R 50 50 1 1 I
 X 2Y 5 500 400 100 L 50 50 1 1 T
 X 2A 6 -500 500 100 R 50 50 1 1 I
 X 2B 7 -500 300 100 R 50 50 1 1 I
-X GND 8 100 -1000 100 U 50 50 1 1 W
+X GND 8 0 -1000 100 U 50 50 1 1 W
 X 3B 9 -500 -500 100 R 50 50 1 1 I
 ENDDRAW
 ENDDEF

From 295a374ae939b30262777cd42b0a25c42de94adc Mon Sep 17 00:00:00 2001
From: Anton Lysak <antonlysak@gmail.com>
Date: Sun, 21 Apr 2019 13:35:51 +0600
Subject: [PATCH 170/201] Fixing Travis issue

---
 Connector.dcm | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Connector.dcm b/Connector.dcm
index e20a9970c0..b1a5e0eb75 100644
--- a/Connector.dcm
+++ b/Connector.dcm
@@ -1131,6 +1131,7 @@ $ENDCMP
 $CMP MXM3.0
 D MXM3.0 connector
 K MXM connector
+F ~
 $ENDCMP
 #
 $CMP Micro_SD_Card

From 571a77b4861d29ff2a55b7abbe7cc3c9c0d68eaf Mon Sep 17 00:00:00 2001
From: Anton Lysak <antonlysak@gmail.com>
Date: Sun, 21 Apr 2019 14:49:09 +0600
Subject: [PATCH 171/201] CRESET_B and CDONE pins moved to Unit E

---
 FPGA_Lattice.lib | 72 ++++++++++++++++++++++++------------------------
 1 file changed, 36 insertions(+), 36 deletions(-)

diff --git a/FPGA_Lattice.lib b/FPGA_Lattice.lib
index b0734c8a0b..e58c981dd1 100644
--- a/FPGA_Lattice.lib
+++ b/FPGA_Lattice.lib
@@ -4,8 +4,8 @@ EESchema-LIBRARY Version 2.4
 # ICE40HX1K-TQ144
 #
 DEF ICE40HX1K-TQ144 U 0 20 Y Y 5 L N
-F0 "U" -400 1450 50 H V C CNN
-F1 "ICE40HX1K-TQ144" 500 1450 50 H V C CNN
+F0 "U" -250 1450 50 H V C CNN
+F1 "ICE40HX1K-TQ144" 400 1450 50 H V C CNN
 F2 "Package_QFP:TQFP-144_20x20mm_P0.5mm" 0 -1450 50 H I C CNN
 F3 "" -850 1400 50 H I C CNN
 $FPLIST
@@ -14,7 +14,7 @@ $ENDFPLIST
 DRAW
 S -350 1250 350 -1250 1 1 10 f
 S -350 1350 350 -1350 2 1 10 f
-S -350 1250 350 -1250 3 1 10 f
+S -350 1150 350 -1150 3 1 10 f
 S -350 1350 350 -1350 4 1 10 f
 S -450 550 450 -550 5 1 10 f
 X IOT_73 112 -500 1100 150 R 50 50 1 1 B
@@ -28,10 +28,10 @@ X IOT_80 119 -500 400 150 R 50 50 1 1 B
 X IOT_81 120 -500 300 150 R 50 50 1 1 B
 X IOT_82 121 -500 200 150 R 50 50 1 1 B
 X IOT_83 122 -500 100 150 R 50 50 1 1 B
-X VCCIO_0 123 100 1400 150 D 50 50 1 1 W
+X VCCIO_0 123 0 1400 150 D 50 50 1 1 W
 X IOT_84_GBIN1 128 -500 0 150 R 50 50 1 1 B
 X IOT_85_GBIN0 129 -500 -100 150 R 50 50 1 1 B
-X VCCIO_0 133 100 1400 150 D 50 50 1 1 P N
+X VCCIO_0 133 0 1400 150 D 50 50 1 1 P N
 X IOT_87 134 -500 -200 150 R 50 50 1 1 B
 X IOT_88 135 -500 -300 150 R 50 50 1 1 B
 X IOT_89 136 -500 -400 150 R 50 50 1 1 B
@@ -47,7 +47,7 @@ X NC 16 300 300 150 L 50 50 1 1 N N
 X NC 17 300 200 150 L 50 50 1 1 N N
 X NC 18 300 -300 150 L 50 50 1 1 N N
 X NC 77 300 -400 150 L 50 50 1 1 N N
-X VCCIO_1 100 100 1500 150 D 50 50 2 1 P N
+X VCCIO_1 100 0 1500 150 D 50 50 2 1 P N
 X IOR_67 101 -500 -700 150 R 50 50 2 1 B
 X IOR_68 102 -500 -800 150 R 50 50 2 1 B
 X IOR_69 104 -500 -900 150 R 50 50 2 1 B
@@ -69,7 +69,7 @@ X IOR_55 81 -500 500 150 R 50 50 2 1 B
 X NC 82 300 -400 150 L 50 50 2 1 N N
 X IOR_56 87 -500 400 150 R 50 50 2 1 B
 X IOR_57 88 -500 300 150 R 50 50 2 1 B
-X VCCIO_1 89 100 1500 150 D 50 50 2 1 W
+X VCCIO_1 89 0 1500 150 D 50 50 2 1 W
 X IOR_58 90 -500 200 150 R 50 50 2 1 B
 X IOR_59 91 -500 100 150 R 50 50 2 1 B
 X IOR_60_GBIN3 93 -500 0 150 R 50 50 2 1 B
@@ -80,31 +80,29 @@ X IOR_64 97 -500 -400 150 R 50 50 2 1 B
 X IOR_65 98 -500 -500 150 R 50 50 2 1 B
 X IOR_66 99 -500 -600 150 R 50 50 2 1 B
 X NC 110 300 -400 150 L 50 50 3 1 N N
-X NC 124 300 -800 150 L 50 50 3 1 N N
-X IOB_24 37 -500 800 150 R 50 50 3 1 B
-X IOB_25 38 -500 700 150 R 50 50 3 1 B
-X IOB_26 39 -500 600 150 R 50 50 3 1 B
-X IOB_27 41 -500 500 150 R 50 50 3 1 B
-X IOB_28 42 -500 400 150 R 50 50 3 1 B
-X IOB_29 43 -500 300 150 R 50 50 3 1 B
-X IOB_30 44 -500 200 150 R 50 50 3 1 B
-X IOB_31 45 -500 100 150 R 50 50 3 1 B
-X VCCIO_2 46 100 1400 150 D 50 50 3 1 W
-X IOB_32 47 -500 0 150 R 50 50 3 1 B
-X IOB_33 48 -500 -100 150 R 50 50 3 1 B
-X IOB_35_GBIN5 49 -500 -200 150 R 50 50 3 1 B
-X IOB_36_GBIN4 50 -500 -300 150 R 50 50 3 1 B
-X IOB_34 52 -500 -400 150 R 50 50 3 1 B
-X IOB_37 56 -500 -500 150 R 50 50 3 1 B
-X VCCIO_2 57 100 1400 150 D 50 50 3 1 P N
-X IOB_38 58 -500 -600 150 R 50 50 3 1 B
-X IOB_39 60 -500 -700 150 R 50 50 3 1 B
-X IOB_40 61 -500 -800 150 R 50 50 3 1 B
-X IOB_41 62 -500 -900 150 R 50 50 3 1 B
-X IOB_42_CBSEL0 63 -500 -1000 150 R 50 50 3 1 B
-X IOB_43_CBSEL1 64 -500 -1100 150 R 50 50 3 1 B
-X CDONE 65 500 800 150 L 50 50 3 1 C
-X ~CRESET_B 66 -500 1100 150 R 50 50 3 1 I
+X NC 124 300 -700 150 L 50 50 3 1 N N
+X IOB_24 37 -500 900 150 R 50 50 3 1 B
+X IOB_25 38 -500 800 150 R 50 50 3 1 B
+X IOB_26 39 -500 700 150 R 50 50 3 1 B
+X IOB_27 41 -500 600 150 R 50 50 3 1 B
+X IOB_28 42 -500 500 150 R 50 50 3 1 B
+X IOB_29 43 -500 400 150 R 50 50 3 1 B
+X IOB_30 44 -500 300 150 R 50 50 3 1 B
+X IOB_31 45 -500 200 150 R 50 50 3 1 B
+X VCCIO_2 46 0 1300 150 D 50 50 3 1 W
+X IOB_32 47 -500 100 150 R 50 50 3 1 B
+X IOB_33 48 -500 0 150 R 50 50 3 1 B
+X IOB_35_GBIN5 49 -500 -100 150 R 50 50 3 1 B
+X IOB_36_GBIN4 50 -500 -200 150 R 50 50 3 1 B
+X IOB_34 52 -500 -300 150 R 50 50 3 1 B
+X IOB_37 56 -500 -400 150 R 50 50 3 1 B
+X VCCIO_2 57 0 1300 150 D 50 50 3 1 P N
+X IOB_38 58 -500 -500 150 R 50 50 3 1 B
+X IOB_39 60 -500 -600 150 R 50 50 3 1 B
+X IOB_40 61 -500 -700 150 R 50 50 3 1 B
+X IOB_41 62 -500 -800 150 R 50 50 3 1 B
+X IOB_42_CBSEL0 63 -500 -900 150 R 50 50 3 1 B
+X IOB_43_CBSEL1 64 -500 -1000 150 R 50 50 3 1 B
 X NC 83 300 400 150 L 50 50 3 1 N N
 X NC 84 300 300 150 L 50 50 3 1 N N
 X NC 85 300 -500 150 L 50 50 3 1 N N
@@ -115,8 +113,8 @@ X IOL_5B 12 -500 200 150 R 50 50 4 1 B
 X NC 125 300 400 150 L 50 50 4 1 N N
 X NC 126 300 300 150 L 50 50 4 1 N N
 X NC 127 300 200 150 L 50 50 4 1 N N
-X NC 130 300 -200 150 L 50 50 4 1 N N
-X NC 131 300 -300 150 L 50 50 4 1 N N
+X NC 130 300 -300 150 L 50 50 4 1 N N
+X NC 131 300 -400 150 L 50 50 4 1 N N
 X IOL_6A 19 -500 100 150 R 50 50 4 1 B
 X IOL_1B 2 -500 1000 150 R 50 50 4 1 B
 X IOL_6B_GBIN7 20 -500 0 150 R 50 50 4 1 B
@@ -129,13 +127,13 @@ X IOL_9B 26 -500 -600 150 R 50 50 4 1 B
 X IOL_10A 28 -500 -700 150 R 50 50 4 1 B
 X IOL_10B 29 -500 -800 150 R 50 50 4 1 B
 X IOL_2A 3 -500 900 150 R 50 50 4 1 B
-X VCCIO_3 30 100 1500 150 D 50 50 4 1 P N
+X VCCIO_3 30 0 1500 150 D 50 50 4 1 P N
 X IOL_11A 31 -500 -900 150 R 50 50 4 1 B
 X IOL_11B 32 -500 -1000 150 R 50 50 4 1 B
 X IOL_12A 33 -500 -1100 150 R 50 50 4 1 B
 X IOL_12B 34 -500 -1200 150 R 50 50 4 1 B
 X IOL_2B 4 -500 800 150 R 50 50 4 1 B
-X VCCIO_3 6 100 1500 150 D 50 50 4 1 W
+X VCCIO_3 6 0 1500 150 D 50 50 4 1 W
 X IOL_3A 7 -500 700 150 R 50 50 4 1 B
 X IOL_3B 8 -500 600 150 R 50 50 4 1 B
 X IOL_4A 9 -500 500 150 R 50 50 4 1 B
@@ -153,6 +151,8 @@ X VCCPLL 36 300 700 150 D 50 50 5 1 W
 X GND 5 0 -700 150 U 50 50 5 1 W
 X VCC 51 0 700 150 D 50 50 5 1 P N
 X GND 59 0 -700 150 U 50 50 5 1 P N
+X CDONE 65 600 0 150 L 50 50 5 1 C
+X ~CRESET_B 66 -600 -400 150 R 50 50 5 1 I
 X IOB_44_SDO 67 -600 100 150 R 50 50 5 1 B
 X IOB_45_SDI 68 -600 0 150 R 50 50 5 1 B
 X GND 69 0 -700 150 U 50 50 5 1 P N

From 5c5a3e0322310543179957bf7f599810f42a0eef Mon Sep 17 00:00:00 2001
From: bwack <hansdals@yahoo.no>
Date: Sun, 21 Apr 2019 14:36:42 +0200
Subject: [PATCH 172/201] added symbol - Memory_RAM/IDT7006PF dual 16k x 8 dual
 port ram

---
 Memory_RAM.dcm |  19 ++++--
 Memory_RAM.lib | 170 +++++++++++++++++++++++++++++++++++--------------
 2 files changed, 135 insertions(+), 54 deletions(-)

diff --git a/Memory_RAM.dcm b/Memory_RAM.dcm
index 4eaf327ceb..d4300e91ce 100644
--- a/Memory_RAM.dcm
+++ b/Memory_RAM.dcm
@@ -8,7 +8,7 @@ $ENDCMP
 #
 $CMP 628128_TSOP32
 D 128K x 8 High-Speed CMOS Static RAM, 55/70ns, TSOP-I-32
-K RAM SRAM CMOS MEMORY 
+K RAM SRAM CMOS MEMORY
 F http://www.futurlec.com/Datasheet/Memory/628128.pdf
 $ENDCMP
 #
@@ -24,6 +24,12 @@ K memory SRAM
 F https://www.alliancememory.com/wp-content/uploads/pdf/AS6C1616-TSOPI.pdf
 $ENDCMP
 #
+$CMP AS6C4008-55PCN
+D 512K x 8 Low Power CMOS RAM, DIP-32
+K RAM SRAM CMOS MEMORY
+F https://www.alliancememory.com/wp-content/uploads/pdf/AS6C4008.pdf
+$ENDCMP
+#
 $CMP ESP-PSRAM32
 D 32 Mbit serial pseudo SRAM device organized as 4Mx8 bits, 1.8 VCC, SOIC8 (SOP8)
 K 32 Mbit serial pseudo SRAM MEMORY
@@ -36,6 +42,11 @@ K DDR4 DRAM MEMORY
 F https://www.skhynix.com/product/filedata/fileDownload.do?seq=7687
 $ENDCMP
 #
+$CMP IDT7006PF
+D 16K x 8 DUAL-PORT SRAM TQFP-64 14x14x1.4mm
+F https://www.idt.com/document/dst/7006-data-sheet
+$ENDCMP
+#
 $CMP IDT71V65903S
 D 165 pins BGA 3.3V high-speed 9 Megabit synchronous SRAMs 512K x 18 (or  256K x 36)
 $ENDCMP
@@ -130,10 +141,4 @@ K SRAM MEMORY
 F http://www.issi.com/WW/pdf/61-64C5128AL.pdf
 $ENDCMP
 #
-$CMP AS6C4008-55PCN
-D 512K x 8 Low Power CMOS RAM, DIP-32
-K RAM SRAM CMOS MEMORY
-F https://www.alliancememory.com/wp-content/uploads/pdf/AS6C4008.pdf
-$ENDCMP
-#
 #End Doc Library
diff --git a/Memory_RAM.lib b/Memory_RAM.lib
index 00ebafaa7d..e3a3f04b1b 100644
--- a/Memory_RAM.lib
+++ b/Memory_RAM.lib
@@ -224,6 +224,53 @@ X A19 9 600 1100 200 L 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #
+# AS6C4008-55PCN
+#
+DEF AS6C4008-55PCN U 0 20 Y Y 1 F N
+F0 "U" -400 1025 50 H V L BNN
+F1 "AS6C4008-55PCN" 100 1025 50 H V L BNN
+F2 "Package_DIP:DIP-32_W15.24mm" 0 100 50 H I C CNN
+F3 "" 0 100 50 H I C CNN
+$FPLIST
+ DIP*W15.24mm*
+$ENDFPLIST
+DRAW
+S -400 1000 400 -1000 0 1 10 f
+X VSS 16 0 -1100 100 U 50 50 0 0 W
+X VCC 32 0 1100 100 D 50 50 0 0 W
+X A18 1 -500 -900 100 R 50 50 1 1 I
+X A2 10 -500 700 100 R 50 50 1 1 I
+X A1 11 -500 800 100 R 50 50 1 1 I
+X A0 12 -500 900 100 R 50 50 1 1 I
+X DQ0 13 500 900 100 L 50 50 1 1 T
+X DQ1 14 500 800 100 L 50 50 1 1 T
+X DQ2 15 500 700 100 L 50 50 1 1 T
+X DQ3 17 500 600 100 L 50 50 1 1 T
+X DQ4 18 500 500 100 L 50 50 1 1 T
+X DQ5 19 500 400 100 L 50 50 1 1 T
+X A16 2 -500 -700 100 R 50 50 1 1 I
+X DQ6 20 500 300 100 L 50 50 1 1 T
+X DQ7 21 500 200 100 L 50 50 1 1 T
+X CE# 22 500 -100 100 L 50 50 1 1 I
+X A10 23 -500 -100 100 R 50 50 1 1 I
+X OE# 24 500 -200 100 L 50 50 1 1 I
+X A11 25 -500 -200 100 R 50 50 1 1 I
+X A9 26 -500 0 100 R 50 50 1 1 I
+X A8 27 -500 100 100 R 50 50 1 1 I
+X A13 28 -500 -400 100 R 50 50 1 1 I
+X WE# 29 500 -300 100 L 50 50 1 1 I
+X A14 3 -500 -500 100 R 50 50 1 1 I
+X A17 30 -500 -800 100 R 50 50 1 1 I
+X A15 31 -500 -600 100 R 50 50 1 1 I
+X A12 4 -500 -300 100 R 50 50 1 1 I
+X A7 5 -500 200 100 R 50 50 1 1 I
+X A6 6 -500 300 100 R 50 50 1 1 I
+X A5 7 -500 400 100 R 50 50 1 1 I
+X A4 8 -500 500 100 R 50 50 1 1 I
+X A3 9 -500 600 100 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
 # CY7C199
 #
 DEF CY7C199 U 0 20 Y Y 1 F N
@@ -381,6 +428,82 @@ X VDD N9 -100 1900 100 D 50 50 0 1 P N
 ENDDRAW
 ENDDEF
 #
+# IDT7006PF
+#
+DEF IDT7006PF U 0 20 Y Y 1 F N
+F0 "U" 0 100 50 H V C CNN
+F1 "IDT7006PF" 0 -100 50 H V C CNN
+F2 "Package_QFP:TQFP-64_14x14mm_P0.8mm" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+S -600 -1700 600 1700 0 1 10 f
+X I/O2L 1 -900 -1000 300 R 50 50 1 1 B
+X I/O0R 10 900 -800 300 L 50 50 1 1 B
+X I/O1R 11 900 -900 300 L 50 50 1 1 B
+X I/O2R 12 900 -1000 300 L 50 50 1 1 B
+X VCC 13 0 1700 0 U 50 50 1 1 W N
+X I/O3R 14 900 -1100 300 L 50 50 1 1 B
+X I/O4R 15 900 -1200 300 L 50 50 1 1 B
+X I/O5R 16 900 -1300 300 L 50 50 1 1 B
+X I/O6R 17 900 -1400 300 L 50 50 1 1 B
+X I/O7R 18 900 -1500 300 L 50 50 1 1 B
+X /OER 19 900 1400 300 L 50 50 1 1 I
+X I/O3L 2 -900 -1100 300 R 50 50 1 1 B
+X R/WR 20 900 1300 300 L 50 50 1 1 I
+X /SEMR 21 900 1100 300 L 50 50 1 1 I
+X /CER 22 900 1500 300 L 50 50 1 1 I
+X A13R 23 900 -600 300 L 50 50 1 1 I
+X GND 24 0 -1700 0 U 50 50 1 1 W N
+X A12R 25 900 -500 300 L 50 50 1 1 I
+X A11R 26 900 -400 300 L 50 50 1 1 I
+X A10R 27 900 -300 300 L 50 50 1 1 I
+X A9R 28 900 -200 300 L 50 50 1 1 I
+X A8R 29 900 -100 300 L 50 50 1 1 I
+X I/O4L 3 -900 -1200 300 R 50 50 1 1 B
+X A7R 30 900 0 300 L 50 50 1 1 I
+X A6R 31 900 100 300 L 50 50 1 1 I
+X A5R 32 900 200 300 L 50 50 1 1 I
+X A4R 33 900 300 300 L 50 50 1 1 I
+X A3R 34 900 400 300 L 50 50 1 1 I
+X A2R 35 900 500 300 L 50 50 1 1 I
+X A1R 36 900 600 300 L 50 50 1 1 I
+X A0R 37 900 700 300 L 50 50 1 1 I
+X /INTR 38 900 1000 300 L 50 50 1 1 O
+X /BUSYR 39 900 1200 300 L 50 50 1 1 O
+X I/O5L 4 -900 -1300 300 R 50 50 1 1 B
+X M/S 40 -900 900 300 R 50 50 1 1 I
+X GND 41 0 -1700 0 U 50 50 1 1 W N
+X /BUSYL 42 -900 1200 300 R 50 50 1 1 O
+X /INTL 43 -900 1000 300 R 50 50 1 1 O
+X A0L 44 -900 700 300 R 50 50 1 1 I
+X A1L 45 -900 600 300 R 50 50 1 1 I
+X A2L 46 -900 500 300 R 50 50 1 1 I
+X A3L 47 -900 400 300 R 50 50 1 1 I
+X A4L 48 -900 300 300 R 50 50 1 1 I
+X A5L 49 -900 200 300 R 50 50 1 1 I
+X GND 5 0 -1700 0 U 50 50 1 1 W N
+X A6L 50 -900 100 300 R 50 50 1 1 I
+X A7L 51 -900 0 300 R 50 50 1 1 I
+X A8L 52 -900 -100 300 R 50 50 1 1 I
+X A9L 53 -900 -200 300 R 50 50 1 1 I
+X A10L 54 -900 -300 300 R 50 50 1 1 I
+X A11L 55 -900 -400 300 R 50 50 1 1 I
+X A12L 56 -900 -500 300 R 50 50 1 1 I
+X VCC 57 0 1700 0 U 50 50 1 1 W N
+X A13L 58 -900 -600 300 R 50 50 1 1 I
+X /CEL 59 -900 1500 300 R 50 50 1 1 I
+X I/O6L 6 -900 -1400 300 R 50 50 1 1 B
+X /SEML 60 -900 1100 300 R 50 50 1 1 I
+X R/WL 61 -900 1300 300 R 50 50 1 1 I
+X /OEL 62 -900 1400 300 R 50 50 1 1 I
+X I/O0L 63 -900 -800 300 R 50 50 1 1 B
+X I/O1L 64 -900 -900 300 R 50 50 1 1 B
+X I/O7L 7 -900 -1500 300 R 50 50 1 1 B
+X VCC 8 0 1700 0 U 50 50 1 1 W N
+X GND 9 0 -1700 0 U 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
 # IDT7027_TQ100
 #
 DEF IDT7027_TQ100 U 0 20 Y Y 1 F N
@@ -1089,51 +1212,4 @@ X A3 9 -600 800 100 R 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #
-# AS6C4008-55PCN
-#
-DEF AS6C4008-55PCN U 0 20 Y Y 1 F N
-F0 "U" -400 1025 50 H V L BNN
-F1 "AS6C4008-55PCN" 100 1025 50 H V L BNN
-F2 "Package_DIP:DIP-32_W15.24mm" 0 100 50 H I C CNN
-F3 "" 0 100 50 H I C CNN
-$FPLIST
- DIP*W15.24mm*
-$ENDFPLIST
-DRAW
-S -400 1000 400 -1000 0 1 10 f
-X VSS 16 0 -1100 100 U 50 50 0 0 W
-X VCC 32 0 1100 100 D 50 50 0 0 W
-X A18 1 -500 -900 100 R 50 50 1 1 I
-X A2 10 -500 700 100 R 50 50 1 1 I
-X A1 11 -500 800 100 R 50 50 1 1 I
-X A0 12 -500 900 100 R 50 50 1 1 I
-X DQ0 13 500 900 100 L 50 50 1 1 T
-X DQ1 14 500 800 100 L 50 50 1 1 T
-X DQ2 15 500 700 100 L 50 50 1 1 T
-X DQ3 17 500 600 100 L 50 50 1 1 T
-X DQ4 18 500 500 100 L 50 50 1 1 T
-X DQ5 19 500 400 100 L 50 50 1 1 T
-X A16 2 -500 -700 100 R 50 50 1 1 I
-X DQ6 20 500 300 100 L 50 50 1 1 T
-X DQ7 21 500 200 100 L 50 50 1 1 T
-X CE# 22 500 -100 100 L 50 50 1 1 I
-X A10 23 -500 -100 100 R 50 50 1 1 I
-X OE# 24 500 -200 100 L 50 50 1 1 I
-X A11 25 -500 -200 100 R 50 50 1 1 I
-X A9 26 -500 0 100 R 50 50 1 1 I
-X A8 27 -500 100 100 R 50 50 1 1 I
-X A13 28 -500 -400 100 R 50 50 1 1 I
-X WE# 29 500 -300 100 L 50 50 1 1 I
-X A14 3 -500 -500 100 R 50 50 1 1 I
-X A17 30 -500 -800 100 R 50 50 1 1 I
-X A15 31 -500 -600 100 R 50 50 1 1 I
-X A12 4 -500 -300 100 R 50 50 1 1 I
-X A7 5 -500 200 100 R 50 50 1 1 I
-X A6 6 -500 300 100 R 50 50 1 1 I
-X A5 7 -500 400 100 R 50 50 1 1 I
-X A4 8 -500 500 100 R 50 50 1 1 I
-X A3 9 -500 600 100 R 50 50 1 1 I
-ENDDRAW
-ENDDEF
-#
 #End Library

From 9ca22abbc620bf3b759f4b3a825215504917acd6 Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Sun, 21 Apr 2019 16:16:01 +0300
Subject: [PATCH 173/201] changes as suggester by review. add datasheet
 document name and link.

---
 Interface_Optical.dcm | 16 ++++++-------
 Interface_Optical.lib | 54 +++++++++++++++++++++----------------------
 2 files changed, 34 insertions(+), 36 deletions(-)

diff --git a/Interface_Optical.dcm b/Interface_Optical.dcm
index 5b5a0935a2..99ef846a49 100644
--- a/Interface_Optical.dcm
+++ b/Interface_Optical.dcm
@@ -24,16 +24,16 @@ K opto IR
 F http://www.onsemi.com/pub/Collateral/QSE159-D.pdf
 $ENDCMP
 #
-$CMP SFP+_CONNECTOR
-D Small Form Factor Pluggable (SFP+) module, serial-to-serial data-agnostic optical transceiver
-K SFP transciever
-F ~
+$CMP SFP
+D Small Form Factor Pluggable (SFP) module, 1 Gbit/s, serial-to-serial data-agnostic optical transceiver
+K SFP transciever gigabit ethernet
+F INF-8074i, http://www.10gtek.com/templates/wzten/pdf/INF-8074.pdf
 $ENDCMP
 #
-$CMP SFP_CONNECTOR
-D Small Form Factor Pluggable (SFP) module, serial-to-serial data-agnostic optical transceiver
-K SFP transciever SFP
-F https://members.snia.org/document/dl/25891
+$CMP SFP+
+D Small Form Factor Pluggable (SFP+) module, 10 Gbit/s, serial-to-serial data-agnostic optical transceiver
+K SFP transciever SFF-8432 gigabit ethernet
+F SFF-8432 https://members.snia.org/document/dl/25892
 $ENDCMP
 #
 $CMP TSDP341xx
diff --git a/Interface_Optical.lib b/Interface_Optical.lib
index 7be2a836b7..d3e746af04 100644
--- a/Interface_Optical.lib
+++ b/Interface_Optical.lib
@@ -185,18 +185,17 @@ X Vcc 3 100 300 100 D 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #
-# SFP+_CONNECTOR
+# SFP
 #
-DEF SFP+_CONNECTOR P 0 20 Y Y 1 F N
-F0 "P" -350 650 50 H V C CNN
-F1 "SFP+_CONNECTOR" 450 650 50 H V C CNN
-F2 "Connector:Connector_SFP_and_Cage.kicad_mod" 0 -850 50 H I C CNN
+DEF SFP J 0 20 Y Y 1 F N
+F0 "J" -350 650 50 H V C CNN
+F1 "SFP" 450 650 50 H V C CNN
+F2 "" 0 -850 50 H I C CNN
 F3 "" -450 650 50 H I C CNN
 $FPLIST
- SFP*
+ *SFP*
 $ENDFPLIST
 DRAW
-T 0 -50 0 50 0 0 0 SFP+ Normal 0 C C
 S -400 600 400 -600 0 0 10 f
 X VeeT 1 -100 -700 100 U 50 50 1 1 W
 X VeeR 10 0 -700 100 U 50 50 1 1 W
@@ -211,29 +210,28 @@ X TD+ 18 500 -100 100 L 50 50 1 1 I
 X TD- 19 500 -200 100 L 50 50 1 1 I
 X TX_FAULT 2 500 -400 100 L 50 50 1 1 C
 X VeeT 20 -100 -700 100 U 50 50 1 1 P N
-X TX_DISABLE 3 -500 -300 100 R 50 50 1 1 I
-X SDA 4 -500 300 100 R 50 50 1 1 B
-X SCL 5 -500 200 100 R 50 50 1 1 B
-X MOD_ABS 6 -500 100 100 R 50 50 1 1 P
-X RS0 7 -500 -100 100 R 50 50 1 1 I
+X TX_DISABLE 3 -500 -200 100 R 50 50 1 1 I
+X MOD_DEF2 4 -500 300 100 R 50 50 1 1 B
+X MOD_DEF1 5 -500 200 100 R 50 50 1 1 I
+X MOD_DEF0 6 -500 100 100 R 50 50 1 1 P
+X RATE_SELECT 7 -500 -100 100 R 50 50 1 1 I
 X RX_LOS 8 500 400 100 L 50 50 1 1 C
-X RS1 9 -500 -200 100 R 50 50 1 1 I
-X CAGE CAGE -200 -700 100 U 20 50 1 1 W
+X VeeR 9 0 -700 100 U 50 50 1 1 P N
+X CAGE CAGE -200 -700 100 U 20 50 1 1 P
 ENDDRAW
 ENDDEF
 #
-# SFP_CONNECTOR
+# SFP+
 #
-DEF SFP_CONNECTOR P 0 20 Y Y 1 F N
-F0 "P" -350 650 50 H V C CNN
-F1 "SFP_CONNECTOR" 450 650 50 H V C CNN
-F2 "Connector:Connector_SFP_and_Cage.kicad_mod" 0 -850 50 H I C CNN
+DEF SFP+ J 0 20 Y Y 1 F N
+F0 "J" -350 650 50 H V C CNN
+F1 "SFP+" 450 650 50 H V C CNN
+F2 "" 0 -850 50 H I C CNN
 F3 "" -450 650 50 H I C CNN
 $FPLIST
- SFP*
+ *SFP*
 $ENDFPLIST
 DRAW
-T 0 -50 0 50 0 0 0 SFP Normal 0 C C
 S -400 600 400 -600 0 0 10 f
 X VeeT 1 -100 -700 100 U 50 50 1 1 W
 X VeeR 10 0 -700 100 U 50 50 1 1 W
@@ -248,14 +246,14 @@ X TD+ 18 500 -100 100 L 50 50 1 1 I
 X TD- 19 500 -200 100 L 50 50 1 1 I
 X TX_FAULT 2 500 -400 100 L 50 50 1 1 C
 X VeeT 20 -100 -700 100 U 50 50 1 1 P N
-X TX_DISABLE 3 -500 -200 100 R 50 50 1 1 I
-X MOD_DEF2 4 -500 300 100 R 50 50 1 1 B
-X MOD_DEF1 5 -500 200 100 R 50 50 1 1 B
-X MOD_DEF0 6 -500 100 100 R 50 50 1 1 P
-X RATE_SELECT 7 -500 -100 100 R 50 50 1 1 I
+X TX_DISABLE 3 -500 -300 100 R 50 50 1 1 I
+X SDA 4 -500 300 100 R 50 50 1 1 B
+X SCL 5 -500 200 100 R 50 50 1 1 I
+X MOD_ABS 6 -500 100 100 R 50 50 1 1 P
+X RS0 7 -500 -100 100 R 50 50 1 1 I
 X RX_LOS 8 500 400 100 L 50 50 1 1 C
-X VeeR 9 0 -700 100 U 50 50 1 1 P N
-X CAGE CAGE -200 -700 100 U 20 50 1 1 W
+X RS1 9 -500 -200 100 R 50 50 1 1 I
+X CAGE CAGE -200 -700 100 U 20 50 1 1 P
 ENDDRAW
 ENDDEF
 #

From f8aee8790a2121963bdc3558ba05c68624617915 Mon Sep 17 00:00:00 2001
From: bwack <hansdals@yahoo.no>
Date: Sun, 21 Apr 2019 19:05:48 +0200
Subject: [PATCH 174/201] fixed: pinstacking of power pins. length of pins.
 tilde as bar on top

---
 Memory_RAM.lib | 128 ++++++++++++++++++++++++-------------------------
 1 file changed, 64 insertions(+), 64 deletions(-)

diff --git a/Memory_RAM.lib b/Memory_RAM.lib
index e3a3f04b1b..89eeb57045 100644
--- a/Memory_RAM.lib
+++ b/Memory_RAM.lib
@@ -437,70 +437,70 @@ F2 "Package_QFP:TQFP-64_14x14mm_P0.8mm" 0 0 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
 DRAW
 S -600 -1700 600 1700 0 1 10 f
-X I/O2L 1 -900 -1000 300 R 50 50 1 1 B
-X I/O0R 10 900 -800 300 L 50 50 1 1 B
-X I/O1R 11 900 -900 300 L 50 50 1 1 B
-X I/O2R 12 900 -1000 300 L 50 50 1 1 B
-X VCC 13 0 1700 0 U 50 50 1 1 W N
-X I/O3R 14 900 -1100 300 L 50 50 1 1 B
-X I/O4R 15 900 -1200 300 L 50 50 1 1 B
-X I/O5R 16 900 -1300 300 L 50 50 1 1 B
-X I/O6R 17 900 -1400 300 L 50 50 1 1 B
-X I/O7R 18 900 -1500 300 L 50 50 1 1 B
-X /OER 19 900 1400 300 L 50 50 1 1 I
-X I/O3L 2 -900 -1100 300 R 50 50 1 1 B
-X R/WR 20 900 1300 300 L 50 50 1 1 I
-X /SEMR 21 900 1100 300 L 50 50 1 1 I
-X /CER 22 900 1500 300 L 50 50 1 1 I
-X A13R 23 900 -600 300 L 50 50 1 1 I
-X GND 24 0 -1700 0 U 50 50 1 1 W N
-X A12R 25 900 -500 300 L 50 50 1 1 I
-X A11R 26 900 -400 300 L 50 50 1 1 I
-X A10R 27 900 -300 300 L 50 50 1 1 I
-X A9R 28 900 -200 300 L 50 50 1 1 I
-X A8R 29 900 -100 300 L 50 50 1 1 I
-X I/O4L 3 -900 -1200 300 R 50 50 1 1 B
-X A7R 30 900 0 300 L 50 50 1 1 I
-X A6R 31 900 100 300 L 50 50 1 1 I
-X A5R 32 900 200 300 L 50 50 1 1 I
-X A4R 33 900 300 300 L 50 50 1 1 I
-X A3R 34 900 400 300 L 50 50 1 1 I
-X A2R 35 900 500 300 L 50 50 1 1 I
-X A1R 36 900 600 300 L 50 50 1 1 I
-X A0R 37 900 700 300 L 50 50 1 1 I
-X /INTR 38 900 1000 300 L 50 50 1 1 O
-X /BUSYR 39 900 1200 300 L 50 50 1 1 O
-X I/O5L 4 -900 -1300 300 R 50 50 1 1 B
-X M/S 40 -900 900 300 R 50 50 1 1 I
-X GND 41 0 -1700 0 U 50 50 1 1 W N
-X /BUSYL 42 -900 1200 300 R 50 50 1 1 O
-X /INTL 43 -900 1000 300 R 50 50 1 1 O
-X A0L 44 -900 700 300 R 50 50 1 1 I
-X A1L 45 -900 600 300 R 50 50 1 1 I
-X A2L 46 -900 500 300 R 50 50 1 1 I
-X A3L 47 -900 400 300 R 50 50 1 1 I
-X A4L 48 -900 300 300 R 50 50 1 1 I
-X A5L 49 -900 200 300 R 50 50 1 1 I
-X GND 5 0 -1700 0 U 50 50 1 1 W N
-X A6L 50 -900 100 300 R 50 50 1 1 I
-X A7L 51 -900 0 300 R 50 50 1 1 I
-X A8L 52 -900 -100 300 R 50 50 1 1 I
-X A9L 53 -900 -200 300 R 50 50 1 1 I
-X A10L 54 -900 -300 300 R 50 50 1 1 I
-X A11L 55 -900 -400 300 R 50 50 1 1 I
-X A12L 56 -900 -500 300 R 50 50 1 1 I
-X VCC 57 0 1700 0 U 50 50 1 1 W N
-X A13L 58 -900 -600 300 R 50 50 1 1 I
-X /CEL 59 -900 1500 300 R 50 50 1 1 I
-X I/O6L 6 -900 -1400 300 R 50 50 1 1 B
-X /SEML 60 -900 1100 300 R 50 50 1 1 I
-X R/WL 61 -900 1300 300 R 50 50 1 1 I
-X /OEL 62 -900 1400 300 R 50 50 1 1 I
-X I/O0L 63 -900 -800 300 R 50 50 1 1 B
-X I/O1L 64 -900 -900 300 R 50 50 1 1 B
-X I/O7L 7 -900 -1500 300 R 50 50 1 1 B
-X VCC 8 0 1700 0 U 50 50 1 1 W N
-X GND 9 0 -1700 0 U 50 50 1 1 W N
+X I/O2L 1 -800 -1000 200 R 50 50 1 1 B
+X I/O0R 10 800 -800 200 L 50 50 1 1 B
+X I/O1R 11 800 -900 200 L 50 50 1 1 B
+X I/O2R 12 800 -1000 200 L 50 50 1 1 B
+X VCC 13 0 1800 100 D 50 50 1 1 W N
+X I/O3R 14 800 -1100 200 L 50 50 1 1 B
+X I/O4R 15 800 -1200 200 L 50 50 1 1 B
+X I/O5R 16 800 -1300 200 L 50 50 1 1 B
+X I/O6R 17 800 -1400 200 L 50 50 1 1 B
+X I/O7R 18 800 -1500 200 L 50 50 1 1 B
+X ~OER 19 800 1400 200 L 50 50 1 1 I
+X I/O3L 2 -800 -1100 200 R 50 50 1 1 B
+X R/~W~R 20 800 1300 200 L 50 50 1 1 I
+X ~SEMR 21 800 1100 200 L 50 50 1 1 I
+X ~CER 22 800 1500 200 L 50 50 1 1 I
+X A13R 23 800 -600 200 L 50 50 1 1 I
+X GND 24 0 -1800 100 U 50 50 1 1 W N
+X A12R 25 800 -500 200 L 50 50 1 1 I
+X A11R 26 800 -400 200 L 50 50 1 1 I
+X A10R 27 800 -300 200 L 50 50 1 1 I
+X A9R 28 800 -200 200 L 50 50 1 1 I
+X A8R 29 800 -100 200 L 50 50 1 1 I
+X I/O4L 3 -800 -1200 200 R 50 50 1 1 B
+X A7R 30 800 0 200 L 50 50 1 1 I
+X A6R 31 800 100 200 L 50 50 1 1 I
+X A5R 32 800 200 200 L 50 50 1 1 I
+X A4R 33 800 300 200 L 50 50 1 1 I
+X A3R 34 800 400 200 L 50 50 1 1 I
+X A2R 35 800 500 200 L 50 50 1 1 I
+X A1R 36 800 600 200 L 50 50 1 1 I
+X A0R 37 800 700 200 L 50 50 1 1 I
+X ~INTR 38 800 1000 200 L 50 50 1 1 O
+X ~BUSYR 39 800 1200 200 L 50 50 1 1 O
+X I/O5L 4 -800 -1300 200 R 50 50 1 1 B
+X M/S 40 -800 900 200 R 50 50 1 1 I
+X GND 41 0 -1800 100 U 50 50 1 1 W N
+X ~BUSYL 42 -800 1200 200 R 50 50 1 1 O
+X ~INTL 43 -800 1000 200 R 50 50 1 1 O
+X A0L 44 -800 700 200 R 50 50 1 1 I
+X A1L 45 -800 600 200 R 50 50 1 1 I
+X A2L 46 -800 500 200 R 50 50 1 1 I
+X A3L 47 -800 400 200 R 50 50 1 1 I
+X A4L 48 -800 300 200 R 50 50 1 1 I
+X A5L 49 -800 200 200 R 50 50 1 1 I
+X GND 5 0 -1800 100 U 50 50 1 1 W
+X A6L 50 -800 100 200 R 50 50 1 1 I
+X A7L 51 -800 0 200 R 50 50 1 1 I
+X A8L 52 -800 -100 200 R 50 50 1 1 I
+X A9L 53 -800 -200 200 R 50 50 1 1 I
+X A10L 54 -800 -300 200 R 50 50 1 1 I
+X A11L 55 -800 -400 200 R 50 50 1 1 I
+X A12L 56 -800 -500 200 R 50 50 1 1 I
+X VCC 57 0 1800 100 D 50 50 1 1 W N
+X A13L 58 -800 -600 200 R 50 50 1 1 I
+X ~CEL 59 -800 1500 200 R 50 50 1 1 I
+X I/O6L 6 -800 -1400 200 R 50 50 1 1 B
+X ~SEML 60 -800 1100 200 R 50 50 1 1 I
+X R/~W~L 61 -800 1300 200 R 50 50 1 1 I
+X ~OEL 62 -800 1400 200 R 50 50 1 1 I
+X I/O0L 63 -800 -800 200 R 50 50 1 1 B
+X I/O1L 64 -800 -900 200 R 50 50 1 1 B
+X I/O7L 7 -800 -1500 200 R 50 50 1 1 B
+X VCC 8 0 1800 100 D 50 50 1 1 W
+X GND 9 0 -1800 100 U 50 50 1 1 W N
 ENDDRAW
 ENDDEF
 #

From ecf25ce47946dfa11e3ab7d7593c4d6a53533715 Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Sun, 21 Apr 2019 20:25:55 +0300
Subject: [PATCH 175/201] add "Connector for" to description. Datasheet is only
 URL. Document-names to keywords.

---
 Interface_Optical.dcm | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/Interface_Optical.dcm b/Interface_Optical.dcm
index 99ef846a49..89a287652f 100644
--- a/Interface_Optical.dcm
+++ b/Interface_Optical.dcm
@@ -25,15 +25,15 @@ F http://www.onsemi.com/pub/Collateral/QSE159-D.pdf
 $ENDCMP
 #
 $CMP SFP
-D Small Form Factor Pluggable (SFP) module, 1 Gbit/s, serial-to-serial data-agnostic optical transceiver
-K SFP transciever gigabit ethernet
-F INF-8074i, http://www.10gtek.com/templates/wzten/pdf/INF-8074.pdf
+D Connector for Small Form Factor Pluggable (SFP) module, 1 Gbit/s, serial-to-serial data-agnostic optical transceiver
+K SFP transciever gigabit ethernet INF-8074i
+F http://www.10gtek.com/templates/wzten/pdf/INF-8074.pdf
 $ENDCMP
 #
 $CMP SFP+
-D Small Form Factor Pluggable (SFP+) module, 10 Gbit/s, serial-to-serial data-agnostic optical transceiver
-K SFP transciever SFF-8432 gigabit ethernet
-F SFF-8432 https://members.snia.org/document/dl/25892
+D Connector for Small Form Factor Pluggable (SFP+) module, 10 Gbit/s, serial-to-serial data-agnostic optical transceiver
+K SFP transciever SFF-8432 gigabit ethernet SFF-8432
+F https://members.snia.org/document/dl/25892
 $ENDCMP
 #
 $CMP TSDP341xx

From ac23fd624cca2eef10a9c9d5a8e0f350ac032aa1 Mon Sep 17 00:00:00 2001
From: Anders Wallin <anders.e.e.wallin@gmail.com>
Date: Sun, 21 Apr 2019 20:31:02 +0300
Subject: [PATCH 176/201] remove duplicated keyword

---
 Interface_Optical.dcm | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Interface_Optical.dcm b/Interface_Optical.dcm
index 89a287652f..0d662463f1 100644
--- a/Interface_Optical.dcm
+++ b/Interface_Optical.dcm
@@ -32,7 +32,7 @@ $ENDCMP
 #
 $CMP SFP+
 D Connector for Small Form Factor Pluggable (SFP+) module, 10 Gbit/s, serial-to-serial data-agnostic optical transceiver
-K SFP transciever SFF-8432 gigabit ethernet SFF-8432
+K SFP transciever gigabit ethernet SFF-8432
 F https://members.snia.org/document/dl/25892
 $ENDCMP
 #

From 37099ad7dfc731d2b865446281cb3dddfa6f3f22 Mon Sep 17 00:00:00 2001
From: Henner Zeller <h.zeller@acm.org>
Date: Sun, 21 Apr 2019 14:07:43 -0700
Subject: [PATCH 177/201] Add missing hysteresis symbol on 74LS14 (and 74HC14
 alias)

---
 74xx.lib | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/74xx.lib b/74xx.lib
index 3cb11cb83c..b9f1ba2091 100644
--- a/74xx.lib
+++ b/74xx.lib
@@ -463,6 +463,18 @@ P 4 3 0 10 -150 150 -150 -150 150 0 -150 150 f
 P 4 4 0 10 -150 150 -150 -150 150 0 -150 150 f
 P 4 5 0 10 -150 150 -150 -150 150 0 -150 150 f
 P 4 6 0 10 -150 150 -150 -150 150 0 -150 150 f
+P 3 1 1 0 -75 -50 -75 50 -25 50 N
+P 4 1 1 0 -100 -50 -25 -50 -25 50 0 50 N
+P 3 2 1 0 -75 -50 -75 50 -25 50 N
+P 4 2 1 0 -100 -50 -25 -50 -25 50 0 50 N
+P 3 3 1 0 -75 -50 -75 50 -25 50 N
+P 4 3 1 0 -100 -50 -25 -50 -25 50 0 50 N
+P 3 4 1 0 -75 -50 -75 50 -25 50 N
+P 4 4 1 0 -100 -50 -25 -50 -25 50 0 50 N
+P 3 5 1 0 -75 -50 -75 50 -25 50 N
+P 4 5 1 0 -100 -50 -25 -50 -25 50 0 50 N
+P 3 6 1 0 -75 -50 -75 50 -25 50 N
+P 4 6 1 0 -100 -50 -25 -50 -25 50 0 50 N
 X ~ 1 -300 0 150 R 50 50 1 0 I
 X ~ 2 300 0 150 L 50 50 1 0 O I
 X ~ 3 -300 0 150 R 50 50 2 0 I

From 748c1acfd3e8861ed3d63ab08e3c7461591ad192 Mon Sep 17 00:00:00 2001
From: Henner Zeller <h.zeller@acm.org>
Date: Sun, 21 Apr 2019 14:24:59 -0700
Subject: [PATCH 178/201] Fix hysteresis symbol in 74xG14 which was mirrored.

---
 74xGxx.lib | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/74xGxx.lib b/74xGxx.lib
index bf416b0304..63d10fe57f 100644
--- a/74xGxx.lib
+++ b/74xGxx.lib
@@ -416,9 +416,9 @@ $FPLIST
  SG-*
 $ENDFPLIST
 DRAW
-P 3 0 1 0 -100 25 -75 25 -75 -25 N
+P 3 0 1 0 -75 -25 -50 -25 -50 25 N
 P 4 0 1 10 -150 100 -150 -100 100 0 -150 100 N
-P 4 0 1 0 -125 25 -100 25 -100 -25 -50 -25 N
+P 4 0 1 0 -100 -25 -75 -25 -75 25 -25 25 N
 X ~ 2 -300 0 150 R 40 40 1 1 I
 X GND 3 0 -100 0 D 40 40 1 1 W N
 X ~ 4 250 0 150 L 40 40 1 1 O I
@@ -1250,9 +1250,9 @@ $FPLIST
  SOT*
 $ENDFPLIST
 DRAW
-P 3 0 1 0 -75 25 -50 25 -50 -25 N
+P 3 0 1 0 -75 -25 -50 -25 -50 25 N
 P 4 0 1 10 -150 100 -150 -100 100 0 -150 100 N
-P 4 0 1 0 -100 25 -75 25 -75 -25 -25 -25 N
+P 4 0 1 0 -100 -25 -75 -25 -75 25 -25 25 N
 X GND 2 0 -100 0 D 40 40 0 1 W N
 X VCC 5 0 100 0 U 40 40 0 1 W N
 X ~ 1 -300 0 150 R 40 40 1 1 I
@@ -1720,9 +1720,9 @@ $FPLIST
  VSSOP*
 $ENDFPLIST
 DRAW
-P 3 0 1 0 -75 25 -50 25 -50 -25 N
+P 3 0 1 0 -75 -25 -50 -25 -50 25 N
 P 4 0 1 10 -150 100 -150 -100 100 0 -150 100 N
-P 4 0 1 0 -100 25 -75 25 -75 -25 -25 -25 N
+P 4 0 1 0 -100 -25 -75 -25 -75 25 -25 25 N
 X GND 4 0 -100 0 D 40 40 0 1 W N
 X VCC 8 0 100 0 U 40 40 0 1 W N
 X ~ 1 -300 0 150 R 40 40 1 1 I

From c039fb4252372533dc4a545567f521165388b292 Mon Sep 17 00:00:00 2001
From: Henner Zeller <h.zeller@acm.org>
Date: Sun, 21 Apr 2019 14:41:23 -0700
Subject: [PATCH 179/201] 74LVC1G14, 74LVC2G14, 74LVC3G14: Fix datasheet links.

---
 74xGxx.dcm | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/74xGxx.dcm b/74xGxx.dcm
index 2f28035b5b..451c741724 100644
--- a/74xGxx.dcm
+++ b/74xGxx.dcm
@@ -39,7 +39,7 @@ $ENDCMP
 $CMP 74AHC1G14
 D Single Schmitt NOT Gate, Low-Voltage CMOS
 K Single Gate NOT Schmitt LVC CMOS
-F http://www.ti.com/lit/sg/scyt129e/scyt129e.pdf
+F https://www.ti.com/lit/ds/symlink/sn74lvc1g14.pdf
 $ENDCMP
 #
 $CMP 74AHC1G32
@@ -831,7 +831,7 @@ $ENDCMP
 $CMP 74LVC2G14
 D Dual NOT Gate Schmitt Triggered, Low-Voltage CMOS
 K Dual Gate NOT Schmitt LVC CMOS
-F http://www.ti.com/lit/sg/scyt129e/scyt129e.pdf
+F https://www.ti.com/lit/ds/symlink/sn74lvc2g14.pdf
 $ENDCMP
 #
 $CMP 74LVC2G157
@@ -939,7 +939,7 @@ $ENDCMP
 $CMP 74LVC3G14
 D Triple NOT Gate Schmitt, Low-Voltage CMOS
 K Triple NOT Schmitt LVC CMOS
-F http://www.ti.com/lit/sg/scyt129e/scyt129e.pdf
+F https://www.ti.com/lit/ds/symlink/sn74lvc3g14.pdf
 $ENDCMP
 #
 $CMP 74LVC3G17

From f036b79a7cb69497e82619ebc7db32b62cde2be2 Mon Sep 17 00:00:00 2001
From: bwack <hansdals@yahoo.no>
Date: Mon, 22 Apr 2019 00:19:45 +0200
Subject: [PATCH 180/201] added metadata keywords and footprint filter

---
 Memory_RAM.dcm | 1 +
 Memory_RAM.lib | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/Memory_RAM.dcm b/Memory_RAM.dcm
index d4300e91ce..8a42eea780 100644
--- a/Memory_RAM.dcm
+++ b/Memory_RAM.dcm
@@ -44,6 +44,7 @@ $ENDCMP
 #
 $CMP IDT7006PF
 D 16K x 8 DUAL-PORT SRAM TQFP-64 14x14x1.4mm
+K dual-port ram
 F https://www.idt.com/document/dst/7006-data-sheet
 $ENDCMP
 #
diff --git a/Memory_RAM.lib b/Memory_RAM.lib
index 89eeb57045..dcfa598d1a 100644
--- a/Memory_RAM.lib
+++ b/Memory_RAM.lib
@@ -435,6 +435,9 @@ F0 "U" 0 100 50 H V C CNN
 F1 "IDT7006PF" 0 -100 50 H V C CNN
 F2 "Package_QFP:TQFP-64_14x14mm_P0.8mm" 0 0 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
+$FPLIST
+ TQFP*64*14x14mm*
+$ENDFPLIST
 DRAW
 S -600 -1700 600 1700 0 1 10 f
 X I/O2L 1 -800 -1000 200 R 50 50 1 1 B

From 17a078bbc2577cceef7d827c7990facd991fb2de Mon Sep 17 00:00:00 2001
From: eir <m-laniakea@users.noreply.github.com>
Date: Sun, 21 Apr 2019 16:00:41 -0700
Subject: [PATCH 181/201] Driver_LED: Add DIO5661x

---
 Driver_LED.dcm |  6 ++++++
 Driver_LED.lib | 21 +++++++++++++++++++++
 2 files changed, 27 insertions(+)

diff --git a/Driver_LED.dcm b/Driver_LED.dcm
index 385193bc98..9acd8ad736 100644
--- a/Driver_LED.dcm
+++ b/Driver_LED.dcm
@@ -12,6 +12,12 @@ K Constant Current LED Driver IC
 F http://ww1.microchip.com/downloads/en/DeviceDoc/20005413A.pdf
 $ENDCMP
 #
+$CMP DIO5661x
+D 37V Step-up LED driver with PWM, 2.7-5.5Vin, 1.3A Iout max
+K LED driver single
+F https://www.mouser.com/datasheet/2/802/dioo_06292016_DIO5661V0%204-1217651.pdf
+$ENDCMP
+#
 $CMP HT1632C-52LQFP
 D LED Matrix Driver, 32×8 or 24×16, 52-LQFP
 K LED Matrix Driver
diff --git a/Driver_LED.lib b/Driver_LED.lib
index 7ade6b301a..69a7bb135c 100644
--- a/Driver_LED.lib
+++ b/Driver_LED.lib
@@ -62,6 +62,27 @@ X VB 2 0 -200 100 U 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #
+# DIO5661x
+#
+DEF DIO5661x U 0 20 Y Y 1 F N
+F0 "U" 100 400 50 H V C CNN
+F1 "DIO5661x" 200 300 50 H V C CNN
+F2 "" 100 300 50 H I C CNN
+F3 "" 100 300 50 H I C CNN
+$FPLIST
+ ?SOT?23?6*
+ DFN?6?1EP?2x2mm?P0.65mm?EP1x1.6mm*
+$ENDFPLIST
+DRAW
+S 200 -200 -200 200 0 1 10 f
+X LX 1 400 100 200 L 50 50 1 1 O
+X GND 2 0 -400 200 U 50 50 1 1 W
+X FB 3 -400 100 200 R 50 50 1 1 I
+X EN 4 -400 -100 200 R 50 50 1 1 I
+X VIN 6 0 400 200 D 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
 # HT1632C-52LQFP
 #
 DEF HT1632C-52LQFP U 0 20 Y Y 1 F N

From a872b795bc6e3ef379b5c149a5c96c97417dfc0a Mon Sep 17 00:00:00 2001
From: eir <m-laniakea@users.noreply.github.com>
Date: Sun, 21 Apr 2019 18:22:06 -0700
Subject: [PATCH 182/201] Driver_LED: Update DIO5661 footprint filter

---
 Driver_LED.lib | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Driver_LED.lib b/Driver_LED.lib
index 69a7bb135c..f3723b7dd4 100644
--- a/Driver_LED.lib
+++ b/Driver_LED.lib
@@ -70,7 +70,7 @@ F1 "DIO5661x" 200 300 50 H V C CNN
 F2 "" 100 300 50 H I C CNN
 F3 "" 100 300 50 H I C CNN
 $FPLIST
- ?SOT?23?6*
+ *SOT?23?6*
  DFN?6?1EP?2x2mm?P0.65mm?EP1x1.6mm*
 $ENDFPLIST
 DRAW

From d31efe448146d48fb0efb2acc234e06b01551b1b Mon Sep 17 00:00:00 2001
From: bwack <hansdals@yahoo.no>
Date: Mon, 22 Apr 2019 14:39:16 +0200
Subject: [PATCH 183/201] changes made following review by Joel

---
 Memory_RAM.dcm |   2 +-
 Memory_RAM.lib | 132 ++++++++++++++++++++++++-------------------------
 2 files changed, 67 insertions(+), 67 deletions(-)

diff --git a/Memory_RAM.dcm b/Memory_RAM.dcm
index 8a42eea780..d1136facae 100644
--- a/Memory_RAM.dcm
+++ b/Memory_RAM.dcm
@@ -43,7 +43,7 @@ F https://www.skhynix.com/product/filedata/fileDownload.do?seq=7687
 $ENDCMP
 #
 $CMP IDT7006PF
-D 16K x 8 DUAL-PORT SRAM TQFP-64 14x14x1.4mm
+D 16K x 8 Dual-Port SRAM, TQFP-64
 K dual-port ram
 F https://www.idt.com/document/dst/7006-data-sheet
 $ENDCMP
diff --git a/Memory_RAM.lib b/Memory_RAM.lib
index dcfa598d1a..5bc31fb953 100644
--- a/Memory_RAM.lib
+++ b/Memory_RAM.lib
@@ -436,74 +436,74 @@ F1 "IDT7006PF" 0 -100 50 H V C CNN
 F2 "Package_QFP:TQFP-64_14x14mm_P0.8mm" 0 0 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
 $FPLIST
- TQFP*64*14x14mm*
+ TQFP*14x14mm*P0.8mm*
 $ENDFPLIST
 DRAW
-S -600 -1700 600 1700 0 1 10 f
-X I/O2L 1 -800 -1000 200 R 50 50 1 1 B
-X I/O0R 10 800 -800 200 L 50 50 1 1 B
-X I/O1R 11 800 -900 200 L 50 50 1 1 B
-X I/O2R 12 800 -1000 200 L 50 50 1 1 B
-X VCC 13 0 1800 100 D 50 50 1 1 W N
-X I/O3R 14 800 -1100 200 L 50 50 1 1 B
-X I/O4R 15 800 -1200 200 L 50 50 1 1 B
-X I/O5R 16 800 -1300 200 L 50 50 1 1 B
-X I/O6R 17 800 -1400 200 L 50 50 1 1 B
-X I/O7R 18 800 -1500 200 L 50 50 1 1 B
-X ~OER 19 800 1400 200 L 50 50 1 1 I
-X I/O3L 2 -800 -1100 200 R 50 50 1 1 B
-X R/~W~R 20 800 1300 200 L 50 50 1 1 I
-X ~SEMR 21 800 1100 200 L 50 50 1 1 I
-X ~CER 22 800 1500 200 L 50 50 1 1 I
-X A13R 23 800 -600 200 L 50 50 1 1 I
-X GND 24 0 -1800 100 U 50 50 1 1 W N
-X A12R 25 800 -500 200 L 50 50 1 1 I
-X A11R 26 800 -400 200 L 50 50 1 1 I
-X A10R 27 800 -300 200 L 50 50 1 1 I
-X A9R 28 800 -200 200 L 50 50 1 1 I
-X A8R 29 800 -100 200 L 50 50 1 1 I
-X I/O4L 3 -800 -1200 200 R 50 50 1 1 B
-X A7R 30 800 0 200 L 50 50 1 1 I
-X A6R 31 800 100 200 L 50 50 1 1 I
-X A5R 32 800 200 200 L 50 50 1 1 I
-X A4R 33 800 300 200 L 50 50 1 1 I
-X A3R 34 800 400 200 L 50 50 1 1 I
-X A2R 35 800 500 200 L 50 50 1 1 I
-X A1R 36 800 600 200 L 50 50 1 1 I
-X A0R 37 800 700 200 L 50 50 1 1 I
-X ~INTR 38 800 1000 200 L 50 50 1 1 O
-X ~BUSYR 39 800 1200 200 L 50 50 1 1 O
-X I/O5L 4 -800 -1300 200 R 50 50 1 1 B
-X M/S 40 -800 900 200 R 50 50 1 1 I
-X GND 41 0 -1800 100 U 50 50 1 1 W N
-X ~BUSYL 42 -800 1200 200 R 50 50 1 1 O
-X ~INTL 43 -800 1000 200 R 50 50 1 1 O
-X A0L 44 -800 700 200 R 50 50 1 1 I
-X A1L 45 -800 600 200 R 50 50 1 1 I
-X A2L 46 -800 500 200 R 50 50 1 1 I
-X A3L 47 -800 400 200 R 50 50 1 1 I
-X A4L 48 -800 300 200 R 50 50 1 1 I
-X A5L 49 -800 200 200 R 50 50 1 1 I
-X GND 5 0 -1800 100 U 50 50 1 1 W
-X A6L 50 -800 100 200 R 50 50 1 1 I
-X A7L 51 -800 0 200 R 50 50 1 1 I
-X A8L 52 -800 -100 200 R 50 50 1 1 I
-X A9L 53 -800 -200 200 R 50 50 1 1 I
-X A10L 54 -800 -300 200 R 50 50 1 1 I
-X A11L 55 -800 -400 200 R 50 50 1 1 I
-X A12L 56 -800 -500 200 R 50 50 1 1 I
-X VCC 57 0 1800 100 D 50 50 1 1 W N
-X A13L 58 -800 -600 200 R 50 50 1 1 I
-X ~CEL 59 -800 1500 200 R 50 50 1 1 I
-X I/O6L 6 -800 -1400 200 R 50 50 1 1 B
-X ~SEML 60 -800 1100 200 R 50 50 1 1 I
-X R/~W~L 61 -800 1300 200 R 50 50 1 1 I
-X ~OEL 62 -800 1400 200 R 50 50 1 1 I
-X I/O0L 63 -800 -800 200 R 50 50 1 1 B
-X I/O1L 64 -800 -900 200 R 50 50 1 1 B
-X I/O7L 7 -800 -1500 200 R 50 50 1 1 B
-X VCC 8 0 1800 100 D 50 50 1 1 W
-X GND 9 0 -1800 100 U 50 50 1 1 W N
+S -400 -1600 400 1600 0 1 10 f
+X I/O2L 1 -500 -1000 100 R 50 50 1 1 B
+X I/O0R 10 500 -800 100 L 50 50 1 1 B
+X I/O1R 11 500 -900 100 L 50 50 1 1 B
+X I/O2R 12 500 -1000 100 L 50 50 1 1 B
+X VCC 13 0 1700 100 D 50 50 1 1 W
+X I/O3R 14 500 -1100 100 L 50 50 1 1 B
+X I/O4R 15 500 -1200 100 L 50 50 1 1 B
+X I/O5R 16 500 -1300 100 L 50 50 1 1 B
+X I/O6R 17 500 -1400 100 L 50 50 1 1 B
+X I/O7R 18 500 -1500 100 L 50 50 1 1 B
+X ~OE~R 19 500 1400 100 L 50 50 1 1 I
+X I/O3L 2 -500 -1100 100 R 50 50 1 1 B
+X R/~W~R 20 500 1300 100 L 50 50 1 1 I
+X ~SEM~R 21 500 1100 100 L 50 50 1 1 I
+X ~CE~R 22 500 1500 100 L 50 50 1 1 I
+X A13R 23 500 -600 100 L 50 50 1 1 I
+X GND 24 0 -1700 100 U 50 50 1 1 P N
+X A12R 25 500 -500 100 L 50 50 1 1 I
+X A11R 26 500 -400 100 L 50 50 1 1 I
+X A10R 27 500 -300 100 L 50 50 1 1 I
+X A9R 28 500 -200 100 L 50 50 1 1 I
+X A8R 29 500 -100 100 L 50 50 1 1 I
+X I/O4L 3 -500 -1200 100 R 50 50 1 1 B
+X A7R 30 500 0 100 L 50 50 1 1 I
+X A6R 31 500 100 100 L 50 50 1 1 I
+X A5R 32 500 200 100 L 50 50 1 1 I
+X A4R 33 500 300 100 L 50 50 1 1 I
+X A3R 34 500 400 100 L 50 50 1 1 I
+X A2R 35 500 500 100 L 50 50 1 1 I
+X A1R 36 500 600 100 L 50 50 1 1 I
+X A0R 37 500 700 100 L 50 50 1 1 I
+X ~INT~R 38 500 1000 100 L 50 50 1 1 O
+X ~BUSY~R 39 500 1200 100 L 50 50 1 1 O
+X I/O5L 4 -500 -1300 100 R 50 50 1 1 B
+X M/~S~ 40 -500 900 100 R 50 50 1 1 I
+X GND 41 0 -1700 100 U 50 50 1 1 P N
+X ~BUSY~L 42 -500 1200 100 R 50 50 1 1 O
+X ~INT~L 43 -500 1000 100 R 50 50 1 1 O
+X A0L 44 -500 700 100 R 50 50 1 1 I
+X A1L 45 -500 600 100 R 50 50 1 1 I
+X A2L 46 -500 500 100 R 50 50 1 1 I
+X A3L 47 -500 400 100 R 50 50 1 1 I
+X A4L 48 -500 300 100 R 50 50 1 1 I
+X A5L 49 -500 200 100 R 50 50 1 1 I
+X GND 5 0 -1700 100 U 50 50 1 1 W
+X A6L 50 -500 100 100 R 50 50 1 1 I
+X A7L 51 -500 0 100 R 50 50 1 1 I
+X A8L 52 -500 -100 100 R 50 50 1 1 I
+X A9L 53 -500 -200 100 R 50 50 1 1 I
+X A10L 54 -500 -300 100 R 50 50 1 1 I
+X A11L 55 -500 -400 100 R 50 50 1 1 I
+X A12L 56 -500 -500 100 R 50 50 1 1 I
+X VCC 57 100 1700 100 D 50 50 1 1 W
+X A13L 58 -500 -600 100 R 50 50 1 1 I
+X ~CE~L 59 -500 1500 100 R 50 50 1 1 I
+X I/O6L 6 -500 -1400 100 R 50 50 1 1 B
+X ~SEM~L 60 -500 1100 100 R 50 50 1 1 I
+X R/~W~L 61 -500 1300 100 R 50 50 1 1 I
+X ~OE~L 62 -500 1400 100 R 50 50 1 1 I
+X I/O0L 63 -500 -800 100 R 50 50 1 1 B
+X I/O1L 64 -500 -900 100 R 50 50 1 1 B
+X I/O7L 7 -500 -1500 100 R 50 50 1 1 B
+X VCC 8 -100 1700 100 D 50 50 1 1 W
+X GND 9 0 -1700 100 U 50 50 1 1 P N
 ENDDRAW
 ENDDEF
 #

From 489265dc083c33092b6e2c312f1cb92bdeb9ff29 Mon Sep 17 00:00:00 2001
From: cp-aquila <carsten.presser@aquila-biolabs.de>
Date: Mon, 22 Apr 2019 20:50:56 +0200
Subject: [PATCH 184/201] Add shield pin to Wuerth_7499010121A (#1500)

* Add shield pin to Wuerth_7499010121A

* Move shield pin to bottom on Wuerth_7499010121A
---
 Connector.lib | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/Connector.lib b/Connector.lib
index 98f7f44c0d..13e69193d7 100644
--- a/Connector.lib
+++ b/Connector.lib
@@ -15104,8 +15104,8 @@ ENDDEF
 #
 DEF Wuerth_7499010121A J 0 20 Y Y 1 F N
 F0 "J" 500 550 50 H V R CNN
-F1 "Wuerth_7499010121A" 0 -550 50 H V C CNN
-F2 "Connector_RJ:RJ45_Wuerth_7499010121A_Horizontal" 0 -625 50 H I C CNN
+F1 "Wuerth_7499010121A" 0 -650 50 H V C CNN
+F2 "Connector_RJ:RJ45_Wuerth_7499010121A_Horizontal" 0 -750 50 H I C CNN
 F3 "" -415 -235 50 H I L TNN
 $FPLIST
  RJ45*Wuerth*7499010121A*
@@ -15259,6 +15259,7 @@ X RCT 5 600 -200 100 L 50 50 1 1 P
 X RD- 6 600 -300 100 L 50 50 1 1 P
 X ~ 8 600 -400 100 L 50 50 1 1 P
 X ~ 9 200 600 100 D 50 50 1 1 P
+X ~ SH 0 -600 100 U 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #

From dce921ad50f900b0ea9e38731c39e67d3bb176be Mon Sep 17 00:00:00 2001
From: eir <m-laniakea@users.noreply.github.com>
Date: Mon, 22 Apr 2019 20:26:36 -0700
Subject: [PATCH 185/201] Driver_LED: Split DIO5661x into atomic components

---
 Driver_LED.dcm | 14 +++++++++++-
 Driver_LED.lib | 61 ++++++++++++++++++++++++++++++++++++++++++--------
 2 files changed, 65 insertions(+), 10 deletions(-)

diff --git a/Driver_LED.dcm b/Driver_LED.dcm
index 9acd8ad736..26f527b0e0 100644
--- a/Driver_LED.dcm
+++ b/Driver_LED.dcm
@@ -12,7 +12,19 @@ K Constant Current LED Driver IC
 F http://ww1.microchip.com/downloads/en/DeviceDoc/20005413A.pdf
 $ENDCMP
 #
-$CMP DIO5661x
+$CMP DIO5661CD6
+D 37V Step-up LED driver with PWM, 2.7-5.5Vin, 1.3A Iout max
+K LED driver single
+F https://www.mouser.com/datasheet/2/802/dioo_06292016_DIO5661V0%204-1217651.pdf
+$ENDCMP
+#
+$CMP DIO5661ST6
+D 37V Step-up LED driver with PWM, 2.7-5.5Vin, 1.3A Iout max
+K LED driver single
+F https://www.mouser.com/datasheet/2/802/dioo_06292016_DIO5661V0%204-1217651.pdf
+$ENDCMP
+#
+$CMP DIO5661TST6
 D 37V Step-up LED driver with PWM, 2.7-5.5Vin, 1.3A Iout max
 K LED driver single
 F https://www.mouser.com/datasheet/2/802/dioo_06292016_DIO5661V0%204-1217651.pdf
diff --git a/Driver_LED.lib b/Driver_LED.lib
index f3723b7dd4..0afb02f8e3 100644
--- a/Driver_LED.lib
+++ b/Driver_LED.lib
@@ -62,24 +62,67 @@ X VB 2 0 -200 100 U 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #
-# DIO5661x
+# DIO5661CD6
 #
-DEF DIO5661x U 0 20 Y Y 1 F N
+DEF DIO5661CD6 U 0 20 Y Y 1 F N
 F0 "U" 100 400 50 H V C CNN
-F1 "DIO5661x" 200 300 50 H V C CNN
+F1 "DIO5661CD6" 300 300 50 H V C CNN
 F2 "" 100 300 50 H I C CNN
 F3 "" 100 300 50 H I C CNN
 $FPLIST
- *SOT?23?6*
  DFN?6?1EP?2x2mm?P0.65mm?EP1x1.6mm*
 $ENDFPLIST
 DRAW
 S 200 -200 -200 200 0 1 10 f
-X LX 1 400 100 200 L 50 50 1 1 O
-X GND 2 0 -400 200 U 50 50 1 1 W
-X FB 3 -400 100 200 R 50 50 1 1 I
-X EN 4 -400 -100 200 R 50 50 1 1 I
-X VIN 6 0 400 200 D 50 50 1 1 W
+X FB 1 300 -100 100 L 50 50 1 1 I
+X ~ 2 -200 -100 100 R 50 50 1 1 N N
+X GND 3 0 -300 100 U 50 50 1 1 W
+X LX 4 300 100 100 L 50 50 1 1 C
+X EN 5 -300 100 100 R 50 50 1 1 I
+X VIN 6 0 300 100 D 50 50 1 1 W
+X GND 7 0 -300 100 U 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# DIO5661ST6
+#
+DEF DIO5661ST6 U 0 20 Y Y 1 F N
+F0 "U" 100 400 50 H V C CNN
+F1 "DIO5661ST6" 300 300 50 H V C CNN
+F2 "" 100 300 50 H I C CNN
+F3 "" 100 300 50 H I C CNN
+$FPLIST
+ SOT?23?6*
+$ENDFPLIST
+DRAW
+S 200 -200 -200 200 0 1 10 f
+X LX 1 300 100 100 L 50 50 1 1 C
+X GND 2 0 -300 100 U 50 50 1 1 W
+X FB 3 300 -100 100 L 50 50 1 1 I
+X EN 4 -300 100 100 R 50 50 1 1 I
+X ~ 5 -200 -100 100 R 50 50 1 1 N N
+X VIN 6 0 300 100 D 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# DIO5661TST6
+#
+DEF DIO5661TST6 U 0 20 Y Y 1 F N
+F0 "U" 100 400 50 H V C CNN
+F1 "DIO5661TST6" 300 300 50 H V C CNN
+F2 "" 100 300 50 H I C CNN
+F3 "" 100 300 50 H I C CNN
+$FPLIST
+ TSOT?23?6*
+$ENDFPLIST
+DRAW
+S 200 -200 -200 200 0 1 10 f
+X LX 1 300 100 100 L 50 50 1 1 C
+X GND 2 0 -300 100 U 50 50 1 1 W
+X FB 3 300 -100 100 L 50 50 1 1 I
+X EN 4 -300 100 100 R 50 50 1 1 I
+X ~ 5 -200 -100 100 R 50 50 1 1 N N
+X VIN 6 0 300 100 D 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #

From 7ed2552b1c9d81b1e3a477f03e17aa154d5c8a09 Mon Sep 17 00:00:00 2001
From: eir <m-laniakea@users.noreply.github.com>
Date: Mon, 22 Apr 2019 21:45:46 -0700
Subject: [PATCH 186/201] Driver_LED/DIO5661CD6: Correct stacked GND

DIO5661x: Escape footprint library names
---
 Driver_LED.lib | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/Driver_LED.lib b/Driver_LED.lib
index 0afb02f8e3..1d6e69e751 100644
--- a/Driver_LED.lib
+++ b/Driver_LED.lib
@@ -70,7 +70,7 @@ F1 "DIO5661CD6" 300 300 50 H V C CNN
 F2 "" 100 300 50 H I C CNN
 F3 "" 100 300 50 H I C CNN
 $FPLIST
- DFN?6?1EP?2x2mm?P0.65mm?EP1x1.6mm*
+ Package?DFN?QFN:DFN?6?1EP?2x2mm?P0.65mm?EP1x1.6mm*
 $ENDFPLIST
 DRAW
 S 200 -200 -200 200 0 1 10 f
@@ -80,7 +80,7 @@ X GND 3 0 -300 100 U 50 50 1 1 W
 X LX 4 300 100 100 L 50 50 1 1 C
 X EN 5 -300 100 100 R 50 50 1 1 I
 X VIN 6 0 300 100 D 50 50 1 1 W
-X GND 7 0 -300 100 U 50 50 1 1 W N
+X GND 7 0 -300 100 U 50 50 1 1 P N
 ENDDRAW
 ENDDEF
 #
@@ -92,7 +92,7 @@ F1 "DIO5661ST6" 300 300 50 H V C CNN
 F2 "" 100 300 50 H I C CNN
 F3 "" 100 300 50 H I C CNN
 $FPLIST
- SOT?23?6*
+ Package?TO?SOT?SMD:SOT?23?6*
 $ENDFPLIST
 DRAW
 S 200 -200 -200 200 0 1 10 f
@@ -113,7 +113,7 @@ F1 "DIO5661TST6" 300 300 50 H V C CNN
 F2 "" 100 300 50 H I C CNN
 F3 "" 100 300 50 H I C CNN
 $FPLIST
- TSOT?23?6*
+ Package?TO?SOT?SMD:TSOT?23?6*
 $ENDFPLIST
 DRAW
 S 200 -200 -200 200 0 1 10 f

From 75665b5883c933a90f75b1b53ba8da6740b224ed Mon Sep 17 00:00:00 2001
From: Henner Zeller <h.zeller@acm.org>
Date: Mon, 22 Apr 2019 23:00:22 -0700
Subject: [PATCH 187/201] Disambiguate 74xx04 and 74xx14 to have the hysteresis
 symbol on the latter.

---
 74xx.lib | 38 +++++++++++++++++++++++++++++++++++++-
 1 file changed, 37 insertions(+), 1 deletion(-)

diff --git a/74xx.lib b/74xx.lib
index b9f1ba2091..cba3654e11 100644
--- a/74xx.lib
+++ b/74xx.lib
@@ -451,7 +451,43 @@ F0 "U" 0 50 50 H V C CNN
 F1 "74HCT04" 0 -50 50 H V C CNN
 F2 "" 0 0 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
-ALIAS 74HC14 74HC04 74LS14
+ALIAS 74HC04
+$FPLIST
+ DIP*W7.62mm*
+$ENDFPLIST
+DRAW
+S -200 300 200 -300 7 1 10 f
+P 4 1 0 10 -150 150 -150 -150 150 0 -150 150 f
+P 4 2 0 10 -150 150 -150 -150 150 0 -150 150 f
+P 4 3 0 10 -150 150 -150 -150 150 0 -150 150 f
+P 4 4 0 10 -150 150 -150 -150 150 0 -150 150 f
+P 4 5 0 10 -150 150 -150 -150 150 0 -150 150 f
+P 4 6 0 10 -150 150 -150 -150 150 0 -150 150 f
+X ~ 1 -300 0 150 R 50 50 1 0 I
+X ~ 2 300 0 150 L 50 50 1 0 O I
+X ~ 3 -300 0 150 R 50 50 2 0 I
+X ~ 4 300 0 150 L 50 50 2 0 O I
+X ~ 5 -300 0 150 R 50 50 3 0 I
+X ~ 6 300 0 150 L 50 50 3 0 O I
+X ~ 8 300 0 150 L 50 50 4 0 O I
+X ~ 9 -300 0 150 R 50 50 4 0 I
+X ~ 10 300 0 150 L 50 50 5 0 O I
+X ~ 11 -300 0 150 R 50 50 5 0 I
+X ~ 12 300 0 150 L 50 50 6 0 O I
+X ~ 13 -300 0 150 R 50 50 6 0 I
+X VCC 14 0 500 200 D 50 50 7 0 W
+X GND 7 0 -500 200 U 50 50 7 0 W
+ENDDRAW
+ENDDEF
+#
+# 74HC14
+#
+DEF 74HC14 U 0 40 Y Y 7 L N
+F0 "U" 0 50 50 H V C CNN
+F1 "74HC14" 0 -50 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+ALIAS 74LS14
 $FPLIST
  DIP*W7.62mm*
 $ENDFPLIST

From 11a46afbff36c5a59bf1720462b7ec09f1f43b61 Mon Sep 17 00:00:00 2001
From: eir <m-laniakea@users.noreply.github.com>
Date: Tue, 23 Apr 2019 06:19:26 -0700
Subject: [PATCH 188/201] Driver_LED/DIO5661x: Update footprint info,
 description, datasheet

---
 Driver_LED.dcm | 12 ++++++------
 Driver_LED.lib | 12 ++++++------
 2 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/Driver_LED.dcm b/Driver_LED.dcm
index 26f527b0e0..fa7d950eeb 100644
--- a/Driver_LED.dcm
+++ b/Driver_LED.dcm
@@ -13,21 +13,21 @@ F http://ww1.microchip.com/downloads/en/DeviceDoc/20005413A.pdf
 $ENDCMP
 #
 $CMP DIO5661CD6
-D 37V Step-up LED driver with PWM, 2.7-5.5Vin, 1.3A Iout max
+D 37V Step-up LED driver with PWM, 2.7-5.5Vin, 1.3A Iout max, DFN-6
 K LED driver single
-F https://www.mouser.com/datasheet/2/802/dioo_06292016_DIO5661V0%204-1217651.pdf
+F http://www.dioo.com/attachments/files/20161031115726_129.pdf
 $ENDCMP
 #
 $CMP DIO5661ST6
-D 37V Step-up LED driver with PWM, 2.7-5.5Vin, 1.3A Iout max
+D 37V Step-up LED driver with PWM, 2.7-5.5Vin, 1.3A Iout max, SOT23-6
 K LED driver single
-F https://www.mouser.com/datasheet/2/802/dioo_06292016_DIO5661V0%204-1217651.pdf
+F http://www.dioo.com/attachments/files/20161031115726_129.pdf
 $ENDCMP
 #
 $CMP DIO5661TST6
-D 37V Step-up LED driver with PWM, 2.7-5.5Vin, 1.3A Iout max
+D 37V Step-up LED driver with PWM, 2.7-5.5Vin, 1.3A Iout max, TSOT23-6
 K LED driver single
-F https://www.mouser.com/datasheet/2/802/dioo_06292016_DIO5661V0%204-1217651.pdf
+F http://www.dioo.com/attachments/files/20161031115726_129.pdf
 $ENDCMP
 #
 $CMP HT1632C-52LQFP
diff --git a/Driver_LED.lib b/Driver_LED.lib
index 1d6e69e751..e1b7f07c46 100644
--- a/Driver_LED.lib
+++ b/Driver_LED.lib
@@ -67,10 +67,10 @@ ENDDEF
 DEF DIO5661CD6 U 0 20 Y Y 1 F N
 F0 "U" 100 400 50 H V C CNN
 F1 "DIO5661CD6" 300 300 50 H V C CNN
-F2 "" 100 300 50 H I C CNN
+F2 "Package_DFN_QFN:DFN-6-1EP_2x2mm_P0.65mm_EP1x1.6mm" 100 300 50 H I C CNN
 F3 "" 100 300 50 H I C CNN
 $FPLIST
- Package?DFN?QFN:DFN?6?1EP?2x2mm?P0.65mm?EP1x1.6mm*
+ DFN*1EP*2x2mm*P0.65mm*
 $ENDFPLIST
 DRAW
 S 200 -200 -200 200 0 1 10 f
@@ -89,10 +89,10 @@ ENDDEF
 DEF DIO5661ST6 U 0 20 Y Y 1 F N
 F0 "U" 100 400 50 H V C CNN
 F1 "DIO5661ST6" 300 300 50 H V C CNN
-F2 "" 100 300 50 H I C CNN
+F2 "Package_TO_SOT_SMD:SOT-23-6" 100 300 50 H I C CNN
 F3 "" 100 300 50 H I C CNN
 $FPLIST
- Package?TO?SOT?SMD:SOT?23?6*
+ SOT?23*
 $ENDFPLIST
 DRAW
 S 200 -200 -200 200 0 1 10 f
@@ -110,10 +110,10 @@ ENDDEF
 DEF DIO5661TST6 U 0 20 Y Y 1 F N
 F0 "U" 100 400 50 H V C CNN
 F1 "DIO5661TST6" 300 300 50 H V C CNN
-F2 "" 100 300 50 H I C CNN
+F2 "Package_TO_SOT_SMD:TSOT-23-6" 100 300 50 H I C CNN
 F3 "" 100 300 50 H I C CNN
 $FPLIST
- Package?TO?SOT?SMD:TSOT?23?6*
+ TSOT?23*
 $ENDFPLIST
 DRAW
 S 200 -200 -200 200 0 1 10 f

From c2169f6a3b663029250e345261eb64855c53ebed Mon Sep 17 00:00:00 2001
From: Konstantin Oblaukhov <ObKo@mail.ru>
Date: Wed, 24 Apr 2019 02:08:45 +0700
Subject: [PATCH 189/201] BQ25570: Nano power boost charger and buck converter
 (#1728)

* BQ25570: Nano Power Boost Charger and Buck Converter for Energy Harvester Powered Applications

* BQ25570: Fix footprint.

* Fix keywords and footprint filter.
---
 Battery_Management.dcm |  6 ++++++
 Battery_Management.lib | 36 ++++++++++++++++++++++++++++++++++++
 2 files changed, 42 insertions(+)

diff --git a/Battery_Management.dcm b/Battery_Management.dcm
index d0a2845318..e0dac5bb7f 100644
--- a/Battery_Management.dcm
+++ b/Battery_Management.dcm
@@ -72,6 +72,12 @@ K energy harvesting li-ion battery solar TEG
 F http://www.ti.com/lit/ds/symlink/bq25504.pdf
 $ENDCMP
 #
+$CMP BQ25570
+D Nano Power Boost Charger and Buck Converter for Energy Harvester Powered Applications, QFN-20
+K harvester solar TEG charger li-on buck
+F http://www.ti.com/lit/ds/symlink/bq25570.pdf
+$ENDCMP
+#
 $CMP BQ25601
 D I2C Controlled 3A Single-Cell Battery Charger for High Input Voltage and Narrow Voltage DC Power Path Management, WQFN-32
 K LiPO charger
diff --git a/Battery_Management.lib b/Battery_Management.lib
index 8d5143aae3..6db4e81c4a 100644
--- a/Battery_Management.lib
+++ b/Battery_Management.lib
@@ -401,6 +401,42 @@ X OK_HYST 9 -600 -100 100 R 50 50 1 1 I
 ENDDRAW
 ENDDEF
 #
+# BQ25570
+#
+DEF BQ25570 U 0 20 Y Y 1 F N
+F0 "U" -500 650 50 H V C CNN
+F1 "BQ25570" 400 650 50 H V C CNN
+F2 "Package_DFN_QFN:QFN-20-1EP_3.5x3.5mm_P0.5mm_EP2x2mm" 0 -200 50 H I C CNN
+F3 "" 400 1200 50 H I C CNN
+$FPLIST
+ QFN*1EP*3.5x3.5mm*P0.5mm*
+$ENDFPLIST
+DRAW
+S -500 600 500 -600 0 1 10 f
+X VSS 1 0 -700 100 U 50 50 1 1 W
+X OK_HYST 10 600 -200 100 L 50 50 1 1 I
+X OK_PROG 11 600 -300 100 L 50 50 1 1 I
+X VOUT_SET 12 600 -500 100 L 50 50 1 1 I
+X VBAT_OK 13 600 100 100 L 50 50 1 1 O
+X VOUT 14 600 300 100 L 50 50 1 1 I
+X VSS 15 0 -700 100 U 50 50 1 1 P N
+X LBUCK 16 600 500 100 L 50 50 1 1 P
+X VSS 17 0 -700 100 U 50 50 1 1 P N
+X VBAT 18 100 700 100 D 50 50 1 1 W
+X VSTOR 19 0 700 100 D 50 50 1 1 w
+X VIN_DC 2 -100 700 100 D 50 50 1 1 W
+X LBOOST 20 -600 500 100 R 50 50 1 1 P
+X VSS 21 0 -700 100 U 50 50 1 1 P N
+X VOC_SAMP 3 -600 100 100 R 50 50 1 1 I
+X VREF_SAMP 4 -600 -500 100 R 50 50 1 1 P
+X ~EN 5 -600 -100 100 R 50 50 1 1 I
+X VOUT_EN 6 -600 -200 100 R 50 50 1 1 I
+X VBAT_OV 7 600 -400 100 L 50 50 1 1 I
+X VRDIV 8 600 -100 100 L 50 50 1 1 O
+X VSS 9 0 -700 100 U 50 50 1 1 P N
+ENDDRAW
+ENDDEF
+#
 # BQ25601
 #
 DEF BQ25601 U 0 20 Y Y 1 F N

From 12aee35a7c30e827da5ba113c6873c8817a18aa4 Mon Sep 17 00:00:00 2001
From: eir <m-laniakea@users.noreply.github.com>
Date: Tue, 23 Apr 2019 16:51:19 -0700
Subject: [PATCH 190/201] Driver_LED/DIO5661x: Update datasheet link

---
 Driver_LED.dcm | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Driver_LED.dcm b/Driver_LED.dcm
index fa7d950eeb..e0b2b91bd6 100644
--- a/Driver_LED.dcm
+++ b/Driver_LED.dcm
@@ -15,19 +15,19 @@ $ENDCMP
 $CMP DIO5661CD6
 D 37V Step-up LED driver with PWM, 2.7-5.5Vin, 1.3A Iout max, DFN-6
 K LED driver single
-F http://www.dioo.com/attachments/files/20161031115726_129.pdf
+F http://www.dioo.com/uploads/product/20190311/e6c7f30c0fbe92fbfa6965c8ef1c5b19.pdf
 $ENDCMP
 #
 $CMP DIO5661ST6
 D 37V Step-up LED driver with PWM, 2.7-5.5Vin, 1.3A Iout max, SOT23-6
 K LED driver single
-F http://www.dioo.com/attachments/files/20161031115726_129.pdf
+F http://www.dioo.com/uploads/product/20190311/e6c7f30c0fbe92fbfa6965c8ef1c5b19.pdf
 $ENDCMP
 #
 $CMP DIO5661TST6
 D 37V Step-up LED driver with PWM, 2.7-5.5Vin, 1.3A Iout max, TSOT23-6
 K LED driver single
-F http://www.dioo.com/attachments/files/20161031115726_129.pdf
+F http://www.dioo.com/uploads/product/20190311/e6c7f30c0fbe92fbfa6965c8ef1c5b19.pdf
 $ENDCMP
 #
 $CMP HT1632C-52LQFP

From f21df0f179e5a6a4a8dc4fe0126c1f4fd29ae8c3 Mon Sep 17 00:00:00 2001
From: evanshultz <evan.shultz@gmail.com>
Date: Tue, 23 Apr 2019 17:08:06 -0700
Subject: [PATCH 191/201] Swap pins of BPW21

---
 Sensor_Optical.lib | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Sensor_Optical.lib b/Sensor_Optical.lib
index a441949f95..25fdf66f34 100644
--- a/Sensor_Optical.lib
+++ b/Sensor_Optical.lib
@@ -245,8 +245,8 @@ P 2 0 1 0 0 50 0 -50 N
 P 3 0 1 0 -20 130 -80 70 -80 90 N
 P 3 0 1 0 0 50 -100 0 0 -50 N
 P 5 0 1 0 30 130 -30 70 -30 90 -30 70 -10 70 N
-X K 1 -200 0 100 R 50 50 1 1 P
-X A 2 100 0 100 L 50 50 1 1 P
+X A 1 100 0 100 L 50 50 1 1 P
+X K 2 -200 0 100 R 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #

From 6878be9445285e83a9b4eea27c2f0bc0bb96368c Mon Sep 17 00:00:00 2001
From: Francesco Donadon <francesco.donadon@gmail.com>
Date: Wed, 24 Apr 2019 08:57:25 +0200
Subject: [PATCH 192/201] Fix OKI*78SR* footprint filters

---
 Converter_DCDC.lib | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Converter_DCDC.lib b/Converter_DCDC.lib
index dd98b5293d..e57ff5bbe0 100644
--- a/Converter_DCDC.lib
+++ b/Converter_DCDC.lib
@@ -577,7 +577,7 @@ F2 "Converter_DCDC:Converter_DCDC_muRata_OKI-78SR_Vertical" 50 -250 50 H I L CIN
 F3 "" 0 0 50 H I C CNN
 ALIAS OKI-78SR-5_1.5-W36-C OKI-78SR-12_1.0-W36-C
 $FPLIST
- *OKI?78SR*Vertical*
+ Converter*DCDC*muRata*OKI*78SR*Vertical*
 $ENDFPLIST
 DRAW
 S -200 75 200 -200 0 1 10 f
@@ -596,7 +596,7 @@ F2 "Converter_DCDC:Converter_DCDC_muRata_OKI-78SR_Horizontal" 50 -250 50 H I L C
 F3 "" 0 0 50 H I C CNN
 ALIAS OKI-78SR-12_1.0-W36H-C OKI-78SR-5_1.5-W36H-C
 $FPLIST
- *OKI?78SR*Horizontal*
+ Converter*DCDC*muRata*OKI*78SR*Horizontal*
 $ENDFPLIST
 DRAW
 S -200 75 200 -200 0 1 10 f

From 98a1f67ffc01830be7cecdb3b899a583881ceab1 Mon Sep 17 00:00:00 2001
From: Daniel Mack <daniel@zonque.org>
Date: Tue, 2 Apr 2019 14:18:44 +0200
Subject: [PATCH 193/201] Driver_LED: Add TLC59108IPWR

This adds a symbol for TLC59108IPWR, a 8-Bit Fm+ I2C-BusConstant-CurrentLED
Sink Driver in a TSSOP-20 package.

The datasheet is here:

  https://www.ti.com/lit/ds/symlink/tlc59108.pdf
---
 Driver_LED.dcm |  6 ++++++
 Driver_LED.lib | 36 ++++++++++++++++++++++++++++++++++++
 2 files changed, 42 insertions(+)

diff --git a/Driver_LED.dcm b/Driver_LED.dcm
index 385193bc98..3842bbcc7c 100644
--- a/Driver_LED.dcm
+++ b/Driver_LED.dcm
@@ -210,6 +210,12 @@ K Shift Register LED driver 16 bit
 F https://www.st.com/resource/en/datasheet/stp16cp05.pdf
 $ENDCMP
 #
+$CMP TLC59108IPWR
+D 8-Channel, 8-Bit Fm+ I2C-Bus Constant-Current LED Sink Driver, TSSOP-20
+K LED current driver
+F https://www.ti.com/lit/ds/symlink/tlc59108.pdf
+$ENDCMP
+#
 $CMP TLC5940NT
 D 16-Channel LED Driver With DOT Correction and Grayscale PWM Control, DIP package
 K PWM LED driver
diff --git a/Driver_LED.lib b/Driver_LED.lib
index 7ade6b301a..1c0882376a 100644
--- a/Driver_LED.lib
+++ b/Driver_LED.lib
@@ -886,6 +886,42 @@ X ~OUT4 9 400 500 100 L 50 50 1 1 O
 ENDDRAW
 ENDDEF
 #
+# TLC59108IPWR
+#
+DEF TLC59108IPWR U 0 20 Y Y 1 F N
+F0 "U" -350 550 50 H V C CNN
+F1 "TLC59108IPWR" 350 550 50 H V C CNN
+F2 "Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm" 0 0 50 H I C CNN
+F3 "" -200 -50 50 H I C CNN
+$FPLIST
+ TSSOP*4.4x6.5mm*P0.65mm*
+$ENDFPLIST
+DRAW
+S -400 500 400 -400 0 1 10 f
+X REXT 1 -500 -300 100 R 50 50 1 1 I
+X ~OUT3 10 500 100 100 L 50 50 1 1 w
+X ~OUT4 11 500 0 100 L 50 50 1 1 w
+X ~OUT5 12 500 -100 100 L 50 50 1 1 w
+X GND 13 -100 -500 100 U 50 50 1 1 P N
+X ~OUT6 14 500 -200 100 L 50 50 1 1 w
+X ~OUT7 15 500 -300 100 L 50 50 1 1 w
+X GND 16 -100 -500 100 U 50 50 1 1 P N
+X ~RESET 17 -500 400 100 R 50 50 1 1 I
+X SCL 18 -500 300 100 R 50 50 1 1 I
+X SDA 19 -500 200 100 R 50 50 1 1 B
+X A0 2 -500 100 100 R 50 50 1 1 I
+X VCC 20 0 600 100 D 50 50 1 1 W
+X PAD 21 100 -500 100 U 50 50 1 1 P
+X A1 3 -500 0 100 R 50 50 1 1 I
+X A2 4 -500 -100 100 R 50 50 1 1 I
+X A3 5 -500 -200 100 R 50 50 1 1 I
+X ~OUT0 6 500 400 100 L 50 50 1 1 w
+X ~OUT1 7 500 300 100 L 50 50 1 1 w
+X GND 8 -100 -500 100 U 50 50 1 1 W
+X ~OUT2 9 500 200 100 L 50 50 1 1 w
+ENDDRAW
+ENDDEF
+#
 # TLC5940NT
 #
 DEF TLC5940NT U 0 40 Y Y 1 F N

From 398c49c2f33eda60f6b0162d05699ca01fa154df Mon Sep 17 00:00:00 2001
From: Daniel Mack <daniel@zonque.org>
Date: Fri, 29 Mar 2019 09:37:43 +0100
Subject: [PATCH 194/201] Sensor_Temperature: Add PCT2075

Add symbols for the NXP PCT2075 temperature sensor in 2 different packages.

The datasheet is here:

  https://www.nxp.com/docs/en/data-sheet/PCT2075.pdf
---
 Sensor_Temperature.dcm | 12 +++++++++++
 Sensor_Temperature.lib | 46 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 58 insertions(+)

diff --git a/Sensor_Temperature.dcm b/Sensor_Temperature.dcm
index 23deb83976..8842b79264 100644
--- a/Sensor_Temperature.dcm
+++ b/Sensor_Temperature.dcm
@@ -396,6 +396,18 @@ K temperature sensor I2C
 F http://ww1.microchip.com/downloads/en/DeviceDoc/22203b.pdf
 $ENDCMP
 #
+$CMP PCT2075D
+D NXP I2C-bus Fm+ digital temperature sensor and thermal watchdog, SO-8
+K single channel
+F https://www.nxp.com/docs/en/data-sheet/PCT2075.pdf
+$ENDCMP
+#
+$CMP PCT2075DP
+D NXP I2C-bus Fm+ digital temperature sensor and thermal watchdog, TSSOP-8
+K single channel
+F https://www.nxp.com/docs/en/data-sheet/PCT2075.pdf
+$ENDCMP
+#
 $CMP PT100
 D PT100 platinum temperature sensor (RTD)
 K platinum temperature sensor RTD
diff --git a/Sensor_Temperature.lib b/Sensor_Temperature.lib
index b0640f6eca..f8f57fbdf8 100644
--- a/Sensor_Temperature.lib
+++ b/Sensor_Temperature.lib
@@ -1107,6 +1107,52 @@ X VDD 8 0 500 100 D 50 50 1 1 W
 ENDDRAW
 ENDDEF
 #
+# PCT2075D
+#
+DEF PCT2075D U 0 20 Y Y 1 F N
+F0 "U" -250 250 50 H V C CNN
+F1 "PCT2075D" 250 250 50 H V C CNN
+F2 "Package_SO:SO-8_3.9x4.9mm_P1.27mm" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ SO*3.9x4.9mm*P1.27mm*
+$ENDFPLIST
+DRAW
+S -300 200 300 -200 0 1 10 f
+X SDA 1 400 100 100 L 50 50 1 1 B
+X SCL 2 400 0 100 L 50 50 1 1 I
+X OS 3 400 -100 100 L 50 50 1 1 C
+X GND 4 0 -300 100 U 50 50 1 1 W
+X A2 5 -400 -100 100 R 50 50 1 1 I
+X A1 6 -400 0 100 R 50 50 1 1 I
+X A0 7 -400 100 100 R 50 50 1 1 I
+X VCC 8 0 300 100 D 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# PCT2075DP
+#
+DEF PCT2075DP U 0 20 Y Y 1 F N
+F0 "U" -250 250 50 H V C CNN
+F1 "PCT2075DP" 250 250 50 H V C CNN
+F2 "Package_SO:TSSOP-8_3x3mm_P0.65mm" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ TSSOP*3x3mm*P0.65mm*
+$ENDFPLIST
+DRAW
+S -300 200 300 -200 0 1 10 f
+X SDA 1 400 100 100 L 50 50 1 1 B
+X SCL 2 400 0 100 L 50 50 1 1 I
+X OS 3 400 -100 100 L 50 50 1 1 C
+X GND 4 0 -300 100 U 50 50 1 1 W
+X A2 5 -400 -100 100 R 50 50 1 1 I
+X A1 6 -400 0 100 R 50 50 1 1 I
+X A0 7 -400 100 100 R 50 50 1 1 I
+X VCC 8 0 300 100 D 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
 # PT100
 #
 DEF PT100 TH 0 0 N Y 1 F N

From 25c5ada23758cd05add58b306f91e183e862ffe5 Mon Sep 17 00:00:00 2001
From: GuillaumeG <48102745+JonathSpirit@users.noreply.github.com>
Date: Thu, 25 Apr 2019 17:55:22 +0200
Subject: [PATCH 195/201] fixing 40374, and add 74AHC/AHCT244 alias (#1779)

* for the 40374 :
pin '1' is not a reset pin '~R' but a enable pin '~E'
and the 40374 is a tri-state output buffer, not a simple output buffer.
(and try to fix Travis error)

For the 74HC244 :

adding 74AHC244/74AHCT244 alias.

the keyword for the 74HC244 say 'TTL' but it's 'HCMOS'.
same for the 74HCT244 the keyword say 'TTL' but it's 'HCTMOS'.

* fix error Travis violating S6.3 for 40374

* Revert polylines and invisible pin

* Revert polylines
(first time didn't work)

* 40374: pin 1 '~R' to '~E' and output pin to tri-state
---
 4xxx_IEEE.dcm |  6 ++++++
 4xxx_IEEE.lib | 20 ++++++++++----------
 74xx.dcm      | 16 ++++++++++++++--
 74xx.lib      |  2 +-
 4 files changed, 31 insertions(+), 13 deletions(-)

diff --git a/4xxx_IEEE.dcm b/4xxx_IEEE.dcm
index 5748c1a484..a96eb16b6f 100644
--- a/4xxx_IEEE.dcm
+++ b/4xxx_IEEE.dcm
@@ -1,5 +1,11 @@
 EESchema-DOCLIB  Version 2.0
 #
+$CMP 40374
+D 8-bit D-flip-flop with 3-State outputs
+K CMOS BUFFER 3State
+F https://www.digchip.com/datasheets/download_datasheet.php?id=369790&part-number=HEF40374BDB
+$ENDCMP
+#
 $CMP 4504
 D 4504 Hex Voltage-level Shifter
 K cmos, level converter
diff --git a/4xxx_IEEE.lib b/4xxx_IEEE.lib
index 3a48278494..1ac1856346 100644
--- a/4xxx_IEEE.lib
+++ b/4xxx_IEEE.lib
@@ -1134,7 +1134,7 @@ ENDDEF
 #
 # 40374
 #
-DEF 40374 U 0 30 Y Y 1 F N
+DEF 40374 U 0 20 Y Y 1 F N
 F0 "U" 250 550 50 H V C CNN
 F1 "40374" 350 -650 50 H V C CNN
 F2 "" 0 0 50 H I C CNN
@@ -1150,26 +1150,26 @@ S -200 100 200 0 0 1 0 N
 S -200 200 200 100 0 1 0 N
 P 5 0 1 0 80 180 160 180 120 120 80 180 80 180 N
 P 9 0 1 0 -150 200 -150 250 -200 250 -200 500 200 500 200 250 150 250 150 200 150 200 N
-X ~R 1 -500 400 300 R 50 50 0 0 I I
+X ~E 1 -500 400 300 R 50 50 0 0 I I
 X Vss 10 0 500 0 D 50 50 0 0 W N
 X Ck 11 -500 300 300 R 50 50 0 0 I C
 X Vdd 20 150 500 0 D 50 50 0 0 W N
-X ~ 12 500 -250 300 L 50 50 1 0 O
+X ~ 12 500 -250 300 L 50 50 1 0 T
 X ~ 13 -500 -250 300 R 50 50 1 0 I
 X ~ 14 -500 -350 300 R 50 50 1 0 I
-X ~ 15 500 -350 300 L 50 50 1 0 O
-X ~ 16 500 -450 300 L 50 50 1 0 O
+X ~ 15 500 -350 300 L 50 50 1 0 T
+X ~ 16 500 -450 300 L 50 50 1 0 T
 X ~ 17 -500 -450 300 R 50 50 1 0 I
 X ~ 18 -500 -550 300 R 50 50 1 0 I
-X ~ 19 500 -550 300 L 50 50 1 0 O
-X ~ 2 500 150 300 L 50 50 1 0 O
+X ~ 19 500 -550 300 L 50 50 1 0 T
+X ~ 2 500 150 300 L 50 50 1 0 T
 X ~ 3 -500 150 300 R 50 50 1 0 I
 X ~ 4 -500 50 300 R 50 50 1 0 I
-X ~ 5 500 50 300 L 50 50 1 0 O
-X ~ 6 500 -50 300 L 50 50 1 0 O
+X ~ 5 500 50 300 L 50 50 1 0 T
+X ~ 6 500 -50 300 L 50 50 1 0 T
 X ~ 7 -500 -50 300 R 50 50 1 0 I
 X ~ 8 -500 -150 300 R 50 50 1 0 I
-X ~ 9 500 -150 300 L 50 50 1 0 O
+X ~ 9 500 -150 300 L 50 50 1 0 T
 ENDDRAW
 ENDDEF
 #
diff --git a/74xx.dcm b/74xx.dcm
index 6616080505..b1873a976b 100644
--- a/74xx.dcm
+++ b/74xx.dcm
@@ -18,12 +18,24 @@ K counter
 F http://www.ti.com/lit/gpn/sn74469
 $ENDCMP
 #
+$CMP 74AHC244
+D 8-bit Buffer/Line Driver 3-state
+K AHCMOS BUFFER 3State
+F https://assets.nexperia.com/documents/data-sheet/74AHC_AHCT244.pdf
+$ENDCMP
+#
 $CMP 74AHCT123
 D Dual retriggerable monostable multivibrator
 K TTL monostable, multivibrator
 F http://www.ti.com/lit/gpn/sn74ahct123a
 $ENDCMP
 #
+$CMP 74AHCT244
+D 8-bit Buffer/Line Driver 3-state
+K AHCTMOS BUFFER 3State
+F https://assets.nexperia.com/documents/data-sheet/74AHC_AHCT244.pdf
+$ENDCMP
+#
 $CMP 74CBTLV3257
 D Quad 1:2 FET Multiplexer/Demultiplexer, Low-Voltage
 K mux demux low-voltage
@@ -74,7 +86,7 @@ $ENDCMP
 #
 $CMP 74HC244
 D 8-bit Buffer/Line Driver 3-state
-K TTL BUFFER 3State
+K HCMOS BUFFER 3State
 F https://assets.nexperia.com/documents/data-sheet/74HC_HCT244.pdf
 $ENDCMP
 #
@@ -170,7 +182,7 @@ $ENDCMP
 #
 $CMP 74HCT244
 D 8-bit Buffer/Line Driver 3-state
-K TTL BUFFER 3State
+K HCTMOS BUFFER 3State
 F https://assets.nexperia.com/documents/data-sheet/74HC_HCT244.pdf
 $ENDCMP
 #
diff --git a/74xx.lib b/74xx.lib
index cba3654e11..43b32fc3f7 100644
--- a/74xx.lib
+++ b/74xx.lib
@@ -194,7 +194,7 @@ F0 "U" -300 650 50 H V C CNN
 F1 "74HC244" -300 -650 50 H V C CNN
 F2 "" 0 0 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
-ALIAS 74HCT244
+ALIAS 74HCT244 74AHC244 74AHCT244
 $FPLIST
  TSSOP*4.4x6.5mm*P0.65mm*
  SSOP*4.4x6.5mm*P0.65mm*

From 278db66628ed72a0f576514b9d3bcc5ae92e2dc8 Mon Sep 17 00:00:00 2001
From: Daniel Mack <daniel@zonque.org>
Date: Thu, 25 Apr 2019 20:37:04 +0200
Subject: [PATCH 196/201] Sensor_Temperature: PCT2075*: fix keywords

---
 Sensor_Temperature.dcm | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Sensor_Temperature.dcm b/Sensor_Temperature.dcm
index 8842b79264..c818846657 100644
--- a/Sensor_Temperature.dcm
+++ b/Sensor_Temperature.dcm
@@ -398,13 +398,13 @@ $ENDCMP
 #
 $CMP PCT2075D
 D NXP I2C-bus Fm+ digital temperature sensor and thermal watchdog, SO-8
-K single channel
+K temperature sensor I2C single channel
 F https://www.nxp.com/docs/en/data-sheet/PCT2075.pdf
 $ENDCMP
 #
 $CMP PCT2075DP
 D NXP I2C-bus Fm+ digital temperature sensor and thermal watchdog, TSSOP-8
-K single channel
+K temperature sensor I2C single channel
 F https://www.nxp.com/docs/en/data-sheet/PCT2075.pdf
 $ENDCMP
 #

From 395b0c92cccf41272625a34d637e552be925a6fb Mon Sep 17 00:00:00 2001
From: Daniel Mack <daniel@zonque.org>
Date: Thu, 25 Apr 2019 20:40:16 +0200
Subject: [PATCH 197/201] Driver_LED: TLC59108: fix issues that came up in
 review

* Rename to TLC59108xPW
* Drop pin 21 as the TSSOP version does not have an EP
* Make REXT passive
* Make output pins open collector
---
 Driver_LED.dcm |  2 +-
 Driver_LED.lib | 31 +++++++++++++++----------------
 2 files changed, 16 insertions(+), 17 deletions(-)

diff --git a/Driver_LED.dcm b/Driver_LED.dcm
index 3842bbcc7c..c6b4fb47f6 100644
--- a/Driver_LED.dcm
+++ b/Driver_LED.dcm
@@ -210,7 +210,7 @@ K Shift Register LED driver 16 bit
 F https://www.st.com/resource/en/datasheet/stp16cp05.pdf
 $ENDCMP
 #
-$CMP TLC59108IPWR
+$CMP TLC59108xPW
 D 8-Channel, 8-Bit Fm+ I2C-Bus Constant-Current LED Sink Driver, TSSOP-20
 K LED current driver
 F https://www.ti.com/lit/ds/symlink/tlc59108.pdf
diff --git a/Driver_LED.lib b/Driver_LED.lib
index 1c0882376a..e47e7be1a6 100644
--- a/Driver_LED.lib
+++ b/Driver_LED.lib
@@ -886,11 +886,11 @@ X ~OUT4 9 400 500 100 L 50 50 1 1 O
 ENDDRAW
 ENDDEF
 #
-# TLC59108IPWR
+# TLC59108xPW
 #
-DEF TLC59108IPWR U 0 20 Y Y 1 F N
+DEF TLC59108xPW U 0 20 Y Y 1 F N
 F0 "U" -350 550 50 H V C CNN
-F1 "TLC59108IPWR" 350 550 50 H V C CNN
+F1 "TLC59108xPW" 350 550 50 H V C CNN
 F2 "Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm" 0 0 50 H I C CNN
 F3 "" -200 -50 50 H I C CNN
 $FPLIST
@@ -898,27 +898,26 @@ $FPLIST
 $ENDFPLIST
 DRAW
 S -400 500 400 -400 0 1 10 f
-X REXT 1 -500 -300 100 R 50 50 1 1 I
-X ~OUT3 10 500 100 100 L 50 50 1 1 w
-X ~OUT4 11 500 0 100 L 50 50 1 1 w
-X ~OUT5 12 500 -100 100 L 50 50 1 1 w
-X GND 13 -100 -500 100 U 50 50 1 1 P N
-X ~OUT6 14 500 -200 100 L 50 50 1 1 w
-X ~OUT7 15 500 -300 100 L 50 50 1 1 w
-X GND 16 -100 -500 100 U 50 50 1 1 P N
+X REXT 1 -500 -300 100 R 50 50 1 1 P
+X ~OUT3 10 500 100 100 L 50 50 1 1 C
+X ~OUT4 11 500 0 100 L 50 50 1 1 C
+X ~OUT5 12 500 -100 100 L 50 50 1 1 C
+X GND 13 0 -500 100 U 50 50 1 1 P N
+X ~OUT6 14 500 -200 100 L 50 50 1 1 C
+X ~OUT7 15 500 -300 100 L 50 50 1 1 C
+X GND 16 0 -500 100 U 50 50 1 1 P N
 X ~RESET 17 -500 400 100 R 50 50 1 1 I
 X SCL 18 -500 300 100 R 50 50 1 1 I
 X SDA 19 -500 200 100 R 50 50 1 1 B
 X A0 2 -500 100 100 R 50 50 1 1 I
 X VCC 20 0 600 100 D 50 50 1 1 W
-X PAD 21 100 -500 100 U 50 50 1 1 P
 X A1 3 -500 0 100 R 50 50 1 1 I
 X A2 4 -500 -100 100 R 50 50 1 1 I
 X A3 5 -500 -200 100 R 50 50 1 1 I
-X ~OUT0 6 500 400 100 L 50 50 1 1 w
-X ~OUT1 7 500 300 100 L 50 50 1 1 w
-X GND 8 -100 -500 100 U 50 50 1 1 W
-X ~OUT2 9 500 200 100 L 50 50 1 1 w
+X ~OUT0 6 500 400 100 L 50 50 1 1 C
+X ~OUT1 7 500 300 100 L 50 50 1 1 C
+X GND 8 0 -500 100 U 50 50 1 1 W
+X ~OUT2 9 500 200 100 L 50 50 1 1 C
 ENDDRAW
 ENDDEF
 #

From 28c3a4960563fad853c810c0a72bf92f9b3ad0a1 Mon Sep 17 00:00:00 2001
From: Alex <github@delorted.com>
Date: Fri, 26 Apr 2019 14:23:29 -0600
Subject: [PATCH 198/201] Fix 8259 pinout: RD and WR were swapped (#1789)

---
 Interface.dcm | 0
 Interface.lib | 4 ++--
 2 files changed, 2 insertions(+), 2 deletions(-)
 mode change 100644 => 100755 Interface.dcm
 mode change 100644 => 100755 Interface.lib

diff --git a/Interface.dcm b/Interface.dcm
old mode 100644
new mode 100755
diff --git a/Interface.lib b/Interface.lib
old mode 100644
new mode 100755
index 325efdb96d..4c603a706d
--- a/Interface.lib
+++ b/Interface.lib
@@ -397,7 +397,7 @@ X ~SP~/~EN~ 16 600 -500 150 L 50 50 1 1 B
 X INT 17 -600 -700 150 R 50 50 1 1 O
 X IR0 18 600 100 150 L 50 50 1 1 I
 X IR1 19 600 200 150 L 50 50 1 1 I
-X ~RD~ 2 -600 -400 150 R 50 50 1 1 I
+X ~WR~ 2 -600 -400 150 R 50 50 1 1 I
 X IR2 20 600 300 150 L 50 50 1 1 I
 X IR3 21 600 400 150 L 50 50 1 1 I
 X IR4 22 600 500 150 L 50 50 1 1 I
@@ -407,7 +407,7 @@ X IR7 25 600 800 150 L 50 50 1 1 I
 X ~INTA~ 26 -600 -800 150 R 50 50 1 1 I
 X A0 27 -600 -100 150 R 50 50 1 1 I
 X VCC 28 0 1100 150 D 50 50 1 1 W
-X ~WR~ 3 -600 -500 150 R 50 50 1 1 I
+X ~RD~ 3 -600 -500 150 R 50 50 1 1 I
 X D7 4 -600 100 150 R 50 50 1 1 B
 X D6 5 -600 200 150 R 50 50 1 1 B
 X D5 6 -600 300 150 R 50 50 1 1 B

From beb8ed22ed71528752e16214b24456b54ff82e41 Mon Sep 17 00:00:00 2001
From: dxrpl <50060205+dxrpl@users.noreply.github.com>
Date: Tue, 30 Apr 2019 17:18:40 +0200
Subject: [PATCH 199/201] Corrections (#1793)

* Fixed pin types of TL494

* Fixed pin types of TL494

* Fixed pin types

* Fixed pin types
---
 Regulator_Controller.lib | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/Regulator_Controller.lib b/Regulator_Controller.lib
index b3c6e2c36d..77b45e122b 100644
--- a/Regulator_Controller.lib
+++ b/Regulator_Controller.lib
@@ -1439,21 +1439,21 @@ $ENDFPLIST
 DRAW
 S -400 -500 400 600 0 1 10 f
 X 1IN+ 1 -500 400 100 R 50 50 1 1 I
-X E2 10 500 -200 100 L 50 50 1 1 E
-X C2 11 500 100 100 L 50 50 1 1 C
+X E2 10 500 -200 100 L 50 50 1 1 P
+X C2 11 500 100 100 L 50 50 1 1 P
 X VCC 12 0 700 100 D 50 50 1 1 W
 X OUTCTRL 13 -500 -200 100 R 50 50 1 1 I
-X REF 14 -500 0 100 R 50 50 1 1 W
+X REF 14 -500 0 100 R 50 50 1 1 w
 X 2IN- 15 -500 200 100 R 50 50 1 1 I
 X 2IN+ 16 -500 300 100 R 50 50 1 1 I
 X 1IN- 2 -500 500 100 R 50 50 1 1 I
-X FB 3 -500 100 100 R 50 50 1 1 I
+X FB 3 -500 100 100 R 50 50 1 1 O
 X DTC 4 -500 -100 100 R 50 50 1 1 I
 X CT 5 -500 -400 100 R 50 50 1 1 P
 X RT 6 -500 -300 100 R 50 50 1 1 P
 X GND 7 0 -600 100 U 50 50 1 1 W
-X C1 8 500 200 100 L 50 50 1 1 C
-X E1 9 500 -100 100 L 50 50 1 1 E
+X C1 8 500 200 100 L 50 50 1 1 P
+X E1 9 500 -100 100 L 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #

From d7379eaec34a4a6b2e89aa63fd8b750760619255 Mon Sep 17 00:00:00 2001
From: Xathar <jneiva08@gmail.com>
Date: Tue, 30 Apr 2019 17:02:26 +0100
Subject: [PATCH 200/201] Sensor_Pressure (#1798)

* Moved NC to the edge
Changed Position offset to 20

* Update datasheet link of BMP280
---
 Sensor_Pressure.dcm |  2 +-
 Sensor_Pressure.lib | 22 +++++++++++-----------
 2 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/Sensor_Pressure.dcm b/Sensor_Pressure.dcm
index 91ded250fa..97c9cdee0e 100644
--- a/Sensor_Pressure.dcm
+++ b/Sensor_Pressure.dcm
@@ -27,7 +27,7 @@ $ENDCMP
 $CMP BMP280
 D Absolute Barometric Pressure Sensor, LGA-8
 K I2C, SPI, pressure, temperature, sensor
-F https://ae-bst.resource.bosch.com/media/_tech/media/datasheets/BST-BMP280-DS001-19.pdf
+F https://ae-bst.resource.bosch.com/media/_tech/media/datasheets/BST-BMP280-DS001.pdf
 $ENDCMP
 #
 $CMP LPS25HB
diff --git a/Sensor_Pressure.lib b/Sensor_Pressure.lib
index fe14ce4a80..038f36d1c9 100644
--- a/Sensor_Pressure.lib
+++ b/Sensor_Pressure.lib
@@ -3,7 +3,7 @@ EESchema-LIBRARY Version 2.4
 #
 # 40PC015G
 #
-DEF 40PC015G U 0 40 Y Y 1 F N
+DEF 40PC015G U 0 20 Y Y 1 F N
 F0 "U" -400 250 50 H V L CNN
 F1 "40PC015G" 250 250 50 H V C CNN
 F2 "" 100 0 50 H I C CNN
@@ -18,9 +18,9 @@ P 4 0 1 10 -180 110 -190 70 -220 100 -180 110 F
 X Vcc 1 0 300 100 D 50 50 1 1 W
 X GND 2 0 -300 100 U 50 50 1 1 W
 X Vout 3 400 0 100 L 50 50 1 1 O
-X NC 4 -300 -300 100 U 50 50 1 1 N N
-X NC 5 -200 -300 100 U 50 50 1 1 N N
-X NC 6 -100 -300 100 U 50 50 1 1 N N
+X NC 4 -300 -200 100 U 50 50 1 1 N N
+X NC 5 -200 -200 100 U 50 50 1 1 N N
+X NC 6 -100 -200 100 U 50 50 1 1 N N
 ENDDRAW
 ENDDEF
 #
@@ -74,7 +74,7 @@ ENDDEF
 #
 # MPL115A1
 #
-DEF MPL115A1 U 0 40 Y Y 1 F N
+DEF MPL115A1 U 0 20 Y Y 1 F N
 F0 "U" -250 450 50 H V C CNN
 F1 "MPL115A1" 300 450 50 H V C CNN
 F2 "Package_LGA:NXP_MPL115A1_LGA-8_3x5mm_P1.25mm" 150 -700 50 H I C CNN
@@ -97,7 +97,7 @@ ENDDEF
 #
 # MPXA6115A
 #
-DEF MPXA6115A U 0 40 Y Y 1 F N
+DEF MPXA6115A U 0 20 Y Y 1 F N
 F0 "U" -400 250 50 H V L CNN
 F1 "MPXA6115A" 50 250 50 H V L CNN
 F2 "" -500 -350 50 H I C CNN
@@ -109,14 +109,14 @@ S 300 200 -400 -200 0 1 10 f
 P 2 0 1 10 -280 10 -180 110 N
 P 2 0 1 20 -230 -50 -230 -150 N
 P 4 0 1 10 -180 110 -190 70 -220 100 -180 110 F
-X NC 1 200 -300 100 U 50 50 1 1 N N
+X NC 1 200 -200 100 U 50 50 1 1 N N
 X Vcc 2 0 300 100 D 50 50 1 1 W
 X GND 3 0 -300 100 U 50 50 1 1 W
 X Vout 4 400 0 100 L 50 50 1 1 O
-X NC 5 -300 -300 100 U 50 50 1 1 N N
-X NC 6 -200 -300 100 U 50 50 1 1 N N
-X NC 7 -100 -300 100 U 50 50 1 1 N N
-X NC 8 100 -300 100 U 50 50 1 1 N N
+X NC 5 -300 -200 100 U 50 50 1 1 N N
+X NC 6 -200 -200 100 U 50 50 1 1 N N
+X NC 7 -100 -200 100 U 50 50 1 1 N N
+X NC 8 100 -200 100 U 50 50 1 1 N N
 ENDDRAW
 ENDDEF
 #

From 4f7b23da64b1819fc2c6f5e905e389a463f4a4b0 Mon Sep 17 00:00:00 2001
From: atari91 <48831968+atari91@users.noreply.github.com>
Date: Wed, 1 May 2019 18:23:08 +0200
Subject: [PATCH 201/201] New symbols: STTH212S and STTH212U (#1800)

* New symbols: STTH212S and STTH212U (different footprint)

* STTH212U is now an alias of S2JTR

* STTH212U is now an alias of S2JTR
---
 Diode.dcm | 12 ++++++++++++
 Diode.lib | 20 ++++++++++++++++++++
 2 files changed, 32 insertions(+)

diff --git a/Diode.dcm b/Diode.dcm
index 446b2b7203..e0f7a3f671 100644
--- a/Diode.dcm
+++ b/Diode.dcm
@@ -1584,6 +1584,18 @@ K zener diode
 F https://diotec.com/tl_files/diotec/files/pdf/datasheets/smz1.pdf
 $ENDCMP
 #
+$CMP STTH212S
+D 1200V 2A High Voltage Ultrafast Diode, SMC
+K diode
+F https://www.st.com/resource/en/datasheet/stth212.pdf
+$ENDCMP
+#
+$CMP STTH212U
+D 1200V 2A High Voltage Ultrafast Diode, SMB
+K diode
+F https://www.st.com/resource/en/datasheet/stth212.pdf
+$ENDCMP
+#
 $CMP Toshiba_HN1D01FU
 D Ultra High Speed Switching Diode Array 2 pair Com A
 K diode
diff --git a/Diode.lib b/Diode.lib
index 75d113c58d..d849661d85 100644
--- a/Diode.lib
+++ b/Diode.lib
@@ -1375,6 +1375,7 @@ F0 "D" 0 100 50 H V C CNN
 F1 "S2JTR" 0 -100 50 H V C CNN
 F2 "Diode_SMD:D_SMB" 0 -175 50 H I C CNN
 F3 "" 0 0 50 H I C CNN
+ALIAS STTH212U
 $FPLIST
  *D?SMB*
 $ENDFPLIST
@@ -1450,6 +1451,25 @@ X A 2 150 0 100 L 50 50 1 1 P
 ENDDRAW
 ENDDEF
 #
+# STTH212S
+#
+DEF STTH212S D 0 40 N N 1 F N
+F0 "D" 0 100 50 H V C CNN
+F1 "STTH212S" 0 -100 50 H V C CNN
+F2 "Diode_SMD:D_SMC" 0 -175 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ D?SMC*
+$ENDFPLIST
+DRAW
+P 2 0 1 8 -50 50 -50 -50 N
+P 2 0 1 0 50 0 -50 0 N
+P 4 0 1 8 50 50 50 -50 -50 0 50 50 N
+X K 1 -150 0 100 R 50 50 1 1 P
+X A 2 150 0 100 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
 # Z1SMAxxx
 #
 DEF Z1SMAxxx D 0 40 N N 1 F N