ehci_bar: 0xfef00000 debug_offset 0xa0
debug_port: 2
n_ports:    8
PORTSC #1: 00003000
PORTSC #2: 00003000
PORTSC #3: 00003000
PORTSC #4: 00003000
PORTSC #5: 00003000
PORTSC #6: 00003000
PORTSC #7: 00003000
PORTSC #8: 00003000
EHCI controller reset successfully.
EHCI started.
No device found in debug port 2
debug_port: 2
n_ports:    8
PORTSC #1: 00001803
PORTSC #2: 00001000
PORTSC #3: 00001000
PORTSC #4: 00001000
PORTSC #5: 00001000
PORTSC #6: 00001000
PORTSC #7: 00001000
PORTSC #8: 00001000
debug_port: 2
n_ports:    8
PORTSC #1: 00001803
PORTSC #2: 00001000
PORTSC #3: 00001000
PORTSC #4: 00001000
PORTSC #5: 00001000
PORTSC #6: 00001000
PORTSC #7: 00001000
PORTSC #8: 00001000
EHCI controller halted successfully.
EHCI controller reset successfully.
EHCI started.
No device found in debug port 2
debug_port: 2
n_ports:    8
PORTSC #1: 00001803
PORTSC #2: 00001000
PORTSC #3: 00001000
PORTSC #4: 00001000
PORTSC #5: 00001000
PORTSC #6: 00001000
PORTSC #7: 00001000
PORTSC #8: 00001000
debug_port: 2
n_ports:    8
PORTSC #1: 00001803
PORTSC #2: 00001000
PORTSC #3: 00001000
PORTSC #4: 00001000
PORTSC #5: 00001000
PORTSC #6: 00001000
PORTSC #7: 00001000
PORTSC #8: 00001000
EHCI controller halted successfully.
EHCI controller reset successfully.
EHCI started.
No device found in debug port 2
debug_port: 2
n_ports:    8
PORTSC #1: 00001803
PORTSC #2: 00001000
PORTSC #3: 00001000
PORTSC #4: 00001000
PORTSC #5: 00001000
PORTSC #6: 00001000
PORTSC #7: 00001000
PORTSC #8: 00001000


coreboot-4.5-1323-g6a1503e Thu Mar 16 15:25:40 UTC 2017 romstage starting...
Setting up static southbridge registers... done.
Disabling Watchdog reboot... done.
Setting up static northbridge registers... done.
Initializing Graphics...
Back from sandybridge_early_initialization()
SMBus controller enabled.
CPU id(206a7): Intel(R) Celeron(R) CPU 847 @ 1.10GHz
AES NOT supported, TXT NOT supported, VT supported
PCH type: NM70, device id: 1e5f, rev id 4
Intel ME early init
Intel ME firmware is ready
ME: Requested 16MB UMA
Starting native Platform init
CBFS: 'Master Header Locator' located CBFS at [200100:7fffc0)
CBFS: Locating 'mrc.cache'
CBFS: Found @ offset 1fec0 size 10000
find_current_mrc_cache_local: No valid MRC cache found.
  Row    addr bits  : 15
  Column addr bits  : 10
  Number of ranks   : 2
  DIMM Capacity     : 4096 MB
  CAS latencies     : 5 6 7 8 9 10
  tCKmin            :   1.250 ns
  tAAmin            :  13.125 ns
  tWRmin            :  15.000 ns
  tRCDmin           :  13.125 ns
  tRRDmin           :   6.000 ns
  tRPmin            :  13.125 ns
  tRASmin           :  36.000 ns
  tRCmin            :  49.125 ns
  tRFCmin           : 160.000 ns
  tWTRmin           :   7.500 ns
  tRTPmin           :   7.500 ns
  tFAWmin           :  30.000 ns
channel[0] rankmap = 0x3
Starting RAM training (0).
PLL busy... done in 10 us
MCU frequency is set at : 666 MHz
Selected DRAM frequency: 666 MHz
Minimum  CAS latency   : 9T
Selected CAS latency   : 9T
Selected CWL latency   :

*** Log truncated, 3079 characters dropped. ***

Relocate MRC DATA from fefff9fc to 7ffdc000 (1440 bytes)
CBMEM entry for DIMM info: 0x7fffe880
MTRR Range: Start=ff800000 End=0 (Size 800000)
MTRR Range: Start=0 End=1000000 (Size 1000000)
MTRR Range: Start=7f800000 End=80000000 (Size 800000)
MTRR Range: Start=80000000 End=80800000 (Size 800000)
CBFS: 'Master Header Locator' located CBFS at [200100:7fffc0)
CBFS: Locating 'fallback/ramstage'
CBFS: Found @ offset 2ff00 size 12a4f
Decompressing stage fallback/ramstage @ 0x7ff9efc0 (227632 bytes)
Loading module at 7ff9f000 with entry 7ff9f000. filesize: 0x26638 memsize: 0x378f0
Processing 2477 relocs. Offset value of 0x7fe9f000
Capability: type 0x01 @ 0x50
Capability: type 0x0a @ 0x58
ehci_bar: 0xfef00000 debug_offset 0xa0
debug_port: 2
n_ports:    8
PORTSC #1: 00001803
PORTSC #2: 00001000
PORTSC #3: 00001000
PORTSC #4: 00001000
PORTSC #5: 00001000
PORTSC #6: 00001000
PORTSC #7: 00001000
PORTSC #8: 00001000
EHCI controller halted successfully.
EHCI controller reset successfully.
EHCI started.
No device found in debug port 2
debug_port: 2
n_ports:    8
PORTSC #1: 00001803
PORTSC #2: 00001000
PORTSC #3: 00001000
PORTSC #4: 00001000
PORTSC #5: 00001000
PORTSC #6: 00001000
PORTSC #7: 00001000
PORTSC #8: 00001000
debug_port: 2
n_ports:    8
PORTSC #1: 00001803
PORTSC #2: 00001000
PORTSC #3: 00001000
PORTSC #4: 00001000
PORTSC #5: 00001000
PORTSC #6: 00001000
PORTSC #7: 00001000
PORTSC #8: 00001000
EHCI controller halted successfully.
EHCI controller reset successfully.
EHCI started.
No device found in debug port 2
debug_port: 2
n_ports:    8
PORTSC #1

*** Log truncated, 725 characters dropped. ***

Normal boot.
BS: BS_PRE_DEVICE times (us): entry 0 run 0 exit 0
BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 0 exit 1
Enumerating buses...
Show all devs... Before device enumeration.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 0
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.0: enabled 0
PCI: 00:1c.1: enabled 1
PCI: 00:1c.2: enabled 1
PCI: 00:1c.3: enabled 0
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 00ff.1: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 1
Compare with tree...
Root Device: enabled 1
 CPU_CLUSTER: 0: enabled 1
  APIC: 00: enabled 1
  APIC: acac: enabled 0
 DOMAIN: 0000: enabled 1
  PCI: 00:00.0: enabled 1
  PCI: 00:02.0: enabled 1
  PCI: 00:16.0: enabled 1
  PCI: 00:16.1: enabled 0
  PCI: 00:16.2: enabled 0
  PCI: 00:16.3: enabled 0
  PCI: 00:19.0: enabled 0
  PCI: 00:1a.0: enabled 1
  PCI: 00:1b.0: enabled 1
  PCI: 00:1c.0: enabled 0
  PCI: 00:1c.1: enabled 1
  PCI: 00:1c.2: enabled 1
  PCI: 00:1c.3: enabled 0
  PCI: 00:1c.4: enabled 0
  PCI: 00:1c.5: enabled 0
  PCI: 00:1c.6: enabled 0
  PCI: 00:1c.7: enabled 0
  PCI: 00:1d.0: enabled 1
  PCI: 00:1e.0: enabled 0
  PCI: 00:1f.0: enabled 1
   PNP: 00ff.1: enabled 1
  PCI: 00:1f.2: enabled 1
  PCI: 00:1f.3: enabled 1
  PCI: 00:1f.5: enabled 0
  PCI: 00:1f.6: enabled 1
Root Device scanning...
root_dev_scan_bus for Root Device
CPU_CLUSTER: 0 enabled
DOMAIN: 0000 enabled
DOMAIN: 0000 scanning...
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/0104] ops
PCI: 00:00.0 [8086/0104] enabled
Capability: type 0x0d @ 0x88
Capability: type 0x01 @ 0x80
Capability: type 0x05 @ 0x90
Capability: type 0x10 @ 0xa0
Capability: type 0x0d @ 0x88
Capability: type 0x01 @ 0x80
Capability: type 0x05 @ 0x90
Capability: type 0x10 @ 0xa0
PCI: 00:01.0 subordinate bus PCI Express
PCI: 00:01.0 [8086/0101] enabled
PCI: 00:02.0 [8086/0000] ops
PCI: 00:02.0 [8086/0106] enabled
PCI: 00:04.0 [8086/0103] enabled
PCI: 00:16.0 [8086/1e3a] ops
PCI: 00:16.0 [8086/1e3a] enabled
PCI: 00:16.1: Disabling device
PCI: 00:16.1 [8086/1e3b] disabled No operations
PCI: 00:16.2: Disabling device
PCI: 00:16.3: Disabling device
PCI: 00:19.0: Disabling device
PCI: 00:1a.0 [8086/0000] ops
PCI: 00:1a.0 [8086/1e2d] enabled
PCI: 00:1b.0 [8086/0000] ops
PCI: 00:1b.0 [8086/1e20] enabled
PCH: PCIe Root Port coalescing is enabled
PCI: 00:1c.0: Disabling device
PCI: 00:1c.0: check set enabled
PCH: Remap PCIe function 1 to 0
PCI: 00:1c.1 [8086/0000] bus ops
PCI: 00:1c.1 [8086/1e12] enabled
PCH: Remap PCIe function 2 to 0
PCI: 00:1c.2 [8086/0000] bus ops
PCI: 00:1c.2 [8086/1e14] enabled
PCI: 00:1c.3: Disabling device
PCI: 00:1c.4: Disabling device
PCI: 00:1c.4: check set enabled
PCI: 00:1c.5: Disabling device
PCI: 00:1c.6: Disabling device
PCI: 00:1c.7: Disabling device
PCH: RPFN 0x76543210 -> 0xfedcb10a
PCH: PCIe map 1c.0 -> 1c.2
PCH: PCIe map 1c.1 -> 1c.0
PCH: PCIe map 1c.2 -> 1c.1
PCI: 00:1d.0 [8086/0000] ops
PCI: 00:1d.0 [8086/1e26] enabled
PCI: 00:1e.0: Disabling device
PCI: 00:1f.0 [8086/0000] bus ops
PCI: 00:1f.0 [8086/1e5f] enabled
PCI: 00:1f.2 [8086/0000] ops
PCI: 00:1f.2 [8086/1e01] enabled
PCI: 00:1f.3 [8086/0000] bus ops
PCI: 00:1f.3 [8086/1e22] enabled
PCI: 00:1f.5: Disabling device
PCI: 00:1f.5 [8086/1e09] disabled No operations
PCI: 00:1f.6 [8086/1e24] enabled
PCI: 00:01.0 scanning...
do_pci_scan_bridge for PCI: 00:01.0
PCI: pci_scan_bus for bus 01
scan_bus: scanning of bus PCI: 00:01.0 took 18 usecs
PCI: 00:1c.0 scanning...
do_pci_scan_bridge for PCI: 00:1c.0
PCI: pci_scan_bus for bus 02
PCI: 02:00.0 [168c/0034] enabled
Capability: type 0x01 @ 0x40
Capability: type 0x05 @ 0x50
Capability: type 0x10 @ 0x70
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
scan_bus: scanning of bus PCI: 00:1c.0 took 219 usecs
PCI: 00:1c.1 scanning...
do_pci_scan_bridge for PCI: 00:1c.1
PCI: pci_scan_bus for bus 03
PCI: 03:00.0 [14e4/16b5] enabled
PCI: 03:00.1 [14e4/16bc] enabled
Capability: type 0x01 @ 0x48
Capability: type 0x05 @ 0x58
Capability: type 0x11 @ 0xa0
Capability: type 0x10 @ 0xac
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
Capability: type 0x01 @ 0x48
Capability: type 0x05 @ 0x58
Capability: type 0x10 @ 0xac
Capability: type 0x10 @ 0x40
Enabling Common Clock Configuration
ASPM: Enabled L0s and L1
scan_bus: scanning of bus PCI: 00:1c.1 took 419 usecs
PCI: 00:1f.0 scanning...
scan_lpc_bus for PCI: 00:1f.0
PNP: 00ff.1 enabled
PNP: 00ff.0 enabled
scan_lpc_bus for PCI: 00:1f.0 done
scan_bus: scanning of bus PCI: 00:1f.0 took 16 usecs
PCI: 00:1f.3 scanning...
scan_generic_bus for PCI: 00:1f.3
scan_generic_bus for PCI: 00:1f.3 done
scan_bus: scanning of bus PCI: 00:1f.3 took 10 usecs
scan_bus: scanning of bus DOMAIN: 0000 took 1110 usecs
root_dev_scan_bus for Root Device done
scan_bus: scanning of bus Root Device took 1129 usecs
done
BS: BS_DEV_ENUMERATE times (us): entry 0 run 1323 exit 0
found VGA at PCI: 00:02.0
Setting up VGA for PCI: 00:02.0
Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
Allocating resources...
Reading resources...
Root Device read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0
CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0
Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000.
PCI: 00:01.0 read_resources bus 1 link: 0
PCI: 00:01.0 read_resources bus 1 link: 0 done
More than one caller of pci_ehci_read_resources from PCI: 00:1a.0
PCI: 00:1c.0 read_resources bus 2 link: 0
PCI: 00:1c.0 read_resources bus 2 link: 0 done
PCI: 00:1c.1 read_resources bus 3 link: 0
PCI: 00:1c.1 read_resources bus 3 link: 0 done
PCI: 00:1d.0 EHCI BAR hook registered
PCI: 00:1f.0 read_resources bus 0 link: 0
PNP: 00ff.1 missing read_resources
PCI: 00:1f.0 read_resources bus 0 link: 0 done
DOMAIN: 0000 read_resources bus 0 link: 0 done
Root Device read_resources bus 0 link: 0 done
Done reading resources.
Show resources in subtree (Root Device)...After reading.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: acac
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
   PCI: 00:00.0
   PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
   PCI: 00:01.0
   PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
   PCI: 00:02.0
   PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10
   PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
   PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
   PCI: 00:04.0
   PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10
   PCI: 00:16.0
   PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10
   PCI: 00:16.1
   PCI: 00:16.2
   PCI: 00:16.3
   PCI: 00:19.0
   PCI: 00:1a.0
   PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
   PCI: 00:1b.0
   PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1c.2
   PCI: 00:1c.0 child on link 0 PCI: 02:00.0
   PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 02:00.0
    PCI: 02:00.0 resource base 0 size 80000 align 19 gran 19 limit ffffffffffffffff flags 201 index 10
    PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30
   PCI: 00:1c.1 child on link 0 PCI: 03:00.0
   PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
   PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
   PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
    PCI: 03:00.0
    PCI: 03:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 1201 index 10
    PCI: 03:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 1201 index 18
    PCI: 03:00.0 resource base 0 size 800 align 11 gran 11 limit ffffffff flags 2200 index 30
    PCI: 03:00.1
    PCI: 03:00.1 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 1201 index 10
   PCI: 00:1c.3
   PCI: 00:1c.4
   PCI: 00:1c.5
   PCI: 00:1c.6
   PCI: 00:1c.7
   PCI: 00:1d.0
   PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10
   PCI: 00:1e.0
   PCI: 00:1f.0 child on link 0 PNP: 00ff.1
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
   PCI: 00:1f.0 resource base fd60 size 4 align 0 gran 0 limit 0 flags c0040100 index 10000200
    PNP: 00ff.1
    PNP: 00ff.0
   PCI: 00:1f.2
   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
   PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
   PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
   PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
   PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
   PCI: 00:1f.3
   PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
   PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
   PCI: 00:1f.5
   PCI: 00:1f.6
   PCI: 00:1f.6 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:01.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
PCI: 00:02.0 20 *  [0x0 - 0x3f] io
PCI: 00:1f.2 20 *  [0x40 - 0x5f] io
PCI: 00:1f.2 10 *  [0x60 - 0x67] io
PCI: 00:1f.2 18 *  [0x68 - 0x6f] io
PCI: 00:1f.2 14 *  [0x70 - 0x73] io
PCI: 00:1f.2 1c *  [0x74 - 0x77] io
DOMAIN: 0000 io: base: 78 size: 78 align: 6 gran: 0 limit: ffff done
DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:01.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 00:01.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 02:00.0 10 *  [0x0 - 0x7ffff] mem
PCI: 02:00.0 30 *  [0x80000 - 0x8ffff] mem
PCI: 00:1c.0 mem: base: 90000 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
PCI: 03:00.0 10 *  [0x0 - 0xffff] prefmem
PCI: 03:00.0 18 *  [0x10000 - 0x1ffff] prefmem
PCI: 03:00.1 10 *  [0x20000 - 0x2ffff] prefmem
PCI: 00:1c.1 prefmem: base: 30000 size: 100000 align: 20 gran: 20 limit: ffffffffffffffff done
PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
PCI: 03:00.0 30 *  [0x0 - 0x7ff] mem
PCI: 00:1c.1 mem: base: 800 size: 100000 align: 20 gran: 20 limit: ffffffff done
PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
PCI: 00:02.0 10 *  [0x10000000 - 0x103fffff] mem
PCI: 00:1c.0 20 *  [0x10400000 - 0x104fffff] mem
PCI: 00:1c.1 24 *  [0x10500000 - 0x105fffff] prefmem
PCI: 00:1c.1 20 *  [0x10600000 - 0x106fffff] mem
PCI: 00:04.0 10 *  [0x10700000 - 0x10707fff] mem
PCI: 00:1b.0 10 *  [0x10708000 - 0x1070bfff] mem
PCI: 00:1f.6 10 *  [0x1070c000 - 0x1070cfff] mem
PCI: 00:1f.2 24 *  [0x1070d000 - 0x1070d7ff] mem
PCI: 00:1a.0 10 *  [0x1070e000 - 0x1070e3ff] mem
PCI: 00:1d.0 10 *  [0x1070f000 - 0x1070f3ff] mem
PCI: 00:1f.3 10 *  [0x10710000 - 0x107100ff] mem
PCI: 00:16.0 10 *  [0x10711000 - 0x1071100f] mem
DOMAIN: 0000 mem: base: 10711010 size: 10711010 align: 28 gran: 0 limit: ffffffff done
avoid_fixed_resources: DOMAIN: 0000
avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
constrain_resources: PCI: 00:00.0 60 base f8000000 limit fbffffff mem (fixed)
constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed)
constrain_resources: PCI: 00:1f.0 10000200 base 0000fd60 limit 0000fd63 io (fixed)
avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001000 limit 0000fd5f
avoid_fixed_resources:@DOMAIN: 0000 10000100 base e0000000 limit f7ffffff
Setting resources...
DOMAIN: 0000 io: base:1000 size:78 align:6 gran:0 limit:fd5f
PCI: 00:02.0 20 *  [0x1000 - 0x103f] io
PCI: 00:1f.2 20 *  [0x1040 - 0x105f] io
PCI: 00:1f.2 10 *  [0x1060 - 0x1067] io
PCI: 00:1f.2 18 *  [0x1068 - 0x106f] io
PCI: 00:1f.2 14 *  [0x1070 - 0x1073] io
PCI: 00:1f.2 1c *  [0x1074 - 0x1077] io
DOMAIN: 0000 io: next_base: 1078 size: 78 align: 6 gran: 0 done
PCI: 00:01.0 io: base:fd5f size:0 align:12 gran:12 limit:fd5f
PCI: 00:01.0 io: next_base: fd5f size: 0 align: 12 gran: 12 done
PCI: 00:1c.0 io: base:fd5f size:0 align:12 gran:12 limit:fd5f
PCI: 00:1c.0 io: next_base: fd5f size: 0 align: 12 gran: 12 done
PCI: 00:1c.1 io: base:fd5f size:0 align:12 gran:12 limit:fd5f
PCI: 00:1c.1 io: next_base: fd5f size: 0 align: 12 gran: 12 done
DOMAIN: 0000 mem: base:e0000000 size:10711010 align:28 gran:0 limit:f7ffffff
PCI: 00:02.0 18 *  [0xe0000000 - 0xefffffff] prefmem
PCI: 00:02.0 10 *  [0xf0000000 - 0xf03fffff] mem
PCI: 00:1c.0 20 *  [0xf0400000 - 0xf04fffff] mem
PCI: 00:1c.1 24 *  [0xf0500000 - 0xf05fffff] prefmem
PCI: 00:1c.1 20 *  [0xf0600000 - 0xf06fffff] mem
PCI: 00:04.0 10 *  [0xf0700000 - 0xf0707fff] mem
PCI: 00:1b.0 10 *  [0xf0708000 - 0xf070bfff] mem
PCI: 00:1f.6 10 *  [0xf070c000 - 0xf070cfff] mem
PCI: 00:1f.2 24 *  [0xf070d000 - 0xf070d7ff] mem
PCI: 00:1a.0 10 *  [0xf070e000 - 0xf070e3ff] mem
PCI: 00:1d.0 10 *  [0xf070f000 - 0xf070f3ff] mem
PCI: 00:1f.3 10 *  [0xf0710000 - 0xf07100ff] mem
PCI: 00:16.0 10 *  [0xf0711000 - 0xf071100f] mem
DOMAIN: 0000 mem: next_base: f0711010 size: 10711010 align: 28 gran: 0 done
PCI: 00:01.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:01.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:01.0 mem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:01.0 mem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.0 prefmem: base:f7ffffff size:0 align:20 gran:20 limit:f7ffffff
PCI: 00:1c.0 prefmem: next_base: f7ffffff size: 0 align: 20 gran: 20 done
PCI: 00:1c.0 mem: base:f0400000 size:100000 align:20 gran:20 limit:f04fffff
PCI: 02:00.0 10 *  [0xf0400000 - 0xf047ffff] mem
PCI: 02:00.0 30 *  [0xf0480000 - 0xf048ffff] mem
PCI: 00:1c.0 mem: next_base: f0490000 size: 100000 align: 20 gran: 20 done
PCI: 00:1c.1 prefmem: base:f0500000 size:100000 align:20 gran:20 limit:f05fffff
PCI: 03:00.0 10 *  [0xf0500000 - 0xf050ffff] prefmem
PCI: 03:00.0 18 *  [0xf0510000 - 0xf051ffff] prefmem
PCI: 03:00.1 10 *  [0xf0520000 - 0xf052ffff] prefmem
PCI: 00:1c.1 prefmem: next_base: f0530000 size: 100000 align: 20 gran: 20 done
PCI: 00:1c.1 mem: base:f0600000 size:100000 align:20 gran:20 limit:f06fffff
PCI: 03:00.0 30 *  [0xf0600000 - 0xf06007ff] mem
PCI: 00:1c.1 mem: next_base: f0600800 size: 100000 align: 20 gran: 20 done
Root Device assign_resources, bus 0 link: 0
TOUUD 0x17c600000 TOLUD 0x82a00000 TOM 0x100000000
MEBASE 0xff000000
IGD decoded, subtracting 32M UMA and 2M GTT
TSEG base 0x80000000 size 8M
Available memory below 4GB: 2048M
Available memory above 4GB: 1990M
DOMAIN: 0000 assign_resources, bus 0 link: 0
PCI: 00:01.0 1c <- [0x000000fd5f - 0x000000fd5e] size 0x00000000 gran 0x0c bus 01 io
PCI: 00:01.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 prefmem
PCI: 00:01.0 20 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 01 mem
PCI: 00:02.0 10 <- [0x00f0000000 - 0x00f03fffff] size 0x00400000 gran 0x16 mem64
PCI: 00:02.0 18 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem64
PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
PCI: 00:04.0 10 <- [0x00f0700000 - 0x00f0707fff] size 0x00008000 gran 0x0f mem64
PCI: 00:16.0 10 <- [0x00f0711000 - 0x00f071100f] size 0x00000010 gran 0x04 mem64
PCI: 00:1a.0 10 <- [0x00f070e000 - 0x00f070e3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1b.0 10 <- [0x00f0708000 - 0x00f070bfff] size 0x00004000 gran 0x0e mem64
PCI: 00:1c.0 1c <- [0x000000fd5f - 0x000000fd5e] size 0x00000000 gran 0x0c bus 02 io
PCI: 00:1c.0 24 <- [0x00f7ffffff - 0x00f7fffffe] size 0x00000000 gran 0x14 bus 02 prefmem
PCI: 00:1c.0 20 <- [0x00f0400000 - 0x00f04fffff] size 0x00100000 gran 0x14 bus 02 mem
PCI: 00:1c.0 assign_resources, bus 2 link: 0
PCI: 02:00.0 10 <- [0x00f0400000 - 0x00f047ffff] size 0x00080000 gran 0x13 mem64
PCI: 02:00.0 30 <- [0x00f0480000 - 0x00f048ffff] size 0x00010000 gran 0x10 romem
PCI: 00:1c.0 assign_resources, bus 2 link: 0
PCI: 00:1c.1 1c <- [0x000000fd5f - 0x000000fd5e] size 0x00000000 gran 0x0c bus 03 io
PCI: 00:1c.1 24 <- [0x00f0500000 - 0x00f05fffff] size 0x00100000 gran 0x14 bus 03 prefmem
PCI: 00:1c.1 20 <- [0x00f0600000 - 0x00f06fffff] size 0x00100000 gran 0x14 bus 03 mem
PCI: 00:1c.1 assign_resources, bus 3 link: 0
PCI: 03:00.0 10 <- [0x00f0500000 - 0x00f050ffff] size 0x00010000 gran 0x10 prefmem64
PCI: 03:00.0 18 <- [0x00f0510000 - 0x00f051ffff] size 0x00010000 gran 0x10 prefmem64
PCI: 03:00.0 30 <- [0x00f0600000 - 0x00f06007ff] size 0x00000800 gran 0x0b romem
PCI: 03:00.1 10 <- [0x00f0520000 - 0x00f052ffff] size 0x00010000 gran 0x10 prefmem64
PCI: 00:1c.1 assign_resources, bus 3 link: 0
PCI: 00:1d.0 EHCI Debug Port hook triggered
PCI: 00:1d.0 10 <- [0x00f070f000 - 0x00f070f3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1d.0 10 <- [0x00f070f000 - 0x00f070f3ff] size 0x00000400 gran 0x0a mem
PCI: 00:1d.0 EHCI Debug Port relocated
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.0 assign_resources, bus 0 link: 0
PCI: 00:1f.2 10 <- [0x0000001060 - 0x0000001067] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 14 <- [0x0000001070 - 0x0000001073] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 18 <- [0x0000001068 - 0x000000106f] size 0x00000008 gran 0x03 io
PCI: 00:1f.2 1c <- [0x0000001074 - 0x0000001077] size 0x00000004 gran 0x02 io
PCI: 00:1f.2 20 <- [0x0000001040 - 0x000000105f] size 0x00000020 gran 0x05 io
PCI: 00:1f.2 24 <- [0x00f070d000 - 0x00f070d7ff] size 0x00000800 gran 0x0b mem
PCI: 00:1f.3 10 <- [0x00f0710000 - 0x00f07100ff] size 0x00000100 gran 0x08 mem64
PCI: 00:1f.6 10 <- [0x00f070c000 - 0x00f070cfff] size 0x00001000 gran 0x0c mem64
DOMAIN: 0000 assign_resources, bus 0 link: 0
Root Device assign_resources, bus 0 link: 0
Done setting resources.
Show resources in subtree (Root Device)...After assigning values.
 Root Device child on link 0 CPU_CLUSTER: 0
  CPU_CLUSTER: 0 child on link 0 APIC: 00
   APIC: 00
   APIC: acac
  DOMAIN: 0000 child on link 0 PCI: 00:00.0
  DOMAIN: 0000 resource base 1000 size 78 align 6 gran 0 limit fd5f flags 40040100 index 10000000
  DOMAIN: 0000 resource base e0000000 size 10711010 align 28 gran 0 limit f7ffffff flags 40040200 index 10000100
  DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3
  DOMAIN: 0000 resource base 100000 size 7ff00000 align 0 gran 0 limit 0 flags e0004200 index 4
  DOMAIN: 0000 resource base 100000000 size 7c600000 align 0 gran 0 limit 0 flags e0004200 index 5
  DOMAIN: 0000 resource base 80000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6
  DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7
  DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8
  DOMAIN: 0000 resource base 20000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index 9
  DOMAIN: 0000 resource base 40000000 size 200000 align 0 gran 0 limit 0 flags f0004200 index a
   PCI: 00:00.0
   PCI: 00:00.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60
   PCI: 00:01.0
   PCI: 00:01.0 resource base fd5f size 0 align 12 gran 12 limit fd5f flags 60080102 index 1c
   PCI: 00:01.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
   PCI: 00:01.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60080202 index 20
   PCI: 00:02.0
   PCI: 00:02.0 resource base f0000000 size 400000 align 22 gran 22 limit f03fffff flags 60000201 index 10
   PCI: 00:02.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 18
   PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
   PCI: 00:04.0
   PCI: 00:04.0 resource base f0700000 size 8000 align 15 gran 15 limit f0707fff flags 60000201 index 10
   PCI: 00:16.0
   PCI: 00:16.0 resource base f0711000 size 10 align 12 gran 4 limit f071100f flags 60000201 index 10
   PCI: 00:16.1
   PCI: 00:16.2
   PCI: 00:16.3
   PCI: 00:19.0
   PCI: 00:1a.0
   PCI: 00:1a.0 resource base f070e000 size 400 align 12 gran 10 limit f070e3ff flags 60000200 index 10
   PCI: 00:1b.0
   PCI: 00:1b.0 resource base f0708000 size 4000 align 14 gran 14 limit f070bfff flags 60000201 index 10
   PCI: 00:1c.2
   PCI: 00:1c.0 child on link 0 PCI: 02:00.0
   PCI: 00:1c.0 resource base fd5f size 0 align 12 gran 12 limit fd5f flags 60080102 index 1c
   PCI: 00:1c.0 resource base f7ffffff size 0 align 20 gran 20 limit f7ffffff flags 60081202 index 24
   PCI: 00:1c.0 resource base f0400000 size 100000 align 20 gran 20 limit f04fffff flags 60080202 index 20
    PCI: 02:00.0
    PCI: 02:00.0 resource base f0400000 size 80000 align 19 gran 19 limit f047ffff flags 60000201 index 10
    PCI: 02:00.0 resource base f0480000 size 10000 align 16 gran 16 limit f048ffff flags 60002200 index 30
   PCI: 00:1c.1 child on link 0 PCI: 03:00.0
   PCI: 00:1c.1 resource base fd5f size 0 align 12 gran 12 limit fd5f flags 60080102 index 1c
   PCI: 00:1c.1 resource base f0500000 size 100000 align 20 gran 20 limit f05fffff flags 60081202 index 24
   PCI: 00:1c.1 resource base f0600000 size 100000 align 20 gran 20 limit f06fffff flags 60080202 index 20
    PCI: 03:00.0
    PCI: 03:00.0 resource base f0500000 size 10000 align 16 gran 16 limit f050ffff flags 60001201 index 10
    PCI: 03:00.0 resource base f0510000 size 10000 align 16 gran 16 limit f051ffff flags 60001201 index 18
    PCI: 03:00.0 resource base f0600000 size 800 align 11 gran 11 limit f06007ff flags 60002200 index 30
    PCI: 03:00.1
    PCI: 03:00.1 resource base f0520000 size 10000 align 16 gran 16 limit f052ffff flags 60001201 index 10
   PCI: 00:1c.3
   PCI: 00:1c.4
   PCI: 00:1c.5
   PCI: 00:1c.6
   PCI: 00:1c.7
   PCI: 00:1d.0
   PCI: 00:1d.0 resource base f070f000 size 400 align 12 gran 10 limit f070f3ff flags 60000200 index 10
   PCI: 00:1e.0
   PCI: 00:1f.0 child on link 0 PNP: 00ff.1
   PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000
   PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100
   PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3
   PCI: 00:1f.0 resource base fd60 size 4 align 0 gran 0 limit 0 flags c0040100 index 10000200
    PNP: 00ff.1
    PNP: 00ff.0
   PCI: 00:1f.2
   PCI: 00:1f.2 resource base 1060 size 8 align 3 gran 3 limit 1067 flags 60000100 index 10
   PCI: 00:1f.2 resource base 1070 size 4 align 2 gran 2 limit 1073 flags 60000100 index 14
   PCI: 00:1f.2 resource base 1068 size 8 align 3 gran 3 limit 106f flags 60000100 index 18
   PCI: 00:1f.2 resource base 1074 size 4 align 2 gran 2 limit 1077 flags 60000100 index 1c
   PCI: 00:1f.2 resource base 1040 size 20 align 5 gran 5 limit 105f flags 60000100 index 20
   PCI: 00:1f.2 resource base f070d000 size 800 align 12 gran 11 limit f070d7ff flags 60000200 index 24
   PCI: 00:1f.3
   PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20
   PCI: 00:1f.3 resource base f0710000 size 100 align 12 gran 8 limit f07100ff flags 60000201 index 10
   PCI: 00:1f.5
   PCI: 00:1f.6
   PCI: 00:1f.6 resource base f070c000 size 1000 align 12 gran 12 limit f070cfff flags 60000201 index 10
Done allocating resources.
BS: BS_DEV_RESOURCES times (us): entry 0 run 3454 exit 0
Enabling resources...
PCI: 00:00.0 subsystem <- 0000/0000
PCI: 00:00.0 cmd <- 06
PCI: 00:01.0 bridge ctrl <- 0003
PCI: 00:01.0 cmd <- 00
PCI: 00:02.0 subsystem <- 0000/0000
PCI: 00:02.0 cmd <- 03
PCI: 00:04.0 cmd <- 02
PCI: 00:16.0 subsystem <- 0000/0000
PCI: 00:16.0 cmd <- 02
PCI: 00:1a.0 subsystem <- 0000/0000
PCI: 00:1a.0 cmd <- 102
PCI: 00:1b.0 subsystem <- 0000/0000
PCI: 00:1b.0 cmd <- 102
PCI: 00:1c.0 bridge ctrl <- 0003
PCI: 00:1c.0 subsystem <- 0000/0000
PCI: 00:1c.0 cmd <- 106
PCI: 00:1c.1 bridge ctrl <- 0003
PCI: 00:1c.1 subsystem <- 0000/0000
PCI: 00:1c.1 cmd <- 106
PCI: 00:1d.0 subsystem <- 0000/0000
PCI: 00:1d.0 cmd <- 102
pch_decode_init
PCI: 00:1f.0 subsystem <- 0000/0000
PCI: 00:1f.0 cmd <- 107
PCI: 00:1f.2 subsystem <- 0000/0000
PCI: 00:1f.2 cmd <- 03
PCI: 00:1f.3 subsystem <- 0000/0000
PCI: 00:1f.3 cmd <- 103
PCI: 00:1f.6 subsystem <- 0000/0000
PCI: 00:1f.6 cmd <- 02
PCI: 02:00.0 cmd <- 02
PCI: 03:00.0 cmd <- 02
PCI: 03:00.1 cmd <- 06
done.
BS: BS_DEV_ENABLE times (us): entry 0 run 187 exit 0
Initializing devices...
Root Device init ...
Parrot EC Init
  EC version 0.7.1
  EC Project: KZV1V
  Parrot Revision 2
Root Device init finished in 46215 usecs
CPU_CLUSTER: 0 init ...
start_eip=0x00001000, code_size=0x00000031
Setting up SMI for CPU
Loading module at 00038000 with entry 00038000. filesize: 0x160 memsize: 0x160
Processing 10 relocs. Offset value of 0x00038000
SMM Module: stub loaded at 00038000. Will call 7ffb4670(7ffd2860)
Installing SMM handler to 0x80000000
Loading module at 80010000 with entry 8001010a. filesize: 0x1110 memsize: 0x5130
Processing 53 relocs. Offset value of 0x80010000
Loading module at 80008000 with entry 80008000. filesize: 0x160 memsize: 0x160
Processing 10 relocs. Offset value of 0x80008000
SMM Module: placing jmp sequence at 80007c00 rel16 0x03fd
SMM Module: stub loaded at 80008000. Will call 8001010a(00000000)
Initializing southbridge SMI... ... pmbase = 0x0500

SMI_STS: TCO PM1 
PM1_STS: TMROF 
GPE0_STS: GPIO15 GPIO14 GPIO12 GPIO11 GPIO10 GPIO9 GPIO8 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO1 GPIO0 TCO_SCI 
ALT_GP_SMI_STS: GPI15 GPI14 GPI12 GPI11 GPI10 GPI9 GPI8 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0 
TCO_STS: TIMEOUT 
In relocation handler: cpu 0
New SMBASE=0x80000000 IEDBASE=0x80400000 @ 0003fc00
Writing SMRR. base = 0x80000006, mask=0xff800800
  ... raise SMI#
Relocation complete.
Locking SMM.
Initializing CPU #0
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [200100:7fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 13980 size 5800
microcode: sig=0x206a7 pf=0x10 revision=0x29
CPU: Intel(R) Celeron(R) CPU 847 @ 1.10GHz.
MTRR: Physical address space:
0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
0x00000000000c0000 - 0x0000000080000000 size 0x7ff40000 type 6
0x0000000080000000 - 0x00000000e0000000 size 0x60000000 type 0
0x00000000e0000000 - 0x00000000f0000000 size 0x10000000 type 1
0x00000000f0000000 - 0x0000000100000000 size 0x10000000 type 0
0x0000000100000000 - 0x000000017c600000 size 0x7c600000 type 6
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits
MTRR: default type WB/UC MTRR counts: 4/3.
MTRR: UC selected as default type.
MTRR: 0 base 0x0000000000000000 mask 0x0000000f80000000 type 6
MTRR: 1 base 0x00000000e0000000 mask 0x0000000ff0000000 type 1
MTRR: 2 base 0x0000000100000000 mask 0x0000000f00000000 type 6

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local APIC... apic_id: 0x00 done.
VMX is locked, so set_vmx will do nothing
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 1100
Turbo is unavailable
CPU: 0 has 2 cores, 1 threads per core
CPU: 0 has core 2
CPU1: stack_base 7ffcc000, stack_end 7ffccff8
Asserting INIT.
Waiting for send to finish...
+Deasserting INIT.
Waiting for send to finish...
+#startup loops: 2.
Sending STARTUP #1 to 2.
After apic_write.
In relocation handler: cpu 1
Startup point 1.
Waiting for send to finish...
+New SMBASE=0x7ffffc00 IEDBASE=0x80400000 @ 0003fc00
Sending STARTUP #2 to 2.
After apic_write.
Writing SMRR. base = 0x80000006, mask=0xff800800
Startup point 1.
Waiting for send to finish...
+After Startup.
CPU #0 initialized
Waiting for 1 CPUS to stop
Initializing CPU #1
CPU: vendor Intel device 206a7
CPU: family 06, model 2a, stepping 07
Enabling cache
CBFS: 'Master Header Locator' located CBFS at [200100:7fffc0)
CBFS: Locating 'cpu_microcode_blob.bin'
CBFS: Found @ offset 13980 size 5800
microcode: sig=0x206a7 pf=0x10 revision=0x0
microcode: updated to revision 0x29 date=2013-06-12
CPU: Intel(R) Celeron(R) CPU 847 @ 1.10GHz.
MTRR: Fixed MSR 0x250 0x0606060606060606
MTRR: Fixed MSR 0x258 0x0606060606060606
MTRR: Fixed MSR 0x259 0x0000000000000000
MTRR: Fixed MSR 0x268 0x0606060606060606
MTRR: Fixed MSR 0x269 0x0606060606060606
MTRR: Fixed MSR 0x26a 0x0606060606060606
MTRR: Fixed MSR 0x26b 0x0606060606060606
MTRR: Fixed MSR 0x26c 0x0606060606060606
MTRR: Fixed MSR 0x26d 0x0606060606060606
MTRR: Fixed MSR 0x26e 0x0606060606060606
MTRR: Fixed MSR 0x26f 0x0606060606060606
call enable_fixed_mtrr()
CPU physical address size: 36 bits

MTRR check
Fixed MTRRs   : Enabled
Variable MTRRs: Enabled

Setting up local APIC... apic_id: 0x02 done.
VMX is locked, so set_vmx will do nothing
model_x06ax: energy policy set to 6
model_x06ax: frequency set to 1100
CPU #1 initialized
All AP CPUs stopped (4793 loops)
CPU0: stack: 7ffcd000 - 7ffce000, lowest used address 7ffcdaa0, stack used: 1376 bytes
CPU1: stack: 7ffcc000 - 7ffcd000, lowest used address 7ffccc54, stack used: 940 bytes
CPU_CLUSTER: 0 init finished in 68516 usecs
PCI: 00:00.0 init ...
Disabling PEG12.
Disabling PEG11.
Disabling PEG60.
Set BIOS_RESET_CPL
CPU TDP: 17 Watts
PCI: 00:00.0 init finished in 1022 usecs
PCI: 00:02.0 init ...
GT Power Management Init
SNB GT1 Power Meter Weights
GT Power Management Init (post VBIOS)
PCI: 00:02.0 init finished in 394 usecs
PCI: 00:04.0 init ...
PCI: 00:04.0 init finished in 1 usecs
PCI: 00:16.0 init ...
ME: FW Partition Table      : OK
ME: Bringup Loader Failure  : NO
ME: Firmware Init Complete  : YES
ME: Manufacturing Mode      : NO
ME: Boot Options Present    : NO
ME: Update In Progress      : NO
ME: Current Working State   : Normal
ME: Current Operation State : M0 with UMA
ME: Current Operation Mode  : Normal
ME: Error Code              : No Error
ME: Progress Phase          : Host Communication
ME: Power Management Event  : Pseudo-global reset
ME: Progress Phase State    : Host communication established
ME: BIOS path: Normal
ME: Extend SHA-256: ed931a410b99a2c8c57c310a57e40a799876d576bec64a7916a89221ae5c0d31
ME: MBP item header 00020103
ME: MBP item header 00050102
ME: MBP item header 00020501
ME: MBP item header 00020201
ME: MBP item header 02030101
ME: MBP item header 02060301
ME: MBP item header 02090401
ME: mbp read OK after 1 cycles
ME: found version 8.0.13.1502
ME Capability: Full Network manageability                : disabled
ME Capability: Regular Network manageability             : disabled
ME Capability: Manageability                             : disabled
ME Capability: Small business technology                 : disabled
ME Capability: Level III manageability                   : disabled
ME Capability: IntelR Anti-Theft (AT)                    : disabled
ME Capability: IntelR Capability Licensing Service (CLS) :  enabled
ME Capability: IntelR Power Sharing Technology (MPC)     :  enabled
ME Capability: ICC Over Clocking                         :  enabled
ME Capability: Protected Audio Video Path (PAVP)         : disabled
ME Capability: IPV6                                      : disabled
ME Capability: KVM Remote Control (KVM)                  : disabled
ME Capability: Outbreak Containment Heuristic (OCH)      : disabled
ME Capability: Virtual LAN (VLAN)                        :  enabled
ME Capability: TLS                                       : disabled
ME Capability: Wireless LAN (WLAN)                       : disabled
PCI: 00:16.0 init finished in 180 usecs
PCI: 00:1a.0 init ...
EHCI: Setting up controller.. done.
PCI: 00:1a.0 init finished in 16 usecs
PCI: 00:1b.0 init ...
Azalia: base = f0708000
Azalia: codec_mask = 09
Azalia: Initializing codec #3
Azalia: codec viddid: 80862806
Azalia: verb_size: 16
Azalia: verb loaded.
Azalia: Initializing codec #0
Azalia: codec viddid: 10ec0269
Azalia: verb_size: 56
Azalia: verb loaded.
PCI: 00:1b.0 init finished in 5352 usecs
PCI: 00:1c.0 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.0 init finished in 13 usecs
PCI: 00:1c.1 init ...
Initializing PCH PCIe bridge.
PCI: 00:1c.1 init finished in 11 usecs
PCI: 00:1d.0 init ...
EHCI: Setting up controller.. done.
PCI: 00:1d.0 init finished in 17 usecs
PCI: 00:1f.0 init ...
pch: lpc_init
IOAPIC: Initializing IOAPIC at 0xfec00000
IOAPIC: Bootstrap Processor Local APIC = 0x00
IOAPIC: ID = 0x02
IOAPIC: Dumping registers
  reg 0x0000: 0x02000000
  reg 0x0001: 0x00170020
  reg 0x0002: 0x00170020
Set power off after power failure.
NMI sources disabled.
PantherPoint PM init
rtc_failed = 0x0
RTC Init
Enabling BIOS updates outside of SMM... Disabling ACPI via APMC:
done.
pch_spi_init
PCI: 00:1f.0 init finished in 3314 usecs
PCI: 00:1f.2 init ...
SATA: Initializing...
SATA: Controller in AHCI mode.
ABAR: f070d000
PCI: 00:1f.2 init finished in 82 usecs
PCI: 00:1f.3 init ...
PCI: 00:1f.3 init finished in 8 usecs
PCI: 00:1f.6 init ...
PCI: 00:1f.6 init finished in 1 usecs
PCI: 02:00.0 init ...
PCI: 02:00.0 init finished in 2 usecs
PCI: 03:00.0 init ...
PCI: 03:00.0 init finished in 1 usecs
PCI: 03:00.1 init ...
PCI: 03:00.1 init finished in 1 usecs
PNP: 00ff.0 init ...
Compal ENE932: Initializing keyboard.
PNP: 00ff.0 init finished in 4 usecs
Devices initialized
Show all devs... After init.
Root Device: enabled 1
CPU_CLUSTER: 0: enabled 1
APIC: 00: enabled 1
APIC: acac: enabled 0
DOMAIN: 0000: enabled 1
PCI: 00:00.0: enabled 1
PCI: 00:02.0: enabled 1
PCI: 00:16.0: enabled 1
PCI: 00:16.1: enabled 0
PCI: 00:16.2: enabled 0
PCI: 00:16.3: enabled 0
PCI: 00:19.0: enabled 0
PCI: 00:1a.0: enabled 1
PCI: 00:1b.0: enabled 1
PCI: 00:1c.2: enabled 0
PCI: 00:1c.0: enabled 1
PCI: 00:1c.1: enabled 1
PCI: 00:1c.3: enabled 0
PCI: 00:1c.4: enabled 0
PCI: 00:1c.5: enabled 0
PCI: 00:1c.6: enabled 0
PCI: 00:1c.7: enabled 0
PCI: 00:1d.0: enabled 1
PCI: 00:1e.0: enabled 0
PCI: 00:1f.0: enabled 1
PNP: 00ff.1: enabled 1
PCI: 00:1f.2: enabled 1
PCI: 00:1f.3: enabled 1
PCI: 00:1f.5: enabled 0
PCI: 00:1f.6: enabled 1
PCI: 00:01.0: enabled 1
PCI: 00:04.0: enabled 1
PCI: 02:00.0: enabled 1
PCI: 03:00.0: enabled 1
PCI: 03:00.1: enabled 1
PNP: 00ff.0: enabled 1
APIC: 02: enabled 1
BS: BS_DEV_INIT times (us): entry 6 run 125294 exit 0
Finalize devices...
PCI: 00:1f.0 final
Devices finalized
BS: BS_POST_DEVICE times (us): entry 0 run 6 exit 0
BS: BS_OS_RESUME_CHECK times (us): entry 0 run 0 exit 0
Updating MRC cache data.
CBFS: 'Master Header Locator' located CBFS at [200100:7fffc0)
CBFS: Locating 'mrc.cache'
CBFS: Found @ offset 1fec0 size 10000
find_current_mrc_cache_local: No valid MRC cache found.
Manufacturer: ef
SF: Detected W25Q64 with sector size 0x1000, total 0x800000
Need to erase the MRC cache region of 65536 bytes at ffa20000
SF: Successfully erased 65536 bytes @ 0x220000
Finally: write MRC cache update to flash at ffa20000
Successfully wrote MRC cache
CBFS: 'Master Header Locator' located CBFS at [200100:7fffc0)
CBFS: Locating 'fallback/dsdt.aml'
CBFS: Found @ offset 19c80 size 2ff2
CBFS: 'Master Header Locator' located CBFS at [200100:7fffc0)
CBFS: Locating 'fallback/slic'
CBFS: 'fallback/slic' not found.
ACPI: Writing ACPI tables at 7ff3a000.
ACPI:    * FACS
ACPI:    * DSDT
ACPI:    * IGD OpRegion
GET_VBIOS: aa55 8086 0 0 3
 ... VBIOS found at 000c0000
VBT not found!
ACPI:    * FADT
ACPI: added table 1/32, length now 40
ACPI:     * SSDT
Found 1 CPU(s) with 2 core(s) each.
PSS: 1100MHz power 17000 control 0xb00 status 0xb00
PSS: 800MHz power 11938 control 0x800 status 0x800
PSS: 1100MHz power 17000 control 0xb00 status 0xb00
PSS: 800MHz power 11938 control 0x800 status 0x800
ACPI: added table 2/32, length now 44
ACPI:    * MCFG
ACPI: added table 3/32, length now 48
ACPI:    * TCPA
TCPA log created at 7ff27000
ACPI: added table 4/32, length now 52
ACPI:    * MADT
ACPI: added table 5/32, length now 56
current = 7ff3de90
ACPI:    * HPET
ACPI: added table 6/32, length now 60
ACPI: done.
ACPI tables: 16080 bytes.
smbios_write_tables: 7ff26000
Create SMBIOS type 17
Root Device (Google Parrot)
CPU_CLUSTER: 0 (Intel SandyBridge/IvyBridge integrated Northbridge)
APIC: 00 (unknown)
APIC: acac (Intel SandyBridge/IvyBridge CPU)
DOMAIN: 0000 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:00.0 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:02.0 (Intel SandyBridge/IvyBridge integrated Northbridge)
PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1e.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PNP: 00ff.1 (COMPAL ENE932 EC)
PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:1f.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge)
PCI: 00:01.0 (unknown)
PCI: 00:04.0 (unknown)
PCI: 02:00.0 (unknown)
PCI: 03:00.0 (unknown)
PCI: 03:00.1 (unknown)
PNP: 00ff.0 (unknown)
APIC: 02 (unknown)
SMBIOS tables: 458 bytes.
Writing table forward entry at 0x00000500
Wrote coreboot table at: 00000500, 0x10 bytes, checksum 9fe8
Writing coreboot table at 0x7ff5e000
 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1. 0000000000001000-000000000009ffff: RAM
 2. 00000000000a0000-00000000000fffff: RESERVED
 3. 0000000000100000-000000001fffffff: RAM
 4. 0000000020000000-00000000201fffff: RESERVED
 5. 0000000020200000-000000003fffffff: RAM
 6. 0000000040000000-00000000401fffff: RESERVED
 7. 0000000040200000-000000007ff25fff: RAM
 8. 000000007ff26000-000000007fffffff: CONFIGURATION TABLES
 9. 0000000080000000-00000000829fffff: RESERVED
10. 00000000f8000000-00000000fbffffff: RESERVED
11. 0000000100000000-000000017c5fffff: RAM
CBFS: 'Master Header Locator' located CBFS at [200100:7fffc0)
FMAP: Found "FLASH" version 1.1 at 200000.
FMAP: base = ff800000 size = 800000 #areas = 3
Wrote coreboot table at: 7ff5e000, 0x3a4 bytes, checksum 2030
coreboot table: 956 bytes.
IMD ROOT    0. 7ffff000 00001000
IMD SMALL   1. 7fffe000 00001000
CONSOLE     2. 7ffde000 00020000
TIME STAMP  3. 7ffdd000 00000400
MRC DATA    4. 7ffdc000 000005b0
ROMSTG STCK 5. 7ffd7000 00005000
RAMSTAGE    6. 7ff9e000 00039000
57a9e100    7. 7ff66000 000378f0
COREBOOT    8. 7ff5e000 00008000
ACPI        9. 7ff3a000 00024000
ACPI GNVS  10. 7ff39000 00001000
4f444749   11. 7ff37000 00002000
TCPA LOG   12. 7ff27000 00010000
SMBIOS     13. 7ff26000 00000800
IMD small region:
  IMD ROOT    0. 7fffec00 00000400
  CAR GLOBALS 1. 7fffea40 000001c0
  USBDEBUG    2. 7fffe9e0 00000058
  MEM INFO    3. 7fffe880 00000141
  ROMSTAGE    4. 7fffe860 00000004
  57a9e000    5. 7fffe840 00000010
BS: BS_WRITE_TABLES times (us): entry 841881 run 7465 exit 0
CBFS: 'Master Header Locator' located CBFS at [200100:7fffc0)
CBFS: Locating 'fallback/payload'
CBFS: Found @ offset 52a40 size f63b
Loading segment from ROM address 0xffa52b78
  code (compression=1)
  New segment dstaddr 0xe3240 memsize 0x1cdc0 srcaddr 0xffa52bb0 filesize 0xf603
Loading segment from ROM address 0xffa52b94
  Entry Point 0x000ff06e
Payload being loaded at below 1MiB without region being marked as RAM usable.
Loading Segment: addr: 0x00000000000e3240 memsz: 0x000000000001cdc0 filesz: 0x000000000000f603
lb: [0x000000007ff9f000, 0x000000007ffd68f0)
Post relocation: addr: 0x00000000000e3240 memsz: 0x000000000001cdc0 filesz: 0x000000000000f603
using LZMA
[ 0x000e3240, 00100000, 0x00100000) <- ffa52bb0
dest 000e3240, end 00100000, bouncebuffer ffffffff
Loaded segments
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 45292 exit 0
PCH watchdog disabled
Jumping to boot code at 000ff06e(7ff5e000)
CPU0: stack: 7ffcd000 - 7ffce000, lowest used address 7ffcdaa0, stack used: 1376 bytes
SeaBIOS (version rel-1.10.1-0-g8891697)
BUILD: gcc: (coreboot toolchain v1.44 March 3rd, 2017) 6.3.0 binutils: (GNU Binutils) 2.28
Found coreboot cbmem console @ 7ffde000
Found mainboard Google Parrot
Relocating init from 0x000e47a0 to 0x7fed9da0 (size 49504)
Found CBFS header at 0xffa00138
multiboot: eax=7ffc4ea0, ebx=7ffc4e54
Found 17 PCI devices (max PCI bus is 03)
Copying SMBIOS entry point from 0x7ff26000 to 0x000f08e0
Copying ACPI RSDP from 0x7ff3a000 to 0x000f08b0
Using pmtimer, ioport 0x508
WARNING - Timeout at tis_wait_sts:160!
WARNING - Timeout at tis_wait_sts:160!
WARNING - Timeout at tis_wait_sts:160!
WARNING - Timeout at tis_wait_sts:160!
WARNING - Timeout at tis_wait_sts:160!
WARNING - Timeout at tis_wait_sts:160!
Scan for VGA option rom
Running option rom at c000:0003
Turning on vga text mode console
SeaBIOS (version rel-1.10.1-0-g8891697)
EHCI init on dev 00:1a.0 (regs=0xf070e020)
EHCI init on dev 00:1d.0 (regs=0xf070f020)
AHCI controller at 00:1f.2, iobase 0xf070d000, irq 10
Searching bootorder for: /pci@i0cf8/pci-bridge@1c,1/*@0,1
Found 0 lpt ports
Found 0 serial ports
Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0
AHCI/0: Set transfer mode to UDMA-6
AHCI/0: registering: "AHCI/0: SAMSUNG HM321HI ATA-8 Hard-Disk (298 GiBytes)"
PS2 keyboard initialized
Initialized USB HUB (0 ports used)
Initialized USB HUB (0 ports used)
All threads complete.
Scan for option roms

Press ESC for boot menu.

WARNING - Timeout at tis_wait_sts:160!
Searching bootorder for: HALT
drive 0x000f0840: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=625142448
Space available for UMB: cf000-ee800, f0000-f0840
Returned 253952 bytes of ZoneHigh
e820 map has 11 items:
  0: 0000000000000000 - 000000000009fc00 = 1 RAM
  1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
  2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
  3: 0000000000100000 - 0000000020000000 = 1 RAM
  4: 0000000020000000 - 0000000020200000 = 2 RESERVED
  5: 0000000020200000 - 0000000040000000 = 1 RAM
  6: 0000000040000000 - 0000000040200000 = 2 RESERVED
  7: 0000000040200000 - 000000007ff24000 = 1 RAM
  8: 000000007ff24000 - 0000000082a00000 = 2 RESERVED
  9: 00000000f8000000 - 00000000fc000000 = 2 RESERVED
  10: 0000000100000000 - 000000017c600000 = 1 RAM
enter handle_19:
  NULL
Booting from Hard Disk...
Booting from 0000:7c00