Merge pull request #1807 from riscv-software-src/remove-compile-flags

Remove --with-isa/priv compile flags
riscv-software-src · Sep 14, 2024 · 0cc5ecc · 0cc5ecc
2 parents 2e816f2 + c187be0
commit 0cc5ecc
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Showing 7 changed files with 5 additions and 53 deletions.
diff --git a/config.h.in b/config.h.in
@@ -6,12 +6,6 @@
 /* Define if subproject MCPPBS_SPROJ_NORM is enabled */
 #undef CUSTOMEXT_ENABLED
 
-/* Default value for --isa switch */
-#undef DEFAULT_ISA
-
-/* Default value for --priv switch */
-#undef DEFAULT_PRIV
-
 /* Define if subproject MCPPBS_SPROJ_NORM is enabled */
 #undef DISASM_ENABLED
 

diff --git a/configure b/configure
@@ -737,8 +737,6 @@ with_boost
 with_boost_libdir
 with_boost_asio
 with_boost_regex
-with_isa
-with_priv
 with_target
 enable_dual_endian
 '
@@ -1403,9 +1401,6 @@ Optional Packages:
                           use the Regex library from boost - it is possible to
                           specify a certain library for the linker e.g.
                           --with-boost-regex=boost_regex-gcc-mt-d-1_33_1
-  --with-isa=RV64IMAFDC_zicntr_zihpm
-                          Sets the default RISC-V ISA
-  --with-priv=MSU         Sets the default RISC-V privilege modes supported
   --with-target=riscv64-unknown-elf
                           Sets the default target config
 
@@ -6562,34 +6557,6 @@ fi
 
 
 
-# Check whether --with-isa was given.
-if test ${with_isa+y}
-then :
-  withval=$with_isa;
-printf "%s\n" "#define DEFAULT_ISA \"$withval\"" >>confdefs.h
-
-else $as_nop
-
-printf "%s\n" "#define DEFAULT_ISA \"RV64IMAFDC_zicntr_zihpm\"" >>confdefs.h
-
-fi
-
-
-
-# Check whether --with-priv was given.
-if test ${with_priv+y}
-then :
-  withval=$with_priv;
-printf "%s\n" "#define DEFAULT_PRIV \"$withval\"" >>confdefs.h
-
-else $as_nop
-
-printf "%s\n" "#define DEFAULT_PRIV \"MSU\"" >>confdefs.h
-
-fi
-
-
-
 # Check whether --with-target was given.
 if test ${with_target+y}
 then :

diff --git a/disasm/disasm.cc b/disasm/disasm.cc
@@ -2,6 +2,7 @@
 
 #include "disasm.h"
 #include "decode_macros.h"
+#include "platform.h"
 #include <cassert>
 #include <string>
 #include <vector>

diff --git a/riscv/platform.h b/riscv/platform.h
@@ -4,6 +4,8 @@
 
 #define DEFAULT_KERNEL_BOOTARGS "console=ttyS0 earlycon"
 #define DEFAULT_RSTVEC     0x00001000
+#define DEFAULT_ISA        "rv64imafdc_zicntr_zihpm"
+#define DEFAULT_PRIV       "MSU"
 #define CLINT_BASE         0x02000000
 #define CLINT_SIZE         0x000c0000
 #define PLIC_BASE          0x0c000000

diff --git a/riscv/riscv.ac b/riscv/riscv.ac
@@ -8,18 +8,6 @@ AC_CHECK_LIB([boost_system], [main], [], [])
 
 AC_CHECK_LIB([boost_regex], [main], [], [])
 
-AC_ARG_WITH(isa,
-	[AS_HELP_STRING([--with-isa=RV64IMAFDC_zicntr_zihpm],
-		[Sets the default RISC-V ISA])],
-  AC_DEFINE_UNQUOTED([DEFAULT_ISA], "$withval", [Default value for --isa switch]),
-  AC_DEFINE_UNQUOTED([DEFAULT_ISA], "RV64IMAFDC_zicntr_zihpm", [Default value for --isa switch]))
-
-AC_ARG_WITH(priv,
-	[AS_HELP_STRING([--with-priv=MSU],
-		[Sets the default RISC-V privilege modes supported])],
-  AC_DEFINE_UNQUOTED([DEFAULT_PRIV], "$withval", [Default value for --priv switch]),
-  AC_DEFINE_UNQUOTED([DEFAULT_PRIV], "MSU", [Default value for --priv switch]))
-
 AC_ARG_WITH(target,
 	[AS_HELP_STRING([--with-target=riscv64-unknown-elf],
 		[Sets the default target config])],

diff --git a/spike_dasm/spike-dasm.cc b/spike_dasm/spike-dasm.cc
@@ -6,9 +6,9 @@
 // enclosed hexadecimal number, interpreted as a RISC-V
 // instruction.
 
-#include "config.h"
 #include "disasm.h"
 #include "extension.h"
+#include "platform.h"
 #include <iostream>
 #include <string>
 #include <cstdint>

diff --git a/spike_main/spike-log-parser.cc b/spike_main/spike-log-parser.cc
@@ -5,7 +5,6 @@
 // in its inputs, then output the RISC-V instruction with the disassembly
 // enclosed hexadecimal number.
 
-#include "config.h"
 #include <iostream>
 #include <string>
 #include <cstdint>
@@ -14,6 +13,7 @@
 
 #include "disasm.h"
 #include "extension.h"
+#include "platform.h"
 
 using namespace std;