From 1bae44e4c41502dbedf70d0efb9b6123c1d8aadf Mon Sep 17 00:00:00 2001 From: Afonso Oliveira Date: Thu, 17 Oct 2024 11:55:30 +0100 Subject: [PATCH 1/6] Merged F extension instructions. Some fields are not populated Signed-off-by: Afonso Oliveira --- arch/inst/F/fabs.s.yaml | 25 +++++++++++++++++ arch/inst/F/fadd.s.yaml | 27 +++++++++++++++++++ arch/inst/F/fclass.s.yaml | 48 +++++++++++++++++++++++++++++++++ arch/inst/F/fcvt.l.s.yaml | 26 ++++++++++++++++++ arch/inst/F/fcvt.lu.s.yaml | 26 ++++++++++++++++++ arch/inst/F/fcvt.s.l.yaml | 26 ++++++++++++++++++ arch/inst/F/fcvt.s.lu.yaml | 26 ++++++++++++++++++ arch/inst/F/fcvt.s.w.yaml | 35 ++++++++++++++++++++++++ arch/inst/F/fcvt.s.wu.yaml | 25 +++++++++++++++++ arch/inst/F/fcvt.w.s.yaml | 54 +++++++++++++++++++++++++++++++++++++ arch/inst/F/fcvt.wu.s.yaml | 25 +++++++++++++++++ arch/inst/F/fdiv.s.yaml | 27 +++++++++++++++++++ arch/inst/F/feq.s.yaml | 29 ++++++++++++++++++++ arch/inst/F/fle.s.yaml | 30 +++++++++++++++++++++ arch/inst/F/fleq.s.yaml | 25 +++++++++++++++++ arch/inst/F/fli.s.yaml | 23 ++++++++++++++++ arch/inst/F/flt.s.yaml | 30 +++++++++++++++++++++ arch/inst/F/fltq.s.yaml | 25 +++++++++++++++++ arch/inst/F/flw.yaml | 27 +++++++++++++++++++ arch/inst/F/fmadd.s.yaml | 29 ++++++++++++++++++++ arch/inst/F/fmax.s.yaml | 25 +++++++++++++++++ arch/inst/F/fmaxm.s.yaml | 25 +++++++++++++++++ arch/inst/F/fmin.s.yaml | 25 +++++++++++++++++ arch/inst/F/fminm.s.yaml | 25 +++++++++++++++++ arch/inst/F/fmsub.s.yaml | 29 ++++++++++++++++++++ arch/inst/F/fmul.s.yaml | 27 +++++++++++++++++++ arch/inst/F/fmv.s.x.yaml | 23 ++++++++++++++++ arch/inst/F/fmv.s.yaml | 25 +++++++++++++++++ arch/inst/F/fmv.w.x.yaml | 13 ++++----- arch/inst/F/fmv.x.s.yaml | 23 ++++++++++++++++ arch/inst/F/fmv.x.w.yaml | 30 +++++++++++++++++++++ arch/inst/F/fneg.s.yaml | 25 +++++++++++++++++ arch/inst/F/fnmadd.s.yaml | 29 ++++++++++++++++++++ arch/inst/F/fnmsub.s.yaml | 29 ++++++++++++++++++++ arch/inst/F/frcsr.yaml | 21 +++++++++++++++ arch/inst/F/frflags.yaml | 21 +++++++++++++++ arch/inst/F/fround.s.yaml | 25 +++++++++++++++++ arch/inst/F/froundnx.s.yaml | 25 +++++++++++++++++ arch/inst/F/frrm.yaml | 21 +++++++++++++++ arch/inst/F/fscsr.yaml | 23 ++++++++++++++++ arch/inst/F/fsflags.yaml | 23 ++++++++++++++++ arch/inst/F/fsflagsi.yaml | 23 ++++++++++++++++ arch/inst/F/fsgnj.s.yaml | 27 +++++++++++++++++++ arch/inst/F/fsgnjn.s.yaml | 26 ++++++++++++++++++ arch/inst/F/fsgnjx.s.yaml | 26 ++++++++++++++++++ arch/inst/F/fsqrt.s.yaml | 25 +++++++++++++++++ arch/inst/F/fsrm.yaml | 23 ++++++++++++++++ arch/inst/F/fsrmi.yaml | 23 ++++++++++++++++ arch/inst/F/fsub.s.yaml | 27 +++++++++++++++++++ arch/inst/F/fsw.yaml | 27 +++++++++++++++++++ 50 files changed, 1321 insertions(+), 6 deletions(-) create mode 100644 arch/inst/F/fabs.s.yaml create mode 100644 arch/inst/F/fadd.s.yaml create mode 100644 arch/inst/F/fclass.s.yaml create mode 100644 arch/inst/F/fcvt.l.s.yaml create mode 100644 arch/inst/F/fcvt.lu.s.yaml create mode 100644 arch/inst/F/fcvt.s.l.yaml create mode 100644 arch/inst/F/fcvt.s.lu.yaml create mode 100644 arch/inst/F/fcvt.s.w.yaml create mode 100644 arch/inst/F/fcvt.s.wu.yaml create mode 100644 arch/inst/F/fcvt.w.s.yaml create mode 100644 arch/inst/F/fcvt.wu.s.yaml create mode 100644 arch/inst/F/fdiv.s.yaml create mode 100644 arch/inst/F/feq.s.yaml create mode 100644 arch/inst/F/fle.s.yaml create mode 100644 arch/inst/F/fleq.s.yaml create mode 100644 arch/inst/F/fli.s.yaml create mode 100644 arch/inst/F/flt.s.yaml create mode 100644 arch/inst/F/fltq.s.yaml create mode 100644 arch/inst/F/flw.yaml create mode 100644 arch/inst/F/fmadd.s.yaml create mode 100644 arch/inst/F/fmax.s.yaml create mode 100644 arch/inst/F/fmaxm.s.yaml create mode 100644 arch/inst/F/fmin.s.yaml create mode 100644 arch/inst/F/fminm.s.yaml create mode 100644 arch/inst/F/fmsub.s.yaml create mode 100644 arch/inst/F/fmul.s.yaml create mode 100644 arch/inst/F/fmv.s.x.yaml create mode 100644 arch/inst/F/fmv.s.yaml create mode 100644 arch/inst/F/fmv.x.s.yaml create mode 100644 arch/inst/F/fmv.x.w.yaml create mode 100644 arch/inst/F/fneg.s.yaml create mode 100644 arch/inst/F/fnmadd.s.yaml create mode 100644 arch/inst/F/fnmsub.s.yaml create mode 100644 arch/inst/F/frcsr.yaml create mode 100644 arch/inst/F/frflags.yaml create mode 100644 arch/inst/F/fround.s.yaml create mode 100644 arch/inst/F/froundnx.s.yaml create mode 100644 arch/inst/F/frrm.yaml create mode 100644 arch/inst/F/fscsr.yaml create mode 100644 arch/inst/F/fsflags.yaml create mode 100644 arch/inst/F/fsflagsi.yaml create mode 100644 arch/inst/F/fsgnj.s.yaml create mode 100644 arch/inst/F/fsgnjn.s.yaml create mode 100644 arch/inst/F/fsgnjx.s.yaml create mode 100644 arch/inst/F/fsqrt.s.yaml create mode 100644 arch/inst/F/fsrm.yaml create mode 100644 arch/inst/F/fsrmi.yaml create mode 100644 arch/inst/F/fsub.s.yaml create mode 100644 arch/inst/F/fsw.yaml diff --git a/arch/inst/F/fabs.s.yaml b/arch/inst/F/fabs.s.yaml new file mode 100644 index 000000000..86fdb0354 --- /dev/null +++ b/arch/inst/F/fabs.s.yaml @@ -0,0 +1,25 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fabs.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd, xs1, xs2=xs1 + encoding: + match: 0010000----------010-----1010011 + variables: + - name: rs2=rs1 + location: 24-20 + - name: rs1 + location: 19-15 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fadd.s.yaml b/arch/inst/F/fadd.s.yaml new file mode 100644 index 000000000..cf7bc1f24 --- /dev/null +++ b/arch/inst/F/fadd.s.yaml @@ -0,0 +1,27 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fadd.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd, xs1, xs2, rm + encoding: + match: 0000000------------------1010011 + variables: + - name: rs2 + location: 24-20 + - name: rs1 + location: 19-15 + - name: rm + location: 14-12 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fclass.s.yaml b/arch/inst/F/fclass.s.yaml new file mode 100644 index 000000000..6188d7b6e --- /dev/null +++ b/arch/inst/F/fclass.s.yaml @@ -0,0 +1,48 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fclass.s: + long_name: Single-precision floating-point classify. + description: | + The `fclass.s` instruction examines the value in floating-point register + _fs1_ and writes to integer register _rd_ a 10-bit mask that indicates + the class of the floating-point number. + The format of the mask is described in the table below. + The corresponding bit in _rd_ will be set if the property is true and + clear otherwise. + All other bits in _rd_ are cleared. + Note that exactly one bit in rd will be set. + `fclass.s` does not set the floating-point exception flags. + + .Format of result of `fclass` instruction. + [%autowidth,float="center",align="center",cols="^,<",options="header",] + |=== + |_rd_ bit |Meaning + |0 |_rs1_ is latexmath:[$-\infty$]. + |1 |_rs1_ is a negative normal number. + |2 |_rs1_ is a negative subnormal number. + |3 |_rs1_ is latexmath:[$-0$]. + |4 |_rs1_ is latexmath:[$+0$]. + |5 |_rs1_ is a positive subnormal number. + |6 |_rs1_ is a positive normal number. + |7 |_rs1_ is latexmath:[$+\infty$]. + |8 |_rs1_ is a signaling NaN. + |9 |_rs1_ is a quiet NaN. + |=== + + definedBy: F + assembly: xd, fs1 + encoding: + match: 111000000000-----001-----1010011 + variables: + - name: fs1 + location: 19-15 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: false + operation(): | + diff --git a/arch/inst/F/fcvt.l.s.yaml b/arch/inst/F/fcvt.l.s.yaml new file mode 100644 index 000000000..a720124e4 --- /dev/null +++ b/arch/inst/F/fcvt.l.s.yaml @@ -0,0 +1,26 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fcvt.l.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + base: 64 + assembly: xd, xs1, rm + encoding: + match: 110000000010-------------1010011 + variables: + - name: rs1 + location: 19-15 + - name: rm + location: 14-12 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fcvt.lu.s.yaml b/arch/inst/F/fcvt.lu.s.yaml new file mode 100644 index 000000000..d1fe2d5e5 --- /dev/null +++ b/arch/inst/F/fcvt.lu.s.yaml @@ -0,0 +1,26 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fcvt.lu.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + base: 64 + assembly: xd, xs1, rm + encoding: + match: 110000000011-------------1010011 + variables: + - name: rs1 + location: 19-15 + - name: rm + location: 14-12 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fcvt.s.l.yaml b/arch/inst/F/fcvt.s.l.yaml new file mode 100644 index 000000000..c7b6ea2e2 --- /dev/null +++ b/arch/inst/F/fcvt.s.l.yaml @@ -0,0 +1,26 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fcvt.s.l: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + base: 64 + assembly: xd, xs1, rm + encoding: + match: 110100000010-------------1010011 + variables: + - name: rs1 + location: 19-15 + - name: rm + location: 14-12 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fcvt.s.lu.yaml b/arch/inst/F/fcvt.s.lu.yaml new file mode 100644 index 000000000..63e9cc7ba --- /dev/null +++ b/arch/inst/F/fcvt.s.lu.yaml @@ -0,0 +1,26 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fcvt.s.lu: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + base: 64 + assembly: xd, xs1, rm + encoding: + match: 110100000011-------------1010011 + variables: + - name: rs1 + location: 19-15 + - name: rm + location: 14-12 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fcvt.s.w.yaml b/arch/inst/F/fcvt.s.w.yaml new file mode 100644 index 000000000..e72f1ee70 --- /dev/null +++ b/arch/inst/F/fcvt.s.w.yaml @@ -0,0 +1,35 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fcvt.s.w: + long_name: Convert signed 32-bit integer to single-precision float + description: | + Converts a 32-bit signed integer in integer register _rs1_ into a floating-point number in + floating-point register _fd_. + + All floating-point to integer and integer to floating-point conversion instructions round + according to the _rm_ field. + A floating-point register can be initialized to floating-point positive zero using + `fcvt.s.w rd, x0`, which will never set any exception flags. + + All floating-point conversion instructions set the Inexact exception flag if the rounded + result differs from the operand value and the Invalid exception flag is not set. + definedBy: F + assembly: fd, xs1 + encoding: + match: 110100000000-------------1010011 + variables: + - name: rs1 + location: 19-15 + - name: rm + location: 14-12 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: false + operation(): | + + diff --git a/arch/inst/F/fcvt.s.wu.yaml b/arch/inst/F/fcvt.s.wu.yaml new file mode 100644 index 000000000..4a67932d9 --- /dev/null +++ b/arch/inst/F/fcvt.s.wu.yaml @@ -0,0 +1,25 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fcvt.s.wu: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd, xs1, rm + encoding: + match: 110100000001-------------1010011 + variables: + - name: rs1 + location: 19-15 + - name: rm + location: 14-12 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fcvt.w.s.yaml b/arch/inst/F/fcvt.w.s.yaml new file mode 100644 index 000000000..76b8f70d2 --- /dev/null +++ b/arch/inst/F/fcvt.w.s.yaml @@ -0,0 +1,54 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fcvt.w.s: + long_name: Convert single-precision float to integer word to signed 32-bit integer. + description: | + Converts a floating-point number in floating-point register _fs1_ to a signed 32-bit integer indicates + integer register _rd_. + + For XLEN >32, `fcvt.w.s` sign-extends the 32-bit result to the destination register width. + + If the rounded result is not representable as a 32-bit signed integer, it is clipped to the + nearest value and the invalid flag is set. + + The range of valid inputs and behavior for invalid inputs are: + + [separator="!"] + !=== + ! ! Value + + h! Minimum valid input (after rounding) ! `-2^31` + h! Maximum valid input (after rounding) ! `2^31 - 1` + h! Output for out-of-range negative input ! `-2^31` + h! Output for `-∞` ! `-2^31` + h! Output for out-of-range positive input ! `2^31 - 1` + h! Output for `+∞` for `NaN` ! `2^31 - 1` + !=== + + All floating-point to integer and integer to floating-point conversion instructions round + according to the _rm_ field. + A floating-point register can be initialized to floating-point positive zero using + `fcvt.s.w rd, x0`, which will never set any exception flags. + + All floating-point conversion instructions set the Inexact exception flag if the rounded + result differs from the operand value and the Invalid exception flag is not set. + + definedBy: F + assembly: xd, fs1 + encoding: + match: 110000000000-------------1010011 + variables: + - name: fs1 + location: 19-15 + - name: rm + location: 14-12 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fcvt.wu.s.yaml b/arch/inst/F/fcvt.wu.s.yaml new file mode 100644 index 000000000..5a56f606e --- /dev/null +++ b/arch/inst/F/fcvt.wu.s.yaml @@ -0,0 +1,25 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fcvt.wu.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd, xs1, rm + encoding: + match: 110000000001-------------1010011 + variables: + - name: rs1 + location: 19-15 + - name: rm + location: 14-12 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fdiv.s.yaml b/arch/inst/F/fdiv.s.yaml new file mode 100644 index 000000000..de0f28672 --- /dev/null +++ b/arch/inst/F/fdiv.s.yaml @@ -0,0 +1,27 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fdiv.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd, xs1, xs2, rm + encoding: + match: 0001100------------------1010011 + variables: + - name: rs2 + location: 24-20 + - name: rs1 + location: 19-15 + - name: rm + location: 14-12 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/feq.s.yaml b/arch/inst/F/feq.s.yaml new file mode 100644 index 000000000..feb045cef --- /dev/null +++ b/arch/inst/F/feq.s.yaml @@ -0,0 +1,29 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +feq.s: + long_name: Single-precision floating-point equal + description: | + Writes 1 to _rd_ if _fs1_ and _fs2_ are equal, and 0 otherwise. + + If either operand is NaN, the result is 0 (not equal). If either operand is a signaling NaN, the invalid flag is set. + + Positive zero is considered equal to negative zero. + + definedBy: F + assembly: xd, fs1, fs2 + encoding: + match: 1010000----------010-----1010011 + variables: + - name: fs2 + location: 24-20 + - name: fs1 + location: 19-15 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | diff --git a/arch/inst/F/fle.s.yaml b/arch/inst/F/fle.s.yaml new file mode 100644 index 000000000..e78930c61 --- /dev/null +++ b/arch/inst/F/fle.s.yaml @@ -0,0 +1,30 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fle.s: + long_name: Single-precision floating-point less than or equal + description: | + Writes 1 to _rd_ if _fs1_ is less than or equal to _fs2_, and 0 otherwise. + + If either operand is NaN, the result is 0 (not equal). + If either operand is a NaN (signaling or quiet), the invalid flag is set. + + Positive zero and negative zero are considered equal. + + definedBy: F + assembly: xd, xs1, xs2 + encoding: + match: 1010000----------000-----1010011 + variables: + - name: rs2 + location: 24-20 + - name: rs1 + location: 19-15 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | diff --git a/arch/inst/F/fleq.s.yaml b/arch/inst/F/fleq.s.yaml new file mode 100644 index 000000000..f0e2afdc9 --- /dev/null +++ b/arch/inst/F/fleq.s.yaml @@ -0,0 +1,25 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fleq.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F, Zfa + assembly: xd, xs1, xs2 + encoding: + match: 1010000----------100-----1010011 + variables: + - name: rs2 + location: 24-20 + - name: rs1 + location: 19-15 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fli.s.yaml b/arch/inst/F/fli.s.yaml new file mode 100644 index 000000000..d3b5cef6e --- /dev/null +++ b/arch/inst/F/fli.s.yaml @@ -0,0 +1,23 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fli.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F, Zfa + assembly: xd, xs1 + encoding: + match: 111100000001-----000-----1010011 + variables: + - name: rs1 + location: 19-15 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/flt.s.yaml b/arch/inst/F/flt.s.yaml new file mode 100644 index 000000000..9b5fceba2 --- /dev/null +++ b/arch/inst/F/flt.s.yaml @@ -0,0 +1,30 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +flt.s: + long_name: Single-precision floating-point less than + description: | + Writes 1 to _rd_ if _fs1_ is less than _fs2_, and 0 otherwise. + + If either operand is NaN, the result is 0 (not equal). + If either operand is a NaN (signaling or quiet), the invalid flag is set. + + definedBy: F + assembly: xd, fs1, fs2 + encoding: + match: 1010000----------001-----1010011 + variables: + - name: rs2 + location: 24-20 + - name: rs1 + location: 19-15 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + + diff --git a/arch/inst/F/fltq.s.yaml b/arch/inst/F/fltq.s.yaml new file mode 100644 index 000000000..cc12afdad --- /dev/null +++ b/arch/inst/F/fltq.s.yaml @@ -0,0 +1,25 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fltq.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F, Zfa + assembly: xd, xs1, xs2 + encoding: + match: 1010000----------101-----1010011 + variables: + - name: rs2 + location: 24-20 + - name: rs1 + location: 19-15 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/flw.yaml b/arch/inst/F/flw.yaml new file mode 100644 index 000000000..c16c0718e --- /dev/null +++ b/arch/inst/F/flw.yaml @@ -0,0 +1,27 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +flw: + long_name: Single-precision floating-point load + description: | + The `flw` instruction loads a single-precision floating-point value from memory at address _rs1_ + _imm_ into floating-point register _rd_. + + `flw` does not modify the bits being transferred; in particular, the payloads of non-canonical NaNs are preserved. + + definedBy: F + assembly: xd, xs1, imm + encoding: + match: -----------------010-----0000111 + variables: + - name: imm + location: 31-20 + - name: rs1 + location: 19-15 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | diff --git a/arch/inst/F/fmadd.s.yaml b/arch/inst/F/fmadd.s.yaml new file mode 100644 index 000000000..ec0b49603 --- /dev/null +++ b/arch/inst/F/fmadd.s.yaml @@ -0,0 +1,29 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fmadd.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd, xs1, xs2, xs3, rm + encoding: + match: -----00------------------1000011 + variables: + - name: rs3 + location: 31-27 + - name: rs2 + location: 24-20 + - name: rs1 + location: 19-15 + - name: rm + location: 14-12 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fmax.s.yaml b/arch/inst/F/fmax.s.yaml new file mode 100644 index 000000000..b59679224 --- /dev/null +++ b/arch/inst/F/fmax.s.yaml @@ -0,0 +1,25 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fmax.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd, xs1, xs2 + encoding: + match: 0010100----------001-----1010011 + variables: + - name: rs2 + location: 24-20 + - name: rs1 + location: 19-15 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fmaxm.s.yaml b/arch/inst/F/fmaxm.s.yaml new file mode 100644 index 000000000..3eb6aa5cc --- /dev/null +++ b/arch/inst/F/fmaxm.s.yaml @@ -0,0 +1,25 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fmaxm.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F, Zfa + assembly: xd, xs1, xs2 + encoding: + match: 0010100----------011-----1010011 + variables: + - name: rs2 + location: 24-20 + - name: rs1 + location: 19-15 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fmin.s.yaml b/arch/inst/F/fmin.s.yaml new file mode 100644 index 000000000..379ba16f7 --- /dev/null +++ b/arch/inst/F/fmin.s.yaml @@ -0,0 +1,25 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fmin.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd, xs1, xs2 + encoding: + match: 0010100----------000-----1010011 + variables: + - name: rs2 + location: 24-20 + - name: rs1 + location: 19-15 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fminm.s.yaml b/arch/inst/F/fminm.s.yaml new file mode 100644 index 000000000..cf346b5ac --- /dev/null +++ b/arch/inst/F/fminm.s.yaml @@ -0,0 +1,25 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fminm.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F, Zfa + assembly: xd, xs1, xs2 + encoding: + match: 0010100----------010-----1010011 + variables: + - name: rs2 + location: 24-20 + - name: rs1 + location: 19-15 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fmsub.s.yaml b/arch/inst/F/fmsub.s.yaml new file mode 100644 index 000000000..17d69fa72 --- /dev/null +++ b/arch/inst/F/fmsub.s.yaml @@ -0,0 +1,29 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fmsub.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd, xs1, xs2, xs3, rm + encoding: + match: -----00------------------1000111 + variables: + - name: rs3 + location: 31-27 + - name: rs2 + location: 24-20 + - name: rs1 + location: 19-15 + - name: rm + location: 14-12 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fmul.s.yaml b/arch/inst/F/fmul.s.yaml new file mode 100644 index 000000000..0cf9946ed --- /dev/null +++ b/arch/inst/F/fmul.s.yaml @@ -0,0 +1,27 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fmul.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd, xs1, xs2, rm + encoding: + match: 0001000------------------1010011 + variables: + - name: rs2 + location: 24-20 + - name: rs1 + location: 19-15 + - name: rm + location: 14-12 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fmv.s.x.yaml b/arch/inst/F/fmv.s.x.yaml new file mode 100644 index 000000000..25cbab317 --- /dev/null +++ b/arch/inst/F/fmv.s.x.yaml @@ -0,0 +1,23 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fmv.s.x: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd, xs1 + encoding: + match: 111100000000-----000-----1010011 + variables: + - name: rs1 + location: 19-15 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fmv.s.yaml b/arch/inst/F/fmv.s.yaml new file mode 100644 index 000000000..70cf55904 --- /dev/null +++ b/arch/inst/F/fmv.s.yaml @@ -0,0 +1,25 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fmv.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd, xs1, xs2=xs1 + encoding: + match: 0010000----------000-----1010011 + variables: + - name: rs2=rs1 + location: 24-20 + - name: rs1 + location: 19-15 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fmv.w.x.yaml b/arch/inst/F/fmv.w.x.yaml index d25dddec6..a7c1bbcf8 100644 --- a/arch/inst/F/fmv.w.x.yaml +++ b/arch/inst/F/fmv.w.x.yaml @@ -3,10 +3,10 @@ fmv.w.x: long_name: Single-precision floating-point move from integer description: | - Moves the single-precision value encoded in IEEE 754-2008 standard encoding - from the lower 32 bits of integer register `rs1` to the floating-point - register `rd`. The bits are not modified in the transfer, and in particular, - the payloads of non-canonical NaNs are preserved. + Moves the single-precision value encoded in IEEE 754-2008 standard encoding + from the lower 32 bits of integer register `rs1` to the floating-point + register `fd`. The bits are not modified in the transfer, and in particular, + the payloads of non-canonical NaNs are preserved. definedBy: F assembly: fd, xs1 encoding: @@ -21,5 +21,6 @@ fmv.w.x: u: always vs: always vu: always - # operation(): | - # f[rd] = X[rs1][31:0]; + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fmv.x.s.yaml b/arch/inst/F/fmv.x.s.yaml new file mode 100644 index 000000000..035e0b230 --- /dev/null +++ b/arch/inst/F/fmv.x.s.yaml @@ -0,0 +1,23 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fmv.x.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd, xs1 + encoding: + match: 111000000000-----000-----1010011 + variables: + - name: rs1 + location: 19-15 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fmv.x.w.yaml b/arch/inst/F/fmv.x.w.yaml new file mode 100644 index 000000000..65ffc002d --- /dev/null +++ b/arch/inst/F/fmv.x.w.yaml @@ -0,0 +1,30 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fmv.x.w: + long_name: Move single-precision value from floating-point to integer register + description: | + Moves the single-precision value in floating-point register rs1 represented in IEEE 754-2008 + encoding to the lower 32 bits of integer register rd. + The bits are not modified in the transfer, and in particular, the payloads of non-canonical + NaNs are preserved. + For RV64, the higher 32 bits of the destination register are filled with copies of the + floating-point number's sign bit. + definedBy: F + assembly: xd, fs1 + encoding: + match: 111000000000-----000-----1010011 + variables: + - name: fs1 + location: 19-15 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + check_f_ok(); + + X[rd] = sext(f[fs1][31:0], 32); diff --git a/arch/inst/F/fneg.s.yaml b/arch/inst/F/fneg.s.yaml new file mode 100644 index 000000000..6ac4419be --- /dev/null +++ b/arch/inst/F/fneg.s.yaml @@ -0,0 +1,25 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fneg.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd, xs1, xs2=xs1 + encoding: + match: 0010000----------001-----1010011 + variables: + - name: rs2=rs1 + location: 24-20 + - name: rs1 + location: 19-15 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fnmadd.s.yaml b/arch/inst/F/fnmadd.s.yaml new file mode 100644 index 000000000..79565afc4 --- /dev/null +++ b/arch/inst/F/fnmadd.s.yaml @@ -0,0 +1,29 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fnmadd.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd, xs1, xs2, xs3, rm + encoding: + match: -----00------------------1001111 + variables: + - name: rs3 + location: 31-27 + - name: rs2 + location: 24-20 + - name: rs1 + location: 19-15 + - name: rm + location: 14-12 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fnmsub.s.yaml b/arch/inst/F/fnmsub.s.yaml new file mode 100644 index 000000000..e9c24a33a --- /dev/null +++ b/arch/inst/F/fnmsub.s.yaml @@ -0,0 +1,29 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fnmsub.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd, xs1, xs2, xs3, rm + encoding: + match: -----00------------------1001011 + variables: + - name: rs3 + location: 31-27 + - name: rs2 + location: 24-20 + - name: rs1 + location: 19-15 + - name: rm + location: 14-12 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/frcsr.yaml b/arch/inst/F/frcsr.yaml new file mode 100644 index 000000000..9ad4f1755 --- /dev/null +++ b/arch/inst/F/frcsr.yaml @@ -0,0 +1,21 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +frcsr: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd + encoding: + match: 00000000001100000010-----1110011 + variables: + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/frflags.yaml b/arch/inst/F/frflags.yaml new file mode 100644 index 000000000..b4f10c41e --- /dev/null +++ b/arch/inst/F/frflags.yaml @@ -0,0 +1,21 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +frflags: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd + encoding: + match: 00000000000100000010-----1110011 + variables: + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fround.s.yaml b/arch/inst/F/fround.s.yaml new file mode 100644 index 000000000..bac917cab --- /dev/null +++ b/arch/inst/F/fround.s.yaml @@ -0,0 +1,25 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fround.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F, Zfa + assembly: xd, xs1, rm + encoding: + match: 010000000100-------------1010011 + variables: + - name: rs1 + location: 19-15 + - name: rm + location: 14-12 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/froundnx.s.yaml b/arch/inst/F/froundnx.s.yaml new file mode 100644 index 000000000..c9efc9423 --- /dev/null +++ b/arch/inst/F/froundnx.s.yaml @@ -0,0 +1,25 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +froundnx.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F, Zfa + assembly: xd, xs1, rm + encoding: + match: 010000000101-------------1010011 + variables: + - name: rs1 + location: 19-15 + - name: rm + location: 14-12 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/frrm.yaml b/arch/inst/F/frrm.yaml new file mode 100644 index 000000000..1ccf97eec --- /dev/null +++ b/arch/inst/F/frrm.yaml @@ -0,0 +1,21 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +frrm: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd + encoding: + match: 00000000001000000010-----1110011 + variables: + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fscsr.yaml b/arch/inst/F/fscsr.yaml new file mode 100644 index 000000000..5dfe44c9a --- /dev/null +++ b/arch/inst/F/fscsr.yaml @@ -0,0 +1,23 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fscsr: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd, xs1 + encoding: + match: 000000000011-----001-----1110011 + variables: + - name: rs1 + location: 19-15 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fsflags.yaml b/arch/inst/F/fsflags.yaml new file mode 100644 index 000000000..d452d6301 --- /dev/null +++ b/arch/inst/F/fsflags.yaml @@ -0,0 +1,23 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fsflags: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd, xs1 + encoding: + match: 000000000001-----001-----1110011 + variables: + - name: rs1 + location: 19-15 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fsflagsi.yaml b/arch/inst/F/fsflagsi.yaml new file mode 100644 index 000000000..f16eb25b4 --- /dev/null +++ b/arch/inst/F/fsflagsi.yaml @@ -0,0 +1,23 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fsflagsi: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd, imm + encoding: + match: 000000000001-----101-----1110011 + variables: + - name: uimm + location: 19-15 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fsgnj.s.yaml b/arch/inst/F/fsgnj.s.yaml new file mode 100644 index 000000000..d1552cdd1 --- /dev/null +++ b/arch/inst/F/fsgnj.s.yaml @@ -0,0 +1,27 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fsgnj.s: + long_name: Single-precision sign inject + description: | + Writes _fd_ with sign bit of _fs2_ and the exponent and mantissa of _fs1_. + + Sign-injection instructions do not set floating-point exception flags, nor do they canonicalize NaNs. + + definedBy: F + assembly: fd, fs1, fs2 + encoding: + match: 0010000----------000-----1010011 + variables: + - name: fs2 + location: 24-20 + - name: fs1 + location: 19-15 + - name: fd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | diff --git a/arch/inst/F/fsgnjn.s.yaml b/arch/inst/F/fsgnjn.s.yaml new file mode 100644 index 000000000..a6befdb84 --- /dev/null +++ b/arch/inst/F/fsgnjn.s.yaml @@ -0,0 +1,26 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fsgnjn.s: + long_name: Single-precision sign inject negate + description: | + Writes _fd_ with the opposite of the sign bit of _fs2_ and the exponent and mantissa of _fs1_. + + Sign-injection instructions do not set floating-point exception flags, nor do they canonicalize NaNs. + definedBy: F + assembly: fd, fs1, fs2 + encoding: + match: 0010000----------001-----1010011 + variables: + - name: fs2 + location: 24-20 + - name: fs1 + location: 19-15 + - name: fd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | diff --git a/arch/inst/F/fsgnjx.s.yaml b/arch/inst/F/fsgnjx.s.yaml new file mode 100644 index 000000000..cff68d79d --- /dev/null +++ b/arch/inst/F/fsgnjx.s.yaml @@ -0,0 +1,26 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fsgnjx.s: + long_name: Single-precision sign inject exclusive or + description: | + Writes _fd_ with the xor of the sign bits of _fs2_ and _fs1_ and the exponent and mantissa of _fs1_. + + Sign-injection instructions do not set floating-point exception flags, nor do they canonicalize NaNs. + definedBy: F + assembly: fd, fs1, fs2 + encoding: + match: 0010000----------010-----1010011 + variables: + - name: fs2 + location: 24-20 + - name: fs1 + location: 19-15 + - name: fd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | diff --git a/arch/inst/F/fsqrt.s.yaml b/arch/inst/F/fsqrt.s.yaml new file mode 100644 index 000000000..b6ca4286f --- /dev/null +++ b/arch/inst/F/fsqrt.s.yaml @@ -0,0 +1,25 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fsqrt.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd, xs1, rm + encoding: + match: 010110000000-------------1010011 + variables: + - name: rs1 + location: 19-15 + - name: rm + location: 14-12 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fsrm.yaml b/arch/inst/F/fsrm.yaml new file mode 100644 index 000000000..a9381751c --- /dev/null +++ b/arch/inst/F/fsrm.yaml @@ -0,0 +1,23 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fsrm: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd, xs1 + encoding: + match: 000000000010-----001-----1110011 + variables: + - name: rs1 + location: 19-15 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fsrmi.yaml b/arch/inst/F/fsrmi.yaml new file mode 100644 index 000000000..cbbe224db --- /dev/null +++ b/arch/inst/F/fsrmi.yaml @@ -0,0 +1,23 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fsrmi: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd, imm + encoding: + match: 000000000010-----101-----1110011 + variables: + - name: uimm + location: 19-15 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fsub.s.yaml b/arch/inst/F/fsub.s.yaml new file mode 100644 index 000000000..cbb2f371f --- /dev/null +++ b/arch/inst/F/fsub.s.yaml @@ -0,0 +1,27 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fsub.s: + long_name: No synopsis available. + description: | + No description available. + definedBy: F + assembly: xd, xs1, xs2, rm + encoding: + match: 0000100------------------1010011 + variables: + - name: rs2 + location: 24-20 + - name: rs1 + location: 19-15 + - name: rm + location: 14-12 + - name: rd + location: 11-7 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | + diff --git a/arch/inst/F/fsw.yaml b/arch/inst/F/fsw.yaml new file mode 100644 index 000000000..83b804d92 --- /dev/null +++ b/arch/inst/F/fsw.yaml @@ -0,0 +1,27 @@ +# yaml-language-server: $schema=../../../schemas/inst_schema.json + +fsw: + long_name: Single-precision floating-point store + description: | + The `fsw` instruction stores a single-precision floating-point value in _fs2_ to memory at address _rs1_ + _imm_. + + `fsw` does not modify the bits being transferred; in particular, the payloads of non-canonical NaNs are preserved. + + definedBy: F + assembly: fs1, fs2, imm + encoding: + match: -----------------010-----0100111 + variables: + - name: imm + location: 31-25|11-7 + - name: fs2 + location: 24-20 + - name: fs1 + location: 19-15 + access: + s: always + u: always + vs: always + vu: always + data_independent_timing: true + operation(): | From 0a289649f873f76de40517d3dfda7f77fe2a7328 Mon Sep 17 00:00:00 2001 From: Afonso Oliveira Date: Thu, 17 Oct 2024 14:55:15 +0100 Subject: [PATCH 2/6] Added previously created operations description by dhower Signed-off-by: Afonso Oliveira --- arch/inst/F/fclass.s.yaml | 27 ++++++++++++++++++++++++++- arch/inst/F/fcvt.s.w.yaml | 17 ++++++++++++++++- arch/inst/F/fcvt.w.s.yaml | 28 +++++++++++++++++++++++++++- arch/inst/F/feq.s.yaml | 16 ++++++++++++++++ arch/inst/F/fle.s.yaml | 16 ++++++++++++++++ arch/inst/F/flt.s.yaml | 18 ++++++++++++++++++ arch/inst/F/flw.yaml | 13 +++++++++++++ arch/inst/F/fmv.w.x.yaml | 10 ++++++++++ arch/inst/F/fsgnj.s.yaml | 11 +++++++++++ arch/inst/F/fsgnjn.s.yaml | 11 +++++++++++ arch/inst/F/fsgnjx.s.yaml | 11 +++++++++++ arch/inst/F/fsw.yaml | 5 +++++ 12 files changed, 180 insertions(+), 3 deletions(-) diff --git a/arch/inst/F/fclass.s.yaml b/arch/inst/F/fclass.s.yaml index 6188d7b6e..8503c68ad 100644 --- a/arch/inst/F/fclass.s.yaml +++ b/arch/inst/F/fclass.s.yaml @@ -45,4 +45,29 @@ fclass.s: vu: always data_independent_timing: false operation(): | - + check_f_ok(); + + Bits<32> sp_value = f[fs1][31:0]; + + if (is_sp_neg_inf?(sp_value)) { + X[rd] = 1 << 0; + } else if (is_sp_neg_norm?(sp_value)) { + X[rd] = 1 << 1; + } else if (is_sp_neg_subnorm?(sp_value)) { + X[rd] = 1 << 2; + } else if (is_sp_neg_zero?(sp_value)) { + X[rd] = 1 << 3; + } else if (is_sp_pos_zero?(sp_value)) { + X[rd] = 1 << 4; + } else if (is_sp_pos_subnorm?(sp_value)) { + X[rd] = 1 << 5; + } else if (is_sp_pos_norm?(sp_value)) { + X[rd] = 1 << 6; + } else if (is_sp_pos_inf?(sp_value)) { + X[rd] = 1 << 7; + } else if (is_sp_signaling_nan?(sp_value)) { + X[rd] = 1 << 8; + } else { + assert(is_sp_quiet_nan?(sp_value), "Unexpected SP value"); + X[rd] = 1 << 9; + } diff --git a/arch/inst/F/fcvt.s.w.yaml b/arch/inst/F/fcvt.s.w.yaml index e72f1ee70..71d893080 100644 --- a/arch/inst/F/fcvt.s.w.yaml +++ b/arch/inst/F/fcvt.s.w.yaml @@ -31,5 +31,20 @@ fcvt.s.w: vu: always data_independent_timing: false operation(): | + check_f_ok(); + + Bits<32> int_value = X[rs1]; + + Bits<1> sign = int_value[31]; + + RoundingMode rouding_mode = rm_to_mode(rm, $encoding); + + if (! (int_value & 32'h7fff_ffff)) { + X[fd] = (sign == 1) ? packToF32UI(1, 0x9E, 0) : 0; + } else { + Bits<32> absA = (sign == 1) ? -int_value : int_value; + X[fd] = softfloat_normRoundPackToF32( sign, 0x9C, absA, rounding_mode ); + } + + mark_f_state_dirty(); - diff --git a/arch/inst/F/fcvt.w.s.yaml b/arch/inst/F/fcvt.w.s.yaml index 76b8f70d2..aa1f02b06 100644 --- a/arch/inst/F/fcvt.w.s.yaml +++ b/arch/inst/F/fcvt.w.s.yaml @@ -51,4 +51,30 @@ fcvt.w.s: vu: always data_independent_timing: true operation(): | - + check_f_ok(); + + Bits<32> sp_value = f[fs1][31:0]; + + Bits<1> sign = sp_value[31]; + Bits<8> exp = sp_value[30:23]; + Bits<23> sig = sp_value[22:0]; + + RoundingMode rounding_mode = rm_to_mode(rm, $encoding); + + if ( (exp == 0xff) && (sig != 0)) { + sign = 0; + set_fp_flag(FpFlag::NV); + X[rd] = SP_CANONICAL_NAN; + } else { + if (exp != 0) { + sig = sig | 0x00800000; + } + Bits<64> sig64 = sig << 32; + Bits<16> shift_dist = 0xAA - exp; + if (0 < shift_dist) { + sig64 = softfloat_shiftRightJam64(sig64, shift_dist ); + } + X[rd] = softfloat_roundToI32( sign, sig64, rounding_mode ); + } + + diff --git a/arch/inst/F/feq.s.yaml b/arch/inst/F/feq.s.yaml index feb045cef..30b603c88 100644 --- a/arch/inst/F/feq.s.yaml +++ b/arch/inst/F/feq.s.yaml @@ -27,3 +27,19 @@ feq.s: vu: always data_independent_timing: true operation(): | + check_f_ok(); + + Bits<32> sp_value_a = f[fs1][31:0]; + Bits<32> sp_value_b = f[fs1][31:0]; + + if (is_sp_nan?(sp_value_a) || is_sp_nan?(sp_value_b)) { + if (is_sp_signaling_nan?(sp_value_a) || is_sp_signaling_nan?(sp_value_b)) { + set_fp_flag(FpFlag::NV); + } + X[rd] = 0; + } else { + X[rd] = ( + (sp_value_a == sp_value_b) + || ((sp_value_a | sp_value_b)[30:0] == 0) # pos 0 is equal to neg zero + ) ? 1 : 0; + } diff --git a/arch/inst/F/fle.s.yaml b/arch/inst/F/fle.s.yaml index e78930c61..a56b18a24 100644 --- a/arch/inst/F/fle.s.yaml +++ b/arch/inst/F/fle.s.yaml @@ -28,3 +28,19 @@ fle.s: vu: always data_independent_timing: true operation(): | + check_f_ok(); + + Bits<32> sp_value_a = f[fs1][31:0]; + Bits<32> sp_value_b = f[fs1][31:0]; + + if (is_sp_nan?(sp_value_a) || is_sp_nan?(sp_value_b)) { + if (is_sp_signaling_nan?(sp_value_a) || is_sp_signaling_nan?(sp_value_b)) { + set_fp_flag(FpFlag::NV); + } + X[rd] = 0; + } else { + X[rd] = ( + (sp_value_a == sp_value_b) + || ((sp_value_a | sp_value_b)[30:0] == 0) # pos 0 is equal to neg zero + ) ? 1 : 0; + } diff --git a/arch/inst/F/flt.s.yaml b/arch/inst/F/flt.s.yaml index 9b5fceba2..2dd8968c4 100644 --- a/arch/inst/F/flt.s.yaml +++ b/arch/inst/F/flt.s.yaml @@ -26,5 +26,23 @@ flt.s: vu: always data_independent_timing: true operation(): | + check_f_ok(); + + Bits<32> sp_value_a = f[fs1][31:0]; + Bits<32> sp_value_b = f[fs1][31:0]; + + if (is_sp_nan?(sp_value_a) || is_sp_nan?(sp_value_b)) { + set_fp_flag(FpFlag::NV); + X[rd] = 0; + } else { + Boolean sign_a = sp_value_a[31] == 1; + Boolean sign_b = sp_value_b[31] == 1; + + Boolean a_lt_b = + (sign_a != sign_b) + ? (sign_a && ((sp_value_a[30:0] | sp_value_b[30:0]) != 0)) # opposite sign, a is negative. a is less than b as long as both are not zero + : ((sp_value_a != sp_value_b) && (sign_a != (sp_value_a < sp_value_b))); + X[rd] = a_lt_b ? 1 : 0; + } diff --git a/arch/inst/F/flw.yaml b/arch/inst/F/flw.yaml index c16c0718e..f109cb3ff 100644 --- a/arch/inst/F/flw.yaml +++ b/arch/inst/F/flw.yaml @@ -25,3 +25,16 @@ flw: vu: always data_independent_timing: true operation(): | + check_f_ok(); + + XReg virtual_address = X[rs1] + $signed(imm); + + Bits<32> sp_value = read_memory<32>(virtual_address); + + if (implemented?(ExtensionName::D)) { + f[fd] = nan_box(sp_value); + } else { + f[fd] = sp_value; + } + + mark_f_state_dirty(); \ No newline at end of file diff --git a/arch/inst/F/fmv.w.x.yaml b/arch/inst/F/fmv.w.x.yaml index a7c1bbcf8..348efb72d 100644 --- a/arch/inst/F/fmv.w.x.yaml +++ b/arch/inst/F/fmv.w.x.yaml @@ -23,4 +23,14 @@ fmv.w.x: vu: always data_independent_timing: true operation(): | + check_f_ok(); + Bits<32> sp_value = X[rs1][31:0]; + + if (implemented?(ExtensionName::D)) { + f[fd] = nan_box(sp_value); + } else { + f[fd] = sp_value; + } + + mark_f_state_dirty(); diff --git a/arch/inst/F/fsgnj.s.yaml b/arch/inst/F/fsgnj.s.yaml index d1552cdd1..be4b431eb 100644 --- a/arch/inst/F/fsgnj.s.yaml +++ b/arch/inst/F/fsgnj.s.yaml @@ -25,3 +25,14 @@ fsgnj.s: vu: always data_independent_timing: true operation(): | + check_f_ok(); + + Bits<32> sp_value = {f[fs2][31], f[fs1][30:0]}; + + if (implemented?(ExtensionName::D)) { + f[fd] = nan_box(sp_value); + } else { + f[fd] = sp_value; + } + + mark_f_state_dirty(); diff --git a/arch/inst/F/fsgnjn.s.yaml b/arch/inst/F/fsgnjn.s.yaml index a6befdb84..3768d689a 100644 --- a/arch/inst/F/fsgnjn.s.yaml +++ b/arch/inst/F/fsgnjn.s.yaml @@ -24,3 +24,14 @@ fsgnjn.s: vu: always data_independent_timing: true operation(): | + check_f_ok(); + + Bits<32> sp_value = {~f[fs2][31], f[fs1][30:0]}; + + if (implemented?(ExtensionName::D)) { + f[fd] = nan_box(sp_value); + } else { + f[fd] = sp_value; + } + + mark_f_state_dirty(); diff --git a/arch/inst/F/fsgnjx.s.yaml b/arch/inst/F/fsgnjx.s.yaml index cff68d79d..579eb4569 100644 --- a/arch/inst/F/fsgnjx.s.yaml +++ b/arch/inst/F/fsgnjx.s.yaml @@ -24,3 +24,14 @@ fsgnjx.s: vu: always data_independent_timing: true operation(): | + check_f_ok(); + + Bits<32> sp_value = {f[fs1][31] ^ f[fs2][31], f[fs1][30:0]}; + + if (implemented?(ExtensionName::D)) { + f[fd] = nan_box(sp_value); + } else { + f[fd] = sp_value; + } + + mark_f_state_dirty(); diff --git a/arch/inst/F/fsw.yaml b/arch/inst/F/fsw.yaml index 83b804d92..db78ae5e2 100644 --- a/arch/inst/F/fsw.yaml +++ b/arch/inst/F/fsw.yaml @@ -25,3 +25,8 @@ fsw: vu: always data_independent_timing: true operation(): | + check_f_ok(); + + XReg virtual_address = X[rs1] + $signed(imm); + + write_memory<32>(virtual_address, f[fs2][31:0]); From 8ce8d856aeb324a73f23e9bd10e42008cad21f63 Mon Sep 17 00:00:00 2001 From: Derek Hower Date: Thu, 17 Oct 2024 10:51:01 -0700 Subject: [PATCH 3/6] Add fp.idl, fix FP operation()s from merge --- arch/csr/{ => F}/fcsr.yaml | 6 +- arch/ext/F.yaml | 19 +- arch/inst/F/fclass.s.yaml | 2 +- arch/inst/F/fcvt.s.w.yaml | 8 +- arch/inst/F/fcvt.w.s.yaml | 2 +- arch/inst/F/feq.s.yaml | 2 +- arch/inst/F/fle.s.yaml | 10 +- arch/inst/F/flt.s.yaml | 8 +- arch/inst/F/flw.yaml | 12 +- arch/inst/F/fmv.w.x.yaml | 6 +- arch/inst/F/fmv.x.w.yaml | 2 +- arch/inst/F/fsgnj.s.yaml | 4 +- arch/inst/F/fsgnjn.s.yaml | 4 +- arch/inst/F/fsgnjx.s.yaml | 4 +- arch/inst/F/fsw.yaml | 8 +- arch/inst/Zfh/fcvt.h.s.yaml | 2 +- arch/inst/Zfh/fcvt.s.h.yaml | 2 +- arch/inst/Zfh/flh.yaml | 2 +- arch/inst/Zfh/fmv.h.x.yaml | 2 +- arch/inst/Zfh/fmv.x.h.yaml | 2 +- arch/inst/Zfh/fsh.yaml | 2 +- arch/isa/builtin_functions.idl | 87 ------ arch/isa/fp.idl | 487 +++++++++++++++++++++++++++++++++ arch/isa/globals.isa | 17 +- lib/idl/ast.rb | 21 +- 25 files changed, 568 insertions(+), 153 deletions(-) rename arch/csr/{ => F}/fcsr.yaml (98%) create mode 100644 arch/isa/fp.idl diff --git a/arch/csr/fcsr.yaml b/arch/csr/F/fcsr.yaml similarity index 98% rename from arch/csr/fcsr.yaml rename to arch/csr/F/fcsr.yaml index bc114273d..72d797472 100644 --- a/arch/csr/fcsr.yaml +++ b/arch/csr/F/fcsr.yaml @@ -1,4 +1,4 @@ -# yaml-language-server: $schema=../../schemas/csr_schema.json +# yaml-language-server: $schema=../../../schemas/csr_schema.json fcsr: long_name: Floating-point control and status register (`frm` + `fflags`) @@ -93,7 +93,7 @@ fcsr: length: 32 definedBy: F fields: - RMODE: + FRM: location: 7-5 description: | Rounding modes are encoded as follows: @@ -179,4 +179,4 @@ fcsr: Set by hardware when a floating point operation is inexact and stays set until explicitly cleared by software. type: RW-H - reset_value: UNDEFINED_LEGAL + reset_value: UNDEFINED_LEGAL \ No newline at end of file diff --git a/arch/ext/F.yaml b/arch/ext/F.yaml index 9586d500e..7c547e8b3 100644 --- a/arch/ext/F.yaml +++ b/arch/ext/F.yaml @@ -239,6 +239,20 @@ F: Indicates whether or not the `F` extension can be disabled with the `misa.F` bit. schema: type: boolean + HW_MSTATUS_FS_DIRTY_UPDATE: + description: | + Indicates whether or not hardware will write to `mstatus.FS` + + Values are: + [separator="!"] + !=== + h! none ! Hardware never writes `mstatus.FS` + h! precise ! Hardware writes `mstatus.FS` to the Dirty (3) state precisely when F registers are modified + h! imprecise ! Hardware writes `mstatus.FS` imprecisely. This will result in a call to unpredictable() on any attempt to read `mstatus` or write FP state. + !=== + schema: + type: string + enum: ["none", "precise", "imprecise"] MSTATUS_FS_LEGAL_VALUES: description: | The set of values that mstatus.FS will accept from a software write. @@ -251,4 +265,7 @@ F: uniqueItems: true also_defined_in: S extra_validation: | - assert MSTATUS_FS_LEGAL_VALUES.include?(0) && MSTATUS_FS_LEGAL_VALUES.include?(3) if ext?(:F) \ No newline at end of file + assert MSTATUS_FS_LEGAL_VALUES.include?(0) && MSTATUS_FS_LEGAL_VALUES.include?(3) if ext?(:F) + + # if HW is writing FS, then Dirty (3) better be a supported value + assert MSTATUS_FS_LEGAL_VALUES.include?(3) if ext?(:F) && (HW_MSTATUS_FS_DIRTY_UPDATE != "none") \ No newline at end of file diff --git a/arch/inst/F/fclass.s.yaml b/arch/inst/F/fclass.s.yaml index 8503c68ad..c484a11fe 100644 --- a/arch/inst/F/fclass.s.yaml +++ b/arch/inst/F/fclass.s.yaml @@ -45,7 +45,7 @@ fclass.s: vu: always data_independent_timing: false operation(): | - check_f_ok(); + check_f_ok($encoding); Bits<32> sp_value = f[fs1][31:0]; diff --git a/arch/inst/F/fcvt.s.w.yaml b/arch/inst/F/fcvt.s.w.yaml index 71d893080..85a1d85a4 100644 --- a/arch/inst/F/fcvt.s.w.yaml +++ b/arch/inst/F/fcvt.s.w.yaml @@ -22,7 +22,7 @@ fcvt.s.w: location: 19-15 - name: rm location: 14-12 - - name: rd + - name: fd location: 11-7 access: s: always @@ -31,15 +31,15 @@ fcvt.s.w: vu: always data_independent_timing: false operation(): | - check_f_ok(); + check_f_ok($encoding); Bits<32> int_value = X[rs1]; Bits<1> sign = int_value[31]; - RoundingMode rouding_mode = rm_to_mode(rm, $encoding); + RoundingMode rounding_mode = rm_to_mode(rm, $encoding); - if (! (int_value & 32'h7fff_ffff)) { + if ((int_value & 32'h7fff_ffff) == 0) { X[fd] = (sign == 1) ? packToF32UI(1, 0x9E, 0) : 0; } else { Bits<32> absA = (sign == 1) ? -int_value : int_value; diff --git a/arch/inst/F/fcvt.w.s.yaml b/arch/inst/F/fcvt.w.s.yaml index aa1f02b06..5ffb38e79 100644 --- a/arch/inst/F/fcvt.w.s.yaml +++ b/arch/inst/F/fcvt.w.s.yaml @@ -51,7 +51,7 @@ fcvt.w.s: vu: always data_independent_timing: true operation(): | - check_f_ok(); + check_f_ok($encoding); Bits<32> sp_value = f[fs1][31:0]; diff --git a/arch/inst/F/feq.s.yaml b/arch/inst/F/feq.s.yaml index 30b603c88..4239a5c07 100644 --- a/arch/inst/F/feq.s.yaml +++ b/arch/inst/F/feq.s.yaml @@ -27,7 +27,7 @@ feq.s: vu: always data_independent_timing: true operation(): | - check_f_ok(); + check_f_ok($encoding); Bits<32> sp_value_a = f[fs1][31:0]; Bits<32> sp_value_b = f[fs1][31:0]; diff --git a/arch/inst/F/fle.s.yaml b/arch/inst/F/fle.s.yaml index a56b18a24..c692a679c 100644 --- a/arch/inst/F/fle.s.yaml +++ b/arch/inst/F/fle.s.yaml @@ -11,13 +11,13 @@ fle.s: Positive zero and negative zero are considered equal. definedBy: F - assembly: xd, xs1, xs2 + assembly: xd, fs1, fs2 encoding: match: 1010000----------000-----1010011 variables: - - name: rs2 + - name: fs2 location: 24-20 - - name: rs1 + - name: fs1 location: 19-15 - name: rd location: 11-7 @@ -28,10 +28,10 @@ fle.s: vu: always data_independent_timing: true operation(): | - check_f_ok(); + check_f_ok($encoding); Bits<32> sp_value_a = f[fs1][31:0]; - Bits<32> sp_value_b = f[fs1][31:0]; + Bits<32> sp_value_b = f[fs2][31:0]; if (is_sp_nan?(sp_value_a) || is_sp_nan?(sp_value_b)) { if (is_sp_signaling_nan?(sp_value_a) || is_sp_signaling_nan?(sp_value_b)) { diff --git a/arch/inst/F/flt.s.yaml b/arch/inst/F/flt.s.yaml index 2dd8968c4..0a2d7a5da 100644 --- a/arch/inst/F/flt.s.yaml +++ b/arch/inst/F/flt.s.yaml @@ -13,9 +13,9 @@ flt.s: encoding: match: 1010000----------001-----1010011 variables: - - name: rs2 + - name: fs2 location: 24-20 - - name: rs1 + - name: fs1 location: 19-15 - name: rd location: 11-7 @@ -26,10 +26,10 @@ flt.s: vu: always data_independent_timing: true operation(): | - check_f_ok(); + check_f_ok($encoding); Bits<32> sp_value_a = f[fs1][31:0]; - Bits<32> sp_value_b = f[fs1][31:0]; + Bits<32> sp_value_b = f[fs2][31:0]; if (is_sp_nan?(sp_value_a) || is_sp_nan?(sp_value_b)) { set_fp_flag(FpFlag::NV); diff --git a/arch/inst/F/flw.yaml b/arch/inst/F/flw.yaml index f109cb3ff..c4932d6bd 100644 --- a/arch/inst/F/flw.yaml +++ b/arch/inst/F/flw.yaml @@ -3,12 +3,12 @@ flw: long_name: Single-precision floating-point load description: | - The `flw` instruction loads a single-precision floating-point value from memory at address _rs1_ + _imm_ into floating-point register _rd_. + The `flw` instruction loads a single-precision floating-point value from memory at address _rs1_ + _imm_ into floating-point register _fd_. `flw` does not modify the bits being transferred; in particular, the payloads of non-canonical NaNs are preserved. definedBy: F - assembly: xd, xs1, imm + assembly: fd, xs1, imm encoding: match: -----------------010-----0000111 variables: @@ -16,7 +16,7 @@ flw: location: 31-20 - name: rs1 location: 19-15 - - name: rd + - name: fd location: 11-7 access: s: always @@ -25,14 +25,14 @@ flw: vu: always data_independent_timing: true operation(): | - check_f_ok(); + check_f_ok($encoding); XReg virtual_address = X[rs1] + $signed(imm); - Bits<32> sp_value = read_memory<32>(virtual_address); + Bits<32> sp_value = read_memory<32>(virtual_address, $encoding); if (implemented?(ExtensionName::D)) { - f[fd] = nan_box(sp_value); + f[fd] = nan_box<32, 64>(sp_value); } else { f[fd] = sp_value; } diff --git a/arch/inst/F/fmv.w.x.yaml b/arch/inst/F/fmv.w.x.yaml index 348efb72d..68bb11107 100644 --- a/arch/inst/F/fmv.w.x.yaml +++ b/arch/inst/F/fmv.w.x.yaml @@ -14,7 +14,7 @@ fmv.w.x: variables: - name: rs1 location: 19-15 - - name: rd + - name: fd location: 11-7 access: s: always @@ -23,12 +23,12 @@ fmv.w.x: vu: always data_independent_timing: true operation(): | - check_f_ok(); + check_f_ok($encoding); Bits<32> sp_value = X[rs1][31:0]; if (implemented?(ExtensionName::D)) { - f[fd] = nan_box(sp_value); + f[fd] = nan_box<32, 64>(sp_value); } else { f[fd] = sp_value; } diff --git a/arch/inst/F/fmv.x.w.yaml b/arch/inst/F/fmv.x.w.yaml index 65ffc002d..a57eb0658 100644 --- a/arch/inst/F/fmv.x.w.yaml +++ b/arch/inst/F/fmv.x.w.yaml @@ -25,6 +25,6 @@ fmv.x.w: vu: always data_independent_timing: true operation(): | - check_f_ok(); + check_f_ok($encoding); X[rd] = sext(f[fs1][31:0], 32); diff --git a/arch/inst/F/fsgnj.s.yaml b/arch/inst/F/fsgnj.s.yaml index be4b431eb..2843a7fea 100644 --- a/arch/inst/F/fsgnj.s.yaml +++ b/arch/inst/F/fsgnj.s.yaml @@ -25,12 +25,12 @@ fsgnj.s: vu: always data_independent_timing: true operation(): | - check_f_ok(); + check_f_ok($encoding); Bits<32> sp_value = {f[fs2][31], f[fs1][30:0]}; if (implemented?(ExtensionName::D)) { - f[fd] = nan_box(sp_value); + f[fd] = nan_box<32, 64>(sp_value); } else { f[fd] = sp_value; } diff --git a/arch/inst/F/fsgnjn.s.yaml b/arch/inst/F/fsgnjn.s.yaml index 3768d689a..0dc611873 100644 --- a/arch/inst/F/fsgnjn.s.yaml +++ b/arch/inst/F/fsgnjn.s.yaml @@ -24,12 +24,12 @@ fsgnjn.s: vu: always data_independent_timing: true operation(): | - check_f_ok(); + check_f_ok($encoding); Bits<32> sp_value = {~f[fs2][31], f[fs1][30:0]}; if (implemented?(ExtensionName::D)) { - f[fd] = nan_box(sp_value); + f[fd] = nan_box<32, 64>(sp_value); } else { f[fd] = sp_value; } diff --git a/arch/inst/F/fsgnjx.s.yaml b/arch/inst/F/fsgnjx.s.yaml index 579eb4569..7dcb02133 100644 --- a/arch/inst/F/fsgnjx.s.yaml +++ b/arch/inst/F/fsgnjx.s.yaml @@ -24,12 +24,12 @@ fsgnjx.s: vu: always data_independent_timing: true operation(): | - check_f_ok(); + check_f_ok($encoding); Bits<32> sp_value = {f[fs1][31] ^ f[fs2][31], f[fs1][30:0]}; if (implemented?(ExtensionName::D)) { - f[fd] = nan_box(sp_value); + f[fd] = nan_box<32, 64>(sp_value); } else { f[fd] = sp_value; } diff --git a/arch/inst/F/fsw.yaml b/arch/inst/F/fsw.yaml index db78ae5e2..d5983548b 100644 --- a/arch/inst/F/fsw.yaml +++ b/arch/inst/F/fsw.yaml @@ -8,7 +8,7 @@ fsw: `fsw` does not modify the bits being transferred; in particular, the payloads of non-canonical NaNs are preserved. definedBy: F - assembly: fs1, fs2, imm + assembly: fs2, xs1, imm encoding: match: -----------------010-----0100111 variables: @@ -16,7 +16,7 @@ fsw: location: 31-25|11-7 - name: fs2 location: 24-20 - - name: fs1 + - name: rs1 location: 19-15 access: s: always @@ -25,8 +25,8 @@ fsw: vu: always data_independent_timing: true operation(): | - check_f_ok(); + check_f_ok($encoding); XReg virtual_address = X[rs1] + $signed(imm); - write_memory<32>(virtual_address, f[fs2][31:0]); + write_memory<32>(virtual_address, f[fs2][31:0], $encoding); diff --git a/arch/inst/Zfh/fcvt.h.s.yaml b/arch/inst/Zfh/fcvt.h.s.yaml index 1393f9470..a347f194c 100644 --- a/arch/inst/Zfh/fcvt.h.s.yaml +++ b/arch/inst/Zfh/fcvt.h.s.yaml @@ -29,7 +29,7 @@ fcvt.h.s: vs: always vu: always operation(): | - check_f_ok(); + check_f_ok($encoding); Bits<16> hp_value = f[fs1][15:0]; diff --git a/arch/inst/Zfh/fcvt.s.h.yaml b/arch/inst/Zfh/fcvt.s.h.yaml index 489ea806f..471596c82 100644 --- a/arch/inst/Zfh/fcvt.s.h.yaml +++ b/arch/inst/Zfh/fcvt.s.h.yaml @@ -26,7 +26,7 @@ fcvt.s.h: vs: always vu: always operation(): | - check_f_ok(); + check_f_ok($encoding); Bits<32> sp_value = f[fs1][31:0]; diff --git a/arch/inst/Zfh/flh.yaml b/arch/inst/Zfh/flh.yaml index 1d5ec8aa8..d8d1fd79b 100644 --- a/arch/inst/Zfh/flh.yaml +++ b/arch/inst/Zfh/flh.yaml @@ -27,7 +27,7 @@ flh: vs: always vu: always operation(): | - check_f_ok(); + check_f_ok($encoding); XReg virtual_address = X[rs1] + $signed(imm); diff --git a/arch/inst/Zfh/fmv.h.x.yaml b/arch/inst/Zfh/fmv.h.x.yaml index 77c9e98ef..43b019538 100644 --- a/arch/inst/Zfh/fmv.h.x.yaml +++ b/arch/inst/Zfh/fmv.h.x.yaml @@ -22,7 +22,7 @@ fmv.h.x: vs: always vu: always operation(): | - check_f_ok(); + check_f_ok($encoding); Bits<16> hp_value = X[rs1][15:0]; diff --git a/arch/inst/Zfh/fmv.x.h.yaml b/arch/inst/Zfh/fmv.x.h.yaml index 1a32d7145..77d0314b2 100644 --- a/arch/inst/Zfh/fmv.x.h.yaml +++ b/arch/inst/Zfh/fmv.x.h.yaml @@ -27,6 +27,6 @@ fmv.x.h: vs: always vu: always operation(): | - check_f_ok(); + check_f_ok($encoding); X[rd] = sext(f[fs1][15:0], 16); diff --git a/arch/inst/Zfh/fsh.yaml b/arch/inst/Zfh/fsh.yaml index f115a9662..1a9e974f2 100644 --- a/arch/inst/Zfh/fsh.yaml +++ b/arch/inst/Zfh/fsh.yaml @@ -30,7 +30,7 @@ fsh: vs: always vu: always operation(): | - check_f_ok(); + check_f_ok($encoding); XReg virtual_address = X[rs1] + $signed(imm); diff --git a/arch/isa/builtin_functions.idl b/arch/isa/builtin_functions.idl index 1af755566..076984752 100644 --- a/arch/isa/builtin_functions.idl +++ b/arch/isa/builtin_functions.idl @@ -227,93 +227,6 @@ builtin function prefetch_write { } } -# TODO: REMOVE THESE AFTER MERGE WITH FP BRANCH! -builtin function check_f_ok { - description { REmove me. } -} -builtin function mark_f_state_dirty { - description { Remove me. } -} - -# TODO: move this *fixed* function to fp.idl -function nan_box { - template U32 FROM_SIZE, U32 TO_SIZE - returns Bits - arguments Bits from_value - description { - Produces a properly NaN-boxed floating-point value from a floating-point value - of smaller size by adding all 1's to the upper bits. - } - body { - assert(FROM_SIZE < TO_SIZE, "Bad template arugments; FROM_SIZE must be less than TO_SIZE"); - - return {{TO_SIZE - FROM_SIZE{1'b1}}, from_value}; - } -} -Bits<32> SP_POS_INF = 32'b0_11111111_00000000000000000000000; -Bits<32> SP_NEG_INF = 32'b1_11111111_00000000000000000000000; -Bits<32> SP_POS_ZERO = 32'b0_00000000_00000000000000000000000; -Bits<32> SP_NEG_ZERO = 32'b1_00000000_00000000000000000000000; -Bits<32> SP_CANONICAL_NAN = 32'b0_11111111_10000000000000000000000; -Bits<16> HP_CANONICAL_NAN = 16'b0_11111_1000000000; -Bits<32> WORD_NEG_OVERFLOW = 32'h8000_0000; # minimum 32-bit integer -Bits<32> WORD_POS_OVERFLOW = 32'h7FFF_FFFF; # maximum 32-bit integer -enum FpFlag { - NX 0b00001 # Inexact - UF 0b00010 # Underflow - OF 0b00100 # Overflow - DZ 0b01000 # Divide by zero - NV 0b10000 # Invalid Operation -} -builtin function set_fp_flag { - arguments - FpFlag f - description { Remove me. } -} -function packToF32UI { - returns Bits<32> - arguments - Bits<1> sign, - Bits<8> exp, - Bits<23> sig - description { - Pack components into a 32-bit value - } - body { - return {sign, exp, sig}; - } -} - -# TODO: THis needs to move to fp.idl -function packToF16UI { - returns Bits<32> - arguments - Bits<1> sign, - Bits<5> exp, - Bits<10> sig - description { - Pack components into a 16-bit value - } - body { - return {sign, exp, sig}; - } -} - -# TODO: This need to move to fp.idl -function softfloat_normSubnormalF16Sig { - returns Bits<5>, Bits<10> - arguments - Bits<16> hp_value - description { - normalize subnormal half-precision value - } - body { - Bits<8> shift_dist = count_leading_zeros<16>(hp_value); - return {1 - shift_dist, hp_value << shift_dist}; - } -} - - builtin function fence { arguments Boolean pi, Boolean pr, Boolean po, Boolean pw, diff --git a/arch/isa/fp.idl b/arch/isa/fp.idl new file mode 100644 index 000000000..6ddb70dd6 --- /dev/null +++ b/arch/isa/fp.idl @@ -0,0 +1,487 @@ +%version: 1.0 + +# Many functions in this file (and all prefixed with softfloat_*) are +# adapted from berkeley-softfloat-3 by John R. Hauser +# (https://github.com/ucb-bar/berkeley-softfloat-3) +# Files in berkely-softfloat-3 repository are licensed under BSD-3-clause. + +# floating point register file +U32 FLEN = 64; # implemented?(ExtensionName::D) ? 7'd64 : 7'd32; +Bits f[32] = [0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0]; + +# FP constants +Bits<32> SP_POS_INF = 32'b0_11111111_00000000000000000000000; +Bits<32> SP_NEG_INF = 32'b1_11111111_00000000000000000000000; +Bits<32> SP_POS_ZERO = 32'b0_00000000_00000000000000000000000; +Bits<32> SP_NEG_ZERO = 32'b1_00000000_00000000000000000000000; +Bits<32> SP_CANONICAL_NAN = 32'b0_11111111_10000000000000000000000; +Bits<16> HP_CANONICAL_NAN = 16'b0_11111_1000000000; + +Bits<32> WORD_NEG_OVERFLOW = 32'h8000_0000; # minimum 32-bit integer +Bits<32> WORD_POS_OVERFLOW = 32'h7FFF_FFFF; # maximum 32-bit integer + +enum RoundingMode { + RNE 0b000 # Round to Nearest, ties to Even + RTZ 0b001 # Round toward Zero + RDN 0b010 # Round Down (towards -∞) + RUP 0b011 # Round Up (towards +∞) + RMM 0b100 # Round to Nearest, ties to Max Magnitude + DYN 0b111 # Dynamic; use rm field in instruction +} + +enum FpFlag { + NX 0b00001 # Inexact + UF 0b00010 # Underflow + OF 0b00100 # Overflow + DZ 0b01000 # Divide by zero + NV 0b10000 # Invalid Operation +} + +function set_fp_flag { + arguments + FpFlag flag + description { + Add +flag+ to the sticky flags bits in CSR[fcsr] + } + body { + if (flag == FpFlag::NX) { + CSR[fcsr].NX = 1; + } else if (flag == FpFlag::UF) { + CSR[fcsr].UF = 1; + } else if (flag == FpFlag::OF) { + CSR[fcsr].OF = 1; + } else if (flag == FpFlag::DZ) { + CSR[fcsr].DZ = 1; + } else if (flag == FpFlag::NV) { + CSR[fcsr].NV = 1; + } + } +} + +function rm_to_mode { + returns RoundingMode + arguments + Bits<3> rm, # rm field from an instruction encoding + Bits<32> encoding # instruction encoding, needed to raise an exception + description { + Convert +rm+ to a RoundingMode. + + +encoding+ is the full encoding of the instruction +rm+ comes from. + + Will raise an IllegalInstruction exception if rm is a + reserved encoding. + } + body { + if (rm == $bits(RoundingMode::RNE)) { + return RoundingMode::RNE; + } else if (rm == $bits(RoundingMode::RTZ)) { + return RoundingMode::RTZ; + } else if (rm == $bits(RoundingMode::RDN)) { + return RoundingMode::RDN; + } else if (rm == $bits(RoundingMode::RUP)) { + return RoundingMode::RUP; + } else if (rm == $bits(RoundingMode::RMM)) { + return RoundingMode::RMM; + } else if (rm == $bits(RoundingMode::DYN)) { + return CSR[fcsr].FRM; + } else { + raise(ExceptionCode::IllegalInstruction, mode(), encoding); + } + } +} + +function mark_f_state_dirty { + description { + Potentially updates `mstatus.FS` to the Dirty (3) state, depending on configuration settings. + } + body { + if (HW_MSTATUS_FS_DIRTY_UPDATE== "precise") { + CSR[mstatus].FS = 3; # set dirty state + } else if (HW_MSTATUS_FS_DIRTY_UPDATE == "imprecise") { + unpredictable("The hart may or may not update mstatus.FS now"); + } + } +} + +function nan_box { + template U32 FROM_SIZE, U32 TO_SIZE + returns Bits + arguments Bits from_value + description { + Produces a properly NaN-boxed floating-point value from a floating-point value + of smaller size by adding all 1's to the upper bits. + } + body { + assert(FROM_SIZE < TO_SIZE, "Bad template arugments; FROM_SIZE must be less than TO_SIZE"); + + return {{TO_SIZE - FROM_SIZE{1'b1}}, from_value}; + } +} + +function check_f_ok { + arguments + Bits encoding + description { + Checks if instructions from the `F` extension can be executed, and, if not, + raise an exception. + } + body { + if (MUTABLE_MISA_F && CSR[misa].F == 0) { + raise(ExceptionCode::IllegalInstruction, mode(), encoding); + } + + if (CSR[mstatus].FS == 0) { + raise(ExceptionCode::IllegalInstruction, mode(), encoding); + } + } +} + +function is_sp_neg_inf? { + returns Boolean + arguments Bits<32> sp_value + description { + Return true if +sp_value+ is negative infinity. + } + body { + return sp_value == SP_NEG_INF; + } +} + +function is_sp_pos_inf? { + returns Boolean + arguments Bits<32> sp_value + description { + Return true if +sp_value+ is positive infinity. + } + body { + return sp_value == SP_POS_INF; + } +} + +function is_sp_neg_norm? { + returns Boolean + arguments Bits<32> sp_value + description { + Returns true if +sp_value+ is a negative normal number. + } + body { + return + (sp_value[31] == 1) # negative + && (sp_value[30:23] != 0b11111111) # not inf/NaN + && !( # not subnornmal + (sp_value[30:23] == 0b00000000) + && sp_value[22:0] != 0 + ); + } +} + +function is_sp_pos_norm? { + returns Boolean + arguments Bits<32> sp_value + description { + Returns true if +sp_value+ is a positive normal number. + } + body { + return + (sp_value[31] == 0) # positive + && (sp_value[30:23] != 0b11111111) # not inf/NaN + && !( # not subnornmal + (sp_value[30:23] == 0b00000000) + && sp_value[22:0] != 0 + ); + } +} + +function is_sp_neg_subnorm? { + returns Boolean + arguments Bits<32> sp_value + description { + Returns true if +sp_value+ is a negative subnormal number. + } + body { + return + (sp_value[31] == 1) # negative + && (sp_value[30:23] == 0) # subnormal exponent + && (sp_value[22:0] != 0); # not zero + } +} + +function is_sp_pos_subnorm? { + returns Boolean + arguments Bits<32> sp_value + description { + Returns true if +sp_value+ is a positive subnormal number. + } + body { + return + (sp_value[31] == 0) # positive + && (sp_value[30:23] == 0) # subnormal exponent + && (sp_value[22:0] != 0); # not zero + } +} + +function is_sp_neg_zero? { + returns Boolean + arguments Bits<32> sp_value + description { + Returns true if +sp_value+ is negative zero. + } + body { + return sp_value == SP_NEG_ZERO; + } +} + +function is_sp_pos_zero? { + returns Boolean + arguments Bits<32> sp_value + description { + Returns true if +sp_value+ is positive zero. + } + body { + return sp_value == SP_POS_ZERO; + } +} + +function is_sp_nan? { + returns Boolean + arguments Bits<32> sp_value + description { + Returns true if +sp_value+ is a NaN (quiet or signaling) + } + body { + return + (sp_value[30:23] == 0b11111111) + && (sp_value[22:0] != 0); # signaling bit + } +} + +function is_sp_signaling_nan? { + returns Boolean + arguments Bits<32> sp_value + description { + Returns true if +sp_value+ is a signaling NaN + } + body { + return + (sp_value[30:23] == 0b11111111) + && (sp_value[22] == 0) # signaling bit + && (sp_value[21:0] != 0); # not infinity + } +} + +function is_sp_quiet_nan? { + returns Boolean + arguments Bits<32> sp_value + description { + Returns true if +sp_value+ is a quiet NaN + } + body { + return + (sp_value[30:23] == 0b11111111) + && (sp_value[22] == 1); # signaling bit + } +} + +function softfloat_shiftRightJam32 { + returns Bits<32> + arguments + Bits<32> a, + Bits<32> dist + description { + Shifts +a+ right by the number of bits given in +dist+, which must not + be zero. If any nonzero bits are shifted off, they are "jammed" into the + least-significant bit of the shifted value by setting the least-significant + bit to 1. This shifted-and-jammed value is returned. + The value of +dist+ can be arbitrarily large. In particular, if +dist+ is + greater than 32, the result will be either 0 or 1, depending on whether +a+ + is zero or nonzero. + } + body { + return (dist < 31) ? a>>dist | (((a<<(-dist & 31)) != 0) ? 1 : 0) : ((a != 0) ? 1 : 0); + } +} + +function softfloat_shiftRightJam64 { + returns Bits<64> + arguments + Bits<64> a, + Bits<32> dist + description { + Shifts +a+ right by the number of bits given in +dist+, which must not + be zero. If any nonzero bits are shifted off, they are "jammed" into the + least-significant bit of the shifted value by setting the least-significant + bit to 1. This shifted-and-jammed value is returned. + + The value of 'dist' can be arbitrarily large. In particular, if +dist+ is + greater than 64, the result will be either 0 or 1, depending on whether +a+ + is zero or nonzero. + } + body { + return (dist < 63) ? a>>dist | (((a<<(-dist & 63)) != 0) ? 1 : 0) : ((a != 0) ? 1 : 0); + } +} + +function softfloat_roundToI32 { + returns Bits<32> + arguments + Bits<1> sign, + Bits<64> sig, + RoundingMode roundingMode + description { + Round to unsigned 32-bit integer, using +rounding_mode+ + } + body { + Bits<16> roundIncrement = 0x800; + if ( + (roundingMode != RoundingMode::RMM) + && (roundingMode != RoundingMode::RNE) + ) { + roundIncrement = 0; + if ( + sign == 1 + ? (roundingMode == RoundingMode::RDN) + : (roundingMode == RoundingMode::RUP) + ) { + roundIncrement = 0xFFF; + } + } + Bits<16> roundBits = sig & 0xFFF; + sig = sig + roundIncrement; + if ((sig & 0xFFFFF00000000000) != 0) { + set_fp_flag(FpFlag::NV); + return sign == 1 ? WORD_NEG_OVERFLOW : WORD_POS_OVERFLOW; + } + + Bits<32> sig32 = sig >> 12; + if ( + (roundBits == 0x800 && (roundingMode == RoundingMode::RNE)) + ) { + sig32 = sig32 & ~32'b1; + } + + Bits<32> z = (sign == 1) ? -sig32 : sig32; + if ((z != 0) && (($signed(z) < 0) != (sign == 1))) { + set_fp_flag(FpFlag::NV); + return sign == 1 ? WORD_NEG_OVERFLOW : WORD_POS_OVERFLOW; + } + + if (roundBits != 0) { + set_fp_flag(FpFlag::NX); + } + return z; + } +} + +function packToF32UI { + returns Bits<32> + arguments + Bits<1> sign, + Bits<8> exp, + Bits<23> sig + description { + Pack components into a 32-bit value + } + body { + return {sign, exp, sig}; + } +} + +function packToF16UI { + returns Bits<32> + arguments + Bits<1> sign, + Bits<5> exp, + Bits<10> sig + description { + Pack components into a 16-bit value + } + body { + return {sign, exp, sig}; + } +} + +function softfloat_normSubnormalF16Sig { + returns Bits<5>, Bits<10> + arguments + Bits<16> hp_value + description { + normalize subnormal half-precision value + } + body { + Bits<8> shift_dist = count_leading_zeros<16>(hp_value); + return {1 - shift_dist, hp_value << shift_dist}; + } +} + +function softfloat_normRoundPackToF32 { + returns Bits<32> + arguments + Bits<1> sign, + Bits<8> exp, + Bits<23> sig, + RoundingMode mode + description { + Normalize, round, and pack into a 32-bit floating point value + } + body { + Bits<8> shiftDist = count_leading_zeros<32>(sig) - 1; + exp = exp - shiftDist; + if ((7 <= shiftDist) && (exp < 0xFD)) { + return packToF32UI(sign, (sig != 0) ? exp : 0, sig << (shiftDist - 7)); + } else { + return softfloat_roundPackToF32(sign, exp, sig << shiftDist, mode); + } + } +} + +function softfloat_roundPackToF32 { + returns Bits<32> # single precision value + arguments + Bits<1> sign, + Bits<8> exp, + Bits<23> sig, + RoundingMode mode + description { + Round FP value according to +mdode+ and then pack it in IEEE format. + } + body { + Bits<8> roundIncrement = 0x40; + if ( (mode != RoundingMode::RNE) && (mode != RoundingMode::RMM)) { + roundIncrement = + (mode == ((sign != 0) ? RoundingMode::RDN : RoundingMode::RUP)) + ? 0x7F + : 0; + } + Bits<8> roundBits = sig & 0x7f; + + if ( 0xFD <= exp ) { + if ($signed(exp) < 0) { + Boolean isTiny = + ($signed(exp) < -8's1) || (sig + roundIncrement < 0x80000000); + sig = softfloat_shiftRightJam32( sig, -exp ); + exp = 0; + roundBits = sig & 0x7F; + if (isTiny && (roundBits != 0)) { + set_fp_flag(FpFlag::UF); + } + } else if (0xFD < $signed(exp) || (0x80000000 <= sig + roundIncrement)) { + set_fp_flag(FpFlag::OF); + set_fp_flag(FpFlag::NX); + return packToF32UI(sign, 0xFF, 0) - ((roundIncrement == 0) ? 1 : 0); + } + } + + sig = (sig + roundIncrement) >> 7; + if (roundBits != 0) { + set_fp_flag(FpFlag::NX); + } + sig = sig & ~((roundBits ^ 0x40) & ((mode == RoundingMode::RNE) ? 1 : 0)); + if ( sig == 0 ) { + exp = 0; + } + return packToF32UI(sign, exp, sig); + } +} diff --git a/arch/isa/globals.isa b/arch/isa/globals.isa index fb08d2805..88b789045 100644 --- a/arch/isa/globals.isa +++ b/arch/isa/globals.isa @@ -2,6 +2,7 @@ include "builtin_functions.idl" include "util.idl" +include "fp.idl" # global state @@ -144,14 +145,6 @@ enum XRegWidth { # StoreAmoGuestPageFault 23 # } -enum RoundingMode { - RNE 0 # Round to nearest, ties to even - RTZ 1 # Round toward zero - RDN 2 # Round down (towards -inf) - RUP 3 # Round up (towards +inf) - RMM 4 # Round to nearest, ties to Max Magnitude -} - enum SatpMode { Bare 0 Sv32 1 @@ -225,14 +218,6 @@ bitfield (64) Sv39PageTableEntry { V 0 } -# floating point register file -# U32 FLEN = implemented?(ExtensionName::D) ? 7'd64 : 7'd32; -U32 FLEN = 7'd64; -Bits f[32] = [0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0]; - PrivilegeMode current_mode = PrivilegeMode::M; function mode { diff --git a/lib/idl/ast.rb b/lib/idl/ast.rb index c8de48768..b6a50ddec 100644 --- a/lib/idl/ast.rb +++ b/lib/idl/ast.rb @@ -3522,7 +3522,11 @@ def type_check(symtab) end when "!" unless exp.type(symtab).convertable_to?(:boolean) - type_error "#{exp.type(symtab)} does not support unary #{op} operator" + if exp.type(symtab).kind == :bits + type_error "#{exp.type(symtab)} does not support unary #{op} operator. Perhaps you want '#{exp.text_value} != 0'?" + else + type_error "#{exp.type(symtab)} does not support unary #{op} operator" + end end else internal_error "Unhandled op #{op}" @@ -4545,9 +4549,9 @@ def type_check(symtab) func_def_type = func_type(symtab) - type_error "Missing template arguments in call to #{@name}" if template? && func_def_type.template_names.empty? + type_error "Template arguments provided in call to non-template function #{@name}" if template? && func_def_type.template_names.empty? - type_error "Template arguments provided in call to non-template function #{@name}" if !template? && !func_def_type.template_names.empty? + type_error "Missing template arguments in call to #{@name}" if !template? && !func_def_type.template_names.empty? if template? num_targs = template_arg_nodes.size @@ -4880,6 +4884,8 @@ def arguments(symtab) @argument_nodes.each do |a| atype = a.type(symtab) + type_error "No type for #{a.text_value}" if atype.nil? + atype = atype.ref_type if atype.kind == :enum arglist << [atype, a.name] @@ -5440,7 +5446,14 @@ def type_check(symtab) level = symtab.levels if_cond.type_check(symtab) - type_error "'#{if_cond.text_value}' is not boolean" unless if_cond.type(symtab).convertable_to?(:boolean) + + unless if_cond.type(symtab).convertable_to?(:boolean) + if if_cond.type(symtab).kind == :bits + type_error "'#{if_cond.text_value}' is not boolean. Maybe you meant 'if ((#{if_cond.text_value}) != 0)'?" + else + type_error "'#{if_cond.text_value}' is not boolean" + end + end if_cond_value = nil value_try do From 38051d10dee5b58a0601e8cde3ba23f138f7d9f8 Mon Sep 17 00:00:00 2001 From: Derek Hower Date: Thu, 17 Oct 2024 10:57:28 -0700 Subject: [PATCH 4/6] Add missing parameter to generic_rv64 --- cfgs/generic_rv64/params.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/cfgs/generic_rv64/params.yaml b/cfgs/generic_rv64/params.yaml index 68a209e30..adb6ba790 100644 --- a/cfgs/generic_rv64/params.yaml +++ b/cfgs/generic_rv64/params.yaml @@ -508,3 +508,4 @@ params: MSTATUS_FS_LEGAL_VALUES: [0,1,2,3] MSTATUS_FS_WRITEABLE: true MSTATUS_TVM_IMPLEMENTED: true + HW_MSTATUS_FS_DIRTY_UPDATE: precise From 6e4605fc545140de93ef80c4f07e84c366924ce4 Mon Sep 17 00:00:00 2001 From: Afonso Oliveira Date: Fri, 18 Oct 2024 12:31:29 +0100 Subject: [PATCH 5/6] Fixed files organization and pseudo-instructions Signed-off-by: Afonso Oliveira --- arch/inst/F/fabs.s.yaml | 25 ------------------------- arch/inst/F/fmv.s.x.yaml | 23 ----------------------- arch/inst/F/fmv.s.yaml | 25 ------------------------- arch/inst/F/fmv.x.s.yaml | 23 ----------------------- arch/inst/F/fneg.s.yaml | 25 ------------------------- arch/inst/F/frcsr.yaml | 21 --------------------- arch/inst/F/frflags.yaml | 21 --------------------- arch/inst/F/frrm.yaml | 21 --------------------- arch/inst/F/fscsr.yaml | 23 ----------------------- arch/inst/F/fsflags.yaml | 23 ----------------------- arch/inst/F/fsflagsi.yaml | 23 ----------------------- arch/inst/F/fsgnj.s.yaml | 4 ++++ arch/inst/F/fsgnjn.s.yaml | 4 ++++ arch/inst/F/fsgnjx.s.yaml | 3 +++ arch/inst/F/fsrm.yaml | 23 ----------------------- arch/inst/F/fsrmi.yaml | 23 ----------------------- 16 files changed, 11 insertions(+), 299 deletions(-) delete mode 100644 arch/inst/F/fabs.s.yaml delete mode 100644 arch/inst/F/fmv.s.x.yaml delete mode 100644 arch/inst/F/fmv.s.yaml delete mode 100644 arch/inst/F/fmv.x.s.yaml delete mode 100644 arch/inst/F/fneg.s.yaml delete mode 100644 arch/inst/F/frcsr.yaml delete mode 100644 arch/inst/F/frflags.yaml delete mode 100644 arch/inst/F/frrm.yaml delete mode 100644 arch/inst/F/fscsr.yaml delete mode 100644 arch/inst/F/fsflags.yaml delete mode 100644 arch/inst/F/fsflagsi.yaml delete mode 100644 arch/inst/F/fsrm.yaml delete mode 100644 arch/inst/F/fsrmi.yaml diff --git a/arch/inst/F/fabs.s.yaml b/arch/inst/F/fabs.s.yaml deleted file mode 100644 index 86fdb0354..000000000 --- a/arch/inst/F/fabs.s.yaml +++ /dev/null @@ -1,25 +0,0 @@ -# yaml-language-server: $schema=../../../schemas/inst_schema.json - -fabs.s: - long_name: No synopsis available. - description: | - No description available. - definedBy: F - assembly: xd, xs1, xs2=xs1 - encoding: - match: 0010000----------010-----1010011 - variables: - - name: rs2=rs1 - location: 24-20 - - name: rs1 - location: 19-15 - - name: rd - location: 11-7 - access: - s: always - u: always - vs: always - vu: always - data_independent_timing: true - operation(): | - diff --git a/arch/inst/F/fmv.s.x.yaml b/arch/inst/F/fmv.s.x.yaml deleted file mode 100644 index 25cbab317..000000000 --- a/arch/inst/F/fmv.s.x.yaml +++ /dev/null @@ -1,23 +0,0 @@ -# yaml-language-server: $schema=../../../schemas/inst_schema.json - -fmv.s.x: - long_name: No synopsis available. - description: | - No description available. - definedBy: F - assembly: xd, xs1 - encoding: - match: 111100000000-----000-----1010011 - variables: - - name: rs1 - location: 19-15 - - name: rd - location: 11-7 - access: - s: always - u: always - vs: always - vu: always - data_independent_timing: true - operation(): | - diff --git a/arch/inst/F/fmv.s.yaml b/arch/inst/F/fmv.s.yaml deleted file mode 100644 index 70cf55904..000000000 --- a/arch/inst/F/fmv.s.yaml +++ /dev/null @@ -1,25 +0,0 @@ -# yaml-language-server: $schema=../../../schemas/inst_schema.json - -fmv.s: - long_name: No synopsis available. - description: | - No description available. - definedBy: F - assembly: xd, xs1, xs2=xs1 - encoding: - match: 0010000----------000-----1010011 - variables: - - name: rs2=rs1 - location: 24-20 - - name: rs1 - location: 19-15 - - name: rd - location: 11-7 - access: - s: always - u: always - vs: always - vu: always - data_independent_timing: true - operation(): | - diff --git a/arch/inst/F/fmv.x.s.yaml b/arch/inst/F/fmv.x.s.yaml deleted file mode 100644 index 035e0b230..000000000 --- a/arch/inst/F/fmv.x.s.yaml +++ /dev/null @@ -1,23 +0,0 @@ -# yaml-language-server: $schema=../../../schemas/inst_schema.json - -fmv.x.s: - long_name: No synopsis available. - description: | - No description available. - definedBy: F - assembly: xd, xs1 - encoding: - match: 111000000000-----000-----1010011 - variables: - - name: rs1 - location: 19-15 - - name: rd - location: 11-7 - access: - s: always - u: always - vs: always - vu: always - data_independent_timing: true - operation(): | - diff --git a/arch/inst/F/fneg.s.yaml b/arch/inst/F/fneg.s.yaml deleted file mode 100644 index 6ac4419be..000000000 --- a/arch/inst/F/fneg.s.yaml +++ /dev/null @@ -1,25 +0,0 @@ -# yaml-language-server: $schema=../../../schemas/inst_schema.json - -fneg.s: - long_name: No synopsis available. - description: | - No description available. - definedBy: F - assembly: xd, xs1, xs2=xs1 - encoding: - match: 0010000----------001-----1010011 - variables: - - name: rs2=rs1 - location: 24-20 - - name: rs1 - location: 19-15 - - name: rd - location: 11-7 - access: - s: always - u: always - vs: always - vu: always - data_independent_timing: true - operation(): | - diff --git a/arch/inst/F/frcsr.yaml b/arch/inst/F/frcsr.yaml deleted file mode 100644 index 9ad4f1755..000000000 --- a/arch/inst/F/frcsr.yaml +++ /dev/null @@ -1,21 +0,0 @@ -# yaml-language-server: $schema=../../../schemas/inst_schema.json - -frcsr: - long_name: No synopsis available. - description: | - No description available. - definedBy: F - assembly: xd - encoding: - match: 00000000001100000010-----1110011 - variables: - - name: rd - location: 11-7 - access: - s: always - u: always - vs: always - vu: always - data_independent_timing: true - operation(): | - diff --git a/arch/inst/F/frflags.yaml b/arch/inst/F/frflags.yaml deleted file mode 100644 index b4f10c41e..000000000 --- a/arch/inst/F/frflags.yaml +++ /dev/null @@ -1,21 +0,0 @@ -# yaml-language-server: $schema=../../../schemas/inst_schema.json - -frflags: - long_name: No synopsis available. - description: | - No description available. - definedBy: F - assembly: xd - encoding: - match: 00000000000100000010-----1110011 - variables: - - name: rd - location: 11-7 - access: - s: always - u: always - vs: always - vu: always - data_independent_timing: true - operation(): | - diff --git a/arch/inst/F/frrm.yaml b/arch/inst/F/frrm.yaml deleted file mode 100644 index 1ccf97eec..000000000 --- a/arch/inst/F/frrm.yaml +++ /dev/null @@ -1,21 +0,0 @@ -# yaml-language-server: $schema=../../../schemas/inst_schema.json - -frrm: - long_name: No synopsis available. - description: | - No description available. - definedBy: F - assembly: xd - encoding: - match: 00000000001000000010-----1110011 - variables: - - name: rd - location: 11-7 - access: - s: always - u: always - vs: always - vu: always - data_independent_timing: true - operation(): | - diff --git a/arch/inst/F/fscsr.yaml b/arch/inst/F/fscsr.yaml deleted file mode 100644 index 5dfe44c9a..000000000 --- a/arch/inst/F/fscsr.yaml +++ /dev/null @@ -1,23 +0,0 @@ -# yaml-language-server: $schema=../../../schemas/inst_schema.json - -fscsr: - long_name: No synopsis available. - description: | - No description available. - definedBy: F - assembly: xd, xs1 - encoding: - match: 000000000011-----001-----1110011 - variables: - - name: rs1 - location: 19-15 - - name: rd - location: 11-7 - access: - s: always - u: always - vs: always - vu: always - data_independent_timing: true - operation(): | - diff --git a/arch/inst/F/fsflags.yaml b/arch/inst/F/fsflags.yaml deleted file mode 100644 index d452d6301..000000000 --- a/arch/inst/F/fsflags.yaml +++ /dev/null @@ -1,23 +0,0 @@ -# yaml-language-server: $schema=../../../schemas/inst_schema.json - -fsflags: - long_name: No synopsis available. - description: | - No description available. - definedBy: F - assembly: xd, xs1 - encoding: - match: 000000000001-----001-----1110011 - variables: - - name: rs1 - location: 19-15 - - name: rd - location: 11-7 - access: - s: always - u: always - vs: always - vu: always - data_independent_timing: true - operation(): | - diff --git a/arch/inst/F/fsflagsi.yaml b/arch/inst/F/fsflagsi.yaml deleted file mode 100644 index f16eb25b4..000000000 --- a/arch/inst/F/fsflagsi.yaml +++ /dev/null @@ -1,23 +0,0 @@ -# yaml-language-server: $schema=../../../schemas/inst_schema.json - -fsflagsi: - long_name: No synopsis available. - description: | - No description available. - definedBy: F - assembly: xd, imm - encoding: - match: 000000000001-----101-----1110011 - variables: - - name: uimm - location: 19-15 - - name: rd - location: 11-7 - access: - s: always - u: always - vs: always - vu: always - data_independent_timing: true - operation(): | - diff --git a/arch/inst/F/fsgnj.s.yaml b/arch/inst/F/fsgnj.s.yaml index 2843a7fea..cfb1d0def 100644 --- a/arch/inst/F/fsgnj.s.yaml +++ b/arch/inst/F/fsgnj.s.yaml @@ -24,6 +24,10 @@ fsgnj.s: vs: always vu: always data_independent_timing: true + pseudoinstructions: + - when: (rs2 == rs1) + to: fmv.s + operation(): | check_f_ok($encoding); diff --git a/arch/inst/F/fsgnjn.s.yaml b/arch/inst/F/fsgnjn.s.yaml index 0dc611873..6baa35d88 100644 --- a/arch/inst/F/fsgnjn.s.yaml +++ b/arch/inst/F/fsgnjn.s.yaml @@ -23,6 +23,10 @@ fsgnjn.s: vs: always vu: always data_independent_timing: true + pseudoinstructions: + - when: (rs2 == rs1) + to: fneg.s + operation(): | check_f_ok($encoding); diff --git a/arch/inst/F/fsgnjx.s.yaml b/arch/inst/F/fsgnjx.s.yaml index 7dcb02133..7a27be68c 100644 --- a/arch/inst/F/fsgnjx.s.yaml +++ b/arch/inst/F/fsgnjx.s.yaml @@ -23,6 +23,9 @@ fsgnjx.s: vs: always vu: always data_independent_timing: true + pseudoinstructions: + - when: (rs2 == rs1) + to: fabs.s operation(): | check_f_ok($encoding); diff --git a/arch/inst/F/fsrm.yaml b/arch/inst/F/fsrm.yaml deleted file mode 100644 index a9381751c..000000000 --- a/arch/inst/F/fsrm.yaml +++ /dev/null @@ -1,23 +0,0 @@ -# yaml-language-server: $schema=../../../schemas/inst_schema.json - -fsrm: - long_name: No synopsis available. - description: | - No description available. - definedBy: F - assembly: xd, xs1 - encoding: - match: 000000000010-----001-----1110011 - variables: - - name: rs1 - location: 19-15 - - name: rd - location: 11-7 - access: - s: always - u: always - vs: always - vu: always - data_independent_timing: true - operation(): | - diff --git a/arch/inst/F/fsrmi.yaml b/arch/inst/F/fsrmi.yaml deleted file mode 100644 index cbbe224db..000000000 --- a/arch/inst/F/fsrmi.yaml +++ /dev/null @@ -1,23 +0,0 @@ -# yaml-language-server: $schema=../../../schemas/inst_schema.json - -fsrmi: - long_name: No synopsis available. - description: | - No description available. - definedBy: F - assembly: xd, imm - encoding: - match: 000000000010-----101-----1110011 - variables: - - name: uimm - location: 19-15 - - name: rd - location: 11-7 - access: - s: always - u: always - vs: always - vu: always - data_independent_timing: true - operation(): | - From 98d6f20562bfa9b9409fea3b7e71636dc0431ed9 Mon Sep 17 00:00:00 2001 From: Afonso Oliveira Date: Fri, 18 Oct 2024 14:18:39 +0100 Subject: [PATCH 6/6] Appropriately Identify floating registers Signed-off-by: Afonso Oliveira --- arch/inst/F/fadd.s.yaml | 8 ++++---- arch/inst/F/fcvt.l.s.yaml | 4 ++-- arch/inst/F/fcvt.lu.s.yaml | 4 ++-- arch/inst/F/fcvt.s.l.yaml | 4 ++-- arch/inst/F/fcvt.s.lu.yaml | 4 ++-- arch/inst/F/fcvt.s.wu.yaml | 4 ++-- arch/inst/F/fcvt.wu.s.yaml | 2 +- arch/inst/F/fdiv.s.yaml | 8 ++++---- arch/inst/F/fleq.s.yaml | 6 +++--- arch/inst/F/fli.s.yaml | 6 +++--- arch/inst/F/fltq.s.yaml | 6 +++--- arch/inst/F/fmadd.s.yaml | 10 +++++----- arch/inst/F/fmax.s.yaml | 8 ++++---- arch/inst/F/fmaxm.s.yaml | 6 +++--- arch/inst/F/fmin.s.yaml | 6 +++--- arch/inst/F/fminm.s.yaml | 8 ++++---- arch/inst/F/fmsub.s.yaml | 10 +++++----- arch/inst/F/fmul.s.yaml | 8 ++++---- arch/inst/F/fnmadd.s.yaml | 10 +++++----- arch/inst/F/fnmsub.s.yaml | 8 ++++---- arch/inst/F/fround.s.yaml | 4 ++-- arch/inst/F/froundnx.s.yaml | 4 ++-- arch/inst/F/fsqrt.s.yaml | 6 +++--- arch/inst/F/fsub.s.yaml | 8 ++++---- 24 files changed, 76 insertions(+), 76 deletions(-) diff --git a/arch/inst/F/fadd.s.yaml b/arch/inst/F/fadd.s.yaml index cf7bc1f24..4c459cb37 100644 --- a/arch/inst/F/fadd.s.yaml +++ b/arch/inst/F/fadd.s.yaml @@ -5,17 +5,17 @@ fadd.s: description: | No description available. definedBy: F - assembly: xd, xs1, xs2, rm + assembly: fd, fs1, fs2, rm encoding: match: 0000000------------------1010011 variables: - - name: rs2 + - name: fs2 location: 24-20 - - name: rs1 + - name: fs1 location: 19-15 - name: rm location: 14-12 - - name: rd + - name: fd location: 11-7 access: s: always diff --git a/arch/inst/F/fcvt.l.s.yaml b/arch/inst/F/fcvt.l.s.yaml index a720124e4..af2b59123 100644 --- a/arch/inst/F/fcvt.l.s.yaml +++ b/arch/inst/F/fcvt.l.s.yaml @@ -6,11 +6,11 @@ fcvt.l.s: No description available. definedBy: F base: 64 - assembly: xd, xs1, rm + assembly: xd, fs1, rm encoding: match: 110000000010-------------1010011 variables: - - name: rs1 + - name: fs1 location: 19-15 - name: rm location: 14-12 diff --git a/arch/inst/F/fcvt.lu.s.yaml b/arch/inst/F/fcvt.lu.s.yaml index d1fe2d5e5..d11be70f7 100644 --- a/arch/inst/F/fcvt.lu.s.yaml +++ b/arch/inst/F/fcvt.lu.s.yaml @@ -6,11 +6,11 @@ fcvt.lu.s: No description available. definedBy: F base: 64 - assembly: xd, xs1, rm + assembly: xd, fs1, rm encoding: match: 110000000011-------------1010011 variables: - - name: rs1 + - name: fs1 location: 19-15 - name: rm location: 14-12 diff --git a/arch/inst/F/fcvt.s.l.yaml b/arch/inst/F/fcvt.s.l.yaml index c7b6ea2e2..e23c2deee 100644 --- a/arch/inst/F/fcvt.s.l.yaml +++ b/arch/inst/F/fcvt.s.l.yaml @@ -6,7 +6,7 @@ fcvt.s.l: No description available. definedBy: F base: 64 - assembly: xd, xs1, rm + assembly: fd, xs1, rm encoding: match: 110100000010-------------1010011 variables: @@ -14,7 +14,7 @@ fcvt.s.l: location: 19-15 - name: rm location: 14-12 - - name: rd + - name: fd location: 11-7 access: s: always diff --git a/arch/inst/F/fcvt.s.lu.yaml b/arch/inst/F/fcvt.s.lu.yaml index 63e9cc7ba..a323d1b27 100644 --- a/arch/inst/F/fcvt.s.lu.yaml +++ b/arch/inst/F/fcvt.s.lu.yaml @@ -6,7 +6,7 @@ fcvt.s.lu: No description available. definedBy: F base: 64 - assembly: xd, xs1, rm + assembly: fd, xs1, rm encoding: match: 110100000011-------------1010011 variables: @@ -14,7 +14,7 @@ fcvt.s.lu: location: 19-15 - name: rm location: 14-12 - - name: rd + - name: fd location: 11-7 access: s: always diff --git a/arch/inst/F/fcvt.s.wu.yaml b/arch/inst/F/fcvt.s.wu.yaml index 4a67932d9..451db4ab1 100644 --- a/arch/inst/F/fcvt.s.wu.yaml +++ b/arch/inst/F/fcvt.s.wu.yaml @@ -5,7 +5,7 @@ fcvt.s.wu: description: | No description available. definedBy: F - assembly: xd, xs1, rm + assembly: fd, xs1, rm encoding: match: 110100000001-------------1010011 variables: @@ -13,7 +13,7 @@ fcvt.s.wu: location: 19-15 - name: rm location: 14-12 - - name: rd + - name: fd location: 11-7 access: s: always diff --git a/arch/inst/F/fcvt.wu.s.yaml b/arch/inst/F/fcvt.wu.s.yaml index 5a56f606e..3ced43a23 100644 --- a/arch/inst/F/fcvt.wu.s.yaml +++ b/arch/inst/F/fcvt.wu.s.yaml @@ -5,7 +5,7 @@ fcvt.wu.s: description: | No description available. definedBy: F - assembly: xd, xs1, rm + assembly: xd, fs1, rm encoding: match: 110000000001-------------1010011 variables: diff --git a/arch/inst/F/fdiv.s.yaml b/arch/inst/F/fdiv.s.yaml index de0f28672..43e135eaf 100644 --- a/arch/inst/F/fdiv.s.yaml +++ b/arch/inst/F/fdiv.s.yaml @@ -5,17 +5,17 @@ fdiv.s: description: | No description available. definedBy: F - assembly: xd, xs1, xs2, rm + assembly: fd, fs1, fs2, rm encoding: match: 0001100------------------1010011 variables: - - name: rs2 + - name: fs2 location: 24-20 - - name: rs1 + - name: fs1 location: 19-15 - name: rm location: 14-12 - - name: rd + - name: fd location: 11-7 access: s: always diff --git a/arch/inst/F/fleq.s.yaml b/arch/inst/F/fleq.s.yaml index f0e2afdc9..fa42d83df 100644 --- a/arch/inst/F/fleq.s.yaml +++ b/arch/inst/F/fleq.s.yaml @@ -5,13 +5,13 @@ fleq.s: description: | No description available. definedBy: F, Zfa - assembly: xd, xs1, xs2 + assembly: xd, fs1, fs2 encoding: match: 1010000----------100-----1010011 variables: - - name: rs2 + - name: fs2 location: 24-20 - - name: rs1 + - name: fs1 location: 19-15 - name: rd location: 11-7 diff --git a/arch/inst/F/fli.s.yaml b/arch/inst/F/fli.s.yaml index d3b5cef6e..e85e01315 100644 --- a/arch/inst/F/fli.s.yaml +++ b/arch/inst/F/fli.s.yaml @@ -5,13 +5,13 @@ fli.s: description: | No description available. definedBy: F, Zfa - assembly: xd, xs1 + assembly: fd, fs1 encoding: match: 111100000001-----000-----1010011 variables: - - name: rs1 + - name: fs1 location: 19-15 - - name: rd + - name: fd location: 11-7 access: s: always diff --git a/arch/inst/F/fltq.s.yaml b/arch/inst/F/fltq.s.yaml index cc12afdad..ce447071b 100644 --- a/arch/inst/F/fltq.s.yaml +++ b/arch/inst/F/fltq.s.yaml @@ -5,13 +5,13 @@ fltq.s: description: | No description available. definedBy: F, Zfa - assembly: xd, xs1, xs2 + assembly: xd, fs1, fs2 encoding: match: 1010000----------101-----1010011 variables: - - name: rs2 + - name: fs2 location: 24-20 - - name: rs1 + - name: fs1 location: 19-15 - name: rd location: 11-7 diff --git a/arch/inst/F/fmadd.s.yaml b/arch/inst/F/fmadd.s.yaml index ec0b49603..468f00381 100644 --- a/arch/inst/F/fmadd.s.yaml +++ b/arch/inst/F/fmadd.s.yaml @@ -5,19 +5,19 @@ fmadd.s: description: | No description available. definedBy: F - assembly: xd, xs1, xs2, xs3, rm + assembly: fd, fs1, fs2, fs3, rm encoding: match: -----00------------------1000011 variables: - - name: rs3 + - name: fs3 location: 31-27 - - name: rs2 + - name: fs2 location: 24-20 - - name: rs1 + - name: fs1 location: 19-15 - name: rm location: 14-12 - - name: rd + - name: fd location: 11-7 access: s: always diff --git a/arch/inst/F/fmax.s.yaml b/arch/inst/F/fmax.s.yaml index b59679224..a0b00dcab 100644 --- a/arch/inst/F/fmax.s.yaml +++ b/arch/inst/F/fmax.s.yaml @@ -5,15 +5,15 @@ fmax.s: description: | No description available. definedBy: F - assembly: xd, xs1, xs2 + assembly: fd, fs1, fs2 encoding: match: 0010100----------001-----1010011 variables: - - name: rs2 + - name: fs2 location: 24-20 - - name: rs1 + - name: fs1 location: 19-15 - - name: rd + - name: fd location: 11-7 access: s: always diff --git a/arch/inst/F/fmaxm.s.yaml b/arch/inst/F/fmaxm.s.yaml index 3eb6aa5cc..c7d75640c 100644 --- a/arch/inst/F/fmaxm.s.yaml +++ b/arch/inst/F/fmaxm.s.yaml @@ -9,11 +9,11 @@ fmaxm.s: encoding: match: 0010100----------011-----1010011 variables: - - name: rs2 + - name: fs2 location: 24-20 - - name: rs1 + - name: fs1 location: 19-15 - - name: rd + - name: fd location: 11-7 access: s: always diff --git a/arch/inst/F/fmin.s.yaml b/arch/inst/F/fmin.s.yaml index 379ba16f7..21689e351 100644 --- a/arch/inst/F/fmin.s.yaml +++ b/arch/inst/F/fmin.s.yaml @@ -9,11 +9,11 @@ fmin.s: encoding: match: 0010100----------000-----1010011 variables: - - name: rs2 + - name: fs2 location: 24-20 - - name: rs1 + - name: fs1 location: 19-15 - - name: rd + - name: fd location: 11-7 access: s: always diff --git a/arch/inst/F/fminm.s.yaml b/arch/inst/F/fminm.s.yaml index cf346b5ac..0cd64b1fd 100644 --- a/arch/inst/F/fminm.s.yaml +++ b/arch/inst/F/fminm.s.yaml @@ -5,15 +5,15 @@ fminm.s: description: | No description available. definedBy: F, Zfa - assembly: xd, xs1, xs2 + assembly: fd, fs1, fs2 encoding: match: 0010100----------010-----1010011 variables: - - name: rs2 + - name: fs2 location: 24-20 - - name: rs1 + - name: fs1 location: 19-15 - - name: rd + - name: fd location: 11-7 access: s: always diff --git a/arch/inst/F/fmsub.s.yaml b/arch/inst/F/fmsub.s.yaml index 17d69fa72..ea8467473 100644 --- a/arch/inst/F/fmsub.s.yaml +++ b/arch/inst/F/fmsub.s.yaml @@ -5,19 +5,19 @@ fmsub.s: description: | No description available. definedBy: F - assembly: xd, xs1, xs2, xs3, rm + assembly: fd, fs1, fs2, fs3, rm encoding: match: -----00------------------1000111 variables: - - name: rs3 + - name: fs3 location: 31-27 - - name: rs2 + - name: fs2 location: 24-20 - - name: rs1 + - name: fs1 location: 19-15 - name: rm location: 14-12 - - name: rd + - name: fd location: 11-7 access: s: always diff --git a/arch/inst/F/fmul.s.yaml b/arch/inst/F/fmul.s.yaml index 0cf9946ed..114850654 100644 --- a/arch/inst/F/fmul.s.yaml +++ b/arch/inst/F/fmul.s.yaml @@ -5,17 +5,17 @@ fmul.s: description: | No description available. definedBy: F - assembly: xd, xs1, xs2, rm + assembly: fd, fs1, fs2, rm encoding: match: 0001000------------------1010011 variables: - - name: rs2 + - name: fs2 location: 24-20 - - name: rs1 + - name: fs1 location: 19-15 - name: rm location: 14-12 - - name: rd + - name: fd location: 11-7 access: s: always diff --git a/arch/inst/F/fnmadd.s.yaml b/arch/inst/F/fnmadd.s.yaml index 79565afc4..d009f4de0 100644 --- a/arch/inst/F/fnmadd.s.yaml +++ b/arch/inst/F/fnmadd.s.yaml @@ -5,19 +5,19 @@ fnmadd.s: description: | No description available. definedBy: F - assembly: xd, xs1, xs2, xs3, rm + assembly: fd, fs1, fs2, fs3, rm encoding: match: -----00------------------1001111 variables: - - name: rs3 + - name: fs3 location: 31-27 - - name: rs2 + - name: fs2 location: 24-20 - - name: rs1 + - name: fs1 location: 19-15 - name: rm location: 14-12 - - name: rd + - name: fd location: 11-7 access: s: always diff --git a/arch/inst/F/fnmsub.s.yaml b/arch/inst/F/fnmsub.s.yaml index e9c24a33a..ec75b319e 100644 --- a/arch/inst/F/fnmsub.s.yaml +++ b/arch/inst/F/fnmsub.s.yaml @@ -9,15 +9,15 @@ fnmsub.s: encoding: match: -----00------------------1001011 variables: - - name: rs3 + - name: fs3 location: 31-27 - - name: rs2 + - name: fs2 location: 24-20 - - name: rs1 + - name: fs1 location: 19-15 - name: rm location: 14-12 - - name: rd + - name: fd location: 11-7 access: s: always diff --git a/arch/inst/F/fround.s.yaml b/arch/inst/F/fround.s.yaml index bac917cab..75e67bb74 100644 --- a/arch/inst/F/fround.s.yaml +++ b/arch/inst/F/fround.s.yaml @@ -5,7 +5,7 @@ fround.s: description: | No description available. definedBy: F, Zfa - assembly: xd, xs1, rm + assembly: fd, xs1, rm encoding: match: 010000000100-------------1010011 variables: @@ -13,7 +13,7 @@ fround.s: location: 19-15 - name: rm location: 14-12 - - name: rd + - name: fd location: 11-7 access: s: always diff --git a/arch/inst/F/froundnx.s.yaml b/arch/inst/F/froundnx.s.yaml index c9efc9423..09e739fc1 100644 --- a/arch/inst/F/froundnx.s.yaml +++ b/arch/inst/F/froundnx.s.yaml @@ -5,7 +5,7 @@ froundnx.s: description: | No description available. definedBy: F, Zfa - assembly: xd, xs1, rm + assembly: fd, rs1, rm encoding: match: 010000000101-------------1010011 variables: @@ -13,7 +13,7 @@ froundnx.s: location: 19-15 - name: rm location: 14-12 - - name: rd + - name: fd location: 11-7 access: s: always diff --git a/arch/inst/F/fsqrt.s.yaml b/arch/inst/F/fsqrt.s.yaml index b6ca4286f..3a623b289 100644 --- a/arch/inst/F/fsqrt.s.yaml +++ b/arch/inst/F/fsqrt.s.yaml @@ -5,15 +5,15 @@ fsqrt.s: description: | No description available. definedBy: F - assembly: xd, xs1, rm + assembly: fd, fs1, rm encoding: match: 010110000000-------------1010011 variables: - - name: rs1 + - name: fs1 location: 19-15 - name: rm location: 14-12 - - name: rd + - name: fd location: 11-7 access: s: always diff --git a/arch/inst/F/fsub.s.yaml b/arch/inst/F/fsub.s.yaml index cbb2f371f..691fda24b 100644 --- a/arch/inst/F/fsub.s.yaml +++ b/arch/inst/F/fsub.s.yaml @@ -5,17 +5,17 @@ fsub.s: description: | No description available. definedBy: F - assembly: xd, xs1, xs2, rm + assembly: fd, fs1, fs2, rm encoding: match: 0000100------------------1010011 variables: - - name: rs2 + - name: fs2 location: 24-20 - - name: rs1 + - name: fs1 location: 19-15 - name: rm location: 14-12 - - name: rd + - name: fd location: 11-7 access: s: always