diff --git a/README.md b/README.md
index 383fc30..637b499 100644
--- a/README.md
+++ b/README.md
@@ -66,6 +66,7 @@ For those with little or no knowledge of digital logic design. After studying th
|**LinuxFoundationX: Building a RISC-V CPU Core** | [Steve Hoover](https://www.edx.org/bio/steve-hoover) | This free EdX course by Steve Hoover (founder of Redwood EDA) is a great way for a beginner to get started with digital logic design and basic RISC-V microarchitecture design with the help of modern, freely available open source tools.
Topics: Digital logic design, RISC-V Instruction Set Architecture (ISA), CPU microarchitecture, Transaction-Level Verilog, Makerchip online IDE| [edX Course Link] | 2024-01-10 |
|**An introduction to Assembly Programming with RISC-V** | [Prof. Edson Borin](https://www.ic.unicamp.br/~edson/index.html) | This book uses RISC-V ISA to teach fundamental assembly programming concepts.
Topics: RISC-V Instruction Set Architecture (ISA), RISC-V assembly| [webpage]| 2024-03-05 |
|**Step-by-step RISC-V OS development** | [Chen Wang](https://github.com/unicornx) | A practical guidance to develop RISC-V operating systems
Topics: RISC-V Instruction Set Architecture (ISA), Operating systems
Requirements: C programming, Data structures, Linux commands| [Teaching resources] [Online course videos in Chineses] | 2024-03-05 |
+|**Step-by-step RISC-V Compiler development** | [Shao-Ce SUN](https://github.com/sunshaoce) | A practical guidance to develop RISC-V C compiler
Topics: RISC-V Instruction Set Architecture (ISA), Compilier
Requirements: C programming, Data structures| [Teaching resources] [Sample code] [Online course videos in Chineses]| 2024-03-20 |