diff --git a/librz/arch/isa/xtensa/xtensa.c b/librz/arch/isa/xtensa/xtensa.c
new file mode 100644
index 00000000000..c2111352d42
--- /dev/null
+++ b/librz/arch/isa/xtensa/xtensa.c
@@ -0,0 +1,68 @@
+// SPDX-FileCopyrightText: 2024 billow <billow.fun@gmail.com>
+// SPDX-License-Identifier: LGPL-3.0-only
+
+#include "xtensa.h"
+
+bool xtensa_init(void **user) {
+ if (*user) {
+ return true;
+ }
+ XtensaContext *ctx = RZ_NEW0(XtensaContext);
+ if (!ctx) {
+ return false;
+ }
+ *user = ctx;
+ return true;
+}
+
+bool xtensa_fini(void *user) {
+ XtensaContext *ctx = user;
+ cs_close(&ctx->handle);
+ free(ctx);
+ return true;
+}
+
+bool xtensa_open(XtensaContext *ctx, const char *cpu, bool big_endian) {
+ if (!ctx) {
+ return false;
+ }
+ cs_mode mode = big_endian ? CS_MODE_BIG_ENDIAN : CS_MODE_LITTLE_ENDIAN;
+ if (RZ_STR_ISEMPTY(cpu)) {
+ mode |= xtensa_cpu_modes[0].mode;
+ } else {
+ for (int i = 0; i < RZ_ARRAY_SIZE(xtensa_cpu_modes); ++i) {
+ if (RZ_STR_EQ(cpu, xtensa_cpu_modes[i].cpu)) {
+ mode |= xtensa_cpu_modes[i].mode;
+ break;
+ }
+ }
+ }
+ if (mode == ctx->mode) {
+ return true;
+ }
+ if (cs_open(CS_ARCH_XTENSA, mode, &ctx->handle) != CS_ERR_OK) {
+ return false;
+ }
+ ctx->mode = mode;
+ if (cs_option(ctx->handle, CS_OPT_DETAIL, CS_OPT_ON) != CS_ERR_OK) {
+ return false;
+ }
+ return true;
+}
+
+bool xtensa_disassemble(XtensaContext *self, const ut8 *buf, int len, ut64 addr) {
+ self->count = cs_disasm(self->handle, buf, len, addr, 1, &self->insn);
+ if (self->count == 0) {
+ return false;
+ }
+ return true;
+}
+
+void xtensa_disassemble_fini(XtensaContext *self) {
+ if (!self->insn) {
+ return;
+ }
+ cs_free(self->insn, self->count);
+ self->insn = NULL;
+ self->count = 0;
+}
diff --git a/librz/arch/isa/xtensa/xtensa.h b/librz/arch/isa/xtensa/xtensa.h
new file mode 100644
index 00000000000..bac49bba876
--- /dev/null
+++ b/librz/arch/isa/xtensa/xtensa.h
@@ -0,0 +1,67 @@
+// SPDX-FileCopyrightText: 2024 billow <billow.fun@gmail.com>
+// SPDX-License-Identifier: LGPL-3.0-only
+
+#ifndef RZ_XTENSA_H
+#define RZ_XTENSA_H
+
+#include <capstone/capstone.h>
+#include <rz_asm.h>
+
+typedef struct {
+ const char *cpu;
+ cs_mode mode;
+} XtensaCPUMode;
+
+static const XtensaCPUMode xtensa_cpu_modes[] = {
+ { .cpu = "esp32", .mode = CS_MODE_XTENSA_ESP32 },
+ { .cpu = "esp32s2", .mode = CS_MODE_XTENSA_ESP32S2 },
+ { .cpu = "esp8266", .mode = CS_MODE_XTENSA_ESP8266 },
+};
+
+typedef struct xtensa_context_t {
+ cs_mode mode;
+ csh handle;
+ cs_insn *insn;
+ size_t count;
+} XtensaContext;
+
+bool xtensa_init(void **user);
+bool xtensa_fini(void *user);
+bool xtensa_open(XtensaContext *ctx, const char *cpu, bool big_endian);
+bool xtensa_disassemble(XtensaContext *self, const ut8 *buf, int len, ut64 addr);
+void xtensa_disassemble_fini(XtensaContext *self);
+void xtensa_analyze_op_esil(XtensaContext *ctx, RzAnalysisOp *op);
+
+static inline cs_xtensa_op_mem *xtensa_op_mem(cs_insn *insn, unsigned int index) {
+ cs_xtensa_op *op = &insn->detail->xtensa.operands[index];
+ rz_warn_if_fail(op->type == XTENSA_OP_MEM);
+ return &op->mem;
+}
+
+static inline xtensa_reg xtensa_op_reg(cs_insn *insn, unsigned int index) {
+ cs_xtensa_op *op = &insn->detail->xtensa.operands[index];
+ rz_warn_if_fail(op->type == XTENSA_OP_REG);
+ return op->reg;
+}
+
+static inline int32_t xtensa_op_imm(cs_insn *insn, unsigned int index) {
+ cs_xtensa_op *op = &insn->detail->xtensa.operands[index];
+ rz_warn_if_fail(op->type == XTENSA_OP_IMM);
+ return op->imm;
+}
+
+static inline int32_t xtensa_op_l32r(cs_insn *insn, unsigned int index) {
+ cs_xtensa_op *op = &insn->detail->xtensa.operands[index];
+ rz_warn_if_fail(op->type == XTENSA_OP_L32R);
+ return op->imm;
+}
+
+#define XOP(I) (ctx->insn->detail->xtensa.operands + I)
+#define MEM(I) xtensa_op_mem(ctx->insn, I)
+#define REGI(I) xtensa_op_reg(ctx->insn, I)
+#define REGN(I) cs_reg_name(ctx->handle, (xtensa_op_reg(ctx->insn, I)))
+#define IMM(I) xtensa_op_imm(ctx->insn, I)
+#define L32R(I) xtensa_op_l32r(ctx->insn, I)
+#define INSN_SIZE (ctx->insn->size)
+
+#endif // RZ_XTENSA_H
diff --git a/librz/arch/isa/xtensa/xtensa_esil.c b/librz/arch/isa/xtensa/xtensa_esil.c
new file mode 100644
index 00000000000..de2822cee05
--- /dev/null
+++ b/librz/arch/isa/xtensa/xtensa_esil.c
@@ -0,0 +1,871 @@
+// SPDX-FileCopyrightText: 2016-2018 pancake <pancake@nopcode.org>
+// SPDX-FileCopyrightText: 2024 billow <billow.fun@gmail.com>
+// SPDX-License-Identifier: LGPL-3.0-only
+
+#include <rz_util.h>
+#include <rz_analysis.h>
+#include <xtensa/xtensa.h>
+#include <capstone/xtensa.h>
+
+#define CM ","
+#define opcode (ctx->insn->id)
+
+static void esil_push_signed_imm(RzStrBuf *esil, st32 imm) {
+ if (imm >= 0) {
+ rz_strbuf_appendf(esil, "0x%x" CM, imm);
+ } else {
+ rz_strbuf_appendf(
+ esil,
+ "0x%x" CM
+ "0x0" CM
+ "-" CM,
+ -imm);
+ }
+}
+
+static void esil_sign_extend(RzStrBuf *esil, ut8 bit) {
+ // check sign bit, and, if needed, apply or mask
+
+ ut32 bit_mask = 1 << bit;
+ ut32 extend_mask = 0xFFFFFFFF << bit;
+
+ rz_strbuf_appendf(
+ esil,
+ "DUP" CM
+ "0x%x" CM
+ "&" CM
+ "0" CM
+ "==,$z,!" CM
+ "?{" CM
+ "0x%x" CM
+ "|" CM
+ "}" CM,
+ bit_mask,
+ extend_mask);
+}
+
+static void esil_load_imm(XtensaContext *ctx, RzAnalysisOp *op) {
+ ut8 sign_extend_bit;
+
+ // example: l32i a2, a1, 0x10
+ // 0x10,a1,+, // address on stack
+ // [x], // read data
+ // a2, // push data reg
+ // = // assign to data reg
+
+ ut8 data_size = 1;
+ sign_extend_bit = 0;
+ switch (opcode) {
+ case XTENSA_INS_L32I: // l32i
+ case XTENSA_INS_L32I_N: // l32i.n
+ data_size = 4;
+ break;
+ case XTENSA_INS_L16SI: // l16si
+ sign_extend_bit = 15;
+ data_size = 2;
+ break;
+ case XTENSA_INS_L16UI: // l16ui
+ data_size = 2;
+ break;
+ }
+
+ rz_strbuf_appendf(
+ &op->esil,
+ "0x%x" CM
+ "%s" CM
+ "+" CM
+ "[%d]" CM,
+ // offset
+ MEM(1)->disp,
+ // address
+ cs_reg_name(ctx->handle, MEM(1)->base),
+ // size
+ data_size);
+
+ if (sign_extend_bit != 0) {
+ esil_sign_extend(&op->esil, sign_extend_bit);
+ }
+
+ rz_strbuf_appendf(
+ &op->esil,
+ "%s" CM
+ "=",
+ // data
+ REGN(0));
+}
+
+static void esil_load_relative(XtensaContext *ctx, RzAnalysisOp *op) {
+ // example: l32r a2, 0x10
+ // 0x10,$$,3,+ // l32r address + 3 on stack
+ // 0xFFFFFFFC,&, // clear 2 lsb
+ // -, // subtract offset
+ // [4], // read data
+ // a2, // push data reg
+ // = // assign to data reg
+
+ rz_strbuf_appendf(
+ &op->esil,
+ "0x%x" CM
+ "[4]" CM
+ "%s" CM
+ "=",
+ // offset
+ L32R(1),
+ // data
+ REGN(0));
+}
+
+static void esil_add_imm(XtensaContext *ctx, RzAnalysisOp *op) {
+ // example: addi a3, a4, 0x01
+ // a4,0x01,+,a3,=
+
+ rz_strbuf_appendf(&op->esil, "%s" CM, REGN(1));
+ esil_push_signed_imm(&op->esil, IMM(2));
+ rz_strbuf_appendf(
+ &op->esil,
+ "+" CM
+ "%s" CM
+ "=",
+ REGN(0));
+}
+
+static void esil_store_imm(XtensaContext *ctx, RzAnalysisOp *op) { // example: s32i a2, a1, 0x10
+ // a2, // push data
+ // 0x10,a1,+, // address on stack
+ // =[x] // write data
+
+ ut8 data_size =
+ opcode == XTENSA_INS_S32I ? 4 // s32cli
+ // : opcode == 36 ? 4 // s32i.n
+ // : opcode == 100 ? 4 // s32i
+ : opcode == XTENSA_INS_S16I ? 2 // s16i
+ : 1; // opcode == 101 ? 1 : 1; // s8i
+
+ rz_strbuf_appendf(
+ &op->esil,
+ "%s" CM
+ "%s" CM
+ "0x%x" CM
+ "+" CM
+ "=[%d]",
+ // data
+ REGN(0),
+ // address
+ cs_reg_name(ctx->handle, MEM(1)->base),
+ // offset
+ MEM(1)->disp,
+ // size
+ data_size);
+}
+
+static void esil_move_imm(XtensaContext *ctx, RzAnalysisOp *op) {
+ esil_push_signed_imm(&op->esil, IMM(1));
+ rz_strbuf_appendf(
+ &op->esil,
+ "%s" CM
+ "=",
+ REGN(0));
+}
+
+static void esil_move(XtensaContext *ctx, RzAnalysisOp *op) {
+ rz_strbuf_appendf(
+ &op->esil,
+ "%s" CM
+ "%s" CM
+ "=",
+ REGN(1),
+ REGN(0));
+}
+
+static void esil_move_conditional(XtensaContext *ctx, RzAnalysisOp *op) {
+ const char *compare_op = "";
+
+ switch (opcode) {
+ case XTENSA_INS_MOVEQZ: /* moveqz */
+ compare_op = "==,$z";
+ break;
+ case XTENSA_INS_MOVNEZ: /* movnez */
+ compare_op = "==,$z,!";
+ break;
+ case XTENSA_INS_MOVLTZ: /* movltz */
+ compare_op = "<";
+ break;
+ case XTENSA_INS_MOVGEZ: /* movgez */
+ compare_op = ">=";
+ break;
+ }
+
+ // example: moveqz a3, a4, a5
+ // 0,
+ // a5,
+ // ==,
+ // ?{,
+ // a4,
+ // a3,
+ // =,
+ // }
+
+ rz_strbuf_appendf(
+ &op->esil,
+ "0" CM
+ "%s" CM
+ "%s" CM
+ "?{" CM
+ "%s" CM
+ "%s" CM
+ "=" CM
+ "}",
+ REGN(2),
+ compare_op,
+ REGN(1),
+ REGN(0));
+}
+
+static ut8 add_sub_shift(XtensaContext *ctx) {
+ ut8 shift = 0;
+ switch (opcode) {
+ case XTENSA_INS_ADDX2:
+ case XTENSA_INS_SUBX2:
+ shift = 1;
+ break;
+ case XTENSA_INS_ADDX4:
+ case XTENSA_INS_SUBX4:
+ shift = 2;
+ break;
+ case XTENSA_INS_ADDX8:
+ case XTENSA_INS_SUBX8:
+ shift = 3;
+ break;
+ default:
+ shift = 0;
+ break;
+ }
+ return shift;
+}
+
+static bool add_sub_is_add(XtensaContext *ctx) {
+ return opcode == XTENSA_INS_ADD ||
+ opcode == XTENSA_INS_ADDX2 ||
+ opcode == XTENSA_INS_ADDX4 ||
+ opcode == XTENSA_INS_ADDX8;
+}
+
+static void esil_add_sub(XtensaContext *ctx, RzAnalysisOp *op) {
+ rz_strbuf_appendf(
+ &op->esil,
+ "%s" CM
+ "%d" CM
+ "%s" CM
+ "<<" CM
+ "%s" CM
+ "%s" CM
+ "=",
+ REGN(2),
+ add_sub_shift(ctx),
+ REGN(1),
+ (add_sub_is_add(ctx) ? "+" : "-"),
+ REGN(0));
+}
+
+static void esil_branch_compare_imm(XtensaContext *ctx, RzAnalysisOp *op) {
+ const char *compare_op = "";
+
+ // TODO: unsigned comparisons
+ switch (opcode) {
+ case XTENSA_INS_BEQI: /* beqi */
+ compare_op = "==,$z";
+ break;
+ case XTENSA_INS_BNEI: /* bnei */
+ compare_op = "==,$z,!";
+ break;
+ case XTENSA_INS_BGEUI: /* bgeui */
+ case XTENSA_INS_BGEI: /* bgei */
+ compare_op = ">=";
+ break;
+ case XTENSA_INS_BLTUI: /* bltui */
+ case XTENSA_INS_BLTI: /* blti */
+ compare_op = "<";
+ break;
+ }
+
+ // example: beqi a4, 4, offset
+ // a4, // push data reg
+ // 0x4, // push imm operand
+ // ==,
+ // ?{,
+ // offset,
+ // pc,
+ // +=,
+ // }
+
+ rz_strbuf_appendf(
+ &op->esil,
+ "%s" CM,
+ // data reg
+ REGN(0));
+
+ esil_push_signed_imm(&op->esil, IMM(1));
+
+ rz_strbuf_appendf(&op->esil, "%s" CM, compare_op);
+ rz_strbuf_appendf(&op->esil, "?{" CM);
+
+ // ISA defines branch target as offset + 4,
+ // but at the time of ESIL evaluation
+ // PC will be already incremented by 3
+ esil_push_signed_imm(&op->esil, IMM(2) - INSN_SIZE);
+
+ rz_strbuf_appendf(&op->esil, "pc" CM "+=" CM "}");
+}
+
+static void esil_branch_compare(XtensaContext *ctx, RzAnalysisOp *op) {
+ const char *compare_op = "";
+ switch (opcode) {
+ case XTENSA_INS_BEQ: /* beq */
+ compare_op = "==,$z";
+ break;
+ case XTENSA_INS_BNE: /* bne */
+ compare_op = "==,$z,!";
+ break;
+ case XTENSA_INS_BGE: /* bge */
+ case XTENSA_INS_BGEU: /* bgeu */
+ compare_op = ">=";
+ break;
+ case XTENSA_INS_BLT: /* blt */
+ case XTENSA_INS_BLTU: /* bltu */
+ compare_op = "<";
+ break;
+ }
+ // example: beq a4, a3, offset
+ // a3, // push op1
+ // a4, // push op2
+ // ==,
+ // ?{,
+ // offset,
+ // pc,
+ // +=,
+ // }
+
+ rz_strbuf_appendf(
+ &op->esil,
+ "%s" CM
+ "%s" CM
+ "%s" CM
+ "?{" CM,
+ REGN(1),
+ REGN(0),
+ compare_op);
+
+ esil_push_signed_imm(&op->esil, IMM(2) - INSN_SIZE);
+
+ rz_strbuf_append(&op->esil, "pc" CM "+=" CM "}");
+}
+
+static void esil_branch_compare_single(XtensaContext *ctx, RzAnalysisOp *op) {
+ const char *compare_op = "";
+
+ switch (opcode) {
+ case XTENSA_INS_BEQZ: /* beqz */
+ // case 28: /* beqz.n */
+ compare_op = "==,$z";
+ break;
+ case XTENSA_INS_BNEZ: /* bnez */
+ // case 29: /* bnez.n */
+ compare_op = "==,$z,!";
+ break;
+ case XTENSA_INS_BGEZ: /* bgez */
+ compare_op = ">=";
+ break;
+ case XTENSA_INS_BLTZ: /* bltz */
+ compare_op = "<";
+ break;
+ }
+
+ // example: beqz a4, 0, offset
+ // 0, // push 0
+ // a4, // push op
+ // ==,
+ // ?{,
+ // offset,
+ // pc,
+ // +=,
+ // }
+
+ rz_strbuf_appendf(
+ &op->esil,
+ "0" CM
+ "%s" CM
+ "%s" CM
+ "?{" CM,
+ REGN(0),
+ compare_op);
+
+ esil_push_signed_imm(&op->esil, IMM(1) - INSN_SIZE);
+
+ rz_strbuf_append(&op->esil, "pc" CM "+=" CM "}");
+}
+
+static void esil_branch_check_mask(XtensaContext *ctx, RzAnalysisOp *op) {
+ const char *compare_op = "";
+ char compare_val[4] = "0";
+
+ switch (opcode) {
+ case XTENSA_INS_BNALL: /* bnall */
+ case XTENSA_INS_BANY: /* bany */
+ compare_op = "==,$z,!";
+ break;
+ case XTENSA_INS_BALL: /* ball */
+ case XTENSA_INS_BNONE: /* bnone */
+ compare_op = "==,$z";
+ break;
+ }
+
+ switch (opcode) {
+ case XTENSA_INS_BNALL: /* bnall */
+ case XTENSA_INS_BALL: /* ball */
+ snprintf(
+ compare_val,
+ sizeof(compare_val),
+ "%s",
+ REGN(1));
+ break;
+ }
+
+ // example: bnall a4, a3, offset
+ // a4, // push op1
+ // a3, // push op2
+ // &,
+ // a3,
+ // ==,!,
+ // ?{,
+ // offset,
+ // pc,
+ // +=,
+ // }
+
+ rz_strbuf_appendf(
+ &op->esil,
+ "%s" CM
+ "%s" CM
+ "&" CM
+ "%s" CM
+ "%s" CM
+ "?{" CM,
+ REGN(0),
+ REGN(1),
+ REGN(1),
+ compare_op);
+
+ esil_push_signed_imm(&op->esil, IMM(2) - INSN_SIZE);
+
+ rz_strbuf_append(&op->esil, "pc" CM "+=" CM "}");
+}
+
+static void esil_bitwise_op(XtensaContext *ctx, RzAnalysisOp *op) {
+ char bop;
+ switch (opcode) {
+ case XTENSA_INS_AND: /* and */
+ bop = '&';
+ break;
+ case XTENSA_INS_OR: /* or */
+ bop = '|';
+ break;
+ case XTENSA_INS_XOR: /* xor */
+ bop = '^';
+ break;
+ default:
+ bop = '=';
+ break;
+ }
+
+ rz_strbuf_appendf(
+ &op->esil,
+ "%s" CM
+ "%s" CM
+ "%c" CM
+ "%s" CM
+ "=",
+ REGN(1),
+ REGN(2),
+ bop,
+ REGN(0));
+}
+
+static void esil_branch_check_bit_imm(XtensaContext *ctx, RzAnalysisOp *op) {
+ ut8 bit_clear;
+ const char *cmp_op;
+
+ bit_clear = opcode == XTENSA_INS_BBSI;
+ cmp_op = bit_clear ? "==,$z" : "==,$z,!";
+
+ // example: bbsi a4, 2, offset
+ // a4,
+ // mask,
+ // &,
+ // 0,
+ // ==,
+ // ?{,
+ // offset,
+ // pc,
+ // +=,
+ // }
+
+ rz_strbuf_appendf(
+ &op->esil,
+ "%s" CM
+ "0x%x" CM
+ "&" CM
+ "0" CM
+ "%s" CM
+ "?{" CM,
+ REGN(0),
+ IMM(1),
+ cmp_op);
+
+ esil_push_signed_imm(&op->esil, IMM(2) - INSN_SIZE);
+
+ rz_strbuf_appendf(
+ &op->esil,
+ "pc" CM
+ "+=" CM
+ "}");
+}
+
+static void esil_branch_check_bit(XtensaContext *ctx, RzAnalysisOp *op) {
+ ut8 bit_clear;
+ const char *cmp_op;
+
+ // bbc
+ bit_clear = opcode == XTENSA_INS_BBC;
+ cmp_op = bit_clear ? "==,$z" : "==,$z,!";
+
+ // example: bbc a4, a2, offset
+ // a2,
+ // 1,
+ // <<,
+ // a4,
+ // &
+ // 0
+ // ==,
+ // ?{,
+ // offset,
+ // pc,
+ // +=,
+ // }
+
+ rz_strbuf_appendf(
+ &op->esil,
+ "%s" CM
+ "1" CM
+ "<<" CM
+ "%s" CM
+ "&" CM
+ "0" CM
+ "%s" CM
+ "?{" CM,
+ REGN(1),
+ REGN(0),
+ cmp_op);
+
+ esil_push_signed_imm(&op->esil, IMM(2) - INSN_SIZE);
+
+ rz_strbuf_appendf(
+ &op->esil,
+ "pc" CM
+ "+=" CM
+ "}");
+}
+
+static void esil_abs_neg(XtensaContext *ctx, RzAnalysisOp *op) {
+ ut8 neg;
+ neg = opcode == XTENSA_INS_NEG;
+
+ if (!neg) {
+ rz_strbuf_appendf(
+ &op->esil,
+ "0" CM
+ "%s" CM
+ "<" CM
+ "?{" CM
+ "0" CM
+ "%s" CM
+ "-" CM
+ "}" CM
+ "0" CM
+ "%s" CM
+ ">=" CM
+ "?{" CM
+ "%s" CM
+ "}" CM,
+ REGN(0),
+ REGN(0),
+ REGN(0),
+ REGN(0));
+ } else {
+ rz_strbuf_appendf(
+ &op->esil,
+ "0" CM
+ "%s" CM
+ "-" CM,
+ REGN(0));
+ }
+
+ rz_strbuf_appendf(
+ &op->esil,
+ "%s" CM
+ "=" CM,
+ REGN(1));
+}
+
+static void esil_call(XtensaContext *ctx, RzAnalysisOp *op) {
+ if (opcode == XTENSA_INS_CALL0) {
+ rz_strbuf_append(
+ &op->esil,
+ "pc" CM
+ "a0" CM
+ "=" CM);
+ }
+
+ esil_push_signed_imm(&op->esil, IMM(0) - INSN_SIZE);
+
+ rz_strbuf_append(&op->esil, "pc" CM "+=");
+}
+
+static void esil_callx(XtensaContext *ctx, RzAnalysisOp *op) {
+ bool callx = opcode == XTENSA_INS_CALLX0;
+ rz_strbuf_appendf(
+ &op->esil,
+ "%s" CM "0" CM "+" CM,
+ REGN(0));
+
+ if (callx) {
+ rz_strbuf_append(
+ &op->esil,
+ "pc" CM
+ "a0" CM
+ "=" CM);
+ }
+
+ rz_strbuf_append(&op->esil, "pc" CM "=");
+}
+
+static void esil_set_shift_amount(XtensaContext *ctx, RzAnalysisOp *op) {
+ rz_strbuf_appendf(
+ &op->esil,
+ "%s" CM
+ "sar" CM
+ "=",
+ REGN(0));
+}
+
+static void esil_set_shift_amount_imm(XtensaContext *ctx, RzAnalysisOp *op) {
+ rz_strbuf_appendf(
+ &op->esil,
+ "0x%x" CM
+ "sar" CM
+ "=",
+ IMM(0));
+}
+
+static void esil_shift_logic_imm(XtensaContext *ctx, RzAnalysisOp *op) {
+ const char *shift_op = "";
+
+ // srli
+ if (opcode == XTENSA_INS_SRLI) {
+ shift_op = ">>";
+ } else {
+ shift_op = "<<";
+ }
+
+ rz_strbuf_appendf(
+ &op->esil,
+ "0x%x" CM
+ "%s" CM
+ "%s" CM
+ "%s" CM
+ "=",
+ IMM(2),
+ REGN(1),
+ shift_op,
+ REGN(0));
+}
+
+static void esil_shift_logic_sar(XtensaContext *ctx, RzAnalysisOp *op) {
+ const char *shift_op = "";
+ // srl
+ if (opcode == XTENSA_INS_SRL) {
+ shift_op = ">>";
+ } else {
+ shift_op = "<<";
+ }
+
+ rz_strbuf_appendf(
+ &op->esil,
+ "sar" CM
+ "%s" CM
+ "%s" CM
+ "%s" CM
+ "=",
+ REGN(1),
+ shift_op,
+ REGN(0));
+}
+
+static void esil_extract_unsigned(XtensaContext *ctx, RzAnalysisOp *op) {
+ rz_strbuf_appendf(
+ &op->esil,
+ "0x%x" CM
+ "%s" CM
+ ">>" CM
+ "0x%x" CM
+ "&" CM
+ "%s" CM
+ "=",
+ IMM(2),
+ REGN(1),
+ (1 << IMM(3)) - 1,
+ REGN(0));
+}
+
+void xtensa_analyze_op_esil(XtensaContext *ctx, RzAnalysisOp *op) {
+ switch (opcode) {
+ case XTENSA_INS_ADD_N: /* add.n */
+ case XTENSA_INS_ADD: /* add */
+ case XTENSA_INS_ADDX2: /* addx2 */
+ case XTENSA_INS_ADDX4: /* addx4 */
+ case XTENSA_INS_ADDX8: /* addx8 */
+ case XTENSA_INS_SUB: /* sub */
+ case XTENSA_INS_SUBX2: /* subx2 */
+ case XTENSA_INS_SUBX4: /* subx4 */
+ case XTENSA_INS_SUBX8: /* subx8 */
+ esil_add_sub(ctx, op);
+ break;
+ case XTENSA_INS_MOV_N:
+ esil_move(ctx, op);
+ break;
+ case XTENSA_INS_MOVI: /* movi */
+ case XTENSA_INS_MOVI_N:
+ esil_move_imm(ctx, op);
+ break;
+ case XTENSA_INS_EXCW:
+ case XTENSA_INS_NOP: /* nop.n */
+ rz_strbuf_setf(&op->esil, "%s", "");
+ break;
+ // TODO: s32cli (s32c1i) is conditional (CAS)
+ // should it be handled here?
+ case XTENSA_INS_S32C1I:
+ case XTENSA_INS_S32I_N:
+ case XTENSA_INS_S32I: /* s32i */
+ case XTENSA_INS_S16I: /* s16i */
+ case XTENSA_INS_S8I: /* s8i */
+ esil_store_imm(ctx, op);
+ break;
+ case XTENSA_INS_ADDI_N:
+ case XTENSA_INS_ADDI: /* addi */
+ esil_add_imm(ctx, op);
+ break;
+ case XTENSA_INS_RET: /* ret */
+ case XTENSA_INS_RET_N:
+ rz_strbuf_setf(&op->esil, "a0,pc,=");
+ break;
+ case XTENSA_INS_L16UI: /* l16ui */
+ case XTENSA_INS_L16SI: /* l16si */
+ case XTENSA_INS_L32I: /* l32i */
+ case XTENSA_INS_L32I_N:
+ case XTENSA_INS_L8UI: /* l8ui */
+ esil_load_imm(ctx, op);
+ break;
+ // TODO: s32r
+ // l32r is different because it is relative to LITBASE
+ // which also may or may not be present
+ case XTENSA_INS_L32R: /* l32r */
+ esil_load_relative(ctx, op);
+ break;
+ case XTENSA_INS_ADDMI: /* addmi */
+ break;
+ case XTENSA_INS_AND: /* and */
+ case XTENSA_INS_OR: /* or */
+ case XTENSA_INS_XOR: /* xor */
+ esil_bitwise_op(ctx, op);
+ break;
+ case XTENSA_INS_BEQI: /* beqi */
+ case XTENSA_INS_BNEI: /* bnei */
+ case XTENSA_INS_BGEI: /* bgei */
+ case XTENSA_INS_BLTI: /* blti */
+ case XTENSA_INS_BGEUI: /* bgeui */
+ case XTENSA_INS_BLTUI: /* bltui */
+ esil_branch_compare_imm(ctx, op);
+ break;
+ case XTENSA_INS_BBCI: /* bbci */
+ case XTENSA_INS_BBSI: /* bbsi */
+ esil_branch_check_bit_imm(ctx, op);
+ break;
+ case XTENSA_INS_BEQ: /* beq */
+ case XTENSA_INS_BNE: /* bne */
+ case XTENSA_INS_BGE: /* bge */
+ case XTENSA_INS_BLT: /* blt */
+ case XTENSA_INS_BGEU: /* bgeu */
+ case XTENSA_INS_BLTU: /* bltu */
+ esil_branch_compare(ctx, op);
+ break;
+ case XTENSA_INS_BANY: /* bany */
+ case XTENSA_INS_BNONE: /* bnone */
+ case XTENSA_INS_BALL: /* ball */
+ case XTENSA_INS_BNALL: /* bnall */
+ esil_branch_check_mask(ctx, op);
+ break;
+ case XTENSA_INS_BBC: /* bbc */
+ case XTENSA_INS_BBS: /* bbs */
+ esil_branch_check_bit(ctx, op);
+ break;
+ case XTENSA_INS_BEQZ: /* beqz */
+ case XTENSA_INS_BNEZ: /* bnez */
+ // case 28: /* beqz.n */
+ // case 29: /* bnez.n */
+ case XTENSA_INS_BGEZ: /* bgez */
+ case XTENSA_INS_BLTZ: /* bltz */
+ esil_branch_compare_single(ctx, op);
+ break;
+ case XTENSA_INS_EXTUI: /* extui */
+ esil_extract_unsigned(ctx, op);
+ break;
+ case XTENSA_INS_ILL: /* ill */
+ rz_strbuf_setf(&op->esil, "%s", "");
+ break;
+ // TODO: windowed calls?
+ case XTENSA_INS_CALL4:
+ break;
+ case XTENSA_INS_CALL0:
+ case XTENSA_INS_J: /* j */
+ esil_call(ctx, op);
+ break;
+ case XTENSA_INS_JX:
+ case XTENSA_INS_CALLX0: /* callx0 */
+ esil_callx(ctx, op);
+ break;
+ case XTENSA_INS_MOVEQZ: /* moveqz */
+ case XTENSA_INS_MOVNEZ: /* movnez */
+ case XTENSA_INS_MOVLTZ: /* movltz */
+ case XTENSA_INS_MOVGEZ: /* movgez */
+ esil_move_conditional(ctx, op);
+ break;
+ case XTENSA_INS_ABS: /* abs */
+ case XTENSA_INS_NEG: /* neg */
+ esil_abs_neg(ctx, op);
+ break;
+ case XTENSA_INS_SSR: /* ssr */
+ case XTENSA_INS_SSL: /* ssl */
+ esil_set_shift_amount(ctx, op);
+ break;
+ case XTENSA_INS_SLLI: /* slli */
+ case XTENSA_INS_SRLI: /* srli */
+ esil_shift_logic_imm(ctx, op);
+ break;
+ case XTENSA_INS_SSAI: /* ssai */
+ esil_set_shift_amount_imm(ctx, op);
+ break;
+ case XTENSA_INS_SLL: /* sll */
+ case XTENSA_INS_SRL: /* srl */
+ esil_shift_logic_sar(ctx, op);
+ break;
+ }
+}
\ No newline at end of file
diff --git a/librz/arch/isa_gnu/xtensa/elf32-xtensa.c b/librz/arch/isa_gnu/xtensa/elf32-xtensa.c
deleted file mode 100644
index fd0d7dc0b4d..00000000000
--- a/librz/arch/isa_gnu/xtensa/elf32-xtensa.c
+++ /dev/null
@@ -1,11444 +0,0 @@
-/* Xtensa-specific support for 32-bit ELF.
- Copyright (C) 2003-2015 Free Software Foundation, Inc.
-
- This file is part of BFD, the Binary File Descriptor library.
-
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 3 of the
- License, or (at your option) any later version.
-
- This program is distributed in the hope that it will be useful, but
- WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
- 02110-1301, USA. */
-
-#include <common_gnu/sysdep.h>
-#include <common_gnu/disas-asm.h>
-#include <common_gnu/bfdlink.h>
-#include <common_gnu/elf-bfd.h>
-#include <common_gnu/elf/xtensa.h>
-
-#include <stdio.h>
-#include <stdarg.h>
-#include <string.h>
-
-#include "xtensa-isa.h"
-
-#define XTENSA_NO_NOP_REMOVAL 0
-
-/* Local helper functions. */
-
-#if 0
-static bfd_boolean add_extra_plt_sections (struct bfd_link_info *, int);
-static char *vsprint_msg (const char *, const char *, int, ...) ATTRIBUTE_PRINTF(2,4);
-static bfd_reloc_status_type bfd_elf_xtensa_reloc
- (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
-static bfd_boolean do_fix_for_relocatable_link
- (Elf_Internal_Rela *, bfd *, asection *, bfd_byte *);
-static void do_fix_for_final_link
- (Elf_Internal_Rela *, bfd *, asection *, bfd_byte *, bfd_vma *);
-
-/* Local functions to handle Xtensa configurability. */
-
-static bfd_boolean is_indirect_call_opcode (xtensa_opcode);
-static bfd_boolean is_direct_call_opcode (xtensa_opcode);
-static bfd_boolean is_windowed_call_opcode (xtensa_opcode);
-static xtensa_opcode get_const16_opcode (void);
-static xtensa_opcode get_l32r_opcode (void);
-static bfd_vma l32r_offset (bfd_vma, bfd_vma);
-static int get_relocation_opnd (xtensa_opcode, int);
-static int get_relocation_slot (int);
-static xtensa_opcode get_relocation_opcode
- (bfd *, asection *, bfd_byte *, Elf_Internal_Rela *);
-static bfd_boolean is_l32r_relocation
- (bfd *, asection *, bfd_byte *, Elf_Internal_Rela *);
-static bfd_boolean is_alt_relocation (int);
-static bfd_boolean is_operand_relocation (int);
-static bfd_size_type insn_decode_len
- (bfd_byte *, bfd_size_type, bfd_size_type);
-static xtensa_opcode insn_decode_opcode
- (bfd_byte *, bfd_size_type, bfd_size_type, int);
-static bfd_boolean check_branch_target_aligned
- (bfd_byte *, bfd_size_type, bfd_vma, bfd_vma);
-static bfd_boolean check_loop_aligned
- (bfd_byte *, bfd_size_type, bfd_vma, bfd_vma);
-static bfd_boolean check_branch_target_aligned_address (bfd_vma, int);
-static bfd_size_type get_asm_simplify_size
- (bfd_byte *, bfd_size_type, bfd_size_type);
-
-/* Functions for link-time code simplifications. */
-
-static bfd_reloc_status_type elf_xtensa_do_asm_simplify
- (bfd_byte *, bfd_vma, bfd_vma, char **);
-static bfd_reloc_status_type contract_asm_expansion
- (bfd_byte *, bfd_vma, Elf_Internal_Rela *, char **);
-static xtensa_opcode swap_callx_for_call_opcode (xtensa_opcode);
-static xtensa_opcode get_expanded_call_opcode (bfd_byte *, int, bfd_boolean *);
-
-/* Access to internal relocations, section contents and symbols. */
-
-static Elf_Internal_Rela *retrieve_internal_relocs
- (bfd *, asection *, bfd_boolean);
-static void pin_internal_relocs (asection *, Elf_Internal_Rela *);
-static void release_internal_relocs (asection *, Elf_Internal_Rela *);
-static bfd_byte *retrieve_contents (bfd *, asection *, bfd_boolean);
-static void pin_contents (asection *, bfd_byte *);
-static void release_contents (asection *, bfd_byte *);
-static Elf_Internal_Sym *retrieve_local_syms (bfd *);
-
-/* Miscellaneous utility functions. */
-
-static asection *elf_xtensa_get_plt_section (struct bfd_link_info *, int);
-static asection *elf_xtensa_get_gotplt_section (struct bfd_link_info *, int);
-static asection *get_elf_r_symndx_section (bfd *, unsigned long);
-static struct elf_link_hash_entry *get_elf_r_symndx_hash_entry
- (bfd *, unsigned long);
-static bfd_vma get_elf_r_symndx_offset (bfd *, unsigned long);
-static bfd_boolean is_reloc_sym_weak (bfd *, Elf_Internal_Rela *);
-static bfd_boolean pcrel_reloc_fits (xtensa_opcode, int, bfd_vma, bfd_vma);
-static bfd_boolean xtensa_is_property_section (asection *);
-static bfd_boolean xtensa_is_insntable_section (asection *);
-static bfd_boolean xtensa_is_littable_section (asection *);
-static bfd_boolean xtensa_is_proptable_section (asection *);
-static int internal_reloc_compare (const void *, const void *);
-static int internal_reloc_matches (const void *, const void *);
-static asection *xtensa_get_property_section (asection *, const char *);
-extern asection *xtensa_make_property_section (asection *, const char *);
-static flagword xtensa_get_property_predef_flags (asection *);
-
-/* Other functions called directly by the linker. */
-
-typedef void (*deps_callback_t)
- (asection *, bfd_vma, asection *, bfd_vma, void *);
-extern bfd_boolean xtensa_callback_required_dependence
- (bfd *, asection *, struct bfd_link_info *, deps_callback_t, void *);
-
-
-/* Globally visible flag for choosing size optimization of NOP removal
- instead of branch-target-aware minimization for NOP removal.
- When nonzero, narrow all instructions and remove all NOPs possible
- around longcall expansions. */
-
-int elf32xtensa_size_opt;
-
-
-/* The "new_section_hook" is used to set up a per-section
- "xtensa_relax_info" data structure with additional information used
- during relaxation. */
-
-typedef struct xtensa_relax_info_struct xtensa_relax_info;
-
-
-/* The GNU tools do not easily allow extending interfaces to pass around
- the pointer to the Xtensa ISA information, so instead we add a global
- variable here (in BFD) that can be used by any of the tools that need
- this information. */
-
-#endif
-
-xtensa_isa xtensa_default_isa;
- // xtensa_default_isa = xtensa_isa_init (0, 0);
-
-int
-filename_cmp (const char *s1, const char *s2)
-{
-#if !defined(HAVE_DOS_BASED_FILE_SYSTEM) \
- && !defined(HAVE_CASE_INSENSITIVE_FILE_SYSTEM)
- return strcmp(s1, s2);
-#else
- for (;;)
- {
- int c1 = *s1;
- int c2 = *s2;
-
-#if defined (HAVE_CASE_INSENSITIVE_FILE_SYSTEM)
- c1 = TOLOWER (c1);
- c2 = TOLOWER (c2);
-#endif
-
-#if defined (HAVE_DOS_BASED_FILE_SYSTEM)
- /* On DOS-based file systems, the '/' and the '\' are equivalent. */
- if (c1 == '/')
- c1 = '\\';
- if (c2 == '/')
- c2 = '\\';
-#endif
-
- if (c1 != c2)
- return (c1 - c2);
-
- if (c1 == '\0')
- return 0;
-
- s1++;
- s2++;
- }
-#endif
-}
-
-
-#if 0
-
-
-/* When this is true, relocations may have been modified to refer to
- symbols from other input files. The per-section list of "fix"
- records needs to be checked when resolving relocations. */
-
-static bfd_boolean relaxing_section = FALSE;
-
-/* When this is true, during final links, literals that cannot be
- coalesced and their relocations may be moved to other sections. */
-
-int elf32xtensa_no_literal_movement = 1;
-
-/* Rename one of the generic section flags to better document how it
- is used here. */
-/* Whether relocations have been processed. */
-#define reloc_done sec_flg0
-
-static reloc_howto_type elf_howto_table[] =
-{
- HOWTO (RZ_XTENSA_NONE, 0, 3, 0, FALSE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_NONE",
- FALSE, 0, 0, FALSE),
- HOWTO (RZ_XTENSA_32, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_32",
- TRUE, 0xffffffff, 0xffffffff, FALSE),
-
- /* Replace a 32-bit value with a value from the runtime linker (only
- used by linker-generated stub functions). The rz_addend value is
- special: 1 means to substitute a pointer to the runtime linker's
- dynamic resolver function; 2 means to substitute the link map for
- the shared object. */
- HOWTO (RZ_XTENSA_RTLD, 0, 2, 32, FALSE, 0, complain_overflow_dont,
- NULL, "RZ_XTENSA_RTLD", FALSE, 0, 0, FALSE),
-
- HOWTO (RZ_XTENSA_GLOB_DAT, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,
- bfd_elf_generic_reloc, "RZ_XTENSA_GLOB_DAT",
- FALSE, 0, 0xffffffff, FALSE),
- HOWTO (RZ_XTENSA_JMP_SLOT, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,
- bfd_elf_generic_reloc, "RZ_XTENSA_JMP_SLOT",
- FALSE, 0, 0xffffffff, FALSE),
- HOWTO (RZ_XTENSA_RELATIVE, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,
- bfd_elf_generic_reloc, "RZ_XTENSA_RELATIVE",
- FALSE, 0, 0xffffffff, FALSE),
- HOWTO (RZ_XTENSA_PLT, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_PLT",
- FALSE, 0, 0xffffffff, FALSE),
-
- EMPTY_HOWTO (7),
-
- /* Old relocations for backward compatibility. */
- HOWTO (RZ_XTENSA_OP0, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_OP0", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_OP1, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_OP1", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_OP2, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_OP2", FALSE, 0, 0, TRUE),
-
- /* Assembly auto-expansion. */
- HOWTO (RZ_XTENSA_ASM_EXPAND, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_ASM_EXPAND", FALSE, 0, 0, TRUE),
- /* Relax assembly auto-expansion. */
- HOWTO (RZ_XTENSA_ASM_SIMPLIFY, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_ASM_SIMPLIFY", FALSE, 0, 0, TRUE),
-
- EMPTY_HOWTO (13),
-
- HOWTO (RZ_XTENSA_32_PCREL, 0, 2, 32, TRUE, 0, complain_overflow_bitfield,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_32_PCREL",
- FALSE, 0, 0xffffffff, TRUE),
-
- /* GNU extension to record C++ vtable hierarchy. */
- HOWTO (RZ_XTENSA_GNU_VTINHERIT, 0, 2, 0, FALSE, 0, complain_overflow_dont,
- NULL, "RZ_XTENSA_GNU_VTINHERIT",
- FALSE, 0, 0, FALSE),
- /* GNU extension to record C++ vtable member usage. */
- HOWTO (RZ_XTENSA_GNU_VTENTRY, 0, 2, 0, FALSE, 0, complain_overflow_dont,
- _bfd_elf_rel_vtable_reloc_fn, "RZ_XTENSA_GNU_VTENTRY",
- FALSE, 0, 0, FALSE),
-
- /* Relocations for supporting difference of symbols. */
- HOWTO (RZ_XTENSA_DIFF8, 0, 0, 8, FALSE, 0, complain_overflow_signed,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_DIFF8", FALSE, 0, 0xff, FALSE),
- HOWTO (RZ_XTENSA_DIFF16, 0, 1, 16, FALSE, 0, complain_overflow_signed,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_DIFF16", FALSE, 0, 0xffff, FALSE),
- HOWTO (RZ_XTENSA_DIFF32, 0, 2, 32, FALSE, 0, complain_overflow_signed,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_DIFF32", FALSE, 0, 0xffffffff, FALSE),
-
- /* General immediate operand relocations. */
- HOWTO (RZ_XTENSA_SLOT0_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT0_OP", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT1_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT1_OP", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT2_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT2_OP", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT3_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT3_OP", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT4_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT4_OP", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT5_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT5_OP", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT6_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT6_OP", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT7_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT7_OP", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT8_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT8_OP", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT9_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT9_OP", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT10_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT10_OP", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT11_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT11_OP", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT12_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT12_OP", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT13_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT13_OP", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT14_OP, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT14_OP", FALSE, 0, 0, TRUE),
-
- /* "Alternate" relocations. The meaning of these is opcode-specific. */
- HOWTO (RZ_XTENSA_SLOT0_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT0_ALT", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT1_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT1_ALT", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT2_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT2_ALT", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT3_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT3_ALT", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT4_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT4_ALT", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT5_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT5_ALT", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT6_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT6_ALT", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT7_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT7_ALT", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT8_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT8_ALT", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT9_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT9_ALT", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT10_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT10_ALT", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT11_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT11_ALT", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT12_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT12_ALT", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT13_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT13_ALT", FALSE, 0, 0, TRUE),
- HOWTO (RZ_XTENSA_SLOT14_ALT, 0, 0, 0, TRUE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_SLOT14_ALT", FALSE, 0, 0, TRUE),
-
- /* TLS relocations. */
- HOWTO (RZ_XTENSA_TLSDESC_FN, 0, 2, 32, FALSE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_TLSDESC_FN",
- FALSE, 0, 0xffffffff, FALSE),
- HOWTO (RZ_XTENSA_TLSDESC_ARG, 0, 2, 32, FALSE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_TLSDESC_ARG",
- FALSE, 0, 0xffffffff, FALSE),
- HOWTO (RZ_XTENSA_TLS_DTPOFF, 0, 2, 32, FALSE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_TLS_DTPOFF",
- FALSE, 0, 0xffffffff, FALSE),
- HOWTO (RZ_XTENSA_TLS_TPOFF, 0, 2, 32, FALSE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_TLS_TPOFF",
- FALSE, 0, 0xffffffff, FALSE),
- HOWTO (RZ_XTENSA_TLS_FUNC, 0, 0, 0, FALSE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_TLS_FUNC",
- FALSE, 0, 0, FALSE),
- HOWTO (RZ_XTENSA_TLS_ARG, 0, 0, 0, FALSE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_TLS_ARG",
- FALSE, 0, 0, FALSE),
- HOWTO (RZ_XTENSA_TLS_CALL, 0, 0, 0, FALSE, 0, complain_overflow_dont,
- bfd_elf_xtensa_reloc, "RZ_XTENSA_TLS_CALL",
- FALSE, 0, 0, FALSE),
-};
-
-#if DEBUG_GEN_RELOC
-#define TRACE(str) \
- fprintf (stderr, "Xtensa bfd reloc lookup %d (%s)\n", code, str)
-#else
-#define TRACE(str)
-#endif
-
-static reloc_howto_type *
-elf_xtensa_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
- bfd_reloc_code_real_type code)
-{
- switch (code)
- {
- case BFD_RELOC_NONE:
- TRACE ("BFD_RELOC_NONE");
- return &elf_howto_table[(unsigned) RZ_XTENSA_NONE ];
-
- case BFD_RELOC_32:
- TRACE ("BFD_RELOC_32");
- return &elf_howto_table[(unsigned) RZ_XTENSA_32 ];
-
- case BFD_RELOC_32_PCREL:
- TRACE ("BFD_RELOC_32_PCREL");
- return &elf_howto_table[(unsigned) RZ_XTENSA_32_PCREL ];
-
- case BFD_RELOC_XTENSA_DIFF8:
- TRACE ("BFD_RELOC_XTENSA_DIFF8");
- return &elf_howto_table[(unsigned) RZ_XTENSA_DIFF8 ];
-
- case BFD_RELOC_XTENSA_DIFF16:
- TRACE ("BFD_RELOC_XTENSA_DIFF16");
- return &elf_howto_table[(unsigned) RZ_XTENSA_DIFF16 ];
-
- case BFD_RELOC_XTENSA_DIFF32:
- TRACE ("BFD_RELOC_XTENSA_DIFF32");
- return &elf_howto_table[(unsigned) RZ_XTENSA_DIFF32 ];
-
- case BFD_RELOC_XTENSA_RTLD:
- TRACE ("BFD_RELOC_XTENSA_RTLD");
- return &elf_howto_table[(unsigned) RZ_XTENSA_RTLD ];
-
- case BFD_RELOC_XTENSA_GLOB_DAT:
- TRACE ("BFD_RELOC_XTENSA_GLOB_DAT");
- return &elf_howto_table[(unsigned) RZ_XTENSA_GLOB_DAT ];
-
- case BFD_RELOC_XTENSA_JMP_SLOT:
- TRACE ("BFD_RELOC_XTENSA_JMP_SLOT");
- return &elf_howto_table[(unsigned) RZ_XTENSA_JMP_SLOT ];
-
- case BFD_RELOC_XTENSA_RELATIVE:
- TRACE ("BFD_RELOC_XTENSA_RELATIVE");
- return &elf_howto_table[(unsigned) RZ_XTENSA_RELATIVE ];
-
- case BFD_RELOC_XTENSA_PLT:
- TRACE ("BFD_RELOC_XTENSA_PLT");
- return &elf_howto_table[(unsigned) RZ_XTENSA_PLT ];
-
- case BFD_RELOC_XTENSA_OP0:
- TRACE ("BFD_RELOC_XTENSA_OP0");
- return &elf_howto_table[(unsigned) RZ_XTENSA_OP0 ];
-
- case BFD_RELOC_XTENSA_OP1:
- TRACE ("BFD_RELOC_XTENSA_OP1");
- return &elf_howto_table[(unsigned) RZ_XTENSA_OP1 ];
-
- case BFD_RELOC_XTENSA_OP2:
- TRACE ("BFD_RELOC_XTENSA_OP2");
- return &elf_howto_table[(unsigned) RZ_XTENSA_OP2 ];
-
- case BFD_RELOC_XTENSA_ASM_EXPAND:
- TRACE ("BFD_RELOC_XTENSA_ASM_EXPAND");
- return &elf_howto_table[(unsigned) RZ_XTENSA_ASM_EXPAND ];
-
- case BFD_RELOC_XTENSA_ASM_SIMPLIFY:
- TRACE ("BFD_RELOC_XTENSA_ASM_SIMPLIFY");
- return &elf_howto_table[(unsigned) RZ_XTENSA_ASM_SIMPLIFY ];
-
- case BFD_RELOC_VTABLE_INHERIT:
- TRACE ("BFD_RELOC_VTABLE_INHERIT");
- return &elf_howto_table[(unsigned) RZ_XTENSA_GNU_VTINHERIT ];
-
- case BFD_RELOC_VTABLE_ENTRY:
- TRACE ("BFD_RELOC_VTABLE_ENTRY");
- return &elf_howto_table[(unsigned) RZ_XTENSA_GNU_VTENTRY ];
-
- case BFD_RELOC_XTENSA_TLSDESC_FN:
- TRACE ("BFD_RELOC_XTENSA_TLSDESC_FN");
- return &elf_howto_table[(unsigned) RZ_XTENSA_TLSDESC_FN ];
-
- case BFD_RELOC_XTENSA_TLSDESC_ARG:
- TRACE ("BFD_RELOC_XTENSA_TLSDESC_ARG");
- return &elf_howto_table[(unsigned) RZ_XTENSA_TLSDESC_ARG ];
-
- case BFD_RELOC_XTENSA_TLS_DTPOFF:
- TRACE ("BFD_RELOC_XTENSA_TLS_DTPOFF");
- return &elf_howto_table[(unsigned) RZ_XTENSA_TLS_DTPOFF ];
-
- case BFD_RELOC_XTENSA_TLS_TPOFF:
- TRACE ("BFD_RELOC_XTENSA_TLS_TPOFF");
- return &elf_howto_table[(unsigned) RZ_XTENSA_TLS_TPOFF ];
-
- case BFD_RELOC_XTENSA_TLS_FUNC:
- TRACE ("BFD_RELOC_XTENSA_TLS_FUNC");
- return &elf_howto_table[(unsigned) RZ_XTENSA_TLS_FUNC ];
-
- case BFD_RELOC_XTENSA_TLS_ARG:
- TRACE ("BFD_RELOC_XTENSA_TLS_ARG");
- return &elf_howto_table[(unsigned) RZ_XTENSA_TLS_ARG ];
-
- case BFD_RELOC_XTENSA_TLS_CALL:
- TRACE ("BFD_RELOC_XTENSA_TLS_CALL");
- return &elf_howto_table[(unsigned) RZ_XTENSA_TLS_CALL ];
-
- default:
- if (code >= BFD_RELOC_XTENSA_SLOT0_OP
- && code <= BFD_RELOC_XTENSA_SLOT14_OP)
- {
- unsigned n = (RZ_XTENSA_SLOT0_OP +
- (code - BFD_RELOC_XTENSA_SLOT0_OP));
- return &elf_howto_table[n];
- }
-
- if (code >= BFD_RELOC_XTENSA_SLOT0_ALT
- && code <= BFD_RELOC_XTENSA_SLOT14_ALT)
- {
- unsigned n = (RZ_XTENSA_SLOT0_ALT +
- (code - BFD_RELOC_XTENSA_SLOT0_ALT));
- return &elf_howto_table[n];
- }
-
- break;
- }
-
- TRACE ("Unknown");
- return NULL;
-}
-
-static reloc_howto_type *
-elf_xtensa_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
- const char *rz_name)
-{
- unsigned int i;
-
- for (i = 0; i < sizeof (elf_howto_table) / sizeof (elf_howto_table[0]); i++)
- if (elf_howto_table[i].name != NULL
- && rz_str_casecmp (elf_howto_table[i].name, rz_name) == 0)
- return &elf_howto_table[i];
-
- return NULL;
-}
-
-
-/* Given an ELF "rela" relocation, find the corresponding howto and record
- it in the BFD internal arelent representation of the relocation. */
-
-static void
-elf_xtensa_info_to_howto_rela (bfd *abfd ATTRIBUTE_UNUSED,
- arelent *cache_ptr,
- Elf_Internal_Rela *dst)
-{
- unsigned int rz_type = ELF32_R_TYPE (dst->rz_info);
-
- if (rz_type >= (unsigned int) RZ_XTENSA_max)
- {
- _bfd_error_handler (_("%B: invalid XTENSA reloc number: %d"), abfd, rz_type);
- rz_type = 0;
- }
- cache_ptr->howto = &elf_howto_table[rz_type];
-}
-
-
-/* Functions for the Xtensa ELF linker. */
-
-/* The name of the dynamic interpreter. This is put in the .interp
- section. */
-
-#define ELF_DYNAMIC_INTERPRETER "/lib/ld.so"
-
-/* The size in bytes of an entry in the procedure linkage table.
- (This does _not_ include the space for the literals associated with
- the PLT entry.) */
-
-#define PLT_ENTRY_SIZE 16
-
-/* For _really_ large PLTs, we may need to alternate between literals
- and code to keep the literals within the 256K range of the L32R
- instructions in the code. It's unlikely that anyone would ever need
- such a big PLT, but an arbitrary limit on the PLT size would be bad.
- Thus, we split the PLT into chunks. Since there's very little
- overhead (2 extra literals) for each chunk, the chunk size is kept
- small so that the code for handling multiple chunks get used and
- tested regularly. With 254 entries, there are 1K of literals for
- each chunk, and that seems like a nice round number. */
-
-#define PLT_ENTRIES_PER_CHUNK 254
-
-/* PLT entries are actually used as stub functions for lazy symbol
- resolution. Once the symbol is resolved, the stub function is never
- invoked. Note: the 32-byte frame size used here cannot be changed
- without a corresponding change in the runtime linker. */
-
-static const bfd_byte elf_xtensa_be_plt_entry[PLT_ENTRY_SIZE] =
-{
- 0x6c, 0x10, 0x04, /* entry sp, 32 */
- 0x18, 0x00, 0x00, /* l32r a8, [got entry for rtld's resolver] */
- 0x1a, 0x00, 0x00, /* l32r a10, [got entry for rtld's link map] */
- 0x1b, 0x00, 0x00, /* l32r a11, [literal for reloc index] */
- 0x0a, 0x80, 0x00, /* jx a8 */
- 0 /* unused */
-};
-
-static const bfd_byte elf_xtensa_le_plt_entry[PLT_ENTRY_SIZE] =
-{
- 0x36, 0x41, 0x00, /* entry sp, 32 */
- 0x81, 0x00, 0x00, /* l32r a8, [got entry for rtld's resolver] */
- 0xa1, 0x00, 0x00, /* l32r a10, [got entry for rtld's link map] */
- 0xb1, 0x00, 0x00, /* l32r a11, [literal for reloc index] */
- 0xa0, 0x08, 0x00, /* jx a8 */
- 0 /* unused */
-};
-
-/* The size of the thread control block. */
-#define TCB_SIZE 8
-
-struct elf_xtensa_link_hash_entry
-{
- struct elf_link_hash_entry elf;
-
- bfd_signed_vma tlsfunc_refcount;
-
-#define GOT_UNKNOWN 0
-#define GOT_NORMAL 1
-#define GOT_TLS_GD 2 /* global or local dynamic */
-#define GOT_TLS_IE 4 /* initial or local exec */
-#define GOT_TLS_ANY (GOT_TLS_GD | GOT_TLS_IE)
- unsigned char tls_type;
-};
-
-#define elf_xtensa_hash_entry(ent) ((struct elf_xtensa_link_hash_entry *)(ent))
-
-struct elf_xtensa_obj_tdata
-{
- struct elf_obj_tdata root;
-
- /* tls_type for each local got entry. */
- char *local_got_tls_type;
-
- bfd_signed_vma *local_tlsfunc_refcounts;
-};
-
-#define elf_xtensa_tdata(abfd) \
- ((struct elf_xtensa_obj_tdata *) (abfd)->tdata.any)
-
-#define elf_xtensa_local_got_tls_type(abfd) \
- (elf_xtensa_tdata (abfd)->local_got_tls_type)
-
-#define elf_xtensa_local_tlsfunc_refcounts(abfd) \
- (elf_xtensa_tdata (abfd)->local_tlsfunc_refcounts)
-
-#define is_xtensa_elf(bfd) \
- (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
- && elf_tdata (bfd) != NULL \
- && elf_object_id (bfd) == XTENSA_ELF_DATA)
-
-static bfd_boolean
-elf_xtensa_mkobject (bfd *abfd)
-{
- return bfd_elf_allocate_object (abfd, sizeof (struct elf_xtensa_obj_tdata),
- XTENSA_ELF_DATA);
-}
-
-/* Xtensa ELF linker hash table. */
-
-struct elf_xtensa_link_hash_table
-{
- struct elf_link_hash_table elf;
-
- /* Short-cuts to get to dynamic linker sections. */
- asection *sgot;
- asection *sgotplt;
- asection *srelgot;
- asection *splt;
- asection *srelplt;
- asection *sgotloc;
- asection *spltlittbl;
-
- /* Total count of PLT relocations seen during check_relocs.
- The actual PLT code must be split into multiple sections and all
- the sections have to be created before size_dynamic_sections,
- where we figure out the exact number of PLT entries that will be
- needed. It is OK if this count is an overestimate, e.g., some
- relocations may be removed by GC. */
- int plt_reloc_count;
-
- struct elf_xtensa_link_hash_entry *tlsbase;
-};
-
-/* Get the Xtensa ELF linker hash table from a link_info structure. */
-
-#define elf_xtensa_hash_table(p) \
- (elf_hash_table_id ((struct elf_link_hash_table *) ((p)->hash)) \
- == XTENSA_ELF_DATA ? ((struct elf_xtensa_link_hash_table *) ((p)->hash)) : NULL)
-
-/* Create an entry in an Xtensa ELF linker hash table. */
-
-static struct bfd_hash_entry *
-elf_xtensa_link_hash_newfunc (struct bfd_hash_entry *entry,
- struct bfd_hash_table *table,
- const char *string)
-{
- /* Allocate the structure if it has not already been allocated by a
- subclass. */
- if (entry == NULL)
- {
- entry = bfd_hash_allocate (table,
- sizeof (struct elf_xtensa_link_hash_entry));
- if (entry == NULL)
- return entry;
- }
-
- /* Call the allocation method of the superclass. */
- entry = _bfd_elf_link_hash_newfunc (entry, table, string);
- if (entry != NULL)
- {
- struct elf_xtensa_link_hash_entry *eh = elf_xtensa_hash_entry (entry);
- eh->tlsfunc_refcount = 0;
- eh->tls_type = GOT_UNKNOWN;
- }
-
- return entry;
-}
-
-/* Create an Xtensa ELF linker hash table. */
-
-static struct bfd_link_hash_table *
-elf_xtensa_link_hash_table_create (bfd *abfd)
-{
- struct elf_link_hash_entry *tlsbase;
- struct elf_xtensa_link_hash_table *ret;
- bfd_size_type amt = sizeof (struct elf_xtensa_link_hash_table);
-
- ret = bfd_zmalloc (amt);
- if (ret == NULL)
- return NULL;
-
- if (!_bfd_elf_link_hash_table_init (&ret->elf, abfd,
- elf_xtensa_link_hash_newfunc,
- sizeof (struct elf_xtensa_link_hash_entry),
- XTENSA_ELF_DATA))
- {
- free (ret);
- return NULL;
- }
-
- /* Create a hash entry for "_TLS_MODULE_BASE_" to speed up checking
- for it later. */
- tlsbase = elf_link_hash_lookup (&ret->elf, "_TLS_MODULE_BASE_",
- TRUE, FALSE, FALSE);
- tlsbase->root.type = bfd_link_hash_new;
- tlsbase->root.u.undef.abfd = NULL;
- tlsbase->non_elf = 0;
- ret->tlsbase = elf_xtensa_hash_entry (tlsbase);
- ret->tlsbase->tls_type = GOT_UNKNOWN;
-
- return &ret->elf.root;
-}
-
-/* Copy the extra info we tack onto an elf_link_hash_entry. */
-
-static void
-elf_xtensa_copy_indirect_symbol (struct bfd_link_info *info,
- struct elf_link_hash_entry *dir,
- struct elf_link_hash_entry *ind)
-{
- struct elf_xtensa_link_hash_entry *edir, *eind;
-
- edir = elf_xtensa_hash_entry (dir);
- eind = elf_xtensa_hash_entry (ind);
-
- if (ind->root.type == bfd_link_hash_indirect)
- {
- edir->tlsfunc_refcount += eind->tlsfunc_refcount;
- eind->tlsfunc_refcount = 0;
-
- if (dir->got.refcount <= 0)
- {
- edir->tls_type = eind->tls_type;
- eind->tls_type = GOT_UNKNOWN;
- }
- }
-
- _bfd_elf_link_hash_copy_indirect (info, dir, ind);
-}
-
-static inline bfd_boolean
-elf_xtensa_dynamic_symbol_p (struct elf_link_hash_entry *h,
- struct bfd_link_info *info)
-{
- /* Check if we should do dynamic things to this symbol. The
- "ignore_protected" argument need not be set, because Xtensa code
- does not require special handling of STV_PROTECTED to make function
- pointer comparisons work properly. The PLT addresses are never
- used for function pointers. */
-
- return _bfd_elf_dynamic_symbol_p (h, info, 0);
-}
-
-
-static int
-property_table_compare (const void *ap, const void *bp)
-{
- const property_table_entry *a = (const property_table_entry *) ap;
- const property_table_entry *b = (const property_table_entry *) bp;
-
- if (a->address == b->address)
- {
- if (a->size != b->size)
- return (a->size - b->size);
-
- if ((a->flags & XTENSA_PROP_ALIGN) != (b->flags & XTENSA_PROP_ALIGN))
- return ((b->flags & XTENSA_PROP_ALIGN)
- - (a->flags & XTENSA_PROP_ALIGN));
-
- if ((a->flags & XTENSA_PROP_ALIGN)
- && (GET_XTENSA_PROP_ALIGNMENT (a->flags)
- != GET_XTENSA_PROP_ALIGNMENT (b->flags)))
- return (GET_XTENSA_PROP_ALIGNMENT (a->flags)
- - GET_XTENSA_PROP_ALIGNMENT (b->flags));
-
- if ((a->flags & XTENSA_PROP_UNREACHABLE)
- != (b->flags & XTENSA_PROP_UNREACHABLE))
- return ((b->flags & XTENSA_PROP_UNREACHABLE)
- - (a->flags & XTENSA_PROP_UNREACHABLE));
-
- return (a->flags - b->flags);
- }
-
- return (a->address - b->address);
-}
-
-
-static int
-property_table_matches (const void *ap, const void *bp)
-{
- const property_table_entry *a = (const property_table_entry *) ap;
- const property_table_entry *b = (const property_table_entry *) bp;
-
- /* Check if one entry overlaps with the other. */
- if ((b->address >= a->address && b->address < (a->address + a->size))
- || (a->address >= b->address && a->address < (b->address + b->size)))
- return 0;
-
- return (a->address - b->address);
-}
-
-
-/* Get the literal table or property table entries for the given
- section. Sets TABLE_P and returns the number of entries. On
- error, returns a negative value. */
-
-static int
-xtensa_read_table_entries (bfd *abfd,
- asection *section,
- property_table_entry **table_p,
- const char *sec_name,
- bfd_boolean output_addr)
-{
- asection *table_section;
- bfd_size_type table_size = 0;
- bfd_byte *table_data;
- property_table_entry *blocks;
- int blk, block_count;
- bfd_size_type num_records;
- Elf_Internal_Rela *internal_relocs, *irel, *rel_end;
- bfd_vma section_addr, off;
- flagword predef_flags;
- bfd_size_type table_entry_size, section_limit;
-
- if (!section
- || !(section->flags & SEC_ALLOC)
- || (section->flags & SEC_DEBUGGING))
- {
- *table_p = NULL;
- return 0;
- }
-
- table_section = xtensa_get_property_section (section, sec_name);
- if (table_section)
- table_size = table_section->size;
-
- if (table_size == 0)
- {
- *table_p = NULL;
- return 0;
- }
-
- predef_flags = xtensa_get_property_predef_flags (table_section);
- table_entry_size = 12;
- if (predef_flags)
- table_entry_size -= 4;
-
- num_records = table_size / table_entry_size;
- table_data = retrieve_contents (abfd, table_section, TRUE);
- blocks = (property_table_entry *)
- bfd_malloc (num_records * sizeof (property_table_entry));
- block_count = 0;
-
- if (output_addr)
- section_addr = section->output_section->vma + section->output_offset;
- else
- section_addr = section->vma;
-
- internal_relocs = retrieve_internal_relocs (abfd, table_section, TRUE);
- if (internal_relocs && !table_section->reloc_done)
- {
- qsort (internal_relocs, table_section->reloc_count,
- sizeof (Elf_Internal_Rela), internal_reloc_compare);
- irel = internal_relocs;
- }
- else
- irel = NULL;
-
- section_limit = bfd_get_section_limit (abfd, section);
- rel_end = internal_relocs + table_section->reloc_count;
-
- for (off = 0; off < table_size; off += table_entry_size)
- {
- bfd_vma address = bfd_get_32 (abfd, table_data + off);
-
- /* Skip any relocations before the current offset. This should help
- avoid confusion caused by unexpected relocations for the preceding
- table entry. */
- while (irel &&
- (irel->rz_offset < off
- || (irel->rz_offset == off
- && ELF32_R_TYPE (irel->rz_info) == RZ_XTENSA_NONE)))
- {
- irel += 1;
- if (irel >= rel_end)
- irel = 0;
- }
-
- if (irel && irel->rz_offset == off)
- {
- bfd_vma sym_off;
- unsigned long rz_symndx = ELF32_R_SYM (irel->rz_info);
- BFD_ASSERT (ELF32_R_TYPE (irel->rz_info) == RZ_XTENSA_32);
-
- if (get_elf_r_symndx_section (abfd, rz_symndx) != section)
- continue;
-
- sym_off = get_elf_r_symndx_offset (abfd, rz_symndx);
- BFD_ASSERT (sym_off == 0);
- address += (section_addr + sym_off + irel->rz_addend);
- }
- else
- {
- if (address < section_addr
- || address >= section_addr + section_limit)
- continue;
- }
-
- blocks[block_count].address = address;
- blocks[block_count].size = bfd_get_32 (abfd, table_data + off + 4);
- if (predef_flags)
- blocks[block_count].flags = predef_flags;
- else
- blocks[block_count].flags = bfd_get_32 (abfd, table_data + off + 8);
- block_count++;
- }
-
- release_contents (table_section, table_data);
- release_internal_relocs (table_section, internal_relocs);
-
- if (block_count > 0)
- {
- /* Now sort them into address order for easy reference. */
- qsort (blocks, block_count, sizeof (property_table_entry),
- property_table_compare);
-
- /* Check that the table contents are valid. Problems may occur,
- for example, if an unrelocated object file is stripped. */
- for (blk = 1; blk < block_count; blk++)
- {
- /* The only circumstance where two entries may legitimately
- have the same address is when one of them is a zero-size
- placeholder to mark a place where fill can be inserted.
- The zero-size entry should come first. */
- if (blocks[blk - 1].address == blocks[blk].address &&
- blocks[blk - 1].size != 0)
- {
- (*_bfd_error_handler) (_("%B(%A): invalid property table"),
- abfd, section);
- bfd_set_error (bfd_error_bad_value);
- free (blocks);
- return -1;
- }
- }
- }
-
- *table_p = blocks;
- return block_count;
-}
-
-
-static property_table_entry *
-elf_xtensa_find_property_entry (property_table_entry *property_table,
- int property_table_size,
- bfd_vma addr)
-{
- property_table_entry entry;
- property_table_entry *rv;
-
- if (property_table_size == 0)
- return NULL;
-
- entry.address = addr;
- entry.size = 1;
- entry.flags = 0;
-
- rv = bsearch (&entry, property_table, property_table_size,
- sizeof (property_table_entry), property_table_matches);
- return rv;
-}
-
-
-static bfd_boolean
-elf_xtensa_in_literal_pool (property_table_entry *lit_table,
- int lit_table_size,
- bfd_vma addr)
-{
- if (elf_xtensa_find_property_entry (lit_table, lit_table_size, addr))
- return TRUE;
-
- return FALSE;
-}
-
-
-/* Look through the relocs for a section during the first phase, and
- calculate needed space in the dynamic reloc sections. */
-
-static bfd_boolean
-elf_xtensa_check_relocs (bfd *abfd,
- struct bfd_link_info *info,
- asection *sec,
- const Elf_Internal_Rela *relocs)
-{
- struct elf_xtensa_link_hash_table *htab;
- Elf_Internal_Shdr *symtab_hdr;
- struct elf_link_hash_entry **sym_hashes;
- const Elf_Internal_Rela *rel;
- const Elf_Internal_Rela *rel_end;
-
- if (info->relocatable || (sec->flags & SEC_ALLOC) == 0)
- return TRUE;
-
- BFD_ASSERT (is_xtensa_elf (abfd));
-
- htab = elf_xtensa_hash_table (info);
- if (htab == NULL)
- return FALSE;
-
- symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
- sym_hashes = elf_sym_hashes (abfd);
-
- rel_end = relocs + sec->reloc_count;
- for (rel = relocs; rel < rel_end; rel++)
- {
- unsigned int rz_type;
- unsigned long rz_symndx;
- struct elf_link_hash_entry *h = NULL;
- struct elf_xtensa_link_hash_entry *eh;
- int tls_type, old_tls_type;
- bfd_boolean is_got = FALSE;
- bfd_boolean is_plt = FALSE;
- bfd_boolean is_tlsfunc = FALSE;
-
- rz_symndx = ELF32_R_SYM (rel->rz_info);
- rz_type = ELF32_R_TYPE (rel->rz_info);
-
- if (rz_symndx >= NUM_SHDR_ENTRIES (symtab_hdr))
- {
- (*_bfd_error_handler) (_("%B: bad symbol index: %d"),
- abfd, rz_symndx);
- return FALSE;
- }
-
- if (rz_symndx >= symtab_hdr->sh_info)
- {
- h = sym_hashes[rz_symndx - symtab_hdr->sh_info];
- while (h->root.type == bfd_link_hash_indirect
- || h->root.type == bfd_link_hash_warning)
- h = (struct elf_link_hash_entry *) h->root.u.i.link;
-
- /* PR15323, ref flags aren't set for references in the same
- object. */
- h->root.non_ir_ref = 1;
- }
- eh = elf_xtensa_hash_entry (h);
-
- switch (rz_type)
- {
- case RZ_XTENSA_TLSDESC_FN:
- if (info->shared)
- {
- tls_type = GOT_TLS_GD;
- is_got = TRUE;
- is_tlsfunc = TRUE;
- }
- else
- tls_type = GOT_TLS_IE;
- break;
-
- case RZ_XTENSA_TLSDESC_ARG:
- if (info->shared)
- {
- tls_type = GOT_TLS_GD;
- is_got = TRUE;
- }
- else
- {
- tls_type = GOT_TLS_IE;
- if (h && elf_xtensa_hash_entry (h) != htab->tlsbase)
- is_got = TRUE;
- }
- break;
-
- case RZ_XTENSA_TLS_DTPOFF:
- if (info->shared)
- tls_type = GOT_TLS_GD;
- else
- tls_type = GOT_TLS_IE;
- break;
-
- case RZ_XTENSA_TLS_TPOFF:
- tls_type = GOT_TLS_IE;
- if (info->shared)
- info->flags |= DF_STATIC_TLS;
- if (info->shared || h)
- is_got = TRUE;
- break;
-
- case RZ_XTENSA_32:
- tls_type = GOT_NORMAL;
- is_got = TRUE;
- break;
-
- case RZ_XTENSA_PLT:
- tls_type = GOT_NORMAL;
- is_plt = TRUE;
- break;
-
- case RZ_XTENSA_GNU_VTINHERIT:
- /* This relocation describes the C++ object vtable hierarchy.
- Reconstruct it for later use during GC. */
- if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->rz_offset))
- return FALSE;
- continue;
-
- case RZ_XTENSA_GNU_VTENTRY:
- /* This relocation describes which C++ vtable entries are actually
- used. Record for later use during GC. */
- BFD_ASSERT (h != NULL);
- if (h != NULL
- && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->rz_addend))
- return FALSE;
- continue;
-
- default:
- /* Nothing to do for any other relocations. */
- continue;
- }
-
- if (h)
- {
- if (is_plt)
- {
- if (h->plt.refcount <= 0)
- {
- h->needs_plt = 1;
- h->plt.refcount = 1;
- }
- else
- h->plt.refcount += 1;
-
- /* Keep track of the total PLT relocation count even if we
- don't yet know whether the dynamic sections will be
- created. */
- htab->plt_reloc_count += 1;
-
- if (elf_hash_table (info)->dynamic_sections_created)
- {
- if (! add_extra_plt_sections (info, htab->plt_reloc_count))
- return FALSE;
- }
- }
- else if (is_got)
- {
- if (h->got.refcount <= 0)
- h->got.refcount = 1;
- else
- h->got.refcount += 1;
- }
-
- if (is_tlsfunc)
- eh->tlsfunc_refcount += 1;
-
- old_tls_type = eh->tls_type;
- }
- else
- {
- /* Allocate storage the first time. */
- if (elf_local_got_refcounts (abfd) == NULL)
- {
- bfd_size_type size = symtab_hdr->sh_info;
- void *mem;
-
- mem = bfd_zalloc (abfd, size * sizeof (bfd_signed_vma));
- if (mem == NULL)
- return FALSE;
- elf_local_got_refcounts (abfd) = (bfd_signed_vma *) mem;
-
- mem = bfd_zalloc (abfd, size);
- if (mem == NULL)
- return FALSE;
- elf_xtensa_local_got_tls_type (abfd) = (char *) mem;
-
- mem = bfd_zalloc (abfd, size * sizeof (bfd_signed_vma));
- if (mem == NULL)
- return FALSE;
- elf_xtensa_local_tlsfunc_refcounts (abfd)
- = (bfd_signed_vma *) mem;
- }
-
- /* This is a global offset table entry for a local symbol. */
- if (is_got || is_plt)
- elf_local_got_refcounts (abfd) [rz_symndx] += 1;
-
- if (is_tlsfunc)
- elf_xtensa_local_tlsfunc_refcounts (abfd) [rz_symndx] += 1;
-
- old_tls_type = elf_xtensa_local_got_tls_type (abfd) [rz_symndx];
- }
-
- if ((old_tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_IE))
- tls_type |= old_tls_type;
- /* If a TLS symbol is accessed using IE at least once,
- there is no point to use a dynamic model for it. */
- else if (old_tls_type != tls_type && old_tls_type != GOT_UNKNOWN
- && ((old_tls_type & GOT_TLS_GD) == 0
- || (tls_type & GOT_TLS_IE) == 0))
- {
- if ((old_tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GD))
- tls_type = old_tls_type;
- else if ((old_tls_type & GOT_TLS_GD) && (tls_type & GOT_TLS_GD))
- tls_type |= old_tls_type;
- else
- {
- (*_bfd_error_handler)
- (_("%B: `%s' accessed both as normal and thread local symbol"),
- abfd,
- h ? h->root.root.string : "<local>");
- return FALSE;
- }
- }
-
- if (old_tls_type != tls_type)
- {
- if (eh)
- eh->tls_type = tls_type;
- else
- elf_xtensa_local_got_tls_type (abfd) [rz_symndx] = tls_type;
- }
- }
-
- return TRUE;
-}
-
-
-static void
-elf_xtensa_make_sym_local (struct bfd_link_info *info,
- struct elf_link_hash_entry *h)
-{
- if (info->shared)
- {
- if (h->plt.refcount > 0)
- {
- /* For shared objects, there's no need for PLT entries for local
- symbols (use RELATIVE relocs instead of JMP_SLOT relocs). */
- if (h->got.refcount < 0)
- h->got.refcount = 0;
- h->got.refcount += h->plt.refcount;
- h->plt.refcount = 0;
- }
- }
- else
- {
- /* Don't need any dynamic relocations at all. */
- h->plt.refcount = 0;
- h->got.refcount = 0;
- }
-}
-
-
-static void
-elf_xtensa_hide_symbol (struct bfd_link_info *info,
- struct elf_link_hash_entry *h,
- bfd_boolean force_local)
-{
- /* For a shared link, move the plt refcount to the got refcount to leave
- space for RELATIVE relocs. */
- elf_xtensa_make_sym_local (info, h);
-
- _bfd_elf_link_hash_hide_symbol (info, h, force_local);
-}
-
-
-/* Return the section that should be marked against GC for a given
- relocation. */
-
-static asection *
-elf_xtensa_gc_mark_hook (asection *sec,
- struct bfd_link_info *info,
- Elf_Internal_Rela *rel,
- struct elf_link_hash_entry *h,
- Elf_Internal_Sym *sym)
-{
- /* Property sections are marked "KEEP" in the linker scripts, but they
- should not cause other sections to be marked. (This approach relies
- on elf_xtensa_discard_info to remove property table entries that
- describe discarded sections. Alternatively, it might be more
- efficient to avoid using "KEEP" in the linker scripts and instead use
- the gc_mark_extra_sections hook to mark only the property sections
- that describe marked sections. That alternative does not work well
- with the current property table sections, which do not correspond
- one-to-one with the sections they describe, but that should be fixed
- someday.) */
- if (xtensa_is_property_section (sec))
- return NULL;
-
- if (h != NULL)
- switch (ELF32_R_TYPE (rel->rz_info))
- {
- case RZ_XTENSA_GNU_VTINHERIT:
- case RZ_XTENSA_GNU_VTENTRY:
- return NULL;
- }
-
- return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
-}
-
-
-/* Update the GOT & PLT entry reference counts
- for the section being removed. */
-
-static bfd_boolean
-elf_xtensa_gc_sweep_hook (bfd *abfd,
- struct bfd_link_info *info,
- asection *sec,
- const Elf_Internal_Rela *relocs)
-{
- Elf_Internal_Shdr *symtab_hdr;
- struct elf_link_hash_entry **sym_hashes;
- const Elf_Internal_Rela *rel, *relend;
- struct elf_xtensa_link_hash_table *htab;
-
- htab = elf_xtensa_hash_table (info);
- if (htab == NULL)
- return FALSE;
-
- if (info->relocatable)
- return TRUE;
-
- if ((sec->flags & SEC_ALLOC) == 0)
- return TRUE;
-
- symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
- sym_hashes = elf_sym_hashes (abfd);
-
- relend = relocs + sec->reloc_count;
- for (rel = relocs; rel < relend; rel++)
- {
- unsigned long rz_symndx;
- unsigned int rz_type;
- struct elf_link_hash_entry *h = NULL;
- struct elf_xtensa_link_hash_entry *eh;
- bfd_boolean is_got = FALSE;
- bfd_boolean is_plt = FALSE;
- bfd_boolean is_tlsfunc = FALSE;
-
- rz_symndx = ELF32_R_SYM (rel->rz_info);
- if (rz_symndx >= symtab_hdr->sh_info)
- {
- h = sym_hashes[rz_symndx - symtab_hdr->sh_info];
- while (h->root.type == bfd_link_hash_indirect
- || h->root.type == bfd_link_hash_warning)
- h = (struct elf_link_hash_entry *) h->root.u.i.link;
- }
- eh = elf_xtensa_hash_entry (h);
-
- rz_type = ELF32_R_TYPE (rel->rz_info);
- switch (rz_type)
- {
- case RZ_XTENSA_TLSDESC_FN:
- if (info->shared)
- {
- is_got = TRUE;
- is_tlsfunc = TRUE;
- }
- break;
-
- case RZ_XTENSA_TLSDESC_ARG:
- if (info->shared)
- is_got = TRUE;
- else
- {
- if (h && elf_xtensa_hash_entry (h) != htab->tlsbase)
- is_got = TRUE;
- }
- break;
-
- case RZ_XTENSA_TLS_TPOFF:
- if (info->shared || h)
- is_got = TRUE;
- break;
-
- case RZ_XTENSA_32:
- is_got = TRUE;
- break;
-
- case RZ_XTENSA_PLT:
- is_plt = TRUE;
- break;
-
- default:
- continue;
- }
-
- if (h)
- {
- if (is_plt)
- {
- /* If the symbol has been localized its plt.refcount got moved
- to got.refcount. Handle it as GOT. */
- if (h->plt.refcount > 0)
- h->plt.refcount--;
- else
- is_got = TRUE;
- }
- if (is_got)
- {
- if (h->got.refcount > 0)
- h->got.refcount--;
- }
- if (is_tlsfunc)
- {
- if (eh->tlsfunc_refcount > 0)
- eh->tlsfunc_refcount--;
- }
- }
- else
- {
- if (is_got || is_plt)
- {
- bfd_signed_vma *got_refcount
- = &elf_local_got_refcounts (abfd) [rz_symndx];
- if (*got_refcount > 0)
- *got_refcount -= 1;
- }
- if (is_tlsfunc)
- {
- bfd_signed_vma *tlsfunc_refcount
- = &elf_xtensa_local_tlsfunc_refcounts (abfd) [rz_symndx];
- if (*tlsfunc_refcount > 0)
- *tlsfunc_refcount -= 1;
- }
- }
- }
-
- return TRUE;
-}
-
-
-/* Create all the dynamic sections. */
-
-static bfd_boolean
-elf_xtensa_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
-{
- struct elf_xtensa_link_hash_table *htab;
- flagword flags, noalloc_flags;
-
- htab = elf_xtensa_hash_table (info);
- if (htab == NULL)
- return FALSE;
-
- /* First do all the standard stuff. */
- if (! _bfd_elf_create_dynamic_sections (dynobj, info))
- return FALSE;
- htab->splt = bfd_get_linker_section (dynobj, ".plt");
- htab->srelplt = bfd_get_linker_section (dynobj, ".rela.plt");
- htab->sgot = bfd_get_linker_section (dynobj, ".got");
- htab->sgotplt = bfd_get_linker_section (dynobj, ".got.plt");
- htab->srelgot = bfd_get_linker_section (dynobj, ".rela.got");
-
- /* Create any extra PLT sections in case check_relocs has already
- been called on all the non-dynamic input files. */
- if (! add_extra_plt_sections (info, htab->plt_reloc_count))
- return FALSE;
-
- noalloc_flags = (SEC_HAS_CONTENTS | SEC_IN_MEMORY
- | SEC_LINKER_CREATED | SEC_READONLY);
- flags = noalloc_flags | SEC_ALLOC | SEC_LOAD;
-
- /* Mark the ".got.plt" section READONLY. */
- if (htab->sgotplt == NULL
- || ! bfd_set_section_flags (dynobj, htab->sgotplt, flags))
- return FALSE;
-
- /* Create ".got.loc" (literal tables for use by dynamic linker). */
- htab->sgotloc = bfd_make_section_anyway_with_flags (dynobj, ".got.loc",
- flags);
- if (htab->sgotloc == NULL
- || ! bfd_set_section_alignment (dynobj, htab->sgotloc, 2))
- return FALSE;
-
- /* Create ".xt.lit.plt" (literal table for ".got.plt*"). */
- htab->spltlittbl = bfd_make_section_anyway_with_flags (dynobj, ".xt.lit.plt",
- noalloc_flags);
- if (htab->spltlittbl == NULL
- || ! bfd_set_section_alignment (dynobj, htab->spltlittbl, 2))
- return FALSE;
-
- return TRUE;
-}
-
-
-static bfd_boolean
-add_extra_plt_sections (struct bfd_link_info *info, int count)
-{
- bfd *dynobj = elf_hash_table (info)->dynobj;
- int chunk;
-
- /* Iterate over all chunks except 0 which uses the standard ".plt" and
- ".got.plt" sections. */
- for (chunk = count / PLT_ENTRIES_PER_CHUNK; chunk > 0; chunk--)
- {
- char *sname;
- flagword flags;
- asection *s;
-
- /* Stop when we find a section has already been created. */
- if (elf_xtensa_get_plt_section (info, chunk))
- break;
-
- flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
- | SEC_LINKER_CREATED | SEC_READONLY);
-
- sname = (char *) bfd_malloc (10);
- sprintf (sname, ".plt.%u", chunk);
- s = bfd_make_section_anyway_with_flags (dynobj, sname, flags | SEC_CODE);
- if (s == NULL
- || ! bfd_set_section_alignment (dynobj, s, 2))
- return FALSE;
-
- sname = (char *) bfd_malloc (14);
- sprintf (sname, ".got.plt.%u", chunk);
- s = bfd_make_section_anyway_with_flags (dynobj, sname, flags);
- if (s == NULL
- || ! bfd_set_section_alignment (dynobj, s, 2))
- return FALSE;
- }
-
- return TRUE;
-}
-
-
-/* Adjust a symbol defined by a dynamic object and referenced by a
- regular object. The current definition is in some section of the
- dynamic object, but we're not including those sections. We have to
- change the definition to something the rest of the link can
- understand. */
-
-static bfd_boolean
-elf_xtensa_adjust_dynamic_symbol (struct bfd_link_info *info ATTRIBUTE_UNUSED,
- struct elf_link_hash_entry *h)
-{
- /* If this is a weak symbol, and there is a real definition, the
- processor independent code will have arranged for us to see the
- real definition first, and we can just use the same value. */
- if (h->u.weakdef)
- {
- BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
- || h->u.weakdef->root.type == bfd_link_hash_defweak);
- h->root.u.def.section = h->u.weakdef->root.u.def.section;
- h->root.u.def.value = h->u.weakdef->root.u.def.value;
- return TRUE;
- }
-
- /* This is a reference to a symbol defined by a dynamic object. The
- reference must go through the GOT, so there's no need for COPY relocs,
- .dynbss, etc. */
-
- return TRUE;
-}
-
-#if 0
-
-static bfd_boolean
-elf_xtensa_allocate_dynrelocs (struct elf_link_hash_entry *h, void *arg)
-{
- struct bfd_link_info *info;
- struct elf_xtensa_link_hash_table *htab;
- struct elf_xtensa_link_hash_entry *eh = elf_xtensa_hash_entry (h);
-
- if (h->root.type == bfd_link_hash_indirect)
- return TRUE;
-
- info = (struct bfd_link_info *) arg;
- htab = elf_xtensa_hash_table (info);
- if (htab == NULL)
- return FALSE;
-
- /* If we saw any use of an IE model for this symbol, we can then optimize
- away GOT entries for any TLSDESC_FN relocs. */
- if ((eh->tls_type & GOT_TLS_IE) != 0)
- {
- BFD_ASSERT (h->got.refcount >= eh->tlsfunc_refcount);
- h->got.refcount -= eh->tlsfunc_refcount;
- }
-
- if (! elf_xtensa_dynamic_symbol_p (h, info))
- elf_xtensa_make_sym_local (info, h);
-
- if (h->plt.refcount > 0)
- htab->srelplt->size += (h->plt.refcount * sizeof (Elf32_External_Rela));
-
- if (h->got.refcount > 0)
- htab->srelgot->size += (h->got.refcount * sizeof (Elf32_External_Rela));
-
- return TRUE;
-}
-
-
-static void
-elf_xtensa_allocate_local_got_size (struct bfd_link_info *info)
-{
- struct elf_xtensa_link_hash_table *htab;
- bfd *i;
-
- htab = elf_xtensa_hash_table (info);
- if (htab == NULL)
- return;
-
- for (i = info->input_bfds; i; i = i->link.next)
- {
- bfd_signed_vma *local_got_refcounts;
- bfd_size_type j, cnt;
- Elf_Internal_Shdr *symtab_hdr;
-
- local_got_refcounts = elf_local_got_refcounts (i);
- if (!local_got_refcounts)
- continue;
-
- symtab_hdr = &elf_tdata (i)->symtab_hdr;
- cnt = symtab_hdr->sh_info;
-
- for (j = 0; j < cnt; ++j)
- {
- /* If we saw any use of an IE model for this symbol, we can
- then optimize away GOT entries for any TLSDESC_FN relocs. */
- if ((elf_xtensa_local_got_tls_type (i) [j] & GOT_TLS_IE) != 0)
- {
- bfd_signed_vma *tlsfunc_refcount
- = &elf_xtensa_local_tlsfunc_refcounts (i) [j];
- BFD_ASSERT (local_got_refcounts[j] >= *tlsfunc_refcount);
- local_got_refcounts[j] -= *tlsfunc_refcount;
- }
-
- if (local_got_refcounts[j] > 0)
- htab->srelgot->size += (local_got_refcounts[j]
- * sizeof (Elf32_External_Rela));
- }
- }
-}
-
-
-/* Set the sizes of the dynamic sections. */
-
-static bfd_boolean
-elf_xtensa_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
- struct bfd_link_info *info)
-{
- struct elf_xtensa_link_hash_table *htab;
- bfd *dynobj, *abfd;
- asection *s, *srelplt, *splt, *sgotplt, *srelgot, *spltlittbl, *sgotloc;
- bfd_boolean relplt, relgot;
- int plt_entries, plt_chunks, chunk;
-
- plt_entries = 0;
- plt_chunks = 0;
-
- htab = elf_xtensa_hash_table (info);
- if (htab == NULL)
- return FALSE;
-
- dynobj = elf_hash_table (info)->dynobj;
- if (dynobj == NULL)
- abort ();
- srelgot = htab->srelgot;
- srelplt = htab->srelplt;
-
- if (elf_hash_table (info)->dynamic_sections_created)
- {
- BFD_ASSERT (htab->srelgot != NULL
- && htab->srelplt != NULL
- && htab->sgot != NULL
- && htab->spltlittbl != NULL
- && htab->sgotloc != NULL);
-
- /* Set the contents of the .interp section to the interpreter. */
- if (info->executable)
- {
- s = bfd_get_linker_section (dynobj, ".interp");
- if (s == NULL)
- abort ();
- s->size = sizeof ELF_DYNAMIC_INTERPRETER;
- s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
- }
-
- /* Allocate room for one word in ".got". */
- htab->sgot->size = 4;
-
- /* Allocate space in ".rela.got" for literals that reference global
- symbols and space in ".rela.plt" for literals that have PLT
- entries. */
- elf_link_hash_traverse (elf_hash_table (info),
- elf_xtensa_allocate_dynrelocs,
- (void *) info);
-
- /* If we are generating a shared object, we also need space in
- ".rela.got" for RZ_XTENSA_RELATIVE relocs for literals that
- reference local symbols. */
- if (info->shared)
- elf_xtensa_allocate_local_got_size (info);
-
- /* Allocate space in ".plt" to match the size of ".rela.plt". For
- each PLT entry, we need the PLT code plus a 4-byte literal.
- For each chunk of ".plt", we also need two more 4-byte
- literals, two corresponding entries in ".rela.got", and an
- 8-byte entry in ".xt.lit.plt". */
- spltlittbl = htab->spltlittbl;
- plt_entries = srelplt->size / sizeof (Elf32_External_Rela);
- plt_chunks =
- (plt_entries + PLT_ENTRIES_PER_CHUNK - 1) / PLT_ENTRIES_PER_CHUNK;
-
- /* Iterate over all the PLT chunks, including any extra sections
- created earlier because the initial count of PLT relocations
- was an overestimate. */
- for (chunk = 0;
- (splt = elf_xtensa_get_plt_section (info, chunk)) != NULL;
- chunk++)
- {
- int chunk_entries;
-
- sgotplt = elf_xtensa_get_gotplt_section (info, chunk);
- BFD_ASSERT (sgotplt != NULL);
-
- if (chunk < plt_chunks - 1)
- chunk_entries = PLT_ENTRIES_PER_CHUNK;
- else if (chunk == plt_chunks - 1)
- chunk_entries = plt_entries - (chunk * PLT_ENTRIES_PER_CHUNK);
- else
- chunk_entries = 0;
-
- if (chunk_entries != 0)
- {
- sgotplt->size = 4 * (chunk_entries + 2);
- splt->size = PLT_ENTRY_SIZE * chunk_entries;
- srelgot->size += 2 * sizeof (Elf32_External_Rela);
- spltlittbl->size += 8;
- }
- else
- {
- sgotplt->size = 0;
- splt->size = 0;
- }
- }
-
- /* Allocate space in ".got.loc" to match the total size of all the
- literal tables. */
- sgotloc = htab->sgotloc;
- sgotloc->size = spltlittbl->size;
- for (abfd = info->input_bfds; abfd != NULL; abfd = abfd->link.next)
- {
- if (abfd->flags & DYNAMIC)
- continue;
- for (s = abfd->sections; s != NULL; s = s->next)
- {
- if (! discarded_section (s)
- && xtensa_is_littable_section (s)
- && s != spltlittbl)
- sgotloc->size += s->size;
- }
- }
- }
-
- /* Allocate memory for dynamic sections. */
- relplt = FALSE;
- relgot = FALSE;
- for (s = dynobj->sections; s != NULL; s = s->next)
- {
- const char *name;
-
- if ((s->flags & SEC_LINKER_CREATED) == 0)
- continue;
-
- /* It's OK to base decisions on the section name, because none
- of the dynobj section names depend upon the input files. */
- name = bfd_get_section_name (dynobj, s);
-
- if (CONST_STRNEQ (name, ".rela"))
- {
- if (s->size != 0)
- {
- if (strcmp (name, ".rela.plt") == 0)
- relplt = TRUE;
- else if (strcmp (name, ".rela.got") == 0)
- relgot = TRUE;
-
- /* We use the reloc_count field as a counter if we need
- to copy relocs into the output file. */
- s->reloc_count = 0;
- }
- }
- else if (! CONST_STRNEQ (name, ".plt.")
- && ! CONST_STRNEQ (name, ".got.plt.")
- && strcmp (name, ".got") != 0
- && strcmp (name, ".plt") != 0
- && strcmp (name, ".got.plt") != 0
- && strcmp (name, ".xt.lit.plt") != 0
- && strcmp (name, ".got.loc") != 0)
- {
- /* It's not one of our sections, so don't allocate space. */
- continue;
- }
-
- if (s->size == 0)
- {
- /* If we don't need this section, strip it from the output
- file. We must create the ".plt*" and ".got.plt*"
- sections in create_dynamic_sections and/or check_relocs
- based on a conservative estimate of the PLT relocation
- count, because the sections must be created before the
- linker maps input sections to output sections. The
- linker does that before size_dynamic_sections, where we
- compute the exact size of the PLT, so there may be more
- of these sections than are actually needed. */
- s->flags |= SEC_EXCLUDE;
- }
- else if ((s->flags & SEC_HAS_CONTENTS) != 0)
- {
- /* Allocate memory for the section contents. */
- s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
- if (s->contents == NULL)
- return FALSE;
- }
- }
-
- if (elf_hash_table (info)->dynamic_sections_created)
- {
- /* Add the special XTENSA_RTLD relocations now. The offsets won't be
- known until finish_dynamic_sections, but we need to get the relocs
- in place before they are sorted. */
- for (chunk = 0; chunk < plt_chunks; chunk++)
- {
- Elf_Internal_Rela irela;
- bfd_byte *loc;
-
- irela.rz_offset = 0;
- irela.rz_info = ELF32_R_INFO (0, RZ_XTENSA_RTLD);
- irela.rz_addend = 0;
-
- loc = (srelgot->contents
- + srelgot->reloc_count * sizeof (Elf32_External_Rela));
- bfd_elf32_swap_reloca_out (output_bfd, &irela, loc);
- bfd_elf32_swap_reloca_out (output_bfd, &irela,
- loc + sizeof (Elf32_External_Rela));
- srelgot->reloc_count += 2;
- }
-
- /* Add some entries to the .dynamic section. We fill in the
- values later, in elf_xtensa_finish_dynamic_sections, but we
- must add the entries now so that we get the correct size for
- the .dynamic section. The DT_DEBUG entry is filled in by the
- dynamic linker and used by the debugger. */
-#define add_dynamic_entry(TAG, VAL) \
- _bfd_elf_add_dynamic_entry (info, TAG, VAL)
-
- if (info->executable)
- {
- if (!add_dynamic_entry (DT_DEBUG, 0))
- return FALSE;
- }
-
- if (relplt)
- {
- if (!add_dynamic_entry (DT_PLTRELSZ, 0)
- || !add_dynamic_entry (DT_PLTREL, DT_RELA)
- || !add_dynamic_entry (DT_JMPREL, 0))
- return FALSE;
- }
-
- if (relgot)
- {
- if (!add_dynamic_entry (DT_RELA, 0)
- || !add_dynamic_entry (DT_RELASZ, 0)
- || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
- return FALSE;
- }
-
- if (!add_dynamic_entry (DT_PLTGOT, 0)
- || !add_dynamic_entry (DT_XTENSA_GOT_LOC_OFF, 0)
- || !add_dynamic_entry (DT_XTENSA_GOT_LOC_SZ, 0))
- return FALSE;
- }
-#undef add_dynamic_entry
-
- return TRUE;
-}
-
-static bfd_boolean
-elf_xtensa_always_size_sections (bfd *output_bfd,
- struct bfd_link_info *info)
-{
- struct elf_xtensa_link_hash_table *htab;
- asection *tls_sec;
-
- htab = elf_xtensa_hash_table (info);
- if (htab == NULL)
- return FALSE;
-
- tls_sec = htab->elf.tls_sec;
-
- if (tls_sec && (htab->tlsbase->tls_type & GOT_TLS_ANY) != 0)
- {
- struct elf_link_hash_entry *tlsbase = &htab->tlsbase->elf;
- struct bfd_link_hash_entry *bh = &tlsbase->root;
- const struct elf_backend_data *bed = get_elf_backend_data (output_bfd);
-
- tlsbase->type = STT_TLS;
- if (!(_bfd_generic_link_add_one_symbol
- (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
- tls_sec, 0, NULL, FALSE,
- bed->collect, &bh)))
- return FALSE;
- tlsbase->def_regular = 1;
- tlsbase->other = STV_HIDDEN;
- (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
- }
-
- return TRUE;
-}
-
-
-/* Return the base VMA address which should be subtracted from real addresses
- when resolving @dtpoff relocation.
- This is PT_TLS segment p_vaddr. */
-
-static bfd_vma
-dtpoff_base (struct bfd_link_info *info)
-{
- /* If tls_sec is NULL, we should have signalled an error already. */
- if (elf_hash_table (info)->tls_sec == NULL)
- return 0;
- return elf_hash_table (info)->tls_sec->vma;
-}
-
-/* Return the relocation value for @tpoff relocation
- if STT_TLS virtual address is ADDRESS. */
-
-static bfd_vma
-tpoff (struct bfd_link_info *info, bfd_vma address)
-{
- struct elf_link_hash_table *htab = elf_hash_table (info);
- bfd_vma base;
-
- /* If tls_sec is NULL, we should have signalled an error already. */
- if (htab->tls_sec == NULL)
- return 0;
- base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
- return address - htab->tls_sec->vma + base;
-}
-
-/* Perform the specified relocation. The instruction at (contents + address)
- is modified to set one operand to represent the value in "relocation". The
- operand position is determined by the relocation type recorded in the
- howto. */
-
-#define CALL_SEGMENT_BITS (30)
-#define CALL_SEGMENT_SIZE (1 << CALL_SEGMENT_BITS)
-
-static bfd_reloc_status_type
-elf_xtensa_do_reloc (reloc_howto_type *howto,
- bfd *abfd,
- asection *input_section,
- bfd_vma relocation,
- bfd_byte *contents,
- bfd_vma address,
- bfd_boolean is_weak_undef,
- char **error_message)
-{
- xtensa_format fmt;
- xtensa_opcode opcode;
- xtensa_isa isa = xtensa_default_isa;
- static xtensa_insnbuf ibuff = NULL;
- static xtensa_insnbuf sbuff = NULL;
- bfd_vma self_address;
- bfd_size_type input_size;
- int opnd, slot;
- uint32 newval;
-
- if (!ibuff)
- {
- ibuff = xtensa_insnbuf_alloc (isa);
- sbuff = xtensa_insnbuf_alloc (isa);
- }
-
- input_size = bfd_get_section_limit (abfd, input_section);
-
- /* Calculate the PC address for this instruction. */
- self_address = (input_section->output_section->vma
- + input_section->output_offset
- + address);
-
- switch (howto->type)
- {
- case RZ_XTENSA_NONE:
- case RZ_XTENSA_DIFF8:
- case RZ_XTENSA_DIFF16:
- case RZ_XTENSA_DIFF32:
- case RZ_XTENSA_TLS_FUNC:
- case RZ_XTENSA_TLS_ARG:
- case RZ_XTENSA_TLS_CALL:
- return bfd_reloc_ok;
-
- case RZ_XTENSA_ASM_EXPAND:
- if (!is_weak_undef)
- {
- /* Check for windowed CALL across a 1GB boundary. */
- opcode = get_expanded_call_opcode (contents + address,
- input_size - address, 0);
- if (is_windowed_call_opcode (opcode))
- {
- if ((self_address >> CALL_SEGMENT_BITS)
- != (relocation >> CALL_SEGMENT_BITS))
- {
- *error_message = "windowed longcall crosses 1GB boundary; "
- "return may fail";
- return bfd_reloc_dangerous;
- }
- }
- }
- return bfd_reloc_ok;
-
- case RZ_XTENSA_ASM_SIMPLIFY:
- {
- /* Convert the L32R/CALLX to CALL. */
- bfd_reloc_status_type retval =
- elf_xtensa_do_asm_simplify (contents, address, input_size,
- error_message);
- if (retval != bfd_reloc_ok)
- return bfd_reloc_dangerous;
-
- /* The CALL needs to be relocated. Continue below for that part. */
- address += 3;
- self_address += 3;
- howto = &elf_howto_table[(unsigned) RZ_XTENSA_SLOT0_OP ];
- }
- break;
-
- case RZ_XTENSA_32:
- {
- bfd_vma x;
- x = bfd_get_32 (abfd, contents + address);
- x = x + relocation;
- bfd_put_32 (abfd, x, contents + address);
- }
- return bfd_reloc_ok;
-
- case RZ_XTENSA_32_PCREL:
- bfd_put_32 (abfd, relocation - self_address, contents + address);
- return bfd_reloc_ok;
-
- case RZ_XTENSA_PLT:
- case RZ_XTENSA_TLSDESC_FN:
- case RZ_XTENSA_TLSDESC_ARG:
- case RZ_XTENSA_TLS_DTPOFF:
- case RZ_XTENSA_TLS_TPOFF:
- bfd_put_32 (abfd, relocation, contents + address);
- return bfd_reloc_ok;
- }
-
- /* Only instruction slot-specific relocations handled below.... */
- slot = get_relocation_slot (howto->type);
- if (slot == XTENSA_UNDEFINED)
- {
- *error_message = "unexpected relocation";
- return bfd_reloc_dangerous;
- }
-
- /* Read the instruction into a buffer and decode the opcode. */
- xtensa_insnbuf_from_chars (isa, ibuff, contents + address,
- input_size - address);
- fmt = xtensa_format_decode (isa, ibuff);
- if (fmt == XTENSA_UNDEFINED)
- {
- *error_message = "cannot decode instruction format";
- return bfd_reloc_dangerous;
- }
-
- xtensa_format_get_slot (isa, fmt, slot, ibuff, sbuff);
-
- opcode = xtensa_opcode_decode (isa, fmt, slot, sbuff);
- if (opcode == XTENSA_UNDEFINED)
- {
- *error_message = "cannot decode instruction opcode";
- return bfd_reloc_dangerous;
- }
-
- /* Check for opcode-specific "alternate" relocations. */
- if (is_alt_relocation (howto->type))
- {
- if (opcode == get_l32r_opcode ())
- {
- /* Handle the special-case of non-PC-relative L32R instructions. */
- bfd *output_bfd = input_section->output_section->owner;
- asection *lit4_sec = bfd_get_section_by_name (output_bfd, ".lit4");
- if (!lit4_sec)
- {
- *error_message = "relocation references missing .lit4 section";
- return bfd_reloc_dangerous;
- }
- self_address = ((lit4_sec->vma & ~0xfff)
- + 0x40000 - 3); /* -3 to compensate for do_reloc */
- newval = relocation;
- opnd = 1;
- }
- else if (opcode == get_const16_opcode ())
- {
- /* ALT used for high 16 bits. */
- newval = relocation >> 16;
- opnd = 1;
- }
- else
- {
- /* No other "alternate" relocations currently defined. */
- *error_message = "unexpected relocation";
- return bfd_reloc_dangerous;
- }
- }
- else /* Not an "alternate" relocation.... */
- {
- if (opcode == get_const16_opcode ())
- {
- newval = relocation & 0xffff;
- opnd = 1;
- }
- else
- {
- /* ...normal PC-relative relocation.... */
-
- /* Determine which operand is being relocated. */
- opnd = get_relocation_opnd (opcode, howto->type);
- if (opnd == XTENSA_UNDEFINED)
- {
- *error_message = "unexpected relocation";
- return bfd_reloc_dangerous;
- }
-
- if (!howto->pc_relative)
- {
- *error_message = "expected PC-relative relocation";
- return bfd_reloc_dangerous;
- }
-
- newval = relocation;
- }
- }
-
- /* Apply the relocation. */
- if (xtensa_operand_do_reloc (isa, opcode, opnd, &newval, self_address)
- || xtensa_operand_encode (isa, opcode, opnd, &newval)
- || xtensa_operand_set_field (isa, opcode, opnd, fmt, slot,
- sbuff, newval))
- {
- const char *opname = xtensa_opcode_name (isa, opcode);
- const char *msg;
-
- msg = "cannot encode";
- if (is_direct_call_opcode (opcode))
- {
- if ((relocation & 0x3) != 0)
- msg = "misaligned call target";
- else
- msg = "call target out of range";
- }
- else if (opcode == get_l32r_opcode ())
- {
- if ((relocation & 0x3) != 0)
- msg = "misaligned literal target";
- else if (is_alt_relocation (howto->type))
- msg = "literal target out of range (too many literals)";
- else if (self_address > relocation)
- msg = "literal target out of range (try using text-section-literals)";
- else
- msg = "literal placed after use";
- }
-
- *error_message = vsprint_msg (opname, ": %s", strlen (msg) + 2, msg);
- return bfd_reloc_dangerous;
- }
-
- /* Check for calls across 1GB boundaries. */
- if (is_direct_call_opcode (opcode)
- && is_windowed_call_opcode (opcode))
- {
- if ((self_address >> CALL_SEGMENT_BITS)
- != (relocation >> CALL_SEGMENT_BITS))
- {
- *error_message =
- "windowed call crosses 1GB boundary; return may fail";
- return bfd_reloc_dangerous;
- }
- }
-
- /* Write the modified instruction back out of the buffer. */
- xtensa_format_set_slot (isa, fmt, slot, ibuff, sbuff);
- xtensa_insnbuf_to_chars (isa, ibuff, contents + address,
- input_size - address);
- return bfd_reloc_ok;
-}
-
-
-static char *
-vsprint_msg (const char *origmsg, const char *fmt, int arglen, ...)
-{
- /* To reduce the size of the memory leak,
- we only use a single message buffer. */
- static bfd_size_type alloc_size = 0;
- static char *message = NULL;
- bfd_size_type orig_len, len = 0;
- bfd_boolean is_append;
- va_list ap;
-
- va_start (ap, arglen);
-
- is_append = (origmsg == message);
-
- orig_len = strlen (origmsg);
- len = orig_len + strlen (fmt) + arglen + 20;
- if (len > alloc_size)
- {
- message = (char *) bfd_realloc_or_free (message, len);
- alloc_size = len;
- }
- if (message != NULL)
- {
- if (!is_append)
- memcpy (message, origmsg, orig_len);
- vsprintf (message + orig_len, fmt, ap);
- }
- va_end (ap);
- return message;
-}
-
-
-/* This function is registered as the "special_function" in the
- Xtensa howto for handling simplify operations.
- bfd_perform_relocation / bfd_install_relocation use it to
- perform (install) the specified relocation. Since this replaces the code
- in bfd_perform_relocation, it is basically an Xtensa-specific,
- stripped-down version of bfd_perform_relocation. */
-
-static bfd_reloc_status_type
-bfd_elf_xtensa_reloc (bfd *abfd,
- arelent *reloc_entry,
- asymbol *symbol,
- void *data,
- asection *input_section,
- bfd *output_bfd,
- char **error_message)
-{
- bfd_vma relocation;
- bfd_reloc_status_type flag;
- bfd_size_type octets = reloc_entry->address * bfd_octets_per_byte (abfd);
- bfd_vma output_base = 0;
- reloc_howto_type *howto = reloc_entry->howto;
- asection *reloc_target_output_section;
- bfd_boolean is_weak_undef;
-
- if (!xtensa_default_isa)
- xtensa_default_isa = xtensa_isa_init (0, 0);
-
- /* ELF relocs are against symbols. If we are producing relocatable
- output, and the reloc is against an external symbol, the resulting
- reloc will also be against the same symbol. In such a case, we
- don't want to change anything about the way the reloc is handled,
- since it will all be done at final link time. This test is similar
- to what bfd_elf_generic_reloc does except that it lets relocs with
- howto->partial_inplace go through even if the addend is non-zero.
- (The real problem is that partial_inplace is set for XTENSA_32
- relocs to begin with, but that's a long story and there's little we
- can do about it now....) */
-
- if (output_bfd && (symbol->flags & BSF_SECTION_SYM) == 0)
- {
- reloc_entry->address += input_section->output_offset;
- return bfd_reloc_ok;
- }
-
- /* Is the address of the relocation really within the section? */
- if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
- return bfd_reloc_outofrange;
-
- /* Work out which section the relocation is targeted at and the
- initial relocation command value. */
-
- /* Get symbol value. (Common symbols are special.) */
- if (bfd_is_com_section (symbol->section))
- relocation = 0;
- else
- relocation = symbol->value;
-
- reloc_target_output_section = symbol->section->output_section;
-
- /* Convert input-section-relative symbol value to absolute. */
- if ((output_bfd && !howto->partial_inplace)
- || reloc_target_output_section == NULL)
- output_base = 0;
- else
- output_base = reloc_target_output_section->vma;
-
- relocation += output_base + symbol->section->output_offset;
-
- /* Add in supplied addend. */
- relocation += reloc_entry->addend;
-
- /* Here the variable relocation holds the final address of the
- symbol we are relocating against, plus any addend. */
- if (output_bfd)
- {
- if (!howto->partial_inplace)
- {
- /* This is a partial relocation, and we want to apply the relocation
- to the reloc entry rather than the raw data. Everything except
- relocations against section symbols has already been handled
- above. */
-
- BFD_ASSERT (symbol->flags & BSF_SECTION_SYM);
- reloc_entry->addend = relocation;
- reloc_entry->address += input_section->output_offset;
- return bfd_reloc_ok;
- }
- else
- {
- reloc_entry->address += input_section->output_offset;
- reloc_entry->addend = 0;
- }
- }
-
- is_weak_undef = (bfd_is_und_section (symbol->section)
- && (symbol->flags & BSF_WEAK) != 0);
- flag = elf_xtensa_do_reloc (howto, abfd, input_section, relocation,
- (bfd_byte *) data, (bfd_vma) octets,
- is_weak_undef, error_message);
-
- if (flag == bfd_reloc_dangerous)
- {
- /* Add the symbol name to the error message. */
- if (! *error_message)
- *error_message = "";
- *error_message = vsprint_msg (*error_message, ": (%s + 0x%lx)",
- strlen (symbol->name) + 17,
- symbol->name,
- (unsigned long) reloc_entry->addend);
- }
-
- return flag;
-}
-
-
-/* Set up an entry in the procedure linkage table. */
-
-static bfd_vma
-elf_xtensa_create_plt_entry (struct bfd_link_info *info,
- bfd *output_bfd,
- unsigned reloc_index)
-{
- asection *splt, *sgotplt;
- bfd_vma plt_base, got_base;
- bfd_vma code_offset, lit_offset;
- int chunk;
-
- chunk = reloc_index / PLT_ENTRIES_PER_CHUNK;
- splt = elf_xtensa_get_plt_section (info, chunk);
- sgotplt = elf_xtensa_get_gotplt_section (info, chunk);
- BFD_ASSERT (splt != NULL && sgotplt != NULL);
-
- plt_base = splt->output_section->vma + splt->output_offset;
- got_base = sgotplt->output_section->vma + sgotplt->output_offset;
-
- lit_offset = 8 + (reloc_index % PLT_ENTRIES_PER_CHUNK) * 4;
- code_offset = (reloc_index % PLT_ENTRIES_PER_CHUNK) * PLT_ENTRY_SIZE;
-
- /* Fill in the literal entry. This is the offset of the dynamic
- relocation entry. */
- bfd_put_32 (output_bfd, reloc_index * sizeof (Elf32_External_Rela),
- sgotplt->contents + lit_offset);
-
- /* Fill in the entry in the procedure linkage table. */
- memcpy (splt->contents + code_offset,
- (bfd_big_endian (output_bfd)
- ? elf_xtensa_be_plt_entry
- : elf_xtensa_le_plt_entry),
- PLT_ENTRY_SIZE);
- bfd_put_16 (output_bfd, l32r_offset (got_base + 0,
- plt_base + code_offset + 3),
- splt->contents + code_offset + 4);
- bfd_put_16 (output_bfd, l32r_offset (got_base + 4,
- plt_base + code_offset + 6),
- splt->contents + code_offset + 7);
- bfd_put_16 (output_bfd, l32r_offset (got_base + lit_offset,
- plt_base + code_offset + 9),
- splt->contents + code_offset + 10);
-
- return plt_base + code_offset;
-}
-
-
-static bfd_boolean get_indirect_call_dest_reg (xtensa_opcode, unsigned *);
-
-static bfd_boolean
-replace_tls_insn (Elf_Internal_Rela *rel,
- bfd *abfd,
- asection *input_section,
- bfd_byte *contents,
- bfd_boolean is_ld_model,
- char **error_message)
-{
- static xtensa_insnbuf ibuff = NULL;
- static xtensa_insnbuf sbuff = NULL;
- xtensa_isa isa = xtensa_default_isa;
- xtensa_format fmt;
- xtensa_opcode old_op, new_op;
- bfd_size_type input_size;
- int rz_type;
- unsigned dest_reg, src_reg;
-
- if (ibuff == NULL)
- {
- ibuff = xtensa_insnbuf_alloc (isa);
- sbuff = xtensa_insnbuf_alloc (isa);
- }
-
- input_size = bfd_get_section_limit (abfd, input_section);
-
- /* Read the instruction into a buffer and decode the opcode. */
- xtensa_insnbuf_from_chars (isa, ibuff, contents + rel->rz_offset,
- input_size - rel->rz_offset);
- fmt = xtensa_format_decode (isa, ibuff);
- if (fmt == XTENSA_UNDEFINED)
- {
- *error_message = "cannot decode instruction format";
- return FALSE;
- }
-
- BFD_ASSERT (xtensa_format_num_slots (isa, fmt) == 1);
- xtensa_format_get_slot (isa, fmt, 0, ibuff, sbuff);
-
- old_op = xtensa_opcode_decode (isa, fmt, 0, sbuff);
- if (old_op == XTENSA_UNDEFINED)
- {
- *error_message = "cannot decode instruction opcode";
- return FALSE;
- }
-
- rz_type = ELF32_R_TYPE (rel->rz_info);
- switch (rz_type)
- {
- case RZ_XTENSA_TLS_FUNC:
- case RZ_XTENSA_TLS_ARG:
- if (old_op != get_l32r_opcode ()
- || xtensa_operand_get_field (isa, old_op, 0, fmt, 0,
- sbuff, &dest_reg) != 0)
- {
- *error_message = "cannot extract L32R destination for TLS access";
- return FALSE;
- }
- break;
-
- case RZ_XTENSA_TLS_CALL:
- if (! get_indirect_call_dest_reg (old_op, &dest_reg)
- || xtensa_operand_get_field (isa, old_op, 0, fmt, 0,
- sbuff, &src_reg) != 0)
- {
- *error_message = "cannot extract CALLXn operands for TLS access";
- return FALSE;
- }
- break;
-
- default:
- abort ();
- }
-
- if (is_ld_model)
- {
- switch (rz_type)
- {
- case RZ_XTENSA_TLS_FUNC:
- case RZ_XTENSA_TLS_ARG:
- /* Change the instruction to a NOP (or "OR a1, a1, a1" for older
- versions of Xtensa). */
- new_op = xtensa_opcode_lookup (isa, "nop");
- if (new_op == XTENSA_UNDEFINED)
- {
- new_op = xtensa_opcode_lookup (isa, "or");
- if (new_op == XTENSA_UNDEFINED
- || xtensa_opcode_encode (isa, fmt, 0, sbuff, new_op) != 0
- || xtensa_operand_set_field (isa, new_op, 0, fmt, 0,
- sbuff, 1) != 0
- || xtensa_operand_set_field (isa, new_op, 1, fmt, 0,
- sbuff, 1) != 0
- || xtensa_operand_set_field (isa, new_op, 2, fmt, 0,
- sbuff, 1) != 0)
- {
- *error_message = "cannot encode OR for TLS access";
- return FALSE;
- }
- }
- else
- {
- if (xtensa_opcode_encode (isa, fmt, 0, sbuff, new_op) != 0)
- {
- *error_message = "cannot encode NOP for TLS access";
- return FALSE;
- }
- }
- break;
-
- case RZ_XTENSA_TLS_CALL:
- /* Read THREADPTR into the CALLX's return value register. */
- new_op = xtensa_opcode_lookup (isa, "rur.threadptr");
- if (new_op == XTENSA_UNDEFINED
- || xtensa_opcode_encode (isa, fmt, 0, sbuff, new_op) != 0
- || xtensa_operand_set_field (isa, new_op, 0, fmt, 0,
- sbuff, dest_reg + 2) != 0)
- {
- *error_message = "cannot encode RUR.THREADPTR for TLS access";
- return FALSE;
- }
- break;
- }
- }
- else
- {
- switch (rz_type)
- {
- case RZ_XTENSA_TLS_FUNC:
- new_op = xtensa_opcode_lookup (isa, "rur.threadptr");
- if (new_op == XTENSA_UNDEFINED
- || xtensa_opcode_encode (isa, fmt, 0, sbuff, new_op) != 0
- || xtensa_operand_set_field (isa, new_op, 0, fmt, 0,
- sbuff, dest_reg) != 0)
- {
- *error_message = "cannot encode RUR.THREADPTR for TLS access";
- return FALSE;
- }
- break;
-
- case RZ_XTENSA_TLS_ARG:
- /* Nothing to do. Keep the original L32R instruction. */
- return TRUE;
-
- case RZ_XTENSA_TLS_CALL:
- /* Add the CALLX's src register (holding the THREADPTR value)
- to the first argument register (holding the offset) and put
- the result in the CALLX's return value register. */
- new_op = xtensa_opcode_lookup (isa, "add");
- if (new_op == XTENSA_UNDEFINED
- || xtensa_opcode_encode (isa, fmt, 0, sbuff, new_op) != 0
- || xtensa_operand_set_field (isa, new_op, 0, fmt, 0,
- sbuff, dest_reg + 2) != 0
- || xtensa_operand_set_field (isa, new_op, 1, fmt, 0,
- sbuff, dest_reg + 2) != 0
- || xtensa_operand_set_field (isa, new_op, 2, fmt, 0,
- sbuff, src_reg) != 0)
- {
- *error_message = "cannot encode ADD for TLS access";
- return FALSE;
- }
- break;
- }
- }
-
- xtensa_format_set_slot (isa, fmt, 0, ibuff, sbuff);
- xtensa_insnbuf_to_chars (isa, ibuff, contents + rel->rz_offset,
- input_size - rel->rz_offset);
-
- return TRUE;
-}
-
-
-#define IS_XTENSA_TLS_RELOC(RZ_TYPE) \
- ((RZ_TYPE) == RZ_XTENSA_TLSDESC_FN \
- || (RZ_TYPE) == RZ_XTENSA_TLSDESC_ARG \
- || (RZ_TYPE) == RZ_XTENSA_TLS_DTPOFF \
- || (RZ_TYPE) == RZ_XTENSA_TLS_TPOFF \
- || (RZ_TYPE) == RZ_XTENSA_TLS_FUNC \
- || (RZ_TYPE) == RZ_XTENSA_TLS_ARG \
- || (RZ_TYPE) == RZ_XTENSA_TLS_CALL)
-
-/* Relocate an Xtensa ELF section. This is invoked by the linker for
- both relocatable and final links. */
-
-static bfd_boolean
-elf_xtensa_relocate_section (bfd *output_bfd,
- struct bfd_link_info *info,
- bfd *input_bfd,
- asection *input_section,
- bfd_byte *contents,
- Elf_Internal_Rela *relocs,
- Elf_Internal_Sym *local_syms,
- asection **local_sections)
-{
- struct elf_xtensa_link_hash_table *htab;
- Elf_Internal_Shdr *symtab_hdr;
- Elf_Internal_Rela *rel;
- Elf_Internal_Rela *relend;
- struct elf_link_hash_entry **sym_hashes;
- property_table_entry *lit_table = 0;
- int ltblsize = 0;
- char *local_got_tls_types;
- char *error_message = NULL;
- bfd_size_type input_size;
- int tls_type;
-
- if (!xtensa_default_isa)
- xtensa_default_isa = xtensa_isa_init (0, 0);
-
- BFD_ASSERT (is_xtensa_elf (input_bfd));
-
- htab = elf_xtensa_hash_table (info);
- if (htab == NULL)
- return FALSE;
-
- symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
- sym_hashes = elf_sym_hashes (input_bfd);
- local_got_tls_types = elf_xtensa_local_got_tls_type (input_bfd);
-
- if (elf_hash_table (info)->dynamic_sections_created)
- {
- ltblsize = xtensa_read_table_entries (input_bfd, input_section,
- &lit_table, XTENSA_LIT_SEC_NAME,
- TRUE);
- if (ltblsize < 0)
- return FALSE;
- }
-
- input_size = bfd_get_section_limit (input_bfd, input_section);
-
- rel = relocs;
- relend = relocs + input_section->reloc_count;
- for (; rel < relend; rel++)
- {
- int rz_type;
- reloc_howto_type *howto;
- unsigned long rz_symndx;
- struct elf_link_hash_entry *h;
- Elf_Internal_Sym *sym;
- char sym_type;
- const char *name;
- asection *sec;
- bfd_vma relocation;
- bfd_reloc_status_type r;
- bfd_boolean is_weak_undef;
- bfd_boolean unresolved_reloc;
- bfd_boolean warned;
- bfd_boolean dynamic_symbol;
-
- rz_type = ELF32_R_TYPE (rel->rz_info);
- if (rz_type == (int) RZ_XTENSA_GNU_VTINHERIT
- || rz_type == (int) RZ_XTENSA_GNU_VTENTRY)
- continue;
-
- if (rz_type < 0 || rz_type >= (int) RZ_XTENSA_max)
- {
- bfd_set_error (bfd_error_bad_value);
- return FALSE;
- }
- howto = &elf_howto_table[rz_type];
-
- rz_symndx = ELF32_R_SYM (rel->rz_info);
-
- h = NULL;
- sym = NULL;
- sec = NULL;
- is_weak_undef = FALSE;
- unresolved_reloc = FALSE;
- warned = FALSE;
-
- if (howto->partial_inplace && !info->relocatable)
- {
- /* Because RZ_XTENSA_32 was made partial_inplace to fix some
- problems with DWARF info in partial links, there may be
- an addend stored in the contents. Take it out of there
- and move it back into the addend field of the reloc. */
- rel->rz_addend += bfd_get_32 (input_bfd, contents + rel->rz_offset);
- bfd_put_32 (input_bfd, 0, contents + rel->rz_offset);
- }
-
- if (rz_symndx < symtab_hdr->sh_info)
- {
- sym = local_syms + rz_symndx;
- sym_type = ELF32_ST_TYPE (sym->st_info);
- sec = local_sections[rz_symndx];
- relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
- }
- else
- {
- bfd_boolean ignored;
-
- RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
- rz_symndx, symtab_hdr, sym_hashes,
- h, sec, relocation,
- unresolved_reloc, warned, ignored);
-
- if (relocation == 0
- && !unresolved_reloc
- && h->root.type == bfd_link_hash_undefweak)
- is_weak_undef = TRUE;
-
- sym_type = h->type;
- }
-
- if (sec != NULL && discarded_section (sec))
- RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
- rel, 1, relend, howto, 0, contents);
-
- if (info->relocatable)
- {
- bfd_vma dest_addr;
- asection * sym_sec = get_elf_r_symndx_section (input_bfd, rz_symndx);
-
- /* This is a relocatable link.
- 1) If the reloc is against a section symbol, adjust
- according to the output section.
- 2) If there is a new target for this relocation,
- the new target will be in the same output section.
- We adjust the relocation by the output section
- difference. */
-
- if (relaxing_section)
- {
- /* Check if this references a section in another input file. */
- if (!do_fix_for_relocatable_link (rel, input_bfd, input_section,
- contents))
- return FALSE;
- }
-
- dest_addr = sym_sec->output_section->vma + sym_sec->output_offset
- + get_elf_r_symndx_offset (input_bfd, rz_symndx) + rel->rz_addend;
-
- if (rz_type == RZ_XTENSA_ASM_SIMPLIFY)
- {
- error_message = NULL;
- /* Convert ASM_SIMPLIFY into the simpler relocation
- so that they never escape a relaxing link. */
- r = contract_asm_expansion (contents, input_size, rel,
- &error_message);
- if (r != bfd_reloc_ok)
- {
- if (!((*info->callbacks->reloc_dangerous)
- (info, error_message, input_bfd, input_section,
- rel->rz_offset)))
- return FALSE;
- }
- rz_type = ELF32_R_TYPE (rel->rz_info);
- }
-
- /* This is a relocatable link, so we don't have to change
- anything unless the reloc is against a section symbol,
- in which case we have to adjust according to where the
- section symbol winds up in the output section. */
- if (rz_symndx < symtab_hdr->sh_info)
- {
- sym = local_syms + rz_symndx;
- if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
- {
- sec = local_sections[rz_symndx];
- rel->rz_addend += sec->output_offset + sym->st_value;
- }
- }
-
- /* If there is an addend with a partial_inplace howto,
- then move the addend to the contents. This is a hack
- to work around problems with DWARF in relocatable links
- with some previous version of BFD. Now we can't easily get
- rid of the hack without breaking backward compatibility.... */
- r = bfd_reloc_ok;
- howto = &elf_howto_table[rz_type];
- if (howto->partial_inplace && rel->rz_addend)
- {
- r = elf_xtensa_do_reloc (howto, input_bfd, input_section,
- rel->rz_addend, contents,
- rel->rz_offset, FALSE,
- &error_message);
- rel->rz_addend = 0;
- }
- else
- {
- /* Put the correct bits in the target instruction, even
- though the relocation will still be present in the output
- file. This makes disassembly clearer, as well as
- allowing loadable kernel modules to work without needing
- relocations on anything other than calls and l32r's. */
-
- /* If it is not in the same section, there is nothing we can do. */
- if (rz_type >= RZ_XTENSA_SLOT0_OP && rz_type <= RZ_XTENSA_SLOT14_OP &&
- sym_sec->output_section == input_section->output_section)
- {
- r = elf_xtensa_do_reloc (howto, input_bfd, input_section,
- dest_addr, contents,
- rel->rz_offset, FALSE,
- &error_message);
- }
- }
- if (r != bfd_reloc_ok)
- {
- if (!((*info->callbacks->reloc_dangerous)
- (info, error_message, input_bfd, input_section,
- rel->rz_offset)))
- return FALSE;
- }
-
- /* Done with work for relocatable link; continue with next reloc. */
- continue;
- }
-
- /* This is a final link. */
-
- if (relaxing_section)
- {
- /* Check if this references a section in another input file. */
- do_fix_for_final_link (rel, input_bfd, input_section, contents,
- &relocation);
- }
-
- /* Sanity check the address. */
- if (rel->rz_offset >= input_size
- && ELF32_R_TYPE (rel->rz_info) != RZ_XTENSA_NONE)
- {
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx): relocation offset out of range (size=0x%x)"),
- input_bfd, input_section, rel->rz_offset, input_size);
- bfd_set_error (bfd_error_bad_value);
- return FALSE;
- }
-
- if (h != NULL)
- name = h->root.root.string;
- else
- {
- name = (bfd_elf_string_from_elf_section
- (input_bfd, symtab_hdr->sh_link, sym->st_name));
- if (name == NULL || *name == '\0')
- name = bfd_section_name (input_bfd, sec);
- }
-
- if (rz_symndx != STN_UNDEF
- && rz_type != RZ_XTENSA_NONE
- && (h == NULL
- || h->root.type == bfd_link_hash_defined
- || h->root.type == bfd_link_hash_defweak)
- && IS_XTENSA_TLS_RELOC (rz_type) != (sym_type == STT_TLS))
- {
- (*_bfd_error_handler)
- ((sym_type == STT_TLS
- ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
- : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
- input_bfd,
- input_section,
- (long) rel->rz_offset,
- howto->name,
- name);
- }
-
- dynamic_symbol = elf_xtensa_dynamic_symbol_p (h, info);
-
- tls_type = GOT_UNKNOWN;
- if (h)
- tls_type = elf_xtensa_hash_entry (h)->tls_type;
- else if (local_got_tls_types)
- tls_type = local_got_tls_types [rz_symndx];
-
- switch (rz_type)
- {
- case RZ_XTENSA_32:
- case RZ_XTENSA_PLT:
- if (elf_hash_table (info)->dynamic_sections_created
- && (input_section->flags & SEC_ALLOC) != 0
- && (dynamic_symbol || info->shared))
- {
- Elf_Internal_Rela outrel;
- bfd_byte *loc;
- asection *srel;
-
- if (dynamic_symbol && rz_type == RZ_XTENSA_PLT)
- srel = htab->srelplt;
- else
- srel = htab->srelgot;
-
- BFD_ASSERT (srel != NULL);
-
- outrel.rz_offset =
- _bfd_elf_section_offset (output_bfd, info,
- input_section, rel->rz_offset);
-
- if ((outrel.rz_offset | 1) == (bfd_vma) -1)
- memset (&outrel, 0, sizeof outrel);
- else
- {
- outrel.rz_offset += (input_section->output_section->vma
- + input_section->output_offset);
-
- /* Complain if the relocation is in a read-only section
- and not in a literal pool. */
- if ((input_section->flags & SEC_READONLY) != 0
- && !elf_xtensa_in_literal_pool (lit_table, ltblsize,
- outrel.rz_offset))
- {
- error_message =
- _("dynamic relocation in read-only section");
- if (!((*info->callbacks->reloc_dangerous)
- (info, error_message, input_bfd, input_section,
- rel->rz_offset)))
- return FALSE;
- }
-
- if (dynamic_symbol)
- {
- outrel.rz_addend = rel->rz_addend;
- rel->rz_addend = 0;
-
- if (rz_type == RZ_XTENSA_32)
- {
- outrel.rz_info =
- ELF32_R_INFO (h->dynindx, RZ_XTENSA_GLOB_DAT);
- relocation = 0;
- }
- else /* rz_type == RZ_XTENSA_PLT */
- {
- outrel.rz_info =
- ELF32_R_INFO (h->dynindx, RZ_XTENSA_JMP_SLOT);
-
- /* Create the PLT entry and set the initial
- contents of the literal entry to the address of
- the PLT entry. */
- relocation =
- elf_xtensa_create_plt_entry (info, output_bfd,
- srel->reloc_count);
- }
- unresolved_reloc = FALSE;
- }
- else
- {
- /* Generate a RELATIVE relocation. */
- outrel.rz_info = ELF32_R_INFO (0, RZ_XTENSA_RELATIVE);
- outrel.rz_addend = 0;
- }
- }
-
- loc = (srel->contents
- + srel->reloc_count++ * sizeof (Elf32_External_Rela));
- bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
- BFD_ASSERT (sizeof (Elf32_External_Rela) * srel->reloc_count
- <= srel->size);
- }
- else if (rz_type == RZ_XTENSA_ASM_EXPAND && dynamic_symbol)
- {
- /* This should only happen for non-PIC code, which is not
- supposed to be used on systems with dynamic linking.
- Just ignore these relocations. */
- continue;
- }
- break;
-
- case RZ_XTENSA_TLS_TPOFF:
- /* Switch to LE model for local symbols in an executable. */
- if (! info->shared && ! dynamic_symbol)
- {
- relocation = tpoff (info, relocation);
- break;
- }
- /* fall through */
-
- case RZ_XTENSA_TLSDESC_FN:
- case RZ_XTENSA_TLSDESC_ARG:
- {
- if (rz_type == RZ_XTENSA_TLSDESC_FN)
- {
- if (! info->shared || (tls_type & GOT_TLS_IE) != 0)
- rz_type = RZ_XTENSA_NONE;
- }
- else if (rz_type == RZ_XTENSA_TLSDESC_ARG)
- {
- if (info->shared)
- {
- if ((tls_type & GOT_TLS_IE) != 0)
- rz_type = RZ_XTENSA_TLS_TPOFF;
- }
- else
- {
- rz_type = RZ_XTENSA_TLS_TPOFF;
- if (! dynamic_symbol)
- {
- relocation = tpoff (info, relocation);
- break;
- }
- }
- }
-
- if (rz_type == RZ_XTENSA_NONE)
- /* Nothing to do here; skip to the next reloc. */
- continue;
-
- if (! elf_hash_table (info)->dynamic_sections_created)
- {
- error_message =
- _("TLS relocation invalid without dynamic sections");
- if (!((*info->callbacks->reloc_dangerous)
- (info, error_message, input_bfd, input_section,
- rel->rz_offset)))
- return FALSE;
- }
- else
- {
- Elf_Internal_Rela outrel;
- bfd_byte *loc;
- asection *srel = htab->srelgot;
- int indx;
-
- outrel.rz_offset = (input_section->output_section->vma
- + input_section->output_offset
- + rel->rz_offset);
-
- /* Complain if the relocation is in a read-only section
- and not in a literal pool. */
- if ((input_section->flags & SEC_READONLY) != 0
- && ! elf_xtensa_in_literal_pool (lit_table, ltblsize,
- outrel.rz_offset))
- {
- error_message =
- _("dynamic relocation in read-only section");
- if (!((*info->callbacks->reloc_dangerous)
- (info, error_message, input_bfd, input_section,
- rel->rz_offset)))
- return FALSE;
- }
-
- indx = h && h->dynindx != -1 ? h->dynindx : 0;
- if (indx == 0)
- outrel.rz_addend = relocation - dtpoff_base (info);
- else
- outrel.rz_addend = 0;
- rel->rz_addend = 0;
-
- outrel.rz_info = ELF32_R_INFO (indx, rz_type);
- relocation = 0;
- unresolved_reloc = FALSE;
-
- BFD_ASSERT (srel);
- loc = (srel->contents
- + srel->reloc_count++ * sizeof (Elf32_External_Rela));
- bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
- BFD_ASSERT (sizeof (Elf32_External_Rela) * srel->reloc_count
- <= srel->size);
- }
- }
- break;
-
- case RZ_XTENSA_TLS_DTPOFF:
- if (! info->shared)
- /* Switch from LD model to LE model. */
- relocation = tpoff (info, relocation);
- else
- relocation -= dtpoff_base (info);
- break;
-
- case RZ_XTENSA_TLS_FUNC:
- case RZ_XTENSA_TLS_ARG:
- case RZ_XTENSA_TLS_CALL:
- /* Check if optimizing to IE or LE model. */
- if ((tls_type & GOT_TLS_IE) != 0)
- {
- bfd_boolean is_ld_model =
- (h && elf_xtensa_hash_entry (h) == htab->tlsbase);
- if (! replace_tls_insn (rel, input_bfd, input_section, contents,
- is_ld_model, &error_message))
- {
- if (!((*info->callbacks->reloc_dangerous)
- (info, error_message, input_bfd, input_section,
- rel->rz_offset)))
- return FALSE;
- }
-
- if (rz_type != RZ_XTENSA_TLS_ARG || is_ld_model)
- {
- /* Skip subsequent relocations on the same instruction. */
- while (rel + 1 < relend && rel[1].rz_offset == rel->rz_offset)
- rel++;
- }
- }
- continue;
-
- default:
- if (elf_hash_table (info)->dynamic_sections_created
- && dynamic_symbol && (is_operand_relocation (rz_type)
- || rz_type == RZ_XTENSA_32_PCREL))
- {
- error_message =
- vsprint_msg ("invalid relocation for dynamic symbol", ": %s",
- strlen (name) + 2, name);
- if (!((*info->callbacks->reloc_dangerous)
- (info, error_message, input_bfd, input_section,
- rel->rz_offset)))
- return FALSE;
- continue;
- }
- break;
- }
-
- /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
- because such sections are not SEC_ALLOC and thus ld.so will
- not process them. */
- if (unresolved_reloc
- && !((input_section->flags & SEC_DEBUGGING) != 0
- && h->def_dynamic)
- && _bfd_elf_section_offset (output_bfd, info, input_section,
- rel->rz_offset) != (bfd_vma) -1)
- {
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
- input_bfd,
- input_section,
- (long) rel->rz_offset,
- howto->name,
- name);
- return FALSE;
- }
-
- /* TLS optimizations may have changed rz_type; update "howto". */
- howto = &elf_howto_table[rz_type];
-
- /* There's no point in calling bfd_perform_relocation here.
- Just go directly to our "special function". */
- r = elf_xtensa_do_reloc (howto, input_bfd, input_section,
- relocation + rel->rz_addend,
- contents, rel->rz_offset, is_weak_undef,
- &error_message);
-
- if (r != bfd_reloc_ok && !warned)
- {
- BFD_ASSERT (r == bfd_reloc_dangerous || r == bfd_reloc_other);
- BFD_ASSERT (error_message != NULL);
-
- if (rel->rz_addend == 0)
- error_message = vsprint_msg (error_message, ": %s",
- strlen (name) + 2, name);
- else
- error_message = vsprint_msg (error_message, ": (%s+0x%x)",
- strlen (name) + 22,
- name, (int) rel->rz_addend);
-
- if (!((*info->callbacks->reloc_dangerous)
- (info, error_message, input_bfd, input_section,
- rel->rz_offset)))
- return FALSE;
- }
- }
-
- if (lit_table)
- free (lit_table);
-
- input_section->reloc_done = TRUE;
-
- return TRUE;
-}
-
-
-/* Finish up dynamic symbol handling. There's not much to do here since
- the PLT and GOT entries are all set up by relocate_section. */
-
-static bfd_boolean
-elf_xtensa_finish_dynamic_symbol (bfd *output_bfd ATTRIBUTE_UNUSED,
- struct bfd_link_info *info ATTRIBUTE_UNUSED,
- struct elf_link_hash_entry *h,
- Elf_Internal_Sym *sym)
-{
- if (h->needs_plt && !h->def_regular)
- {
- /* Mark the symbol as undefined, rather than as defined in
- the .plt section. Leave the value alone. */
- sym->st_shndx = SHN_UNDEF;
- /* If the symbol is weak, we do need to clear the value.
- Otherwise, the PLT entry would provide a definition for
- the symbol even if the symbol wasn't defined anywhere,
- and so the symbol would never be NULL. */
- if (!h->ref_regular_nonweak)
- sym->st_value = 0;
- }
-
- /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */
- if (h == elf_hash_table (info)->hdynamic
- || h == elf_hash_table (info)->hgot)
- sym->st_shndx = SHN_ABS;
-
- return TRUE;
-}
-
-#endif
-
-/* Combine adjacent literal table entries in the output. Adjacent
- entries within each input section may have been removed during
- relaxation, but we repeat the process here, even though it's too late
- to shrink the output section, because it's important to minimize the
- number of literal table entries to reduce the start-up work for the
- runtime linker. Returns the number of remaining table entries or -1
- on error. */
-
-static int
-elf_xtensa_combine_prop_entries (bfd *output_bfd,
- asection *sxtlit,
- asection *sgotloc)
-{
- bfd_byte *contents;
- property_table_entry *table;
- bfd_size_type section_size, sgotloc_size;
- bfd_vma offset;
- int n, m, num;
-
- section_size = sxtlit->size;
- BFD_ASSERT (section_size % 8 == 0);
- num = section_size / 8;
-
- sgotloc_size = sgotloc->size;
- if (sgotloc_size != section_size)
- {
- (*_bfd_error_handler)
- (_("internal inconsistency in size of .got.loc section"));
- return -1;
- }
-
- table = bfd_malloc (num * sizeof (property_table_entry));
- if (table == 0)
- return -1;
-
- /* The ".xt.lit.plt" section has the SEC_IN_MEMORY flag set and this
- propagates to the output section, where it doesn't really apply and
- where it breaks the following call to bfd_malloc_and_get_section. */
- sxtlit->flags &= ~SEC_IN_MEMORY;
-
- if (!bfd_malloc_and_get_section (output_bfd, sxtlit, &contents))
- {
- if (contents != 0)
- free (contents);
- free (table);
- return -1;
- }
-
- /* There should never be any relocations left at this point, so this
- is quite a bit easier than what is done during relaxation. */
-
- /* Copy the raw contents into a property table array and sort it. */
- offset = 0;
- for (n = 0; n < num; n++)
- {
- table[n].address = bfd_get_32 (output_bfd, &contents[offset]);
- table[n].size = bfd_get_32 (output_bfd, &contents[offset + 4]);
- offset += 8;
- }
- qsort (table, num, sizeof (property_table_entry), property_table_compare);
-
- for (n = 0; n < num; n++)
- {
- bfd_boolean remove_entry = FALSE;
-
- if (table[n].size == 0)
- remove_entry = TRUE;
- else if (n > 0
- && (table[n-1].address + table[n-1].size == table[n].address))
- {
- table[n-1].size += table[n].size;
- remove_entry = TRUE;
- }
-
- if (remove_entry)
- {
- for (m = n; m < num - 1; m++)
- {
- table[m].address = table[m+1].address;
- table[m].size = table[m+1].size;
- }
-
- n--;
- num--;
- }
- }
-
- /* Copy the data back to the raw contents. */
- offset = 0;
- for (n = 0; n < num; n++)
- {
- bfd_put_32 (output_bfd, table[n].address, &contents[offset]);
- bfd_put_32 (output_bfd, table[n].size, &contents[offset + 4]);
- offset += 8;
- }
-
- /* Clear the removed bytes. */
- if ((bfd_size_type) (num * 8) < section_size)
- memset (&contents[num * 8], 0, section_size - num * 8);
-
- if (! bfd_set_section_contents (output_bfd, sxtlit, contents, 0,
- section_size))
- return -1;
-
- /* Copy the contents to ".got.loc". */
- memcpy (sgotloc->contents, contents, section_size);
-
- free (contents);
- free (table);
- return num;
-}
-
-
-/* Finish up the dynamic sections. */
-
-static bfd_boolean
-elf_xtensa_finish_dynamic_sections (bfd *output_bfd,
- struct bfd_link_info *info)
-{
- struct elf_xtensa_link_hash_table *htab;
- bfd *dynobj;
- asection *sdyn, *srelplt, *sgot, *sxtlit, *sgotloc;
- Elf32_External_Dyn *dyncon, *dynconend;
- int num_xtlit_entries = 0;
-
- if (! elf_hash_table (info)->dynamic_sections_created)
- return TRUE;
-
- htab = elf_xtensa_hash_table (info);
- if (htab == NULL)
- return FALSE;
-
- dynobj = elf_hash_table (info)->dynobj;
- sdyn = bfd_get_linker_section (dynobj, ".dynamic");
- BFD_ASSERT (sdyn != NULL);
-
- /* Set the first entry in the global offset table to the address of
- the dynamic section. */
- sgot = htab->sgot;
- if (sgot)
- {
- BFD_ASSERT (sgot->size == 4);
- if (sdyn == NULL)
- bfd_put_32 (output_bfd, 0, sgot->contents);
- else
- bfd_put_32 (output_bfd,
- sdyn->output_section->vma + sdyn->output_offset,
- sgot->contents);
- }
-
- srelplt = htab->srelplt;
- if (srelplt && srelplt->size != 0)
- {
- asection *sgotplt, *srelgot, *spltlittbl;
- int chunk, plt_chunks, plt_entries;
- Elf_Internal_Rela irela;
- bfd_byte *loc;
- unsigned rtld_reloc;
-
- srelgot = htab->srelgot;
- spltlittbl = htab->spltlittbl;
- BFD_ASSERT (srelgot != NULL && spltlittbl != NULL);
-
- /* Find the first XTENSA_RTLD relocation. Presumably the rest
- of them follow immediately after.... */
- for (rtld_reloc = 0; rtld_reloc < srelgot->reloc_count; rtld_reloc++)
- {
- loc = srelgot->contents + rtld_reloc * sizeof (Elf32_External_Rela);
- bfd_elf32_swap_reloca_in (output_bfd, loc, &irela);
- if (ELF32_R_TYPE (irela.rz_info) == RZ_XTENSA_RTLD)
- break;
- }
- BFD_ASSERT (rtld_reloc < srelgot->reloc_count);
-
- plt_entries = srelplt->size / sizeof (Elf32_External_Rela);
- plt_chunks =
- (plt_entries + PLT_ENTRIES_PER_CHUNK - 1) / PLT_ENTRIES_PER_CHUNK;
-
- for (chunk = 0; chunk < plt_chunks; chunk++)
- {
- int chunk_entries = 0;
-
- sgotplt = elf_xtensa_get_gotplt_section (info, chunk);
- BFD_ASSERT (sgotplt != NULL);
-
- /* Emit special RTLD relocations for the first two entries in
- each chunk of the .got.plt section. */
-
- loc = srelgot->contents + rtld_reloc * sizeof (Elf32_External_Rela);
- bfd_elf32_swap_reloca_in (output_bfd, loc, &irela);
- BFD_ASSERT (ELF32_R_TYPE (irela.rz_info) == RZ_XTENSA_RTLD);
- irela.rz_offset = (sgotplt->output_section->vma
- + sgotplt->output_offset);
- irela.rz_addend = 1; /* tell rtld to set value to resolver function */
- bfd_elf32_swap_reloca_out (output_bfd, &irela, loc);
- rtld_reloc += 1;
- BFD_ASSERT (rtld_reloc <= srelgot->reloc_count);
-
- /* Next literal immediately follows the first. */
- loc += sizeof (Elf32_External_Rela);
- bfd_elf32_swap_reloca_in (output_bfd, loc, &irela);
- BFD_ASSERT (ELF32_R_TYPE (irela.rz_info) == RZ_XTENSA_RTLD);
- irela.rz_offset = (sgotplt->output_section->vma
- + sgotplt->output_offset + 4);
- /* Tell rtld to set value to object's link map. */
- irela.rz_addend = 2;
- bfd_elf32_swap_reloca_out (output_bfd, &irela, loc);
- rtld_reloc += 1;
- BFD_ASSERT (rtld_reloc <= srelgot->reloc_count);
-
- /* Fill in the literal table. */
- if (chunk < plt_chunks - 1)
- chunk_entries = PLT_ENTRIES_PER_CHUNK;
- else
- chunk_entries = plt_entries - (chunk * PLT_ENTRIES_PER_CHUNK);
-
- BFD_ASSERT ((unsigned) (chunk + 1) * 8 <= spltlittbl->size);
- bfd_put_32 (output_bfd,
- sgotplt->output_section->vma + sgotplt->output_offset,
- spltlittbl->contents + (chunk * 8) + 0);
- bfd_put_32 (output_bfd,
- 8 + (chunk_entries * 4),
- spltlittbl->contents + (chunk * 8) + 4);
- }
-
- /* All the dynamic relocations have been emitted at this point.
- Make sure the relocation sections are the correct size. */
- if (srelgot->size != (sizeof (Elf32_External_Rela)
- * srelgot->reloc_count)
- || srelplt->size != (sizeof (Elf32_External_Rela)
- * srelplt->reloc_count))
- abort ();
-
- /* The .xt.lit.plt section has just been modified. This must
- happen before the code below which combines adjacent literal
- table entries, and the .xt.lit.plt contents have to be forced to
- the output here. */
- if (! bfd_set_section_contents (output_bfd,
- spltlittbl->output_section,
- spltlittbl->contents,
- spltlittbl->output_offset,
- spltlittbl->size))
- return FALSE;
- /* Clear SEC_HAS_CONTENTS so the contents won't be output again. */
- spltlittbl->flags &= ~SEC_HAS_CONTENTS;
- }
-
- /* Combine adjacent literal table entries. */
- BFD_ASSERT (! info->relocatable);
- sxtlit = bfd_get_section_by_name (output_bfd, ".xt.lit");
- sgotloc = htab->sgotloc;
- BFD_ASSERT (sgotloc);
- if (sxtlit)
- {
- num_xtlit_entries =
- elf_xtensa_combine_prop_entries (output_bfd, sxtlit, sgotloc);
- if (num_xtlit_entries < 0)
- return FALSE;
- }
-
- dyncon = (Elf32_External_Dyn *) sdyn->contents;
- dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
- for (; dyncon < dynconend; dyncon++)
- {
- Elf_Internal_Dyn dyn;
-
- bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
-
- switch (dyn.d_tag)
- {
- default:
- break;
-
- case DT_XTENSA_GOT_LOC_SZ:
- dyn.d_un.d_val = num_xtlit_entries;
- break;
-
- case DT_XTENSA_GOT_LOC_OFF:
- dyn.d_un.d_ptr = htab->sgotloc->output_section->vma;
- break;
-
- case DT_PLTGOT:
- dyn.d_un.d_ptr = htab->sgot->output_section->vma;
- break;
-
- case DT_JMPREL:
- dyn.d_un.d_ptr = htab->srelplt->output_section->vma;
- break;
-
- case DT_PLTRELSZ:
- dyn.d_un.d_val = htab->srelplt->output_section->size;
- break;
-
- case DT_RELASZ:
- /* Adjust RELASZ to not include JMPREL. This matches what
- glibc expects and what is done for several other ELF
- targets (e.g., i386, alpha), but the "correct" behavior
- seems to be unresolved. Since the linker script arranges
- for .rela.plt to follow all other relocation sections, we
- don't have to worry about changing the DT_RELA entry. */
- if (htab->srelplt)
- dyn.d_un.d_val -= htab->srelplt->output_section->size;
- break;
- }
-
- bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
- }
-
- return TRUE;
-}
-
-
-/* Functions for dealing with the e_flags field. */
-
-/* Merge backend specific data from an object file to the output
- object file when linking. */
-
-static bfd_boolean
-elf_xtensa_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
-{
- unsigned out_mach, in_mach;
- flagword out_flag, in_flag;
-
- /* Check if we have the same endianness. */
- if (!_bfd_generic_verify_endian_match (ibfd, obfd))
- return FALSE;
-
- /* Don't even pretend to support mixed-format linking. */
- if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
- || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
- return FALSE;
-
- out_flag = elf_elfheader (obfd)->e_flags;
- in_flag = elf_elfheader (ibfd)->e_flags;
-
- out_mach = out_flag & EF_XTENSA_MACH;
- in_mach = in_flag & EF_XTENSA_MACH;
- if (out_mach != in_mach)
- {
- (*_bfd_error_handler)
- (_("%B: incompatible machine type. Output is 0x%x. Input is 0x%x"),
- ibfd, out_mach, in_mach);
- bfd_set_error (bfd_error_wrong_format);
- return FALSE;
- }
-
- if (! elf_flags_init (obfd))
- {
- elf_flags_init (obfd) = TRUE;
- elf_elfheader (obfd)->e_flags = in_flag;
-
- if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
- && bfd_get_arch_info (obfd)->the_default)
- return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
- bfd_get_mach (ibfd));
-
- return TRUE;
- }
-
- if ((out_flag & EF_XTENSA_XT_INSN) != (in_flag & EF_XTENSA_XT_INSN))
- elf_elfheader (obfd)->e_flags &= (~ EF_XTENSA_XT_INSN);
-
- if ((out_flag & EF_XTENSA_XT_LIT) != (in_flag & EF_XTENSA_XT_LIT))
- elf_elfheader (obfd)->e_flags &= (~ EF_XTENSA_XT_LIT);
-
- return TRUE;
-}
-
-
-static bfd_boolean
-elf_xtensa_set_private_flags (bfd *abfd, flagword flags)
-{
- BFD_ASSERT (!elf_flags_init (abfd)
- || elf_elfheader (abfd)->e_flags == flags);
-
- elf_elfheader (abfd)->e_flags |= flags;
- elf_flags_init (abfd) = TRUE;
-
- return TRUE;
-}
-
-
-static bfd_boolean
-elf_xtensa_print_private_bfd_data (bfd *abfd, void *farg)
-{
- FILE *f = (FILE *) farg;
- flagword e_flags = elf_elfheader (abfd)->e_flags;
-
- fprintf (f, "\nXtensa header:\n");
- if ((e_flags & EF_XTENSA_MACH) == E_XTENSA_MACH)
- fprintf (f, "\nMachine = Base\n");
- else
- fprintf (f, "\nMachine Id = 0x%x\n", e_flags & EF_XTENSA_MACH);
-
- fprintf (f, "Insn tables = %s\n",
- (e_flags & EF_XTENSA_XT_INSN) ? "true" : "false");
-
- fprintf (f, "Literal tables = %s\n",
- (e_flags & EF_XTENSA_XT_LIT) ? "true" : "false");
-
- return _bfd_elf_print_private_bfd_data (abfd, farg);
-}
-
-
-/* Set the right machine number for an Xtensa ELF file. */
-
-static bfd_boolean
-elf_xtensa_object_p (bfd *abfd)
-{
- int mach;
- unsigned long arch = elf_elfheader (abfd)->e_flags & EF_XTENSA_MACH;
-
- switch (arch)
- {
- case E_XTENSA_MACH:
- mach = bfd_mach_xtensa;
- break;
- default:
- return FALSE;
- }
-
- (void) bfd_default_set_arch_mach (abfd, bfd_arch_xtensa, mach);
- return TRUE;
-}
-
-
-/* The final processing done just before writing out an Xtensa ELF object
- file. This gets the Xtensa architecture right based on the machine
- number. */
-
-static void
-elf_xtensa_final_write_processing (bfd *abfd,
- bfd_boolean linker ATTRIBUTE_UNUSED)
-{
- int mach;
- unsigned long val;
-
- switch (mach = bfd_get_mach (abfd))
- {
- case bfd_mach_xtensa:
- val = E_XTENSA_MACH;
- break;
- default:
- return;
- }
-
- elf_elfheader (abfd)->e_flags &= (~ EF_XTENSA_MACH);
- elf_elfheader (abfd)->e_flags |= val;
-}
-
-
-static enum elf_reloc_type_class
-elf_xtensa_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
- const asection *rel_sec ATTRIBUTE_UNUSED,
- const Elf_Internal_Rela *rela)
-{
- switch ((int) ELF32_R_TYPE (rela->rz_info))
- {
- case RZ_XTENSA_RELATIVE:
- return reloc_class_relative;
- case RZ_XTENSA_JMP_SLOT:
- return reloc_class_plt;
- default:
- return reloc_class_normal;
- }
-}
-
-
-static bfd_boolean
-elf_xtensa_discard_info_for_section (bfd *abfd,
- struct elf_reloc_cookie *cookie,
- struct bfd_link_info *info,
- asection *sec)
-{
- bfd_byte *contents;
- bfd_vma offset, actual_offset;
- bfd_size_type removed_bytes = 0;
- bfd_size_type entry_size;
-
- if (sec->output_section
- && bfd_is_abs_section (sec->output_section))
- return FALSE;
-
- if (xtensa_is_proptable_section (sec))
- entry_size = 12;
- else
- entry_size = 8;
-
- if (sec->size == 0 || sec->size % entry_size != 0)
- return FALSE;
-
- contents = retrieve_contents (abfd, sec, info->keep_memory);
- if (!contents)
- return FALSE;
-
- cookie->rels = retrieve_internal_relocs (abfd, sec, info->keep_memory);
- if (!cookie->rels)
- {
- release_contents (sec, contents);
- return FALSE;
- }
-
- /* Sort the relocations. They should already be in order when
- relaxation is enabled, but it might not be. */
- qsort (cookie->rels, sec->reloc_count, sizeof (Elf_Internal_Rela),
- internal_reloc_compare);
-
- cookie->rel = cookie->rels;
- cookie->relend = cookie->rels + sec->reloc_count;
-
- for (offset = 0; offset < sec->size; offset += entry_size)
- {
- actual_offset = offset - removed_bytes;
-
- /* The ...symbol_deleted_p function will skip over relocs but it
- won't adjust their offsets, so do that here. */
- while (cookie->rel < cookie->relend
- && cookie->rel->rz_offset < offset)
- {
- cookie->rel->rz_offset -= removed_bytes;
- cookie->rel++;
- }
-
- while (cookie->rel < cookie->relend
- && cookie->rel->rz_offset == offset)
- {
- if (bfd_elf_reloc_symbol_deleted_p (offset, cookie))
- {
- /* Remove the table entry. (If the reloc type is NONE, then
- the entry has already been merged with another and deleted
- during relaxation.) */
- if (ELF32_R_TYPE (cookie->rel->rz_info) != RZ_XTENSA_NONE)
- {
- /* Shift the contents up. */
- if (offset + entry_size < sec->size)
- memmove (&contents[actual_offset],
- &contents[actual_offset + entry_size],
- sec->size - offset - entry_size);
- removed_bytes += entry_size;
- }
-
- /* Remove this relocation. */
- cookie->rel->rz_info = ELF32_R_INFO (0, RZ_XTENSA_NONE);
- }
-
- /* Adjust the relocation offset for previous removals. This
- should not be done before calling ...symbol_deleted_p
- because it might mess up the offset comparisons there.
- Make sure the offset doesn't underflow in the case where
- the first entry is removed. */
- if (cookie->rel->rz_offset >= removed_bytes)
- cookie->rel->rz_offset -= removed_bytes;
- else
- cookie->rel->rz_offset = 0;
-
- cookie->rel++;
- }
- }
-
- if (removed_bytes != 0)
- {
- /* Adjust any remaining relocs (shouldn't be any). */
- for (; cookie->rel < cookie->relend; cookie->rel++)
- {
- if (cookie->rel->rz_offset >= removed_bytes)
- cookie->rel->rz_offset -= removed_bytes;
- else
- cookie->rel->rz_offset = 0;
- }
-
- /* Clear the removed bytes. */
- memset (&contents[sec->size - removed_bytes], 0, removed_bytes);
-
- pin_contents (sec, contents);
- pin_internal_relocs (sec, cookie->rels);
-
- /* Shrink size. */
- if (sec->rawsize == 0)
- sec->rawsize = sec->size;
- sec->size -= removed_bytes;
-
- if (xtensa_is_littable_section (sec))
- {
- asection *sgotloc = elf_xtensa_hash_table (info)->sgotloc;
- if (sgotloc)
- sgotloc->size -= removed_bytes;
- }
- }
- else
- {
- release_contents (sec, contents);
- release_internal_relocs (sec, cookie->rels);
- }
-
- return (removed_bytes != 0);
-}
-
-
-static bfd_boolean
-elf_xtensa_discard_info (bfd *abfd,
- struct elf_reloc_cookie *cookie,
- struct bfd_link_info *info)
-{
- asection *sec;
- bfd_boolean changed = FALSE;
-
- for (sec = abfd->sections; sec != NULL; sec = sec->next)
- {
- if (xtensa_is_property_section (sec))
- {
- if (elf_xtensa_discard_info_for_section (abfd, cookie, info, sec))
- changed = TRUE;
- }
- }
-
- return changed;
-}
-
-
-static bfd_boolean
-elf_xtensa_ignore_discarded_relocs (asection *sec)
-{
- return xtensa_is_property_section (sec);
-}
-
-
-static unsigned int
-elf_xtensa_action_discarded (asection *sec)
-{
- if (strcmp (".xt_except_table", sec->name) == 0)
- return 0;
-
- if (strcmp (".xt_except_desc", sec->name) == 0)
- return 0;
-
- return _bfd_elf_default_action_discarded (sec);
-}
-
-
-/* Support for core dump NOTE sections. */
-
-static bfd_boolean
-elf_xtensa_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
-{
- int offset;
- unsigned int size;
-
- /* The size for Xtensa is variable, so don't try to recognize the format
- based on the size. Just assume this is GNU/Linux. */
-
- /* pr_cursig */
- elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
-
- /* pr_pid */
- elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
-
- /* pr_reg */
- offset = 72;
- size = note->descsz - offset - 4;
-
- /* Make a ".reg/999" section. */
- return _bfd_elfcore_make_pseudosection (abfd, ".reg",
- size, note->descpos + offset);
-}
-
-
-static bfd_boolean
-elf_xtensa_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
-{
- switch (note->descsz)
- {
- default:
- return FALSE;
-
- case 128: /* GNU/Linux elf_prpsinfo */
- elf_tdata (abfd)->core->program
- = _bfd_elfcore_strndup (abfd, note->descdata + 32, 16);
- elf_tdata (abfd)->core->command
- = _bfd_elfcore_strndup (abfd, note->descdata + 48, 80);
- }
-
- /* Note that for some reason, a spurious space is tacked
- onto the end of the args in some (at least one anyway)
- implementations, so strip it off if it exists. */
-
- {
- char *command = elf_tdata (abfd)->core->command;
- int n = strlen (command);
-
- if (0 < n && command[n - 1] == ' ')
- command[n - 1] = '\0';
- }
-
- return TRUE;
-}
-
-
-/* Generic Xtensa configurability stuff. */
-
-static xtensa_opcode callx0_op = XTENSA_UNDEFINED;
-static xtensa_opcode callx4_op = XTENSA_UNDEFINED;
-static xtensa_opcode callx8_op = XTENSA_UNDEFINED;
-static xtensa_opcode callx12_op = XTENSA_UNDEFINED;
-static xtensa_opcode call0_op = XTENSA_UNDEFINED;
-static xtensa_opcode call4_op = XTENSA_UNDEFINED;
-static xtensa_opcode call8_op = XTENSA_UNDEFINED;
-static xtensa_opcode call12_op = XTENSA_UNDEFINED;
-
-static void
-init_call_opcodes (void)
-{
- if (callx0_op == XTENSA_UNDEFINED)
- {
- callx0_op = xtensa_opcode_lookup (xtensa_default_isa, "callx0");
- callx4_op = xtensa_opcode_lookup (xtensa_default_isa, "callx4");
- callx8_op = xtensa_opcode_lookup (xtensa_default_isa, "callx8");
- callx12_op = xtensa_opcode_lookup (xtensa_default_isa, "callx12");
- call0_op = xtensa_opcode_lookup (xtensa_default_isa, "call0");
- call4_op = xtensa_opcode_lookup (xtensa_default_isa, "call4");
- call8_op = xtensa_opcode_lookup (xtensa_default_isa, "call8");
- call12_op = xtensa_opcode_lookup (xtensa_default_isa, "call12");
- }
-}
-
-
-static bfd_boolean
-is_indirect_call_opcode (xtensa_opcode opcode)
-{
- init_call_opcodes ();
- return (opcode == callx0_op
- || opcode == callx4_op
- || opcode == callx8_op
- || opcode == callx12_op);
-}
-
-
-static bfd_boolean
-is_direct_call_opcode (xtensa_opcode opcode)
-{
- init_call_opcodes ();
- return (opcode == call0_op
- || opcode == call4_op
- || opcode == call8_op
- || opcode == call12_op);
-}
-
-
-static bfd_boolean
-is_windowed_call_opcode (xtensa_opcode opcode)
-{
- init_call_opcodes ();
- return (opcode == call4_op
- || opcode == call8_op
- || opcode == call12_op
- || opcode == callx4_op
- || opcode == callx8_op
- || opcode == callx12_op);
-}
-
-
-static bfd_boolean
-get_indirect_call_dest_reg (xtensa_opcode opcode, unsigned *pdst)
-{
- unsigned dst = (unsigned) -1;
-
- init_call_opcodes ();
- if (opcode == callx0_op)
- dst = 0;
- else if (opcode == callx4_op)
- dst = 4;
- else if (opcode == callx8_op)
- dst = 8;
- else if (opcode == callx12_op)
- dst = 12;
-
- if (dst == (unsigned) -1)
- return FALSE;
-
- *pdst = dst;
- return TRUE;
-}
-
-
-static xtensa_opcode
-get_const16_opcode (void)
-{
- static bfd_boolean done_lookup = FALSE;
- static xtensa_opcode const16_opcode = XTENSA_UNDEFINED;
- if (!done_lookup)
- {
- const16_opcode = xtensa_opcode_lookup (xtensa_default_isa, "const16");
- done_lookup = TRUE;
- }
- return const16_opcode;
-}
-
-
-static xtensa_opcode
-get_l32r_opcode (void)
-{
- static xtensa_opcode l32r_opcode = XTENSA_UNDEFINED;
- static bfd_boolean done_lookup = FALSE;
-
- if (!done_lookup)
- {
- l32r_opcode = xtensa_opcode_lookup (xtensa_default_isa, "l32r");
- done_lookup = TRUE;
- }
- return l32r_opcode;
-}
-
-
-static bfd_vma
-l32r_offset (bfd_vma addr, bfd_vma pc)
-{
- bfd_vma offset;
-
- offset = addr - ((pc+3) & -4);
- BFD_ASSERT ((offset & ((1 << 2) - 1)) == 0);
- offset = (signed int) offset >> 2;
- BFD_ASSERT ((signed int) offset >> 16 == -1);
- return offset;
-}
-
-
-static int
-get_relocation_opnd (xtensa_opcode opcode, int rz_type)
-{
- xtensa_isa isa = xtensa_default_isa;
- int last_immed, last_opnd, opi;
-
- if (opcode == XTENSA_UNDEFINED)
- return XTENSA_UNDEFINED;
-
- /* Find the last visible PC-relative immediate operand for the opcode.
- If there are no PC-relative immediates, then choose the last visible
- immediate; otherwise, fail and return XTENSA_UNDEFINED. */
- last_immed = XTENSA_UNDEFINED;
- last_opnd = xtensa_opcode_num_operands (isa, opcode);
- for (opi = last_opnd - 1; opi >= 0; opi--)
- {
- if (xtensa_operand_is_visible (isa, opcode, opi) == 0)
- continue;
- if (xtensa_operand_is_PCrelative (isa, opcode, opi) == 1)
- {
- last_immed = opi;
- break;
- }
- if (last_immed == XTENSA_UNDEFINED
- && xtensa_operand_is_register (isa, opcode, opi) == 0)
- last_immed = opi;
- }
- if (last_immed < 0)
- return XTENSA_UNDEFINED;
-
- /* If the operand number was specified in an old-style relocation,
- check for consistency with the operand computed above. */
- if (rz_type >= RZ_XTENSA_OP0 && rz_type <= RZ_XTENSA_OP2)
- {
- int reloc_opnd = rz_type - RZ_XTENSA_OP0;
- if (reloc_opnd != last_immed)
- return XTENSA_UNDEFINED;
- }
-
- return last_immed;
-}
-
-
-int
-get_relocation_slot (int rz_type)
-{
- switch (rz_type)
- {
- case RZ_XTENSA_OP0:
- case RZ_XTENSA_OP1:
- case RZ_XTENSA_OP2:
- return 0;
-
- default:
- if (rz_type >= RZ_XTENSA_SLOT0_OP && rz_type <= RZ_XTENSA_SLOT14_OP)
- return rz_type - RZ_XTENSA_SLOT0_OP;
- if (rz_type >= RZ_XTENSA_SLOT0_ALT && rz_type <= RZ_XTENSA_SLOT14_ALT)
- return rz_type - RZ_XTENSA_SLOT0_ALT;
- break;
- }
-
- return XTENSA_UNDEFINED;
-}
-
-
-/* Get the opcode for a relocation. */
-
-static xtensa_opcode
-get_relocation_opcode (bfd *abfd,
- asection *sec,
- bfd_byte *contents,
- Elf_Internal_Rela *irel)
-{
- static xtensa_insnbuf ibuff = NULL;
- static xtensa_insnbuf sbuff = NULL;
- xtensa_isa isa = xtensa_default_isa;
- xtensa_format fmt;
- int slot;
-
- if (contents == NULL)
- return XTENSA_UNDEFINED;
-
- if (bfd_get_section_limit (abfd, sec) <= irel->rz_offset)
- return XTENSA_UNDEFINED;
-
- if (ibuff == NULL)
- {
- ibuff = xtensa_insnbuf_alloc (isa);
- sbuff = xtensa_insnbuf_alloc (isa);
- }
-
- /* Decode the instruction. */
- xtensa_insnbuf_from_chars (isa, ibuff, &contents[irel->rz_offset],
- sec->size - irel->rz_offset);
- fmt = xtensa_format_decode (isa, ibuff);
- slot = get_relocation_slot (ELF32_R_TYPE (irel->rz_info));
- if (slot == XTENSA_UNDEFINED)
- return XTENSA_UNDEFINED;
- xtensa_format_get_slot (isa, fmt, slot, ibuff, sbuff);
- return xtensa_opcode_decode (isa, fmt, slot, sbuff);
-}
-
-
-bfd_boolean
-is_l32r_relocation (bfd *abfd,
- asection *sec,
- bfd_byte *contents,
- Elf_Internal_Rela *irel)
-{
- xtensa_opcode opcode;
- if (!is_operand_relocation (ELF32_R_TYPE (irel->rz_info)))
- return FALSE;
- opcode = get_relocation_opcode (abfd, sec, contents, irel);
- return (opcode == get_l32r_opcode ());
-}
-
-
-static bfd_size_type
-get_asm_simplify_size (bfd_byte *contents,
- bfd_size_type content_len,
- bfd_size_type offset)
-{
- bfd_size_type insnlen, size = 0;
-
- /* Decode the size of the next two instructions. */
- insnlen = insn_decode_len (contents, content_len, offset);
- if (insnlen == 0)
- return 0;
-
- size += insnlen;
-
- insnlen = insn_decode_len (contents, content_len, offset + size);
- if (insnlen == 0)
- return 0;
-
- size += insnlen;
- return size;
-}
-
-
-bfd_boolean
-is_alt_relocation (int rz_type)
-{
- return (rz_type >= RZ_XTENSA_SLOT0_ALT
- && rz_type <= RZ_XTENSA_SLOT14_ALT);
-}
-
-
-bfd_boolean
-is_operand_relocation (int rz_type)
-{
- switch (rz_type)
- {
- case RZ_XTENSA_OP0:
- case RZ_XTENSA_OP1:
- case RZ_XTENSA_OP2:
- return TRUE;
-
- default:
- if (rz_type >= RZ_XTENSA_SLOT0_OP && rz_type <= RZ_XTENSA_SLOT14_OP)
- return TRUE;
- if (rz_type >= RZ_XTENSA_SLOT0_ALT && rz_type <= RZ_XTENSA_SLOT14_ALT)
- return TRUE;
- break;
- }
-
- return FALSE;
-}
-
-
-#define MIN_INSN_LENGTH 2
-
-/* Return 0 if it fails to decode. */
-
-bfd_size_type
-insn_decode_len (bfd_byte *contents,
- bfd_size_type content_len,
- bfd_size_type offset)
-{
- int insn_len;
- xtensa_isa isa = xtensa_default_isa;
- xtensa_format fmt;
- static xtensa_insnbuf ibuff = NULL;
-
- if (offset + MIN_INSN_LENGTH > content_len)
- return 0;
-
- if (ibuff == NULL)
- ibuff = xtensa_insnbuf_alloc (isa);
- xtensa_insnbuf_from_chars (isa, ibuff, &contents[offset],
- content_len - offset);
- fmt = xtensa_format_decode (isa, ibuff);
- if (fmt == XTENSA_UNDEFINED)
- return 0;
- insn_len = xtensa_format_length (isa, fmt);
- if (insn_len == XTENSA_UNDEFINED)
- return 0;
- return insn_len;
-}
-
-
-/* Decode the opcode for a single slot instruction.
- Return 0 if it fails to decode or the instruction is multi-slot. */
-
-xtensa_opcode
-insn_decode_opcode (bfd_byte *contents,
- bfd_size_type content_len,
- bfd_size_type offset,
- int slot)
-{
- xtensa_isa isa = xtensa_default_isa;
- xtensa_format fmt;
- static xtensa_insnbuf insnbuf = NULL;
- static xtensa_insnbuf slotbuf = NULL;
-
- if (offset + MIN_INSN_LENGTH > content_len)
- return XTENSA_UNDEFINED;
-
- if (insnbuf == NULL)
- {
- insnbuf = xtensa_insnbuf_alloc (isa);
- slotbuf = xtensa_insnbuf_alloc (isa);
- }
-
- xtensa_insnbuf_from_chars (isa, insnbuf, &contents[offset],
- content_len - offset);
- fmt = xtensa_format_decode (isa, insnbuf);
- if (fmt == XTENSA_UNDEFINED)
- return XTENSA_UNDEFINED;
-
- if (slot >= xtensa_format_num_slots (isa, fmt))
- return XTENSA_UNDEFINED;
-
- xtensa_format_get_slot (isa, fmt, slot, insnbuf, slotbuf);
- return xtensa_opcode_decode (isa, fmt, slot, slotbuf);
-}
-
-
-/* The offset is the offset in the contents.
- The address is the address of that offset. */
-
-static bfd_boolean
-check_branch_target_aligned (bfd_byte *contents,
- bfd_size_type content_length,
- bfd_vma offset,
- bfd_vma address)
-{
- bfd_size_type insn_len = insn_decode_len (contents, content_length, offset);
- if (insn_len == 0)
- return FALSE;
- return check_branch_target_aligned_address (address, insn_len);
-}
-
-
-static bfd_boolean
-check_loop_aligned (bfd_byte *contents,
- bfd_size_type content_length,
- bfd_vma offset,
- bfd_vma address)
-{
- bfd_size_type loop_len, insn_len;
- xtensa_opcode opcode;
-
- opcode = insn_decode_opcode (contents, content_length, offset, 0);
- if (opcode == XTENSA_UNDEFINED
- || xtensa_opcode_is_loop (xtensa_default_isa, opcode) != 1)
- {
- BFD_ASSERT (FALSE);
- return FALSE;
- }
-
- loop_len = insn_decode_len (contents, content_length, offset);
- insn_len = insn_decode_len (contents, content_length, offset + loop_len);
- if (loop_len == 0 || insn_len == 0)
- {
- BFD_ASSERT (FALSE);
- return FALSE;
- }
-
- return check_branch_target_aligned_address (address + loop_len, insn_len);
-}
-
-
-static bfd_boolean
-check_branch_target_aligned_address (bfd_vma addr, int len)
-{
- if (len == 8)
- return (addr % 8 == 0);
- return ((addr >> 2) == ((addr + len - 1) >> 2));
-}
-
-
-/* Instruction widening and narrowing. */
-
-/* When FLIX is available we need to access certain instructions only
- when they are 16-bit or 24-bit instructions. This table caches
- information about such instructions by walking through all the
- opcodes and finding the smallest single-slot format into which each
- can be encoded. */
-
-static xtensa_format *op_single_fmt_table = NULL;
-
-
-static void
-init_op_single_format_table (void)
-{
- xtensa_isa isa = xtensa_default_isa;
- xtensa_insnbuf ibuf;
- xtensa_opcode opcode;
- xtensa_format fmt;
- int num_opcodes;
-
- if (op_single_fmt_table)
- return;
-
- ibuf = xtensa_insnbuf_alloc (isa);
- num_opcodes = xtensa_isa_num_opcodes (isa);
-
- op_single_fmt_table = (xtensa_format *)
- bfd_malloc (sizeof (xtensa_format) * num_opcodes);
- for (opcode = 0; opcode < num_opcodes; opcode++)
- {
- op_single_fmt_table[opcode] = XTENSA_UNDEFINED;
- for (fmt = 0; fmt < xtensa_isa_num_formats (isa); fmt++)
- {
- if (xtensa_format_num_slots (isa, fmt) == 1
- && xtensa_opcode_encode (isa, fmt, 0, ibuf, opcode) == 0)
- {
- xtensa_opcode old_fmt = op_single_fmt_table[opcode];
- int fmt_length = xtensa_format_length (isa, fmt);
- if (old_fmt == XTENSA_UNDEFINED
- || fmt_length < xtensa_format_length (isa, old_fmt))
- op_single_fmt_table[opcode] = fmt;
- }
- }
- }
- xtensa_insnbuf_free (isa, ibuf);
-}
-
-
-static xtensa_format
-get_single_format (xtensa_opcode opcode)
-{
- init_op_single_format_table ();
- return op_single_fmt_table[opcode];
-}
-
-
-/* For the set of narrowable instructions we do NOT include the
- narrowings beqz -> beqz.n or bnez -> bnez.n because of complexities
- involved during linker relaxation that may require these to
- re-expand in some conditions. Also, the narrowing "or" -> mov.n
- requires special case code to ensure it only works when op1 == op2. */
-
-struct string_pair
-{
- const char *wide;
- const char *narrow;
-};
-
-struct string_pair narrowable[] =
-{
- { "add", "add.n" },
- { "addi", "addi.n" },
- { "addmi", "addi.n" },
- { "l32i", "l32i.n" },
- { "movi", "movi.n" },
- { "ret", "ret.n" },
- { "retw", "retw.n" },
- { "s32i", "s32i.n" },
- { "or", "mov.n" } /* special case only when op1 == op2 */
-};
-
-struct string_pair widenable[] =
-{
- { "add", "add.n" },
- { "addi", "addi.n" },
- { "addmi", "addi.n" },
- { "beqz", "beqz.n" },
- { "bnez", "bnez.n" },
- { "l32i", "l32i.n" },
- { "movi", "movi.n" },
- { "ret", "ret.n" },
- { "retw", "retw.n" },
- { "s32i", "s32i.n" },
- { "or", "mov.n" } /* special case only when op1 == op2 */
-};
-
-
-/* Check if an instruction can be "narrowed", i.e., changed from a standard
- 3-byte instruction to a 2-byte "density" instruction. If it is valid,
- return the instruction buffer holding the narrow instruction. Otherwise,
- return 0. The set of valid narrowing are specified by a string table
- but require some special case operand checks in some cases. */
-
-static xtensa_insnbuf
-can_narrow_instruction (xtensa_insnbuf slotbuf,
- xtensa_format fmt,
- xtensa_opcode opcode)
-{
- xtensa_isa isa = xtensa_default_isa;
- xtensa_format o_fmt;
- unsigned opi;
-
- static xtensa_insnbuf o_insnbuf = NULL;
- static xtensa_insnbuf o_slotbuf = NULL;
-
- if (o_insnbuf == NULL)
- {
- o_insnbuf = xtensa_insnbuf_alloc (isa);
- o_slotbuf = xtensa_insnbuf_alloc (isa);
- }
-
- for (opi = 0; opi < (sizeof (narrowable)/sizeof (struct string_pair)); opi++)
- {
- bfd_boolean is_or = (strcmp ("or", narrowable[opi].wide) == 0);
-
- if (opcode == xtensa_opcode_lookup (isa, narrowable[opi].wide))
- {
- uint32 value, newval;
- int i, operand_count, o_operand_count;
- xtensa_opcode o_opcode;
-
- /* Address does not matter in this case. We might need to
- fix it to handle branches/jumps. */
- bfd_vma self_address = 0;
-
- o_opcode = xtensa_opcode_lookup (isa, narrowable[opi].narrow);
- if (o_opcode == XTENSA_UNDEFINED)
- return 0;
- o_fmt = get_single_format (o_opcode);
- if (o_fmt == XTENSA_UNDEFINED)
- return 0;
-
- if (xtensa_format_length (isa, fmt) != 3
- || xtensa_format_length (isa, o_fmt) != 2)
- return 0;
-
- xtensa_format_encode (isa, o_fmt, o_insnbuf);
- operand_count = xtensa_opcode_num_operands (isa, opcode);
- o_operand_count = xtensa_opcode_num_operands (isa, o_opcode);
-
- if (xtensa_opcode_encode (isa, o_fmt, 0, o_slotbuf, o_opcode) != 0)
- return 0;
-
- if (!is_or)
- {
- if (xtensa_opcode_num_operands (isa, o_opcode) != operand_count)
- return 0;
- }
- else
- {
- uint32 rawval0, rawval1, rawval2;
-
- if (o_operand_count + 1 != operand_count
- || xtensa_operand_get_field (isa, opcode, 0,
- fmt, 0, slotbuf, &rawval0) != 0
- || xtensa_operand_get_field (isa, opcode, 1,
- fmt, 0, slotbuf, &rawval1) != 0
- || xtensa_operand_get_field (isa, opcode, 2,
- fmt, 0, slotbuf, &rawval2) != 0
- || rawval1 != rawval2
- || rawval0 == rawval1 /* it is a nop */)
- return 0;
- }
-
- for (i = 0; i < o_operand_count; ++i)
- {
- if (xtensa_operand_get_field (isa, opcode, i, fmt, 0,
- slotbuf, &value)
- || xtensa_operand_decode (isa, opcode, i, &value))
- return 0;
-
- /* PC-relative branches need adjustment, but
- the PC-rel operand will always have a relocation. */
- newval = value;
- if (xtensa_operand_do_reloc (isa, o_opcode, i, &newval,
- self_address)
- || xtensa_operand_encode (isa, o_opcode, i, &newval)
- || xtensa_operand_set_field (isa, o_opcode, i, o_fmt, 0,
- o_slotbuf, newval))
- return 0;
- }
-
- if (xtensa_format_set_slot (isa, o_fmt, 0, o_insnbuf, o_slotbuf))
- return 0;
-
- return o_insnbuf;
- }
- }
- return 0;
-}
-
-
-/* Attempt to narrow an instruction. If the narrowing is valid, perform
- the action in-place directly into the contents and return TRUE. Otherwise,
- the return value is FALSE and the contents are not modified. */
-
-static bfd_boolean
-narrow_instruction (bfd_byte *contents,
- bfd_size_type content_length,
- bfd_size_type offset)
-{
- xtensa_opcode opcode;
- bfd_size_type insn_len;
- xtensa_isa isa = xtensa_default_isa;
- xtensa_format fmt;
- xtensa_insnbuf o_insnbuf;
-
- static xtensa_insnbuf insnbuf = NULL;
- static xtensa_insnbuf slotbuf = NULL;
-
- if (insnbuf == NULL)
- {
- insnbuf = xtensa_insnbuf_alloc (isa);
- slotbuf = xtensa_insnbuf_alloc (isa);
- }
-
- BFD_ASSERT (offset < content_length);
-
- if (content_length < 2)
- return FALSE;
-
- /* We will hand-code a few of these for a little while.
- These have all been specified in the assembler aleady. */
- xtensa_insnbuf_from_chars (isa, insnbuf, &contents[offset],
- content_length - offset);
- fmt = xtensa_format_decode (isa, insnbuf);
- if (xtensa_format_num_slots (isa, fmt) != 1)
- return FALSE;
-
- if (xtensa_format_get_slot (isa, fmt, 0, insnbuf, slotbuf) != 0)
- return FALSE;
-
- opcode = xtensa_opcode_decode (isa, fmt, 0, slotbuf);
- if (opcode == XTENSA_UNDEFINED)
- return FALSE;
- insn_len = xtensa_format_length (isa, fmt);
- if (insn_len > content_length)
- return FALSE;
-
- o_insnbuf = can_narrow_instruction (slotbuf, fmt, opcode);
- if (o_insnbuf)
- {
- xtensa_insnbuf_to_chars (isa, o_insnbuf, contents + offset,
- content_length - offset);
- return TRUE;
- }
-
- return FALSE;
-}
-
-
-/* Check if an instruction can be "widened", i.e., changed from a 2-byte
- "density" instruction to a standard 3-byte instruction. If it is valid,
- return the instruction buffer holding the wide instruction. Otherwise,
- return 0. The set of valid widenings are specified by a string table
- but require some special case operand checks in some cases. */
-
-static xtensa_insnbuf
-can_widen_instruction (xtensa_insnbuf slotbuf,
- xtensa_format fmt,
- xtensa_opcode opcode)
-{
- xtensa_isa isa = xtensa_default_isa;
- xtensa_format o_fmt;
- unsigned opi;
-
- static xtensa_insnbuf o_insnbuf = NULL;
- static xtensa_insnbuf o_slotbuf = NULL;
-
- if (o_insnbuf == NULL)
- {
- o_insnbuf = xtensa_insnbuf_alloc (isa);
- o_slotbuf = xtensa_insnbuf_alloc (isa);
- }
-
- for (opi = 0; opi < (sizeof (widenable)/sizeof (struct string_pair)); opi++)
- {
- bfd_boolean is_or = (strcmp ("or", widenable[opi].wide) == 0);
- bfd_boolean is_branch = (strcmp ("beqz", widenable[opi].wide) == 0
- || strcmp ("bnez", widenable[opi].wide) == 0);
-
- if (opcode == xtensa_opcode_lookup (isa, widenable[opi].narrow))
- {
- uint32 value, newval;
- int i, operand_count, o_operand_count, check_operand_count;
- xtensa_opcode o_opcode;
-
- /* Address does not matter in this case. We might need to fix it
- to handle branches/jumps. */
- bfd_vma self_address = 0;
-
- o_opcode = xtensa_opcode_lookup (isa, widenable[opi].wide);
- if (o_opcode == XTENSA_UNDEFINED)
- return 0;
- o_fmt = get_single_format (o_opcode);
- if (o_fmt == XTENSA_UNDEFINED)
- return 0;
-
- if (xtensa_format_length (isa, fmt) != 2
- || xtensa_format_length (isa, o_fmt) != 3)
- return 0;
-
- xtensa_format_encode (isa, o_fmt, o_insnbuf);
- operand_count = xtensa_opcode_num_operands (isa, opcode);
- o_operand_count = xtensa_opcode_num_operands (isa, o_opcode);
- check_operand_count = o_operand_count;
-
- if (xtensa_opcode_encode (isa, o_fmt, 0, o_slotbuf, o_opcode) != 0)
- return 0;
-
- if (!is_or)
- {
- if (xtensa_opcode_num_operands (isa, o_opcode) != operand_count)
- return 0;
- }
- else
- {
- uint32 rawval0, rawval1;
-
- if (o_operand_count != operand_count + 1
- || xtensa_operand_get_field (isa, opcode, 0,
- fmt, 0, slotbuf, &rawval0) != 0
- || xtensa_operand_get_field (isa, opcode, 1,
- fmt, 0, slotbuf, &rawval1) != 0
- || rawval0 == rawval1 /* it is a nop */)
- return 0;
- }
- if (is_branch)
- check_operand_count--;
-
- for (i = 0; i < check_operand_count; i++)
- {
- int new_i = i;
- if (is_or && i == o_operand_count - 1)
- new_i = i - 1;
- if (xtensa_operand_get_field (isa, opcode, new_i, fmt, 0,
- slotbuf, &value)
- || xtensa_operand_decode (isa, opcode, new_i, &value))
- return 0;
-
- /* PC-relative branches need adjustment, but
- the PC-rel operand will always have a relocation. */
- newval = value;
- if (xtensa_operand_do_reloc (isa, o_opcode, i, &newval,
- self_address)
- || xtensa_operand_encode (isa, o_opcode, i, &newval)
- || xtensa_operand_set_field (isa, o_opcode, i, o_fmt, 0,
- o_slotbuf, newval))
- return 0;
- }
-
- if (xtensa_format_set_slot (isa, o_fmt, 0, o_insnbuf, o_slotbuf))
- return 0;
-
- return o_insnbuf;
- }
- }
- return 0;
-}
-
-
-/* Attempt to widen an instruction. If the widening is valid, perform
- the action in-place directly into the contents and return TRUE. Otherwise,
- the return value is FALSE and the contents are not modified. */
-
-static bfd_boolean
-widen_instruction (bfd_byte *contents,
- bfd_size_type content_length,
- bfd_size_type offset)
-{
- xtensa_opcode opcode;
- bfd_size_type insn_len;
- xtensa_isa isa = xtensa_default_isa;
- xtensa_format fmt;
- xtensa_insnbuf o_insnbuf;
-
- static xtensa_insnbuf insnbuf = NULL;
- static xtensa_insnbuf slotbuf = NULL;
-
- if (insnbuf == NULL)
- {
- insnbuf = xtensa_insnbuf_alloc (isa);
- slotbuf = xtensa_insnbuf_alloc (isa);
- }
-
- BFD_ASSERT (offset < content_length);
-
- if (content_length < 2)
- return FALSE;
-
- /* We will hand-code a few of these for a little while.
- These have all been specified in the assembler aleady. */
- xtensa_insnbuf_from_chars (isa, insnbuf, &contents[offset],
- content_length - offset);
- fmt = xtensa_format_decode (isa, insnbuf);
- if (xtensa_format_num_slots (isa, fmt) != 1)
- return FALSE;
-
- if (xtensa_format_get_slot (isa, fmt, 0, insnbuf, slotbuf) != 0)
- return FALSE;
-
- opcode = xtensa_opcode_decode (isa, fmt, 0, slotbuf);
- if (opcode == XTENSA_UNDEFINED)
- return FALSE;
- insn_len = xtensa_format_length (isa, fmt);
- if (insn_len > content_length)
- return FALSE;
-
- o_insnbuf = can_widen_instruction (slotbuf, fmt, opcode);
- if (o_insnbuf)
- {
- xtensa_insnbuf_to_chars (isa, o_insnbuf, contents + offset,
- content_length - offset);
- return TRUE;
- }
- return FALSE;
-}
-
-
-/* Code for transforming CALLs at link-time. */
-
-static bfd_reloc_status_type
-elf_xtensa_do_asm_simplify (bfd_byte *contents,
- bfd_vma address,
- bfd_vma content_length,
- char **error_message)
-{
- static xtensa_insnbuf insnbuf = NULL;
- static xtensa_insnbuf slotbuf = NULL;
- xtensa_format core_format = XTENSA_UNDEFINED;
- xtensa_opcode opcode;
- xtensa_opcode direct_call_opcode;
- xtensa_isa isa = xtensa_default_isa;
- bfd_byte *chbuf = contents + address;
- int opn;
-
- if (insnbuf == NULL)
- {
- insnbuf = xtensa_insnbuf_alloc (isa);
- slotbuf = xtensa_insnbuf_alloc (isa);
- }
-
- if (content_length < address)
- {
- *error_message = _("Attempt to convert L32R/CALLX to CALL failed");
- return bfd_reloc_other;
- }
-
- opcode = get_expanded_call_opcode (chbuf, content_length - address, 0);
- direct_call_opcode = swap_callx_for_call_opcode (opcode);
- if (direct_call_opcode == XTENSA_UNDEFINED)
- {
- *error_message = _("Attempt to convert L32R/CALLX to CALL failed");
- return bfd_reloc_other;
- }
-
- /* Assemble a NOP ("or a1, a1, a1") into the 0 byte offset. */
- core_format = xtensa_format_lookup (isa, "x24");
- opcode = xtensa_opcode_lookup (isa, "or");
- xtensa_opcode_encode (isa, core_format, 0, slotbuf, opcode);
- for (opn = 0; opn < 3; opn++)
- {
- uint32 regno = 1;
- xtensa_operand_encode (isa, opcode, opn, ®no);
- xtensa_operand_set_field (isa, opcode, opn, core_format, 0,
- slotbuf, regno);
- }
- xtensa_format_encode (isa, core_format, insnbuf);
- xtensa_format_set_slot (isa, core_format, 0, insnbuf, slotbuf);
- xtensa_insnbuf_to_chars (isa, insnbuf, chbuf, content_length - address);
-
- /* Assemble a CALL ("callN 0") into the 3 byte offset. */
- xtensa_opcode_encode (isa, core_format, 0, slotbuf, direct_call_opcode);
- xtensa_operand_set_field (isa, opcode, 0, core_format, 0, slotbuf, 0);
-
- xtensa_format_encode (isa, core_format, insnbuf);
- xtensa_format_set_slot (isa, core_format, 0, insnbuf, slotbuf);
- xtensa_insnbuf_to_chars (isa, insnbuf, chbuf + 3,
- content_length - address - 3);
-
- return bfd_reloc_ok;
-}
-
-
-static bfd_reloc_status_type
-contract_asm_expansion (bfd_byte *contents,
- bfd_vma content_length,
- Elf_Internal_Rela *irel,
- char **error_message)
-{
- bfd_reloc_status_type retval =
- elf_xtensa_do_asm_simplify (contents, irel->rz_offset, content_length,
- error_message);
-
- if (retval != bfd_reloc_ok)
- return bfd_reloc_dangerous;
-
- /* Update the irel->rz_offset field so that the right immediate and
- the right instruction are modified during the relocation. */
- irel->rz_offset += 3;
- irel->rz_info = ELF32_R_INFO (ELF32_R_SYM (irel->rz_info), RZ_XTENSA_SLOT0_OP);
- return bfd_reloc_ok;
-}
-
-
-static xtensa_opcode
-swap_callx_for_call_opcode (xtensa_opcode opcode)
-{
- init_call_opcodes ();
-
- if (opcode == callx0_op) return call0_op;
- if (opcode == callx4_op) return call4_op;
- if (opcode == callx8_op) return call8_op;
- if (opcode == callx12_op) return call12_op;
-
- /* Return XTENSA_UNDEFINED if the opcode is not an indirect call. */
- return XTENSA_UNDEFINED;
-}
-
-
-/* Check if "buf" is pointing to a "L32R aN; CALLX aN" or "CONST16 aN;
- CONST16 aN; CALLX aN" sequence, and if so, return the CALLX opcode.
- If not, return XTENSA_UNDEFINED. */
-
-#define L32R_TARGET_REG_OPERAND 0
-#define CONST16_TARGET_REG_OPERAND 0
-#define CALLN_SOURCE_OPERAND 0
-
-static xtensa_opcode
-get_expanded_call_opcode (bfd_byte *buf, int bufsize, bfd_boolean *p_uses_l32r)
-{
- static xtensa_insnbuf insnbuf = NULL;
- static xtensa_insnbuf slotbuf = NULL;
- xtensa_format fmt;
- xtensa_opcode opcode;
- xtensa_isa isa = xtensa_default_isa;
- uint32 regno, const16_regno, call_regno;
- int offset = 0;
-
- if (insnbuf == NULL)
- {
- insnbuf = xtensa_insnbuf_alloc (isa);
- slotbuf = xtensa_insnbuf_alloc (isa);
- }
-
- xtensa_insnbuf_from_chars (isa, insnbuf, buf, bufsize);
- fmt = xtensa_format_decode (isa, insnbuf);
- if (fmt == XTENSA_UNDEFINED
- || xtensa_format_get_slot (isa, fmt, 0, insnbuf, slotbuf))
- return XTENSA_UNDEFINED;
-
- opcode = xtensa_opcode_decode (isa, fmt, 0, slotbuf);
- if (opcode == XTENSA_UNDEFINED)
- return XTENSA_UNDEFINED;
-
- if (opcode == get_l32r_opcode ())
- {
- if (p_uses_l32r)
- *p_uses_l32r = TRUE;
- if (xtensa_operand_get_field (isa, opcode, L32R_TARGET_REG_OPERAND,
- fmt, 0, slotbuf, ®no)
- || xtensa_operand_decode (isa, opcode, L32R_TARGET_REG_OPERAND,
- ®no))
- return XTENSA_UNDEFINED;
- }
- else if (opcode == get_const16_opcode ())
- {
- if (p_uses_l32r)
- *p_uses_l32r = FALSE;
- if (xtensa_operand_get_field (isa, opcode, CONST16_TARGET_REG_OPERAND,
- fmt, 0, slotbuf, ®no)
- || xtensa_operand_decode (isa, opcode, CONST16_TARGET_REG_OPERAND,
- ®no))
- return XTENSA_UNDEFINED;
-
- /* Check that the next instruction is also CONST16. */
- offset += xtensa_format_length (isa, fmt);
- xtensa_insnbuf_from_chars (isa, insnbuf, buf + offset, bufsize - offset);
- fmt = xtensa_format_decode (isa, insnbuf);
- if (fmt == XTENSA_UNDEFINED
- || xtensa_format_get_slot (isa, fmt, 0, insnbuf, slotbuf))
- return XTENSA_UNDEFINED;
- opcode = xtensa_opcode_decode (isa, fmt, 0, slotbuf);
- if (opcode != get_const16_opcode ())
- return XTENSA_UNDEFINED;
-
- if (xtensa_operand_get_field (isa, opcode, CONST16_TARGET_REG_OPERAND,
- fmt, 0, slotbuf, &const16_regno)
- || xtensa_operand_decode (isa, opcode, CONST16_TARGET_REG_OPERAND,
- &const16_regno)
- || const16_regno != regno)
- return XTENSA_UNDEFINED;
- }
- else
- return XTENSA_UNDEFINED;
-
- /* Next instruction should be an CALLXn with operand 0 == regno. */
- offset += xtensa_format_length (isa, fmt);
- xtensa_insnbuf_from_chars (isa, insnbuf, buf + offset, bufsize - offset);
- fmt = xtensa_format_decode (isa, insnbuf);
- if (fmt == XTENSA_UNDEFINED
- || xtensa_format_get_slot (isa, fmt, 0, insnbuf, slotbuf))
- return XTENSA_UNDEFINED;
- opcode = xtensa_opcode_decode (isa, fmt, 0, slotbuf);
- if (opcode == XTENSA_UNDEFINED
- || !is_indirect_call_opcode (opcode))
- return XTENSA_UNDEFINED;
-
- if (xtensa_operand_get_field (isa, opcode, CALLN_SOURCE_OPERAND,
- fmt, 0, slotbuf, &call_regno)
- || xtensa_operand_decode (isa, opcode, CALLN_SOURCE_OPERAND,
- &call_regno))
- return XTENSA_UNDEFINED;
-
- if (call_regno != regno)
- return XTENSA_UNDEFINED;
-
- return opcode;
-}
-
-
-/* Data structures used during relaxation. */
-
-/* rz_reloc: relocation values. */
-
-/* Through the relaxation process, we need to keep track of the values
- that will result from evaluating relocations. The standard ELF
- relocation structure is not sufficient for this purpose because we're
- operating on multiple input files at once, so we need to know which
- input file a relocation refers to. The rz_reloc structure thus
- records both the input file (bfd) and ELF relocation.
-
- For efficiency, an rz_reloc also contains a "target_offset" field to
- cache the target-section-relative offset value that is represented by
- the relocation.
-
- The rz_reloc also contains a virtual offset that allows multiple
- inserted literals to be placed at the same "address" with
- different offsets. */
-
-typedef struct rz_reloc_struct rz_reloc;
-
-struct rz_reloc_struct
-{
- bfd *abfd;
- Elf_Internal_Rela rela;
- bfd_vma target_offset;
- bfd_vma virtual_offset;
-};
-
-
-/* The rz_reloc structure is included by value in literal_value, but not
- every literal_value has an associated relocation -- some are simple
- constants. In such cases, we set all the fields in the rz_reloc
- struct to zero. The rz_reloc_is_const function should be used to
- detect this case. */
-
-static bfd_boolean
-rz_reloc_is_const (const rz_reloc *rz_rel)
-{
- return (rz_rel->abfd == NULL);
-}
-
-
-static bfd_vma
-rz_reloc_get_target_offset (const rz_reloc *rz_rel)
-{
- bfd_vma target_offset;
- unsigned long rz_symndx;
-
- BFD_ASSERT (!rz_reloc_is_const (rz_rel));
- rz_symndx = ELF32_R_SYM (rz_rel->rela.rz_info);
- target_offset = get_elf_r_symndx_offset (rz_rel->abfd, rz_symndx);
- return (target_offset + rz_rel->rela.rz_addend);
-}
-
-
-static struct elf_link_hash_entry *
-rz_reloc_get_hash_entry (const rz_reloc *rz_rel)
-{
- unsigned long rz_symndx = ELF32_R_SYM (rz_rel->rela.rz_info);
- return get_elf_r_symndx_hash_entry (rz_rel->abfd, rz_symndx);
-}
-
-
-static asection *
-rz_reloc_get_section (const rz_reloc *rz_rel)
-{
- unsigned long rz_symndx = ELF32_R_SYM (rz_rel->rela.rz_info);
- return get_elf_r_symndx_section (rz_rel->abfd, rz_symndx);
-}
-
-
-static bfd_boolean
-rz_reloc_is_defined (const rz_reloc *rz_rel)
-{
- asection *sec;
- if (rz_rel == NULL)
- return FALSE;
-
- sec = rz_reloc_get_section (rz_rel);
- if (sec == bfd_abs_section_ptr
- || sec == bfd_com_section_ptr
- || sec == bfd_und_section_ptr)
- return FALSE;
- return TRUE;
-}
-
-
-static void
-rz_reloc_init (rz_reloc *rz_rel,
- bfd *abfd,
- Elf_Internal_Rela *irel,
- bfd_byte *contents,
- bfd_size_type content_length)
-{
- int rz_type;
- reloc_howto_type *howto;
-
- if (irel)
- {
- rz_rel->rela = *irel;
- rz_rel->abfd = abfd;
- rz_rel->target_offset = rz_reloc_get_target_offset (rz_rel);
- rz_rel->virtual_offset = 0;
- rz_type = ELF32_R_TYPE (rz_rel->rela.rz_info);
- howto = &elf_howto_table[rz_type];
- if (howto->partial_inplace)
- {
- bfd_vma inplace_val;
- BFD_ASSERT (rz_rel->rela.rz_offset < content_length);
-
- inplace_val = bfd_get_32 (abfd, &contents[rz_rel->rela.rz_offset]);
- rz_rel->target_offset += inplace_val;
- }
- }
- else
- memset (rz_rel, 0, sizeof (rz_reloc));
-}
-
-
-#if DEBUG
-
-static void
-print_r_reloc (FILE *fp, const rz_reloc *rz_rel)
-{
- if (rz_reloc_is_defined (rz_rel))
- {
- asection *sec = rz_reloc_get_section (rz_rel);
- fprintf (fp, " %s(%s + ", sec->owner->filename, sec->name);
- }
- else if (rz_reloc_get_hash_entry (rz_rel))
- fprintf (fp, " %s + ", rz_reloc_get_hash_entry (rz_rel)->root.root.string);
- else
- fprintf (fp, " ?? + ");
-
- fprintf_vma (fp, rz_rel->target_offset);
- if (rz_rel->virtual_offset)
- {
- fprintf (fp, " + ");
- fprintf_vma (fp, rz_rel->virtual_offset);
- }
-
- fprintf (fp, ")");
-}
-
-#endif /* DEBUG */
-
-
-/* source_reloc: relocations that reference literals. */
-
-/* To determine whether literals can be coalesced, we need to first
- record all the relocations that reference the literals. The
- source_reloc structure below is used for this purpose. The
- source_reloc entries are kept in a per-literal-section array, sorted
- by offset within the literal section (i.e., target offset).
-
- The source_sec and rz_rel.rela.rz_offset fields identify the source of
- the relocation. The rz_rel field records the relocation value, i.e.,
- the offset of the literal being referenced. The opnd field is needed
- to determine the range of the immediate field to which the relocation
- applies, so we can determine whether another literal with the same
- value is within range. The is_null field is true when the relocation
- is being removed (e.g., when an L32R is being removed due to a CALLX
- that is converted to a direct CALL). */
-
-typedef struct source_reloc_struct source_reloc;
-
-struct source_reloc_struct
-{
- asection *source_sec;
- rz_reloc rz_rel;
- xtensa_opcode opcode;
- int opnd;
- bfd_boolean is_null;
- bfd_boolean is_abs_literal;
-};
-
-
-static void
-init_source_reloc (source_reloc *reloc,
- asection *source_sec,
- const rz_reloc *rz_rel,
- xtensa_opcode opcode,
- int opnd,
- bfd_boolean is_abs_literal)
-{
- reloc->source_sec = source_sec;
- reloc->rz_rel = *rz_rel;
- reloc->opcode = opcode;
- reloc->opnd = opnd;
- reloc->is_null = FALSE;
- reloc->is_abs_literal = is_abs_literal;
-}
-
-
-/* Find the source_reloc for a particular source offset and relocation
- type. Note that the array is sorted by _target_ offset, so this is
- just a linear search. */
-
-static source_reloc *
-find_source_reloc (source_reloc *src_relocs,
- int src_count,
- asection *sec,
- Elf_Internal_Rela *irel)
-{
- int i;
-
- for (i = 0; i < src_count; i++)
- {
- if (src_relocs[i].source_sec == sec
- && src_relocs[i].rz_rel.rela.rz_offset == irel->rz_offset
- && (ELF32_R_TYPE (src_relocs[i].rz_rel.rela.rz_info)
- == ELF32_R_TYPE (irel->rz_info)))
- return &src_relocs[i];
- }
-
- return NULL;
-}
-
-
-static int
-source_reloc_compare (const void *ap, const void *bp)
-{
- const source_reloc *a = (const source_reloc *) ap;
- const source_reloc *b = (const source_reloc *) bp;
-
- if (a->rz_rel.target_offset != b->rz_rel.target_offset)
- return (a->rz_rel.target_offset - b->rz_rel.target_offset);
-
- /* We don't need to sort on these criteria for correctness,
- but enforcing a more strict ordering prevents unstable qsort
- from behaving differently with different implementations.
- Without the code below we get correct but different results
- on Solaris 2.7 and 2.8. We would like to always produce the
- same results no matter the host. */
-
- if ((!a->is_null) - (!b->is_null))
- return ((!a->is_null) - (!b->is_null));
- return internal_reloc_compare (&a->rz_rel.rela, &b->rz_rel.rela);
-}
-
-
-/* Literal values and value hash tables. */
-
-/* Literals with the same value can be coalesced. The literal_value
- structure records the value of a literal: the "rz_rel" field holds the
- information from the relocation on the literal (if there is one) and
- the "value" field holds the contents of the literal word itself.
-
- The value_map structure records a literal value along with the
- location of a literal holding that value. The value_map hash table
- is indexed by the literal value, so that we can quickly check if a
- particular literal value has been seen before and is thus a candidate
- for coalescing. */
-
-typedef struct literal_value_struct literal_value;
-typedef struct value_map_struct value_map;
-typedef struct value_map_hash_table_struct value_map_hash_table;
-
-struct literal_value_struct
-{
- rz_reloc rz_rel;
- unsigned long value;
- bfd_boolean is_abs_literal;
-};
-
-struct value_map_struct
-{
- literal_value val; /* The literal value. */
- rz_reloc loc; /* Location of the literal. */
- value_map *next;
-};
-
-struct value_map_hash_table_struct
-{
- unsigned bucket_count;
- value_map **buckets;
- unsigned count;
- bfd_boolean has_last_loc;
- rz_reloc last_loc;
-};
-
-
-static void
-init_literal_value (literal_value *lit,
- const rz_reloc *rz_rel,
- unsigned long value,
- bfd_boolean is_abs_literal)
-{
- lit->rz_rel = *rz_rel;
- lit->value = value;
- lit->is_abs_literal = is_abs_literal;
-}
-
-
-static bfd_boolean
-literal_value_equal (const literal_value *src1,
- const literal_value *src2,
- bfd_boolean final_static_link)
-{
- struct elf_link_hash_entry *h1, *h2;
-
- if (rz_reloc_is_const (&src1->rz_rel) != rz_reloc_is_const (&src2->rz_rel))
- return FALSE;
-
- if (rz_reloc_is_const (&src1->rz_rel))
- return (src1->value == src2->value);
-
- if (ELF32_R_TYPE (src1->rz_rel.rela.rz_info)
- != ELF32_R_TYPE (src2->rz_rel.rela.rz_info))
- return FALSE;
-
- if (src1->rz_rel.target_offset != src2->rz_rel.target_offset)
- return FALSE;
-
- if (src1->rz_rel.virtual_offset != src2->rz_rel.virtual_offset)
- return FALSE;
-
- if (src1->value != src2->value)
- return FALSE;
-
- /* Now check for the same section (if defined) or the same elf_hash
- (if undefined or weak). */
- h1 = rz_reloc_get_hash_entry (&src1->rz_rel);
- h2 = rz_reloc_get_hash_entry (&src2->rz_rel);
- if (rz_reloc_is_defined (&src1->rz_rel)
- && (final_static_link
- || ((!h1 || h1->root.type != bfd_link_hash_defweak)
- && (!h2 || h2->root.type != bfd_link_hash_defweak))))
- {
- if (rz_reloc_get_section (&src1->rz_rel)
- != rz_reloc_get_section (&src2->rz_rel))
- return FALSE;
- }
- else
- {
- /* Require that the hash entries (i.e., symbols) be identical. */
- if (h1 != h2 || h1 == 0)
- return FALSE;
- }
-
- if (src1->is_abs_literal != src2->is_abs_literal)
- return FALSE;
-
- return TRUE;
-}
-
-
-/* Must be power of 2. */
-#define INITIAL_HASH_RELOC_BUCKET_COUNT 1024
-
-static value_map_hash_table *
-value_map_hash_table_init (void)
-{
- value_map_hash_table *values;
-
- values = (value_map_hash_table *)
- bfd_zmalloc (sizeof (value_map_hash_table));
- values->bucket_count = INITIAL_HASH_RELOC_BUCKET_COUNT;
- values->count = 0;
- values->buckets = (value_map **)
- bfd_zmalloc (sizeof (value_map *) * values->bucket_count);
- if (values->buckets == NULL)
- {
- free (values);
- return NULL;
- }
- values->has_last_loc = FALSE;
-
- return values;
-}
-
-
-static void
-value_map_hash_table_delete (value_map_hash_table *table)
-{
- free (table->buckets);
- free (table);
-}
-
-
-static unsigned
-hash_bfd_vma (bfd_vma val)
-{
- return (val >> 2) + (val >> 10);
-}
-
-
-static unsigned
-literal_value_hash (const literal_value *src)
-{
- unsigned hash_val;
-
- hash_val = hash_bfd_vma (src->value);
- if (!rz_reloc_is_const (&src->rz_rel))
- {
- void *sec_or_hash;
-
- hash_val += hash_bfd_vma (src->is_abs_literal * 1000);
- hash_val += hash_bfd_vma (src->rz_rel.target_offset);
- hash_val += hash_bfd_vma (src->rz_rel.virtual_offset);
-
- /* Now check for the same section and the same elf_hash. */
- if (rz_reloc_is_defined (&src->rz_rel))
- sec_or_hash = rz_reloc_get_section (&src->rz_rel);
- else
- sec_or_hash = rz_reloc_get_hash_entry (&src->rz_rel);
- hash_val += hash_bfd_vma ((bfd_vma) (size_t) sec_or_hash);
- }
- return hash_val;
-}
-
-
-/* Check if the specified literal_value has been seen before. */
-
-static value_map *
-value_map_get_cached_value (value_map_hash_table *map,
- const literal_value *val,
- bfd_boolean final_static_link)
-{
- value_map *map_e;
- value_map *bucket;
- unsigned idx;
-
- idx = literal_value_hash (val);
- idx = idx & (map->bucket_count - 1);
- bucket = map->buckets[idx];
- for (map_e = bucket; map_e; map_e = map_e->next)
- {
- if (literal_value_equal (&map_e->val, val, final_static_link))
- return map_e;
- }
- return NULL;
-}
-
-
-/* Record a new literal value. It is illegal to call this if VALUE
- already has an entry here. */
-
-static value_map *
-add_value_map (value_map_hash_table *map,
- const literal_value *val,
- const rz_reloc *loc,
- bfd_boolean final_static_link)
-{
- value_map **bucket_p;
- unsigned idx;
-
- value_map *val_e = (value_map *) bfd_zmalloc (sizeof (value_map));
- if (val_e == NULL)
- {
- bfd_set_error (bfd_error_no_memory);
- return NULL;
- }
-
- BFD_ASSERT (!value_map_get_cached_value (map, val, final_static_link));
- val_e->val = *val;
- val_e->loc = *loc;
-
- idx = literal_value_hash (val);
- idx = idx & (map->bucket_count - 1);
- bucket_p = &map->buckets[idx];
-
- val_e->next = *bucket_p;
- *bucket_p = val_e;
- map->count++;
- /* FIXME: Consider resizing the hash table if we get too many entries. */
-
- return val_e;
-}
-
-
-/* Lists of text actions (ta_) for narrowing, widening, longcall
- conversion, space fill, code & literal removal, etc. */
-
-/* The following text actions are generated:
-
- "ta_remove_insn" remove an instruction or instructions
- "ta_remove_longcall" convert longcall to call
- "ta_convert_longcall" convert longcall to nop/call
- "ta_narrow_insn" narrow a wide instruction
- "ta_widen" widen a narrow instruction
- "ta_fill" add fill or remove fill
- removed < 0 is a fill; branches to the fill address will be
- changed to address + fill size (e.g., address - removed)
- removed >= 0 branches to the fill address will stay unchanged
- "ta_remove_literal" remove a literal; this action is
- indicated when a literal is removed
- or replaced.
- "ta_add_literal" insert a new literal; this action is
- indicated when a literal has been moved.
- It may use a virtual_offset because
- multiple literals can be placed at the
- same location.
-
- For each of these text actions, we also record the number of bytes
- removed by performing the text action. In the case of a "ta_widen"
- or a "ta_fill" that adds space, the removed_bytes will be negative. */
-
-typedef struct text_action_struct text_action;
-typedef struct text_action_list_struct text_action_list;
-typedef enum text_action_enum_t text_action_t;
-
-enum text_action_enum_t
-{
- ta_none,
- ta_remove_insn, /* removed = -size */
- ta_remove_longcall, /* removed = -size */
- ta_convert_longcall, /* removed = 0 */
- ta_narrow_insn, /* removed = -1 */
- ta_widen_insn, /* removed = +1 */
- ta_fill, /* removed = +size */
- ta_remove_literal,
- ta_add_literal
-};
-
-
-/* Structure for a text action record. */
-struct text_action_struct
-{
- text_action_t action;
- asection *sec; /* Optional */
- bfd_vma offset;
- bfd_vma virtual_offset; /* Zero except for adding literals. */
- int removed_bytes;
- literal_value value; /* Only valid when adding literals. */
-};
-
-struct removal_by_action_entry_struct
-{
- bfd_vma offset;
- int removed;
- int eq_removed;
- int eq_removed_before_fill;
-};
-typedef struct removal_by_action_entry_struct removal_by_action_entry;
-
-struct removal_by_action_map_struct
-{
- unsigned n_entries;
- removal_by_action_entry *entry;
-};
-typedef struct removal_by_action_map_struct removal_by_action_map;
-
-
-/* List of all of the actions taken on a text section. */
-struct text_action_list_struct
-{
- unsigned count;
- splay_tree tree;
- removal_by_action_map map;
-};
-
-
-static text_action *
-find_fill_action (text_action_list *l, asection *sec, bfd_vma offset)
-{
- text_action a;
-
- /* It is not necessary to fill at the end of a section. */
- if (sec->size == offset)
- return NULL;
-
- a.offset = offset;
- a.action = ta_fill;
-
- splay_tree_node node = splay_tree_lookup (l->tree, (splay_tree_key)&a);
- if (node)
- return (text_action *)node->value;
- return NULL;
-}
-
-
-static int
-compute_removed_action_diff (const text_action *ta,
- asection *sec,
- bfd_vma offset,
- int removed,
- int removable_space)
-{
- int new_removed;
- int current_removed = 0;
-
- if (ta)
- current_removed = ta->removed_bytes;
-
- BFD_ASSERT (ta == NULL || ta->offset == offset);
- BFD_ASSERT (ta == NULL || ta->action == ta_fill);
-
- /* It is not necessary to fill at the end of a section. Clean this up. */
- if (sec->size == offset)
- new_removed = removable_space - 0;
- else
- {
- int space;
- int added = -removed - current_removed;
- /* Ignore multiples of the section alignment. */
- added = ((1 << sec->alignment_power) - 1) & added;
- new_removed = (-added);
-
- /* Modify for removable. */
- space = removable_space - new_removed;
- new_removed = (removable_space
- - (((1 << sec->alignment_power) - 1) & space));
- }
- return (new_removed - current_removed);
-}
-
-
-static void
-adjust_fill_action (text_action *ta, int fill_diff)
-{
- ta->removed_bytes += fill_diff;
-}
-
-
-static int
-text_action_compare (splay_tree_key a, splay_tree_key b)
-{
- text_action *pa = (text_action *)a;
- text_action *pb = (text_action *)b;
- static const int action_priority[] =
- {
- [ta_fill] = 0,
- [ta_none] = 1,
- [ta_convert_longcall] = 2,
- [ta_narrow_insn] = 3,
- [ta_remove_insn] = 4,
- [ta_remove_longcall] = 5,
- [ta_remove_literal] = 6,
- [ta_widen_insn] = 7,
- [ta_add_literal] = 8,
- };
-
- if (pa->offset == pb->offset)
- {
- if (pa->action == pb->action)
- return 0;
- return action_priority[pa->action] - action_priority[pb->action];
- }
- else
- return pa->offset < pb->offset ? -1 : 1;
-}
-
-static text_action *
-action_first (text_action_list *action_list)
-{
- splay_tree_node node = splay_tree_min (action_list->tree);
- return node ? (text_action *)node->value : NULL;
-}
-
-static text_action *
-action_next (text_action_list *action_list, text_action *action)
-{
- splay_tree_node node = splay_tree_successor (action_list->tree,
- (splay_tree_key)action);
- return node ? (text_action *)node->value : NULL;
-}
-
-/* Add a modification action to the text. For the case of adding or
- removing space, modify any current fill and assume that
- "unreachable_space" bytes can be freely contracted. Note that a
- negative removed value is a fill. */
-
-static void
-text_action_add (text_action_list *l,
- text_action_t action,
- asection *sec,
- bfd_vma offset,
- int removed)
-{
- text_action *ta;
- text_action a;
-
- /* It is not necessary to fill at the end of a section. */
- if (action == ta_fill && sec->size == offset)
- return;
-
- /* It is not necessary to fill 0 bytes. */
- if (action == ta_fill && removed == 0)
- return;
-
- a.action = action;
- a.offset = offset;
-
- if (action == ta_fill)
- {
- splay_tree_node node = splay_tree_lookup (l->tree, (splay_tree_key)&a);
-
- if (node)
- {
- ta = (text_action *)node->value;
- ta->removed_bytes += removed;
- return;
- }
- }
- else
- BFD_ASSERT (splay_tree_lookup (l->tree, (splay_tree_key)&a) == NULL);
-
- ta = (text_action *) bfd_zmalloc (sizeof (text_action));
- ta->action = action;
- ta->sec = sec;
- ta->offset = offset;
- ta->removed_bytes = removed;
- splay_tree_insert (l->tree, (splay_tree_key)ta, (splay_tree_value)ta);
- ++l->count;
-}
-
-
-static void
-text_action_add_literal (text_action_list *l,
- text_action_t action,
- const rz_reloc *loc,
- const literal_value *value,
- int removed)
-{
- text_action *ta;
- asection *sec = rz_reloc_get_section (loc);
- bfd_vma offset = loc->target_offset;
- bfd_vma virtual_offset = loc->virtual_offset;
-
- BFD_ASSERT (action == ta_add_literal);
-
- /* Create a new record and fill it up. */
- ta = (text_action *) bfd_zmalloc (sizeof (text_action));
- ta->action = action;
- ta->sec = sec;
- ta->offset = offset;
- ta->virtual_offset = virtual_offset;
- ta->value = *value;
- ta->removed_bytes = removed;
-
- BFD_ASSERT (splay_tree_lookup (l->tree, (splay_tree_key)ta) == NULL);
- splay_tree_insert (l->tree, (splay_tree_key)ta, (splay_tree_value)ta);
- ++l->count;
-}
-
-
-/* Find the total offset adjustment for the relaxations specified by
- text_actions, beginning from a particular starting action. This is
- typically used from offset_with_removed_text to search an entire list of
- actions, but it may also be called directly when adjusting adjacent offsets
- so that each search may begin where the previous one left off. */
-
-static int
-removed_by_actions (text_action_list *action_list,
- text_action **p_start_action,
- bfd_vma offset,
- bfd_boolean before_fill)
-{
- text_action *r;
- int removed = 0;
-
- r = *p_start_action;
- if (r)
- {
- splay_tree_node node = splay_tree_lookup (action_list->tree,
- (splay_tree_key)r);
- BFD_ASSERT (node != NULL && r == (text_action *)node->value);
- }
-
- while (r)
- {
- if (r->offset > offset)
- break;
-
- if (r->offset == offset
- && (before_fill || r->action != ta_fill || r->removed_bytes >= 0))
- break;
-
- removed += r->removed_bytes;
-
- r = action_next (action_list, r);
- }
-
- *p_start_action = r;
- return removed;
-}
-
-
-static bfd_vma
-offset_with_removed_text (text_action_list *action_list, bfd_vma offset)
-{
- text_action *r = action_first (action_list);
-
- return offset - removed_by_actions (action_list, &r, offset, FALSE);
-}
-
-
-static unsigned
-action_list_count (text_action_list *action_list)
-{
- return action_list->count;
-}
-
-typedef struct map_action_fn_context_struct map_action_fn_context;
-struct map_action_fn_context_struct
-{
- int removed;
- removal_by_action_map map;
- bfd_boolean eq_complete;
-};
-
-static int
-map_action_fn (splay_tree_node node, void *p)
-{
- map_action_fn_context *ctx = p;
- text_action *r = (text_action *)node->value;
- removal_by_action_entry *ientry = ctx->map.entry + ctx->map.n_entries;
-
- if (ctx->map.n_entries && (ientry - 1)->offset == r->offset)
- {
- --ientry;
- }
- else
- {
- ++ctx->map.n_entries;
- ctx->eq_complete = FALSE;
- ientry->offset = r->offset;
- ientry->eq_removed_before_fill = ctx->removed;
- }
-
- if (!ctx->eq_complete)
- {
- if (r->action != ta_fill || r->removed_bytes >= 0)
- {
- ientry->eq_removed = ctx->removed;
- ctx->eq_complete = TRUE;
- }
- else
- ientry->eq_removed = ctx->removed + r->removed_bytes;
- }
-
- ctx->removed += r->removed_bytes;
- ientry->removed = ctx->removed;
- return 0;
-}
-
-static void
-map_removal_by_action (text_action_list *action_list)
-{
- map_action_fn_context ctx;
-
- ctx.removed = 0;
- ctx.map.n_entries = 0;
- ctx.map.entry = bfd_malloc (action_list_count (action_list) *
- sizeof (removal_by_action_entry));
- ctx.eq_complete = FALSE;
-
- splay_tree_foreach (action_list->tree, map_action_fn, &ctx);
- action_list->map = ctx.map;
-}
-
-static int
-removed_by_actions_map (text_action_list *action_list, bfd_vma offset,
- bfd_boolean before_fill)
-{
- unsigned a, b;
-
- if (!action_list->map.entry)
- map_removal_by_action (action_list);
-
- if (!action_list->map.n_entries)
- return 0;
-
- a = 0;
- b = action_list->map.n_entries;
-
- while (b - a > 1)
- {
- unsigned c = (a + b) / 2;
-
- if (action_list->map.entry[c].offset <= offset)
- a = c;
- else
- b = c;
- }
-
- if (action_list->map.entry[a].offset < offset)
- {
- return action_list->map.entry[a].removed;
- }
- else if (action_list->map.entry[a].offset == offset)
- {
- return before_fill ?
- action_list->map.entry[a].eq_removed_before_fill :
- action_list->map.entry[a].eq_removed;
- }
- else
- {
- return 0;
- }
-}
-
-static bfd_vma
-offset_with_removed_text_map (text_action_list *action_list, bfd_vma offset)
-{
- int removed = removed_by_actions_map (action_list, offset, FALSE);
- return offset - removed;
-}
-
-
-/* The find_insn_action routine will only find non-fill actions. */
-
-static text_action *
-find_insn_action (text_action_list *action_list, bfd_vma offset)
-{
- static const text_action_t action[] =
- {
- ta_convert_longcall,
- ta_remove_longcall,
- ta_widen_insn,
- ta_narrow_insn,
- ta_remove_insn,
- };
- text_action a;
- unsigned i;
-
- a.offset = offset;
- for (i = 0; i < sizeof (action) / sizeof (*action); ++i)
- {
- splay_tree_node node;
-
- a.action = action[i];
- node = splay_tree_lookup (action_list->tree, (splay_tree_key)&a);
- if (node)
- return (text_action *)node->value;
- }
- return NULL;
-}
-
-
-#if DEBUG
-
-static void
-print_action (FILE *fp, text_action *r)
-{
- const char *t = "unknown";
- switch (r->action)
- {
- case ta_remove_insn:
- t = "remove_insn"; break;
- case ta_remove_longcall:
- t = "remove_longcall"; break;
- case ta_convert_longcall:
- t = "convert_longcall"; break;
- case ta_narrow_insn:
- t = "narrow_insn"; break;
- case ta_widen_insn:
- t = "widen_insn"; break;
- case ta_fill:
- t = "fill"; break;
- case ta_none:
- t = "none"; break;
- case ta_remove_literal:
- t = "remove_literal"; break;
- case ta_add_literal:
- t = "add_literal"; break;
- }
-
- fprintf (fp, "%s: %s[0x%lx] \"%s\" %d\n",
- r->sec->owner->filename,
- r->sec->name, (unsigned long) r->offset, t, r->removed_bytes);
-}
-
-static int
-print_action_list_fn (splay_tree_node node, void *p)
-{
- text_action *r = (text_action *)node->value;
-
- print_action (p, r);
- return 0;
-}
-
-static void
-print_action_list (FILE *fp, text_action_list *action_list)
-{
- fprintf (fp, "Text Action\n");
- splay_tree_foreach (action_list->tree, print_action_list_fn, fp);
-}
-
-#endif /* DEBUG */
-
-
-/* Lists of literals being coalesced or removed. */
-
-/* In the usual case, the literal identified by "from" is being
- coalesced with another literal identified by "to". If the literal is
- unused and is being removed altogether, "to.abfd" will be NULL.
- The removed_literal entries are kept on a per-section list, sorted
- by the "from" offset field. */
-
-typedef struct removed_literal_struct removed_literal;
-typedef struct removed_literal_map_entry_struct removed_literal_map_entry;
-typedef struct removed_literal_list_struct removed_literal_list;
-
-struct removed_literal_struct
-{
- rz_reloc from;
- rz_reloc to;
- removed_literal *next;
-};
-
-struct removed_literal_map_entry_struct
-{
- bfd_vma addr;
- removed_literal *literal;
-};
-
-struct removed_literal_list_struct
-{
- removed_literal *head;
- removed_literal *tail;
-
- unsigned n_map;
- removed_literal_map_entry *map;
-};
-
-
-/* Record that the literal at "from" is being removed. If "to" is not
- NULL, the "from" literal is being coalesced with the "to" literal. */
-
-static void
-add_removed_literal (removed_literal_list *removed_list,
- const rz_reloc *from,
- const rz_reloc *to)
-{
- removed_literal *r, *new_r, *next_r;
-
- new_r = (removed_literal *) bfd_zmalloc (sizeof (removed_literal));
-
- new_r->from = *from;
- if (to)
- new_r->to = *to;
- else
- new_r->to.abfd = NULL;
- new_r->next = NULL;
-
- r = removed_list->head;
- if (r == NULL)
- {
- removed_list->head = new_r;
- removed_list->tail = new_r;
- }
- /* Special check for common case of append. */
- else if (removed_list->tail->from.target_offset < from->target_offset)
- {
- removed_list->tail->next = new_r;
- removed_list->tail = new_r;
- }
- else
- {
- while (r->from.target_offset < from->target_offset && r->next)
- {
- r = r->next;
- }
- next_r = r->next;
- r->next = new_r;
- new_r->next = next_r;
- if (next_r == NULL)
- removed_list->tail = new_r;
- }
-}
-
-static void
-map_removed_literal (removed_literal_list *removed_list)
-{
- unsigned n_map = 0;
- unsigned i;
- removed_literal_map_entry *map = NULL;
- removed_literal *r = removed_list->head;
-
- for (i = 0; r; ++i, r = r->next)
- {
- if (i == n_map)
- {
- n_map = (n_map * 2) + 2;
- map = bfd_realloc (map, n_map * sizeof (*map));
- }
- map[i].addr = r->from.target_offset;
- map[i].literal = r;
- }
- removed_list->map = map;
- removed_list->n_map = i;
-}
-
-static int
-removed_literal_compare (const void *a, const void *b)
-{
- const removed_literal_map_entry *pa = a;
- const removed_literal_map_entry *pb = b;
-
- if (pa->addr == pb->addr)
- return 0;
- else
- return pa->addr < pb->addr ? -1 : 1;
-}
-
-/* Check if the list of removed literals contains an entry for the
- given address. Return the entry if found. */
-
-static removed_literal *
-find_removed_literal (removed_literal_list *removed_list, bfd_vma addr)
-{
- removed_literal_map_entry *p;
- removed_literal *r = NULL;
-
- if (removed_list->map == NULL)
- map_removed_literal (removed_list);
-
- p = bsearch (&addr, removed_list->map, removed_list->n_map,
- sizeof (*removed_list->map), removed_literal_compare);
- if (p)
- {
- while (p != removed_list->map && (p - 1)->addr == addr)
- --p;
- r = p->literal;
- }
- return r;
-}
-
-
-#if DEBUG
-
-static void
-print_removed_literals (FILE *fp, removed_literal_list *removed_list)
-{
- removed_literal *r;
- r = removed_list->head;
- if (r)
- fprintf (fp, "Removed Literals\n");
- for (; r != NULL; r = r->next)
- {
- print_r_reloc (fp, &r->from);
- fprintf (fp, " => ");
- if (r->to.abfd == NULL)
- fprintf (fp, "REMOVED");
- else
- print_r_reloc (fp, &r->to);
- fprintf (fp, "\n");
- }
-}
-
-#endif /* DEBUG */
-
-
-/* Per-section data for relaxation. */
-
-typedef struct reloc_bfd_fix_struct reloc_bfd_fix;
-
-struct xtensa_relax_info_struct
-{
- bfd_boolean is_relaxable_literal_section;
- bfd_boolean is_relaxable_asm_section;
- int visited; /* Number of times visited. */
-
- source_reloc *src_relocs; /* Array[src_count]. */
- int src_count;
- int src_next; /* Next src_relocs entry to assign. */
-
- removed_literal_list removed_list;
- text_action_list action_list;
-
- reloc_bfd_fix *fix_list;
- reloc_bfd_fix *fix_array;
- unsigned fix_array_count;
-
- /* Support for expanding the reloc array that is stored
- in the section structure. If the relocations have been
- reallocated, the newly allocated relocations will be referenced
- here along with the actual size allocated. The relocation
- count will always be found in the section structure. */
- Elf_Internal_Rela *allocated_relocs;
- unsigned relocs_count;
- unsigned allocated_relocs_count;
-};
-
-struct elf_xtensa_section_data
-{
- struct bfd_elf_section_data elf;
- xtensa_relax_info relax_info;
-};
-
-
-static bfd_boolean
-elf_xtensa_new_section_hook (bfd *abfd, asection *sec)
-{
- if (!sec->used_by_bfd)
- {
- struct elf_xtensa_section_data *sdata;
- bfd_size_type amt = sizeof (*sdata);
-
- sdata = bfd_zalloc (abfd, amt);
- if (sdata == NULL)
- return FALSE;
- sec->used_by_bfd = sdata;
- }
-
- return _bfd_elf_new_section_hook (abfd, sec);
-}
-
-
-static xtensa_relax_info *
-get_xtensa_relax_info (asection *sec)
-{
- struct elf_xtensa_section_data *section_data;
-
- /* No info available if no section or if it is an output section. */
- if (!sec || sec == sec->output_section)
- return NULL;
-
- section_data = (struct elf_xtensa_section_data *) elf_section_data (sec);
- return §ion_data->relax_info;
-}
-
-
-static void
-init_xtensa_relax_info (asection *sec)
-{
- xtensa_relax_info *relax_info = get_xtensa_relax_info (sec);
-
- relax_info->is_relaxable_literal_section = FALSE;
- relax_info->is_relaxable_asm_section = FALSE;
- relax_info->visited = 0;
-
- relax_info->src_relocs = NULL;
- relax_info->src_count = 0;
- relax_info->src_next = 0;
-
- relax_info->removed_list.head = NULL;
- relax_info->removed_list.tail = NULL;
-
- relax_info->action_list.tree = splay_tree_new (text_action_compare,
- NULL, NULL);
- relax_info->action_list.map.n_entries = 0;
- relax_info->action_list.map.entry = NULL;
-
- relax_info->fix_list = NULL;
- relax_info->fix_array = NULL;
- relax_info->fix_array_count = 0;
-
- relax_info->allocated_relocs = NULL;
- relax_info->relocs_count = 0;
- relax_info->allocated_relocs_count = 0;
-}
-
-
-/* Coalescing literals may require a relocation to refer to a section in
- a different input file, but the standard relocation information
- cannot express that. Instead, the reloc_bfd_fix structures are used
- to "fix" the relocations that refer to sections in other input files.
- These structures are kept on per-section lists. The "src_type" field
- records the relocation type in case there are multiple relocations on
- the same location. FIXME: This is ugly; an alternative might be to
- add new symbols with the "owner" field to some other input file. */
-
-struct reloc_bfd_fix_struct
-{
- asection *src_sec;
- bfd_vma src_offset;
- unsigned src_type; /* Relocation type. */
-
- asection *target_sec;
- bfd_vma target_offset;
- bfd_boolean translated;
-
- reloc_bfd_fix *next;
-};
-
-
-static reloc_bfd_fix *
-reloc_bfd_fix_init (asection *src_sec,
- bfd_vma src_offset,
- unsigned src_type,
- asection *target_sec,
- bfd_vma target_offset,
- bfd_boolean translated)
-{
- reloc_bfd_fix *fix;
-
- fix = (reloc_bfd_fix *) bfd_malloc (sizeof (reloc_bfd_fix));
- fix->src_sec = src_sec;
- fix->src_offset = src_offset;
- fix->src_type = src_type;
- fix->target_sec = target_sec;
- fix->target_offset = target_offset;
- fix->translated = translated;
-
- return fix;
-}
-
-
-static void
-add_fix (asection *src_sec, reloc_bfd_fix *fix)
-{
- xtensa_relax_info *relax_info;
-
- relax_info = get_xtensa_relax_info (src_sec);
- fix->next = relax_info->fix_list;
- relax_info->fix_list = fix;
-}
-
-
-static int
-fix_compare (const void *ap, const void *bp)
-{
- const reloc_bfd_fix *a = (const reloc_bfd_fix *) ap;
- const reloc_bfd_fix *b = (const reloc_bfd_fix *) bp;
-
- if (a->src_offset != b->src_offset)
- return (a->src_offset - b->src_offset);
- return (a->src_type - b->src_type);
-}
-
-
-static void
-cache_fix_array (asection *sec)
-{
- unsigned i, count = 0;
- reloc_bfd_fix *r;
- xtensa_relax_info *relax_info = get_xtensa_relax_info (sec);
-
- if (relax_info == NULL)
- return;
- if (relax_info->fix_list == NULL)
- return;
-
- for (r = relax_info->fix_list; r != NULL; r = r->next)
- count++;
-
- relax_info->fix_array =
- (reloc_bfd_fix *) bfd_malloc (sizeof (reloc_bfd_fix) * count);
- relax_info->fix_array_count = count;
-
- r = relax_info->fix_list;
- for (i = 0; i < count; i++, r = r->next)
- {
- relax_info->fix_array[count - 1 - i] = *r;
- relax_info->fix_array[count - 1 - i].next = NULL;
- }
-
- qsort (relax_info->fix_array, relax_info->fix_array_count,
- sizeof (reloc_bfd_fix), fix_compare);
-}
-
-
-static reloc_bfd_fix *
-get_bfd_fix (asection *sec, bfd_vma offset, unsigned type)
-{
- xtensa_relax_info *relax_info = get_xtensa_relax_info (sec);
- reloc_bfd_fix *rv;
- reloc_bfd_fix key;
-
- if (relax_info == NULL)
- return NULL;
- if (relax_info->fix_list == NULL)
- return NULL;
-
- if (relax_info->fix_array == NULL)
- cache_fix_array (sec);
-
- key.src_offset = offset;
- key.src_type = type;
- rv = bsearch (&key, relax_info->fix_array, relax_info->fix_array_count,
- sizeof (reloc_bfd_fix), fix_compare);
- return rv;
-}
-
-
-/* Section caching. */
-
-typedef struct section_cache_struct section_cache_t;
-
-struct section_cache_struct
-{
- asection *sec;
-
- bfd_byte *contents; /* Cache of the section contents. */
- bfd_size_type content_length;
-
- property_table_entry *ptbl; /* Cache of the section property table. */
- unsigned pte_count;
-
- Elf_Internal_Rela *relocs; /* Cache of the section relocations. */
- unsigned reloc_count;
-};
-
-
-static void
-init_section_cache (section_cache_t *sec_cache)
-{
- memset (sec_cache, 0, sizeof (*sec_cache));
-}
-
-
-static void
-free_section_cache (section_cache_t *sec_cache)
-{
- if (sec_cache->sec)
- {
- release_contents (sec_cache->sec, sec_cache->contents);
- release_internal_relocs (sec_cache->sec, sec_cache->relocs);
- if (sec_cache->ptbl)
- free (sec_cache->ptbl);
- }
-}
-
-
-static bfd_boolean
-section_cache_section (section_cache_t *sec_cache,
- asection *sec,
- struct bfd_link_info *link_info)
-{
- bfd *abfd;
- property_table_entry *prop_table = NULL;
- int ptblsize = 0;
- bfd_byte *contents = NULL;
- Elf_Internal_Rela *internal_relocs = NULL;
- bfd_size_type sec_size;
-
- if (sec == NULL)
- return FALSE;
- if (sec == sec_cache->sec)
- return TRUE;
-
- abfd = sec->owner;
- sec_size = bfd_get_section_limit (abfd, sec);
-
- /* Get the contents. */
- contents = retrieve_contents (abfd, sec, link_info->keep_memory);
- if (contents == NULL && sec_size != 0)
- goto err;
-
- /* Get the relocations. */
- internal_relocs = retrieve_internal_relocs (abfd, sec,
- link_info->keep_memory);
-
- /* Get the entry table. */
- ptblsize = xtensa_read_table_entries (abfd, sec, &prop_table,
- XTENSA_PROP_SEC_NAME, FALSE);
- if (ptblsize < 0)
- goto err;
-
- /* Fill in the new section cache. */
- free_section_cache (sec_cache);
- init_section_cache (sec_cache);
-
- sec_cache->sec = sec;
- sec_cache->contents = contents;
- sec_cache->content_length = sec_size;
- sec_cache->relocs = internal_relocs;
- sec_cache->reloc_count = sec->reloc_count;
- sec_cache->pte_count = ptblsize;
- sec_cache->ptbl = prop_table;
-
- return TRUE;
-
- err:
- release_contents (sec, contents);
- release_internal_relocs (sec, internal_relocs);
- if (prop_table)
- free (prop_table);
- return FALSE;
-}
-
-
-/* Extended basic blocks. */
-
-/* An ebb_struct represents an Extended Basic Block. Within this
- range, we guarantee that all instructions are decodable, the
- property table entries are contiguous, and no property table
- specifies a segment that cannot have instructions moved. This
- structure contains caches of the contents, property table and
- relocations for the specified section for easy use. The range is
- specified by ranges of indices for the byte offset, property table
- offsets and relocation offsets. These must be consistent. */
-
-typedef struct ebb_struct ebb_t;
-
-struct ebb_struct
-{
- asection *sec;
-
- bfd_byte *contents; /* Cache of the section contents. */
- bfd_size_type content_length;
-
- property_table_entry *ptbl; /* Cache of the section property table. */
- unsigned pte_count;
-
- Elf_Internal_Rela *relocs; /* Cache of the section relocations. */
- unsigned reloc_count;
-
- bfd_vma start_offset; /* Offset in section. */
- unsigned start_ptbl_idx; /* Offset in the property table. */
- unsigned start_reloc_idx; /* Offset in the relocations. */
-
- bfd_vma end_offset;
- unsigned end_ptbl_idx;
- unsigned end_reloc_idx;
-
- bfd_boolean ends_section; /* Is this the last ebb in a section? */
-
- /* The unreachable property table at the end of this set of blocks;
- NULL if the end is not an unreachable block. */
- property_table_entry *ends_unreachable;
-};
-
-
-enum ebb_target_enum
-{
- EBB_NO_ALIGN = 0,
- EBB_DESIRE_TGT_ALIGN,
- EBB_REQUIRE_TGT_ALIGN,
- EBB_REQUIRE_LOOP_ALIGN,
- EBB_REQUIRE_ALIGN
-};
-
-
-/* proposed_action_struct is similar to the text_action_struct except
- that is represents a potential transformation, not one that will
- occur. We build a list of these for an extended basic block
- and use them to compute the actual actions desired. We must be
- careful that the entire set of actual actions we perform do not
- break any relocations that would fit if the actions were not
- performed. */
-
-typedef struct proposed_action_struct proposed_action;
-
-struct proposed_action_struct
-{
- enum ebb_target_enum align_type; /* for the target alignment */
- bfd_vma alignment_pow;
- text_action_t action;
- bfd_vma offset;
- int removed_bytes;
- bfd_boolean do_action; /* If false, then we will not perform the action. */
-};
-
-
-/* The ebb_constraint_struct keeps a set of proposed actions for an
- extended basic block. */
-
-typedef struct ebb_constraint_struct ebb_constraint;
-
-struct ebb_constraint_struct
-{
- ebb_t ebb;
- bfd_boolean start_movable;
-
- /* Bytes of extra space at the beginning if movable. */
- int start_extra_space;
-
- enum ebb_target_enum start_align;
-
- bfd_boolean end_movable;
-
- /* Bytes of extra space at the end if movable. */
- int end_extra_space;
-
- unsigned action_count;
- unsigned action_allocated;
-
- /* Array of proposed actions. */
- proposed_action *actions;
-
- /* Action alignments -- one for each proposed action. */
- enum ebb_target_enum *action_aligns;
-};
-
-
-static void
-init_ebb_constraint (ebb_constraint *c)
-{
- memset (c, 0, sizeof (ebb_constraint));
-}
-
-
-static void
-free_ebb_constraint (ebb_constraint *c)
-{
- if (c->actions)
- free (c->actions);
-}
-
-
-static void
-init_ebb (ebb_t *ebb,
- asection *sec,
- bfd_byte *contents,
- bfd_size_type content_length,
- property_table_entry *prop_table,
- unsigned ptblsize,
- Elf_Internal_Rela *internal_relocs,
- unsigned reloc_count)
-{
- memset (ebb, 0, sizeof (ebb_t));
- ebb->sec = sec;
- ebb->contents = contents;
- ebb->content_length = content_length;
- ebb->ptbl = prop_table;
- ebb->pte_count = ptblsize;
- ebb->relocs = internal_relocs;
- ebb->reloc_count = reloc_count;
- ebb->start_offset = 0;
- ebb->end_offset = ebb->content_length - 1;
- ebb->start_ptbl_idx = 0;
- ebb->end_ptbl_idx = ptblsize;
- ebb->start_reloc_idx = 0;
- ebb->end_reloc_idx = reloc_count;
-}
-
-
-/* Extend the ebb to all decodable contiguous sections. The algorithm
- for building a basic block around an instruction is to push it
- forward until we hit the end of a section, an unreachable block or
- a block that cannot be transformed. Then we push it backwards
- searching for similar conditions. */
-
-static bfd_boolean extend_ebb_bounds_forward (ebb_t *);
-static bfd_boolean extend_ebb_bounds_backward (ebb_t *);
-static bfd_size_type insn_block_decodable_len
- (bfd_byte *, bfd_size_type, bfd_vma, bfd_size_type);
-
-static bfd_boolean
-extend_ebb_bounds (ebb_t *ebb)
-{
- if (!extend_ebb_bounds_forward (ebb))
- return FALSE;
- if (!extend_ebb_bounds_backward (ebb))
- return FALSE;
- return TRUE;
-}
-
-
-static bfd_boolean
-extend_ebb_bounds_forward (ebb_t *ebb)
-{
- property_table_entry *the_entry, *new_entry;
-
- the_entry = &ebb->ptbl[ebb->end_ptbl_idx];
-
- /* Stop when (1) we cannot decode an instruction, (2) we are at
- the end of the property tables, (3) we hit a non-contiguous property
- table entry, (4) we hit a NO_TRANSFORM region. */
-
- while (1)
- {
- bfd_vma entry_end;
- bfd_size_type insn_block_len;
-
- entry_end = the_entry->address - ebb->sec->vma + the_entry->size;
- insn_block_len =
- insn_block_decodable_len (ebb->contents, ebb->content_length,
- ebb->end_offset,
- entry_end - ebb->end_offset);
- if (insn_block_len != (entry_end - ebb->end_offset))
- {
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx): could not decode instruction; possible configuration mismatch"),
- ebb->sec->owner, ebb->sec, ebb->end_offset + insn_block_len);
- return FALSE;
- }
- ebb->end_offset += insn_block_len;
-
- if (ebb->end_offset == ebb->sec->size)
- ebb->ends_section = TRUE;
-
- /* Update the reloc counter. */
- while (ebb->end_reloc_idx + 1 < ebb->reloc_count
- && (ebb->relocs[ebb->end_reloc_idx + 1].rz_offset
- < ebb->end_offset))
- {
- ebb->end_reloc_idx++;
- }
-
- if (ebb->end_ptbl_idx + 1 == ebb->pte_count)
- return TRUE;
-
- new_entry = &ebb->ptbl[ebb->end_ptbl_idx + 1];
- if (((new_entry->flags & XTENSA_PROP_INSN) == 0)
- || ((new_entry->flags & XTENSA_PROP_NO_TRANSFORM) != 0)
- || ((the_entry->flags & XTENSA_PROP_ALIGN) != 0))
- break;
-
- if (the_entry->address + the_entry->size != new_entry->address)
- break;
-
- the_entry = new_entry;
- ebb->end_ptbl_idx++;
- }
-
- /* Quick check for an unreachable or end of file just at the end. */
- if (ebb->end_ptbl_idx + 1 == ebb->pte_count)
- {
- if (ebb->end_offset == ebb->content_length)
- ebb->ends_section = TRUE;
- }
- else
- {
- new_entry = &ebb->ptbl[ebb->end_ptbl_idx + 1];
- if ((new_entry->flags & XTENSA_PROP_UNREACHABLE) != 0
- && the_entry->address + the_entry->size == new_entry->address)
- ebb->ends_unreachable = new_entry;
- }
-
- /* Any other ending requires exact alignment. */
- return TRUE;
-}
-
-
-static bfd_boolean
-extend_ebb_bounds_backward (ebb_t *ebb)
-{
- property_table_entry *the_entry, *new_entry;
-
- the_entry = &ebb->ptbl[ebb->start_ptbl_idx];
-
- /* Stop when (1) we cannot decode the instructions in the current entry.
- (2) we are at the beginning of the property tables, (3) we hit a
- non-contiguous property table entry, (4) we hit a NO_TRANSFORM region. */
-
- while (1)
- {
- bfd_vma block_begin;
- bfd_size_type insn_block_len;
-
- block_begin = the_entry->address - ebb->sec->vma;
- insn_block_len =
- insn_block_decodable_len (ebb->contents, ebb->content_length,
- block_begin,
- ebb->start_offset - block_begin);
- if (insn_block_len != ebb->start_offset - block_begin)
- {
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx): could not decode instruction; possible configuration mismatch"),
- ebb->sec->owner, ebb->sec, ebb->end_offset + insn_block_len);
- return FALSE;
- }
- ebb->start_offset -= insn_block_len;
-
- /* Update the reloc counter. */
- while (ebb->start_reloc_idx > 0
- && (ebb->relocs[ebb->start_reloc_idx - 1].rz_offset
- >= ebb->start_offset))
- {
- ebb->start_reloc_idx--;
- }
-
- if (ebb->start_ptbl_idx == 0)
- return TRUE;
-
- new_entry = &ebb->ptbl[ebb->start_ptbl_idx - 1];
- if ((new_entry->flags & XTENSA_PROP_INSN) == 0
- || ((new_entry->flags & XTENSA_PROP_NO_TRANSFORM) != 0)
- || ((new_entry->flags & XTENSA_PROP_ALIGN) != 0))
- return TRUE;
- if (new_entry->address + new_entry->size != the_entry->address)
- return TRUE;
-
- the_entry = new_entry;
- ebb->start_ptbl_idx--;
- }
- return TRUE;
-}
-
-
-static bfd_size_type
-insn_block_decodable_len (bfd_byte *contents,
- bfd_size_type content_len,
- bfd_vma block_offset,
- bfd_size_type block_len)
-{
- bfd_vma offset = block_offset;
-
- while (offset < block_offset + block_len)
- {
- bfd_size_type insn_len = 0;
-
- insn_len = insn_decode_len (contents, content_len, offset);
- if (insn_len == 0)
- return (offset - block_offset);
- offset += insn_len;
- }
- return (offset - block_offset);
-}
-
-
-static void
-ebb_propose_action (ebb_constraint *c,
- enum ebb_target_enum align_type,
- bfd_vma alignment_pow,
- text_action_t action,
- bfd_vma offset,
- int removed_bytes,
- bfd_boolean do_action)
-{
- proposed_action *act;
-
- if (c->action_allocated <= c->action_count)
- {
- unsigned new_allocated, i;
- proposed_action *new_actions;
-
- new_allocated = (c->action_count + 2) * 2;
- new_actions = (proposed_action *)
- bfd_zmalloc (sizeof (proposed_action) * new_allocated);
-
- for (i = 0; i < c->action_count; i++)
- new_actions[i] = c->actions[i];
- if (c->actions)
- free (c->actions);
- c->actions = new_actions;
- c->action_allocated = new_allocated;
- }
-
- act = &c->actions[c->action_count];
- act->align_type = align_type;
- act->alignment_pow = alignment_pow;
- act->action = action;
- act->offset = offset;
- act->removed_bytes = removed_bytes;
- act->do_action = do_action;
-
- c->action_count++;
-}
-
-
-/* Access to internal relocations, section contents and symbols. */
-
-/* During relaxation, we need to modify relocations, section contents,
- and symbol definitions, and we need to keep the original values from
- being reloaded from the input files, i.e., we need to "pin" the
- modified values in memory. We also want to continue to observe the
- setting of the "keep-memory" flag. The following functions wrap the
- standard BFD functions to take care of this for us. */
-
-static Elf_Internal_Rela *
-retrieve_internal_relocs (bfd *abfd, asection *sec, bfd_boolean keep_memory)
-{
- Elf_Internal_Rela *internal_relocs;
-
- if ((sec->flags & SEC_LINKER_CREATED) != 0)
- return NULL;
-
- internal_relocs = elf_section_data (sec)->relocs;
- if (internal_relocs == NULL)
- internal_relocs = (_bfd_elf_link_read_relocs
- (abfd, sec, NULL, NULL, keep_memory));
- return internal_relocs;
-}
-
-
-static void
-pin_internal_relocs (asection *sec, Elf_Internal_Rela *internal_relocs)
-{
- elf_section_data (sec)->relocs = internal_relocs;
-}
-
-
-static void
-release_internal_relocs (asection *sec, Elf_Internal_Rela *internal_relocs)
-{
- if (internal_relocs
- && elf_section_data (sec)->relocs != internal_relocs)
- free (internal_relocs);
-}
-
-
-static bfd_byte *
-retrieve_contents (bfd *abfd, asection *sec, bfd_boolean keep_memory)
-{
- bfd_byte *contents;
- bfd_size_type sec_size;
-
- sec_size = bfd_get_section_limit (abfd, sec);
- contents = elf_section_data (sec)->this_hdr.contents;
-
- if (contents == NULL && sec_size != 0)
- {
- if (!bfd_malloc_and_get_section (abfd, sec, &contents))
- {
- if (contents)
- free (contents);
- return NULL;
- }
- if (keep_memory)
- elf_section_data (sec)->this_hdr.contents = contents;
- }
- return contents;
-}
-
-
-static void
-pin_contents (asection *sec, bfd_byte *contents)
-{
- elf_section_data (sec)->this_hdr.contents = contents;
-}
-
-
-static void
-release_contents (asection *sec, bfd_byte *contents)
-{
- if (contents && elf_section_data (sec)->this_hdr.contents != contents)
- free (contents);
-}
-
-
-static Elf_Internal_Sym *
-retrieve_local_syms (bfd *input_bfd)
-{
- Elf_Internal_Shdr *symtab_hdr;
- Elf_Internal_Sym *isymbuf;
- size_t locsymcount;
-
- symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
- locsymcount = symtab_hdr->sh_info;
-
- isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
- if (isymbuf == NULL && locsymcount != 0)
- isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, locsymcount, 0,
- NULL, NULL, NULL);
-
- /* Save the symbols for this input file so they won't be read again. */
- if (isymbuf && isymbuf != (Elf_Internal_Sym *) symtab_hdr->contents)
- symtab_hdr->contents = (unsigned char *) isymbuf;
-
- return isymbuf;
-}
-
-
-/* Code for link-time relaxation. */
-
-/* Initialization for relaxation: */
-static bfd_boolean analyze_relocations (struct bfd_link_info *);
-static bfd_boolean find_relaxable_sections
- (bfd *, asection *, struct bfd_link_info *, bfd_boolean *);
-static bfd_boolean collect_source_relocs
- (bfd *, asection *, struct bfd_link_info *);
-static bfd_boolean is_resolvable_asm_expansion
- (bfd *, asection *, bfd_byte *, Elf_Internal_Rela *, struct bfd_link_info *,
- bfd_boolean *);
-static Elf_Internal_Rela *find_associated_l32r_irel
- (bfd *, asection *, bfd_byte *, Elf_Internal_Rela *, Elf_Internal_Rela *);
-static bfd_boolean compute_text_actions
- (bfd *, asection *, struct bfd_link_info *);
-static bfd_boolean compute_ebb_proposed_actions (ebb_constraint *);
-static bfd_boolean compute_ebb_actions (ebb_constraint *);
-typedef struct reloc_range_list_struct reloc_range_list;
-static bfd_boolean check_section_ebb_pcrels_fit
- (bfd *, asection *, bfd_byte *, Elf_Internal_Rela *,
- reloc_range_list *, const ebb_constraint *,
- const xtensa_opcode *);
-static bfd_boolean check_section_ebb_reduces (const ebb_constraint *);
-static void text_action_add_proposed
- (text_action_list *, const ebb_constraint *, asection *);
-static int compute_fill_extra_space (property_table_entry *);
-
-/* First pass: */
-static bfd_boolean compute_removed_literals
- (bfd *, asection *, struct bfd_link_info *, value_map_hash_table *);
-static Elf_Internal_Rela *get_irel_at_offset
- (asection *, Elf_Internal_Rela *, bfd_vma);
-static bfd_boolean is_removable_literal
- (const source_reloc *, int, const source_reloc *, int, asection *,
- property_table_entry *, int);
-static bfd_boolean remove_dead_literal
- (bfd *, asection *, struct bfd_link_info *, Elf_Internal_Rela *,
- Elf_Internal_Rela *, source_reloc *, property_table_entry *, int);
-static bfd_boolean identify_literal_placement
- (bfd *, asection *, bfd_byte *, struct bfd_link_info *,
- value_map_hash_table *, bfd_boolean *, Elf_Internal_Rela *, int,
- source_reloc *, property_table_entry *, int, section_cache_t *,
- bfd_boolean);
-static bfd_boolean relocations_reach (source_reloc *, int, const rz_reloc *);
-static bfd_boolean coalesce_shared_literal
- (asection *, source_reloc *, property_table_entry *, int, value_map *);
-static bfd_boolean move_shared_literal
- (asection *, struct bfd_link_info *, source_reloc *, property_table_entry *,
- int, const rz_reloc *, const literal_value *, section_cache_t *);
-
-/* Second pass: */
-static bfd_boolean relax_section (bfd *, asection *, struct bfd_link_info *);
-static bfd_boolean translate_section_fixes (asection *);
-static bfd_boolean translate_reloc_bfd_fix (reloc_bfd_fix *);
-static asection *translate_reloc (const rz_reloc *, rz_reloc *, asection *);
-static void shrink_dynamic_reloc_sections
- (struct bfd_link_info *, bfd *, asection *, Elf_Internal_Rela *);
-static bfd_boolean move_literal
- (bfd *, struct bfd_link_info *, asection *, bfd_vma, bfd_byte *,
- xtensa_relax_info *, Elf_Internal_Rela **, const literal_value *);
-static bfd_boolean relax_property_section
- (bfd *, asection *, struct bfd_link_info *);
-
-/* Third pass: */
-static bfd_boolean relax_section_symbols (bfd *, asection *);
-
-
-static bfd_boolean
-elf_xtensa_relax_section (bfd *abfd,
- asection *sec,
- struct bfd_link_info *link_info,
- bfd_boolean *again)
-{
- static value_map_hash_table *values = NULL;
- static bfd_boolean relocations_analyzed = FALSE;
- xtensa_relax_info *relax_info;
-
- if (!relocations_analyzed)
- {
- /* Do some overall initialization for relaxation. */
- values = value_map_hash_table_init ();
- if (values == NULL)
- return FALSE;
- relaxing_section = TRUE;
- if (!analyze_relocations (link_info))
- return FALSE;
- relocations_analyzed = TRUE;
- }
- *again = FALSE;
-
- /* Don't mess with linker-created sections. */
- if ((sec->flags & SEC_LINKER_CREATED) != 0)
- return TRUE;
-
- relax_info = get_xtensa_relax_info (sec);
- BFD_ASSERT (relax_info != NULL);
-
- switch (relax_info->visited)
- {
- case 0:
- /* Note: It would be nice to fold this pass into
- analyze_relocations, but it is important for this step that the
- sections be examined in link order. */
- if (!compute_removed_literals (abfd, sec, link_info, values))
- return FALSE;
- *again = TRUE;
- break;
-
- case 1:
- if (values)
- value_map_hash_table_delete (values);
- values = NULL;
- if (!relax_section (abfd, sec, link_info))
- return FALSE;
- *again = TRUE;
- break;
-
- case 2:
- if (!relax_section_symbols (abfd, sec))
- return FALSE;
- break;
- }
-
- relax_info->visited++;
- return TRUE;
-}
-
-
-/* Initialization for relaxation. */
-
-/* This function is called once at the start of relaxation. It scans
- all the input sections and marks the ones that are relaxable (i.e.,
- literal sections with L32R relocations against them), and then
- collects source_reloc information for all the relocations against
- those relaxable sections. During this process, it also detects
- longcalls, i.e., calls relaxed by the assembler into indirect
- calls, that can be optimized back into direct calls. Within each
- extended basic block (ebb) containing an optimized longcall, it
- computes a set of "text actions" that can be performed to remove
- the L32R associated with the longcall while optionally preserving
- branch target alignments. */
-
-static bfd_boolean
-analyze_relocations (struct bfd_link_info *link_info)
-{
- bfd *abfd;
- asection *sec;
- bfd_boolean is_relaxable = FALSE;
-
- /* Initialize the per-section relaxation info. */
- for (abfd = link_info->input_bfds; abfd != NULL; abfd = abfd->link.next)
- for (sec = abfd->sections; sec != NULL; sec = sec->next)
- {
- init_xtensa_relax_info (sec);
- }
-
- /* Mark relaxable sections (and count relocations against each one). */
- for (abfd = link_info->input_bfds; abfd != NULL; abfd = abfd->link.next)
- for (sec = abfd->sections; sec != NULL; sec = sec->next)
- {
- if (!find_relaxable_sections (abfd, sec, link_info, &is_relaxable))
- return FALSE;
- }
-
- /* Bail out if there are no relaxable sections. */
- if (!is_relaxable)
- return TRUE;
-
- /* Allocate space for source_relocs. */
- for (abfd = link_info->input_bfds; abfd != NULL; abfd = abfd->link.next)
- for (sec = abfd->sections; sec != NULL; sec = sec->next)
- {
- xtensa_relax_info *relax_info;
-
- relax_info = get_xtensa_relax_info (sec);
- if (relax_info->is_relaxable_literal_section
- || relax_info->is_relaxable_asm_section)
- {
- relax_info->src_relocs = (source_reloc *)
- bfd_malloc (relax_info->src_count * sizeof (source_reloc));
- }
- else
- relax_info->src_count = 0;
- }
-
- /* Collect info on relocations against each relaxable section. */
- for (abfd = link_info->input_bfds; abfd != NULL; abfd = abfd->link.next)
- for (sec = abfd->sections; sec != NULL; sec = sec->next)
- {
- if (!collect_source_relocs (abfd, sec, link_info))
- return FALSE;
- }
-
- /* Compute the text actions. */
- for (abfd = link_info->input_bfds; abfd != NULL; abfd = abfd->link.next)
- for (sec = abfd->sections; sec != NULL; sec = sec->next)
- {
- if (!compute_text_actions (abfd, sec, link_info))
- return FALSE;
- }
-
- return TRUE;
-}
-
-
-/* Find all the sections that might be relaxed. The motivation for
- this pass is that collect_source_relocs() needs to record _all_ the
- relocations that target each relaxable section. That is expensive
- and unnecessary unless the target section is actually going to be
- relaxed. This pass identifies all such sections by checking if
- they have L32Rs pointing to them. In the process, the total number
- of relocations targeting each section is also counted so that we
- know how much space to allocate for source_relocs against each
- relaxable literal section. */
-
-static bfd_boolean
-find_relaxable_sections (bfd *abfd,
- asection *sec,
- struct bfd_link_info *link_info,
- bfd_boolean *is_relaxable_p)
-{
- Elf_Internal_Rela *internal_relocs;
- bfd_byte *contents;
- bfd_boolean ok = TRUE;
- unsigned i;
- xtensa_relax_info *source_relax_info;
- bfd_boolean is_l32r_reloc;
-
- internal_relocs = retrieve_internal_relocs (abfd, sec,
- link_info->keep_memory);
- if (internal_relocs == NULL)
- return ok;
-
- contents = retrieve_contents (abfd, sec, link_info->keep_memory);
- if (contents == NULL && sec->size != 0)
- {
- ok = FALSE;
- goto error_return;
- }
-
- source_relax_info = get_xtensa_relax_info (sec);
- for (i = 0; i < sec->reloc_count; i++)
- {
- Elf_Internal_Rela *irel = &internal_relocs[i];
- rz_reloc rz_rel;
- asection *target_sec;
- xtensa_relax_info *target_relax_info;
-
- /* If this section has not already been marked as "relaxable", and
- if it contains any ASM_EXPAND relocations (marking expanded
- longcalls) that can be optimized into direct calls, then mark
- the section as "relaxable". */
- if (source_relax_info
- && !source_relax_info->is_relaxable_asm_section
- && ELF32_R_TYPE (irel->rz_info) == RZ_XTENSA_ASM_EXPAND)
- {
- bfd_boolean is_reachable = FALSE;
- if (is_resolvable_asm_expansion (abfd, sec, contents, irel,
- link_info, &is_reachable)
- && is_reachable)
- {
- source_relax_info->is_relaxable_asm_section = TRUE;
- *is_relaxable_p = TRUE;
- }
- }
-
- rz_reloc_init (&rz_rel, abfd, irel, contents,
- bfd_get_section_limit (abfd, sec));
-
- target_sec = rz_reloc_get_section (&rz_rel);
- target_relax_info = get_xtensa_relax_info (target_sec);
- if (!target_relax_info)
- continue;
-
- /* Count PC-relative operand relocations against the target section.
- Note: The conditions tested here must match the conditions under
- which init_source_reloc is called in collect_source_relocs(). */
- is_l32r_reloc = FALSE;
- if (is_operand_relocation (ELF32_R_TYPE (irel->rz_info)))
- {
- xtensa_opcode opcode =
- get_relocation_opcode (abfd, sec, contents, irel);
- if (opcode != XTENSA_UNDEFINED)
- {
- is_l32r_reloc = (opcode == get_l32r_opcode ());
- if (!is_alt_relocation (ELF32_R_TYPE (irel->rz_info))
- || is_l32r_reloc)
- target_relax_info->src_count++;
- }
- }
-
- if (is_l32r_reloc && rz_reloc_is_defined (&rz_rel))
- {
- /* Mark the target section as relaxable. */
- target_relax_info->is_relaxable_literal_section = TRUE;
- *is_relaxable_p = TRUE;
- }
- }
-
- error_return:
- release_contents (sec, contents);
- release_internal_relocs (sec, internal_relocs);
- return ok;
-}
-
-
-/* Record _all_ the relocations that point to relaxable sections, and
- get rid of ASM_EXPAND relocs by either converting them to
- ASM_SIMPLIFY or by removing them. */
-
-static bfd_boolean
-collect_source_relocs (bfd *abfd,
- asection *sec,
- struct bfd_link_info *link_info)
-{
- Elf_Internal_Rela *internal_relocs;
- bfd_byte *contents;
- bfd_boolean ok = TRUE;
- unsigned i;
- bfd_size_type sec_size;
-
- internal_relocs = retrieve_internal_relocs (abfd, sec,
- link_info->keep_memory);
- if (internal_relocs == NULL)
- return ok;
-
- sec_size = bfd_get_section_limit (abfd, sec);
- contents = retrieve_contents (abfd, sec, link_info->keep_memory);
- if (contents == NULL && sec_size != 0)
- {
- ok = FALSE;
- goto error_return;
- }
-
- /* Record relocations against relaxable literal sections. */
- for (i = 0; i < sec->reloc_count; i++)
- {
- Elf_Internal_Rela *irel = &internal_relocs[i];
- rz_reloc rz_rel;
- asection *target_sec;
- xtensa_relax_info *target_relax_info;
-
- rz_reloc_init (&rz_rel, abfd, irel, contents, sec_size);
-
- target_sec = rz_reloc_get_section (&rz_rel);
- target_relax_info = get_xtensa_relax_info (target_sec);
-
- if (target_relax_info
- && (target_relax_info->is_relaxable_literal_section
- || target_relax_info->is_relaxable_asm_section))
- {
- xtensa_opcode opcode = XTENSA_UNDEFINED;
- int opnd = -1;
- bfd_boolean is_abs_literal = FALSE;
-
- if (is_alt_relocation (ELF32_R_TYPE (irel->rz_info)))
- {
- /* None of the current alternate relocs are PC-relative,
- and only PC-relative relocs matter here. However, we
- still need to record the opcode for literal
- coalescing. */
- opcode = get_relocation_opcode (abfd, sec, contents, irel);
- if (opcode == get_l32r_opcode ())
- {
- is_abs_literal = TRUE;
- opnd = 1;
- }
- else
- opcode = XTENSA_UNDEFINED;
- }
- else if (is_operand_relocation (ELF32_R_TYPE (irel->rz_info)))
- {
- opcode = get_relocation_opcode (abfd, sec, contents, irel);
- opnd = get_relocation_opnd (opcode, ELF32_R_TYPE (irel->rz_info));
- }
-
- if (opcode != XTENSA_UNDEFINED)
- {
- int src_next = target_relax_info->src_next++;
- source_reloc *s_reloc = &target_relax_info->src_relocs[src_next];
-
- init_source_reloc (s_reloc, sec, &rz_rel, opcode, opnd,
- is_abs_literal);
- }
- }
- }
-
- /* Now get rid of ASM_EXPAND relocations. At this point, the
- src_relocs array for the target literal section may still be
- incomplete, but it must at least contain the entries for the L32R
- relocations associated with ASM_EXPANDs because they were just
- added in the preceding loop over the relocations. */
-
- for (i = 0; i < sec->reloc_count; i++)
- {
- Elf_Internal_Rela *irel = &internal_relocs[i];
- bfd_boolean is_reachable;
-
- if (!is_resolvable_asm_expansion (abfd, sec, contents, irel, link_info,
- &is_reachable))
- continue;
-
- if (is_reachable)
- {
- Elf_Internal_Rela *l32r_irel;
- rz_reloc rz_rel;
- asection *target_sec;
- xtensa_relax_info *target_relax_info;
-
- /* Mark the source_reloc for the L32R so that it will be
- removed in compute_removed_literals(), along with the
- associated literal. */
- l32r_irel = find_associated_l32r_irel (abfd, sec, contents,
- irel, internal_relocs);
- if (l32r_irel == NULL)
- continue;
-
- rz_reloc_init (&rz_rel, abfd, l32r_irel, contents, sec_size);
-
- target_sec = rz_reloc_get_section (&rz_rel);
- target_relax_info = get_xtensa_relax_info (target_sec);
-
- if (target_relax_info
- && (target_relax_info->is_relaxable_literal_section
- || target_relax_info->is_relaxable_asm_section))
- {
- source_reloc *s_reloc;
-
- /* Search the source_relocs for the entry corresponding to
- the l32r_irel. Note: The src_relocs array is not yet
- sorted, but it wouldn't matter anyway because we're
- searching by source offset instead of target offset. */
- s_reloc = find_source_reloc (target_relax_info->src_relocs,
- target_relax_info->src_next,
- sec, l32r_irel);
- BFD_ASSERT (s_reloc);
- s_reloc->is_null = TRUE;
- }
-
- /* Convert this reloc to ASM_SIMPLIFY. */
- irel->rz_info = ELF32_R_INFO (ELF32_R_SYM (irel->rz_info),
- RZ_XTENSA_ASM_SIMPLIFY);
- l32r_irel->rz_info = ELF32_R_INFO (0, RZ_XTENSA_NONE);
-
- pin_internal_relocs (sec, internal_relocs);
- }
- else
- {
- /* It is resolvable but doesn't reach. We resolve now
- by eliminating the relocation -- the call will remain
- expanded into L32R/CALLX. */
- irel->rz_info = ELF32_R_INFO (0, RZ_XTENSA_NONE);
- pin_internal_relocs (sec, internal_relocs);
- }
- }
-
- error_return:
- release_contents (sec, contents);
- release_internal_relocs (sec, internal_relocs);
- return ok;
-}
-
-
-/* Return TRUE if the asm expansion can be resolved. Generally it can
- be resolved on a final link or when a partial link locates it in the
- same section as the target. Set "is_reachable" flag if the target of
- the call is within the range of a direct call, given the current VMA
- for this section and the target section. */
-
-bfd_boolean
-is_resolvable_asm_expansion (bfd *abfd,
- asection *sec,
- bfd_byte *contents,
- Elf_Internal_Rela *irel,
- struct bfd_link_info *link_info,
- bfd_boolean *is_reachable_p)
-{
- asection *target_sec;
- bfd_vma target_offset;
- rz_reloc rz_rel;
- xtensa_opcode opcode, direct_call_opcode;
- bfd_vma self_address;
- bfd_vma dest_address;
- bfd_boolean uses_l32r;
- bfd_size_type sec_size;
-
- *is_reachable_p = FALSE;
-
- if (contents == NULL)
- return FALSE;
-
- if (ELF32_R_TYPE (irel->rz_info) != RZ_XTENSA_ASM_EXPAND)
- return FALSE;
-
- sec_size = bfd_get_section_limit (abfd, sec);
- opcode = get_expanded_call_opcode (contents + irel->rz_offset,
- sec_size - irel->rz_offset, &uses_l32r);
- /* Optimization of longcalls that use CONST16 is not yet implemented. */
- if (!uses_l32r)
- return FALSE;
-
- direct_call_opcode = swap_callx_for_call_opcode (opcode);
- if (direct_call_opcode == XTENSA_UNDEFINED)
- return FALSE;
-
- /* Check and see that the target resolves. */
- rz_reloc_init (&rz_rel, abfd, irel, contents, sec_size);
- if (!rz_reloc_is_defined (&rz_rel))
- return FALSE;
-
- target_sec = rz_reloc_get_section (&rz_rel);
- target_offset = rz_rel.target_offset;
-
- /* If the target is in a shared library, then it doesn't reach. This
- isn't supposed to come up because the compiler should never generate
- non-PIC calls on systems that use shared libraries, but the linker
- shouldn't crash regardless. */
- if (!target_sec->output_section)
- return FALSE;
-
- /* For relocatable sections, we can only simplify when the output
- section of the target is the same as the output section of the
- source. */
- if (link_info->relocatable
- && (target_sec->output_section != sec->output_section
- || is_reloc_sym_weak (abfd, irel)))
- return FALSE;
-
- if (target_sec->output_section != sec->output_section)
- {
- /* If the two sections are sufficiently far away that relaxation
- might take the call out of range, we can't simplify. For
- example, a positive displacement call into another memory
- could get moved to a lower address due to literal removal,
- but the destination won't move, and so the displacment might
- get larger.
-
- If the displacement is negative, assume the destination could
- move as far back as the start of the output section. The
- self_address will be at least as far into the output section
- as it is prior to relaxation.
-
- If the displacement is postive, assume the destination will be in
- it's pre-relaxed location (because relaxation only makes sections
- smaller). The self_address could go all the way to the beginning
- of the output section. */
-
- dest_address = target_sec->output_section->vma;
- self_address = sec->output_section->vma;
-
- if (sec->output_section->vma > target_sec->output_section->vma)
- self_address += sec->output_offset + irel->rz_offset + 3;
- else
- dest_address += bfd_get_section_limit (abfd, target_sec->output_section);
- /* Call targets should be four-byte aligned. */
- dest_address = (dest_address + 3) & ~3;
- }
- else
- {
-
- self_address = (sec->output_section->vma
- + sec->output_offset + irel->rz_offset + 3);
- dest_address = (target_sec->output_section->vma
- + target_sec->output_offset + target_offset);
- }
-
- *is_reachable_p = pcrel_reloc_fits (direct_call_opcode, 0,
- self_address, dest_address);
-
- if ((self_address >> CALL_SEGMENT_BITS) !=
- (dest_address >> CALL_SEGMENT_BITS))
- return FALSE;
-
- return TRUE;
-}
-
-
-static Elf_Internal_Rela *
-find_associated_l32r_irel (bfd *abfd,
- asection *sec,
- bfd_byte *contents,
- Elf_Internal_Rela *other_irel,
- Elf_Internal_Rela *internal_relocs)
-{
- unsigned i;
-
- for (i = 0; i < sec->reloc_count; i++)
- {
- Elf_Internal_Rela *irel = &internal_relocs[i];
-
- if (irel == other_irel)
- continue;
- if (irel->rz_offset != other_irel->rz_offset)
- continue;
- if (is_l32r_relocation (abfd, sec, contents, irel))
- return irel;
- }
-
- return NULL;
-}
-
-
-static xtensa_opcode *
-build_reloc_opcodes (bfd *abfd,
- asection *sec,
- bfd_byte *contents,
- Elf_Internal_Rela *internal_relocs)
-{
- unsigned i;
- xtensa_opcode *reloc_opcodes =
- (xtensa_opcode *) bfd_malloc (sizeof (xtensa_opcode) * sec->reloc_count);
- for (i = 0; i < sec->reloc_count; i++)
- {
- Elf_Internal_Rela *irel = &internal_relocs[i];
- reloc_opcodes[i] = get_relocation_opcode (abfd, sec, contents, irel);
- }
- return reloc_opcodes;
-}
-
-struct reloc_range_struct
-{
- bfd_vma addr;
- bfd_boolean add; /* TRUE if start of a range, FALSE otherwise. */
- /* Original irel index in the array of relocations for a section. */
- unsigned irel_index;
-};
-typedef struct reloc_range_struct reloc_range;
-
-typedef struct reloc_range_list_entry_struct reloc_range_list_entry;
-struct reloc_range_list_entry_struct
-{
- reloc_range_list_entry *next;
- reloc_range_list_entry *prev;
- Elf_Internal_Rela *irel;
- xtensa_opcode opcode;
- int opnum;
-};
-
-struct reloc_range_list_struct
-{
- /* The rest of the structure is only meaningful when ok is TRUE. */
- bfd_boolean ok;
-
- unsigned n_range; /* Number of range markers. */
- reloc_range *range; /* Sorted range markers. */
-
- unsigned first; /* Index of a first range element in the list. */
- unsigned last; /* One past index of a last range element in the list. */
-
- unsigned n_list; /* Number of list elements. */
- reloc_range_list_entry *reloc; /* */
- reloc_range_list_entry list_root;
-};
-
-static int
-reloc_range_compare (const void *a, const void *b)
-{
- const reloc_range *ra = a;
- const reloc_range *rb = b;
-
- if (ra->addr != rb->addr)
- return ra->addr < rb->addr ? -1 : 1;
- if (ra->add != rb->add)
- return ra->add ? -1 : 1;
- return 0;
-}
-
-static void
-build_reloc_ranges (bfd *abfd, asection *sec,
- bfd_byte *contents,
- Elf_Internal_Rela *internal_relocs,
- xtensa_opcode *reloc_opcodes,
- reloc_range_list *list)
-{
- unsigned i;
- size_t n = 0;
- size_t max_n = 0;
- reloc_range *ranges = NULL;
- reloc_range_list_entry *reloc =
- bfd_malloc (sec->reloc_count * sizeof (*reloc));
-
- memset (list, 0, sizeof (*list));
- list->ok = TRUE;
-
- for (i = 0; i < sec->reloc_count; i++)
- {
- Elf_Internal_Rela *irel = &internal_relocs[i];
- int rz_type = ELF32_R_TYPE (irel->rz_info);
- reloc_howto_type *howto = &elf_howto_table[rz_type];
- rz_reloc rz_rel;
-
- if (rz_type == RZ_XTENSA_ASM_SIMPLIFY
- || rz_type == RZ_XTENSA_32_PCREL
- || !howto->pc_relative)
- continue;
-
- rz_reloc_init (&rz_rel, abfd, irel, contents,
- bfd_get_section_limit (abfd, sec));
-
- if (rz_reloc_get_section (&rz_rel) != sec)
- continue;
-
- if (n + 2 > max_n)
- {
- max_n = (max_n + 2) * 2;
- ranges = bfd_realloc (ranges, max_n * sizeof (*ranges));
- }
-
- ranges[n].addr = irel->rz_offset;
- ranges[n + 1].addr = rz_rel.target_offset;
-
- ranges[n].add = ranges[n].addr < ranges[n + 1].addr;
- ranges[n + 1].add = !ranges[n].add;
-
- ranges[n].irel_index = i;
- ranges[n + 1].irel_index = i;
-
- n += 2;
-
- reloc[i].irel = irel;
-
- /* Every relocation won't possibly be checked in the optimized version of
- check_section_ebb_pcrels_fit, so this needs to be done here. */
- if (is_alt_relocation (ELF32_R_TYPE (irel->rz_info)))
- {
- /* None of the current alternate relocs are PC-relative,
- and only PC-relative relocs matter here. */
- }
- else
- {
- xtensa_opcode opcode;
- int opnum;
-
- if (reloc_opcodes)
- opcode = reloc_opcodes[i];
- else
- opcode = get_relocation_opcode (abfd, sec, contents, irel);
-
- if (opcode == XTENSA_UNDEFINED)
- {
- list->ok = FALSE;
- break;
- }
-
- opnum = get_relocation_opnd (opcode, ELF32_R_TYPE (irel->rz_info));
- if (opnum == XTENSA_UNDEFINED)
- {
- list->ok = FALSE;
- break;
- }
-
- /* Record relocation opcode and opnum as we've calculated them
- anyway and they won't change. */
- reloc[i].opcode = opcode;
- reloc[i].opnum = opnum;
- }
- }
-
- if (list->ok)
- {
- ranges = bfd_realloc (ranges, n * sizeof (*ranges));
- qsort (ranges, n, sizeof (*ranges), reloc_range_compare);
-
- list->n_range = n;
- list->range = ranges;
- list->reloc = reloc;
- list->list_root.prev = &list->list_root;
- list->list_root.next = &list->list_root;
- }
- else
- {
- free (ranges);
- free (reloc);
- }
-}
-
-static void reloc_range_list_append (reloc_range_list *list,
- unsigned irel_index)
-{
- reloc_range_list_entry *entry = list->reloc + irel_index;
-
- entry->prev = list->list_root.prev;
- entry->next = &list->list_root;
- entry->prev->next = entry;
- entry->next->prev = entry;
- ++list->n_list;
-}
-
-static void reloc_range_list_remove (reloc_range_list *list,
- unsigned irel_index)
-{
- reloc_range_list_entry *entry = list->reloc + irel_index;
-
- entry->next->prev = entry->prev;
- entry->prev->next = entry->next;
- --list->n_list;
-}
-
-/* Update relocation list object so that it lists all relocations that cross
- [first; last] range. Range bounds should not decrease with successive
- invocations. */
-static void reloc_range_list_update_range (reloc_range_list *list,
- bfd_vma first, bfd_vma last)
-{
- /* This should not happen: EBBs are iterated from lower addresses to higher.
- But even if that happens there's no need to break: just flush current list
- and start from scratch. */
- if ((list->last > 0 && list->range[list->last - 1].addr > last) ||
- (list->first > 0 && list->range[list->first - 1].addr >= first))
- {
- list->first = 0;
- list->last = 0;
- list->n_list = 0;
- list->list_root.next = &list->list_root;
- list->list_root.prev = &list->list_root;
- fprintf (stderr, "%s: move backwards requested\n", __func__);
- }
-
- for (; list->last < list->n_range &&
- list->range[list->last].addr <= last; ++list->last)
- if (list->range[list->last].add)
- reloc_range_list_append (list, list->range[list->last].irel_index);
-
- for (; list->first < list->n_range &&
- list->range[list->first].addr < first; ++list->first)
- if (!list->range[list->first].add)
- reloc_range_list_remove (list, list->range[list->first].irel_index);
-}
-
-static void free_reloc_range_list (reloc_range_list *list)
-{
- free (list->range);
- free (list->reloc);
-}
-
-/* The compute_text_actions function will build a list of potential
- transformation actions for code in the extended basic block of each
- longcall that is optimized to a direct call. From this list we
- generate a set of actions to actually perform that optimizes for
- space and, if not using size_opt, maintains branch target
- alignments.
-
- These actions to be performed are placed on a per-section list.
- The actual changes are performed by relax_section() in the second
- pass. */
-
-bfd_boolean
-compute_text_actions (bfd *abfd,
- asection *sec,
- struct bfd_link_info *link_info)
-{
- xtensa_opcode *reloc_opcodes = NULL;
- xtensa_relax_info *relax_info;
- bfd_byte *contents;
- Elf_Internal_Rela *internal_relocs;
- bfd_boolean ok = TRUE;
- unsigned i;
- property_table_entry *prop_table = 0;
- int ptblsize = 0;
- bfd_size_type sec_size;
- reloc_range_list relevant_relocs;
-
- relax_info = get_xtensa_relax_info (sec);
- BFD_ASSERT (relax_info);
- BFD_ASSERT (relax_info->src_next == relax_info->src_count);
-
- /* Do nothing if the section contains no optimized longcalls. */
- if (!relax_info->is_relaxable_asm_section)
- return ok;
-
- internal_relocs = retrieve_internal_relocs (abfd, sec,
- link_info->keep_memory);
-
- if (internal_relocs)
- qsort (internal_relocs, sec->reloc_count, sizeof (Elf_Internal_Rela),
- internal_reloc_compare);
-
- sec_size = bfd_get_section_limit (abfd, sec);
- contents = retrieve_contents (abfd, sec, link_info->keep_memory);
- if (contents == NULL && sec_size != 0)
- {
- ok = FALSE;
- goto error_return;
- }
-
- ptblsize = xtensa_read_table_entries (abfd, sec, &prop_table,
- XTENSA_PROP_SEC_NAME, FALSE);
- if (ptblsize < 0)
- {
- ok = FALSE;
- goto error_return;
- }
-
- /* Precompute the opcode for each relocation. */
- reloc_opcodes = build_reloc_opcodes (abfd, sec, contents, internal_relocs);
-
- build_reloc_ranges (abfd, sec, contents, internal_relocs, reloc_opcodes,
- &relevant_relocs);
-
- for (i = 0; i < sec->reloc_count; i++)
- {
- Elf_Internal_Rela *irel = &internal_relocs[i];
- bfd_vma rz_offset;
- property_table_entry *the_entry;
- int ptbl_idx;
- ebb_t *ebb;
- ebb_constraint ebb_table;
- bfd_size_type simplify_size;
-
- if (irel && ELF32_R_TYPE (irel->rz_info) != RZ_XTENSA_ASM_SIMPLIFY)
- continue;
- rz_offset = irel->rz_offset;
-
- simplify_size = get_asm_simplify_size (contents, sec_size, rz_offset);
- if (simplify_size == 0)
- {
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx): could not decode instruction for XTENSA_ASM_SIMPLIFY relocation; possible configuration mismatch"),
- sec->owner, sec, rz_offset);
- continue;
- }
-
- /* If the instruction table is not around, then don't do this
- relaxation. */
- the_entry = elf_xtensa_find_property_entry (prop_table, ptblsize,
- sec->vma + irel->rz_offset);
- if (the_entry == NULL || XTENSA_NO_NOP_REMOVAL)
- {
- text_action_add (&relax_info->action_list,
- ta_convert_longcall, sec, rz_offset,
- 0);
- continue;
- }
-
- /* If the next longcall happens to be at the same address as an
- unreachable section of size 0, then skip forward. */
- ptbl_idx = the_entry - prop_table;
- while ((the_entry->flags & XTENSA_PROP_UNREACHABLE)
- && the_entry->size == 0
- && ptbl_idx + 1 < ptblsize
- && (prop_table[ptbl_idx + 1].address
- == prop_table[ptbl_idx].address))
- {
- ptbl_idx++;
- the_entry++;
- }
-
- if (the_entry->flags & XTENSA_PROP_NO_TRANSFORM)
- /* NO_REORDER is OK */
- continue;
-
- init_ebb_constraint (&ebb_table);
- ebb = &ebb_table.ebb;
- init_ebb (ebb, sec, contents, sec_size, prop_table, ptblsize,
- internal_relocs, sec->reloc_count);
- ebb->start_offset = rz_offset + simplify_size;
- ebb->end_offset = rz_offset + simplify_size;
- ebb->start_ptbl_idx = ptbl_idx;
- ebb->end_ptbl_idx = ptbl_idx;
- ebb->start_reloc_idx = i;
- ebb->end_reloc_idx = i;
-
- if (!extend_ebb_bounds (ebb)
- || !compute_ebb_proposed_actions (&ebb_table)
- || !compute_ebb_actions (&ebb_table)
- || !check_section_ebb_pcrels_fit (abfd, sec, contents,
- internal_relocs,
- &relevant_relocs,
- &ebb_table, reloc_opcodes)
- || !check_section_ebb_reduces (&ebb_table))
- {
- /* If anything goes wrong or we get unlucky and something does
- not fit, with our plan because of expansion between
- critical branches, just convert to a NOP. */
-
- text_action_add (&relax_info->action_list,
- ta_convert_longcall, sec, rz_offset, 0);
- i = ebb_table.ebb.end_reloc_idx;
- free_ebb_constraint (&ebb_table);
- continue;
- }
-
- text_action_add_proposed (&relax_info->action_list, &ebb_table, sec);
-
- /* Update the index so we do not go looking at the relocations
- we have already processed. */
- i = ebb_table.ebb.end_reloc_idx;
- free_ebb_constraint (&ebb_table);
- }
-
- free_reloc_range_list (&relevant_relocs);
-
-#if DEBUG
- if (action_list_count (&relax_info->action_list))
- print_action_list (stderr, &relax_info->action_list);
-#endif
-
-error_return:
- release_contents (sec, contents);
- release_internal_relocs (sec, internal_relocs);
- if (prop_table)
- free (prop_table);
- if (reloc_opcodes)
- free (reloc_opcodes);
-
- return ok;
-}
-
-
-/* Do not widen an instruction if it is preceeded by a
- loop opcode. It might cause misalignment. */
-
-static bfd_boolean
-prev_instr_is_a_loop (bfd_byte *contents,
- bfd_size_type content_length,
- bfd_size_type offset)
-{
- xtensa_opcode prev_opcode;
-
- if (offset < 3)
- return FALSE;
- prev_opcode = insn_decode_opcode (contents, content_length, offset-3, 0);
- return (xtensa_opcode_is_loop (xtensa_default_isa, prev_opcode) == 1);
-}
-
-
-/* Find all of the possible actions for an extended basic block. */
-
-bfd_boolean
-compute_ebb_proposed_actions (ebb_constraint *ebb_table)
-{
- const ebb_t *ebb = &ebb_table->ebb;
- unsigned rel_idx = ebb->start_reloc_idx;
- property_table_entry *entry, *start_entry, *end_entry;
- bfd_vma offset = 0;
- xtensa_isa isa = xtensa_default_isa;
- xtensa_format fmt;
- static xtensa_insnbuf insnbuf = NULL;
- static xtensa_insnbuf slotbuf = NULL;
-
- if (insnbuf == NULL)
- {
- insnbuf = xtensa_insnbuf_alloc (isa);
- slotbuf = xtensa_insnbuf_alloc (isa);
- }
-
- start_entry = &ebb->ptbl[ebb->start_ptbl_idx];
- end_entry = &ebb->ptbl[ebb->end_ptbl_idx];
-
- for (entry = start_entry; entry <= end_entry; entry++)
- {
- bfd_vma start_offset, end_offset;
- bfd_size_type insn_len;
-
- start_offset = entry->address - ebb->sec->vma;
- end_offset = entry->address + entry->size - ebb->sec->vma;
-
- if (entry == start_entry)
- start_offset = ebb->start_offset;
- if (entry == end_entry)
- end_offset = ebb->end_offset;
- offset = start_offset;
-
- if (offset == entry->address - ebb->sec->vma
- && (entry->flags & XTENSA_PROP_INSN_BRANCH_TARGET) != 0)
- {
- enum ebb_target_enum align_type = EBB_DESIRE_TGT_ALIGN;
- BFD_ASSERT (offset != end_offset);
- if (offset == end_offset)
- return FALSE;
-
- insn_len = insn_decode_len (ebb->contents, ebb->content_length,
- offset);
- if (insn_len == 0)
- goto decode_error;
-
- if (check_branch_target_aligned_address (offset, insn_len))
- align_type = EBB_REQUIRE_TGT_ALIGN;
-
- ebb_propose_action (ebb_table, align_type, 0,
- ta_none, offset, 0, TRUE);
- }
-
- while (offset != end_offset)
- {
- Elf_Internal_Rela *irel;
- xtensa_opcode opcode;
-
- while (rel_idx < ebb->end_reloc_idx
- && (ebb->relocs[rel_idx].rz_offset < offset
- || (ebb->relocs[rel_idx].rz_offset == offset
- && (ELF32_R_TYPE (ebb->relocs[rel_idx].rz_info)
- != RZ_XTENSA_ASM_SIMPLIFY))))
- rel_idx++;
-
- /* Check for longcall. */
- irel = &ebb->relocs[rel_idx];
- if (irel->rz_offset == offset
- && ELF32_R_TYPE (irel->rz_info) == RZ_XTENSA_ASM_SIMPLIFY)
- {
- bfd_size_type simplify_size;
-
- simplify_size = get_asm_simplify_size (ebb->contents,
- ebb->content_length,
- irel->rz_offset);
- if (simplify_size == 0)
- goto decode_error;
-
- ebb_propose_action (ebb_table, EBB_NO_ALIGN, 0,
- ta_convert_longcall, offset, 0, TRUE);
-
- offset += simplify_size;
- continue;
- }
-
- if (offset + MIN_INSN_LENGTH > ebb->content_length)
- goto decode_error;
- xtensa_insnbuf_from_chars (isa, insnbuf, &ebb->contents[offset],
- ebb->content_length - offset);
- fmt = xtensa_format_decode (isa, insnbuf);
- if (fmt == XTENSA_UNDEFINED)
- goto decode_error;
- insn_len = xtensa_format_length (isa, fmt);
- if (insn_len == (bfd_size_type) XTENSA_UNDEFINED)
- goto decode_error;
-
- if (xtensa_format_num_slots (isa, fmt) != 1)
- {
- offset += insn_len;
- continue;
- }
-
- xtensa_format_get_slot (isa, fmt, 0, insnbuf, slotbuf);
- opcode = xtensa_opcode_decode (isa, fmt, 0, slotbuf);
- if (opcode == XTENSA_UNDEFINED)
- goto decode_error;
-
- if ((entry->flags & XTENSA_PROP_INSN_NO_DENSITY) == 0
- && (entry->flags & XTENSA_PROP_NO_TRANSFORM) == 0
- && can_narrow_instruction (slotbuf, fmt, opcode) != 0)
- {
- /* Add an instruction narrow action. */
- ebb_propose_action (ebb_table, EBB_NO_ALIGN, 0,
- ta_narrow_insn, offset, 0, FALSE);
- }
- else if ((entry->flags & XTENSA_PROP_NO_TRANSFORM) == 0
- && can_widen_instruction (slotbuf, fmt, opcode) != 0
- && ! prev_instr_is_a_loop (ebb->contents,
- ebb->content_length, offset))
- {
- /* Add an instruction widen action. */
- ebb_propose_action (ebb_table, EBB_NO_ALIGN, 0,
- ta_widen_insn, offset, 0, FALSE);
- }
- else if (xtensa_opcode_is_loop (xtensa_default_isa, opcode) == 1)
- {
- /* Check for branch targets. */
- ebb_propose_action (ebb_table, EBB_REQUIRE_LOOP_ALIGN, 0,
- ta_none, offset, 0, TRUE);
- }
-
- offset += insn_len;
- }
- }
-
- if (ebb->ends_unreachable)
- {
- ebb_propose_action (ebb_table, EBB_NO_ALIGN, 0,
- ta_fill, ebb->end_offset, 0, TRUE);
- }
-
- return TRUE;
-
- decode_error:
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx): could not decode instruction; possible configuration mismatch"),
- ebb->sec->owner, ebb->sec, offset);
- return FALSE;
-}
-
-
-/* After all of the information has collected about the
- transformations possible in an EBB, compute the appropriate actions
- here in compute_ebb_actions. We still must check later to make
- sure that the actions do not break any relocations. The algorithm
- used here is pretty greedy. Basically, it removes as many no-ops
- as possible so that the end of the EBB has the same alignment
- characteristics as the original. First, it uses narrowing, then
- fill space at the end of the EBB, and finally widenings. If that
- does not work, it tries again with one fewer no-op removed. The
- optimization will only be performed if all of the branch targets
- that were aligned before transformation are also aligned after the
- transformation.
-
- When the size_opt flag is set, ignore the branch target alignments,
- narrow all wide instructions, and remove all no-ops unless the end
- of the EBB prevents it. */
-
-bfd_boolean
-compute_ebb_actions (ebb_constraint *ebb_table)
-{
- unsigned i = 0;
- unsigned j;
- int removed_bytes = 0;
- ebb_t *ebb = &ebb_table->ebb;
- unsigned seg_idx_start = 0;
- unsigned seg_idx_end = 0;
-
- /* We perform this like the assembler relaxation algorithm: Start by
- assuming all instructions are narrow and all no-ops removed; then
- walk through.... */
-
- /* For each segment of this that has a solid constraint, check to
- see if there are any combinations that will keep the constraint.
- If so, use it. */
- for (seg_idx_end = 0; seg_idx_end < ebb_table->action_count; seg_idx_end++)
- {
- bfd_boolean requires_text_end_align = FALSE;
- unsigned longcall_count = 0;
- unsigned longcall_convert_count = 0;
- unsigned narrowable_count = 0;
- unsigned narrowable_convert_count = 0;
- unsigned widenable_count = 0;
- unsigned widenable_convert_count = 0;
-
- proposed_action *action = NULL;
- int align = (1 << ebb_table->ebb.sec->alignment_power);
-
- seg_idx_start = seg_idx_end;
-
- for (i = seg_idx_start; i < ebb_table->action_count; i++)
- {
- action = &ebb_table->actions[i];
- if (action->action == ta_convert_longcall)
- longcall_count++;
- if (action->action == ta_narrow_insn)
- narrowable_count++;
- if (action->action == ta_widen_insn)
- widenable_count++;
- if (action->action == ta_fill)
- break;
- if (action->align_type == EBB_REQUIRE_LOOP_ALIGN)
- break;
- if (action->align_type == EBB_REQUIRE_TGT_ALIGN
- && !elf32xtensa_size_opt)
- break;
- }
- seg_idx_end = i;
-
- if (seg_idx_end == ebb_table->action_count && !ebb->ends_unreachable)
- requires_text_end_align = TRUE;
-
- if (elf32xtensa_size_opt && !requires_text_end_align
- && action->align_type != EBB_REQUIRE_LOOP_ALIGN
- && action->align_type != EBB_REQUIRE_TGT_ALIGN)
- {
- longcall_convert_count = longcall_count;
- narrowable_convert_count = narrowable_count;
- widenable_convert_count = 0;
- }
- else
- {
- /* There is a constraint. Convert the max number of longcalls. */
- narrowable_convert_count = 0;
- longcall_convert_count = 0;
- widenable_convert_count = 0;
-
- for (j = 0; j < longcall_count; j++)
- {
- int removed = (longcall_count - j) * 3 & (align - 1);
- unsigned desire_narrow = (align - removed) & (align - 1);
- unsigned desire_widen = removed;
- if (desire_narrow <= narrowable_count)
- {
- narrowable_convert_count = desire_narrow;
- narrowable_convert_count +=
- (align * ((narrowable_count - narrowable_convert_count)
- / align));
- longcall_convert_count = (longcall_count - j);
- widenable_convert_count = 0;
- break;
- }
- if (desire_widen <= widenable_count && !elf32xtensa_size_opt)
- {
- narrowable_convert_count = 0;
- longcall_convert_count = longcall_count - j;
- widenable_convert_count = desire_widen;
- break;
- }
- }
- }
-
- /* Now the number of conversions are saved. Do them. */
- for (i = seg_idx_start; i < seg_idx_end; i++)
- {
- action = &ebb_table->actions[i];
- switch (action->action)
- {
- case ta_convert_longcall:
- if (longcall_convert_count != 0)
- {
- action->action = ta_remove_longcall;
- action->do_action = TRUE;
- action->removed_bytes += 3;
- longcall_convert_count--;
- }
- break;
- case ta_narrow_insn:
- if (narrowable_convert_count != 0)
- {
- action->do_action = TRUE;
- action->removed_bytes += 1;
- narrowable_convert_count--;
- }
- break;
- case ta_widen_insn:
- if (widenable_convert_count != 0)
- {
- action->do_action = TRUE;
- action->removed_bytes -= 1;
- widenable_convert_count--;
- }
- break;
- default:
- break;
- }
- }
- }
-
- /* Now we move on to some local opts. Try to remove each of the
- remaining longcalls. */
-
- if (ebb_table->ebb.ends_section || ebb_table->ebb.ends_unreachable)
- {
- removed_bytes = 0;
- for (i = 0; i < ebb_table->action_count; i++)
- {
- int old_removed_bytes = removed_bytes;
- proposed_action *action = &ebb_table->actions[i];
-
- if (action->do_action && action->action == ta_convert_longcall)
- {
- bfd_boolean bad_alignment = FALSE;
- removed_bytes += 3;
- for (j = i + 1; j < ebb_table->action_count; j++)
- {
- proposed_action *new_action = &ebb_table->actions[j];
- bfd_vma offset = new_action->offset;
- if (new_action->align_type == EBB_REQUIRE_TGT_ALIGN)
- {
- if (!check_branch_target_aligned
- (ebb_table->ebb.contents,
- ebb_table->ebb.content_length,
- offset, offset - removed_bytes))
- {
- bad_alignment = TRUE;
- break;
- }
- }
- if (new_action->align_type == EBB_REQUIRE_LOOP_ALIGN)
- {
- if (!check_loop_aligned (ebb_table->ebb.contents,
- ebb_table->ebb.content_length,
- offset,
- offset - removed_bytes))
- {
- bad_alignment = TRUE;
- break;
- }
- }
- if (new_action->action == ta_narrow_insn
- && !new_action->do_action
- && ebb_table->ebb.sec->alignment_power == 2)
- {
- /* Narrow an instruction and we are done. */
- new_action->do_action = TRUE;
- new_action->removed_bytes += 1;
- bad_alignment = FALSE;
- break;
- }
- if (new_action->action == ta_widen_insn
- && new_action->do_action
- && ebb_table->ebb.sec->alignment_power == 2)
- {
- /* Narrow an instruction and we are done. */
- new_action->do_action = FALSE;
- new_action->removed_bytes += 1;
- bad_alignment = FALSE;
- break;
- }
- if (new_action->do_action)
- removed_bytes += new_action->removed_bytes;
- }
- if (!bad_alignment)
- {
- action->removed_bytes += 3;
- action->action = ta_remove_longcall;
- action->do_action = TRUE;
- }
- }
- removed_bytes = old_removed_bytes;
- if (action->do_action)
- removed_bytes += action->removed_bytes;
- }
- }
-
- removed_bytes = 0;
- for (i = 0; i < ebb_table->action_count; ++i)
- {
- proposed_action *action = &ebb_table->actions[i];
- if (action->do_action)
- removed_bytes += action->removed_bytes;
- }
-
- if ((removed_bytes % (1 << ebb_table->ebb.sec->alignment_power)) != 0
- && ebb->ends_unreachable)
- {
- proposed_action *action;
- int br;
- int extra_space;
-
- BFD_ASSERT (ebb_table->action_count != 0);
- action = &ebb_table->actions[ebb_table->action_count - 1];
- BFD_ASSERT (action->action == ta_fill);
- BFD_ASSERT (ebb->ends_unreachable->flags & XTENSA_PROP_UNREACHABLE);
-
- extra_space = compute_fill_extra_space (ebb->ends_unreachable);
- br = action->removed_bytes + removed_bytes + extra_space;
- br = br & ((1 << ebb->sec->alignment_power ) - 1);
-
- action->removed_bytes = extra_space - br;
- }
- return TRUE;
-}
-
-
-/* The xlate_map is a sorted array of address mappings designed to
- answer the offset_with_removed_text() query with a binary search instead
- of a linear search through the section's action_list. */
-
-typedef struct xlate_map_entry xlate_map_entry_t;
-typedef struct xlate_map xlate_map_t;
-
-struct xlate_map_entry
-{
- unsigned orig_address;
- unsigned new_address;
- unsigned size;
-};
-
-struct xlate_map
-{
- unsigned entry_count;
- xlate_map_entry_t *entry;
-};
-
-
-static int
-xlate_compare (const void *a_v, const void *b_v)
-{
- const xlate_map_entry_t *a = (const xlate_map_entry_t *) a_v;
- const xlate_map_entry_t *b = (const xlate_map_entry_t *) b_v;
- if (a->orig_address < b->orig_address)
- return -1;
- if (a->orig_address > (b->orig_address + b->size - 1))
- return 1;
- return 0;
-}
-
-
-static bfd_vma
-xlate_offset_with_removed_text (const xlate_map_t *map,
- text_action_list *action_list,
- bfd_vma offset)
-{
- void *r;
- xlate_map_entry_t *e;
-
- if (map == NULL)
- return offset_with_removed_text (action_list, offset);
-
- if (map->entry_count == 0)
- return offset;
-
- r = bsearch (&offset, map->entry, map->entry_count,
- sizeof (xlate_map_entry_t), &xlate_compare);
- e = (xlate_map_entry_t *) r;
-
- BFD_ASSERT (e != NULL);
- if (e == NULL)
- return offset;
- return e->new_address - e->orig_address + offset;
-}
-
-typedef struct xlate_map_context_struct xlate_map_context;
-struct xlate_map_context_struct
-{
- xlate_map_t *map;
- xlate_map_entry_t *current_entry;
- int removed;
-};
-
-static int
-xlate_map_fn (splay_tree_node node, void *p)
-{
- text_action *r = (text_action *)node->value;
- xlate_map_context *ctx = p;
- unsigned orig_size = 0;
-
- switch (r->action)
- {
- case ta_none:
- case ta_remove_insn:
- case ta_convert_longcall:
- case ta_remove_literal:
- case ta_add_literal:
- break;
- case ta_remove_longcall:
- orig_size = 6;
- break;
- case ta_narrow_insn:
- orig_size = 3;
- break;
- case ta_widen_insn:
- orig_size = 2;
- break;
- case ta_fill:
- break;
- }
- ctx->current_entry->size =
- r->offset + orig_size - ctx->current_entry->orig_address;
- if (ctx->current_entry->size != 0)
- {
- ctx->current_entry++;
- ctx->map->entry_count++;
- }
- ctx->current_entry->orig_address = r->offset + orig_size;
- ctx->removed += r->removed_bytes;
- ctx->current_entry->new_address = r->offset + orig_size - ctx->removed;
- ctx->current_entry->size = 0;
- return 0;
-}
-
-/* Build a binary searchable offset translation map from a section's
- action list. */
-
-static xlate_map_t *
-build_xlate_map (asection *sec, xtensa_relax_info *relax_info)
-{
- text_action_list *action_list = &relax_info->action_list;
- unsigned num_actions = 0;
- xlate_map_context ctx;
-
- ctx.map = (xlate_map_t *) bfd_malloc (sizeof (xlate_map_t));
-
- if (ctx.map == NULL)
- return NULL;
-
- num_actions = action_list_count (action_list);
- ctx.map->entry = (xlate_map_entry_t *)
- bfd_malloc (sizeof (xlate_map_entry_t) * (num_actions + 1));
- if (ctx.map->entry == NULL)
- {
- free (ctx.map);
- return NULL;
- }
- ctx.map->entry_count = 0;
-
- ctx.removed = 0;
- ctx.current_entry = &ctx.map->entry[0];
-
- ctx.current_entry->orig_address = 0;
- ctx.current_entry->new_address = 0;
- ctx.current_entry->size = 0;
-
- splay_tree_foreach (action_list->tree, xlate_map_fn, &ctx);
-
- ctx.current_entry->size = (bfd_get_section_limit (sec->owner, sec)
- - ctx.current_entry->orig_address);
- if (ctx.current_entry->size != 0)
- ctx.map->entry_count++;
-
- return ctx.map;
-}
-
-
-/* Free an offset translation map. */
-
-static void
-free_xlate_map (xlate_map_t *map)
-{
- if (map && map->entry)
- free (map->entry);
- if (map)
- free (map);
-}
-
-
-/* Use check_section_ebb_pcrels_fit to make sure that all of the
- relocations in a section will fit if a proposed set of actions
- are performed. */
-
-static bfd_boolean
-check_section_ebb_pcrels_fit (bfd *abfd,
- asection *sec,
- bfd_byte *contents,
- Elf_Internal_Rela *internal_relocs,
- reloc_range_list *relevant_relocs,
- const ebb_constraint *constraint,
- const xtensa_opcode *reloc_opcodes)
-{
- unsigned i, j;
- unsigned n = sec->reloc_count;
- Elf_Internal_Rela *irel;
- xlate_map_t *xmap = NULL;
- bfd_boolean ok = TRUE;
- xtensa_relax_info *relax_info;
- reloc_range_list_entry *entry = NULL;
-
- relax_info = get_xtensa_relax_info (sec);
-
- if (relax_info && sec->reloc_count > 100)
- {
- xmap = build_xlate_map (sec, relax_info);
- /* NULL indicates out of memory, but the slow version
- can still be used. */
- }
-
- if (relevant_relocs && constraint->action_count)
- {
- if (!relevant_relocs->ok)
- {
- ok = FALSE;
- n = 0;
- }
- else
- {
- bfd_vma min_offset, max_offset;
- min_offset = max_offset = constraint->actions[0].offset;
-
- for (i = 1; i < constraint->action_count; ++i)
- {
- proposed_action *action = &constraint->actions[i];
- bfd_vma offset = action->offset;
-
- if (offset < min_offset)
- min_offset = offset;
- if (offset > max_offset)
- max_offset = offset;
- }
- reloc_range_list_update_range (relevant_relocs, min_offset,
- max_offset);
- n = relevant_relocs->n_list;
- entry = &relevant_relocs->list_root;
- }
- }
- else
- {
- relevant_relocs = NULL;
- }
-
- for (i = 0; i < n; i++)
- {
- rz_reloc rz_rel;
- bfd_vma orig_self_offset, orig_target_offset;
- bfd_vma self_offset, target_offset;
- int rz_type;
- reloc_howto_type *howto;
- int self_removed_bytes, target_removed_bytes;
-
- if (relevant_relocs)
- {
- entry = entry->next;
- irel = entry->irel;
- }
- else
- {
- irel = internal_relocs + i;
- }
- rz_type = ELF32_R_TYPE (irel->rz_info);
-
- howto = &elf_howto_table[rz_type];
- /* We maintain the required invariant: PC-relative relocations
- that fit before linking must fit after linking. Thus we only
- need to deal with relocations to the same section that are
- PC-relative. */
- if (rz_type == RZ_XTENSA_ASM_SIMPLIFY
- || rz_type == RZ_XTENSA_32_PCREL
- || !howto->pc_relative)
- continue;
-
- rz_reloc_init (&rz_rel, abfd, irel, contents,
- bfd_get_section_limit (abfd, sec));
-
- if (rz_reloc_get_section (&rz_rel) != sec)
- continue;
-
- orig_self_offset = irel->rz_offset;
- orig_target_offset = rz_rel.target_offset;
-
- self_offset = orig_self_offset;
- target_offset = orig_target_offset;
-
- if (relax_info)
- {
- self_offset =
- xlate_offset_with_removed_text (xmap, &relax_info->action_list,
- orig_self_offset);
- target_offset =
- xlate_offset_with_removed_text (xmap, &relax_info->action_list,
- orig_target_offset);
- }
-
- self_removed_bytes = 0;
- target_removed_bytes = 0;
-
- for (j = 0; j < constraint->action_count; ++j)
- {
- proposed_action *action = &constraint->actions[j];
- bfd_vma offset = action->offset;
- int removed_bytes = action->removed_bytes;
- if (offset < orig_self_offset
- || (offset == orig_self_offset && action->action == ta_fill
- && action->removed_bytes < 0))
- self_removed_bytes += removed_bytes;
- if (offset < orig_target_offset
- || (offset == orig_target_offset && action->action == ta_fill
- && action->removed_bytes < 0))
- target_removed_bytes += removed_bytes;
- }
- self_offset -= self_removed_bytes;
- target_offset -= target_removed_bytes;
-
- /* Try to encode it. Get the operand and check. */
- if (is_alt_relocation (ELF32_R_TYPE (irel->rz_info)))
- {
- /* None of the current alternate relocs are PC-relative,
- and only PC-relative relocs matter here. */
- }
- else
- {
- xtensa_opcode opcode;
- int opnum;
-
- if (relevant_relocs)
- {
- opcode = entry->opcode;
- opnum = entry->opnum;
- }
- else
- {
- if (reloc_opcodes)
- opcode = reloc_opcodes[relevant_relocs ?
- (unsigned)(entry - relevant_relocs->reloc) : i];
- else
- opcode = get_relocation_opcode (abfd, sec, contents, irel);
- if (opcode == XTENSA_UNDEFINED)
- {
- ok = FALSE;
- break;
- }
-
- opnum = get_relocation_opnd (opcode, ELF32_R_TYPE (irel->rz_info));
- if (opnum == XTENSA_UNDEFINED)
- {
- ok = FALSE;
- break;
- }
- }
-
- if (!pcrel_reloc_fits (opcode, opnum, self_offset, target_offset))
- {
- ok = FALSE;
- break;
- }
- }
- }
-
- if (xmap)
- free_xlate_map (xmap);
-
- return ok;
-}
-
-
-static bfd_boolean
-check_section_ebb_reduces (const ebb_constraint *constraint)
-{
- int removed = 0;
- unsigned i;
-
- for (i = 0; i < constraint->action_count; i++)
- {
- const proposed_action *action = &constraint->actions[i];
- if (action->do_action)
- removed += action->removed_bytes;
- }
- if (removed < 0)
- return FALSE;
-
- return TRUE;
-}
-
-
-void
-text_action_add_proposed (text_action_list *l,
- const ebb_constraint *ebb_table,
- asection *sec)
-{
- unsigned i;
-
- for (i = 0; i < ebb_table->action_count; i++)
- {
- proposed_action *action = &ebb_table->actions[i];
-
- if (!action->do_action)
- continue;
- switch (action->action)
- {
- case ta_remove_insn:
- case ta_remove_longcall:
- case ta_convert_longcall:
- case ta_narrow_insn:
- case ta_widen_insn:
- case ta_fill:
- case ta_remove_literal:
- text_action_add (l, action->action, sec, action->offset,
- action->removed_bytes);
- break;
- case ta_none:
- break;
- default:
- BFD_ASSERT (0);
- break;
- }
- }
-}
-
-
-int
-compute_fill_extra_space (property_table_entry *entry)
-{
- int fill_extra_space;
-
- if (!entry)
- return 0;
-
- if ((entry->flags & XTENSA_PROP_UNREACHABLE) == 0)
- return 0;
-
- fill_extra_space = entry->size;
- if ((entry->flags & XTENSA_PROP_ALIGN) != 0)
- {
- /* Fill bytes for alignment:
- (2**n)-1 - (addr + (2**n)-1) & (2**n -1) */
- int pow = GET_XTENSA_PROP_ALIGNMENT (entry->flags);
- int nsm = (1 << pow) - 1;
- bfd_vma addr = entry->address + entry->size;
- bfd_vma align_fill = nsm - ((addr + nsm) & nsm);
- fill_extra_space += align_fill;
- }
- return fill_extra_space;
-}
-
-
-/* First relaxation pass. */
-
-/* If the section contains relaxable literals, check each literal to
- see if it has the same value as another literal that has already
- been seen, either in the current section or a previous one. If so,
- add an entry to the per-section list of removed literals. The
- actual changes are deferred until the next pass. */
-
-static bfd_boolean
-compute_removed_literals (bfd *abfd,
- asection *sec,
- struct bfd_link_info *link_info,
- value_map_hash_table *values)
-{
- xtensa_relax_info *relax_info;
- bfd_byte *contents;
- Elf_Internal_Rela *internal_relocs;
- source_reloc *src_relocs, *rel;
- bfd_boolean ok = TRUE;
- property_table_entry *prop_table = NULL;
- int ptblsize;
- int i, prev_i;
- bfd_boolean last_loc_is_prev = FALSE;
- bfd_vma last_target_offset = 0;
- section_cache_t target_sec_cache;
- bfd_size_type sec_size;
-
- init_section_cache (&target_sec_cache);
-
- /* Do nothing if it is not a relaxable literal section. */
- relax_info = get_xtensa_relax_info (sec);
- BFD_ASSERT (relax_info);
- if (!relax_info->is_relaxable_literal_section)
- return ok;
-
- internal_relocs = retrieve_internal_relocs (abfd, sec,
- link_info->keep_memory);
-
- sec_size = bfd_get_section_limit (abfd, sec);
- contents = retrieve_contents (abfd, sec, link_info->keep_memory);
- if (contents == NULL && sec_size != 0)
- {
- ok = FALSE;
- goto error_return;
- }
-
- /* Sort the source_relocs by target offset. */
- src_relocs = relax_info->src_relocs;
- qsort (src_relocs, relax_info->src_count,
- sizeof (source_reloc), source_reloc_compare);
- qsort (internal_relocs, sec->reloc_count, sizeof (Elf_Internal_Rela),
- internal_reloc_compare);
-
- ptblsize = xtensa_read_table_entries (abfd, sec, &prop_table,
- XTENSA_PROP_SEC_NAME, FALSE);
- if (ptblsize < 0)
- {
- ok = FALSE;
- goto error_return;
- }
-
- prev_i = -1;
- for (i = 0; i < relax_info->src_count; i++)
- {
- Elf_Internal_Rela *irel = NULL;
-
- rel = &src_relocs[i];
- if (get_l32r_opcode () != rel->opcode)
- continue;
- irel = get_irel_at_offset (sec, internal_relocs,
- rel->rz_rel.target_offset);
-
- /* If the relocation on this is not a simple RZ_XTENSA_32 or
- RZ_XTENSA_PLT then do not consider it. This may happen when
- the difference of two symbols is used in a literal. */
- if (irel && (ELF32_R_TYPE (irel->rz_info) != RZ_XTENSA_32
- && ELF32_R_TYPE (irel->rz_info) != RZ_XTENSA_PLT))
- continue;
-
- /* If the target_offset for this relocation is the same as the
- previous relocation, then we've already considered whether the
- literal can be coalesced. Skip to the next one.... */
- if (i != 0 && prev_i != -1
- && src_relocs[i-1].rz_rel.target_offset == rel->rz_rel.target_offset)
- continue;
- prev_i = i;
-
- if (last_loc_is_prev &&
- last_target_offset + 4 != rel->rz_rel.target_offset)
- last_loc_is_prev = FALSE;
-
- /* Check if the relocation was from an L32R that is being removed
- because a CALLX was converted to a direct CALL, and check if
- there are no other relocations to the literal. */
- if (is_removable_literal (rel, i, src_relocs, relax_info->src_count,
- sec, prop_table, ptblsize))
- {
- if (!remove_dead_literal (abfd, sec, link_info, internal_relocs,
- irel, rel, prop_table, ptblsize))
- {
- ok = FALSE;
- goto error_return;
- }
- last_target_offset = rel->rz_rel.target_offset;
- continue;
- }
-
- if (!identify_literal_placement (abfd, sec, contents, link_info,
- values,
- &last_loc_is_prev, irel,
- relax_info->src_count - i, rel,
- prop_table, ptblsize,
- &target_sec_cache, rel->is_abs_literal))
- {
- ok = FALSE;
- goto error_return;
- }
- last_target_offset = rel->rz_rel.target_offset;
- }
-
-#if DEBUG
- print_removed_literals (stderr, &relax_info->removed_list);
- print_action_list (stderr, &relax_info->action_list);
-#endif /* DEBUG */
-
-error_return:
- if (prop_table)
- free (prop_table);
- free_section_cache (&target_sec_cache);
-
- release_contents (sec, contents);
- release_internal_relocs (sec, internal_relocs);
- return ok;
-}
-
-
-static Elf_Internal_Rela *
-get_irel_at_offset (asection *sec,
- Elf_Internal_Rela *internal_relocs,
- bfd_vma offset)
-{
- unsigned i;
- Elf_Internal_Rela *irel;
- unsigned rz_type;
- Elf_Internal_Rela key;
-
- if (!internal_relocs)
- return NULL;
-
- key.rz_offset = offset;
- irel = bsearch (&key, internal_relocs, sec->reloc_count,
- sizeof (Elf_Internal_Rela), internal_reloc_matches);
- if (!irel)
- return NULL;
-
- /* bsearch does not guarantee which will be returned if there are
- multiple matches. We need the first that is not an alignment. */
- i = irel - internal_relocs;
- while (i > 0)
- {
- if (internal_relocs[i-1].rz_offset != offset)
- break;
- i--;
- }
- for ( ; i < sec->reloc_count; i++)
- {
- irel = &internal_relocs[i];
- rz_type = ELF32_R_TYPE (irel->rz_info);
- if (irel->rz_offset == offset && rz_type != RZ_XTENSA_NONE)
- return irel;
- }
-
- return NULL;
-}
-
-
-bfd_boolean
-is_removable_literal (const source_reloc *rel,
- int i,
- const source_reloc *src_relocs,
- int src_count,
- asection *sec,
- property_table_entry *prop_table,
- int ptblsize)
-{
- const source_reloc *curr_rel;
- property_table_entry *entry;
-
- if (!rel->is_null)
- return FALSE;
-
- entry = elf_xtensa_find_property_entry (prop_table, ptblsize,
- sec->vma + rel->rz_rel.target_offset);
- if (entry && (entry->flags & XTENSA_PROP_NO_TRANSFORM))
- return FALSE;
-
- for (++i; i < src_count; ++i)
- {
- curr_rel = &src_relocs[i];
- /* If all others have the same target offset.... */
- if (curr_rel->rz_rel.target_offset != rel->rz_rel.target_offset)
- return TRUE;
-
- if (!curr_rel->is_null
- && !xtensa_is_property_section (curr_rel->source_sec)
- && !(curr_rel->source_sec->flags & SEC_DEBUGGING))
- return FALSE;
- }
- return TRUE;
-}
-
-
-bfd_boolean
-remove_dead_literal (bfd *abfd,
- asection *sec,
- struct bfd_link_info *link_info,
- Elf_Internal_Rela *internal_relocs,
- Elf_Internal_Rela *irel,
- source_reloc *rel,
- property_table_entry *prop_table,
- int ptblsize)
-{
- property_table_entry *entry;
- xtensa_relax_info *relax_info;
-
- relax_info = get_xtensa_relax_info (sec);
- if (!relax_info)
- return FALSE;
-
- entry = elf_xtensa_find_property_entry (prop_table, ptblsize,
- sec->vma + rel->rz_rel.target_offset);
-
- /* Mark the unused literal so that it will be removed. */
- add_removed_literal (&relax_info->removed_list, &rel->rz_rel, NULL);
-
- text_action_add (&relax_info->action_list,
- ta_remove_literal, sec, rel->rz_rel.target_offset, 4);
-
- /* If the section is 4-byte aligned, do not add fill. */
- if (sec->alignment_power > 2)
- {
- int fill_extra_space;
- bfd_vma entry_sec_offset;
- text_action *fa;
- property_table_entry *the_add_entry;
- int removed_diff;
-
- if (entry)
- entry_sec_offset = entry->address - sec->vma + entry->size;
- else
- entry_sec_offset = rel->rz_rel.target_offset + 4;
-
- /* If the literal range is at the end of the section,
- do not add fill. */
- the_add_entry = elf_xtensa_find_property_entry (prop_table, ptblsize,
- entry_sec_offset);
- fill_extra_space = compute_fill_extra_space (the_add_entry);
-
- fa = find_fill_action (&relax_info->action_list, sec, entry_sec_offset);
- removed_diff = compute_removed_action_diff (fa, sec, entry_sec_offset,
- -4, fill_extra_space);
- if (fa)
- adjust_fill_action (fa, removed_diff);
- else
- text_action_add (&relax_info->action_list,
- ta_fill, sec, entry_sec_offset, removed_diff);
- }
-
- /* Zero out the relocation on this literal location. */
- if (irel)
- {
- if (elf_hash_table (link_info)->dynamic_sections_created)
- shrink_dynamic_reloc_sections (link_info, abfd, sec, irel);
-
- irel->rz_info = ELF32_R_INFO (0, RZ_XTENSA_NONE);
- pin_internal_relocs (sec, internal_relocs);
- }
-
- /* Do not modify "last_loc_is_prev". */
- return TRUE;
-}
-
-
-bfd_boolean
-identify_literal_placement (bfd *abfd,
- asection *sec,
- bfd_byte *contents,
- struct bfd_link_info *link_info,
- value_map_hash_table *values,
- bfd_boolean *last_loc_is_prev_p,
- Elf_Internal_Rela *irel,
- int remaining_src_rels,
- source_reloc *rel,
- property_table_entry *prop_table,
- int ptblsize,
- section_cache_t *target_sec_cache,
- bfd_boolean is_abs_literal)
-{
- literal_value val;
- value_map *val_map;
- xtensa_relax_info *relax_info;
- bfd_boolean literal_placed = FALSE;
- rz_reloc rz_rel;
- unsigned long value;
- bfd_boolean final_static_link;
- bfd_size_type sec_size;
-
- relax_info = get_xtensa_relax_info (sec);
- if (!relax_info)
- return FALSE;
-
- sec_size = bfd_get_section_limit (abfd, sec);
-
- final_static_link =
- (!link_info->relocatable
- && !elf_hash_table (link_info)->dynamic_sections_created);
-
- /* The placement algorithm first checks to see if the literal is
- already in the value map. If so and the value map is reachable
- from all uses, then the literal is moved to that location. If
- not, then we identify the last location where a fresh literal was
- placed. If the literal can be safely moved there, then we do so.
- If not, then we assume that the literal is not to move and leave
- the literal where it is, marking it as the last literal
- location. */
-
- /* Find the literal value. */
- value = 0;
- rz_reloc_init (&rz_rel, abfd, irel, contents, sec_size);
- if (!irel)
- {
- BFD_ASSERT (rel->rz_rel.target_offset < sec_size);
- value = bfd_get_32 (abfd, contents + rel->rz_rel.target_offset);
- }
- init_literal_value (&val, &rz_rel, value, is_abs_literal);
-
- /* Check if we've seen another literal with the same value that
- is in the same output section. */
- val_map = value_map_get_cached_value (values, &val, final_static_link);
-
- if (val_map
- && (rz_reloc_get_section (&val_map->loc)->output_section
- == sec->output_section)
- && relocations_reach (rel, remaining_src_rels, &val_map->loc)
- && coalesce_shared_literal (sec, rel, prop_table, ptblsize, val_map))
- {
- /* No change to last_loc_is_prev. */
- literal_placed = TRUE;
- }
-
- /* For relocatable links, do not try to move literals. To do it
- correctly might increase the number of relocations in an input
- section making the default relocatable linking fail. */
- if (!link_info->relocatable && !literal_placed
- && values->has_last_loc && !(*last_loc_is_prev_p))
- {
- asection *target_sec = rz_reloc_get_section (&values->last_loc);
- if (target_sec && target_sec->output_section == sec->output_section)
- {
- /* Increment the virtual offset. */
- rz_reloc try_loc = values->last_loc;
- try_loc.virtual_offset += 4;
-
- /* There is a last loc that was in the same output section. */
- if (relocations_reach (rel, remaining_src_rels, &try_loc)
- && move_shared_literal (sec, link_info, rel,
- prop_table, ptblsize,
- &try_loc, &val, target_sec_cache))
- {
- values->last_loc.virtual_offset += 4;
- literal_placed = TRUE;
- if (!val_map)
- val_map = add_value_map (values, &val, &try_loc,
- final_static_link);
- else
- val_map->loc = try_loc;
- }
- }
- }
-
- if (!literal_placed)
- {
- /* Nothing worked, leave the literal alone but update the last loc. */
- values->has_last_loc = TRUE;
- values->last_loc = rel->rz_rel;
- if (!val_map)
- val_map = add_value_map (values, &val, &rel->rz_rel, final_static_link);
- else
- val_map->loc = rel->rz_rel;
- *last_loc_is_prev_p = TRUE;
- }
-
- return TRUE;
-}
-
-
-/* Check if the original relocations (presumably on L32R instructions)
- identified by reloc[0..N] can be changed to reference the literal
- identified by rz_rel. If rz_rel is out of range for any of the
- original relocations, then we don't want to coalesce the original
- literal with the one at rz_rel. We only check reloc[0..N], where the
- offsets are all the same as for reloc[0] (i.e., they're all
- referencing the same literal) and where N is also bounded by the
- number of remaining entries in the "reloc" array. The "reloc" array
- is sorted by target offset so we know all the entries for the same
- literal will be contiguous. */
-
-static bfd_boolean
-relocations_reach (source_reloc *reloc,
- int remaining_relocs,
- const rz_reloc *rz_rel)
-{
- bfd_vma from_offset, source_address, dest_address;
- asection *sec;
- int i;
-
- if (!rz_reloc_is_defined (rz_rel))
- return FALSE;
-
- sec = rz_reloc_get_section (rz_rel);
- from_offset = reloc[0].rz_rel.target_offset;
-
- for (i = 0; i < remaining_relocs; i++)
- {
- if (reloc[i].rz_rel.target_offset != from_offset)
- break;
-
- /* Ignore relocations that have been removed. */
- if (reloc[i].is_null)
- continue;
-
- /* The original and new output section for these must be the same
- in order to coalesce. */
- if (rz_reloc_get_section (&reloc[i].rz_rel)->output_section
- != sec->output_section)
- return FALSE;
-
- /* Absolute literals in the same output section can always be
- combined. */
- if (reloc[i].is_abs_literal)
- continue;
-
- /* A literal with no PC-relative relocations can be moved anywhere. */
- if (reloc[i].opnd != -1)
- {
- /* Otherwise, check to see that it fits. */
- source_address = (reloc[i].source_sec->output_section->vma
- + reloc[i].source_sec->output_offset
- + reloc[i].rz_rel.rela.rz_offset);
- dest_address = (sec->output_section->vma
- + sec->output_offset
- + rz_rel->target_offset);
-
- if (!pcrel_reloc_fits (reloc[i].opcode, reloc[i].opnd,
- source_address, dest_address))
- return FALSE;
- }
- }
-
- return TRUE;
-}
-
-
-/* Move a literal to another literal location because it is
- the same as the other literal value. */
-
-static bfd_boolean
-coalesce_shared_literal (asection *sec,
- source_reloc *rel,
- property_table_entry *prop_table,
- int ptblsize,
- value_map *val_map)
-{
- property_table_entry *entry;
- text_action *fa;
- property_table_entry *the_add_entry;
- int removed_diff;
- xtensa_relax_info *relax_info;
-
- relax_info = get_xtensa_relax_info (sec);
- if (!relax_info)
- return FALSE;
-
- entry = elf_xtensa_find_property_entry
- (prop_table, ptblsize, sec->vma + rel->rz_rel.target_offset);
- if (entry && (entry->flags & XTENSA_PROP_NO_TRANSFORM))
- return TRUE;
-
- /* Mark that the literal will be coalesced. */
- add_removed_literal (&relax_info->removed_list, &rel->rz_rel, &val_map->loc);
-
- text_action_add (&relax_info->action_list,
- ta_remove_literal, sec, rel->rz_rel.target_offset, 4);
-
- /* If the section is 4-byte aligned, do not add fill. */
- if (sec->alignment_power > 2)
- {
- int fill_extra_space;
- bfd_vma entry_sec_offset;
-
- if (entry)
- entry_sec_offset = entry->address - sec->vma + entry->size;
- else
- entry_sec_offset = rel->rz_rel.target_offset + 4;
-
- /* If the literal range is at the end of the section,
- do not add fill. */
- fill_extra_space = 0;
- the_add_entry = elf_xtensa_find_property_entry (prop_table, ptblsize,
- entry_sec_offset);
- if (the_add_entry && (the_add_entry->flags & XTENSA_PROP_UNREACHABLE))
- fill_extra_space = the_add_entry->size;
-
- fa = find_fill_action (&relax_info->action_list, sec, entry_sec_offset);
- removed_diff = compute_removed_action_diff (fa, sec, entry_sec_offset,
- -4, fill_extra_space);
- if (fa)
- adjust_fill_action (fa, removed_diff);
- else
- text_action_add (&relax_info->action_list,
- ta_fill, sec, entry_sec_offset, removed_diff);
- }
-
- return TRUE;
-}
-
-
-/* Move a literal to another location. This may actually increase the
- total amount of space used because of alignments so we need to do
- this carefully. Also, it may make a branch go out of range. */
-
-static bfd_boolean
-move_shared_literal (asection *sec,
- struct bfd_link_info *link_info,
- source_reloc *rel,
- property_table_entry *prop_table,
- int ptblsize,
- const rz_reloc *target_loc,
- const literal_value *lit_value,
- section_cache_t *target_sec_cache)
-{
- property_table_entry *the_add_entry, *src_entry, *target_entry = NULL;
- text_action *fa, *target_fa;
- int removed_diff;
- xtensa_relax_info *relax_info, *target_relax_info;
- asection *target_sec;
- ebb_t *ebb;
- ebb_constraint ebb_table;
- bfd_boolean relocs_fit;
-
- /* If this routine always returns FALSE, the literals that cannot be
- coalesced will not be moved. */
- if (elf32xtensa_no_literal_movement)
- return FALSE;
-
- relax_info = get_xtensa_relax_info (sec);
- if (!relax_info)
- return FALSE;
-
- target_sec = rz_reloc_get_section (target_loc);
- target_relax_info = get_xtensa_relax_info (target_sec);
-
- /* Literals to undefined sections may not be moved because they
- must report an error. */
- if (bfd_is_und_section (target_sec))
- return FALSE;
-
- src_entry = elf_xtensa_find_property_entry
- (prop_table, ptblsize, sec->vma + rel->rz_rel.target_offset);
-
- if (!section_cache_section (target_sec_cache, target_sec, link_info))
- return FALSE;
-
- target_entry = elf_xtensa_find_property_entry
- (target_sec_cache->ptbl, target_sec_cache->pte_count,
- target_sec->vma + target_loc->target_offset);
-
- if (!target_entry)
- return FALSE;
-
- /* Make sure that we have not broken any branches. */
- relocs_fit = FALSE;
-
- init_ebb_constraint (&ebb_table);
- ebb = &ebb_table.ebb;
- init_ebb (ebb, target_sec_cache->sec, target_sec_cache->contents,
- target_sec_cache->content_length,
- target_sec_cache->ptbl, target_sec_cache->pte_count,
- target_sec_cache->relocs, target_sec_cache->reloc_count);
-
- /* Propose to add 4 bytes + worst-case alignment size increase to
- destination. */
- ebb_propose_action (&ebb_table, EBB_NO_ALIGN, 0,
- ta_fill, target_loc->target_offset,
- -4 - (1 << target_sec->alignment_power), TRUE);
-
- /* Check all of the PC-relative relocations to make sure they still fit. */
- relocs_fit = check_section_ebb_pcrels_fit (target_sec->owner, target_sec,
- target_sec_cache->contents,
- target_sec_cache->relocs, NULL,
- &ebb_table, NULL);
-
- if (!relocs_fit)
- return FALSE;
-
- text_action_add_literal (&target_relax_info->action_list,
- ta_add_literal, target_loc, lit_value, -4);
-
- if (target_sec->alignment_power > 2 && target_entry != src_entry)
- {
- /* May need to add or remove some fill to maintain alignment. */
- int fill_extra_space;
- bfd_vma entry_sec_offset;
-
- entry_sec_offset =
- target_entry->address - target_sec->vma + target_entry->size;
-
- /* If the literal range is at the end of the section,
- do not add fill. */
- fill_extra_space = 0;
- the_add_entry =
- elf_xtensa_find_property_entry (target_sec_cache->ptbl,
- target_sec_cache->pte_count,
- entry_sec_offset);
- if (the_add_entry && (the_add_entry->flags & XTENSA_PROP_UNREACHABLE))
- fill_extra_space = the_add_entry->size;
-
- target_fa = find_fill_action (&target_relax_info->action_list,
- target_sec, entry_sec_offset);
- removed_diff = compute_removed_action_diff (target_fa, target_sec,
- entry_sec_offset, 4,
- fill_extra_space);
- if (target_fa)
- adjust_fill_action (target_fa, removed_diff);
- else
- text_action_add (&target_relax_info->action_list,
- ta_fill, target_sec, entry_sec_offset, removed_diff);
- }
-
- /* Mark that the literal will be moved to the new location. */
- add_removed_literal (&relax_info->removed_list, &rel->rz_rel, target_loc);
-
- /* Remove the literal. */
- text_action_add (&relax_info->action_list,
- ta_remove_literal, sec, rel->rz_rel.target_offset, 4);
-
- /* If the section is 4-byte aligned, do not add fill. */
- if (sec->alignment_power > 2 && target_entry != src_entry)
- {
- int fill_extra_space;
- bfd_vma entry_sec_offset;
-
- if (src_entry)
- entry_sec_offset = src_entry->address - sec->vma + src_entry->size;
- else
- entry_sec_offset = rel->rz_rel.target_offset+4;
-
- /* If the literal range is at the end of the section,
- do not add fill. */
- fill_extra_space = 0;
- the_add_entry = elf_xtensa_find_property_entry (prop_table, ptblsize,
- entry_sec_offset);
- if (the_add_entry && (the_add_entry->flags & XTENSA_PROP_UNREACHABLE))
- fill_extra_space = the_add_entry->size;
-
- fa = find_fill_action (&relax_info->action_list, sec, entry_sec_offset);
- removed_diff = compute_removed_action_diff (fa, sec, entry_sec_offset,
- -4, fill_extra_space);
- if (fa)
- adjust_fill_action (fa, removed_diff);
- else
- text_action_add (&relax_info->action_list,
- ta_fill, sec, entry_sec_offset, removed_diff);
- }
-
- return TRUE;
-}
-
-
-/* Second relaxation pass. */
-
-static int
-action_remove_bytes_fn (splay_tree_node node, void *p)
-{
- bfd_size_type *final_size = p;
- text_action *action = (text_action *)node->value;
-
- *final_size -= action->removed_bytes;
- return 0;
-}
-
-/* Modify all of the relocations to point to the right spot, and if this
- is a relaxable section, delete the unwanted literals and fix the
- section size. */
-
-bfd_boolean
-relax_section (bfd *abfd, asection *sec, struct bfd_link_info *link_info)
-{
- Elf_Internal_Rela *internal_relocs;
- xtensa_relax_info *relax_info;
- bfd_byte *contents;
- bfd_boolean ok = TRUE;
- unsigned i;
- bfd_boolean rv = FALSE;
- bfd_boolean virtual_action;
- bfd_size_type sec_size;
-
- sec_size = bfd_get_section_limit (abfd, sec);
- relax_info = get_xtensa_relax_info (sec);
- BFD_ASSERT (relax_info);
-
- /* First translate any of the fixes that have been added already. */
- translate_section_fixes (sec);
-
- /* Handle property sections (e.g., literal tables) specially. */
- if (xtensa_is_property_section (sec))
- {
- BFD_ASSERT (!relax_info->is_relaxable_literal_section);
- return relax_property_section (abfd, sec, link_info);
- }
-
- internal_relocs = retrieve_internal_relocs (abfd, sec,
- link_info->keep_memory);
- if (!internal_relocs && !action_list_count (&relax_info->action_list))
- return TRUE;
-
- contents = retrieve_contents (abfd, sec, link_info->keep_memory);
- if (contents == NULL && sec_size != 0)
- {
- ok = FALSE;
- goto error_return;
- }
-
- if (internal_relocs)
- {
- for (i = 0; i < sec->reloc_count; i++)
- {
- Elf_Internal_Rela *irel;
- xtensa_relax_info *target_relax_info;
- bfd_vma source_offset, old_source_offset;
- rz_reloc rz_rel;
- unsigned rz_type;
- asection *target_sec;
-
- /* Locally change the source address.
- Translate the target to the new target address.
- If it points to this section and has been removed,
- NULLify it.
- Write it back. */
-
- irel = &internal_relocs[i];
- source_offset = irel->rz_offset;
- old_source_offset = source_offset;
-
- rz_type = ELF32_R_TYPE (irel->rz_info);
- rz_reloc_init (&rz_rel, abfd, irel, contents,
- bfd_get_section_limit (abfd, sec));
-
- /* If this section could have changed then we may need to
- change the relocation's offset. */
-
- if (relax_info->is_relaxable_literal_section
- || relax_info->is_relaxable_asm_section)
- {
- pin_internal_relocs (sec, internal_relocs);
-
- if (rz_type != RZ_XTENSA_NONE
- && find_removed_literal (&relax_info->removed_list,
- irel->rz_offset))
- {
- /* Remove this relocation. */
- if (elf_hash_table (link_info)->dynamic_sections_created)
- shrink_dynamic_reloc_sections (link_info, abfd, sec, irel);
- irel->rz_info = ELF32_R_INFO (0, RZ_XTENSA_NONE);
- irel->rz_offset = offset_with_removed_text_map
- (&relax_info->action_list, irel->rz_offset);
- continue;
- }
-
- if (rz_type == RZ_XTENSA_ASM_SIMPLIFY)
- {
- text_action *action =
- find_insn_action (&relax_info->action_list,
- irel->rz_offset);
- if (action && (action->action == ta_convert_longcall
- || action->action == ta_remove_longcall))
- {
- bfd_reloc_status_type retval;
- char *error_message = NULL;
-
- retval = contract_asm_expansion (contents, sec_size,
- irel, &error_message);
- if (retval != bfd_reloc_ok)
- {
- (*link_info->callbacks->reloc_dangerous)
- (link_info, error_message, abfd, sec,
- irel->rz_offset);
- goto error_return;
- }
- /* Update the action so that the code that moves
- the contents will do the right thing. */
- /* ta_remove_longcall and ta_remove_insn actions are
- grouped together in the tree as well as
- ta_convert_longcall and ta_none, so that changes below
- can be done w/o removing and reinserting action into
- the tree. */
-
- if (action->action == ta_remove_longcall)
- action->action = ta_remove_insn;
- else
- action->action = ta_none;
- /* Refresh the info in the rz_rel. */
- rz_reloc_init (&rz_rel, abfd, irel, contents, sec_size);
- rz_type = ELF32_R_TYPE (irel->rz_info);
- }
- }
-
- source_offset = offset_with_removed_text_map
- (&relax_info->action_list, irel->rz_offset);
- irel->rz_offset = source_offset;
- }
-
- /* If the target section could have changed then
- we may need to change the relocation's target offset. */
-
- target_sec = rz_reloc_get_section (&rz_rel);
-
- /* For a reference to a discarded section from a DWARF section,
- i.e., where action_discarded is PRETEND, the symbol will
- eventually be modified to refer to the kept section (at least if
- the kept and discarded sections are the same size). Anticipate
- that here and adjust things accordingly. */
- if (! elf_xtensa_ignore_discarded_relocs (sec)
- && elf_xtensa_action_discarded (sec) == PRETEND
- && sec->sec_info_type != SEC_INFO_TYPE_STABS
- && target_sec != NULL
- && discarded_section (target_sec))
- {
- /* It would be natural to call _bfd_elf_check_kept_section
- here, but it's not exported from elflink.c. It's also a
- fairly expensive check. Adjusting the relocations to the
- discarded section is fairly harmless; it will only adjust
- some addends and difference values. If it turns out that
- _bfd_elf_check_kept_section fails later, it won't matter,
- so just compare the section names to find the right group
- member. */
- asection *kept = target_sec->kept_section;
- if (kept != NULL)
- {
- if ((kept->flags & SEC_GROUP) != 0)
- {
- asection *first = elf_next_in_group (kept);
- asection *s = first;
-
- kept = NULL;
- while (s != NULL)
- {
- if (strcmp (s->name, target_sec->name) == 0)
- {
- kept = s;
- break;
- }
- s = elf_next_in_group (s);
- if (s == first)
- break;
- }
- }
- }
- if (kept != NULL
- && ((target_sec->rawsize != 0
- ? target_sec->rawsize : target_sec->size)
- == (kept->rawsize != 0 ? kept->rawsize : kept->size)))
- target_sec = kept;
- }
-
- target_relax_info = get_xtensa_relax_info (target_sec);
- if (target_relax_info
- && (target_relax_info->is_relaxable_literal_section
- || target_relax_info->is_relaxable_asm_section))
- {
- rz_reloc new_reloc;
- target_sec = translate_reloc (&rz_rel, &new_reloc, target_sec);
-
- if (rz_type == RZ_XTENSA_DIFF8
- || rz_type == RZ_XTENSA_DIFF16
- || rz_type == RZ_XTENSA_DIFF32)
- {
- bfd_signed_vma diff_value = 0;
- bfd_vma new_end_offset, diff_mask = 0;
-
- if (bfd_get_section_limit (abfd, sec) < old_source_offset)
- {
- (*link_info->callbacks->reloc_dangerous)
- (link_info, _("invalid relocation address"),
- abfd, sec, old_source_offset);
- goto error_return;
- }
-
- switch (rz_type)
- {
- case RZ_XTENSA_DIFF8:
- diff_value =
- bfd_get_signed_8 (abfd, &contents[old_source_offset]);
- break;
- case RZ_XTENSA_DIFF16:
- diff_value =
- bfd_get_signed_16 (abfd, &contents[old_source_offset]);
- break;
- case RZ_XTENSA_DIFF32:
- diff_value =
- bfd_get_signed_32 (abfd, &contents[old_source_offset]);
- break;
- }
-
- new_end_offset = offset_with_removed_text_map
- (&target_relax_info->action_list,
- rz_rel.target_offset + diff_value);
- diff_value = new_end_offset - new_reloc.target_offset;
-
- switch (rz_type)
- {
- case RZ_XTENSA_DIFF8:
- diff_mask = 0x7f;
- bfd_put_signed_8 (abfd, diff_value,
- &contents[old_source_offset]);
- break;
- case RZ_XTENSA_DIFF16:
- diff_mask = 0x7fff;
- bfd_put_signed_16 (abfd, diff_value,
- &contents[old_source_offset]);
- break;
- case RZ_XTENSA_DIFF32:
- diff_mask = 0x7fffffff;
- bfd_put_signed_32 (abfd, diff_value,
- &contents[old_source_offset]);
- break;
- }
-
- /* Check for overflow. Sign bits must be all zeroes or all ones */
- if ((diff_value & ~diff_mask) != 0 &&
- (diff_value & ~diff_mask) != (-1 & ~diff_mask))
- {
- (*link_info->callbacks->reloc_dangerous)
- (link_info, _("overflow after relaxation"),
- abfd, sec, old_source_offset);
- goto error_return;
- }
-
- pin_contents (sec, contents);
- }
-
- /* If the relocation still references a section in the same
- input file, modify the relocation directly instead of
- adding a "fix" record. */
- if (target_sec->owner == abfd)
- {
- unsigned rz_symndx = ELF32_R_SYM (new_reloc.rela.rz_info);
- irel->rz_info = ELF32_R_INFO (rz_symndx, rz_type);
- irel->rz_addend = new_reloc.rela.rz_addend;
- pin_internal_relocs (sec, internal_relocs);
- }
- else
- {
- bfd_vma addend_displacement;
- reloc_bfd_fix *fix;
-
- addend_displacement =
- new_reloc.target_offset + new_reloc.virtual_offset;
- fix = reloc_bfd_fix_init (sec, source_offset, rz_type,
- target_sec,
- addend_displacement, TRUE);
- add_fix (sec, fix);
- }
- }
- }
- }
-
- if ((relax_info->is_relaxable_literal_section
- || relax_info->is_relaxable_asm_section)
- && action_list_count (&relax_info->action_list))
- {
- /* Walk through the planned actions and build up a table
- of move, copy and fill records. Use the move, copy and
- fill records to perform the actions once. */
-
- bfd_size_type final_size, copy_size, orig_insn_size;
- bfd_byte *scratch = NULL;
- bfd_byte *dup_contents = NULL;
- bfd_size_type orig_size = sec->size;
- bfd_vma orig_dot = 0;
- bfd_vma orig_dot_copied = 0; /* Byte copied already from
- orig dot in physical memory. */
- bfd_vma orig_dot_vo = 0; /* Virtual offset from orig_dot. */
- bfd_vma dup_dot = 0;
-
- text_action *action;
-
- final_size = sec->size;
-
- splay_tree_foreach (relax_info->action_list.tree,
- action_remove_bytes_fn, &final_size);
- scratch = (bfd_byte *) bfd_zmalloc (final_size);
- dup_contents = (bfd_byte *) bfd_zmalloc (final_size);
-
- /* The dot is the current fill location. */
-#if DEBUG
- print_action_list (stderr, &relax_info->action_list);
-#endif
-
- for (action = action_first (&relax_info->action_list); action;
- action = action_next (&relax_info->action_list, action))
- {
- virtual_action = FALSE;
- if (action->offset > orig_dot)
- {
- orig_dot += orig_dot_copied;
- orig_dot_copied = 0;
- orig_dot_vo = 0;
- /* Out of the virtual world. */
- }
-
- if (action->offset > orig_dot)
- {
- copy_size = action->offset - orig_dot;
- memmove (&dup_contents[dup_dot], &contents[orig_dot], copy_size);
- orig_dot += copy_size;
- dup_dot += copy_size;
- BFD_ASSERT (action->offset == orig_dot);
- }
- else if (action->offset < orig_dot)
- {
- if (action->action == ta_fill
- && action->offset - action->removed_bytes == orig_dot)
- {
- /* This is OK because the fill only effects the dup_dot. */
- }
- else if (action->action == ta_add_literal)
- {
- /* TBD. Might need to handle this. */
- }
- }
- if (action->offset == orig_dot)
- {
- if (action->virtual_offset > orig_dot_vo)
- {
- if (orig_dot_vo == 0)
- {
- /* Need to copy virtual_offset bytes. Probably four. */
- copy_size = action->virtual_offset - orig_dot_vo;
- memmove (&dup_contents[dup_dot],
- &contents[orig_dot], copy_size);
- orig_dot_copied = copy_size;
- dup_dot += copy_size;
- }
- virtual_action = TRUE;
- }
- else
- BFD_ASSERT (action->virtual_offset <= orig_dot_vo);
- }
- switch (action->action)
- {
- case ta_remove_literal:
- case ta_remove_insn:
- BFD_ASSERT (action->removed_bytes >= 0);
- orig_dot += action->removed_bytes;
- break;
-
- case ta_narrow_insn:
- orig_insn_size = 3;
- copy_size = 2;
- memmove (scratch, &contents[orig_dot], orig_insn_size);
- BFD_ASSERT (action->removed_bytes == 1);
- rv = narrow_instruction (scratch, final_size, 0);
- BFD_ASSERT (rv);
- memmove (&dup_contents[dup_dot], scratch, copy_size);
- orig_dot += orig_insn_size;
- dup_dot += copy_size;
- break;
-
- case ta_fill:
- if (action->removed_bytes >= 0)
- orig_dot += action->removed_bytes;
- else
- {
- /* Already zeroed in dup_contents. Just bump the
- counters. */
- dup_dot += (-action->removed_bytes);
- }
- break;
-
- case ta_none:
- BFD_ASSERT (action->removed_bytes == 0);
- break;
-
- case ta_convert_longcall:
- case ta_remove_longcall:
- /* These will be removed or converted before we get here. */
- BFD_ASSERT (0);
- break;
-
- case ta_widen_insn:
- orig_insn_size = 2;
- copy_size = 3;
- memmove (scratch, &contents[orig_dot], orig_insn_size);
- BFD_ASSERT (action->removed_bytes == -1);
- rv = widen_instruction (scratch, final_size, 0);
- BFD_ASSERT (rv);
- memmove (&dup_contents[dup_dot], scratch, copy_size);
- orig_dot += orig_insn_size;
- dup_dot += copy_size;
- break;
-
- case ta_add_literal:
- orig_insn_size = 0;
- copy_size = 4;
- BFD_ASSERT (action->removed_bytes == -4);
- /* TBD -- place the literal value here and insert
- into the table. */
- memset (&dup_contents[dup_dot], 0, 4);
- pin_internal_relocs (sec, internal_relocs);
- pin_contents (sec, contents);
-
- if (!move_literal (abfd, link_info, sec, dup_dot, dup_contents,
- relax_info, &internal_relocs, &action->value))
- goto error_return;
-
- if (virtual_action)
- orig_dot_vo += copy_size;
-
- orig_dot += orig_insn_size;
- dup_dot += copy_size;
- break;
-
- default:
- /* Not implemented yet. */
- BFD_ASSERT (0);
- break;
- }
-
- BFD_ASSERT (dup_dot <= final_size);
- BFD_ASSERT (orig_dot <= orig_size);
- }
-
- orig_dot += orig_dot_copied;
- orig_dot_copied = 0;
-
- if (orig_dot != orig_size)
- {
- copy_size = orig_size - orig_dot;
- BFD_ASSERT (orig_size > orig_dot);
- BFD_ASSERT (dup_dot + copy_size == final_size);
- memmove (&dup_contents[dup_dot], &contents[orig_dot], copy_size);
- orig_dot += copy_size;
- dup_dot += copy_size;
- }
- BFD_ASSERT (orig_size == orig_dot);
- BFD_ASSERT (final_size == dup_dot);
-
- /* Move the dup_contents back. */
- if (final_size > orig_size)
- {
- /* Contents need to be reallocated. Swap the dup_contents into
- contents. */
- sec->contents = dup_contents;
- free (contents);
- contents = dup_contents;
- pin_contents (sec, contents);
- }
- else
- {
- BFD_ASSERT (final_size <= orig_size);
- memset (contents, 0, orig_size);
- memcpy (contents, dup_contents, final_size);
- free (dup_contents);
- }
- free (scratch);
- pin_contents (sec, contents);
-
- if (sec->rawsize == 0)
- sec->rawsize = sec->size;
- sec->size = final_size;
- }
-
- error_return:
- release_internal_relocs (sec, internal_relocs);
- release_contents (sec, contents);
- return ok;
-}
-
-
-static bfd_boolean
-translate_section_fixes (asection *sec)
-{
- xtensa_relax_info *relax_info;
- reloc_bfd_fix *r;
-
- relax_info = get_xtensa_relax_info (sec);
- if (!relax_info)
- return TRUE;
-
- for (r = relax_info->fix_list; r != NULL; r = r->next)
- if (!translate_reloc_bfd_fix (r))
- return FALSE;
-
- return TRUE;
-}
-
-
-/* Translate a fix given the mapping in the relax info for the target
- section. If it has already been translated, no work is required. */
-
-static bfd_boolean
-translate_reloc_bfd_fix (reloc_bfd_fix *fix)
-{
- reloc_bfd_fix new_fix;
- asection *sec;
- xtensa_relax_info *relax_info;
- removed_literal *removed;
- bfd_vma new_offset, target_offset;
-
- if (fix->translated)
- return TRUE;
-
- sec = fix->target_sec;
- target_offset = fix->target_offset;
-
- relax_info = get_xtensa_relax_info (sec);
- if (!relax_info)
- {
- fix->translated = TRUE;
- return TRUE;
- }
-
- new_fix = *fix;
-
- /* The fix does not need to be translated if the section cannot change. */
- if (!relax_info->is_relaxable_literal_section
- && !relax_info->is_relaxable_asm_section)
- {
- fix->translated = TRUE;
- return TRUE;
- }
-
- /* If the literal has been moved and this relocation was on an
- opcode, then the relocation should move to the new literal
- location. Otherwise, the relocation should move within the
- section. */
-
- removed = FALSE;
- if (is_operand_relocation (fix->src_type))
- {
- /* Check if the original relocation is against a literal being
- removed. */
- removed = find_removed_literal (&relax_info->removed_list,
- target_offset);
- }
-
- if (removed)
- {
- asection *new_sec;
-
- /* The fact that there is still a relocation to this literal indicates
- that the literal is being coalesced, not simply removed. */
- BFD_ASSERT (removed->to.abfd != NULL);
-
- /* This was moved to some other address (possibly another section). */
- new_sec = rz_reloc_get_section (&removed->to);
- if (new_sec != sec)
- {
- sec = new_sec;
- relax_info = get_xtensa_relax_info (sec);
- if (!relax_info ||
- (!relax_info->is_relaxable_literal_section
- && !relax_info->is_relaxable_asm_section))
- {
- target_offset = removed->to.target_offset;
- new_fix.target_sec = new_sec;
- new_fix.target_offset = target_offset;
- new_fix.translated = TRUE;
- *fix = new_fix;
- return TRUE;
- }
- }
- target_offset = removed->to.target_offset;
- new_fix.target_sec = new_sec;
- }
-
- /* The target address may have been moved within its section. */
- new_offset = offset_with_removed_text (&relax_info->action_list,
- target_offset);
-
- new_fix.target_offset = new_offset;
- new_fix.target_offset = new_offset;
- new_fix.translated = TRUE;
- *fix = new_fix;
- return TRUE;
-}
-
-
-/* Fix up a relocation to take account of removed literals. */
-
-static asection *
-translate_reloc (const rz_reloc *orig_rel, rz_reloc *new_rel, asection *sec)
-{
- xtensa_relax_info *relax_info;
- removed_literal *removed;
- bfd_vma target_offset, base_offset;
-
- *new_rel = *orig_rel;
-
- if (!rz_reloc_is_defined (orig_rel))
- return sec ;
-
- relax_info = get_xtensa_relax_info (sec);
- BFD_ASSERT (relax_info && (relax_info->is_relaxable_literal_section
- || relax_info->is_relaxable_asm_section));
-
- target_offset = orig_rel->target_offset;
-
- removed = FALSE;
- if (is_operand_relocation (ELF32_R_TYPE (orig_rel->rela.rz_info)))
- {
- /* Check if the original relocation is against a literal being
- removed. */
- removed = find_removed_literal (&relax_info->removed_list,
- target_offset);
- }
- if (removed && removed->to.abfd)
- {
- asection *new_sec;
-
- /* The fact that there is still a relocation to this literal indicates
- that the literal is being coalesced, not simply removed. */
- BFD_ASSERT (removed->to.abfd != NULL);
-
- /* This was moved to some other address
- (possibly in another section). */
- *new_rel = removed->to;
- new_sec = rz_reloc_get_section (new_rel);
- if (new_sec != sec)
- {
- sec = new_sec;
- relax_info = get_xtensa_relax_info (sec);
- if (!relax_info
- || (!relax_info->is_relaxable_literal_section
- && !relax_info->is_relaxable_asm_section))
- return sec;
- }
- target_offset = new_rel->target_offset;
- }
-
- /* Find the base offset of the reloc symbol, excluding any addend from the
- reloc or from the section contents (for a partial_inplace reloc). Then
- find the adjusted values of the offsets due to relaxation. The base
- offset is needed to determine the change to the reloc's addend; the reloc
- addend should not be adjusted due to relaxations located before the base
- offset. */
-
- base_offset = rz_reloc_get_target_offset (new_rel) - new_rel->rela.rz_addend;
- if (base_offset <= target_offset)
- {
- int base_removed = removed_by_actions_map (&relax_info->action_list,
- base_offset, FALSE);
- int addend_removed = removed_by_actions_map (&relax_info->action_list,
- target_offset, FALSE) -
- base_removed;
-
- new_rel->target_offset = target_offset - base_removed - addend_removed;
- new_rel->rela.rz_addend -= addend_removed;
- }
- else
- {
- /* Handle a negative addend. The base offset comes first. */
- int tgt_removed = removed_by_actions_map (&relax_info->action_list,
- target_offset, FALSE);
- int addend_removed = removed_by_actions_map (&relax_info->action_list,
- base_offset, FALSE) -
- tgt_removed;
-
- new_rel->target_offset = target_offset - tgt_removed;
- new_rel->rela.rz_addend += addend_removed;
- }
-
- return sec;
-}
-
-
-/* For dynamic links, there may be a dynamic relocation for each
- literal. The number of dynamic relocations must be computed in
- size_dynamic_sections, which occurs before relaxation. When a
- literal is removed, this function checks if there is a corresponding
- dynamic relocation and shrinks the size of the appropriate dynamic
- relocation section accordingly. At this point, the contents of the
- dynamic relocation sections have not yet been filled in, so there's
- nothing else that needs to be done. */
-
-static void
-shrink_dynamic_reloc_sections (struct bfd_link_info *info,
- bfd *abfd,
- asection *input_section,
- Elf_Internal_Rela *rel)
-{
- struct elf_xtensa_link_hash_table *htab;
- Elf_Internal_Shdr *symtab_hdr;
- struct elf_link_hash_entry **sym_hashes;
- unsigned long rz_symndx;
- int rz_type;
- struct elf_link_hash_entry *h;
- bfd_boolean dynamic_symbol;
-
- htab = elf_xtensa_hash_table (info);
- if (htab == NULL)
- return;
-
- symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
- sym_hashes = elf_sym_hashes (abfd);
-
- rz_type = ELF32_R_TYPE (rel->rz_info);
- rz_symndx = ELF32_R_SYM (rel->rz_info);
-
- if (rz_symndx < symtab_hdr->sh_info)
- h = NULL;
- else
- h = sym_hashes[rz_symndx - symtab_hdr->sh_info];
-
- dynamic_symbol = elf_xtensa_dynamic_symbol_p (h, info);
-
- if ((rz_type == RZ_XTENSA_32 || rz_type == RZ_XTENSA_PLT)
- && (input_section->flags & SEC_ALLOC) != 0
- && (dynamic_symbol || info->shared))
- {
- asection *srel;
- bfd_boolean is_plt = FALSE;
-
- if (dynamic_symbol && rz_type == RZ_XTENSA_PLT)
- {
- srel = htab->srelplt;
- is_plt = TRUE;
- }
- else
- srel = htab->srelgot;
-
- /* Reduce size of the .rela.* section by one reloc. */
- BFD_ASSERT (srel != NULL);
- BFD_ASSERT (srel->size >= sizeof (Elf32_External_Rela));
- srel->size -= sizeof (Elf32_External_Rela);
-
- if (is_plt)
- {
- asection *splt, *sgotplt, *srelgot;
- int reloc_index, chunk;
-
- /* Find the PLT reloc index of the entry being removed. This
- is computed from the size of ".rela.plt". It is needed to
- figure out which PLT chunk to resize. Usually "last index
- = size - 1" since the index starts at zero, but in this
- context, the size has just been decremented so there's no
- need to subtract one. */
- reloc_index = srel->size / sizeof (Elf32_External_Rela);
-
- chunk = reloc_index / PLT_ENTRIES_PER_CHUNK;
- splt = elf_xtensa_get_plt_section (info, chunk);
- sgotplt = elf_xtensa_get_gotplt_section (info, chunk);
- BFD_ASSERT (splt != NULL && sgotplt != NULL);
-
- /* Check if an entire PLT chunk has just been eliminated. */
- if (reloc_index % PLT_ENTRIES_PER_CHUNK == 0)
- {
- /* The two magic GOT entries for that chunk can go away. */
- srelgot = htab->srelgot;
- BFD_ASSERT (srelgot != NULL);
- srelgot->reloc_count -= 2;
- srelgot->size -= 2 * sizeof (Elf32_External_Rela);
- sgotplt->size -= 8;
-
- /* There should be only one entry left (and it will be
- removed below). */
- BFD_ASSERT (sgotplt->size == 4);
- BFD_ASSERT (splt->size == PLT_ENTRY_SIZE);
- }
-
- BFD_ASSERT (sgotplt->size >= 4);
- BFD_ASSERT (splt->size >= PLT_ENTRY_SIZE);
-
- sgotplt->size -= 4;
- splt->size -= PLT_ENTRY_SIZE;
- }
- }
-}
-
-
-/* Take an rz_rel and move it to another section. This usually
- requires extending the interal_relocation array and pinning it. If
- the original rz_rel is from the same BFD, we can complete this here.
- Otherwise, we add a fix record to let the final link fix the
- appropriate address. Contents and internal relocations for the
- section must be pinned after calling this routine. */
-
-static bfd_boolean
-move_literal (bfd *abfd,
- struct bfd_link_info *link_info,
- asection *sec,
- bfd_vma offset,
- bfd_byte *contents,
- xtensa_relax_info *relax_info,
- Elf_Internal_Rela **internal_relocs_p,
- const literal_value *lit)
-{
- Elf_Internal_Rela *new_relocs = NULL;
- size_t new_relocs_count = 0;
- Elf_Internal_Rela this_rela;
- const rz_reloc *rz_rel;
-
- rz_rel = &lit->rz_rel;
- BFD_ASSERT (elf_section_data (sec)->relocs == *internal_relocs_p);
-
- if (rz_reloc_is_const (rz_rel))
- bfd_put_32 (abfd, lit->value, contents + offset);
- else
- {
- int rz_type;
- unsigned i;
- reloc_bfd_fix *fix;
- unsigned insert_at;
-
- rz_type = ELF32_R_TYPE (rz_rel->rela.rz_info);
-
- /* This is the difficult case. We have to create a fix up. */
- this_rela.rz_offset = offset;
- this_rela.rz_info = ELF32_R_INFO (0, rz_type);
- this_rela.rz_addend =
- rz_rel->target_offset - rz_reloc_get_target_offset (rz_rel);
- bfd_put_32 (abfd, lit->value, contents + offset);
-
- /* Currently, we cannot move relocations during a relocatable link. */
- BFD_ASSERT (!link_info->relocatable);
- fix = reloc_bfd_fix_init (sec, offset, rz_type,
- rz_reloc_get_section (rz_rel),
- rz_rel->target_offset + rz_rel->virtual_offset,
- FALSE);
- /* We also need to mark that relocations are needed here. */
- sec->flags |= SEC_RELOC;
-
- translate_reloc_bfd_fix (fix);
- /* This fix has not yet been translated. */
- add_fix (sec, fix);
-
- /* Add the relocation. If we have already allocated our own
- space for the relocations and we have room for more, then use
- it. Otherwise, allocate new space and move the literals. */
- insert_at = sec->reloc_count;
- for (i = 0; i < sec->reloc_count; ++i)
- {
- if (this_rela.rz_offset < (*internal_relocs_p)[i].rz_offset)
- {
- insert_at = i;
- break;
- }
- }
-
- if (*internal_relocs_p != relax_info->allocated_relocs
- || sec->reloc_count + 1 > relax_info->allocated_relocs_count)
- {
- BFD_ASSERT (relax_info->allocated_relocs == NULL
- || sec->reloc_count == relax_info->relocs_count);
-
- if (relax_info->allocated_relocs_count == 0)
- new_relocs_count = (sec->reloc_count + 2) * 2;
- else
- new_relocs_count = (relax_info->allocated_relocs_count + 2) * 2;
-
- new_relocs = (Elf_Internal_Rela *)
- bfd_zmalloc (sizeof (Elf_Internal_Rela) * (new_relocs_count));
- if (!new_relocs)
- return FALSE;
-
- /* We could handle this more quickly by finding the split point. */
- if (insert_at != 0)
- memcpy (new_relocs, *internal_relocs_p,
- insert_at * sizeof (Elf_Internal_Rela));
-
- new_relocs[insert_at] = this_rela;
-
- if (insert_at != sec->reloc_count)
- memcpy (new_relocs + insert_at + 1,
- (*internal_relocs_p) + insert_at,
- (sec->reloc_count - insert_at)
- * sizeof (Elf_Internal_Rela));
-
- if (*internal_relocs_p != relax_info->allocated_relocs)
- {
- /* The first time we re-allocate, we can only free the
- old relocs if they were allocated with bfd_malloc.
- This is not true when keep_memory is in effect. */
- if (!link_info->keep_memory)
- free (*internal_relocs_p);
- }
- else
- free (*internal_relocs_p);
- relax_info->allocated_relocs = new_relocs;
- relax_info->allocated_relocs_count = new_relocs_count;
- elf_section_data (sec)->relocs = new_relocs;
- sec->reloc_count++;
- relax_info->relocs_count = sec->reloc_count;
- *internal_relocs_p = new_relocs;
- }
- else
- {
- if (insert_at != sec->reloc_count)
- {
- unsigned idx;
- for (idx = sec->reloc_count; idx > insert_at; idx--)
- (*internal_relocs_p)[idx] = (*internal_relocs_p)[idx-1];
- }
- (*internal_relocs_p)[insert_at] = this_rela;
- sec->reloc_count++;
- if (relax_info->allocated_relocs)
- relax_info->relocs_count = sec->reloc_count;
- }
- }
- return TRUE;
-}
-
-
-/* This is similar to relax_section except that when a target is moved,
- we shift addresses up. We also need to modify the size. This
- algorithm does NOT allow for relocations into the middle of the
- property sections. */
-
-static bfd_boolean
-relax_property_section (bfd *abfd,
- asection *sec,
- struct bfd_link_info *link_info)
-{
- Elf_Internal_Rela *internal_relocs;
- bfd_byte *contents;
- unsigned i;
- bfd_boolean ok = TRUE;
- bfd_boolean is_full_prop_section;
- size_t last_zfill_target_offset = 0;
- asection *last_zfill_target_sec = NULL;
- bfd_size_type sec_size;
- bfd_size_type entry_size;
-
- sec_size = bfd_get_section_limit (abfd, sec);
- internal_relocs = retrieve_internal_relocs (abfd, sec,
- link_info->keep_memory);
- contents = retrieve_contents (abfd, sec, link_info->keep_memory);
- if (contents == NULL && sec_size != 0)
- {
- ok = FALSE;
- goto error_return;
- }
-
- is_full_prop_section = xtensa_is_proptable_section (sec);
- if (is_full_prop_section)
- entry_size = 12;
- else
- entry_size = 8;
-
- if (internal_relocs)
- {
- for (i = 0; i < sec->reloc_count; i++)
- {
- Elf_Internal_Rela *irel;
- xtensa_relax_info *target_relax_info;
- unsigned rz_type;
- asection *target_sec;
- literal_value val;
- bfd_byte *size_p, *flags_p;
-
- /* Locally change the source address.
- Translate the target to the new target address.
- If it points to this section and has been removed, MOVE IT.
- Also, don't forget to modify the associated SIZE at
- (offset + 4). */
-
- irel = &internal_relocs[i];
- rz_type = ELF32_R_TYPE (irel->rz_info);
- if (rz_type == RZ_XTENSA_NONE)
- continue;
-
- /* Find the literal value. */
- rz_reloc_init (&val.rz_rel, abfd, irel, contents, sec_size);
- size_p = &contents[irel->rz_offset + 4];
- flags_p = NULL;
- if (is_full_prop_section)
- flags_p = &contents[irel->rz_offset + 8];
- BFD_ASSERT (irel->rz_offset + entry_size <= sec_size);
-
- target_sec = rz_reloc_get_section (&val.rz_rel);
- target_relax_info = get_xtensa_relax_info (target_sec);
-
- if (target_relax_info
- && (target_relax_info->is_relaxable_literal_section
- || target_relax_info->is_relaxable_asm_section ))
- {
- /* Translate the relocation's destination. */
- bfd_vma old_offset = val.rz_rel.target_offset;
- bfd_vma new_offset;
- long old_size, new_size;
- int removed_by_old_offset =
- removed_by_actions_map (&target_relax_info->action_list,
- old_offset, FALSE);
- new_offset = old_offset - removed_by_old_offset;
-
- /* Assert that we are not out of bounds. */
- old_size = bfd_get_32 (abfd, size_p);
- new_size = old_size;
-
- if (old_size == 0)
- {
- /* Only the first zero-sized unreachable entry is
- allowed to expand. In this case the new offset
- should be the offset before the fill and the new
- size is the expansion size. For other zero-sized
- entries the resulting size should be zero with an
- offset before or after the fill address depending
- on whether the expanding unreachable entry
- preceeds it. */
- if (last_zfill_target_sec == 0
- || last_zfill_target_sec != target_sec
- || last_zfill_target_offset != old_offset)
- {
- bfd_vma new_end_offset = new_offset;
-
- /* Recompute the new_offset, but this time don't
- include any fill inserted by relaxation. */
- removed_by_old_offset =
- removed_by_actions_map (&target_relax_info->action_list,
- old_offset, TRUE);
- new_offset = old_offset - removed_by_old_offset;
-
- /* If it is not unreachable and we have not yet
- seen an unreachable at this address, place it
- before the fill address. */
- if (flags_p && (bfd_get_32 (abfd, flags_p)
- & XTENSA_PROP_UNREACHABLE) != 0)
- {
- new_size = new_end_offset - new_offset;
-
- last_zfill_target_sec = target_sec;
- last_zfill_target_offset = old_offset;
- }
- }
- }
- else
- {
- int removed_by_old_offset_size =
- removed_by_actions_map (&target_relax_info->action_list,
- old_offset + old_size, TRUE);
- new_size -= removed_by_old_offset_size - removed_by_old_offset;
- }
-
- if (new_size != old_size)
- {
- bfd_put_32 (abfd, new_size, size_p);
- pin_contents (sec, contents);
- }
-
- if (new_offset != old_offset)
- {
- bfd_vma diff = new_offset - old_offset;
- irel->rz_addend += diff;
- pin_internal_relocs (sec, internal_relocs);
- }
- }
- }
- }
-
- /* Combine adjacent property table entries. This is also done in
- finish_dynamic_sections() but at that point it's too late to
- reclaim the space in the output section, so we do this twice. */
-
- if (internal_relocs && (!link_info->relocatable
- || xtensa_is_littable_section (sec)))
- {
- Elf_Internal_Rela *last_irel = NULL;
- Elf_Internal_Rela *irel, *next_rel, *rel_end;
- int removed_bytes = 0;
- bfd_vma offset;
- flagword predef_flags;
-
- predef_flags = xtensa_get_property_predef_flags (sec);
-
- /* Walk over memory and relocations at the same time.
- This REQUIRES that the internal_relocs be sorted by offset. */
- qsort (internal_relocs, sec->reloc_count, sizeof (Elf_Internal_Rela),
- internal_reloc_compare);
-
- pin_internal_relocs (sec, internal_relocs);
- pin_contents (sec, contents);
-
- next_rel = internal_relocs;
- rel_end = internal_relocs + sec->reloc_count;
-
- BFD_ASSERT (sec->size % entry_size == 0);
-
- for (offset = 0; offset < sec->size; offset += entry_size)
- {
- Elf_Internal_Rela *offset_rel, *extra_rel;
- bfd_vma bytes_to_remove, size, actual_offset;
- bfd_boolean remove_this_rel;
- flagword flags;
-
- /* Find the first relocation for the entry at the current offset.
- Adjust the offsets of any extra relocations for the previous
- entry. */
- offset_rel = NULL;
- if (next_rel)
- {
- for (irel = next_rel; irel < rel_end; irel++)
- {
- if ((irel->rz_offset == offset
- && ELF32_R_TYPE (irel->rz_info) != RZ_XTENSA_NONE)
- || irel->rz_offset > offset)
- {
- offset_rel = irel;
- break;
- }
- irel->rz_offset -= removed_bytes;
- }
- }
-
- /* Find the next relocation (if there are any left). */
- extra_rel = NULL;
- if (offset_rel)
- {
- for (irel = offset_rel + 1; irel < rel_end; irel++)
- {
- if (ELF32_R_TYPE (irel->rz_info) != RZ_XTENSA_NONE)
- {
- extra_rel = irel;
- break;
- }
- }
- }
-
- /* Check if there are relocations on the current entry. There
- should usually be a relocation on the offset field. If there
- are relocations on the size or flags, then we can't optimize
- this entry. Also, find the next relocation to examine on the
- next iteration. */
- if (offset_rel)
- {
- if (offset_rel->rz_offset >= offset + entry_size)
- {
- next_rel = offset_rel;
- /* There are no relocations on the current entry, but we
- might still be able to remove it if the size is zero. */
- offset_rel = NULL;
- }
- else if (offset_rel->rz_offset > offset
- || (extra_rel
- && extra_rel->rz_offset < offset + entry_size))
- {
- /* There is a relocation on the size or flags, so we can't
- do anything with this entry. Continue with the next. */
- next_rel = offset_rel;
- continue;
- }
- else
- {
- BFD_ASSERT (offset_rel->rz_offset == offset);
- offset_rel->rz_offset -= removed_bytes;
- next_rel = offset_rel + 1;
- }
- }
- else
- next_rel = NULL;
-
- remove_this_rel = FALSE;
- bytes_to_remove = 0;
- actual_offset = offset - removed_bytes;
- size = bfd_get_32 (abfd, &contents[actual_offset + 4]);
-
- if (is_full_prop_section)
- flags = bfd_get_32 (abfd, &contents[actual_offset + 8]);
- else
- flags = predef_flags;
-
- if (size == 0
- && (flags & XTENSA_PROP_ALIGN) == 0
- && (flags & XTENSA_PROP_UNREACHABLE) == 0)
- {
- /* Always remove entries with zero size and no alignment. */
- bytes_to_remove = entry_size;
- if (offset_rel)
- remove_this_rel = TRUE;
- }
- else if (offset_rel
- && ELF32_R_TYPE (offset_rel->rz_info) == RZ_XTENSA_32)
- {
- if (last_irel)
- {
- flagword old_flags;
- bfd_vma old_size =
- bfd_get_32 (abfd, &contents[last_irel->rz_offset + 4]);
- bfd_vma old_address =
- (last_irel->rz_addend
- + bfd_get_32 (abfd, &contents[last_irel->rz_offset]));
- bfd_vma new_address =
- (offset_rel->rz_addend
- + bfd_get_32 (abfd, &contents[actual_offset]));
- if (is_full_prop_section)
- old_flags = bfd_get_32
- (abfd, &contents[last_irel->rz_offset + 8]);
- else
- old_flags = predef_flags;
-
- if ((ELF32_R_SYM (offset_rel->rz_info)
- == ELF32_R_SYM (last_irel->rz_info))
- && old_address + old_size == new_address
- && old_flags == flags
- && (old_flags & XTENSA_PROP_INSN_BRANCH_TARGET) == 0
- && (old_flags & XTENSA_PROP_INSN_LOOP_TARGET) == 0)
- {
- /* Fix the old size. */
- bfd_put_32 (abfd, old_size + size,
- &contents[last_irel->rz_offset + 4]);
- bytes_to_remove = entry_size;
- remove_this_rel = TRUE;
- }
- else
- last_irel = offset_rel;
- }
- else
- last_irel = offset_rel;
- }
-
- if (remove_this_rel)
- {
- offset_rel->rz_info = ELF32_R_INFO (0, RZ_XTENSA_NONE);
- offset_rel->rz_offset = 0;
- }
-
- if (bytes_to_remove != 0)
- {
- removed_bytes += bytes_to_remove;
- if (offset + bytes_to_remove < sec->size)
- memmove (&contents[actual_offset],
- &contents[actual_offset + bytes_to_remove],
- sec->size - offset - bytes_to_remove);
- }
- }
-
- if (removed_bytes)
- {
- /* Fix up any extra relocations on the last entry. */
- for (irel = next_rel; irel < rel_end; irel++)
- irel->rz_offset -= removed_bytes;
-
- /* Clear the removed bytes. */
- memset (&contents[sec->size - removed_bytes], 0, removed_bytes);
-
- if (sec->rawsize == 0)
- sec->rawsize = sec->size;
- sec->size -= removed_bytes;
-
- if (xtensa_is_littable_section (sec))
- {
- asection *sgotloc = elf_xtensa_hash_table (link_info)->sgotloc;
- if (sgotloc)
- sgotloc->size -= removed_bytes;
- }
- }
- }
-
- error_return:
- release_internal_relocs (sec, internal_relocs);
- release_contents (sec, contents);
- return ok;
-}
-
-
-/* Third relaxation pass. */
-
-/* Change symbol values to account for removed literals. */
-
-bfd_boolean
-relax_section_symbols (bfd *abfd, asection *sec)
-{
- xtensa_relax_info *relax_info;
- unsigned int sec_shndx;
- Elf_Internal_Shdr *symtab_hdr;
- Elf_Internal_Sym *isymbuf;
- unsigned i, num_syms, num_locals;
-
- relax_info = get_xtensa_relax_info (sec);
- BFD_ASSERT (relax_info);
-
- if (!relax_info->is_relaxable_literal_section
- && !relax_info->is_relaxable_asm_section)
- return TRUE;
-
- sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
-
- symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
- isymbuf = retrieve_local_syms (abfd);
-
- num_syms = symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
- num_locals = symtab_hdr->sh_info;
-
- /* Adjust the local symbols defined in this section. */
- for (i = 0; i < num_locals; i++)
- {
- Elf_Internal_Sym *isym = &isymbuf[i];
-
- if (isym->st_shndx == sec_shndx)
- {
- bfd_vma orig_addr = isym->st_value;
- int removed = removed_by_actions_map (&relax_info->action_list,
- orig_addr, FALSE);
-
- isym->st_value -= removed;
- if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC)
- isym->st_size -=
- removed_by_actions_map (&relax_info->action_list,
- orig_addr + isym->st_size, FALSE) -
- removed;
- }
- }
-
- /* Now adjust the global symbols defined in this section. */
- for (i = 0; i < (num_syms - num_locals); i++)
- {
- struct elf_link_hash_entry *sym_hash;
-
- sym_hash = elf_sym_hashes (abfd)[i];
-
- if (sym_hash->root.type == bfd_link_hash_warning)
- sym_hash = (struct elf_link_hash_entry *) sym_hash->root.u.i.link;
-
- if ((sym_hash->root.type == bfd_link_hash_defined
- || sym_hash->root.type == bfd_link_hash_defweak)
- && sym_hash->root.u.def.section == sec)
- {
- bfd_vma orig_addr = sym_hash->root.u.def.value;
- int removed = removed_by_actions_map (&relax_info->action_list,
- orig_addr, FALSE);
-
- sym_hash->root.u.def.value -= removed;
-
- if (sym_hash->type == STT_FUNC)
- sym_hash->size -=
- removed_by_actions_map (&relax_info->action_list,
- orig_addr + sym_hash->size, FALSE) -
- removed;
- }
- }
-
- return TRUE;
-}
-
-
-/* "Fix" handling functions, called while performing relocations. */
-
-static bfd_boolean
-do_fix_for_relocatable_link (Elf_Internal_Rela *rel,
- bfd *input_bfd,
- asection *input_section,
- bfd_byte *contents)
-{
- rz_reloc rz_rel;
- asection *sec, *old_sec;
- bfd_vma old_offset;
- int rz_type = ELF32_R_TYPE (rel->rz_info);
- reloc_bfd_fix *fix;
-
- if (rz_type == RZ_XTENSA_NONE)
- return TRUE;
-
- fix = get_bfd_fix (input_section, rel->rz_offset, rz_type);
- if (!fix)
- return TRUE;
-
- rz_reloc_init (&rz_rel, input_bfd, rel, contents,
- bfd_get_section_limit (input_bfd, input_section));
- old_sec = rz_reloc_get_section (&rz_rel);
- old_offset = rz_rel.target_offset;
-
- if (!old_sec || !rz_reloc_is_defined (&rz_rel))
- {
- if (rz_type != RZ_XTENSA_ASM_EXPAND)
- {
- (*_bfd_error_handler)
- (_("%B(%A+0x%lx): unexpected fix for %s relocation"),
- input_bfd, input_section, rel->rz_offset,
- elf_howto_table[rz_type].name);
- return FALSE;
- }
- /* Leave it be. Resolution will happen in a later stage. */
- }
- else
- {
- sec = fix->target_sec;
- rel->rz_addend += ((sec->output_offset + fix->target_offset)
- - (old_sec->output_offset + old_offset));
- }
- return TRUE;
-}
-
-
-static void
-do_fix_for_final_link (Elf_Internal_Rela *rel,
- bfd *input_bfd,
- asection *input_section,
- bfd_byte *contents,
- bfd_vma *relocationp)
-{
- asection *sec;
- int rz_type = ELF32_R_TYPE (rel->rz_info);
- reloc_bfd_fix *fix;
- bfd_vma fixup_diff;
-
- if (rz_type == RZ_XTENSA_NONE)
- return;
-
- fix = get_bfd_fix (input_section, rel->rz_offset, rz_type);
- if (!fix)
- return;
-
- sec = fix->target_sec;
-
- fixup_diff = rel->rz_addend;
- if (elf_howto_table[fix->src_type].partial_inplace)
- {
- bfd_vma inplace_val;
- BFD_ASSERT (fix->src_offset
- < bfd_get_section_limit (input_bfd, input_section));
- inplace_val = bfd_get_32 (input_bfd, &contents[fix->src_offset]);
- fixup_diff += inplace_val;
- }
-
- *relocationp = (sec->output_section->vma
- + sec->output_offset
- + fix->target_offset - fixup_diff);
-}
-
-
-/* Miscellaneous utility functions.... */
-
-static asection *
-elf_xtensa_get_plt_section (struct bfd_link_info *info, int chunk)
-{
- struct elf_xtensa_link_hash_table *htab;
- bfd *dynobj;
- char plt_name[10];
-
- if (chunk == 0)
- {
- htab = elf_xtensa_hash_table (info);
- if (htab == NULL)
- return NULL;
-
- return htab->splt;
- }
-
- dynobj = elf_hash_table (info)->dynobj;
- sprintf (plt_name, ".plt.%u", chunk);
- return bfd_get_linker_section (dynobj, plt_name);
-}
-
-
-static asection *
-elf_xtensa_get_gotplt_section (struct bfd_link_info *info, int chunk)
-{
- struct elf_xtensa_link_hash_table *htab;
- bfd *dynobj;
- char got_name[14];
-
- if (chunk == 0)
- {
- htab = elf_xtensa_hash_table (info);
- if (htab == NULL)
- return NULL;
- return htab->sgotplt;
- }
-
- dynobj = elf_hash_table (info)->dynobj;
- sprintf (got_name, ".got.plt.%u", chunk);
- return bfd_get_linker_section (dynobj, got_name);
-}
-
-
-/* Get the input section for a given symbol index.
- If the symbol is:
- . a section symbol, return the section;
- . a common symbol, return the common section;
- . an undefined symbol, return the undefined section;
- . an indirect symbol, follow the links;
- . an absolute value, return the absolute section. */
-
-static asection *
-get_elf_r_symndx_section (bfd *abfd, unsigned long rz_symndx)
-{
- Elf_Internal_Shdr *symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
- asection *target_sec = NULL;
- if (rz_symndx < symtab_hdr->sh_info)
- {
- Elf_Internal_Sym *isymbuf;
- unsigned int section_index;
-
- isymbuf = retrieve_local_syms (abfd);
- section_index = isymbuf[rz_symndx].st_shndx;
-
- if (section_index == SHN_UNDEF)
- target_sec = bfd_und_section_ptr;
- else if (section_index == SHN_ABS)
- target_sec = bfd_abs_section_ptr;
- else if (section_index == SHN_COMMON)
- target_sec = bfd_com_section_ptr;
- else
- target_sec = bfd_section_from_elf_index (abfd, section_index);
- }
- else
- {
- unsigned long indx = rz_symndx - symtab_hdr->sh_info;
- struct elf_link_hash_entry *h = elf_sym_hashes (abfd)[indx];
-
- while (h->root.type == bfd_link_hash_indirect
- || h->root.type == bfd_link_hash_warning)
- h = (struct elf_link_hash_entry *) h->root.u.i.link;
-
- switch (h->root.type)
- {
- case bfd_link_hash_defined:
- case bfd_link_hash_defweak:
- target_sec = h->root.u.def.section;
- break;
- case bfd_link_hash_common:
- target_sec = bfd_com_section_ptr;
- break;
- case bfd_link_hash_undefined:
- case bfd_link_hash_undefweak:
- target_sec = bfd_und_section_ptr;
- break;
- default: /* New indirect warning. */
- target_sec = bfd_und_section_ptr;
- break;
- }
- }
- return target_sec;
-}
-
-
-static struct elf_link_hash_entry *
-get_elf_r_symndx_hash_entry (bfd *abfd, unsigned long rz_symndx)
-{
- unsigned long indx;
- struct elf_link_hash_entry *h;
- Elf_Internal_Shdr *symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
-
- if (rz_symndx < symtab_hdr->sh_info)
- return NULL;
-
- indx = rz_symndx - symtab_hdr->sh_info;
- h = elf_sym_hashes (abfd)[indx];
- while (h->root.type == bfd_link_hash_indirect
- || h->root.type == bfd_link_hash_warning)
- h = (struct elf_link_hash_entry *) h->root.u.i.link;
- return h;
-}
-
-
-/* Get the section-relative offset for a symbol number. */
-
-static bfd_vma
-get_elf_r_symndx_offset (bfd *abfd, unsigned long rz_symndx)
-{
- Elf_Internal_Shdr *symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
- bfd_vma offset = 0;
-
- if (rz_symndx < symtab_hdr->sh_info)
- {
- Elf_Internal_Sym *isymbuf;
- isymbuf = retrieve_local_syms (abfd);
- offset = isymbuf[rz_symndx].st_value;
- }
- else
- {
- unsigned long indx = rz_symndx - symtab_hdr->sh_info;
- struct elf_link_hash_entry *h =
- elf_sym_hashes (abfd)[indx];
-
- while (h->root.type == bfd_link_hash_indirect
- || h->root.type == bfd_link_hash_warning)
- h = (struct elf_link_hash_entry *) h->root.u.i.link;
- if (h->root.type == bfd_link_hash_defined
- || h->root.type == bfd_link_hash_defweak)
- offset = h->root.u.def.value;
- }
- return offset;
-}
-
-
-static bfd_boolean
-is_reloc_sym_weak (bfd *abfd, Elf_Internal_Rela *rel)
-{
- unsigned long rz_symndx = ELF32_R_SYM (rel->rz_info);
- struct elf_link_hash_entry *h;
-
- h = get_elf_r_symndx_hash_entry (abfd, rz_symndx);
- if (h && h->root.type == bfd_link_hash_defweak)
- return TRUE;
- return FALSE;
-}
-
-
-static bfd_boolean
-pcrel_reloc_fits (xtensa_opcode opc,
- int opnd,
- bfd_vma self_address,
- bfd_vma dest_address)
-{
- xtensa_isa isa = xtensa_default_isa;
- uint32 valp = dest_address;
- if (xtensa_operand_do_reloc (isa, opc, opnd, &valp, self_address)
- || xtensa_operand_encode (isa, opc, opnd, &valp))
- return FALSE;
- return TRUE;
-}
-
-
-static bfd_boolean
-xtensa_is_property_section (asection *sec)
-{
- if (xtensa_is_insntable_section (sec)
- || xtensa_is_littable_section (sec)
- || xtensa_is_proptable_section (sec))
- return TRUE;
-
- return FALSE;
-}
-
-
-static bfd_boolean
-xtensa_is_insntable_section (asection *sec)
-{
- if (CONST_STRNEQ (sec->name, XTENSA_INSN_SEC_NAME)
- || CONST_STRNEQ (sec->name, ".gnu.linkonce.x."))
- return TRUE;
-
- return FALSE;
-}
-
-
-static bfd_boolean
-xtensa_is_littable_section (asection *sec)
-{
- if (CONST_STRNEQ (sec->name, XTENSA_LIT_SEC_NAME)
- || CONST_STRNEQ (sec->name, ".gnu.linkonce.p."))
- return TRUE;
-
- return FALSE;
-}
-
-
-static bfd_boolean
-xtensa_is_proptable_section (asection *sec)
-{
- if (CONST_STRNEQ (sec->name, XTENSA_PROP_SEC_NAME)
- || CONST_STRNEQ (sec->name, ".gnu.linkonce.prop."))
- return TRUE;
-
- return FALSE;
-}
-
-
-static int
-internal_reloc_compare (const void *ap, const void *bp)
-{
- const Elf_Internal_Rela *a = (const Elf_Internal_Rela *) ap;
- const Elf_Internal_Rela *b = (const Elf_Internal_Rela *) bp;
-
- if (a->rz_offset != b->rz_offset)
- return (a->rz_offset - b->rz_offset);
-
- /* We don't need to sort on these criteria for correctness,
- but enforcing a more strict ordering prevents unstable qsort
- from behaving differently with different implementations.
- Without the code below we get correct but different results
- on Solaris 2.7 and 2.8. We would like to always produce the
- same results no matter the host. */
-
- if (a->rz_info != b->rz_info)
- return (a->rz_info - b->rz_info);
-
- return (a->rz_addend - b->rz_addend);
-}
-
-
-static int
-internal_reloc_matches (const void *ap, const void *bp)
-{
- const Elf_Internal_Rela *a = (const Elf_Internal_Rela *) ap;
- const Elf_Internal_Rela *b = (const Elf_Internal_Rela *) bp;
-
- /* Check if one entry overlaps with the other; this shouldn't happen
- except when searching for a match. */
- return (a->rz_offset - b->rz_offset);
-}
-
-
-/* Predicate function used to look up a section in a particular group. */
-
-static bfd_boolean
-match_section_group (bfd *abfd ATTRIBUTE_UNUSED, asection *sec, void *inf)
-{
- const char *gname = inf;
- const char *group_name = elf_group_name (sec);
-
- return (group_name == gname
- || (group_name != NULL
- && gname != NULL
- && strcmp (group_name, gname) == 0));
-}
-
-
-static int linkonce_len = sizeof (".gnu.linkonce.") - 1;
-
-static char *
-xtensa_property_section_name (asection *sec, const char *base_name)
-{
- const char *suffix, *group_name;
- char *prop_sec_name;
-
- group_name = elf_group_name (sec);
- if (group_name)
- {
- suffix = strrchr (sec->name, '.');
- if (suffix == sec->name)
- suffix = 0;
- prop_sec_name = (char *) bfd_malloc (strlen (base_name) + 1
- + (suffix ? strlen (suffix) : 0));
- strcpy (prop_sec_name, base_name);
- if (suffix)
- strcat (prop_sec_name, suffix);
- }
- else if (strncmp (sec->name, ".gnu.linkonce.", linkonce_len) == 0)
- {
- char *linkonce_kind = 0;
-
- if (strcmp (base_name, XTENSA_INSN_SEC_NAME) == 0)
- linkonce_kind = "x.";
- else if (strcmp (base_name, XTENSA_LIT_SEC_NAME) == 0)
- linkonce_kind = "p.";
- else if (strcmp (base_name, XTENSA_PROP_SEC_NAME) == 0)
- linkonce_kind = "prop.";
- else
- abort ();
-
- prop_sec_name = (char *) bfd_malloc (strlen (sec->name)
- + strlen (linkonce_kind) + 1);
- memcpy (prop_sec_name, ".gnu.linkonce.", linkonce_len);
- strcpy (prop_sec_name + linkonce_len, linkonce_kind);
-
- suffix = sec->name + linkonce_len;
- /* For backward compatibility, replace "t." instead of inserting
- the new linkonce_kind (but not for "prop" sections). */
- if (CONST_STRNEQ (suffix, "t.") && linkonce_kind[1] == '.')
- suffix += 2;
- strcat (prop_sec_name + linkonce_len, suffix);
- }
- else
- prop_sec_name = strdup (base_name);
-
- return prop_sec_name;
-}
-
-
-static asection *
-xtensa_get_property_section (asection *sec, const char *base_name)
-{
- char *prop_sec_name;
- asection *prop_sec;
-
- prop_sec_name = xtensa_property_section_name (sec, base_name);
- prop_sec = bfd_get_section_by_name_if (sec->owner, prop_sec_name,
- match_section_group,
- (void *) elf_group_name (sec));
- free (prop_sec_name);
- return prop_sec;
-}
-
-
-asection *
-xtensa_make_property_section (asection *sec, const char *base_name)
-{
- char *prop_sec_name;
- asection *prop_sec;
-
- /* Check if the section already exists. */
- prop_sec_name = xtensa_property_section_name (sec, base_name);
- prop_sec = bfd_get_section_by_name_if (sec->owner, prop_sec_name,
- match_section_group,
- (void *) elf_group_name (sec));
- /* If not, create it. */
- if (! prop_sec)
- {
- flagword flags = (SEC_RELOC | SEC_HAS_CONTENTS | SEC_READONLY);
- flags |= (bfd_get_section_flags (sec->owner, sec)
- & (SEC_LINK_ONCE | SEC_LINK_DUPLICATES));
-
- prop_sec = bfd_make_section_anyway_with_flags
- (sec->owner, strdup (prop_sec_name), flags);
- if (! prop_sec)
- return 0;
-
- elf_group_name (prop_sec) = elf_group_name (sec);
- }
-
- free (prop_sec_name);
- return prop_sec;
-}
-
-
-flagword
-xtensa_get_property_predef_flags (asection *sec)
-{
- if (xtensa_is_insntable_section (sec))
- return (XTENSA_PROP_INSN
- | XTENSA_PROP_NO_TRANSFORM
- | XTENSA_PROP_INSN_NO_REORDER);
-
- if (xtensa_is_littable_section (sec))
- return (XTENSA_PROP_LITERAL
- | XTENSA_PROP_NO_TRANSFORM
- | XTENSA_PROP_INSN_NO_REORDER);
-
- return 0;
-}
-
-
-/* Other functions called directly by the linker. */
-
-bfd_boolean
-xtensa_callback_required_dependence (bfd *abfd,
- asection *sec,
- struct bfd_link_info *link_info,
- deps_callback_t callback,
- void *closure)
-{
- Elf_Internal_Rela *internal_relocs;
- bfd_byte *contents;
- unsigned i;
- bfd_boolean ok = TRUE;
- bfd_size_type sec_size;
-
- sec_size = bfd_get_section_limit (abfd, sec);
-
- /* ".plt*" sections have no explicit relocations but they contain L32R
- instructions that reference the corresponding ".got.plt*" sections. */
- if ((sec->flags & SEC_LINKER_CREATED) != 0
- && CONST_STRNEQ (sec->name, ".plt"))
- {
- asection *sgotplt;
-
- /* Find the corresponding ".got.plt*" section. */
- if (sec->name[4] == '\0')
- sgotplt = bfd_get_linker_section (sec->owner, ".got.plt");
- else
- {
- char got_name[14];
- int chunk = 0;
-
- BFD_ASSERT (sec->name[4] == '.');
- chunk = strtol (&sec->name[5], NULL, 10);
-
- sprintf (got_name, ".got.plt.%u", chunk);
- sgotplt = bfd_get_linker_section (sec->owner, got_name);
- }
- BFD_ASSERT (sgotplt);
-
- /* Assume worst-case offsets: L32R at the very end of the ".plt"
- section referencing a literal at the very beginning of
- ".got.plt". This is very close to the real dependence, anyway. */
- (*callback) (sec, sec_size, sgotplt, 0, closure);
- }
-
- /* Only ELF files are supported for Xtensa. Check here to avoid a segfault
- when building uclibc, which runs "ld -b binary /dev/null". */
- if (bfd_get_flavour (abfd) != bfd_target_elf_flavour)
- return ok;
-
- internal_relocs = retrieve_internal_relocs (abfd, sec,
- link_info->keep_memory);
- if (internal_relocs == NULL
- || sec->reloc_count == 0)
- return ok;
-
- /* Cache the contents for the duration of this scan. */
- contents = retrieve_contents (abfd, sec, link_info->keep_memory);
- if (contents == NULL && sec_size != 0)
- {
- ok = FALSE;
- goto error_return;
- }
-
- if (!xtensa_default_isa)
- xtensa_default_isa = xtensa_isa_init (0, 0);
-
- for (i = 0; i < sec->reloc_count; i++)
- {
- Elf_Internal_Rela *irel = &internal_relocs[i];
- if (is_l32r_relocation (abfd, sec, contents, irel))
- {
- rz_reloc l32r_rel;
- asection *target_sec;
- bfd_vma target_offset;
-
- rz_reloc_init (&l32r_rel, abfd, irel, contents, sec_size);
- target_sec = NULL;
- target_offset = 0;
- /* L32Rs must be local to the input file. */
- if (rz_reloc_is_defined (&l32r_rel))
- {
- target_sec = rz_reloc_get_section (&l32r_rel);
- target_offset = l32r_rel.target_offset;
- }
- (*callback) (sec, irel->rz_offset, target_sec, target_offset,
- closure);
- }
- }
-
- error_return:
- release_internal_relocs (sec, internal_relocs);
- release_contents (sec, contents);
- return ok;
-}
-
-/* The default literal sections should always be marked as "code" (i.e.,
- SHF_EXECINSTR). This is particularly important for the Linux kernel
- module loader so that the literals are not placed after the text. */
-static const struct bfd_elf_special_section elf_xtensa_special_sections[] =
-{
- { STRING_COMMA_LEN (".fini.literal"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_EXECINSTR },
- { STRING_COMMA_LEN (".init.literal"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_EXECINSTR },
- { STRING_COMMA_LEN (".literal"), 0, SHT_PROGBITS, SHF_ALLOC + SHF_EXECINSTR },
- { STRING_COMMA_LEN (".xtensa.info"), 0, SHT_NOTE, 0 },
- { NULL, 0, 0, 0, 0 }
-};
-
-#define ELF_TARGET_ID XTENSA_ELF_DATA
-#ifndef ELF_ARCH
-#define TARGET_LITTLE_SYM xtensa_elf32_le_vec
-#define TARGET_LITTLE_NAME "elf32-xtensa-le"
-#define TARGET_BIG_SYM xtensa_elf32_be_vec
-#define TARGET_BIG_NAME "elf32-xtensa-be"
-#define ELF_ARCH bfd_arch_xtensa
-
-#define ELF_MACHINE_CODE EM_XTENSA
-#define ELF_MACHINE_ALT1 EM_XTENSA_OLD
-
-#if XCHAL_HAVE_MMU
-#define ELF_MAXPAGESIZE (1 << XCHAL_MMU_MIN_PTE_PAGE_SIZE)
-#else /* !XCHAL_HAVE_MMU */
-#define ELF_MAXPAGESIZE 1
-#endif /* !XCHAL_HAVE_MMU */
-#endif /* ELF_ARCH */
-
-#define elf_backend_can_gc_sections 1
-#define elf_backend_can_refcount 1
-#define elf_backend_plt_readonly 1
-#define elf_backend_got_header_size 4
-#define elf_backend_want_dynbss 0
-#define elf_backend_want_got_plt 1
-
-#define elf_info_to_howto elf_xtensa_info_to_howto_rela
-
-#define bfd_elf32_mkobject elf_xtensa_mkobject
-
-#define bfd_elf32_bfd_merge_private_bfd_data elf_xtensa_merge_private_bfd_data
-#define bfd_elf32_new_section_hook elf_xtensa_new_section_hook
-#define bfd_elf32_bfd_print_private_bfd_data elf_xtensa_print_private_bfd_data
-#define bfd_elf32_bfd_relax_section elf_xtensa_relax_section
-#define bfd_elf32_bfd_reloc_type_lookup elf_xtensa_reloc_type_lookup
-#define bfd_elf32_bfd_reloc_name_lookup \
- elf_xtensa_reloc_name_lookup
-#define bfd_elf32_bfd_set_private_flags elf_xtensa_set_private_flags
-#define bfd_elf32_bfd_link_hash_table_create elf_xtensa_link_hash_table_create
-
-#define elf_backend_adjust_dynamic_symbol elf_xtensa_adjust_dynamic_symbol
-#define elf_backend_check_relocs elf_xtensa_check_relocs
-#define elf_backend_create_dynamic_sections elf_xtensa_create_dynamic_sections
-#define elf_backend_discard_info elf_xtensa_discard_info
-#define elf_backend_ignore_discarded_relocs elf_xtensa_ignore_discarded_relocs
-#define elf_backend_final_write_processing elf_xtensa_final_write_processing
-#define elf_backend_finish_dynamic_sections elf_xtensa_finish_dynamic_sections
-#define elf_backend_finish_dynamic_symbol elf_xtensa_finish_dynamic_symbol
-#define elf_backend_gc_mark_hook elf_xtensa_gc_mark_hook
-#define elf_backend_gc_sweep_hook elf_xtensa_gc_sweep_hook
-#define elf_backend_grok_prstatus elf_xtensa_grok_prstatus
-#define elf_backend_grok_psinfo elf_xtensa_grok_psinfo
-#define elf_backend_hide_symbol elf_xtensa_hide_symbol
-#define elf_backend_object_p elf_xtensa_object_p
-#define elf_backend_reloc_type_class elf_xtensa_reloc_type_class
-#define elf_backend_relocate_section elf_xtensa_relocate_section
-#define elf_backend_size_dynamic_sections elf_xtensa_size_dynamic_sections
-#define elf_backend_always_size_sections elf_xtensa_always_size_sections
-#define elf_backend_omit_section_dynsym \
- ((bfd_boolean (*) (bfd *, struct bfd_link_info *, asection *)) bfd_true)
-#define elf_backend_special_sections elf_xtensa_special_sections
-#define elf_backend_action_discarded elf_xtensa_action_discarded
-#define elf_backend_copy_indirect_symbol elf_xtensa_copy_indirect_symbol
-
-#include "elf32-target.h"
-#endif
diff --git a/librz/arch/isa_gnu/xtensa/xtensa-dis.c b/librz/arch/isa_gnu/xtensa/xtensa-dis.c
deleted file mode 100644
index ba31e2b6de4..00000000000
--- a/librz/arch/isa_gnu/xtensa/xtensa-dis.c
+++ /dev/null
@@ -1,290 +0,0 @@
-/* xtensa-dis.c. Disassembly functions for Xtensa.
- Copyright (C) 2003-2015 Free Software Foundation, Inc.
- Contributed by Bob Wilson at Tensilica, Inc. (bwilson@tensilica.com)
-
- This file is part of the GNU opcodes library.
-
- This library is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3, or (at your option)
- any later version.
-
- It is distributed in the hope that it will be useful, but WITHOUT
- ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
- License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this file; see the file COPYING. If not, write to the
- Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
- MA 02110-1301, USA. */
-
-#include <common_gnu/sysdep.h>
-#include <common_gnu/ansidecl.h>
-#include <common_gnu/disas-asm.h>
-#include <common_gnu/libiberty.h>
-
-#include <stdlib.h>
-#include <stdio.h>
-#include <sys/types.h>
-#include <string.h>
-#include <setjmp.h>
-
-#include "xtensa-isa.h"
-
-
-#if defined(_MSC_VER)
-__declspec(dllimport)
-#endif
-extern xtensa_isa xtensa_default_isa;
-
-#ifndef MAX
-#define MAX(a,b) (((a)) > ((b)) ? ((a)) : ((b)))
-#endif
-
-#if 1
-static void nothing(void) {
- return;
-}
-
-#define OPCODES_SIGJMP_BUF void*
-#define OPCODES_SIGSETJMP(buf) nothing()
-#define OPCODES_SIGLONGJMP(buf,val) nothing()
-#else
-
-#define OPCODES_SIGJMP_BUF sigjmp_buf
-#define OPCODES_SIGSETJMP(buf) sigsetjmp((buf), 0)
-#define OPCODES_SIGLONGJMP(buf,val) siglongjmp((buf), (val))
-#endif
-
-int show_raw_fields;
-
-struct dis_private
-{
- bfd_byte *byte_buf;
- OPCODES_SIGJMP_BUF bailout;
-};
-
-
-static int
-fetch_data (struct disassemble_info *info, bfd_vma memaddr)
-{
- int length, status = 0;
- struct dis_private *priv = (struct dis_private *) info->private_data;
- int insn_size = xtensa_isa_maxlength (xtensa_default_isa);
-
- /* Read the maximum instruction size, padding with zeros if we go past
- the end of the text section. This code will automatically adjust
- length when we hit the end of the buffer. */
-
- memset (priv->byte_buf, 0, insn_size);
- for (length = insn_size; length > 0; length--)
- {
- status = (*info->read_memory_func) (memaddr, priv->byte_buf, length,
- info);
- if (status == 0) {
- return length;
- }
- }
- (*info->memory_error_func) (status, memaddr, info);
- OPCODES_SIGLONGJMP (priv->bailout, 1);
-return -1;
- /*NOTREACHED*/
-}
-
-
-static void
-print_xtensa_operand (bfd_vma memaddr,
- struct disassemble_info *info,
- xtensa_opcode opc,
- int opnd,
- unsigned operand_val)
-{
- xtensa_isa isa = xtensa_default_isa;
- int signed_operand_val;
-
- if (show_raw_fields)
- {
- if (operand_val < 0xa) {
- (*info->fprintf_func) (info->stream, "%u", operand_val);
- } else {
- (*info->fprintf_func) (info->stream, "0x%x", operand_val);
- }
- return;
- }
-
- (void) xtensa_operand_decode (isa, opc, opnd, &operand_val);
- signed_operand_val = (int) operand_val;
-
- if (xtensa_operand_is_register (isa, opc, opnd) == 0)
- {
- if (xtensa_operand_is_PCrelative (isa, opc, opnd) == 1)
- {
- (void) xtensa_operand_undo_reloc (isa, opc, opnd,
- &operand_val, memaddr);
- info->target = operand_val;
- (*info->print_address_func) (info->target, info);
- }
- else
- {
- if ((signed_operand_val > -256) && (signed_operand_val < 256)) {
- (*info->fprintf_func) (info->stream, "%d", signed_operand_val);
- } else {
- (*info->fprintf_func) (info->stream, "0x%x", signed_operand_val);
- }
- }
- }
- else
- {
- int i = 1;
- xtensa_regfile opnd_rf = xtensa_operand_regfile (isa, opc, opnd);
- (*info->fprintf_func) (info->stream, "%s%u",
- xtensa_regfile_shortname (isa, opnd_rf),
- operand_val);
- while (i < xtensa_operand_num_regs (isa, opc, opnd))
- {
- operand_val++;
- (*info->fprintf_func) (info->stream, ":%s%u",
- xtensa_regfile_shortname (isa, opnd_rf),
- operand_val);
- i++;
- }
- }
-}
-
-
-/* Print the Xtensa instruction at address MEMADDR on info->stream.
- Returns length of the instruction in bytes. */
-
-int
-print_insn_xtensa (bfd_vma memaddr, struct disassemble_info *info)
-{
- unsigned operand_val;
- int bytes_fetched, size, maxsize, i, n, noperands, nslots;
- xtensa_isa isa;
- xtensa_opcode opc;
- xtensa_format fmt;
- struct dis_private priv;
- static bfd_byte *byte_buf = NULL;
- static xtensa_insnbuf insn_buffer = NULL;
- static xtensa_insnbuf slot_buffer = NULL;
- int first, first_slot, valid_insn;
-
- if (!xtensa_default_isa) {
- xtensa_default_isa = xtensa_isa_init (0, 0);
- }
-
- info->target = 0;
- maxsize = xtensa_isa_maxlength (xtensa_default_isa);
-
- /* Set bytes_per_line to control the amount of whitespace between the hex
- values and the opcode. For Xtensa, we always print one "chunk" and we
- vary bytes_per_chunk to determine how many bytes to print. (objdump
- would apparently prefer that we set bytes_per_chunk to 1 and vary
- bytes_per_line but that makes it hard to fit 64-bit instructions on
- an 80-column screen.) The value of bytes_per_line here is not exactly
- right, because objdump adds an extra space for each chunk so that the
- amount of whitespace depends on the chunk size. Oh well, it's good
- enough.... Note that we set the minimum size to 4 to accommodate
- literal pools. */
- info->bytes_per_line = MAX (maxsize, 4);
-
- /* Allocate buffers the first time through. */
- if (!insn_buffer)
- {
- insn_buffer = xtensa_insnbuf_alloc (xtensa_default_isa);
- slot_buffer = xtensa_insnbuf_alloc (xtensa_default_isa);
- byte_buf = (bfd_byte *) xmalloc (MAX (maxsize, 4));
- }
-
- priv.byte_buf = byte_buf;
-
- info->private_data = (void *) &priv;
-#if 0
- if (OPCODES_SIGSETJMP (priv.bailout) != 0)
- /* Error return. */
- return -1;
-#endif
-
- /* Don't set "isa" before the setjmp to keep the compiler from griping. */
- isa = xtensa_default_isa;
- size = 0;
- nslots = 0;
-
- /* Fetch the maximum size instruction. */
- bytes_fetched = fetch_data (info, memaddr);
-
- /* Copy the bytes into the decode buffer. */
- memset (insn_buffer, 0, (xtensa_insnbuf_size (isa) *
- sizeof (xtensa_insnbuf_word)));
- xtensa_insnbuf_from_chars (isa, insn_buffer, priv.byte_buf, bytes_fetched);
-
- fmt = xtensa_format_decode (isa, insn_buffer);
- if (fmt == XTENSA_UNDEFINED || ((size = xtensa_format_length (isa, fmt)) > bytes_fetched)) {
- valid_insn = 0;
- } else {
- /* Make sure all the opcodes are valid. */
- valid_insn = 1;
- nslots = xtensa_format_num_slots (isa, fmt);
- for (n = 0; n < nslots; n++) {
- xtensa_format_get_slot (isa, fmt, n, insn_buffer, slot_buffer);
- if (xtensa_opcode_decode (isa, fmt, n, slot_buffer) == XTENSA_UNDEFINED) {
- valid_insn = 0;
- break;
- }
- }
- }
-
- if (!valid_insn)
- {
- (*info->fprintf_func) (info->stream, ".byte %#02x", priv.byte_buf[0]);
- return 1;
- }
-
- if (nslots > 1) {
- (*info->fprintf_func) (info->stream, "{ ");
- }
-
- first_slot = 1;
- for (n = 0; n < nslots; n++) {
- if (first_slot) {
- first_slot = 0;
- } else {
- (*info->fprintf_func) (info->stream, "; ");
- }
-
- xtensa_format_get_slot (isa, fmt, n, insn_buffer, slot_buffer);
- opc = xtensa_opcode_decode (isa, fmt, n, slot_buffer);
- (*info->fprintf_func) (info->stream, "%s",
- xtensa_opcode_name (isa, opc));
-
- /* Print the operands (if any). */
- noperands = xtensa_opcode_num_operands (isa, opc);
- first = 1;
- for (i = 0; i < noperands; i++) {
- if (xtensa_operand_is_visible (isa, opc, i) == 0) {
- continue;
- }
- if (first) {
- (*info->fprintf_func) (info->stream, " ");
- first = 0;
- } else {
- (*info->fprintf_func) (info->stream, ", ");
- }
- (void)xtensa_operand_get_field (isa, opc, i, fmt, n,
- slot_buffer, &operand_val);
-
- print_xtensa_operand (memaddr, info, opc, i, operand_val);
- }
- }
-
- if (nslots > 1) {
- (*info->fprintf_func) (info->stream, " }");
- }
-
- info->bytes_per_chunk = size;
- info->display_endian = info->endian;
-
- return size;
-}
-
diff --git a/librz/arch/isa_gnu/xtensa/xtensa-isa-internal.h b/librz/arch/isa_gnu/xtensa/xtensa-isa-internal.h
deleted file mode 100644
index 5557784571c..00000000000
--- a/librz/arch/isa_gnu/xtensa/xtensa-isa-internal.h
+++ /dev/null
@@ -1,223 +0,0 @@
-// SPDX-FileCopyrightText: 2003-2015 Free Software Foundation, Inc.
-// SPDX-License-Identifier: GPL-3.0-or-later
-
-/* Internal definitions for configurable Xtensa ISA support.
- Copyright (C) 2003-2015 Free Software Foundation, Inc.
-
- This file is part of BFD, the Binary File Descriptor library.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301,
- USA. */
-
-#ifndef XTENSA_ISA_INTERNAL_H
-#define XTENSA_ISA_INTERNAL_H
-
-/* Flags. */
-
-#define XTENSA_OPERAND_IS_REGISTER 0x00000001
-#define XTENSA_OPERAND_IS_PCRELATIVE 0x00000002
-#define XTENSA_OPERAND_IS_INVISIBLE 0x00000004
-#define XTENSA_OPERAND_IS_UNKNOWN 0x00000008
-
-#define XTENSA_OPCODE_IS_BRANCH 0x00000001
-#define XTENSA_OPCODE_IS_JUMP 0x00000002
-#define XTENSA_OPCODE_IS_LOOP 0x00000004
-#define XTENSA_OPCODE_IS_CALL 0x00000008
-
-#define XTENSA_STATE_IS_EXPORTED 0x00000001
-#define XTENSA_STATE_IS_SHARED_OR 0x00000002
-
-#define XTENSA_INTERFACE_HAS_SIDE_EFFECT 0x00000001
-
-/* Function pointer typedefs */
-typedef void (*xtensa_format_encode_fn)(xtensa_insnbuf);
-typedef void (*xtensa_get_slot_fn)(const xtensa_insnbuf, xtensa_insnbuf);
-typedef void (*xtensa_set_slot_fn)(xtensa_insnbuf, const xtensa_insnbuf);
-typedef int (*xtensa_opcode_decode_fn)(const xtensa_insnbuf);
-typedef uint32 (*xtensa_get_field_fn)(const xtensa_insnbuf);
-typedef void (*xtensa_set_field_fn)(xtensa_insnbuf, uint32);
-typedef int (*xtensa_immed_decode_fn)(uint32 *);
-typedef int (*xtensa_immed_encode_fn)(uint32 *);
-typedef int (*xtensa_do_reloc_fn)(uint32 *, uint32);
-typedef int (*xtensa_undo_reloc_fn)(uint32 *, uint32);
-typedef void (*xtensa_opcode_encode_fn)(xtensa_insnbuf);
-typedef int (*xtensa_format_decode_fn)(const xtensa_insnbuf);
-typedef int (*xtensa_length_decode_fn)(const unsigned char *);
-
-typedef struct xtensa_format_internal_struct {
- const char *name; /* Instruction format name. */
- int length; /* Instruction length in bytes. */
- xtensa_format_encode_fn encode_fn;
- int num_slots;
- int *slot_id; /* Array[num_slots] of slot IDs. */
-} xtensa_format_internal;
-
-typedef struct xtensa_slot_internal_struct {
- const char *name; /* Not necessarily unique. */
- const char *format;
- int position;
- xtensa_get_slot_fn get_fn;
- xtensa_set_slot_fn set_fn;
- xtensa_get_field_fn *get_field_fns; /* Array[field_id]. */
- xtensa_set_field_fn *set_field_fns; /* Array[field_id]. */
- xtensa_opcode_decode_fn opcode_decode_fn;
- const char *nop_name;
-} xtensa_slot_internal;
-
-typedef struct xtensa_operand_internal_struct {
- const char *name;
- int field_id;
- xtensa_regfile regfile; /* Register file. */
- int num_regs; /* Usually 1; 2 for reg pairs, etc. */
- uint32 flags; /* See XTENSA_OPERAND_* flags. */
- xtensa_immed_encode_fn encode; /* Encode the operand value. */
- xtensa_immed_decode_fn decode; /* Decode the value from the field. */
- xtensa_do_reloc_fn do_reloc; /* Perform a PC-relative reloc. */
- xtensa_undo_reloc_fn undo_reloc; /* Undo a PC-relative relocation. */
-} xtensa_operand_internal;
-
-typedef struct xtensa_arg_internal_struct {
- union {
- int operand_id; /* For normal operands. */
- xtensa_state state; /* For stateOperands. */
- } u;
- char inout; /* Direction: 'i', 'o', or 'm'. */
-} xtensa_arg_internal;
-
-typedef struct xtensa_iclass_internal_struct {
- int num_operands; /* Size of "operands" array. */
- xtensa_arg_internal *operands; /* Array[num_operands]. */
-
- int num_stateOperands; /* Size of "stateOperands" array. */
- xtensa_arg_internal *stateOperands; /* Array[num_stateOperands]. */
-
- int num_interfaceOperands; /* Size of "interfaceOperands". */
- xtensa_interface *interfaceOperands; /* Array[num_interfaceOperands]. */
-} xtensa_iclass_internal;
-
-typedef struct xtensa_opcode_internal_struct {
- const char *name; /* Opcode mnemonic. */
- int iclass_id; /* Iclass for this opcode. */
- uint32 flags; /* See XTENSA_OPCODE_* flags. */
- xtensa_opcode_encode_fn *encode_fns; /* Array[slot_id]. */
- int num_funcUnit_uses; /* Number of funcUnit_use entries. */
- xtensa_funcUnit_use *funcUnit_uses; /* Array[num_funcUnit_uses]. */
-} xtensa_opcode_internal;
-
-typedef struct xtensa_regfile_internal_struct {
- const char *name; /* Full name of the regfile. */
- const char *shortname; /* Abbreviated name. */
- xtensa_regfile parent; /* View parent (or identity). */
- int num_bits; /* Width of the registers. */
- int num_entries; /* Number of registers. */
-} xtensa_regfile_internal;
-
-typedef struct xtensa_interface_internal_struct {
- const char *name; /* Interface name. */
- int num_bits; /* Width of the interface. */
- uint32 flags; /* See XTENSA_INTERFACE_* flags. */
- int class_id; /* Class of related interfaces. */
- char inout; /* "i" or "o". */
-} xtensa_interface_internal;
-
-typedef struct xtensa_funcUnit_internal_struct {
- const char *name; /* Functional unit name. */
- int num_copies; /* Number of instances. */
-} xtensa_funcUnit_internal;
-
-typedef struct xtensa_state_internal_struct {
- const char *name; /* State name. */
- int num_bits; /* Number of state bits. */
- uint32 flags; /* See XTENSA_STATE_* flags. */
-} xtensa_state_internal;
-
-typedef struct xtensa_sysreg_internal_struct {
- const char *name; /* Register name. */
- int number; /* Register number. */
- int is_user; /* Non-zero if a "user register". */
-} xtensa_sysreg_internal;
-
-typedef struct xtensa_lookup_entry_struct {
- const char *key;
- union {
- xtensa_opcode opcode; /* Internal opcode number. */
- xtensa_sysreg sysreg; /* Internal sysreg number. */
- xtensa_state state; /* Internal state number. */
- xtensa_interface intf; /* Internal interface number. */
- xtensa_funcUnit fun; /* Internal funcUnit number. */
- } u;
-} xtensa_lookup_entry;
-
-typedef struct xtensa_isa_internal_struct {
- int is_big_endian; /* Endianness. */
- int insn_size; /* Maximum length in bytes. */
- int insnbuf_size; /* Number of insnbuf_words. */
-
- int num_formats;
- xtensa_format_internal *formats;
- xtensa_format_decode_fn format_decode_fn;
- xtensa_length_decode_fn length_decode_fn;
-
- int num_slots;
- xtensa_slot_internal *slots;
-
- int num_fields;
-
- int num_operands;
- xtensa_operand_internal *operands;
-
- int num_iclasses;
- xtensa_iclass_internal *iclasses;
-
- int num_opcodes;
- xtensa_opcode_internal *opcodes;
- xtensa_lookup_entry *opname_lookup_table;
-
- int num_regfiles;
- xtensa_regfile_internal *regfiles;
-
- int num_states;
- xtensa_state_internal *states;
- xtensa_lookup_entry *state_lookup_table;
-
- int num_sysregs;
- xtensa_sysreg_internal *sysregs;
- xtensa_lookup_entry *sysreg_lookup_table;
-
- /* The current Xtensa ISA only supports 256 of each kind of sysreg so
- we can get away with implementing lookups with tables indexed by
- the register numbers. If we ever allow larger sysreg numbers, this
- may have to be reimplemented. The first entry in the following
- arrays corresponds to "special" registers and the second to "user"
- registers. */
- int max_sysreg_num[2];
- xtensa_sysreg *sysreg_table[2];
-
- int num_interfaces;
- xtensa_interface_internal *interfaces;
- xtensa_lookup_entry *interface_lookup_table;
-
- int num_funcUnits;
- xtensa_funcUnit_internal *funcUnits;
- xtensa_lookup_entry *funcUnit_lookup_table;
-
-} xtensa_isa_internal;
-
-extern int xtensa_isa_name_compare(const void *, const void *);
-
-extern xtensa_isa_status xtisa_errno;
-extern char xtisa_error_msg[];
-
-#endif /* !XTENSA_ISA_INTERNAL_H */
diff --git a/librz/arch/isa_gnu/xtensa/xtensa-isa.c b/librz/arch/isa_gnu/xtensa/xtensa-isa.c
deleted file mode 100644
index a54327c97ba..00000000000
--- a/librz/arch/isa_gnu/xtensa/xtensa-isa.c
+++ /dev/null
@@ -1,1851 +0,0 @@
-/* Configurable Xtensa ISA support.
- Copyright (C) 2003-2015 Free Software Foundation, Inc.
-
- This file is part of BFD, the Binary File Descriptor library.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
- MA 02110-1301, USA. */
-
-#include <stdio.h>
-#include <string.h>
-#include <stdlib.h>
-#include <rz_util.h>
-
-#include <common_gnu/disas-asm.h>
-#include <common_gnu/sysdep.h>
-#include "xtensa-isa.h"
-#include "xtensa-isa-internal.h"
-
-extern int filename_cmp (const char *s1, const char *s2);
-xtensa_isa_status xtisa_errno;
-char xtisa_error_msg[1024];
-
-
-xtensa_isa_status
-xtensa_isa_errno (xtensa_isa isa __attribute__ ((unused)))
-{
- return xtisa_errno;
-}
-
-
-char *
-xtensa_isa_error_msg (xtensa_isa isa __attribute__ ((unused)))
-{
- return xtisa_error_msg;
-}
-
-
-#define CHECK_ALLOC(MEM,ERRVAL) \
- do { \
- if ((MEM) == 0) \
- { \
- xtisa_errno = xtensa_isa_out_of_memory; \
- strcpy (xtisa_error_msg, "out of memory"); \
- return (ERRVAL); \
- } \
- } while (0)
-
-#define CHECK_ALLOC_FOR_INIT(MEM,ERRVAL,ERRNO_P,ERROR_MSG_P) \
- do { \
- if ((MEM) == 0) \
- { \
- xtisa_errno = xtensa_isa_out_of_memory; \
- strcpy (xtisa_error_msg, "out of memory"); \
- if (ERRNO_P) *(ERRNO_P) = xtisa_errno; \
- if (ERROR_MSG_P) *(ERROR_MSG_P) = xtisa_error_msg; \
- return (ERRVAL); \
- } \
- } while (0)
-
-
-
-/* Instruction buffers. */
-
-int
-xtensa_insnbuf_size (xtensa_isa isa)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- return intisa->insnbuf_size;
-}
-
-
-xtensa_insnbuf
-xtensa_insnbuf_alloc (xtensa_isa isa)
-{
- xtensa_insnbuf result = (xtensa_insnbuf)
- malloc (xtensa_insnbuf_size (isa) * sizeof (xtensa_insnbuf_word));
- CHECK_ALLOC (result, 0);
- return result;
-}
-
-
-void
-xtensa_insnbuf_free (xtensa_isa isa __attribute__ ((unused)),
- xtensa_insnbuf buf)
-{
- free (buf);
-}
-
-
-/* Given <byte_index>, the index of a byte in a xtensa_insnbuf, our
- internal representation of a xtensa instruction word, return the index of
- its word and the bit index of its low order byte in the xtensa_insnbuf. */
-
-static inline int
-byte_to_word_index (int byte_index)
-{
- return byte_index / sizeof (xtensa_insnbuf_word);
-}
-
-
-static inline int
-byte_to_bit_index (int byte_index)
-{
- return (byte_index & 0x3) * 8;
-}
-
-
-/* Copy an instruction in the 32-bit words pointed at by "insn" to
- characters pointed at by "cp". This is more complicated than you
- might think because we want 16-bit instructions in bytes 2 & 3 for
- big-endian configurations. This function allows us to specify
- which byte in "insn" to start with and which way to increment,
- allowing trivial implementation for both big- and little-endian
- configurations....and it seems to make pretty good code for
- both. */
-
-int
-xtensa_insnbuf_to_chars (xtensa_isa isa,
- const xtensa_insnbuf insn,
- unsigned char *cp,
- int num_chars)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- int insn_size = xtensa_isa_maxlength (isa);
- int fence_post, start, increment, i, byte_count;
- xtensa_format fmt;
-
- if (num_chars == 0) {
- num_chars = insn_size;
- }
-
- if (intisa->is_big_endian)
- {
- start = insn_size - 1;
- increment = -1;
- }
- else
- {
- start = 0;
- increment = 1;
- }
-
- /* Find the instruction format. Do nothing if the buffer does not contain
- a valid instruction since we need to know how many bytes to copy. */
- fmt = xtensa_format_decode (isa, insn);
- if (fmt == XTENSA_UNDEFINED) {
- return XTENSA_UNDEFINED;
- }
-
- byte_count = xtensa_format_length (isa, fmt);
- if (byte_count == XTENSA_UNDEFINED) {
- return XTENSA_UNDEFINED;
- }
-
- if (byte_count > num_chars)
- {
- xtisa_errno = xtensa_isa_buffer_overflow;
- strcpy (xtisa_error_msg, "output buffer too small for instruction");
- return XTENSA_UNDEFINED;
- }
-
- fence_post = start + (byte_count * increment);
-
- for (i = start; i != fence_post; i += increment, ++cp)
- {
- int word_inx = byte_to_word_index (i);
- int bit_inx = byte_to_bit_index (i);
-
- *cp = (insn[word_inx] >> bit_inx) & 0xff;
- }
-
- return byte_count;
-}
-
-
-/* Inward conversion from byte stream to xtensa_insnbuf. See
- xtensa_insnbuf_to_chars for a discussion of why this is complicated
- by endianness. */
-
-void
-xtensa_insnbuf_from_chars (xtensa_isa isa,
- xtensa_insnbuf insn,
- const unsigned char *cp,
- int num_chars)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- int max_size, insn_size, fence_post, start, increment, i;
-
- max_size = xtensa_isa_maxlength (isa);
-
- /* Decode the instruction length so we know how many bytes to read. */
- insn_size = (intisa->length_decode_fn) (cp);
- if (insn_size == XTENSA_UNDEFINED)
- {
- /* This should never happen when the byte stream contains a
- valid instruction. Just read the maximum number of bytes.... */
- insn_size = max_size;
- }
-
- if (num_chars == 0 || num_chars > insn_size) {
- num_chars = insn_size;
- }
-
- if (intisa->is_big_endian) {
- start = max_size - 1;
- increment = -1;
- }
- else
- {
- start = 0;
- increment = 1;
- }
-
- fence_post = start + (num_chars * increment);
- memset (insn, 0, xtensa_insnbuf_size (isa) * sizeof (xtensa_insnbuf_word));
-
- for (i = start; i != fence_post; i += increment, ++cp)
- {
- int word_inx = byte_to_word_index (i);
- int bit_inx = byte_to_bit_index (i);
-
- insn[word_inx] |= (*cp & 0xff) << bit_inx;
- }
-}
-
-
-
-/* ISA information. */
-
-extern xtensa_isa_internal xtensa_modules;
-
-xtensa_isa
-xtensa_isa_init (xtensa_isa_status *errno_p, char **error_msg_p)
-{
- xtensa_isa_internal *isa = &xtensa_modules;
- int n, is_user;
-
- /* Set up the opcode name lookup table. */
- isa->opname_lookup_table =
- bfd_malloc (isa->num_opcodes * sizeof (xtensa_lookup_entry));
- CHECK_ALLOC_FOR_INIT (isa->opname_lookup_table, NULL, errno_p, error_msg_p);
- for (n = 0; n < isa->num_opcodes; n++)
- {
- isa->opname_lookup_table[n].key = isa->opcodes[n].name;
- isa->opname_lookup_table[n].u.opcode = n;
- }
- qsort (isa->opname_lookup_table, isa->num_opcodes,
- sizeof (xtensa_lookup_entry), xtensa_isa_name_compare);
-
- /* Set up the state name lookup table. */
- isa->state_lookup_table =
- bfd_malloc (isa->num_states * sizeof (xtensa_lookup_entry));
- CHECK_ALLOC_FOR_INIT (isa->state_lookup_table, NULL, errno_p, error_msg_p);
- for (n = 0; n < isa->num_states; n++)
- {
- isa->state_lookup_table[n].key = isa->states[n].name;
- isa->state_lookup_table[n].u.state = n;
- }
- qsort (isa->state_lookup_table, isa->num_states,
- sizeof (xtensa_lookup_entry), xtensa_isa_name_compare);
-
- /* Set up the sysreg name lookup table. */
- isa->sysreg_lookup_table =
- bfd_malloc (isa->num_sysregs * sizeof (xtensa_lookup_entry));
- CHECK_ALLOC_FOR_INIT (isa->sysreg_lookup_table, NULL, errno_p, error_msg_p);
- for (n = 0; n < isa->num_sysregs; n++)
- {
- isa->sysreg_lookup_table[n].key = isa->sysregs[n].name;
- isa->sysreg_lookup_table[n].u.sysreg = n;
- }
- qsort (isa->sysreg_lookup_table, isa->num_sysregs,
- sizeof (xtensa_lookup_entry), xtensa_isa_name_compare);
-
- /* Set up the user & system sysreg number tables. */
- for (is_user = 0; is_user < 2; is_user++)
- {
- isa->sysreg_table[is_user] =
- bfd_malloc ((isa->max_sysreg_num[is_user] + 1)
- * sizeof (xtensa_sysreg));
- CHECK_ALLOC_FOR_INIT (isa->sysreg_table[is_user], NULL,
- errno_p, error_msg_p);
-
- for (n = 0; n <= isa->max_sysreg_num[is_user]; n++) {
- isa->sysreg_table[is_user][n] = XTENSA_UNDEFINED;
- }
- }
- for (n = 0; n < isa->num_sysregs; n++)
- {
- xtensa_sysreg_internal *sreg = &isa->sysregs[n];
- is_user = sreg->is_user;
-
- isa->sysreg_table[is_user][sreg->number] = n;
- }
-
- /* Set up the interface lookup table. */
- isa->interface_lookup_table =
- calloc (isa->num_interfaces, sizeof (xtensa_lookup_entry));
- CHECK_ALLOC_FOR_INIT (isa->interface_lookup_table, NULL, errno_p,
- error_msg_p);
- for (n = 0; n < isa->num_interfaces; n++)
- {
- isa->interface_lookup_table[n].key = isa->interfaces[n].name;
- isa->interface_lookup_table[n].u.intf = n;
- }
- qsort (isa->interface_lookup_table, isa->num_interfaces,
- sizeof (xtensa_lookup_entry), xtensa_isa_name_compare);
-
- /* Set up the funcUnit lookup table. */
- isa->funcUnit_lookup_table =
- bfd_malloc (isa->num_funcUnits * sizeof (xtensa_lookup_entry));
- CHECK_ALLOC_FOR_INIT (isa->funcUnit_lookup_table, NULL, errno_p,
- error_msg_p);
- for (n = 0; n < isa->num_funcUnits; n++)
- {
- isa->funcUnit_lookup_table[n].key = isa->funcUnits[n].name;
- isa->funcUnit_lookup_table[n].u.fun = n;
- }
- qsort (isa->funcUnit_lookup_table, isa->num_funcUnits,
- sizeof (xtensa_lookup_entry), xtensa_isa_name_compare);
-
- isa->insnbuf_size = ((isa->insn_size + sizeof (xtensa_insnbuf_word) - 1) /
- sizeof (xtensa_insnbuf_word));
-
- return (xtensa_isa) isa;
-}
-
-
-void
-xtensa_isa_free (xtensa_isa isa)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- int n;
-
- /* With this version of the code, the xtensa_isa structure is not
- dynamically allocated, so this function is not essential. Free
- the memory allocated by xtensa_isa_init and restore the xtensa_isa
- structure to its initial state. */
-
- if (intisa->opname_lookup_table)
- {
- free (intisa->opname_lookup_table);
- intisa->opname_lookup_table = 0;
- }
-
- if (intisa->state_lookup_table)
- {
- free (intisa->state_lookup_table);
- intisa->state_lookup_table = 0;
- }
-
- if (intisa->sysreg_lookup_table)
- {
- free (intisa->sysreg_lookup_table);
- intisa->sysreg_lookup_table = 0;
- }
- for (n = 0; n < 2; n++)
- {
- if (intisa->sysreg_table[n])
- {
- free (intisa->sysreg_table[n]);
- intisa->sysreg_table[n] = 0;
- }
- }
-
- if (intisa->interface_lookup_table)
- {
- free (intisa->interface_lookup_table);
- intisa->interface_lookup_table = 0;
- }
-
- if (intisa->funcUnit_lookup_table)
- {
- free (intisa->funcUnit_lookup_table);
- intisa->funcUnit_lookup_table = 0;
- }
-}
-
-
-int
-xtensa_isa_name_compare (const void *v1, const void *v2)
-{
- xtensa_lookup_entry *e1 = (xtensa_lookup_entry *) v1;
- xtensa_lookup_entry *e2 = (xtensa_lookup_entry *) v2;
-
- return rz_str_casecmp (e1->key, e2->key);
-}
-
-
-int
-xtensa_isa_maxlength (xtensa_isa isa)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- return intisa->insn_size;
-}
-
-
-int
-xtensa_isa_length_from_chars (xtensa_isa isa, const unsigned char *cp)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- return (intisa->length_decode_fn) (cp);
-}
-
-
-int
-xtensa_isa_num_pipe_stages (xtensa_isa isa)
-{
- xtensa_opcode opcode;
- xtensa_funcUnit_use *use;
- int num_opcodes, num_uses;
- int i, stage;
- static int max_stage = XTENSA_UNDEFINED;
-
- /* Only compute the value once. */
- if (max_stage != XTENSA_UNDEFINED) {
- return max_stage + 1;
- }
-
- num_opcodes = xtensa_isa_num_opcodes (isa);
- for (opcode = 0; opcode < num_opcodes; opcode++)
- {
- num_uses = xtensa_opcode_num_funcUnit_uses (isa, opcode);
- for (i = 0; i < num_uses; i++)
- {
- use = xtensa_opcode_funcUnit_use (isa, opcode, i);
- stage = use->stage;
- if (stage > max_stage) {
- max_stage = stage;
- }
- }
- }
-
- return max_stage + 1;
-}
-
-
-int
-xtensa_isa_num_formats (xtensa_isa isa)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- return intisa->num_formats;
-}
-
-
-int
-xtensa_isa_num_opcodes (xtensa_isa isa)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- return intisa->num_opcodes;
-}
-
-
-int
-xtensa_isa_num_regfiles (xtensa_isa isa)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- return intisa->num_regfiles;
-}
-
-
-int
-xtensa_isa_num_states (xtensa_isa isa)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- return intisa->num_states;
-}
-
-
-int
-xtensa_isa_num_sysregs (xtensa_isa isa)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- return intisa->num_sysregs;
-}
-
-
-int
-xtensa_isa_num_interfaces (xtensa_isa isa)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- return intisa->num_interfaces;
-}
-
-
-int
-xtensa_isa_num_funcUnits (xtensa_isa isa)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- return intisa->num_funcUnits;
-}
-
-
-
-/* Instruction formats. */
-
-
-#define CHECK_FORMAT(INTISA,FMT,ERRVAL) \
- do { \
- if ((FMT) < 0 || (FMT) >= (INTISA)->num_formats) \
- { \
- xtisa_errno = xtensa_isa_bad_format; \
- strcpy (xtisa_error_msg, "invalid format specifier"); \
- return (ERRVAL); \
- } \
- } while (0)
-
-
-#define CHECK_SLOT(INTISA,FMT,SLOT,ERRVAL) \
- do { \
- if ((SLOT) < 0 || (SLOT) >= (INTISA)->formats[FMT].num_slots) \
- { \
- xtisa_errno = xtensa_isa_bad_slot; \
- strcpy (xtisa_error_msg, "invalid slot specifier"); \
- return (ERRVAL); \
- } \
- } while (0)
-
-
-const char *
-xtensa_format_name (xtensa_isa isa, xtensa_format fmt)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_FORMAT (intisa, fmt, NULL);
- return intisa->formats[fmt].name;
-}
-
-
-xtensa_format
-xtensa_format_lookup (xtensa_isa isa, const char *fmtname)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- int fmt;
-
- if (!fmtname || !*fmtname)
- {
- xtisa_errno = xtensa_isa_bad_format;
- strcpy (xtisa_error_msg, "invalid format name");
- return XTENSA_UNDEFINED;
- }
-
- for (fmt = 0; fmt < intisa->num_formats; fmt++)
- {
- if (rz_str_casecmp (fmtname, intisa->formats[fmt].name) == 0) {
- return fmt;
- }
- }
-
- xtisa_errno = xtensa_isa_bad_format;
- sprintf (xtisa_error_msg, "format \"%s\" not recognized", fmtname);
- return XTENSA_UNDEFINED;
-}
-
-
-xtensa_format
-xtensa_format_decode (xtensa_isa isa, const xtensa_insnbuf insn)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- xtensa_format fmt;
-
- fmt = (intisa->format_decode_fn) (insn);
- if (fmt != XTENSA_UNDEFINED) {
- return fmt;
- }
-
- xtisa_errno = xtensa_isa_bad_format;
- strcpy (xtisa_error_msg, "cannot decode instruction format");
- return XTENSA_UNDEFINED;
-}
-
-
-int
-xtensa_format_encode (xtensa_isa isa, xtensa_format fmt, xtensa_insnbuf insn)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_FORMAT (intisa, fmt, -1);
- (*intisa->formats[fmt].encode_fn) (insn);
- return 0;
-}
-
-
-int
-xtensa_format_length (xtensa_isa isa, xtensa_format fmt)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_FORMAT (intisa, fmt, XTENSA_UNDEFINED);
- return intisa->formats[fmt].length;
-}
-
-
-int
-xtensa_format_num_slots (xtensa_isa isa, xtensa_format fmt)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_FORMAT (intisa, fmt, XTENSA_UNDEFINED);
- return intisa->formats[fmt].num_slots;
-}
-
-
-xtensa_opcode
-xtensa_format_slot_nop_opcode (xtensa_isa isa, xtensa_format fmt, int slot)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- int slot_id;
-
- CHECK_FORMAT (intisa, fmt, XTENSA_UNDEFINED);
- CHECK_SLOT (intisa, fmt, slot, XTENSA_UNDEFINED);
-
- slot_id = intisa->formats[fmt].slot_id[slot];
- return xtensa_opcode_lookup (isa, intisa->slots[slot_id].nop_name);
-}
-
-
-int
-xtensa_format_get_slot (xtensa_isa isa, xtensa_format fmt, int slot,
- const xtensa_insnbuf insn, xtensa_insnbuf slotbuf)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- int slot_id;
-
- CHECK_FORMAT (intisa, fmt, -1);
- CHECK_SLOT (intisa, fmt, slot, -1);
-
- slot_id = intisa->formats[fmt].slot_id[slot];
- (*intisa->slots[slot_id].get_fn) (insn, slotbuf);
- return 0;
-}
-
-
-int
-xtensa_format_set_slot (xtensa_isa isa, xtensa_format fmt, int slot,
- xtensa_insnbuf insn, const xtensa_insnbuf slotbuf)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- int slot_id;
-
- CHECK_FORMAT (intisa, fmt, -1);
- CHECK_SLOT (intisa, fmt, slot, -1);
-
- slot_id = intisa->formats[fmt].slot_id[slot];
- (*intisa->slots[slot_id].set_fn) (insn, slotbuf);
- return 0;
-}
-
-
-
-/* Opcode information. */
-
-
-#define CHECK_OPCODE(INTISA,OPC,ERRVAL) \
- do { \
- if ((OPC) < 0 || (OPC) >= (INTISA)->num_opcodes) \
- { \
- xtisa_errno = xtensa_isa_bad_opcode; \
- strcpy (xtisa_error_msg, "invalid opcode specifier"); \
- return (ERRVAL); \
- } \
- } while (0)
-
-
-xtensa_opcode
-xtensa_opcode_lookup (xtensa_isa isa, const char *opname)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- xtensa_lookup_entry entry, *result = 0;
-
- if (!opname || !*opname)
- {
- xtisa_errno = xtensa_isa_bad_opcode;
- strcpy (xtisa_error_msg, "invalid opcode name");
- return XTENSA_UNDEFINED;
- }
-
- if (intisa->num_opcodes != 0)
- {
- entry.key = opname;
- result = bsearch (&entry, intisa->opname_lookup_table,
- intisa->num_opcodes, sizeof (xtensa_lookup_entry),
- xtensa_isa_name_compare);
- }
-
- if (!result)
- {
- xtisa_errno = xtensa_isa_bad_opcode;
- sprintf (xtisa_error_msg, "opcode \"%s\" not recognized", opname);
- return XTENSA_UNDEFINED;
- }
-
- return result->u.opcode;
-}
-
-
-xtensa_opcode
-xtensa_opcode_decode (xtensa_isa isa, xtensa_format fmt, int slot,
- const xtensa_insnbuf slotbuf)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- int slot_id;
- xtensa_opcode opc;
-
- CHECK_FORMAT (intisa, fmt, XTENSA_UNDEFINED);
- CHECK_SLOT (intisa, fmt, slot, XTENSA_UNDEFINED);
-
- slot_id = intisa->formats[fmt].slot_id[slot];
-
- opc = (intisa->slots[slot_id].opcode_decode_fn) (slotbuf);
- if (opc != XTENSA_UNDEFINED) {
- return opc;
- }
-
- xtisa_errno = xtensa_isa_bad_opcode;
- strcpy (xtisa_error_msg, "cannot decode opcode");
- return XTENSA_UNDEFINED;
-}
-
-
-int
-xtensa_opcode_encode (xtensa_isa isa, xtensa_format fmt, int slot,
- xtensa_insnbuf slotbuf, xtensa_opcode opc)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- int slot_id;
- xtensa_opcode_encode_fn encode_fn;
-
- CHECK_FORMAT (intisa, fmt, -1);
- CHECK_SLOT (intisa, fmt, slot, -1);
- CHECK_OPCODE (intisa, opc, -1);
-
- slot_id = intisa->formats[fmt].slot_id[slot];
- encode_fn = intisa->opcodes[opc].encode_fns[slot_id];
- if (!encode_fn)
- {
- xtisa_errno = xtensa_isa_wrong_slot;
- sprintf (xtisa_error_msg,
- "opcode \"%s\" is not allowed in slot %d of format \"%s\"",
- intisa->opcodes[opc].name, slot, intisa->formats[fmt].name);
- return -1;
- }
- (*encode_fn) (slotbuf);
- return 0;
-}
-
-
-const char *
-xtensa_opcode_name (xtensa_isa isa, xtensa_opcode opc)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_OPCODE (intisa, opc, NULL);
- return intisa->opcodes[opc].name;
-}
-
-
-int
-xtensa_opcode_is_branch (xtensa_isa isa, xtensa_opcode opc)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_OPCODE (intisa, opc, XTENSA_UNDEFINED);
- if ((intisa->opcodes[opc].flags & XTENSA_OPCODE_IS_BRANCH) != 0) {
- return 1;
- }
- return 0;
-}
-
-
-int
-xtensa_opcode_is_jump (xtensa_isa isa, xtensa_opcode opc)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_OPCODE (intisa, opc, XTENSA_UNDEFINED);
- if ((intisa->opcodes[opc].flags & XTENSA_OPCODE_IS_JUMP) != 0) {
- return 1;
- }
- return 0;
-}
-
-
-int
-xtensa_opcode_is_loop (xtensa_isa isa, xtensa_opcode opc)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_OPCODE (intisa, opc, XTENSA_UNDEFINED);
- if ((intisa->opcodes[opc].flags & XTENSA_OPCODE_IS_LOOP) != 0) {
- return 1;
- }
- return 0;
-}
-
-
-int
-xtensa_opcode_is_call (xtensa_isa isa, xtensa_opcode opc)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_OPCODE (intisa, opc, XTENSA_UNDEFINED);
- if ((intisa->opcodes[opc].flags & XTENSA_OPCODE_IS_CALL) != 0) {
- return 1;
- }
- return 0;
-}
-
-
-int
-xtensa_opcode_num_operands (xtensa_isa isa, xtensa_opcode opc)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- int iclass_id;
-
- CHECK_OPCODE (intisa, opc, XTENSA_UNDEFINED);
- iclass_id = intisa->opcodes[opc].iclass_id;
- return intisa->iclasses[iclass_id].num_operands;
-}
-
-
-int
-xtensa_opcode_num_stateOperands (xtensa_isa isa, xtensa_opcode opc)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- int iclass_id;
-
- CHECK_OPCODE (intisa, opc, XTENSA_UNDEFINED);
- iclass_id = intisa->opcodes[opc].iclass_id;
- return intisa->iclasses[iclass_id].num_stateOperands;
-}
-
-
-int
-xtensa_opcode_num_interfaceOperands (xtensa_isa isa, xtensa_opcode opc)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- int iclass_id;
-
- CHECK_OPCODE (intisa, opc, XTENSA_UNDEFINED);
- iclass_id = intisa->opcodes[opc].iclass_id;
- return intisa->iclasses[iclass_id].num_interfaceOperands;
-}
-
-
-int
-xtensa_opcode_num_funcUnit_uses (xtensa_isa isa, xtensa_opcode opc)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_OPCODE (intisa, opc, XTENSA_UNDEFINED);
- return intisa->opcodes[opc].num_funcUnit_uses;
-}
-
-
-xtensa_funcUnit_use *
-xtensa_opcode_funcUnit_use (xtensa_isa isa, xtensa_opcode opc, int u)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_OPCODE (intisa, opc, NULL);
- if (u < 0 || u >= intisa->opcodes[opc].num_funcUnit_uses)
- {
- xtisa_errno = xtensa_isa_bad_funcUnit;
- sprintf (xtisa_error_msg, "invalid functional unit use number (%d); "
- "opcode \"%s\" has %d", u, intisa->opcodes[opc].name,
- intisa->opcodes[opc].num_funcUnit_uses);
- return NULL;
- }
- return &intisa->opcodes[opc].funcUnit_uses[u];
-}
-
-
-
-/* Operand information. */
-
-
-#define CHECK_OPERAND(INTISA,OPC,ICLASS,OPND,ERRVAL) \
- do { \
- if ((OPND) < 0 || (OPND) >= (ICLASS)->num_operands) \
- { \
- xtisa_errno = xtensa_isa_bad_operand; \
- sprintf (xtisa_error_msg, "invalid operand number (%d); " \
- "opcode \"%s\" has %d operands", (OPND), \
- (INTISA)->opcodes[(OPC)].name, (ICLASS)->num_operands); \
- return (ERRVAL); \
- } \
- } while (0)
-
-
-static xtensa_operand_internal *
-get_operand (xtensa_isa_internal *intisa, xtensa_opcode opc, int opnd)
-{
- xtensa_iclass_internal *iclass;
- int iclass_id, operand_id;
-
- CHECK_OPCODE (intisa, opc, NULL);
- iclass_id = intisa->opcodes[opc].iclass_id;
- iclass = &intisa->iclasses[iclass_id];
- CHECK_OPERAND (intisa, opc, iclass, opnd, NULL);
- operand_id = iclass->operands[opnd].u.operand_id;
- return &intisa->operands[operand_id];
-}
-
-
-const char *
-xtensa_operand_name (xtensa_isa isa, xtensa_opcode opc, int opnd)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- xtensa_operand_internal *intop;
-
- intop = get_operand (intisa, opc, opnd);
- if (!intop) {
- return NULL;
- }
- return intop->name;
-}
-
-
-int
-xtensa_operand_is_visible (xtensa_isa isa, xtensa_opcode opc, int opnd)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- xtensa_iclass_internal *iclass;
- int iclass_id, operand_id;
- xtensa_operand_internal *intop;
-
- CHECK_OPCODE (intisa, opc, XTENSA_UNDEFINED);
- iclass_id = intisa->opcodes[opc].iclass_id;
- iclass = &intisa->iclasses[iclass_id];
- CHECK_OPERAND (intisa, opc, iclass, opnd, XTENSA_UNDEFINED);
-
- /* Special case for "sout" operands. */
- if (iclass->operands[opnd].inout == 's') {
- return 0;
- }
-
- operand_id = iclass->operands[opnd].u.operand_id;
- intop = &intisa->operands[operand_id];
-
- if ((intop->flags & XTENSA_OPERAND_IS_INVISIBLE) == 0) {
- return 1;
- }
- return 0;
-}
-
-
-char
-xtensa_operand_inout (xtensa_isa isa, xtensa_opcode opc, int opnd)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- xtensa_iclass_internal *iclass;
- int iclass_id;
- char inout;
-
- CHECK_OPCODE (intisa, opc, 0);
- iclass_id = intisa->opcodes[opc].iclass_id;
- iclass = &intisa->iclasses[iclass_id];
- CHECK_OPERAND (intisa, opc, iclass, opnd, 0);
- inout = iclass->operands[opnd].inout;
-
- /* Special case for "sout" operands. */
- if (inout == 's') {
- return 'o';
- }
-
- return inout;
-}
-
-
-int
-xtensa_operand_get_field (xtensa_isa isa, xtensa_opcode opc, int opnd,
- xtensa_format fmt, int slot,
- const xtensa_insnbuf slotbuf, uint32 *valp)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- xtensa_operand_internal *intop;
- int slot_id;
- xtensa_get_field_fn get_fn;
-
- intop = get_operand (intisa, opc, opnd);
- if (!intop) {
- return -1;
- }
-
- CHECK_FORMAT (intisa, fmt, -1);
- CHECK_SLOT (intisa, fmt, slot, -1);
-
- slot_id = intisa->formats[fmt].slot_id[slot];
- if (intop->field_id == XTENSA_UNDEFINED)
- {
- xtisa_errno = xtensa_isa_no_field;
- strcpy (xtisa_error_msg, "implicit operand has no field");
- return -1;
- }
- get_fn = intisa->slots[slot_id].get_field_fns[intop->field_id];
- if (!get_fn)
- {
- xtisa_errno = xtensa_isa_wrong_slot;
- sprintf (xtisa_error_msg,
- "operand \"%s\" does not exist in slot %d of format \"%s\"",
- intop->name, slot, intisa->formats[fmt].name);
- return -1;
- }
- *valp = (*get_fn) (slotbuf);
- return 0;
-}
-
-
-int
-xtensa_operand_set_field (xtensa_isa isa, xtensa_opcode opc, int opnd,
- xtensa_format fmt, int slot,
- xtensa_insnbuf slotbuf, uint32 val)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- xtensa_operand_internal *intop;
- int slot_id;
- xtensa_set_field_fn set_fn;
-
- intop = get_operand (intisa, opc, opnd);
- if (!intop) {
- return -1;
- }
-
- CHECK_FORMAT (intisa, fmt, -1);
- CHECK_SLOT (intisa, fmt, slot, -1);
-
- slot_id = intisa->formats[fmt].slot_id[slot];
- if (intop->field_id == XTENSA_UNDEFINED)
- {
- xtisa_errno = xtensa_isa_no_field;
- strcpy (xtisa_error_msg, "implicit operand has no field");
- return -1;
- }
- set_fn = intisa->slots[slot_id].set_field_fns[intop->field_id];
- if (!set_fn)
- {
- xtisa_errno = xtensa_isa_wrong_slot;
- sprintf (xtisa_error_msg,
- "operand \"%s\" does not exist in slot %d of format \"%s\"",
- intop->name, slot, intisa->formats[fmt].name);
- return -1;
- }
- (*set_fn) (slotbuf, val);
- return 0;
-}
-
-
-int
-xtensa_operand_encode (xtensa_isa isa, xtensa_opcode opc, int opnd,
- uint32 *valp)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- xtensa_operand_internal *intop;
- uint32 test_val, orig_val;
-
- intop = get_operand (intisa, opc, opnd);
- if (!intop) {
- return -1;
- }
-
- if (!intop->encode)
- {
- /* This is a default operand for a field. How can we tell if the
- value fits in the field? Write the value into the field,
- read it back, and then make sure we get the same value. */
- static xtensa_insnbuf tmpbuf = 0;
- int slot_id;
-
- if (!tmpbuf)
- {
- tmpbuf = xtensa_insnbuf_alloc (isa);
- CHECK_ALLOC (tmpbuf, -1);
- }
-
- /* A default operand is always associated with a field,
- but check just to be sure.... */
- if (intop->field_id == XTENSA_UNDEFINED)
- {
- xtisa_errno = xtensa_isa_internal_error;
- strcpy (xtisa_error_msg, "operand has no field");
- return -1;
- }
-
- /* Find some slot that includes the field. */
- for (slot_id = 0; slot_id < intisa->num_slots; slot_id++)
- {
- xtensa_get_field_fn get_fn =
- intisa->slots[slot_id].get_field_fns[intop->field_id];
- xtensa_set_field_fn set_fn =
- intisa->slots[slot_id].set_field_fns[intop->field_id];
-
- if (get_fn && set_fn)
- {
- (*set_fn) (tmpbuf, *valp);
- return ((*get_fn) (tmpbuf) != *valp);
- }
- }
-
- /* Couldn't find any slot containing the field.... */
- xtisa_errno = xtensa_isa_no_field;
- strcpy (xtisa_error_msg, "field does not exist in any slot");
- return -1;
- }
-
- /* Encode the value. In some cases, the encoding function may detect
- errors, but most of the time the only way to determine if the value
- was successfully encoded is to decode it and check if it matches
- the original value. */
- orig_val = *valp;
- if ((*intop->encode) (valp)
- || (test_val = *valp, (*intop->decode) (&test_val))
- || test_val != orig_val)
- {
- xtisa_errno = xtensa_isa_bad_value;
- sprintf (xtisa_error_msg, "cannot encode operand value 0x%08x", *valp);
- return -1;
- }
-
- return 0;
-}
-
-
-int
-xtensa_operand_decode (xtensa_isa isa, xtensa_opcode opc, int opnd,
- uint32 *valp)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- xtensa_operand_internal *intop;
-
- intop = get_operand (intisa, opc, opnd);
- if (!intop) {
- return -1;
- }
-
- /* Use identity function for "default" operands. */
- if (!intop->decode) {
- return 0;
- }
-
- if ((*intop->decode) (valp))
- {
- xtisa_errno = xtensa_isa_bad_value;
- sprintf (xtisa_error_msg, "cannot decode operand value 0x%08x", *valp);
- return -1;
- }
- return 0;
-}
-
-
-int
-xtensa_operand_is_register (xtensa_isa isa, xtensa_opcode opc, int opnd)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- xtensa_operand_internal *intop;
-
- intop = get_operand (intisa, opc, opnd);
- if (!intop) {
- return XTENSA_UNDEFINED;
- }
-
- if ((intop->flags & XTENSA_OPERAND_IS_REGISTER) != 0) {
- return 1;
- }
- return 0;
-}
-
-
-xtensa_regfile
-xtensa_operand_regfile (xtensa_isa isa, xtensa_opcode opc, int opnd)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- xtensa_operand_internal *intop;
-
- intop = get_operand (intisa, opc, opnd);
- if (!intop) {
- return XTENSA_UNDEFINED;
- }
-
- return intop->regfile;
-}
-
-
-int
-xtensa_operand_num_regs (xtensa_isa isa, xtensa_opcode opc, int opnd)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- xtensa_operand_internal *intop;
-
- intop = get_operand (intisa, opc, opnd);
- if (!intop) {
- return XTENSA_UNDEFINED;
- }
-
- return intop->num_regs;
-}
-
-
-int
-xtensa_operand_is_known_reg (xtensa_isa isa, xtensa_opcode opc, int opnd)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- xtensa_operand_internal *intop;
-
- intop = get_operand (intisa, opc, opnd);
- if (!intop) {
- return XTENSA_UNDEFINED;
- }
-
- if ((intop->flags & XTENSA_OPERAND_IS_UNKNOWN) == 0) {
- return 1;
- }
- return 0;
-}
-
-
-int
-xtensa_operand_is_PCrelative (xtensa_isa isa, xtensa_opcode opc, int opnd)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- xtensa_operand_internal *intop;
-
- intop = get_operand (intisa, opc, opnd);
- if (!intop) {
- return XTENSA_UNDEFINED;
- }
-
- if ((intop->flags & XTENSA_OPERAND_IS_PCRELATIVE) != 0) {
- return 1;
- }
- return 0;
-}
-
-
-int
-xtensa_operand_do_reloc (xtensa_isa isa, xtensa_opcode opc, int opnd,
- uint32 *valp, uint32 pc)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- xtensa_operand_internal *intop;
-
- intop = get_operand (intisa, opc, opnd);
- if (!intop) {
- return -1;
- }
-
- if ((intop->flags & XTENSA_OPERAND_IS_PCRELATIVE) == 0) {
- return 0;
- }
-
- if (!intop->do_reloc)
- {
- xtisa_errno = xtensa_isa_internal_error;
- strcpy (xtisa_error_msg, "operand missing do_reloc function");
- return -1;
- }
-
- if ((*intop->do_reloc) (valp, pc))
- {
- xtisa_errno = xtensa_isa_bad_value;
- sprintf (xtisa_error_msg,
- "do_reloc failed for value 0x%08x at PC 0x%08x", *valp, pc);
- return -1;
- }
-
- return 0;
-}
-
-
-int
-xtensa_operand_undo_reloc (xtensa_isa isa, xtensa_opcode opc, int opnd,
- uint32 *valp, uint32 pc)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- xtensa_operand_internal *intop;
-
- intop = get_operand (intisa, opc, opnd);
- if (!intop) {
- return -1;
- }
-
- if ((intop->flags & XTENSA_OPERAND_IS_PCRELATIVE) == 0) {
- return 0;
- }
-
- if (!intop->undo_reloc)
- {
- xtisa_errno = xtensa_isa_internal_error;
- strcpy (xtisa_error_msg, "operand missing undo_reloc function");
- return -1;
- }
-
- if ((*intop->undo_reloc) (valp, pc))
- {
- xtisa_errno = xtensa_isa_bad_value;
- sprintf (xtisa_error_msg,
- "undo_reloc failed for value 0x%08x at PC 0x%08x", *valp, pc);
- return -1;
- }
-
- return 0;
-}
-
-
-
-/* State Operands. */
-
-
-#define CHECK_STATE_OPERAND(INTISA,OPC,ICLASS,STOP,ERRVAL) \
- do { \
- if ((STOP) < 0 || (STOP) >= (ICLASS)->num_stateOperands) \
- { \
- xtisa_errno = xtensa_isa_bad_operand; \
- sprintf (xtisa_error_msg, "invalid state operand number (%d); " \
- "opcode \"%s\" has %d state operands", (STOP), \
- (INTISA)->opcodes[(OPC)].name, (ICLASS)->num_stateOperands); \
- return (ERRVAL); \
- } \
- } while (0)
-
-
-xtensa_state
-xtensa_stateOperand_state (xtensa_isa isa, xtensa_opcode opc, int stOp)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- xtensa_iclass_internal *iclass;
- int iclass_id;
-
- CHECK_OPCODE (intisa, opc, XTENSA_UNDEFINED);
- iclass_id = intisa->opcodes[opc].iclass_id;
- iclass = &intisa->iclasses[iclass_id];
- CHECK_STATE_OPERAND (intisa, opc, iclass, stOp, XTENSA_UNDEFINED);
- return iclass->stateOperands[stOp].u.state;
-}
-
-
-char
-xtensa_stateOperand_inout (xtensa_isa isa, xtensa_opcode opc, int stOp)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- xtensa_iclass_internal *iclass;
- int iclass_id;
-
- CHECK_OPCODE (intisa, opc, 0);
- iclass_id = intisa->opcodes[opc].iclass_id;
- iclass = &intisa->iclasses[iclass_id];
- CHECK_STATE_OPERAND (intisa, opc, iclass, stOp, 0);
- return iclass->stateOperands[stOp].inout;
-}
-
-
-
-/* Interface Operands. */
-
-
-#define CHECK_INTERFACE_OPERAND(INTISA,OPC,ICLASS,IFOP,ERRVAL) \
- do { \
- if ((IFOP) < 0 || (IFOP) >= (ICLASS)->num_interfaceOperands) \
- { \
- xtisa_errno = xtensa_isa_bad_operand; \
- sprintf (xtisa_error_msg, "invalid interface operand number (%d); " \
- "opcode \"%s\" has %d interface operands", (IFOP), \
- (INTISA)->opcodes[(OPC)].name, \
- (ICLASS)->num_interfaceOperands); \
- return (ERRVAL); \
- } \
- } while (0)
-
-
-xtensa_interface
-xtensa_interfaceOperand_interface (xtensa_isa isa, xtensa_opcode opc,
- int ifOp)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- xtensa_iclass_internal *iclass;
- int iclass_id;
-
- CHECK_OPCODE (intisa, opc, XTENSA_UNDEFINED);
- iclass_id = intisa->opcodes[opc].iclass_id;
- iclass = &intisa->iclasses[iclass_id];
- CHECK_INTERFACE_OPERAND (intisa, opc, iclass, ifOp, XTENSA_UNDEFINED);
- return iclass->interfaceOperands[ifOp];
-}
-
-
-
-/* Register Files. */
-
-
-#define CHECK_REGFILE(INTISA,RF,ERRVAL) \
- do { \
- if ((RF) < 0 || (RF) >= (INTISA)->num_regfiles) \
- { \
- xtisa_errno = xtensa_isa_bad_regfile; \
- strcpy (xtisa_error_msg, "invalid regfile specifier"); \
- return (ERRVAL); \
- } \
- } while (0)
-
-
-xtensa_regfile
-xtensa_regfile_lookup (xtensa_isa isa, const char *name)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- int n;
-
- if (!name || !*name)
- {
- xtisa_errno = xtensa_isa_bad_regfile;
- strcpy (xtisa_error_msg, "invalid regfile name");
- return XTENSA_UNDEFINED;
- }
-
- /* The expected number of regfiles is small; use a linear search. */
- for (n = 0; n < intisa->num_regfiles; n++)
- {
- if (!filename_cmp (intisa->regfiles[n].name, name)) {
- return n;
- }
- }
-
- xtisa_errno = xtensa_isa_bad_regfile;
- sprintf (xtisa_error_msg, "regfile \"%s\" not recognized", name);
- return XTENSA_UNDEFINED;
-}
-
-
-xtensa_regfile
-xtensa_regfile_lookup_shortname (xtensa_isa isa, const char *shortname)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- int n;
-
- if (!shortname || !*shortname)
- {
- xtisa_errno = xtensa_isa_bad_regfile;
- strcpy (xtisa_error_msg, "invalid regfile shortname");
- return XTENSA_UNDEFINED;
- }
-
- /* The expected number of regfiles is small; use a linear search. */
- for (n = 0; n < intisa->num_regfiles; n++)
- {
- /* Ignore regfile views since they always have the same shortnames
- as their parents. */
- if (intisa->regfiles[n].parent != n) {
- continue;
- }
- if (!filename_cmp (intisa->regfiles[n].shortname, shortname)) {
- return n;
- }
- }
-
- xtisa_errno = xtensa_isa_bad_regfile;
- sprintf (xtisa_error_msg, "regfile shortname \"%s\" not recognized",
- shortname);
- return XTENSA_UNDEFINED;
-}
-
-
-const char *
-xtensa_regfile_name (xtensa_isa isa, xtensa_regfile rf)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_REGFILE (intisa, rf, NULL);
- return intisa->regfiles[rf].name;
-}
-
-
-const char *
-xtensa_regfile_shortname (xtensa_isa isa, xtensa_regfile rf)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_REGFILE (intisa, rf, NULL);
- return intisa->regfiles[rf].shortname;
-}
-
-
-xtensa_regfile
-xtensa_regfile_view_parent (xtensa_isa isa, xtensa_regfile rf)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_REGFILE (intisa, rf, XTENSA_UNDEFINED);
- return intisa->regfiles[rf].parent;
-}
-
-
-int
-xtensa_regfile_num_bits (xtensa_isa isa, xtensa_regfile rf)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_REGFILE (intisa, rf, XTENSA_UNDEFINED);
- return intisa->regfiles[rf].num_bits;
-}
-
-
-int
-xtensa_regfile_num_entries (xtensa_isa isa, xtensa_regfile rf)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_REGFILE (intisa, rf, XTENSA_UNDEFINED);
- return intisa->regfiles[rf].num_entries;
-}
-
-
-
-/* Processor States. */
-
-
-#define CHECK_STATE(INTISA,ST,ERRVAL) \
- do { \
- if ((ST) < 0 || (ST) >= (INTISA)->num_states) \
- { \
- xtisa_errno = xtensa_isa_bad_state; \
- strcpy (xtisa_error_msg, "invalid state specifier"); \
- return (ERRVAL); \
- } \
- } while (0)
-
-
-xtensa_state
-xtensa_state_lookup (xtensa_isa isa, const char *name)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- xtensa_lookup_entry entry, *result = 0;
-
- if (!name || !*name)
- {
- xtisa_errno = xtensa_isa_bad_state;
- strcpy (xtisa_error_msg, "invalid state name");
- return XTENSA_UNDEFINED;
- }
-
- if (intisa->num_states != 0)
- {
- entry.key = name;
- result = bsearch (&entry, intisa->state_lookup_table, intisa->num_states,
- sizeof (xtensa_lookup_entry), xtensa_isa_name_compare);
- }
-
- if (!result)
- {
- xtisa_errno = xtensa_isa_bad_state;
- sprintf (xtisa_error_msg, "state \"%s\" not recognized", name);
- return XTENSA_UNDEFINED;
- }
-
- return result->u.state;
-}
-
-
-const char *
-xtensa_state_name (xtensa_isa isa, xtensa_state st)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_STATE (intisa, st, NULL);
- return intisa->states[st].name;
-}
-
-
-int
-xtensa_state_num_bits (xtensa_isa isa, xtensa_state st)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_STATE (intisa, st, XTENSA_UNDEFINED);
- return intisa->states[st].num_bits;
-}
-
-
-int
-xtensa_state_is_exported (xtensa_isa isa, xtensa_state st)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_STATE (intisa, st, XTENSA_UNDEFINED);
- if ((intisa->states[st].flags & XTENSA_STATE_IS_EXPORTED) != 0) {
- return 1;
- }
- return 0;
-}
-
-
-int
-xtensa_state_is_shared_or (xtensa_isa isa, xtensa_state st)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_STATE (intisa, st, XTENSA_UNDEFINED);
- if ((intisa->states[st].flags & XTENSA_STATE_IS_SHARED_OR) != 0) {
- return 1;
- }
- return 0;
-}
-
-
-
-/* Sysregs. */
-
-
-#define CHECK_SYSREG(INTISA,SYSREG,ERRVAL) \
- do { \
- if ((SYSREG) < 0 || (SYSREG) >= (INTISA)->num_sysregs) \
- { \
- xtisa_errno = xtensa_isa_bad_sysreg; \
- strcpy (xtisa_error_msg, "invalid sysreg specifier"); \
- return (ERRVAL); \
- } \
- } while (0)
-
-
-xtensa_sysreg
-xtensa_sysreg_lookup (xtensa_isa isa, int num, int is_user)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
-
- if (is_user != 0) {
- is_user = 1;
- }
-
- if (num < 0 || num > intisa->max_sysreg_num[is_user]
- || intisa->sysreg_table[is_user][num] == XTENSA_UNDEFINED)
- {
- xtisa_errno = xtensa_isa_bad_sysreg;
- strcpy (xtisa_error_msg, "sysreg not recognized");
- return XTENSA_UNDEFINED;
- }
-
- return intisa->sysreg_table[is_user][num];
-}
-
-
-xtensa_sysreg
-xtensa_sysreg_lookup_name (xtensa_isa isa, const char *name)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- xtensa_lookup_entry entry, *result = 0;
-
- if (!name || !*name)
- {
- xtisa_errno = xtensa_isa_bad_sysreg;
- strcpy (xtisa_error_msg, "invalid sysreg name");
- return XTENSA_UNDEFINED;
- }
-
- if (intisa->num_sysregs != 0)
- {
- entry.key = name;
- result = bsearch (&entry, intisa->sysreg_lookup_table,
- intisa->num_sysregs, sizeof (xtensa_lookup_entry),
- xtensa_isa_name_compare);
- }
-
- if (!result)
- {
- xtisa_errno = xtensa_isa_bad_sysreg;
- sprintf (xtisa_error_msg, "sysreg \"%s\" not recognized", name);
- return XTENSA_UNDEFINED;
- }
-
- return result->u.sysreg;
-}
-
-
-const char *
-xtensa_sysreg_name (xtensa_isa isa, xtensa_sysreg sysreg)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_SYSREG (intisa, sysreg, NULL);
- return intisa->sysregs[sysreg].name;
-}
-
-
-int
-xtensa_sysreg_number (xtensa_isa isa, xtensa_sysreg sysreg)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_SYSREG (intisa, sysreg, XTENSA_UNDEFINED);
- return intisa->sysregs[sysreg].number;
-}
-
-
-int
-xtensa_sysreg_is_user (xtensa_isa isa, xtensa_sysreg sysreg)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_SYSREG (intisa, sysreg, XTENSA_UNDEFINED);
- if (intisa->sysregs[sysreg].is_user) {
- return 1;
- }
- return 0;
-}
-
-
-
-/* Interfaces. */
-
-
-#define CHECK_INTERFACE(INTISA,INTF,ERRVAL) \
- do { \
- if ((INTF) < 0 || (INTF) >= (INTISA)->num_interfaces) \
- { \
- xtisa_errno = xtensa_isa_bad_interface; \
- strcpy (xtisa_error_msg, "invalid interface specifier"); \
- return (ERRVAL); \
- } \
- } while (0)
-
-
-xtensa_interface
-xtensa_interface_lookup (xtensa_isa isa, const char *ifname)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- xtensa_lookup_entry entry, *result = 0;
-
- if (!ifname || !*ifname)
- {
- xtisa_errno = xtensa_isa_bad_interface;
- strcpy (xtisa_error_msg, "invalid interface name");
- return XTENSA_UNDEFINED;
- }
-
- if (intisa->num_interfaces != 0)
- {
- entry.key = ifname;
- result = bsearch (&entry, intisa->interface_lookup_table,
- intisa->num_interfaces, sizeof (xtensa_lookup_entry),
- xtensa_isa_name_compare);
- }
-
- if (!result)
- {
- xtisa_errno = xtensa_isa_bad_interface;
- sprintf (xtisa_error_msg, "interface \"%s\" not recognized", ifname);
- return XTENSA_UNDEFINED;
- }
-
- return result->u.intf;
-}
-
-
-const char *
-xtensa_interface_name (xtensa_isa isa, xtensa_interface intf)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_INTERFACE (intisa, intf, NULL);
- return intisa->interfaces[intf].name;
-}
-
-
-int
-xtensa_interface_num_bits (xtensa_isa isa, xtensa_interface intf)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_INTERFACE (intisa, intf, XTENSA_UNDEFINED);
- return intisa->interfaces[intf].num_bits;
-}
-
-
-char
-xtensa_interface_inout (xtensa_isa isa, xtensa_interface intf)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_INTERFACE (intisa, intf, 0);
- return intisa->interfaces[intf].inout;
-}
-
-
-int
-xtensa_interface_has_side_effect (xtensa_isa isa, xtensa_interface intf)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_INTERFACE (intisa, intf, XTENSA_UNDEFINED);
- if ((intisa->interfaces[intf].flags & XTENSA_INTERFACE_HAS_SIDE_EFFECT) != 0) {
- return 1;
- }
- return 0;
-}
-
-
-int
-xtensa_interface_class_id (xtensa_isa isa, xtensa_interface intf)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_INTERFACE (intisa, intf, XTENSA_UNDEFINED);
- return intisa->interfaces[intf].class_id;
-}
-
-
-
-/* Functional Units. */
-
-
-#define CHECK_FUNCUNIT(INTISA,FUN,ERRVAL) \
- do { \
- if ((FUN) < 0 || (FUN) >= (INTISA)->num_funcUnits) \
- { \
- xtisa_errno = xtensa_isa_bad_funcUnit; \
- strcpy (xtisa_error_msg, "invalid functional unit specifier"); \
- return (ERRVAL); \
- } \
- } while (0)
-
-
-xtensa_funcUnit
-xtensa_funcUnit_lookup (xtensa_isa isa, const char *fname)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- xtensa_lookup_entry entry, *result = 0;
-
- if (!fname || !*fname)
- {
- xtisa_errno = xtensa_isa_bad_funcUnit;
- strcpy (xtisa_error_msg, "invalid functional unit name");
- return XTENSA_UNDEFINED;
- }
-
- if (intisa->num_funcUnits != 0)
- {
- entry.key = fname;
- result = bsearch (&entry, intisa->funcUnit_lookup_table,
- intisa->num_funcUnits, sizeof (xtensa_lookup_entry),
- xtensa_isa_name_compare);
- }
-
- if (!result)
- {
- xtisa_errno = xtensa_isa_bad_funcUnit;
- sprintf (xtisa_error_msg,
- "functional unit \"%s\" not recognized", fname);
- return XTENSA_UNDEFINED;
- }
-
- return result->u.fun;
-}
-
-
-const char *
-xtensa_funcUnit_name (xtensa_isa isa, xtensa_funcUnit fun)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_FUNCUNIT (intisa, fun, NULL);
- return intisa->funcUnits[fun].name;
-}
-
-
-int
-xtensa_funcUnit_num_copies (xtensa_isa isa, xtensa_funcUnit fun)
-{
- xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
- CHECK_FUNCUNIT (intisa, fun, XTENSA_UNDEFINED);
- return intisa->funcUnits[fun].num_copies;
-}
-
diff --git a/librz/arch/isa_gnu/xtensa/xtensa-isa.h b/librz/arch/isa_gnu/xtensa/xtensa-isa.h
deleted file mode 100644
index 8fd13f87587..00000000000
--- a/librz/arch/isa_gnu/xtensa/xtensa-isa.h
+++ /dev/null
@@ -1,743 +0,0 @@
-// SPDX-FileCopyrightText: 2003-2015 Free Software Foundation, Inc.
-// SPDX-License-Identifier: GPL-3.0-or-later
-
-/* Interface definition for configurable Xtensa ISA support.
- Copyright (C) 2003-2015 Free Software Foundation, Inc.
-
- This file is part of BFD, the Binary File Descriptor library.
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301,
- USA. */
-
-#ifndef XTENSA_LIBISA_H
-#define XTENSA_LIBISA_H
-
-#include <rz_types.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/* Version number: This is intended to help support code that works with
- versions of this library from multiple Xtensa releases. */
-
-#define XTENSA_ISA_VERSION 7000
-
-#ifndef uint32
-#define uint32 unsigned int
-#endif
-
-/* This file defines the interface to the Xtensa ISA library. This
- library contains most of the ISA-specific information for a
- particular Xtensa processor. For example, the set of valid
- instructions, their opcode encodings and operand fields are all
- included here.
-
- This interface basically defines a number of abstract data types.
-
- . an instruction buffer - for holding the raw instruction bits
- . ISA info - information about the ISA as a whole
- . instruction formats - instruction size and slot structure
- . opcodes - information about individual instructions
- . operands - information about register and immediate instruction operands
- . stateOperands - information about processor state instruction operands
- . interfaceOperands - information about interface instruction operands
- . register files - register file information
- . processor states - internal processor state information
- . system registers - "special registers" and "user registers"
- . interfaces - TIE interfaces that are external to the processor
- . functional units - TIE shared functions
-
- The interface defines a set of functions to access each data type.
- With the exception of the instruction buffer, the internal
- representations of the data structures are hidden. All accesses must
- be made through the functions defined here. */
-
-typedef struct xtensa_isa_opaque {
- int unused;
-} *xtensa_isa;
-
-#if defined(_MSC_VER)
-__declspec(dllexport)
-#endif
- extern xtensa_isa xtensa_default_isa;
-
-/* Most of the Xtensa ISA entities (e.g., opcodes, regfiles, etc.) are
- represented here using sequential integers beginning with 0. The
- specific values are only fixed for a particular instantiation of an
- xtensa_isa structure, so these values should only be used
- internally. */
-
-typedef int xtensa_opcode;
-typedef int xtensa_format;
-typedef int xtensa_regfile;
-typedef int xtensa_state;
-typedef int xtensa_sysreg;
-typedef int xtensa_interface;
-typedef int xtensa_funcUnit;
-
-/* Define a unique value for undefined items. */
-
-#define XTENSA_UNDEFINED -1
-
-/* Overview of using this interface to decode/encode instructions:
-
- Each Xtensa instruction is associated with a particular instruction
- format, where the format defines a fixed number of slots for
- operations. The formats for the core Xtensa ISA have only one slot,
- but FLIX instructions may have multiple slots. Within each slot,
- there is a single opcode and some number of associated operands.
-
- The encoding and decoding functions operate on instruction buffers,
- not on the raw bytes of the instructions. The same instruction
- buffer data structure is used for both entire instructions and
- individual slots in those instructions -- the contents of a slot need
- to be extracted from or inserted into the buffer for the instruction
- as a whole.
-
- Decoding an instruction involves first finding the format, which
- identifies the number of slots, and then decoding each slot
- separately. A slot is decoded by finding the opcode and then using
- the opcode to determine how many operands there are. For example:
-
- xtensa_insnbuf_from_chars
- xtensa_format_decode
- for each slot {
- xtensa_format_get_slot
- xtensa_opcode_decode
- for each operand {
- xtensa_operand_get_field
- xtensa_operand_decode
- }
- }
-
- Encoding an instruction is roughly the same procedure in reverse:
-
- xtensa_format_encode
- for each slot {
- xtensa_opcode_encode
- for each operand {
- xtensa_operand_encode
- xtensa_operand_set_field
- }
- xtensa_format_set_slot
- }
- xtensa_insnbuf_to_chars
-*/
-
-/* Error handling. */
-
-/* Error codes. The code for the most recent error condition can be
- retrieved with the "errno" function. For any result other than
- xtensa_isa_ok, an error message containing additional information
- about the problem can be retrieved using the "error_msg" function.
- The error messages are stored in an internal buffer, which should
- not be freed and may be overwritten by subsequent operations. */
-
-typedef enum xtensa_isa_status_enum {
- xtensa_isa_ok = 0,
- xtensa_isa_bad_format,
- xtensa_isa_bad_slot,
- xtensa_isa_bad_opcode,
- xtensa_isa_bad_operand,
- xtensa_isa_bad_field,
- xtensa_isa_bad_iclass,
- xtensa_isa_bad_regfile,
- xtensa_isa_bad_sysreg,
- xtensa_isa_bad_state,
- xtensa_isa_bad_interface,
- xtensa_isa_bad_funcUnit,
- xtensa_isa_wrong_slot,
- xtensa_isa_no_field,
- xtensa_isa_out_of_memory,
- xtensa_isa_buffer_overflow,
- xtensa_isa_internal_error,
- xtensa_isa_bad_value
-} xtensa_isa_status;
-
-extern xtensa_isa_status
-xtensa_isa_errno(xtensa_isa isa);
-
-extern char *
-xtensa_isa_error_msg(xtensa_isa isa);
-
-/* Instruction buffers. */
-
-typedef uint32 xtensa_insnbuf_word;
-typedef xtensa_insnbuf_word *xtensa_insnbuf;
-
-/* Get the size in "insnbuf_words" of the xtensa_insnbuf array. */
-
-extern int
-xtensa_insnbuf_size(xtensa_isa isa);
-
-/* Allocate an xtensa_insnbuf of the right size. */
-
-extern xtensa_insnbuf
-xtensa_insnbuf_alloc(xtensa_isa isa);
-
-/* Release an xtensa_insnbuf. */
-
-extern void
-xtensa_insnbuf_free(xtensa_isa isa, xtensa_insnbuf buf);
-
-/* Conversion between raw memory (char arrays) and our internal
- instruction representation. This is complicated by the Xtensa ISA's
- variable instruction lengths. When converting to chars, the buffer
- must contain a valid instruction so we know how many bytes to copy;
- thus, the "to_chars" function returns the number of bytes copied or
- XTENSA_UNDEFINED on error. The "from_chars" function first reads the
- minimal number of bytes required to decode the instruction length and
- then proceeds to copy the entire instruction into the buffer; if the
- memory does not contain a valid instruction, it copies the maximum
- number of bytes required for the longest Xtensa instruction. The
- "num_chars" argument may be used to limit the number of bytes that
- can be read or written. Otherwise, if "num_chars" is zero, the
- functions may read or write past the end of the code. */
-
-extern int
-xtensa_insnbuf_to_chars(xtensa_isa isa, const xtensa_insnbuf insn,
- unsigned char *cp, int num_chars);
-
-extern void
-xtensa_insnbuf_from_chars(xtensa_isa isa, xtensa_insnbuf insn,
- const unsigned char *cp, int num_chars);
-
-/* ISA information. */
-
-/* Initialize the ISA information. */
-
-extern xtensa_isa
-xtensa_isa_init(xtensa_isa_status *errno_p, char **error_msg_p);
-
-/* Deallocate an xtensa_isa structure. */
-
-extern void
-xtensa_isa_free(xtensa_isa isa);
-
-/* Get the maximum instruction size in bytes. */
-
-extern int
-xtensa_isa_maxlength(xtensa_isa isa);
-
-/* Decode the length in bytes of an instruction in raw memory (not an
- insnbuf). This function reads only the minimal number of bytes
- required to decode the instruction length. Returns
- XTENSA_UNDEFINED on error. */
-
-extern int
-xtensa_isa_length_from_chars(xtensa_isa isa, const unsigned char *cp);
-
-/* Get the number of stages in the processor's pipeline. The pipeline
- stage values returned by other functions in this library will range
- from 0 to N-1, where N is the value returned by this function.
- Note that the stage numbers used here may not correspond to the
- actual processor hardware, e.g., the hardware may have additional
- stages before stage 0. Returns XTENSA_UNDEFINED on error. */
-
-extern int
-xtensa_isa_num_pipe_stages(xtensa_isa isa);
-
-/* Get the number of various entities that are defined for this processor. */
-
-extern int
-xtensa_isa_num_formats(xtensa_isa isa);
-
-extern int
-xtensa_isa_num_opcodes(xtensa_isa isa);
-
-extern int
-xtensa_isa_num_regfiles(xtensa_isa isa);
-
-extern int
-xtensa_isa_num_states(xtensa_isa isa);
-
-extern int
-xtensa_isa_num_sysregs(xtensa_isa isa);
-
-extern int
-xtensa_isa_num_interfaces(xtensa_isa isa);
-
-extern int
-xtensa_isa_num_funcUnits(xtensa_isa isa);
-
-/* Instruction formats. */
-
-/* Get the name of a format. Returns null on error. */
-
-extern const char *
-xtensa_format_name(xtensa_isa isa, xtensa_format fmt);
-
-/* Given a format name, return the format number. Returns
- XTENSA_UNDEFINED if the name is not a valid format. */
-
-extern xtensa_format
-xtensa_format_lookup(xtensa_isa isa, const char *fmtname);
-
-/* Decode the instruction format from a binary instruction buffer.
- Returns XTENSA_UNDEFINED if the format is not recognized. */
-
-extern xtensa_format
-xtensa_format_decode(xtensa_isa isa, const xtensa_insnbuf insn);
-
-/* Set the instruction format field(s) in a binary instruction buffer.
- All the other fields are set to zero. Returns non-zero on error. */
-
-extern int
-xtensa_format_encode(xtensa_isa isa, xtensa_format fmt, xtensa_insnbuf insn);
-
-/* Find the length (in bytes) of an instruction. Returns
- XTENSA_UNDEFINED on error. */
-
-extern int
-xtensa_format_length(xtensa_isa isa, xtensa_format fmt);
-
-/* Get the number of slots in an instruction. Returns XTENSA_UNDEFINED
- on error. */
-
-extern int
-xtensa_format_num_slots(xtensa_isa isa, xtensa_format fmt);
-
-/* Get the opcode for a no-op in a particular slot.
- Returns XTENSA_UNDEFINED on error. */
-
-extern xtensa_opcode
-xtensa_format_slot_nop_opcode(xtensa_isa isa, xtensa_format fmt, int slot);
-
-/* Get the bits for a specified slot out of an insnbuf for the
- instruction as a whole and put them into an insnbuf for that one
- slot, and do the opposite to set a slot. Return non-zero on error. */
-
-extern int
-xtensa_format_get_slot(xtensa_isa isa, xtensa_format fmt, int slot,
- const xtensa_insnbuf insn, xtensa_insnbuf slotbuf);
-
-extern int
-xtensa_format_set_slot(xtensa_isa isa, xtensa_format fmt, int slot,
- xtensa_insnbuf insn, const xtensa_insnbuf slotbuf);
-
-/* Opcode information. */
-
-/* Translate a mnemonic name to an opcode. Returns XTENSA_UNDEFINED if
- the name is not a valid opcode mnemonic. */
-
-extern xtensa_opcode
-xtensa_opcode_lookup(xtensa_isa isa, const char *opname);
-
-/* Decode the opcode for one instruction slot from a binary instruction
- buffer. Returns the opcode or XTENSA_UNDEFINED if the opcode is
- illegal. */
-
-extern xtensa_opcode
-xtensa_opcode_decode(xtensa_isa isa, xtensa_format fmt, int slot,
- const xtensa_insnbuf slotbuf);
-
-/* Set the opcode field(s) for an instruction slot. All other fields
- in the slot are set to zero. Returns non-zero if the opcode cannot
- be encoded. */
-
-extern int
-xtensa_opcode_encode(xtensa_isa isa, xtensa_format fmt, int slot,
- xtensa_insnbuf slotbuf, xtensa_opcode opc);
-
-/* Get the mnemonic name for an opcode. Returns null on error. */
-
-extern const char *
-xtensa_opcode_name(xtensa_isa isa, xtensa_opcode opc);
-
-/* Check various properties of opcodes. These functions return 0 if
- the condition is false, 1 if the condition is true, and
- XTENSA_UNDEFINED on error. The instructions are classified as
- follows:
-
- branch: conditional branch; may fall through to next instruction (B*)
- jump: unconditional branch (J, JX, RET*, RF*)
- loop: zero-overhead loop (LOOP*)
- call: unconditional call; control returns to next instruction (CALL*)
-
- For the opcodes that affect control flow in some way, the branch
- target may be specified by an immediate operand or it may be an
- address stored in a register. You can distinguish these by
- checking if the instruction has a PC-relative immediate
- operand. */
-
-extern int
-xtensa_opcode_is_branch(xtensa_isa isa, xtensa_opcode opc);
-
-extern int
-xtensa_opcode_is_jump(xtensa_isa isa, xtensa_opcode opc);
-
-extern int
-xtensa_opcode_is_loop(xtensa_isa isa, xtensa_opcode opc);
-
-extern int
-xtensa_opcode_is_call(xtensa_isa isa, xtensa_opcode opc);
-
-/* Find the number of ordinary operands, state operands, and interface
- operands for an instruction. These return XTENSA_UNDEFINED on
- error. */
-
-extern int
-xtensa_opcode_num_operands(xtensa_isa isa, xtensa_opcode opc);
-
-extern int
-xtensa_opcode_num_stateOperands(xtensa_isa isa, xtensa_opcode opc);
-
-extern int
-xtensa_opcode_num_interfaceOperands(xtensa_isa isa, xtensa_opcode opc);
-
-/* Get functional unit usage requirements for an opcode. Each "use"
- is identified by a <functional unit, pipeline stage> pair. The
- "num_funcUnit_uses" function returns the number of these "uses" or
- XTENSA_UNDEFINED on error. The "funcUnit_use" function returns
- a pointer to a "use" pair or null on error. */
-
-typedef struct xtensa_funcUnit_use_struct {
- xtensa_funcUnit unit;
- int stage;
-} xtensa_funcUnit_use;
-
-extern int
-xtensa_opcode_num_funcUnit_uses(xtensa_isa isa, xtensa_opcode opc);
-
-extern xtensa_funcUnit_use *
-xtensa_opcode_funcUnit_use(xtensa_isa isa, xtensa_opcode opc, int u);
-
-/* Operand information. */
-
-/* Get the name of an operand. Returns null on error. */
-
-extern const char *
-xtensa_operand_name(xtensa_isa isa, xtensa_opcode opc, int opnd);
-
-/* Some operands are "invisible", i.e., not explicitly specified in
- assembly language. When assembling an instruction, you need not set
- the values of invisible operands, since they are either hardwired or
- derived from other field values. The values of invisible operands
- can be examined in the same way as other operands, but remember that
- an invisible operand may get its value from another visible one, so
- the entire instruction must be available before examining the
- invisible operand values. This function returns 1 if an operand is
- visible, 0 if it is invisible, or XTENSA_UNDEFINED on error. Note
- that whether an operand is visible is orthogonal to whether it is
- "implicit", i.e., whether it is encoded in a field in the
- instruction. */
-
-extern int
-xtensa_operand_is_visible(xtensa_isa isa, xtensa_opcode opc, int opnd);
-
-/* Check if an operand is an input ('i'), output ('o'), or inout ('m')
- operand. Note: The output operand of a conditional assignment
- (e.g., movnez) appears here as an inout ('m') even if it is declared
- in the TIE code as an output ('o'); this allows the compiler to
- properly handle register allocation for conditional assignments.
- Returns 0 on error. */
-
-extern char
-xtensa_operand_inout(xtensa_isa isa, xtensa_opcode opc, int opnd);
-
-/* Get and set the raw (encoded) value of the field for the specified
- operand. The "set" function does not check if the value fits in the
- field; that is done by the "encode" function below. Both of these
- functions return non-zero on error, e.g., if the field is not defined
- for the specified slot. */
-
-extern int
-xtensa_operand_get_field(xtensa_isa isa, xtensa_opcode opc, int opnd,
- xtensa_format fmt, int slot,
- const xtensa_insnbuf slotbuf, uint32 *valp);
-
-extern int
-xtensa_operand_set_field(xtensa_isa isa, xtensa_opcode opc, int opnd,
- xtensa_format fmt, int slot,
- xtensa_insnbuf slotbuf, uint32 val);
-
-/* Encode and decode operands. The raw bits in the operand field may
- be encoded in a variety of different ways. These functions hide
- the details of that encoding. The result values are returned through
- the argument pointer. The return value is non-zero on error. */
-
-extern int
-xtensa_operand_encode(xtensa_isa isa, xtensa_opcode opc, int opnd,
- uint32 *valp);
-
-extern int
-xtensa_operand_decode(xtensa_isa isa, xtensa_opcode opc, int opnd,
- uint32 *valp);
-
-/* An operand may be either a register operand or an immediate of some
- sort (e.g., PC-relative or not). The "is_register" function returns
- 0 if the operand is an immediate, 1 if it is a register, and
- XTENSA_UNDEFINED on error. The "regfile" function returns the
- regfile for a register operand, or XTENSA_UNDEFINED on error. */
-
-extern int
-xtensa_operand_is_register(xtensa_isa isa, xtensa_opcode opc, int opnd);
-
-extern xtensa_regfile
-xtensa_operand_regfile(xtensa_isa isa, xtensa_opcode opc, int opnd);
-
-/* Register operands may span multiple consecutive registers, e.g., a
- 64-bit data type may occupy two 32-bit registers. Only the first
- register is encoded in the operand field. This function specifies
- the number of consecutive registers occupied by this operand. For
- non-register operands, the return value is undefined. Returns
- XTENSA_UNDEFINED on error. */
-
-extern int
-xtensa_operand_num_regs(xtensa_isa isa, xtensa_opcode opc, int opnd);
-
-/* Some register operands do not completely identify the register being
- accessed. For example, the operand value may be added to an internal
- state value. By definition, this implies that the corresponding
- regfile is not allocatable. Unknown registers should generally be
- treated with worst-case assumptions. The function returns 0 if the
- register value is unknown, 1 if known, and XTENSA_UNDEFINED on
- error. */
-
-extern int
-xtensa_operand_is_known_reg(xtensa_isa isa, xtensa_opcode opc, int opnd);
-
-/* Check if an immediate operand is PC-relative. Returns 0 for register
- operands and non-PC-relative immediates, 1 for PC-relative
- immediates, and XTENSA_UNDEFINED on error. */
-
-extern int
-xtensa_operand_is_PCrelative(xtensa_isa isa, xtensa_opcode opc, int opnd);
-
-/* For PC-relative offset operands, the interpretation of the offset may
- vary between opcodes, e.g., is it relative to the current PC or that
- of the next instruction? The following functions are defined to
- perform PC-relative relocations and to undo them (as in the
- disassembler). The "do_reloc" function takes the desired address
- value and the PC of the current instruction and sets the value to the
- corresponding PC-relative offset (which can then be encoded and
- stored into the operand field). The "undo_reloc" function takes the
- unencoded offset value and the current PC and sets the value to the
- appropriate address. The return values are non-zero on error. Note
- that these functions do not replace the encode/decode functions; the
- operands must be encoded/decoded separately and the encode functions
- are responsible for detecting invalid operand values. */
-
-extern int
-xtensa_operand_do_reloc(xtensa_isa isa, xtensa_opcode opc, int opnd,
- uint32 *valp, uint32 pc);
-
-extern int
-xtensa_operand_undo_reloc(xtensa_isa isa, xtensa_opcode opc, int opnd,
- uint32 *valp, uint32 pc);
-
-/* State Operands. */
-
-/* Get the state accessed by a state operand. Returns XTENSA_UNDEFINED
- on error. */
-
-extern xtensa_state
-xtensa_stateOperand_state(xtensa_isa isa, xtensa_opcode opc, int stOp);
-
-/* Check if a state operand is an input ('i'), output ('o'), or inout
- ('m') operand. Returns 0 on error. */
-
-extern char
-xtensa_stateOperand_inout(xtensa_isa isa, xtensa_opcode opc, int stOp);
-
-/* Interface Operands. */
-
-/* Get the external interface accessed by an interface operand.
- Returns XTENSA_UNDEFINED on error. */
-
-extern xtensa_interface
-xtensa_interfaceOperand_interface(xtensa_isa isa, xtensa_opcode opc,
- int ifOp);
-
-/* Register Files. */
-
-/* Regfiles include both "real" regfiles and "views", where a view
- allows a group of adjacent registers in a real "parent" regfile to be
- viewed as a single register. A regfile view has all the same
- properties as its parent except for its (long) name, bit width, number
- of entries, and default ctype. You can use the parent function to
- distinguish these two classes. */
-
-/* Look up a regfile by either its name or its abbreviated "short name".
- Returns XTENSA_UNDEFINED on error. The "lookup_shortname" function
- ignores "view" regfiles since they always have the same shortname as
- their parents. */
-
-extern xtensa_regfile
-xtensa_regfile_lookup(xtensa_isa isa, const char *name);
-
-extern xtensa_regfile
-xtensa_regfile_lookup_shortname(xtensa_isa isa, const char *shortname);
-
-/* Get the name or abbreviated "short name" of a regfile.
- Returns null on error. */
-
-extern const char *
-xtensa_regfile_name(xtensa_isa isa, xtensa_regfile rf);
-
-extern const char *
-xtensa_regfile_shortname(xtensa_isa isa, xtensa_regfile rf);
-
-/* Get the parent regfile of a "view" regfile. If the regfile is not a
- view, the result is the same as the input parameter. Returns
- XTENSA_UNDEFINED on error. */
-
-extern xtensa_regfile
-xtensa_regfile_view_parent(xtensa_isa isa, xtensa_regfile rf);
-
-/* Get the bit width of a regfile or regfile view.
- Returns XTENSA_UNDEFINED on error. */
-
-extern int
-xtensa_regfile_num_bits(xtensa_isa isa, xtensa_regfile rf);
-
-/* Get the number of regfile entries. Returns XTENSA_UNDEFINED on
- error. */
-
-extern int
-xtensa_regfile_num_entries(xtensa_isa isa, xtensa_regfile rf);
-
-/* Processor States. */
-
-/* Look up a state by name. Returns XTENSA_UNDEFINED on error. */
-
-extern xtensa_state
-xtensa_state_lookup(xtensa_isa isa, const char *name);
-
-/* Get the name for a processor state. Returns null on error. */
-
-extern const char *
-xtensa_state_name(xtensa_isa isa, xtensa_state st);
-
-/* Get the bit width for a processor state.
- Returns XTENSA_UNDEFINED on error. */
-
-extern int
-xtensa_state_num_bits(xtensa_isa isa, xtensa_state st);
-
-/* Check if a state is exported from the processor core. Returns 0 if
- the condition is false, 1 if the condition is true, and
- XTENSA_UNDEFINED on error. */
-
-extern int
-xtensa_state_is_exported(xtensa_isa isa, xtensa_state st);
-
-/* Check for a "shared_or" state. Returns 0 if the condition is false,
- 1 if the condition is true, and XTENSA_UNDEFINED on error. */
-
-extern int
-xtensa_state_is_shared_or(xtensa_isa isa, xtensa_state st);
-
-/* Sysregs ("special registers" and "user registers"). */
-
-/* Look up a register by its number and whether it is a "user register"
- or a "special register". Returns XTENSA_UNDEFINED if the sysreg does
- not exist. */
-
-extern xtensa_sysreg
-xtensa_sysreg_lookup(xtensa_isa isa, int num, int is_user);
-
-/* Check if there exists a sysreg with a given name.
- If not, this function returns XTENSA_UNDEFINED. */
-
-extern xtensa_sysreg
-xtensa_sysreg_lookup_name(xtensa_isa isa, const char *name);
-
-/* Get the name of a sysreg. Returns null on error. */
-
-extern const char *
-xtensa_sysreg_name(xtensa_isa isa, xtensa_sysreg sysreg);
-
-/* Get the register number. Returns XTENSA_UNDEFINED on error. */
-
-extern int
-xtensa_sysreg_number(xtensa_isa isa, xtensa_sysreg sysreg);
-
-/* Check if a sysreg is a "special register" or a "user register".
- Returns 0 for special registers, 1 for user registers and
- XTENSA_UNDEFINED on error. */
-
-extern int
-xtensa_sysreg_is_user(xtensa_isa isa, xtensa_sysreg sysreg);
-
-/* Interfaces. */
-
-/* Find an interface by name. The return value is XTENSA_UNDEFINED if
- the specified interface is not found. */
-
-extern xtensa_interface
-xtensa_interface_lookup(xtensa_isa isa, const char *ifname);
-
-/* Get the name of an interface. Returns null on error. */
-
-extern const char *
-xtensa_interface_name(xtensa_isa isa, xtensa_interface intf);
-
-/* Get the bit width for an interface.
- Returns XTENSA_UNDEFINED on error. */
-
-extern int
-xtensa_interface_num_bits(xtensa_isa isa, xtensa_interface intf);
-
-/* Check if an interface is an input ('i') or output ('o') with respect
- to the Xtensa processor core. Returns 0 on error. */
-
-extern char
-xtensa_interface_inout(xtensa_isa isa, xtensa_interface intf);
-
-/* Check if accessing an interface has potential side effects.
- Currently "data" interfaces have side effects and "control"
- interfaces do not. Returns 1 if there are side effects, 0 if not,
- and XTENSA_UNDEFINED on error. */
-
-extern int
-xtensa_interface_has_side_effect(xtensa_isa isa, xtensa_interface intf);
-
-/* Some interfaces may be related such that accessing one interface
- has side effects on a set of related interfaces. The interfaces
- are partitioned into equivalence classes of related interfaces, and
- each class is assigned a unique identifier number. This function
- returns the class identifier for an interface, or XTENSA_UNDEFINED
- on error. These identifiers can be compared to determine if two
- interfaces are related; the specific values of the identifiers have
- no particular meaning otherwise. */
-
-extern int
-xtensa_interface_class_id(xtensa_isa isa, xtensa_interface intf);
-
-/* Functional Units. */
-
-/* Find a functional unit by name. The return value is XTENSA_UNDEFINED if
- the specified unit is not found. */
-
-extern xtensa_funcUnit
-xtensa_funcUnit_lookup(xtensa_isa isa, const char *fname);
-
-/* Get the name of a functional unit. Returns null on error. */
-
-extern const char *
-xtensa_funcUnit_name(xtensa_isa isa, xtensa_funcUnit fun);
-
-/* Functional units may be replicated. See how many instances of a
- particular function unit exist. Returns XTENSA_UNDEFINED on error. */
-
-extern int
-xtensa_funcUnit_num_copies(xtensa_isa isa, xtensa_funcUnit fun);
-
-#ifdef __cplusplus
-}
-#endif
-#endif /* XTENSA_LIBISA_H */
diff --git a/librz/arch/isa_gnu/xtensa/xtensa-modules.c b/librz/arch/isa_gnu/xtensa/xtensa-modules.c
deleted file mode 100644
index afa0c794f0c..00000000000
--- a/librz/arch/isa_gnu/xtensa/xtensa-modules.c
+++ /dev/null
@@ -1,21469 +0,0 @@
-/* Xtensa configuration-specific ISA information.
- Copyright (C) 2003-2015 Free Software Foundation, Inc.
-
- This file is part of BFD, the Binary File Descriptor library.
-
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of the
- License, or (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
- 02110-1301, USA. */
-
-#ifndef ATTRIBUTE_UNUSED
-#define ATTRIBUTE_UNUSED
-#endif
-#include "xtensa-isa.h"
-#include "xtensa-isa-internal.h"
-
-/* Sysregs. */
-
-static xtensa_sysreg_internal sysregs[] = {
- { "LBEG", 0, 0 },
- { "LEND", 1, 0 },
- { "LCOUNT", 2, 0 },
- { "BR", 4, 0 },
- { "ACCLO", 16, 0 },
- { "ACCHI", 17, 0 },
- { "M0", 32, 0 },
- { "M1", 33, 0 },
- { "M2", 34, 0 },
- { "M3", 35, 0 },
- { "PTEVADDR", 83, 0 },
- { "MMID", 89, 0 },
- { "DDR", 104, 0 },
- { "176", 176, 0 },
- { "208", 208, 0 },
- { "INTERRUPT", 226, 0 },
- { "INTCLEAR", 227, 0 },
- { "CCOUNT", 234, 0 },
- { "PRID", 235, 0 },
- { "ICOUNT", 236, 0 },
- { "CCOMPARE0", 240, 0 },
- { "CCOMPARE1", 241, 0 },
- { "CCOMPARE2", 242, 0 },
- { "VECBASE", 231, 0 },
- { "EPC1", 177, 0 },
- { "EPC2", 178, 0 },
- { "EPC3", 179, 0 },
- { "EPC4", 180, 0 },
- { "EPC5", 181, 0 },
- { "EPC6", 182, 0 },
- { "EPC7", 183, 0 },
- { "EXCSAVE1", 209, 0 },
- { "EXCSAVE2", 210, 0 },
- { "EXCSAVE3", 211, 0 },
- { "EXCSAVE4", 212, 0 },
- { "EXCSAVE5", 213, 0 },
- { "EXCSAVE6", 214, 0 },
- { "EXCSAVE7", 215, 0 },
- { "EPS2", 194, 0 },
- { "EPS3", 195, 0 },
- { "EPS4", 196, 0 },
- { "EPS5", 197, 0 },
- { "EPS6", 198, 0 },
- { "EPS7", 199, 0 },
- { "EXCCAUSE", 232, 0 },
- { "DEPC", 192, 0 },
- { "EXCVADDR", 238, 0 },
- { "WINDOWBASE", 72, 0 },
- { "WINDOWSTART", 73, 0 },
- { "SAR", 3, 0 },
- { "LITBASE", 5, 0 },
- { "PS", 230, 0 },
- { "MISC0", 244, 0 },
- { "MISC1", 245, 0 },
- { "MISC2", 246, 0 },
- { "MISC3", 247, 0 },
- { "INTENABLE", 228, 0 },
- { "DBREAKA0", 144, 0 },
- { "DBREAKC0", 160, 0 },
- { "DBREAKA1", 145, 0 },
- { "DBREAKC1", 161, 0 },
- { "IBREAKA0", 128, 0 },
- { "IBREAKA1", 129, 0 },
- { "IBREAKENABLE", 96, 0 },
- { "ICOUNTLEVEL", 237, 0 },
- { "DEBUGCAUSE", 233, 0 },
- { "RASID", 90, 0 },
- { "ITLBCFG", 91, 0 },
- { "DTLBCFG", 92, 0 },
- { "CPENABLE", 224, 0 },
- { "SCOMPARE1", 12, 0 },
- { "THREADPTR", 231, 1 },
- { "FCR", 232, 1 },
- { "FSR", 233, 1 }
-};
-
-#define NUM_SYSREGS 74
-#define MAX_SPECIAL_REG 247
-#define MAX_USER_REG 233
-
-
-/* Processor states. */
-
-static xtensa_state_internal states[] = {
- { "LCOUNT", 32, 0 },
- { "PC", 32, 0 },
- { "ICOUNT", 32, 0 },
- { "DDR", 32, 0 },
- { "INTERRUPT", 32, 0 },
- { "CCOUNT", 32, 0 },
- { "XTSYNC", 1, 0 },
- { "VECBASE", 22, 0 },
- { "EPC1", 32, 0 },
- { "EPC2", 32, 0 },
- { "EPC3", 32, 0 },
- { "EPC4", 32, 0 },
- { "EPC5", 32, 0 },
- { "EPC6", 32, 0 },
- { "EPC7", 32, 0 },
- { "EXCSAVE1", 32, 0 },
- { "EXCSAVE2", 32, 0 },
- { "EXCSAVE3", 32, 0 },
- { "EXCSAVE4", 32, 0 },
- { "EXCSAVE5", 32, 0 },
- { "EXCSAVE6", 32, 0 },
- { "EXCSAVE7", 32, 0 },
- { "EPS2", 15, 0 },
- { "EPS3", 15, 0 },
- { "EPS4", 15, 0 },
- { "EPS5", 15, 0 },
- { "EPS6", 15, 0 },
- { "EPS7", 15, 0 },
- { "EXCCAUSE", 6, 0 },
- { "PSINTLEVEL", 4, 0 },
- { "PSUM", 1, 0 },
- { "PSWOE", 1, 0 },
- { "PSRING", 2, 0 },
- { "PSEXCM", 1, 0 },
- { "DEPC", 32, 0 },
- { "EXCVADDR", 32, 0 },
- { "WindowBase", 4, 0 },
- { "WindowStart", 16, 0 },
- { "PSCALLINC", 2, 0 },
- { "PSOWB", 4, 0 },
- { "LBEG", 32, 0 },
- { "LEND", 32, 0 },
- { "SAR", 6, 0 },
- { "THREADPTR", 32, 0 },
- { "LITBADDR", 20, 0 },
- { "LITBEN", 1, 0 },
- { "MISC0", 32, 0 },
- { "MISC1", 32, 0 },
- { "MISC2", 32, 0 },
- { "MISC3", 32, 0 },
- { "ACC", 40, 0 },
- { "InOCDMode", 1, 0 },
- { "INTENABLE", 32, 0 },
- { "DBREAKA0", 32, 0 },
- { "DBREAKC0", 8, 0 },
- { "DBREAKA1", 32, 0 },
- { "DBREAKC1", 8, 0 },
- { "IBREAKA0", 32, 0 },
- { "IBREAKA1", 32, 0 },
- { "IBREAKENABLE", 2, 0 },
- { "ICOUNTLEVEL", 4, 0 },
- { "DEBUGCAUSE", 6, 0 },
- { "DBNUM", 4, 0 },
- { "CCOMPARE0", 32, 0 },
- { "CCOMPARE1", 32, 0 },
- { "CCOMPARE2", 32, 0 },
- { "ASID3", 8, 0 },
- { "ASID2", 8, 0 },
- { "ASID1", 8, 0 },
- { "INSTPGSZID4", 2, 0 },
- { "DATAPGSZID4", 2, 0 },
- { "PTBASE", 10, 0 },
- { "CPENABLE", 1, 0 },
- { "SCOMPARE1", 32, 0 },
- { "RoundMode", 2, 0 },
- { "InvalidEnable", 1, 0 },
- { "DivZeroEnable", 1, 0 },
- { "OverflowEnable", 1, 0 },
- { "UnderflowEnable", 1, 0 },
- { "InexactEnable", 1, 0 },
- { "InvalidFlag", 1, 0 },
- { "DivZeroFlag", 1, 0 },
- { "OverflowFlag", 1, 0 },
- { "UnderflowFlag", 1, 0 },
- { "InexactFlag", 1, 0 },
- { "FPreserved20", 20, 0 },
- { "FPreserved20a", 20, 0 },
- { "FPreserved5", 5, 0 },
- { "FPreserved7", 7, 0 }
-};
-
-#define NUM_STATES 89
-
-/* Macros for xtensa_state numbers (for use in iclasses because the
- state numbers are not available when the iclass table is generated). */
-
-#define STATE_LCOUNT 0
-#define STATE_PC 1
-#define STATE_ICOUNT 2
-#define STATE_DDR 3
-#define STATE_INTERRUPT 4
-#define STATE_CCOUNT 5
-#define STATE_XTSYNC 6
-#define STATE_VECBASE 7
-#define STATE_EPC1 8
-#define STATE_EPC2 9
-#define STATE_EPC3 10
-#define STATE_EPC4 11
-#define STATE_EPC5 12
-#define STATE_EPC6 13
-#define STATE_EPC7 14
-#define STATE_EXCSAVE1 15
-#define STATE_EXCSAVE2 16
-#define STATE_EXCSAVE3 17
-#define STATE_EXCSAVE4 18
-#define STATE_EXCSAVE5 19
-#define STATE_EXCSAVE6 20
-#define STATE_EXCSAVE7 21
-#define STATE_EPS2 22
-#define STATE_EPS3 23
-#define STATE_EPS4 24
-#define STATE_EPS5 25
-#define STATE_EPS6 26
-#define STATE_EPS7 27
-#define STATE_EXCCAUSE 28
-#define STATE_PSINTLEVEL 29
-#define STATE_PSUM 30
-#define STATE_PSWOE 31
-#define STATE_PSRING 32
-#define STATE_PSEXCM 33
-#define STATE_DEPC 34
-#define STATE_EXCVADDR 35
-#define STATE_WindowBase 36
-#define STATE_WindowStart 37
-#define STATE_PSCALLINC 38
-#define STATE_PSOWB 39
-#define STATE_LBEG 40
-#define STATE_LEND 41
-#define STATE_SAR 42
-#define STATE_THREADPTR 43
-#define STATE_LITBADDR 44
-#define STATE_LITBEN 45
-#define STATE_MISC0 46
-#define STATE_MISC1 47
-#define STATE_MISC2 48
-#define STATE_MISC3 49
-#define STATE_ACC 50
-#define STATE_InOCDMode 51
-#define STATE_INTENABLE 52
-#define STATE_DBREAKA0 53
-#define STATE_DBREAKC0 54
-#define STATE_DBREAKA1 55
-#define STATE_DBREAKC1 56
-#define STATE_IBREAKA0 57
-#define STATE_IBREAKA1 58
-#define STATE_IBREAKENABLE 59
-#define STATE_ICOUNTLEVEL 60
-#define STATE_DEBUGCAUSE 61
-#define STATE_DBNUM 62
-#define STATE_CCOMPARE0 63
-#define STATE_CCOMPARE1 64
-#define STATE_CCOMPARE2 65
-#define STATE_ASID3 66
-#define STATE_ASID2 67
-#define STATE_ASID1 68
-#define STATE_INSTPGSZID4 69
-#define STATE_DATAPGSZID4 70
-#define STATE_PTBASE 71
-#define STATE_CPENABLE 72
-#define STATE_SCOMPARE1 73
-#define STATE_RoundMode 74
-#define STATE_InvalidEnable 75
-#define STATE_DivZeroEnable 76
-#define STATE_OverflowEnable 77
-#define STATE_UnderflowEnable 78
-#define STATE_InexactEnable 79
-#define STATE_InvalidFlag 80
-#define STATE_DivZeroFlag 81
-#define STATE_OverflowFlag 82
-#define STATE_UnderflowFlag 83
-#define STATE_InexactFlag 84
-#define STATE_FPreserved20 85
-#define STATE_FPreserved20a 86
-#define STATE_FPreserved5 87
-#define STATE_FPreserved7 88
-
-
-/* Field definitions. */
-
-static unsigned
-Field_t_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
- return tie_t;
-}
-
-static void
-Field_t_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
-}
-
-static unsigned
-Field_t_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
- return tie_t;
-}
-
-static void
-Field_t_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
-}
-
-static unsigned
-Field_t_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
- return tie_t;
-}
-
-static void
-Field_t_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
-}
-
-static unsigned
-Field_t_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
- return tie_t;
-}
-
-static void
-Field_t_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
-}
-
-static unsigned
-Field_t_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
- return tie_t;
-}
-
-static void
-Field_t_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
-}
-
-static unsigned
-Field_t_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
- return tie_t;
-}
-
-static void
-Field_t_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
-}
-
-static unsigned
-Field_t_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
- return tie_t;
-}
-
-static void
-Field_t_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
-}
-
-static unsigned
-Field_bbi4_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
- return tie_t;
-}
-
-static void
-Field_bbi4_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
-}
-
-static unsigned
-Field_bbi_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
- tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
- return tie_t;
-}
-
-static void
-Field_bbi_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
- tie_t = (val << 27) >> 31;
- insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
-}
-
-static unsigned
-Field_bbi_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
- tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
- return tie_t;
-}
-
-static void
-Field_bbi_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
- tie_t = (val << 27) >> 31;
- insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
-}
-
-static unsigned
-Field_imm12_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 12) | ((insn[0] << 8) >> 20);
- return tie_t;
-}
-
-static void
-Field_imm12_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 20) >> 20;
- insn[0] = (insn[0] & ~0xfff000) | (tie_t << 12);
-}
-
-static unsigned
-Field_imm8_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 8) | ((insn[0] << 8) >> 24);
- return tie_t;
-}
-
-static void
-Field_imm8_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 24) >> 24;
- insn[0] = (insn[0] & ~0xff0000) | (tie_t << 16);
-}
-
-static unsigned
-Field_imm8_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 8) | ((insn[0] << 12) >> 24);
- return tie_t;
-}
-
-static void
-Field_imm8_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 24) >> 24;
- insn[0] = (insn[0] & ~0xff000) | (tie_t << 12);
-}
-
-static unsigned
-Field_imm8_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
- tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
- return tie_t;
-}
-
-static void
-Field_imm8_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
- tie_t = (val << 24) >> 28;
- insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
-}
-
-static unsigned
-Field_s_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
- return tie_t;
-}
-
-static void
-Field_s_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
-}
-
-static unsigned
-Field_s_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
- return tie_t;
-}
-
-static void
-Field_s_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
-}
-
-static unsigned
-Field_s_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
- return tie_t;
-}
-
-static void
-Field_s_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
-}
-
-static unsigned
-Field_s_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
- return tie_t;
-}
-
-static void
-Field_s_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
-}
-
-static unsigned
-Field_s_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
- return tie_t;
-}
-
-static void
-Field_s_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
-}
-
-static unsigned
-Field_s_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
- return tie_t;
-}
-
-static void
-Field_s_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
-}
-
-static unsigned
-Field_s_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
- return tie_t;
-}
-
-static void
-Field_s_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
-}
-
-static unsigned
-Field_imm12b_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
- tie_t = (tie_t << 8) | ((insn[0] << 8) >> 24);
- return tie_t;
-}
-
-static void
-Field_imm12b_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 24) >> 24;
- insn[0] = (insn[0] & ~0xff0000) | (tie_t << 16);
- tie_t = (val << 20) >> 28;
- insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
-}
-
-static unsigned
-Field_imm12b_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
- tie_t = (tie_t << 8) | ((insn[0] << 12) >> 24);
- return tie_t;
-}
-
-static void
-Field_imm12b_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 24) >> 24;
- insn[0] = (insn[0] & ~0xff000) | (tie_t << 12);
- tie_t = (val << 20) >> 28;
- insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
-}
-
-static unsigned
-Field_imm12b_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 12) | ((insn[0] << 16) >> 20);
- return tie_t;
-}
-
-static void
-Field_imm12b_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 20) >> 20;
- insn[0] = (insn[0] & ~0xfff0) | (tie_t << 4);
-}
-
-static unsigned
-Field_imm16_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 16) | ((insn[0] << 8) >> 16);
- return tie_t;
-}
-
-static void
-Field_imm16_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 16) >> 16;
- insn[0] = (insn[0] & ~0xffff00) | (tie_t << 8);
-}
-
-static unsigned
-Field_imm16_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 16) | ((insn[0] << 12) >> 16);
- return tie_t;
-}
-
-static void
-Field_imm16_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 16) >> 16;
- insn[0] = (insn[0] & ~0xffff0) | (tie_t << 4);
-}
-
-static unsigned
-Field_m_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 24) >> 30);
- return tie_t;
-}
-
-static void
-Field_m_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0xc0) | (tie_t << 6);
-}
-
-static unsigned
-Field_m_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 28) >> 30);
- return tie_t;
-}
-
-static void
-Field_m_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0xc) | (tie_t << 2);
-}
-
-static unsigned
-Field_n_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 26) >> 30);
- return tie_t;
-}
-
-static void
-Field_n_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0x30) | (tie_t << 4);
-}
-
-static unsigned
-Field_n_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 30) >> 30);
- return tie_t;
-}
-
-static void
-Field_n_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0x3) | (tie_t << 0);
-}
-
-static unsigned
-Field_offset_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 18) | ((insn[0] << 8) >> 14);
- return tie_t;
-}
-
-static void
-Field_offset_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 14) >> 14;
- insn[0] = (insn[0] & ~0xffffc0) | (tie_t << 6);
-}
-
-static unsigned
-Field_offset_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 18) | ((insn[0] << 14) >> 14);
- return tie_t;
-}
-
-static void
-Field_offset_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 14) >> 14;
- insn[0] = (insn[0] & ~0x3ffff) | (tie_t << 0);
-}
-
-static unsigned
-Field_op0_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
- return tie_t;
-}
-
-static void
-Field_op0_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
-}
-
-static unsigned
-Field_op0_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
- return tie_t;
-}
-
-static void
-Field_op0_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
-}
-
-static unsigned
-Field_op0_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
- return tie_t;
-}
-
-static void
-Field_op0_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
-}
-
-static unsigned
-Field_op1_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 12) >> 28);
- return tie_t;
-}
-
-static void
-Field_op1_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf0000) | (tie_t << 16);
-}
-
-static unsigned
-Field_op1_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
- return tie_t;
-}
-
-static void
-Field_op1_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
-}
-
-static unsigned
-Field_op2_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 8) >> 28);
- return tie_t;
-}
-
-static void
-Field_op2_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf00000) | (tie_t << 20);
-}
-
-static unsigned
-Field_op2_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 12) >> 28);
- return tie_t;
-}
-
-static void
-Field_op2_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf0000) | (tie_t << 16);
-}
-
-static unsigned
-Field_op2_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
- return tie_t;
-}
-
-static void
-Field_op2_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
-}
-
-static unsigned
-Field_r_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
- return tie_t;
-}
-
-static void
-Field_r_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
-}
-
-static unsigned
-Field_r_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
- return tie_t;
-}
-
-static void
-Field_r_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
-}
-
-static unsigned
-Field_r_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
- return tie_t;
-}
-
-static void
-Field_r_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
-}
-
-static unsigned
-Field_r_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
- return tie_t;
-}
-
-static void
-Field_r_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
-}
-
-static unsigned
-Field_r_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
- return tie_t;
-}
-
-static void
-Field_r_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
-}
-
-static unsigned
-Field_r_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
- return tie_t;
-}
-
-static void
-Field_r_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
-}
-
-static unsigned
-Field_r_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
- return tie_t;
-}
-
-static void
-Field_r_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
-}
-
-static unsigned
-Field_sa4_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 11) >> 31);
- return tie_t;
-}
-
-static void
-Field_sa4_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x100000) | (tie_t << 20);
-}
-
-static unsigned
-Field_sae4_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 15) >> 31);
- return tie_t;
-}
-
-static void
-Field_sae4_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x10000) | (tie_t << 16);
-}
-
-static unsigned
-Field_sae4_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
- return tie_t;
-}
-
-static void
-Field_sae4_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
-}
-
-static unsigned
-Field_sae_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 15) >> 31);
- tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
- return tie_t;
-}
-
-static void
-Field_sae_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
- tie_t = (val << 27) >> 31;
- insn[0] = (insn[0] & ~0x10000) | (tie_t << 16);
-}
-
-static unsigned
-Field_sae_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
- tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
- return tie_t;
-}
-
-static void
-Field_sae_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
- tie_t = (val << 27) >> 31;
- insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
-}
-
-static unsigned
-Field_sae_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 5) | ((insn[0] << 15) >> 27);
- return tie_t;
-}
-
-static void
-Field_sae_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 27) >> 27;
- insn[0] = (insn[0] & ~0x1f000) | (tie_t << 12);
-}
-
-static unsigned
-Field_sal_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 11) >> 31);
- tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
- return tie_t;
-}
-
-static void
-Field_sal_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
- tie_t = (val << 27) >> 31;
- insn[0] = (insn[0] & ~0x100000) | (tie_t << 20);
-}
-
-static unsigned
-Field_sal_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 15) >> 31);
- tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
- return tie_t;
-}
-
-static void
-Field_sal_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
- tie_t = (val << 27) >> 31;
- insn[0] = (insn[0] & ~0x10000) | (tie_t << 16);
-}
-
-static unsigned
-Field_sal_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
- tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
- return tie_t;
-}
-
-static void
-Field_sal_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
- tie_t = (val << 27) >> 31;
- insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
-}
-
-static unsigned
-Field_sargt_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 11) >> 31);
- tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
- return tie_t;
-}
-
-static void
-Field_sargt_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
- tie_t = (val << 27) >> 31;
- insn[0] = (insn[0] & ~0x100000) | (tie_t << 20);
-}
-
-static unsigned
-Field_sargt_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 15) >> 31);
- tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
- return tie_t;
-}
-
-static void
-Field_sargt_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
- tie_t = (val << 27) >> 31;
- insn[0] = (insn[0] & ~0x10000) | (tie_t << 16);
-}
-
-static unsigned
-Field_sargt_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 5) | ((insn[0] << 19) >> 27);
- return tie_t;
-}
-
-static void
-Field_sargt_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 27) >> 27;
- insn[0] = (insn[0] & ~0x1f00) | (tie_t << 8);
-}
-
-static unsigned
-Field_sargt_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 5) | ((insn[0] << 19) >> 27);
- return tie_t;
-}
-
-static void
-Field_sargt_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 27) >> 27;
- insn[0] = (insn[0] & ~0x1f00) | (tie_t << 8);
-}
-
-static unsigned
-Field_sas4_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 27) >> 31);
- return tie_t;
-}
-
-static void
-Field_sas4_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x10) | (tie_t << 4);
-}
-
-static unsigned
-Field_sas_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 27) >> 31);
- tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
- return tie_t;
-}
-
-static void
-Field_sas_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
- tie_t = (val << 27) >> 31;
- insn[0] = (insn[0] & ~0x10) | (tie_t << 4);
-}
-
-static unsigned
-Field_sas_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 31) >> 31);
- tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
- return tie_t;
-}
-
-static void
-Field_sas_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
- tie_t = (val << 27) >> 31;
- insn[0] = (insn[0] & ~0x1) | (tie_t << 0);
-}
-
-static unsigned
-Field_sr_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
- tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
- return tie_t;
-}
-
-static void
-Field_sr_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
- tie_t = (val << 24) >> 28;
- insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
-}
-
-static unsigned
-Field_sr_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
- tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
- return tie_t;
-}
-
-static void
-Field_sr_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
- tie_t = (val << 24) >> 28;
- insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
-}
-
-static unsigned
-Field_sr_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
- tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
- return tie_t;
-}
-
-static void
-Field_sr_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
- tie_t = (val << 24) >> 28;
- insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
-}
-
-static unsigned
-Field_st_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
- tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
- return tie_t;
-}
-
-static void
-Field_st_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
- tie_t = (val << 24) >> 28;
- insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
-}
-
-static unsigned
-Field_st_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
- tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
- return tie_t;
-}
-
-static void
-Field_st_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
- tie_t = (val << 24) >> 28;
- insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
-}
-
-static unsigned
-Field_st_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
- tie_t = (tie_t << 4) | ((insn[0] << 24) >> 28);
- return tie_t;
-}
-
-static void
-Field_st_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf0) | (tie_t << 4);
- tie_t = (val << 24) >> 28;
- insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
-}
-
-static unsigned
-Field_thi3_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[0] << 24) >> 29);
- return tie_t;
-}
-
-static void
-Field_thi3_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0xe0) | (tie_t << 5);
-}
-
-static unsigned
-Field_thi3_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[0] << 28) >> 29);
- return tie_t;
-}
-
-static void
-Field_thi3_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0xe) | (tie_t << 1);
-}
-
-static unsigned
-Field_imm4_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
- return tie_t;
-}
-
-static void
-Field_imm4_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
-}
-
-static unsigned
-Field_imm4_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
- return tie_t;
-}
-
-static void
-Field_imm4_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
-}
-
-static unsigned
-Field_imm4_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
- return tie_t;
-}
-
-static void
-Field_imm4_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
-}
-
-static unsigned
-Field_mn_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 24) >> 30);
- tie_t = (tie_t << 2) | ((insn[0] << 26) >> 30);
- return tie_t;
-}
-
-static void
-Field_mn_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0x30) | (tie_t << 4);
- tie_t = (val << 28) >> 30;
- insn[0] = (insn[0] & ~0xc0) | (tie_t << 6);
-}
-
-static unsigned
-Field_i_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
- return tie_t;
-}
-
-static void
-Field_i_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
-}
-
-static unsigned
-Field_i_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
- return tie_t;
-}
-
-static void
-Field_i_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
-}
-
-static unsigned
-Field_imm6lo_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
- return tie_t;
-}
-
-static void
-Field_imm6lo_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
-}
-
-static unsigned
-Field_imm6lo_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
- return tie_t;
-}
-
-static void
-Field_imm6lo_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
-}
-
-static unsigned
-Field_imm6hi_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 26) >> 30);
- return tie_t;
-}
-
-static void
-Field_imm6hi_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0x30) | (tie_t << 4);
-}
-
-static unsigned
-Field_imm6hi_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 26) >> 30);
- return tie_t;
-}
-
-static void
-Field_imm6hi_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0x30) | (tie_t << 4);
-}
-
-static unsigned
-Field_imm7lo_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
- return tie_t;
-}
-
-static void
-Field_imm7lo_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
-}
-
-static unsigned
-Field_imm7lo_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
- return tie_t;
-}
-
-static void
-Field_imm7lo_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
-}
-
-static unsigned
-Field_imm7hi_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[0] << 25) >> 29);
- return tie_t;
-}
-
-static void
-Field_imm7hi_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0x70) | (tie_t << 4);
-}
-
-static unsigned
-Field_imm7hi_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[0] << 25) >> 29);
- return tie_t;
-}
-
-static void
-Field_imm7hi_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0x70) | (tie_t << 4);
-}
-
-static unsigned
-Field_z_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 25) >> 31);
- return tie_t;
-}
-
-static void
-Field_z_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x40) | (tie_t << 6);
-}
-
-static unsigned
-Field_z_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 25) >> 31);
- return tie_t;
-}
-
-static void
-Field_z_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x40) | (tie_t << 6);
-}
-
-static unsigned
-Field_imm6_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 26) >> 30);
- tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
- return tie_t;
-}
-
-static void
-Field_imm6_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
- tie_t = (val << 26) >> 30;
- insn[0] = (insn[0] & ~0x30) | (tie_t << 4);
-}
-
-static unsigned
-Field_imm6_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 26) >> 30);
- tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
- return tie_t;
-}
-
-static void
-Field_imm6_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
- tie_t = (val << 26) >> 30;
- insn[0] = (insn[0] & ~0x30) | (tie_t << 4);
-}
-
-static unsigned
-Field_imm7_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[0] << 25) >> 29);
- tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
- return tie_t;
-}
-
-static void
-Field_imm7_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
- tie_t = (val << 25) >> 29;
- insn[0] = (insn[0] & ~0x70) | (tie_t << 4);
-}
-
-static unsigned
-Field_imm7_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[0] << 25) >> 29);
- tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
- return tie_t;
-}
-
-static void
-Field_imm7_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
- tie_t = (val << 25) >> 29;
- insn[0] = (insn[0] & ~0x70) | (tie_t << 4);
-}
-
-static unsigned
-Field_imm7_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 7) | ((insn[0] << 25) >> 25);
- return tie_t;
-}
-
-static void
-Field_imm7_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 25) >> 25;
- insn[0] = (insn[0] & ~0x7f) | (tie_t << 0);
-}
-
-static unsigned
-Field_r3_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 16) >> 31);
- return tie_t;
-}
-
-static void
-Field_r3_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x8000) | (tie_t << 15);
-}
-
-static unsigned
-Field_rbit2_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 17) >> 31);
- return tie_t;
-}
-
-static void
-Field_rbit2_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x4000) | (tie_t << 14);
-}
-
-static unsigned
-Field_rhi_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30);
- return tie_t;
-}
-
-static void
-Field_rhi_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0xc000) | (tie_t << 14);
-}
-
-static unsigned
-Field_t3_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
- return tie_t;
-}
-
-static void
-Field_t3_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
-}
-
-static unsigned
-Field_tbit2_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 25) >> 31);
- return tie_t;
-}
-
-static void
-Field_tbit2_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x40) | (tie_t << 6);
-}
-
-static unsigned
-Field_tlo_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 26) >> 30);
- return tie_t;
-}
-
-static void
-Field_tlo_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0x30) | (tie_t << 4);
-}
-
-static unsigned
-Field_w_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 18) >> 30);
- return tie_t;
-}
-
-static void
-Field_w_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0x3000) | (tie_t << 12);
-}
-
-static unsigned
-Field_y_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 25) >> 31);
- return tie_t;
-}
-
-static void
-Field_y_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x40) | (tie_t << 6);
-}
-
-static unsigned
-Field_x_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 17) >> 31);
- return tie_t;
-}
-
-static void
-Field_x_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x4000) | (tie_t << 14);
-}
-
-static unsigned
-Field_t2_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[0] << 24) >> 29);
- return tie_t;
-}
-
-static void
-Field_t2_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0xe0) | (tie_t << 5);
-}
-
-static unsigned
-Field_t2_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[0] << 24) >> 29);
- return tie_t;
-}
-
-static void
-Field_t2_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0xe0) | (tie_t << 5);
-}
-
-static unsigned
-Field_t2_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[0] << 24) >> 29);
- return tie_t;
-}
-
-static void
-Field_t2_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0xe0) | (tie_t << 5);
-}
-
-static unsigned
-Field_s2_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29);
- return tie_t;
-}
-
-static void
-Field_s2_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0xe00) | (tie_t << 9);
-}
-
-static unsigned
-Field_s2_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29);
- return tie_t;
-}
-
-static void
-Field_s2_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0xe00) | (tie_t << 9);
-}
-
-static unsigned
-Field_s2_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[0] << 20) >> 29);
- return tie_t;
-}
-
-static void
-Field_s2_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0xe00) | (tie_t << 9);
-}
-
-static unsigned
-Field_rz_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[0] << 16) >> 29);
- return tie_t;
-}
-
-static void
-Field_rz_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0xe000) | (tie_t << 13);
-}
-
-static unsigned
-Field_rz_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[0] << 16) >> 29);
- return tie_t;
-}
-
-static void
-Field_rz_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0xe000) | (tie_t << 13);
-}
-
-static unsigned
-Field_rz_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[0] << 16) >> 29);
- return tie_t;
-}
-
-static void
-Field_rz_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0xe000) | (tie_t << 13);
-}
-
-static unsigned
-Field_t4_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 24) >> 30);
- return tie_t;
-}
-
-static void
-Field_t4_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0xc0) | (tie_t << 6);
-}
-
-static unsigned
-Field_t4_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 24) >> 30);
- return tie_t;
-}
-
-static void
-Field_t4_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0xc0) | (tie_t << 6);
-}
-
-static unsigned
-Field_t4_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 24) >> 30);
- return tie_t;
-}
-
-static void
-Field_t4_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0xc0) | (tie_t << 6);
-}
-
-static unsigned
-Field_s4_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 20) >> 30);
- return tie_t;
-}
-
-static void
-Field_s4_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0xc00) | (tie_t << 10);
-}
-
-static unsigned
-Field_s4_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 20) >> 30);
- return tie_t;
-}
-
-static void
-Field_s4_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0xc00) | (tie_t << 10);
-}
-
-static unsigned
-Field_s4_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 20) >> 30);
- return tie_t;
-}
-
-static void
-Field_s4_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0xc00) | (tie_t << 10);
-}
-
-static unsigned
-Field_r4_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30);
- return tie_t;
-}
-
-static void
-Field_r4_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0xc000) | (tie_t << 14);
-}
-
-static unsigned
-Field_r4_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30);
- return tie_t;
-}
-
-static void
-Field_r4_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0xc000) | (tie_t << 14);
-}
-
-static unsigned
-Field_r4_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 16) >> 30);
- return tie_t;
-}
-
-static void
-Field_r4_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0xc000) | (tie_t << 14);
-}
-
-static unsigned
-Field_t8_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
- return tie_t;
-}
-
-static void
-Field_t8_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
-}
-
-static unsigned
-Field_t8_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
- return tie_t;
-}
-
-static void
-Field_t8_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
-}
-
-static unsigned
-Field_t8_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
- return tie_t;
-}
-
-static void
-Field_t8_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
-}
-
-static unsigned
-Field_s8_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31);
- return tie_t;
-}
-
-static void
-Field_s8_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x800) | (tie_t << 11);
-}
-
-static unsigned
-Field_s8_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31);
- return tie_t;
-}
-
-static void
-Field_s8_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x800) | (tie_t << 11);
-}
-
-static unsigned
-Field_s8_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31);
- return tie_t;
-}
-
-static void
-Field_s8_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x800) | (tie_t << 11);
-}
-
-static unsigned
-Field_r8_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 16) >> 31);
- return tie_t;
-}
-
-static void
-Field_r8_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x8000) | (tie_t << 15);
-}
-
-static unsigned
-Field_r8_Slot_inst16a_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 16) >> 31);
- return tie_t;
-}
-
-static void
-Field_r8_Slot_inst16a_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x8000) | (tie_t << 15);
-}
-
-static unsigned
-Field_r8_Slot_inst16b_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 16) >> 31);
- return tie_t;
-}
-
-static void
-Field_r8_Slot_inst16b_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x8000) | (tie_t << 15);
-}
-
-static unsigned
-Field_xt_wbr15_imm_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 15) | ((insn[0] << 8) >> 17);
- return tie_t;
-}
-
-static void
-Field_xt_wbr15_imm_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 17) >> 17;
- insn[0] = (insn[0] & ~0xfffe00) | (tie_t << 9);
-}
-
-static unsigned
-Field_xt_wbr18_imm_Slot_inst_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 18) | ((insn[0] << 8) >> 14);
- return tie_t;
-}
-
-static void
-Field_xt_wbr18_imm_Slot_inst_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 14) >> 14;
- insn[0] = (insn[0] & ~0xffffc0) | (tie_t << 6);
-}
-
-static unsigned
-Field_xt_wbr18_imm_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 18) | ((insn[0] << 6) >> 14);
- return tie_t;
-}
-
-static void
-Field_xt_wbr18_imm_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 14) >> 14;
- insn[0] = (insn[0] & ~0x3ffff00) | (tie_t << 8);
-}
-
-static unsigned
-Field_op0_xt_flix64_slot0_s3_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 8) >> 28);
- return tie_t;
-}
-
-static void
-Field_op0_xt_flix64_slot0_s3_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf00000) | (tie_t << 20);
-}
-
-static unsigned
-Field_combined3e2c5767_fld7_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[0] << 16) >> 29);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld7_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0xe000) | (tie_t << 13);
-}
-
-static unsigned
-Field_combined3e2c5767_fld8_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[0] << 16) >> 29);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld8_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0xe000) | (tie_t << 13);
-}
-
-static unsigned
-Field_combined3e2c5767_fld9_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[0] << 12) >> 29);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld9_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0xe0000) | (tie_t << 17);
-}
-
-static unsigned
-Field_combined3e2c5767_fld11_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[0] << 12) >> 29);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld11_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0xe0000) | (tie_t << 17);
-}
-
-static unsigned
-Field_combined3e2c5767_fld49xt_flix64_slot0_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 12) >> 28);
- tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld49xt_flix64_slot0_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
- tie_t = (val << 24) >> 28;
- insn[0] = (insn[0] & ~0xf0000) | (tie_t << 16);
-}
-
-static unsigned
-Field_op0_s4_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 12) >> 30);
- return tie_t;
-}
-
-static void
-Field_op0_s4_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0xc0000) | (tie_t << 18);
-}
-
-static unsigned
-Field_combined3e2c5767_fld16_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 16) >> 28);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld16_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf000) | (tie_t << 12);
-}
-
-static unsigned
-Field_combined3e2c5767_fld19xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 14) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld19xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x20000) | (tie_t << 17);
-}
-
-static unsigned
-Field_combined3e2c5767_fld20xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 14) >> 30);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld20xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0x30000) | (tie_t << 16);
-}
-
-static unsigned
-Field_combined3e2c5767_fld21xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 5) | ((insn[0] << 14) >> 27);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld21xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 27) >> 27;
- insn[0] = (insn[0] & ~0x3e000) | (tie_t << 13);
-}
-
-static unsigned
-Field_combined3e2c5767_fld22xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 6) | ((insn[0] << 14) >> 26);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld22xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 26) >> 26;
- insn[0] = (insn[0] & ~0x3f000) | (tie_t << 12);
-}
-
-static unsigned
-Field_combined3e2c5767_fld23xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 6) | ((insn[0] << 14) >> 26);
- tie_t = (tie_t << 3) | ((insn[0] << 25) >> 29);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld23xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0x70) | (tie_t << 4);
- tie_t = (val << 23) >> 26;
- insn[0] = (insn[0] & ~0x3f000) | (tie_t << 12);
-}
-
-static unsigned
-Field_combined3e2c5767_fld25xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 6) | ((insn[0] << 14) >> 26);
- tie_t = (tie_t << 3) | ((insn[0] << 25) >> 29);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld25xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0x70) | (tie_t << 4);
- tie_t = (val << 23) >> 26;
- insn[0] = (insn[0] & ~0x3f000) | (tie_t << 12);
-}
-
-static unsigned
-Field_combined3e2c5767_fld26xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 6) | ((insn[0] << 14) >> 26);
- tie_t = (tie_t << 2) | ((insn[0] << 25) >> 30);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld26xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0x60) | (tie_t << 5);
- tie_t = (val << 24) >> 26;
- insn[0] = (insn[0] & ~0x3f000) | (tie_t << 12);
-}
-
-static unsigned
-Field_combined3e2c5767_fld28xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 6) | ((insn[0] << 14) >> 26);
- tie_t = (tie_t << 1) | ((insn[0] << 25) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld28xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x40) | (tie_t << 6);
- tie_t = (val << 25) >> 26;
- insn[0] = (insn[0] & ~0x3f000) | (tie_t << 12);
-}
-
-static unsigned
-Field_combined3e2c5767_fld30xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 6) | ((insn[0] << 14) >> 26);
- tie_t = (tie_t << 2) | ((insn[0] << 22) >> 30);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld30xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0x300) | (tie_t << 8);
- tie_t = (val << 24) >> 26;
- insn[0] = (insn[0] & ~0x3f000) | (tie_t << 12);
-}
-
-static unsigned
-Field_combined3e2c5767_fld32xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 6) | ((insn[0] << 14) >> 26);
- tie_t = (tie_t << 2) | ((insn[0] << 22) >> 30);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld32xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0x300) | (tie_t << 8);
- tie_t = (val << 24) >> 26;
- insn[0] = (insn[0] & ~0x3f000) | (tie_t << 12);
-}
-
-static unsigned
-Field_combined3e2c5767_fld33xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 6) | ((insn[0] << 14) >> 26);
- tie_t = (tie_t << 1) | ((insn[0] << 22) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld33xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x200) | (tie_t << 9);
- tie_t = (val << 25) >> 26;
- insn[0] = (insn[0] & ~0x3f000) | (tie_t << 12);
-}
-
-static unsigned
-Field_combined3e2c5767_fld35xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[0] << 14) >> 29);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld35xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0x38000) | (tie_t << 15);
-}
-
-static unsigned
-Field_combined3e2c5767_fld51xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld51xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
-}
-
-static unsigned
-Field_combined3e2c5767_fld52xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
- tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld52xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
- tie_t = (val << 27) >> 31;
- insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
-}
-
-static unsigned
-Field_combined3e2c5767_fld53xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 20) >> 30);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld53xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0xc00) | (tie_t << 10);
-}
-
-static unsigned
-Field_combined3e2c5767_fld54xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 5) | ((insn[0] << 20) >> 27);
- tie_t = (tie_t << 6) | ((insn[0] << 26) >> 26);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld54xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 26) >> 26;
- insn[0] = (insn[0] & ~0x3f) | (tie_t << 0);
- tie_t = (val << 21) >> 27;
- insn[0] = (insn[0] & ~0xf80) | (tie_t << 7);
-}
-
-static unsigned
-Field_combined3e2c5767_fld57xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
- tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld57xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
- tie_t = (val << 27) >> 31;
- insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
-}
-
-static unsigned
-Field_combined3e2c5767_fld58xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 20) >> 30);
- tie_t = (tie_t << 1) | ((insn[0] << 23) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld58xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x100) | (tie_t << 8);
- tie_t = (val << 29) >> 30;
- insn[0] = (insn[0] & ~0xc00) | (tie_t << 10);
-}
-
-static unsigned
-Field_combined3e2c5767_fld60xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
- tie_t = (tie_t << 5) | ((insn[0] << 27) >> 27);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld60xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 27) >> 27;
- insn[0] = (insn[0] & ~0x1f) | (tie_t << 0);
- tie_t = (val << 26) >> 31;
- insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
-}
-
-static unsigned
-Field_combined3e2c5767_fld62xt_flix64_slot1_Slot_xt_flix64_slot1_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[0] << 17) >> 29);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld62xt_flix64_slot1_Slot_xt_flix64_slot1_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0x7000) | (tie_t << 12);
-}
-
-static unsigned
-Field_op0_s5_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[0] << 16) >> 29);
- return tie_t;
-}
-
-static void
-Field_op0_s5_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0xe000) | (tie_t << 13);
-}
-
-static unsigned
-Field_combined3e2c5767_fld36xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld36xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
-}
-
-static unsigned
-Field_combined3e2c5767_fld37xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
- tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld37xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
- tie_t = (val << 30) >> 31;
- insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
-}
-
-static unsigned
-Field_combined3e2c5767_fld39xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
- tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
- tie_t = (tie_t << 1) | ((insn[0] << 27) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld39xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x10) | (tie_t << 4);
- tie_t = (val << 30) >> 31;
- insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
- tie_t = (val << 29) >> 31;
- insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
-}
-
-static unsigned
-Field_combined3e2c5767_fld41xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
- tie_t = (tie_t << 1) | ((insn[0] << 24) >> 31);
- tie_t = (tie_t << 1) | ((insn[0] << 27) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld41xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x10) | (tie_t << 4);
- tie_t = (val << 30) >> 31;
- insn[0] = (insn[0] & ~0x80) | (tie_t << 7);
- tie_t = (val << 29) >> 31;
- insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
-}
-
-static unsigned
-Field_combined3e2c5767_fld42xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
- tie_t = (tie_t << 3) | ((insn[0] << 21) >> 29);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld42xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0x700) | (tie_t << 8);
- tie_t = (val << 28) >> 31;
- insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
-}
-
-static unsigned
-Field_combined3e2c5767_fld44xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
- tie_t = (tie_t << 3) | ((insn[0] << 21) >> 29);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld44xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[0] = (insn[0] & ~0x700) | (tie_t << 8);
- tie_t = (val << 28) >> 31;
- insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
-}
-
-static unsigned
-Field_combined3e2c5767_fld45xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
- tie_t = (tie_t << 2) | ((insn[0] << 21) >> 30);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld45xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0x600) | (tie_t << 9);
- tie_t = (val << 29) >> 31;
- insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
-}
-
-static unsigned
-Field_combined3e2c5767_fld47xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 19) >> 31);
- tie_t = (tie_t << 1) | ((insn[0] << 21) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld47xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x400) | (tie_t << 10);
- tie_t = (val << 30) >> 31;
- insn[0] = (insn[0] & ~0x1000) | (tie_t << 12);
-}
-
-static unsigned
-Field_combined3e2c5767_fld63xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 2) | ((insn[0] << 25) >> 30);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld63xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0x60) | (tie_t << 5);
-}
-
-static unsigned
-Field_combined3e2c5767_fld64xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld64xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x800) | (tie_t << 11);
-}
-
-static unsigned
-Field_combined3e2c5767_fld65xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 20) >> 28);
- tie_t = (tie_t << 2) | ((insn[0] << 25) >> 30);
- tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld65xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
- tie_t = (val << 26) >> 30;
- insn[0] = (insn[0] & ~0x60) | (tie_t << 5);
- tie_t = (val << 22) >> 28;
- insn[0] = (insn[0] & ~0xf00) | (tie_t << 8);
-}
-
-static unsigned
-Field_combined3e2c5767_fld66xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31);
- tie_t = (tie_t << 1) | ((insn[0] << 23) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld66xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x100) | (tie_t << 8);
- tie_t = (val << 30) >> 31;
- insn[0] = (insn[0] & ~0x800) | (tie_t << 11);
-}
-
-static unsigned
-Field_combined3e2c5767_fld68xt_flix64_slot2_Slot_xt_flix64_slot2_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 1) | ((insn[0] << 20) >> 31);
- tie_t = (tie_t << 2) | ((insn[0] << 22) >> 30);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld68xt_flix64_slot2_Slot_xt_flix64_slot2_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 30) >> 30;
- insn[0] = (insn[0] & ~0x300) | (tie_t << 8);
- tie_t = (val << 29) >> 31;
- insn[0] = (insn[0] & ~0x800) | (tie_t << 11);
-}
-
-static unsigned
-Field_op0_s6_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 5) | ((insn[0] << 0) >> 27);
- return tie_t;
-}
-
-static void
-Field_op0_s6_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 27) >> 27;
- insn[0] = (insn[0] & ~0xf8000000) | (tie_t << 27);
-}
-
-static unsigned
-Field_combined3e2c5767_fld70xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
- tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld70xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
- tie_t = (val << 27) >> 31;
- insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
- tie_t = (val << 24) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_combined3e2c5767_fld71_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld71_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 29) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_combined3e2c5767_fld72xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
- tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld72xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
- tie_t = (val << 27) >> 31;
- insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
- tie_t = (val << 24) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_combined3e2c5767_fld73xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
- tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld73xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
- tie_t = (val << 27) >> 31;
- insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
- tie_t = (val << 24) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_combined3e2c5767_fld74xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
- tie_t = (tie_t << 4) | ((insn[0] << 28) >> 28);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld74xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf) | (tie_t << 0);
- tie_t = (val << 27) >> 31;
- insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
- tie_t = (val << 24) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_combined3e2c5767_fld75xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld75xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
- tie_t = (val << 28) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_combined3e2c5767_fld76xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld76xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
- tie_t = (val << 28) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_combined3e2c5767_fld77xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld77xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
- tie_t = (val << 28) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_combined3e2c5767_fld78xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld78xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
- tie_t = (val << 28) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_combined3e2c5767_fld79xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld79xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
- tie_t = (val << 28) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_combined3e2c5767_fld80xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld80xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
- tie_t = (val << 28) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_combined3e2c5767_fld81xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld81xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
- tie_t = (val << 28) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_combined3e2c5767_fld82xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld82xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
- tie_t = (val << 28) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_combined3e2c5767_fld83xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld83xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
- tie_t = (val << 28) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_combined3e2c5767_fld84xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld84xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
- tie_t = (val << 28) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_combined3e2c5767_fld85xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld85xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
- tie_t = (val << 28) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_combined3e2c5767_fld86xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld86xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
- tie_t = (val << 28) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_combined3e2c5767_fld87xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld87xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
- tie_t = (val << 28) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_combined3e2c5767_fld88xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld88xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
- tie_t = (val << 28) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_combined3e2c5767_fld89xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld89xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
- tie_t = (val << 28) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_combined3e2c5767_fld90xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld90xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
- tie_t = (val << 28) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_combined3e2c5767_fld91xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld91xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
- tie_t = (val << 28) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_combined3e2c5767_fld92xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- tie_t = (tie_t << 1) | ((insn[0] << 5) >> 31);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld92xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 31) >> 31;
- insn[0] = (insn[0] & ~0x4000000) | (tie_t << 26);
- tie_t = (val << 28) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_combined3e2c5767_fld93xt_flix64_slot3_Slot_xt_flix64_slot3_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 3) | ((insn[1] << 29) >> 29);
- tie_t = (tie_t << 27) | ((insn[0] << 5) >> 5);
- return tie_t;
-}
-
-static void
-Field_combined3e2c5767_fld93xt_flix64_slot3_Slot_xt_flix64_slot3_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 5) >> 5;
- insn[0] = (insn[0] & ~0x7ffffff) | (tie_t << 0);
- tie_t = (val << 2) >> 29;
- insn[1] = (insn[1] & ~0x7) | (tie_t << 0);
-}
-
-static unsigned
-Field_op0_xt_flix64_slot0_Slot_xt_flix64_slot0_get (const xtensa_insnbuf insn)
-{
- unsigned tie_t = 0;
- tie_t = (tie_t << 4) | ((insn[0] << 8) >> 28);
- return tie_t;
-}
-
-static void
-Field_op0_xt_flix64_slot0_Slot_xt_flix64_slot0_set (xtensa_insnbuf insn, uint32 val)
-{
- uint32 tie_t;
- tie_t = (val << 28) >> 28;
- insn[0] = (insn[0] & ~0xf00000) | (tie_t << 20);
-}
-
-static void
-Implicit_Field_set (xtensa_insnbuf insn ATTRIBUTE_UNUSED,
- uint32 val ATTRIBUTE_UNUSED)
-{
- /* Do nothing. */
-}
-
-static unsigned
-Implicit_Field_ar0_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static unsigned
-Implicit_Field_ar4_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED)
-{
- return 4;
-}
-
-static unsigned
-Implicit_Field_ar8_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED)
-{
- return 8;
-}
-
-static unsigned
-Implicit_Field_ar12_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED)
-{
- return 12;
-}
-
-static unsigned
-Implicit_Field_mr0_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static unsigned
-Implicit_Field_mr1_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED)
-{
- return 1;
-}
-
-static unsigned
-Implicit_Field_mr2_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED)
-{
- return 2;
-}
-
-static unsigned
-Implicit_Field_mr3_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED)
-{
- return 3;
-}
-
-static unsigned
-Implicit_Field_bt16_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static unsigned
-Implicit_Field_bs16_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static unsigned
-Implicit_Field_br16_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static unsigned
-Implicit_Field_brall_get (const xtensa_insnbuf insn ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-
-/* Functional units. */
-
-static xtensa_funcUnit_internal funcUnits[] = {
- { 0 }
-};
-
-
-/* Register files. */
-
-static xtensa_regfile_internal regfiles[] = {
- { "AR", "a", 0, 32, 64 },
- { "MR", "m", 1, 32, 4 },
- { "BR", "b", 2, 1, 16 },
- { "FR", "f", 3, 32, 16 },
- { "BR2", "b", 2, 2, 8 },
- { "BR4", "b", 2, 4, 4 },
- { "BR8", "b", 2, 8, 2 },
- { "BR16", "b", 2, 16, 1 }
-};
-
-
-/* Interfaces. */
-
-static xtensa_interface_internal interfaces[] = {
- { 0 }
-};
-
-
-/* Constant tables. */
-
-/* constant table ai4c */
-static const unsigned CONST_TBL_ai4c_0[] = {
- 0xffffffff,
- 0x1,
- 0x2,
- 0x3,
- 0x4,
- 0x5,
- 0x6,
- 0x7,
- 0x8,
- 0x9,
- 0xa,
- 0xb,
- 0xc,
- 0xd,
- 0xe,
- 0xf,
- 0
-};
-
-/* constant table b4c */
-static const unsigned CONST_TBL_b4c_0[] = {
- 0xffffffff,
- 0x1,
- 0x2,
- 0x3,
- 0x4,
- 0x5,
- 0x6,
- 0x7,
- 0x8,
- 0xa,
- 0xc,
- 0x10,
- 0x20,
- 0x40,
- 0x80,
- 0x100,
- 0
-};
-
-/* constant table b4cu */
-static const unsigned CONST_TBL_b4cu_0[] = {
- 0x8000,
- 0x10000,
- 0x2,
- 0x3,
- 0x4,
- 0x5,
- 0x6,
- 0x7,
- 0x8,
- 0xa,
- 0xc,
- 0x10,
- 0x20,
- 0x40,
- 0x80,
- 0x100,
- 0
-};
-
-
-/* Instruction operands. */
-
-static int
-Operand_soffsetx4_decode (uint32 *valp)
-{
- unsigned soffsetx4_0, offset_0;
- offset_0 = *valp & 0x3ffff;
- soffsetx4_0 = 0x4 + ((((int) offset_0 << 14) >> 14) << 2);
- *valp = soffsetx4_0;
- return 0;
-}
-
-static int
-Operand_soffsetx4_encode (uint32 *valp)
-{
- unsigned offset_0, soffsetx4_0;
- soffsetx4_0 = *valp;
- offset_0 = ((soffsetx4_0 - 0x4) >> 2) & 0x3ffff;
- *valp = offset_0;
- return 0;
-}
-
-static int
-Operand_soffsetx4_ator (uint32 *valp, uint32 pc)
-{
- *valp -= (pc & ~0x3);
- return 0;
-}
-
-static int
-Operand_soffsetx4_rtoa (uint32 *valp, uint32 pc)
-{
- *valp += (pc & ~0x3);
- return 0;
-}
-
-static int
-Operand_uimm12x8_decode (uint32 *valp)
-{
- unsigned uimm12x8_0, imm12_0;
- imm12_0 = *valp & 0xfff;
- uimm12x8_0 = imm12_0 << 3;
- *valp = uimm12x8_0;
- return 0;
-}
-
-static int
-Operand_uimm12x8_encode (uint32 *valp)
-{
- unsigned imm12_0, uimm12x8_0;
- uimm12x8_0 = *valp;
- imm12_0 = ((uimm12x8_0 >> 3) & 0xfff);
- *valp = imm12_0;
- return 0;
-}
-
-static int
-Operand_simm4_decode (uint32 *valp)
-{
- unsigned simm4_0, mn_0;
- mn_0 = *valp & 0xf;
- simm4_0 = ((int) mn_0 << 28) >> 28;
- *valp = simm4_0;
- return 0;
-}
-
-static int
-Operand_simm4_encode (uint32 *valp)
-{
- unsigned mn_0, simm4_0;
- simm4_0 = *valp;
- mn_0 = (simm4_0 & 0xf);
- *valp = mn_0;
- return 0;
-}
-
-static int
-Operand_arr_decode (uint32 *valp ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static int
-Operand_arr_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~0xf) != 0;
- return error;
-}
-
-static int
-Operand_ars_decode (uint32 *valp ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static int
-Operand_ars_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~0xf) != 0;
- return error;
-}
-
-static int
-Operand_art_decode (uint32 *valp ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static int
-Operand_art_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~0xf) != 0;
- return error;
-}
-
-static int
-Operand_ar0_decode (uint32 *valp ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static int
-Operand_ar0_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~0x3f) != 0;
- return error;
-}
-
-static int
-Operand_ar4_decode (uint32 *valp ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static int
-Operand_ar4_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~0x3f) != 0;
- return error;
-}
-
-static int
-Operand_ar8_decode (uint32 *valp ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static int
-Operand_ar8_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~0x3f) != 0;
- return error;
-}
-
-static int
-Operand_ar12_decode (uint32 *valp ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static int
-Operand_ar12_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~0x3f) != 0;
- return error;
-}
-
-static int
-Operand_ars_entry_decode (uint32 *valp ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static int
-Operand_ars_entry_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~0x3f) != 0;
- return error;
-}
-
-static int
-Operand_immrx4_decode (uint32 *valp)
-{
- unsigned immrx4_0, rz_0;
- rz_0 = *valp & 0xf;
- immrx4_0 = (((0xfffffff) << 4) | rz_0) << 2;
- *valp = immrx4_0;
- return 0;
-}
-
-static int
-Operand_immrx4_encode (uint32 *valp)
-{
- unsigned rz_0, immrx4_0;
- immrx4_0 = *valp;
- rz_0 = ((immrx4_0 >> 2) & 0xf);
- *valp = rz_0;
- return 0;
-}
-
-static int
-Operand_lsi4x4_decode (uint32 *valp)
-{
- unsigned lsi4x4_0, rz_0;
- rz_0 = *valp & 0xf;
- lsi4x4_0 = rz_0 << 2;
- *valp = lsi4x4_0;
- return 0;
-}
-
-static int
-Operand_lsi4x4_encode (uint32 *valp)
-{
- unsigned rz_0, lsi4x4_0;
- lsi4x4_0 = *valp;
- rz_0 = ((lsi4x4_0 >> 2) & 0xf);
- *valp = rz_0;
- return 0;
-}
-
-static int
-Operand_simm7_decode (uint32 *valp)
-{
- unsigned simm7_0, imm7_0;
- imm7_0 = *valp & 0x7f;
- simm7_0 = ((((-((((imm7_0 >> 6) & 1)) & (((imm7_0 >> 5) & 1)))) & 0x1ffffff)) << 7) | imm7_0;
- *valp = simm7_0;
- return 0;
-}
-
-static int
-Operand_simm7_encode (uint32 *valp)
-{
- unsigned imm7_0, simm7_0;
- simm7_0 = *valp;
- imm7_0 = (simm7_0 & 0x7f);
- *valp = imm7_0;
- return 0;
-}
-
-static int
-Operand_uimm6_decode (uint32 *valp)
-{
- unsigned uimm6_0, imm6_0;
- imm6_0 = *valp & 0x3f;
- uimm6_0 = 0x4 + (((0) << 6) | imm6_0);
- *valp = uimm6_0;
- return 0;
-}
-
-static int
-Operand_uimm6_encode (uint32 *valp)
-{
- unsigned imm6_0, uimm6_0;
- uimm6_0 = *valp;
- imm6_0 = (uimm6_0 - 0x4) & 0x3f;
- *valp = imm6_0;
- return 0;
-}
-
-static int
-Operand_uimm6_ator (uint32 *valp, uint32 pc)
-{
- *valp -= pc;
- return 0;
-}
-
-static int
-Operand_uimm6_rtoa (uint32 *valp, uint32 pc)
-{
- *valp += pc;
- return 0;
-}
-
-static int
-Operand_ai4const_decode (uint32 *valp)
-{
- unsigned ai4const_0, t_0;
- t_0 = *valp & 0xf;
- ai4const_0 = CONST_TBL_ai4c_0[t_0 & 0xf];
- *valp = ai4const_0;
- return 0;
-}
-
-static int
-Operand_ai4const_encode (uint32 *valp)
-{
- unsigned t_0, ai4const_0;
- ai4const_0 = *valp;
- switch (ai4const_0)
- {
- case 0xffffffff: t_0 = 0; break;
- case 0x1: t_0 = 0x1; break;
- case 0x2: t_0 = 0x2; break;
- case 0x3: t_0 = 0x3; break;
- case 0x4: t_0 = 0x4; break;
- case 0x5: t_0 = 0x5; break;
- case 0x6: t_0 = 0x6; break;
- case 0x7: t_0 = 0x7; break;
- case 0x8: t_0 = 0x8; break;
- case 0x9: t_0 = 0x9; break;
- case 0xa: t_0 = 0xa; break;
- case 0xb: t_0 = 0xb; break;
- case 0xc: t_0 = 0xc; break;
- case 0xd: t_0 = 0xd; break;
- case 0xe: t_0 = 0xe; break;
- default: t_0 = 0xf; break;
- }
- *valp = t_0;
- return 0;
-}
-
-static int
-Operand_b4const_decode (uint32 *valp)
-{
- unsigned b4const_0, rz_0;
- rz_0 = *valp & 0xf;
- b4const_0 = CONST_TBL_b4c_0[rz_0 & 0xf];
- *valp = b4const_0;
- return 0;
-}
-
-static int
-Operand_b4const_encode (uint32 *valp)
-{
- unsigned rz_0, b4const_0;
- b4const_0 = *valp;
- switch (b4const_0)
- {
- case 0xffffffff: rz_0 = 0; break;
- case 0x1: rz_0 = 0x1; break;
- case 0x2: rz_0 = 0x2; break;
- case 0x3: rz_0 = 0x3; break;
- case 0x4: rz_0 = 0x4; break;
- case 0x5: rz_0 = 0x5; break;
- case 0x6: rz_0 = 0x6; break;
- case 0x7: rz_0 = 0x7; break;
- case 0x8: rz_0 = 0x8; break;
- case 0xa: rz_0 = 0x9; break;
- case 0xc: rz_0 = 0xa; break;
- case 0x10: rz_0 = 0xb; break;
- case 0x20: rz_0 = 0xc; break;
- case 0x40: rz_0 = 0xd; break;
- case 0x80: rz_0 = 0xe; break;
- default: rz_0 = 0xf; break;
- }
- *valp = rz_0;
- return 0;
-}
-
-static int
-Operand_b4constu_decode (uint32 *valp)
-{
- unsigned b4constu_0, rz_0;
- rz_0 = *valp & 0xf;
- b4constu_0 = CONST_TBL_b4cu_0[rz_0 & 0xf];
- *valp = b4constu_0;
- return 0;
-}
-
-static int
-Operand_b4constu_encode (uint32 *valp)
-{
- unsigned rz_0, b4constu_0;
- b4constu_0 = *valp;
- switch (b4constu_0)
- {
- case 0x8000: rz_0 = 0; break;
- case 0x10000: rz_0 = 0x1; break;
- case 0x2: rz_0 = 0x2; break;
- case 0x3: rz_0 = 0x3; break;
- case 0x4: rz_0 = 0x4; break;
- case 0x5: rz_0 = 0x5; break;
- case 0x6: rz_0 = 0x6; break;
- case 0x7: rz_0 = 0x7; break;
- case 0x8: rz_0 = 0x8; break;
- case 0xa: rz_0 = 0x9; break;
- case 0xc: rz_0 = 0xa; break;
- case 0x10: rz_0 = 0xb; break;
- case 0x20: rz_0 = 0xc; break;
- case 0x40: rz_0 = 0xd; break;
- case 0x80: rz_0 = 0xe; break;
- default: rz_0 = 0xf; break;
- }
- *valp = rz_0;
- return 0;
-}
-
-static int
-Operand_uimm8_decode (uint32 *valp)
-{
- unsigned uimm8_0, imm8_0;
- imm8_0 = *valp & 0xff;
- uimm8_0 = imm8_0;
- *valp = uimm8_0;
- return 0;
-}
-
-static int
-Operand_uimm8_encode (uint32 *valp)
-{
- unsigned imm8_0, uimm8_0;
- uimm8_0 = *valp;
- imm8_0 = (uimm8_0 & 0xff);
- *valp = imm8_0;
- return 0;
-}
-
-static int
-Operand_uimm8x2_decode (uint32 *valp)
-{
- unsigned uimm8x2_0, imm8_0;
- imm8_0 = *valp & 0xff;
- uimm8x2_0 = imm8_0 << 1;
- *valp = uimm8x2_0;
- return 0;
-}
-
-static int
-Operand_uimm8x2_encode (uint32 *valp)
-{
- unsigned imm8_0, uimm8x2_0;
- uimm8x2_0 = *valp;
- imm8_0 = ((uimm8x2_0 >> 1) & 0xff);
- *valp = imm8_0;
- return 0;
-}
-
-static int
-Operand_uimm8x4_decode (uint32 *valp)
-{
- unsigned uimm8x4_0, imm8_0;
- imm8_0 = *valp & 0xff;
- uimm8x4_0 = imm8_0 << 2;
- *valp = uimm8x4_0;
- return 0;
-}
-
-static int
-Operand_uimm8x4_encode (uint32 *valp)
-{
- unsigned imm8_0, uimm8x4_0;
- uimm8x4_0 = *valp;
- imm8_0 = ((uimm8x4_0 >> 2) & 0xff);
- *valp = imm8_0;
- return 0;
-}
-
-static int
-Operand_uimm4x16_decode (uint32 *valp)
-{
- unsigned uimm4x16_0, op2_0;
- op2_0 = *valp & 0xf;
- uimm4x16_0 = op2_0 << 4;
- *valp = uimm4x16_0;
- return 0;
-}
-
-static int
-Operand_uimm4x16_encode (uint32 *valp)
-{
- unsigned op2_0, uimm4x16_0;
- uimm4x16_0 = *valp;
- op2_0 = ((uimm4x16_0 >> 4) & 0xf);
- *valp = op2_0;
- return 0;
-}
-
-static int
-Operand_simm8_decode (uint32 *valp)
-{
- unsigned simm8_0, imm8_0;
- imm8_0 = *valp & 0xff;
- simm8_0 = ((int) imm8_0 << 24) >> 24;
- *valp = simm8_0;
- return 0;
-}
-
-static int
-Operand_simm8_encode (uint32 *valp)
-{
- unsigned imm8_0, simm8_0;
- simm8_0 = *valp;
- imm8_0 = (simm8_0 & 0xff);
- *valp = imm8_0;
- return 0;
-}
-
-static int
-Operand_simm8x256_decode (uint32 *valp)
-{
- unsigned simm8x256_0, imm8_0;
- imm8_0 = *valp & 0xff;
- simm8x256_0 = (((int) imm8_0 << 24) >> 24) << 8;
- *valp = simm8x256_0;
- return 0;
-}
-
-static int
-Operand_simm8x256_encode (uint32 *valp)
-{
- unsigned imm8_0, simm8x256_0;
- simm8x256_0 = *valp;
- imm8_0 = ((simm8x256_0 >> 8) & 0xff);
- *valp = imm8_0;
- return 0;
-}
-
-static int
-Operand_simm12b_decode (uint32 *valp)
-{
- unsigned simm12b_0, imm12b_0;
- imm12b_0 = *valp & 0xfff;
- simm12b_0 = ((int) imm12b_0 << 20) >> 20;
- *valp = simm12b_0;
- return 0;
-}
-
-static int
-Operand_simm12b_encode (uint32 *valp)
-{
- unsigned imm12b_0, simm12b_0;
- simm12b_0 = *valp;
- imm12b_0 = (simm12b_0 & 0xfff);
- *valp = imm12b_0;
- return 0;
-}
-
-static int
-Operand_msalp32_decode (uint32 *valp)
-{
- unsigned msalp32_0, sal_0;
- sal_0 = *valp & 0x1f;
- msalp32_0 = 0x20 - sal_0;
- *valp = msalp32_0;
- return 0;
-}
-
-static int
-Operand_msalp32_encode (uint32 *valp)
-{
- unsigned sal_0, msalp32_0;
- msalp32_0 = *valp;
- sal_0 = (0x20 - msalp32_0) & 0x1f;
- *valp = sal_0;
- return 0;
-}
-
-static int
-Operand_op2p1_decode (uint32 *valp)
-{
- unsigned op2p1_0, op2_0;
- op2_0 = *valp & 0xf;
- op2p1_0 = op2_0 + 0x1;
- *valp = op2p1_0;
- return 0;
-}
-
-static int
-Operand_op2p1_encode (uint32 *valp)
-{
- unsigned op2_0, op2p1_0;
- op2p1_0 = *valp;
- op2_0 = (op2p1_0 - 0x1) & 0xf;
- *valp = op2_0;
- return 0;
-}
-
-static int
-Operand_label8_decode (uint32 *valp)
-{
- unsigned label8_0, imm8_0;
- imm8_0 = *valp & 0xff;
- label8_0 = 0x4 + (((int) imm8_0 << 24) >> 24);
- *valp = label8_0;
- return 0;
-}
-
-static int
-Operand_label8_encode (uint32 *valp)
-{
- unsigned imm8_0, label8_0;
- label8_0 = *valp;
- imm8_0 = (label8_0 - 0x4) & 0xff;
- *valp = imm8_0;
- return 0;
-}
-
-static int
-Operand_label8_ator (uint32 *valp, uint32 pc)
-{
- *valp -= pc;
- return 0;
-}
-
-static int
-Operand_label8_rtoa (uint32 *valp, uint32 pc)
-{
- *valp += pc;
- return 0;
-}
-
-static int
-Operand_ulabel8_decode (uint32 *valp)
-{
- unsigned ulabel8_0, imm8_0;
- imm8_0 = *valp & 0xff;
- ulabel8_0 = 0x4 + (((0) << 8) | imm8_0);
- *valp = ulabel8_0;
- return 0;
-}
-
-static int
-Operand_ulabel8_encode (uint32 *valp)
-{
- unsigned imm8_0, ulabel8_0;
- ulabel8_0 = *valp;
- imm8_0 = (ulabel8_0 - 0x4) & 0xff;
- *valp = imm8_0;
- return 0;
-}
-
-static int
-Operand_ulabel8_ator (uint32 *valp, uint32 pc)
-{
- *valp -= pc;
- return 0;
-}
-
-static int
-Operand_ulabel8_rtoa (uint32 *valp, uint32 pc)
-{
- *valp += pc;
- return 0;
-}
-
-static int
-Operand_label12_decode (uint32 *valp)
-{
- unsigned label12_0, imm12_0;
- imm12_0 = *valp & 0xfff;
- label12_0 = 0x4 + (((int) imm12_0 << 20) >> 20);
- *valp = label12_0;
- return 0;
-}
-
-static int
-Operand_label12_encode (uint32 *valp)
-{
- unsigned imm12_0, label12_0;
- label12_0 = *valp;
- imm12_0 = (label12_0 - 0x4) & 0xfff;
- *valp = imm12_0;
- return 0;
-}
-
-static int
-Operand_label12_ator (uint32 *valp, uint32 pc)
-{
- *valp -= pc;
- return 0;
-}
-
-static int
-Operand_label12_rtoa (uint32 *valp, uint32 pc)
-{
- *valp += pc;
- return 0;
-}
-
-static int
-Operand_soffset_decode (uint32 *valp)
-{
- unsigned soffset_0, offset_0;
- offset_0 = *valp & 0x3ffff;
- soffset_0 = 0x4 + (((int) offset_0 << 14) >> 14);
- *valp = soffset_0;
- return 0;
-}
-
-static int
-Operand_soffset_encode (uint32 *valp)
-{
- unsigned offset_0, soffset_0;
- soffset_0 = *valp;
- offset_0 = (soffset_0 - 0x4) & 0x3ffff;
- *valp = offset_0;
- return 0;
-}
-
-static int
-Operand_soffset_ator (uint32 *valp, uint32 pc)
-{
- *valp -= pc;
- return 0;
-}
-
-static int
-Operand_soffset_rtoa (uint32 *valp, uint32 pc)
-{
- *valp += pc;
- return 0;
-}
-
-static int
-Operand_uimm16x4_decode (uint32 *valp)
-{
- unsigned uimm16x4_0, imm16_0;
- imm16_0 = *valp & 0xffff;
- uimm16x4_0 = (((0xffff) << 16) | imm16_0) << 2;
- *valp = uimm16x4_0;
- return 0;
-}
-
-static int
-Operand_uimm16x4_encode (uint32 *valp)
-{
- unsigned imm16_0, uimm16x4_0;
- uimm16x4_0 = *valp;
- imm16_0 = (uimm16x4_0 >> 2) & 0xffff;
- *valp = imm16_0;
- return 0;
-}
-
-static int
-Operand_uimm16x4_ator (uint32 *valp, uint32 pc)
-{
- *valp -= ((pc + 3) & ~0x3);
- return 0;
-}
-
-static int
-Operand_uimm16x4_rtoa (uint32 *valp, uint32 pc)
-{
- *valp += ((pc + 3) & ~0x3);
- return 0;
-}
-
-static int
-Operand_mx_decode (uint32 *valp ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static int
-Operand_mx_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~0x3) != 0;
- return error;
-}
-
-static int
-Operand_my_decode (uint32 *valp)
-{
- *valp += 2;
- return 0;
-}
-
-static int
-Operand_my_encode (uint32 *valp)
-{
- int error;
- error = ((*valp & ~0x3) != 0) || ((*valp & 0x2) == 0);
- *valp = *valp & 1;
- return error;
-}
-
-static int
-Operand_mw_decode (uint32 *valp ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static int
-Operand_mw_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~0x3) != 0;
- return error;
-}
-
-static int
-Operand_mr0_decode (uint32 *valp ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static int
-Operand_mr0_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~0x3) != 0;
- return error;
-}
-
-static int
-Operand_mr1_decode (uint32 *valp ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static int
-Operand_mr1_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~0x3) != 0;
- return error;
-}
-
-static int
-Operand_mr2_decode (uint32 *valp ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static int
-Operand_mr2_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~0x3) != 0;
- return error;
-}
-
-static int
-Operand_mr3_decode (uint32 *valp ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static int
-Operand_mr3_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~0x3) != 0;
- return error;
-}
-
-static int
-Operand_immt_decode (uint32 *valp)
-{
- unsigned immt_0, t_0;
- t_0 = *valp & 0xf;
- immt_0 = t_0;
- *valp = immt_0;
- return 0;
-}
-
-static int
-Operand_immt_encode (uint32 *valp)
-{
- unsigned t_0, immt_0;
- immt_0 = *valp;
- t_0 = immt_0 & 0xf;
- *valp = t_0;
- return 0;
-}
-
-static int
-Operand_imms_decode (uint32 *valp)
-{
- unsigned imms_0, s_0;
- s_0 = *valp & 0xf;
- imms_0 = s_0;
- *valp = imms_0;
- return 0;
-}
-
-static int
-Operand_imms_encode (uint32 *valp)
-{
- unsigned s_0, imms_0;
- imms_0 = *valp;
- s_0 = imms_0 & 0xf;
- *valp = s_0;
- return 0;
-}
-
-static int
-Operand_bt_decode (uint32 *valp ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static int
-Operand_bt_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~0xf) != 0;
- return error;
-}
-
-static int
-Operand_bs_decode (uint32 *valp ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static int
-Operand_bs_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~0xf) != 0;
- return error;
-}
-
-static int
-Operand_br_decode (uint32 *valp ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static int
-Operand_br_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~0xf) != 0;
- return error;
-}
-
-static int
-Operand_bt2_decode (uint32 *valp)
-{
- *valp = *valp << 1;
- return 0;
-}
-
-static int
-Operand_bt2_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~(0x7 << 1)) != 0;
- *valp = *valp >> 1;
- return error;
-}
-
-static int
-Operand_bs2_decode (uint32 *valp)
-{
- *valp = *valp << 1;
- return 0;
-}
-
-static int
-Operand_bs2_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~(0x7 << 1)) != 0;
- *valp = *valp >> 1;
- return error;
-}
-
-static int
-Operand_br2_decode (uint32 *valp)
-{
- *valp = *valp << 1;
- return 0;
-}
-
-static int
-Operand_br2_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~(0x7 << 1)) != 0;
- *valp = *valp >> 1;
- return error;
-}
-
-static int
-Operand_bt4_decode (uint32 *valp)
-{
- *valp = *valp << 2;
- return 0;
-}
-
-static int
-Operand_bt4_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~(0x3 << 2)) != 0;
- *valp = *valp >> 2;
- return error;
-}
-
-static int
-Operand_bs4_decode (uint32 *valp)
-{
- *valp = *valp << 2;
- return 0;
-}
-
-static int
-Operand_bs4_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~(0x3 << 2)) != 0;
- *valp = *valp >> 2;
- return error;
-}
-
-static int
-Operand_br4_decode (uint32 *valp)
-{
- *valp = *valp << 2;
- return 0;
-}
-
-static int
-Operand_br4_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~(0x3 << 2)) != 0;
- *valp = *valp >> 2;
- return error;
-}
-
-static int
-Operand_bt8_decode (uint32 *valp)
-{
- *valp = *valp << 3;
- return 0;
-}
-
-static int
-Operand_bt8_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~(0x1 << 3)) != 0;
- *valp = *valp >> 3;
- return error;
-}
-
-static int
-Operand_bs8_decode (uint32 *valp)
-{
- *valp = *valp << 3;
- return 0;
-}
-
-static int
-Operand_bs8_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~(0x1 << 3)) != 0;
- *valp = *valp >> 3;
- return error;
-}
-
-static int
-Operand_br8_decode (uint32 *valp)
-{
- *valp = *valp << 3;
- return 0;
-}
-
-static int
-Operand_br8_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~(0x1 << 3)) != 0;
- *valp = *valp >> 3;
- return error;
-}
-
-static int
-Operand_bt16_decode (uint32 *valp)
-{
- *valp = *valp << 4;
- return 0;
-}
-
-static int
-Operand_bt16_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~(0 << 4)) != 0;
- *valp = *valp >> 4;
- return error;
-}
-
-static int
-Operand_bs16_decode (uint32 *valp)
-{
- *valp = *valp << 4;
- return 0;
-}
-
-static int
-Operand_bs16_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~(0 << 4)) != 0;
- *valp = *valp >> 4;
- return error;
-}
-
-static int
-Operand_br16_decode (uint32 *valp)
-{
- *valp = *valp << 4;
- return 0;
-}
-
-static int
-Operand_br16_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~(0 << 4)) != 0;
- *valp = *valp >> 4;
- return error;
-}
-
-static int
-Operand_brall_decode (uint32 *valp)
-{
- *valp = *valp << 4;
- return 0;
-}
-
-static int
-Operand_brall_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~(0 << 4)) != 0;
- *valp = *valp >> 4;
- return error;
-}
-
-static int
-Operand_tp7_decode (uint32 *valp)
-{
- unsigned tp7_0, t_0;
- t_0 = *valp & 0xf;
- tp7_0 = t_0 + 0x7;
- *valp = tp7_0;
- return 0;
-}
-
-static int
-Operand_tp7_encode (uint32 *valp)
-{
- unsigned t_0, tp7_0;
- tp7_0 = *valp;
- t_0 = (tp7_0 - 0x7) & 0xf;
- *valp = t_0;
- return 0;
-}
-
-static int
-Operand_xt_wbr15_label_decode (uint32 *valp)
-{
- unsigned xt_wbr15_label_0, xt_wbr15_imm_0;
- xt_wbr15_imm_0 = *valp & 0x7fff;
- xt_wbr15_label_0 = 0x4 + (((int) xt_wbr15_imm_0 << 17) >> 17);
- *valp = xt_wbr15_label_0;
- return 0;
-}
-
-static int
-Operand_xt_wbr15_label_encode (uint32 *valp)
-{
- unsigned xt_wbr15_imm_0, xt_wbr15_label_0;
- xt_wbr15_label_0 = *valp;
- xt_wbr15_imm_0 = (xt_wbr15_label_0 - 0x4) & 0x7fff;
- *valp = xt_wbr15_imm_0;
- return 0;
-}
-
-static int
-Operand_xt_wbr15_label_ator (uint32 *valp, uint32 pc)
-{
- *valp -= pc;
- return 0;
-}
-
-static int
-Operand_xt_wbr15_label_rtoa (uint32 *valp, uint32 pc)
-{
- *valp += pc;
- return 0;
-}
-
-static int
-Operand_xt_wbr18_label_decode (uint32 *valp)
-{
- unsigned xt_wbr18_label_0, xt_wbr18_imm_0;
- xt_wbr18_imm_0 = *valp & 0x3ffff;
- xt_wbr18_label_0 = 0x4 + (((int) xt_wbr18_imm_0 << 14) >> 14);
- *valp = xt_wbr18_label_0;
- return 0;
-}
-
-static int
-Operand_xt_wbr18_label_encode (uint32 *valp)
-{
- unsigned xt_wbr18_imm_0, xt_wbr18_label_0;
- xt_wbr18_label_0 = *valp;
- xt_wbr18_imm_0 = (xt_wbr18_label_0 - 0x4) & 0x3ffff;
- *valp = xt_wbr18_imm_0;
- return 0;
-}
-
-static int
-Operand_xt_wbr18_label_ator (uint32 *valp, uint32 pc)
-{
- *valp -= pc;
- return 0;
-}
-
-static int
-Operand_xt_wbr18_label_rtoa (uint32 *valp, uint32 pc)
-{
- *valp += pc;
- return 0;
-}
-
-static int
-Operand_cimm8x4_decode (uint32 *valp)
-{
- unsigned cimm8x4_0, imm8_0;
- imm8_0 = *valp & 0xff;
- cimm8x4_0 = (imm8_0 << 2) | 0;
- *valp = cimm8x4_0;
- return 0;
-}
-
-static int
-Operand_cimm8x4_encode (uint32 *valp)
-{
- unsigned imm8_0, cimm8x4_0;
- cimm8x4_0 = *valp;
- imm8_0 = (cimm8x4_0 >> 2) & 0xff;
- *valp = imm8_0;
- return 0;
-}
-
-static int
-Operand_frr_decode (uint32 *valp ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static int
-Operand_frr_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~0xf) != 0;
- return error;
-}
-
-static int
-Operand_frs_decode (uint32 *valp ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static int
-Operand_frs_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~0xf) != 0;
- return error;
-}
-
-static int
-Operand_frt_decode (uint32 *valp ATTRIBUTE_UNUSED)
-{
- return 0;
-}
-
-static int
-Operand_frt_encode (uint32 *valp)
-{
- int error;
- error = (*valp & ~0xf) != 0;
- return error;
-}
-
-static xtensa_operand_internal operands[] = {
- { "soffsetx4", 10, -1, 0,
- XTENSA_OPERAND_IS_PCRELATIVE,
- Operand_soffsetx4_encode, Operand_soffsetx4_decode,
- Operand_soffsetx4_ator, Operand_soffsetx4_rtoa },
- { "uimm12x8", 3, -1, 0,
- 0,
- Operand_uimm12x8_encode, Operand_uimm12x8_decode,
- 0, 0 },
- { "simm4", 26, -1, 0,
- 0,
- Operand_simm4_encode, Operand_simm4_decode,
- 0, 0 },
- { "arr", 14, 0, 1,
- XTENSA_OPERAND_IS_REGISTER,
- Operand_arr_encode, Operand_arr_decode,
- 0, 0 },
- { "ars", 5, 0, 1,
- XTENSA_OPERAND_IS_REGISTER,
- Operand_ars_encode, Operand_ars_decode,
- 0, 0 },
- { "*ars_invisible", 5, 0, 1,
- XTENSA_OPERAND_IS_REGISTER | XTENSA_OPERAND_IS_INVISIBLE,
- Operand_ars_encode, Operand_ars_decode,
- 0, 0 },
- { "art", 0, 0, 1,
- XTENSA_OPERAND_IS_REGISTER,
- Operand_art_encode, Operand_art_decode,
- 0, 0 },
- { "ar0", 123, 0, 1,
- XTENSA_OPERAND_IS_REGISTER | XTENSA_OPERAND_IS_INVISIBLE,
- Operand_ar0_encode, Operand_ar0_decode,
- 0, 0 },
- { "ar4", 124, 0, 1,
- XTENSA_OPERAND_IS_REGISTER | XTENSA_OPERAND_IS_INVISIBLE,
- Operand_ar4_encode, Operand_ar4_decode,
- 0, 0 },
- { "ar8", 125, 0, 1,
- XTENSA_OPERAND_IS_REGISTER | XTENSA_OPERAND_IS_INVISIBLE,
- Operand_ar8_encode, Operand_ar8_decode,
- 0, 0 },
- { "ar12", 126, 0, 1,
- XTENSA_OPERAND_IS_REGISTER | XTENSA_OPERAND_IS_INVISIBLE,
- Operand_ar12_encode, Operand_ar12_decode,
- 0, 0 },
- { "ars_entry", 5, 0, 1,
- XTENSA_OPERAND_IS_REGISTER,
- Operand_ars_entry_encode, Operand_ars_entry_decode,
- 0, 0 },
- { "immrx4", 14, -1, 0,
- 0,
- Operand_immrx4_encode, Operand_immrx4_decode,
- 0, 0 },
- { "lsi4x4", 14, -1, 0,
- 0,
- Operand_lsi4x4_encode, Operand_lsi4x4_decode,
- 0, 0 },
- { "simm7", 34, -1, 0,
- 0,
- Operand_simm7_encode, Operand_simm7_decode,
- 0, 0 },
- { "uimm6", 33, -1, 0,
- XTENSA_OPERAND_IS_PCRELATIVE,
- Operand_uimm6_encode, Operand_uimm6_decode,
- Operand_uimm6_ator, Operand_uimm6_rtoa },
- { "ai4const", 0, -1, 0,
- 0,
- Operand_ai4const_encode, Operand_ai4const_decode,
- 0, 0 },
- { "b4const", 14, -1, 0,
- 0,
- Operand_b4const_encode, Operand_b4const_decode,
- 0, 0 },
- { "b4constu", 14, -1, 0,
- 0,
- Operand_b4constu_encode, Operand_b4constu_decode,
- 0, 0 },
- { "uimm8", 4, -1, 0,
- 0,
- Operand_uimm8_encode, Operand_uimm8_decode,
- 0, 0 },
- { "uimm8x2", 4, -1, 0,
- 0,
- Operand_uimm8x2_encode, Operand_uimm8x2_decode,
- 0, 0 },
- { "uimm8x4", 4, -1, 0,
- 0,
- Operand_uimm8x4_encode, Operand_uimm8x4_decode,
- 0, 0 },
- { "uimm4x16", 13, -1, 0,
- 0,
- Operand_uimm4x16_encode, Operand_uimm4x16_decode,
- 0, 0 },
- { "simm8", 4, -1, 0,
- 0,
- Operand_simm8_encode, Operand_simm8_decode,
- 0, 0 },
- { "simm8x256", 4, -1, 0,
- 0,
- Operand_simm8x256_encode, Operand_simm8x256_decode,
- 0, 0 },
- { "simm12b", 6, -1, 0,
- 0,
- Operand_simm12b_encode, Operand_simm12b_decode,
- 0, 0 },
- { "msalp32", 18, -1, 0,
- 0,
- Operand_msalp32_encode, Operand_msalp32_decode,
- 0, 0 },
- { "op2p1", 13, -1, 0,
- 0,
- Operand_op2p1_encode, Operand_op2p1_decode,
- 0, 0 },
- { "label8", 4, -1, 0,
- XTENSA_OPERAND_IS_PCRELATIVE,
- Operand_label8_encode, Operand_label8_decode,
- Operand_label8_ator, Operand_label8_rtoa },
- { "ulabel8", 4, -1, 0,
- XTENSA_OPERAND_IS_PCRELATIVE,
- Operand_ulabel8_encode, Operand_ulabel8_decode,
- Operand_ulabel8_ator, Operand_ulabel8_rtoa },
- { "label12", 3, -1, 0,
- XTENSA_OPERAND_IS_PCRELATIVE,
- Operand_label12_encode, Operand_label12_decode,
- Operand_label12_ator, Operand_label12_rtoa },
- { "soffset", 10, -1, 0,
- XTENSA_OPERAND_IS_PCRELATIVE,
- Operand_soffset_encode, Operand_soffset_decode,
- Operand_soffset_ator, Operand_soffset_rtoa },
- { "uimm16x4", 7, -1, 0,
- XTENSA_OPERAND_IS_PCRELATIVE,
- Operand_uimm16x4_encode, Operand_uimm16x4_decode,
- Operand_uimm16x4_ator, Operand_uimm16x4_rtoa },
- { "mx", 43, 1, 1,
- XTENSA_OPERAND_IS_REGISTER | XTENSA_OPERAND_IS_UNKNOWN,
- Operand_mx_encode, Operand_mx_decode,
- 0, 0 },
- { "my", 42, 1, 1,
- XTENSA_OPERAND_IS_REGISTER | XTENSA_OPERAND_IS_UNKNOWN,
- Operand_my_encode, Operand_my_decode,
- 0, 0 },
- { "mw", 41, 1, 1,
- XTENSA_OPERAND_IS_REGISTER,
- Operand_mw_encode, Operand_mw_decode,
- 0, 0 },
- { "mr0", 127, 1, 1,
- XTENSA_OPERAND_IS_REGISTER | XTENSA_OPERAND_IS_INVISIBLE,
- Operand_mr0_encode, Operand_mr0_decode,
- 0, 0 },
- { "mr1", 128, 1, 1,
- XTENSA_OPERAND_IS_REGISTER | XTENSA_OPERAND_IS_INVISIBLE,
- Operand_mr1_encode, Operand_mr1_decode,
- 0, 0 },
- { "mr2", 129, 1, 1,
- XTENSA_OPERAND_IS_REGISTER | XTENSA_OPERAND_IS_INVISIBLE,
- Operand_mr2_encode, Operand_mr2_decode,
- 0, 0 },
- { "mr3", 130, 1, 1,
- XTENSA_OPERAND_IS_REGISTER | XTENSA_OPERAND_IS_INVISIBLE,
- Operand_mr3_encode, Operand_mr3_decode,
- 0, 0 },
- { "immt", 0, -1, 0,
- 0,
- Operand_immt_encode, Operand_immt_decode,
- 0, 0 },
- { "imms", 5, -1, 0,
- 0,
- Operand_imms_encode, Operand_imms_decode,
- 0, 0 },
- { "bt", 0, 2, 1,
- XTENSA_OPERAND_IS_REGISTER,
- Operand_bt_encode, Operand_bt_decode,
- 0, 0 },
- { "bs", 5, 2, 1,
- XTENSA_OPERAND_IS_REGISTER,
- Operand_bs_encode, Operand_bs_decode,
- 0, 0 },
- { "br", 14, 2, 1,
- XTENSA_OPERAND_IS_REGISTER,
- Operand_br_encode, Operand_br_decode,
- 0, 0 },
- { "bt2", 44, 2, 2,
- XTENSA_OPERAND_IS_REGISTER,
- Operand_bt2_encode, Operand_bt2_decode,
- 0, 0 },
- { "bs2", 45, 2, 2,
- XTENSA_OPERAND_IS_REGISTER,
- Operand_bs2_encode, Operand_bs2_decode,
- 0, 0 },
- { "br2", 46, 2, 2,
- XTENSA_OPERAND_IS_REGISTER,
- Operand_br2_encode, Operand_br2_decode,
- 0, 0 },
- { "bt4", 47, 2, 4,
- XTENSA_OPERAND_IS_REGISTER,
- Operand_bt4_encode, Operand_bt4_decode,
- 0, 0 },
- { "bs4", 48, 2, 4,
- XTENSA_OPERAND_IS_REGISTER,
- Operand_bs4_encode, Operand_bs4_decode,
- 0, 0 },
- { "br4", 49, 2, 4,
- XTENSA_OPERAND_IS_REGISTER,
- Operand_br4_encode, Operand_br4_decode,
- 0, 0 },
- { "bt8", 50, 2, 8,
- XTENSA_OPERAND_IS_REGISTER,
- Operand_bt8_encode, Operand_bt8_decode,
- 0, 0 },
- { "bs8", 51, 2, 8,
- XTENSA_OPERAND_IS_REGISTER,
- Operand_bs8_encode, Operand_bs8_decode,
- 0, 0 },
- { "br8", 52, 2, 8,
- XTENSA_OPERAND_IS_REGISTER,
- Operand_br8_encode, Operand_br8_decode,
- 0, 0 },
- { "bt16", 131, 2, 16,
- XTENSA_OPERAND_IS_REGISTER,
- Operand_bt16_encode, Operand_bt16_decode,
- 0, 0 },
- { "bs16", 132, 2, 16,
- XTENSA_OPERAND_IS_REGISTER,
- Operand_bs16_encode, Operand_bs16_decode,
- 0, 0 },
- { "br16", 133, 2, 16,
- XTENSA_OPERAND_IS_REGISTER,
- Operand_br16_encode, Operand_br16_decode,
- 0, 0 },
- { "brall", 134, 2, 16,
- XTENSA_OPERAND_IS_REGISTER | XTENSA_OPERAND_IS_INVISIBLE,
- Operand_brall_encode, Operand_brall_decode,
- 0, 0 },
- { "tp7", 0, -1, 0,
- 0,
- Operand_tp7_encode, Operand_tp7_decode,
- 0, 0 },
- { "xt_wbr15_label", 53, -1, 0,
- XTENSA_OPERAND_IS_PCRELATIVE,
- Operand_xt_wbr15_label_encode, Operand_xt_wbr15_label_decode,
- Operand_xt_wbr15_label_ator, Operand_xt_wbr15_label_rtoa },
- { "xt_wbr18_label", 54, -1, 0,
- XTENSA_OPERAND_IS_PCRELATIVE,
- Operand_xt_wbr18_label_encode, Operand_xt_wbr18_label_decode,
- Operand_xt_wbr18_label_ator, Operand_xt_wbr18_label_rtoa },
- { "cimm8x4", 4, -1, 0,
- 0,
- Operand_cimm8x4_encode, Operand_cimm8x4_decode,
- 0, 0 },
- { "frr", 14, 3, 1,
- XTENSA_OPERAND_IS_REGISTER,
- Operand_frr_encode, Operand_frr_decode,
- 0, 0 },
- { "frs", 5, 3, 1,
- XTENSA_OPERAND_IS_REGISTER,
- Operand_frs_encode, Operand_frs_decode,
- 0, 0 },
- { "frt", 0, 3, 1,
- XTENSA_OPERAND_IS_REGISTER,
- Operand_frt_encode, Operand_frt_decode,
- 0, 0 },
- { "t", 0, -1, 0, 0, 0, 0, 0, 0 },
- { "bbi4", 1, -1, 0, 0, 0, 0, 0, 0 },
- { "bbi", 2, -1, 0, 0, 0, 0, 0, 0 },
- { "imm12", 3, -1, 0, 0, 0, 0, 0, 0 },
- { "imm8", 4, -1, 0, 0, 0, 0, 0, 0 },
- { "s", 5, -1, 0, 0, 0, 0, 0, 0 },
- { "imm12b", 6, -1, 0, 0, 0, 0, 0, 0 },
- { "imm16", 7, -1, 0, 0, 0, 0, 0, 0 },
- { "m", 8, -1, 0, 0, 0, 0, 0, 0 },
- { "n", 9, -1, 0, 0, 0, 0, 0, 0 },
- { "offset", 10, -1, 0, 0, 0, 0, 0, 0 },
- { "op0", 11, -1, 0, 0, 0, 0, 0, 0 },
- { "op1", 12, -1, 0, 0, 0, 0, 0, 0 },
- { "op2", 13, -1, 0, 0, 0, 0, 0, 0 },
- { "r", 14, -1, 0, 0, 0, 0, 0, 0 },
- { "sa4", 15, -1, 0, 0, 0, 0, 0, 0 },
- { "sae4", 16, -1, 0, 0, 0, 0, 0, 0 },
- { "sae", 17, -1, 0, 0, 0, 0, 0, 0 },
- { "sal", 18, -1, 0, 0, 0, 0, 0, 0 },
- { "sargt", 19, -1, 0, 0, 0, 0, 0, 0 },
- { "sas4", 20, -1, 0, 0, 0, 0, 0, 0 },
- { "sas", 21, -1, 0, 0, 0, 0, 0, 0 },
- { "sr", 22, -1, 0, 0, 0, 0, 0, 0 },
- { "st", 23, -1, 0, 0, 0, 0, 0, 0 },
- { "thi3", 24, -1, 0, 0, 0, 0, 0, 0 },
- { "imm4", 25, -1, 0, 0, 0, 0, 0, 0 },
- { "mn", 26, -1, 0, 0, 0, 0, 0, 0 },
- { "i", 27, -1, 0, 0, 0, 0, 0, 0 },
- { "imm6lo", 28, -1, 0, 0, 0, 0, 0, 0 },
- { "imm6hi", 29, -1, 0, 0, 0, 0, 0, 0 },
- { "imm7lo", 30, -1, 0, 0, 0, 0, 0, 0 },
- { "imm7hi", 31, -1, 0, 0, 0, 0, 0, 0 },
- { "z", 32, -1, 0, 0, 0, 0, 0, 0 },
- { "imm6", 33, -1, 0, 0, 0, 0, 0, 0 },
- { "imm7", 34, -1, 0, 0, 0, 0, 0, 0 },
- { "r3", 35, -1, 0, 0, 0, 0, 0, 0 },
- { "rbit2", 36, -1, 0, 0, 0, 0, 0, 0 },
- { "rhi", 37, -1, 0, 0, 0, 0, 0, 0 },
- { "t3", 38, -1, 0, 0, 0, 0, 0, 0 },
- { "tbit2", 39, -1, 0, 0, 0, 0, 0, 0 },
- { "tlo", 40, -1, 0, 0, 0, 0, 0, 0 },
- { "w", 41, -1, 0, 0, 0, 0, 0, 0 },
- { "y", 42, -1, 0, 0, 0, 0, 0, 0 },
- { "x", 43, -1, 0, 0, 0, 0, 0, 0 },
- { "t2", 44, -1, 0, 0, 0, 0, 0, 0 },
- { "s2", 45, -1, 0, 0, 0, 0, 0, 0 },
- { "r2", 46, -1, 0, 0, 0, 0, 0, 0 },
- { "t4", 47, -1, 0, 0, 0, 0, 0, 0 },
- { "s4", 48, -1, 0, 0, 0, 0, 0, 0 },
- { "r4", 49, -1, 0, 0, 0, 0, 0, 0 },
- { "t8", 50, -1, 0, 0, 0, 0, 0, 0 },
- { "s8", 51, -1, 0, 0, 0, 0, 0, 0 },
- { "r8", 52, -1, 0, 0, 0, 0, 0, 0 },
- { "xt_wbr15_imm", 53, -1, 0, 0, 0, 0, 0, 0 },
- { "xt_wbr18_imm", 54, -1, 0, 0, 0, 0, 0, 0 },
- { "op0_xt_flix64_slot0_s3", 55, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld7", 56, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld8", 57, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld9", 58, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld11", 59, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld49xt_flix64_slot0", 60, -1, 0, 0, 0, 0, 0, 0 },
- { "op0_s4", 61, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld16", 62, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld19xt_flix64_slot1", 63, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld20xt_flix64_slot1", 64, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld21xt_flix64_slot1", 65, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld22xt_flix64_slot1", 66, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld23xt_flix64_slot1", 67, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld25xt_flix64_slot1", 68, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld26xt_flix64_slot1", 69, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld28xt_flix64_slot1", 70, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld30xt_flix64_slot1", 71, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld32xt_flix64_slot1", 72, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld33xt_flix64_slot1", 73, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld35xt_flix64_slot1", 74, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld51xt_flix64_slot1", 75, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld52xt_flix64_slot1", 76, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld53xt_flix64_slot1", 77, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld54xt_flix64_slot1", 78, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld57xt_flix64_slot1", 79, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld58xt_flix64_slot1", 80, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld60xt_flix64_slot1", 81, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld62xt_flix64_slot1", 82, -1, 0, 0, 0, 0, 0, 0 },
- { "op0_s5", 83, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld36xt_flix64_slot2", 84, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld37xt_flix64_slot2", 85, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld39xt_flix64_slot2", 86, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld41xt_flix64_slot2", 87, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld42xt_flix64_slot2", 88, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld44xt_flix64_slot2", 89, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld45xt_flix64_slot2", 90, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld47xt_flix64_slot2", 91, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld63xt_flix64_slot2", 92, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld64xt_flix64_slot2", 93, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld65xt_flix64_slot2", 94, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld66xt_flix64_slot2", 95, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld68xt_flix64_slot2", 96, -1, 0, 0, 0, 0, 0, 0 },
- { "op0_s6", 97, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld70xt_flix64_slot3", 98, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld71", 99, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld72xt_flix64_slot3", 100, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld73xt_flix64_slot3", 101, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld74xt_flix64_slot3", 102, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld75xt_flix64_slot3", 103, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld76xt_flix64_slot3", 104, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld77xt_flix64_slot3", 105, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld78xt_flix64_slot3", 106, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld79xt_flix64_slot3", 107, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld80xt_flix64_slot3", 108, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld81xt_flix64_slot3", 109, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld82xt_flix64_slot3", 110, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld83xt_flix64_slot3", 111, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld84xt_flix64_slot3", 112, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld85xt_flix64_slot3", 113, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld86xt_flix64_slot3", 114, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld87xt_flix64_slot3", 115, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld88xt_flix64_slot3", 116, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld89xt_flix64_slot3", 117, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld90xt_flix64_slot3", 118, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld91xt_flix64_slot3", 119, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld92xt_flix64_slot3", 120, -1, 0, 0, 0, 0, 0, 0 },
- { "combined3e2c5767_fld93xt_flix64_slot3", 121, -1, 0, 0, 0, 0, 0, 0 },
- { "op0_xt_flix64_slot0", 122, -1, 0, 0, 0, 0, 0, 0 }
-};
-
-
-/* Iclass table. */
-
-static xtensa_arg_internal Iclass_xt_iclass_rfe_stateArgs[] = {
- { { STATE_PSRING }, 'i' },
- { { STATE_PSEXCM }, 'm' },
- { { STATE_EPC1 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rfde_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_DEPC }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_call12_args[] = {
- { { 0 /* soffsetx4 */ }, 'i' },
- { { 10 /* ar12 */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_call12_stateArgs[] = {
- { { STATE_PSCALLINC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_call8_args[] = {
- { { 0 /* soffsetx4 */ }, 'i' },
- { { 9 /* ar8 */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_call8_stateArgs[] = {
- { { STATE_PSCALLINC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_call4_args[] = {
- { { 0 /* soffsetx4 */ }, 'i' },
- { { 8 /* ar4 */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_call4_stateArgs[] = {
- { { STATE_PSCALLINC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_callx12_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 10 /* ar12 */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_callx12_stateArgs[] = {
- { { STATE_PSCALLINC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_callx8_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 9 /* ar8 */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_callx8_stateArgs[] = {
- { { STATE_PSCALLINC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_callx4_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 8 /* ar4 */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_callx4_stateArgs[] = {
- { { STATE_PSCALLINC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_entry_args[] = {
- { { 11 /* ars_entry */ }, 's' },
- { { 4 /* ars */ }, 'i' },
- { { 1 /* uimm12x8 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_entry_stateArgs[] = {
- { { STATE_PSCALLINC }, 'i' },
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSWOE }, 'i' },
- { { STATE_WindowBase }, 'm' },
- { { STATE_WindowStart }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_movsp_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 4 /* ars */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_movsp_stateArgs[] = {
- { { STATE_WindowBase }, 'i' },
- { { STATE_WindowStart }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rotw_args[] = {
- { { 2 /* simm4 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rotw_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_WindowBase }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_retw_args[] = {
- { { 5 /* *ars_invisible */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_retw_stateArgs[] = {
- { { STATE_WindowBase }, 'm' },
- { { STATE_WindowStart }, 'm' },
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSWOE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rfwou_stateArgs[] = {
- { { STATE_EPC1 }, 'i' },
- { { STATE_PSEXCM }, 'm' },
- { { STATE_PSRING }, 'i' },
- { { STATE_WindowBase }, 'm' },
- { { STATE_WindowStart }, 'm' },
- { { STATE_PSOWB }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_l32e_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 12 /* immrx4 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_l32e_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_s32e_args[] = {
- { { 6 /* art */ }, 'i' },
- { { 4 /* ars */ }, 'i' },
- { { 12 /* immrx4 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_s32e_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_windowbase_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_windowbase_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_WindowBase }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_windowbase_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_windowbase_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_WindowBase }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_windowbase_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_windowbase_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_WindowBase }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_windowstart_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_windowstart_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_WindowStart }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_windowstart_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_windowstart_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_WindowStart }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_windowstart_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_windowstart_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_WindowStart }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_add_n_args[] = {
- { { 3 /* arr */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_addi_n_args[] = {
- { { 3 /* arr */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 16 /* ai4const */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_bz6_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 15 /* uimm6 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_loadi4_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 13 /* lsi4x4 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_mov_n_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 4 /* ars */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_movi_n_args[] = {
- { { 4 /* ars */ }, 'o' },
- { { 14 /* simm7 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_retn_args[] = {
- { { 5 /* *ars_invisible */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_storei4_args[] = {
- { { 6 /* art */ }, 'i' },
- { { 4 /* ars */ }, 'i' },
- { { 13 /* lsi4x4 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_rur_threadptr_args[] = {
- { { 3 /* arr */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_rur_threadptr_stateArgs[] = {
- { { STATE_THREADPTR }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_wur_threadptr_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_wur_threadptr_stateArgs[] = {
- { { STATE_THREADPTR }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_addi_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 23 /* simm8 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_addmi_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 24 /* simm8x256 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_addsub_args[] = {
- { { 3 /* arr */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_bit_args[] = {
- { { 3 /* arr */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_bsi8_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 17 /* b4const */ }, 'i' },
- { { 28 /* label8 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_bsi8b_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 67 /* bbi */ }, 'i' },
- { { 28 /* label8 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_bsi8u_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 18 /* b4constu */ }, 'i' },
- { { 28 /* label8 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_bst8_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 6 /* art */ }, 'i' },
- { { 28 /* label8 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_bsz12_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 30 /* label12 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_call0_args[] = {
- { { 0 /* soffsetx4 */ }, 'i' },
- { { 7 /* ar0 */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_callx0_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 7 /* ar0 */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_exti_args[] = {
- { { 3 /* arr */ }, 'o' },
- { { 6 /* art */ }, 'i' },
- { { 82 /* sae */ }, 'i' },
- { { 27 /* op2p1 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_jump_args[] = {
- { { 31 /* soffset */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_jumpx_args[] = {
- { { 4 /* ars */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_l16ui_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 20 /* uimm8x2 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_l16si_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 20 /* uimm8x2 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_l32i_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 21 /* uimm8x4 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_l32r_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 32 /* uimm16x4 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_l32r_stateArgs[] = {
- { { STATE_LITBADDR }, 'i' },
- { { STATE_LITBEN }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_l8i_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 19 /* uimm8 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_loop_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 29 /* ulabel8 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_loop_stateArgs[] = {
- { { STATE_LBEG }, 'o' },
- { { STATE_LEND }, 'o' },
- { { STATE_LCOUNT }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_loopz_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 29 /* ulabel8 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_loopz_stateArgs[] = {
- { { STATE_LBEG }, 'o' },
- { { STATE_LEND }, 'o' },
- { { STATE_LCOUNT }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_movi_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 25 /* simm12b */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_movz_args[] = {
- { { 3 /* arr */ }, 'm' },
- { { 4 /* ars */ }, 'i' },
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_neg_args[] = {
- { { 3 /* arr */ }, 'o' },
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_return_args[] = {
- { { 5 /* *ars_invisible */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_s16i_args[] = {
- { { 6 /* art */ }, 'i' },
- { { 4 /* ars */ }, 'i' },
- { { 20 /* uimm8x2 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_s32i_args[] = {
- { { 6 /* art */ }, 'i' },
- { { 4 /* ars */ }, 'i' },
- { { 21 /* uimm8x4 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_s8i_args[] = {
- { { 6 /* art */ }, 'i' },
- { { 4 /* ars */ }, 'i' },
- { { 19 /* uimm8 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_sar_args[] = {
- { { 4 /* ars */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_sar_stateArgs[] = {
- { { STATE_SAR }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_sari_args[] = {
- { { 86 /* sas */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_sari_stateArgs[] = {
- { { STATE_SAR }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_shifts_args[] = {
- { { 3 /* arr */ }, 'o' },
- { { 4 /* ars */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_shifts_stateArgs[] = {
- { { STATE_SAR }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_shiftst_args[] = {
- { { 3 /* arr */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_shiftst_stateArgs[] = {
- { { STATE_SAR }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_shiftt_args[] = {
- { { 3 /* arr */ }, 'o' },
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_shiftt_stateArgs[] = {
- { { STATE_SAR }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_slli_args[] = {
- { { 3 /* arr */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 26 /* msalp32 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_srai_args[] = {
- { { 3 /* arr */ }, 'o' },
- { { 6 /* art */ }, 'i' },
- { { 84 /* sargt */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_srli_args[] = {
- { { 3 /* arr */ }, 'o' },
- { { 6 /* art */ }, 'i' },
- { { 70 /* s */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_sync_stateArgs[] = {
- { { STATE_XTSYNC }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsil_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 70 /* s */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsil_stateArgs[] = {
- { { STATE_PSWOE }, 'i' },
- { { STATE_PSCALLINC }, 'i' },
- { { STATE_PSOWB }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_PSUM }, 'i' },
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSINTLEVEL }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_lend_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_lend_stateArgs[] = {
- { { STATE_LEND }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_lend_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_lend_stateArgs[] = {
- { { STATE_LEND }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_lend_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_lend_stateArgs[] = {
- { { STATE_LEND }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_lcount_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_lcount_stateArgs[] = {
- { { STATE_LCOUNT }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_lcount_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_lcount_stateArgs[] = {
- { { STATE_XTSYNC }, 'o' },
- { { STATE_LCOUNT }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_lcount_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_lcount_stateArgs[] = {
- { { STATE_XTSYNC }, 'o' },
- { { STATE_LCOUNT }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_lbeg_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_lbeg_stateArgs[] = {
- { { STATE_LBEG }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_lbeg_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_lbeg_stateArgs[] = {
- { { STATE_LBEG }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_lbeg_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_lbeg_stateArgs[] = {
- { { STATE_LBEG }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_sar_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_sar_stateArgs[] = {
- { { STATE_SAR }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_sar_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_sar_stateArgs[] = {
- { { STATE_SAR }, 'o' },
- { { STATE_XTSYNC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_sar_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_sar_stateArgs[] = {
- { { STATE_SAR }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_litbase_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_litbase_stateArgs[] = {
- { { STATE_LITBADDR }, 'i' },
- { { STATE_LITBEN }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_litbase_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_litbase_stateArgs[] = {
- { { STATE_LITBADDR }, 'o' },
- { { STATE_LITBEN }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_litbase_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_litbase_stateArgs[] = {
- { { STATE_LITBADDR }, 'm' },
- { { STATE_LITBEN }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_176_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_176_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_208_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_208_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_ps_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_ps_stateArgs[] = {
- { { STATE_PSWOE }, 'i' },
- { { STATE_PSCALLINC }, 'i' },
- { { STATE_PSOWB }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_PSUM }, 'i' },
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSINTLEVEL }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_ps_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_ps_stateArgs[] = {
- { { STATE_PSWOE }, 'o' },
- { { STATE_PSCALLINC }, 'o' },
- { { STATE_PSOWB }, 'o' },
- { { STATE_PSRING }, 'm' },
- { { STATE_PSUM }, 'o' },
- { { STATE_PSEXCM }, 'm' },
- { { STATE_PSINTLEVEL }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_ps_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_ps_stateArgs[] = {
- { { STATE_PSWOE }, 'm' },
- { { STATE_PSCALLINC }, 'm' },
- { { STATE_PSOWB }, 'm' },
- { { STATE_PSRING }, 'm' },
- { { STATE_PSUM }, 'm' },
- { { STATE_PSEXCM }, 'm' },
- { { STATE_PSINTLEVEL }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_epc1_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_epc1_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPC1 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_epc1_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_epc1_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPC1 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_epc1_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_epc1_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPC1 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave1_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave1_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCSAVE1 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave1_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave1_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCSAVE1 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave1_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave1_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCSAVE1 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_epc2_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_epc2_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPC2 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_epc2_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_epc2_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPC2 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_epc2_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_epc2_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPC2 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave2_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave2_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCSAVE2 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave2_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave2_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCSAVE2 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave2_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave2_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCSAVE2 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_epc3_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_epc3_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPC3 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_epc3_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_epc3_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPC3 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_epc3_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_epc3_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPC3 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave3_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave3_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCSAVE3 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave3_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave3_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCSAVE3 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave3_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave3_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCSAVE3 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_epc4_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_epc4_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPC4 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_epc4_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_epc4_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPC4 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_epc4_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_epc4_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPC4 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave4_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave4_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCSAVE4 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave4_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave4_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCSAVE4 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave4_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave4_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCSAVE4 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_epc5_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_epc5_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPC5 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_epc5_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_epc5_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPC5 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_epc5_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_epc5_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPC5 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave5_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave5_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCSAVE5 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave5_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave5_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCSAVE5 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave5_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave5_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCSAVE5 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_epc6_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_epc6_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPC6 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_epc6_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_epc6_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPC6 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_epc6_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_epc6_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPC6 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave6_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave6_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCSAVE6 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave6_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave6_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCSAVE6 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave6_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave6_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCSAVE6 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_epc7_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_epc7_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPC7 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_epc7_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_epc7_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPC7 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_epc7_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_epc7_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPC7 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave7_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_excsave7_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCSAVE7 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave7_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_excsave7_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCSAVE7 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave7_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_excsave7_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCSAVE7 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_eps2_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_eps2_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPS2 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_eps2_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_eps2_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPS2 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_eps2_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_eps2_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPS2 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_eps3_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_eps3_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPS3 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_eps3_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_eps3_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPS3 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_eps3_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_eps3_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPS3 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_eps4_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_eps4_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPS4 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_eps4_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_eps4_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPS4 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_eps4_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_eps4_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPS4 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_eps5_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_eps5_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPS5 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_eps5_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_eps5_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPS5 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_eps5_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_eps5_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPS5 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_eps6_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_eps6_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPS6 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_eps6_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_eps6_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPS6 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_eps6_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_eps6_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPS6 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_eps7_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_eps7_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPS7 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_eps7_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_eps7_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPS7 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_eps7_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_eps7_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EPS7 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_excvaddr_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_excvaddr_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCVADDR }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_excvaddr_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_excvaddr_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCVADDR }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_excvaddr_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_excvaddr_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCVADDR }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_depc_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_depc_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_DEPC }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_depc_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_depc_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_DEPC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_depc_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_depc_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_DEPC }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_exccause_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_exccause_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCCAUSE }, 'i' },
- { { STATE_XTSYNC }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_exccause_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_exccause_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCCAUSE }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_exccause_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_exccause_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_EXCCAUSE }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_misc0_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_misc0_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_MISC0 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_misc0_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_misc0_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_MISC0 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_misc0_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_misc0_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_MISC0 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_misc1_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_misc1_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_MISC1 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_misc1_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_misc1_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_MISC1 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_misc1_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_misc1_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_MISC1 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_misc2_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_misc2_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_MISC2 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_misc2_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_misc2_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_MISC2 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_misc2_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_misc2_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_MISC2 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_misc3_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_misc3_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_MISC3 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_misc3_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_misc3_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_MISC3 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_misc3_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_misc3_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_MISC3 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_prid_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_prid_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_vecbase_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_vecbase_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_VECBASE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_vecbase_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_vecbase_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_VECBASE }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_vecbase_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_vecbase_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_VECBASE }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_mac16_aa_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_mac16_aa_stateArgs[] = {
- { { STATE_ACC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_mac16_ad_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 34 /* my */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_mac16_ad_stateArgs[] = {
- { { STATE_ACC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_mac16_da_args[] = {
- { { 33 /* mx */ }, 'i' },
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_mac16_da_stateArgs[] = {
- { { STATE_ACC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_mac16_dd_args[] = {
- { { 33 /* mx */ }, 'i' },
- { { 34 /* my */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_mac16_dd_stateArgs[] = {
- { { STATE_ACC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_mac16a_aa_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_mac16a_aa_stateArgs[] = {
- { { STATE_ACC }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_mac16a_ad_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 34 /* my */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_mac16a_ad_stateArgs[] = {
- { { STATE_ACC }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_mac16a_da_args[] = {
- { { 33 /* mx */ }, 'i' },
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_mac16a_da_stateArgs[] = {
- { { STATE_ACC }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_mac16a_dd_args[] = {
- { { 33 /* mx */ }, 'i' },
- { { 34 /* my */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_mac16a_dd_stateArgs[] = {
- { { STATE_ACC }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_mac16al_da_args[] = {
- { { 35 /* mw */ }, 'o' },
- { { 4 /* ars */ }, 'm' },
- { { 33 /* mx */ }, 'i' },
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_mac16al_da_stateArgs[] = {
- { { STATE_ACC }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_mac16al_dd_args[] = {
- { { 35 /* mw */ }, 'o' },
- { { 4 /* ars */ }, 'm' },
- { { 33 /* mx */ }, 'i' },
- { { 34 /* my */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_mac16al_dd_stateArgs[] = {
- { { STATE_ACC }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_mac16_l_args[] = {
- { { 35 /* mw */ }, 'o' },
- { { 4 /* ars */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_mul16_args[] = {
- { { 3 /* arr */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_m0_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 36 /* mr0 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_m0_args[] = {
- { { 6 /* art */ }, 'i' },
- { { 36 /* mr0 */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_m0_args[] = {
- { { 6 /* art */ }, 'm' },
- { { 36 /* mr0 */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_m1_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 37 /* mr1 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_m1_args[] = {
- { { 6 /* art */ }, 'i' },
- { { 37 /* mr1 */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_m1_args[] = {
- { { 6 /* art */ }, 'm' },
- { { 37 /* mr1 */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_m2_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 38 /* mr2 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_m2_args[] = {
- { { 6 /* art */ }, 'i' },
- { { 38 /* mr2 */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_m2_args[] = {
- { { 6 /* art */ }, 'm' },
- { { 38 /* mr2 */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_m3_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 39 /* mr3 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_m3_args[] = {
- { { 6 /* art */ }, 'i' },
- { { 39 /* mr3 */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_m3_args[] = {
- { { 6 /* art */ }, 'm' },
- { { 39 /* mr3 */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_acclo_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_acclo_stateArgs[] = {
- { { STATE_ACC }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_acclo_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_acclo_stateArgs[] = {
- { { STATE_ACC }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_acclo_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_acclo_stateArgs[] = {
- { { STATE_ACC }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_acchi_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_acchi_stateArgs[] = {
- { { STATE_ACC }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_acchi_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_acchi_stateArgs[] = {
- { { STATE_ACC }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_acchi_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_acchi_stateArgs[] = {
- { { STATE_ACC }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rfi_args[] = {
- { { 70 /* s */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rfi_stateArgs[] = {
- { { STATE_PSWOE }, 'o' },
- { { STATE_PSCALLINC }, 'o' },
- { { STATE_PSOWB }, 'o' },
- { { STATE_PSRING }, 'm' },
- { { STATE_PSUM }, 'o' },
- { { STATE_PSEXCM }, 'm' },
- { { STATE_PSINTLEVEL }, 'o' },
- { { STATE_EPC1 }, 'i' },
- { { STATE_EPC2 }, 'i' },
- { { STATE_EPC3 }, 'i' },
- { { STATE_EPC4 }, 'i' },
- { { STATE_EPC5 }, 'i' },
- { { STATE_EPC6 }, 'i' },
- { { STATE_EPC7 }, 'i' },
- { { STATE_EPS2 }, 'i' },
- { { STATE_EPS3 }, 'i' },
- { { STATE_EPS4 }, 'i' },
- { { STATE_EPS5 }, 'i' },
- { { STATE_EPS6 }, 'i' },
- { { STATE_EPS7 }, 'i' },
- { { STATE_InOCDMode }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wait_args[] = {
- { { 70 /* s */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wait_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_PSINTLEVEL }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_interrupt_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_interrupt_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_INTERRUPT }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_intset_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_intset_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_XTSYNC }, 'o' },
- { { STATE_INTERRUPT }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_intclear_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_intclear_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_XTSYNC }, 'o' },
- { { STATE_INTERRUPT }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_intenable_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_intenable_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_INTENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_intenable_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_intenable_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_INTENABLE }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_intenable_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_intenable_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_INTENABLE }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_break_args[] = {
- { { 41 /* imms */ }, 'i' },
- { { 40 /* immt */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_break_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSINTLEVEL }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_break_n_args[] = {
- { { 41 /* imms */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_break_n_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSINTLEVEL }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreaka0_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreaka0_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_DBREAKA0 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreaka0_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreaka0_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_DBREAKA0 }, 'o' },
- { { STATE_XTSYNC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreaka0_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreaka0_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_DBREAKA0 }, 'm' },
- { { STATE_XTSYNC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreakc0_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreakc0_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_DBREAKC0 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreakc0_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreakc0_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_DBREAKC0 }, 'o' },
- { { STATE_XTSYNC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreakc0_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreakc0_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_DBREAKC0 }, 'm' },
- { { STATE_XTSYNC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreaka1_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreaka1_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_DBREAKA1 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreaka1_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreaka1_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_DBREAKA1 }, 'o' },
- { { STATE_XTSYNC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreaka1_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreaka1_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_DBREAKA1 }, 'm' },
- { { STATE_XTSYNC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreakc1_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_dbreakc1_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_DBREAKC1 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreakc1_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_dbreakc1_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_DBREAKC1 }, 'o' },
- { { STATE_XTSYNC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreakc1_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_dbreakc1_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_DBREAKC1 }, 'm' },
- { { STATE_XTSYNC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_ibreaka0_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_ibreaka0_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_IBREAKA0 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_ibreaka0_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_ibreaka0_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_IBREAKA0 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_ibreaka0_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_ibreaka0_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_IBREAKA0 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_ibreaka1_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_ibreaka1_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_IBREAKA1 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_ibreaka1_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_ibreaka1_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_IBREAKA1 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_ibreaka1_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_ibreaka1_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_IBREAKA1 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_ibreakenable_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_ibreakenable_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_IBREAKENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_ibreakenable_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_ibreakenable_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_IBREAKENABLE }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_ibreakenable_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_ibreakenable_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_IBREAKENABLE }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_debugcause_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_debugcause_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_DEBUGCAUSE }, 'i' },
- { { STATE_DBNUM }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_debugcause_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_debugcause_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_DEBUGCAUSE }, 'o' },
- { { STATE_DBNUM }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_debugcause_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_debugcause_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_DEBUGCAUSE }, 'm' },
- { { STATE_DBNUM }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_icount_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_icount_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_ICOUNT }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_icount_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_icount_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_XTSYNC }, 'o' },
- { { STATE_ICOUNT }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_icount_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_icount_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_XTSYNC }, 'o' },
- { { STATE_ICOUNT }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_icountlevel_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_icountlevel_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_ICOUNTLEVEL }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_icountlevel_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_icountlevel_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_ICOUNTLEVEL }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_icountlevel_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_icountlevel_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_ICOUNTLEVEL }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_ddr_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_ddr_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_DDR }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_ddr_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_ddr_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_XTSYNC }, 'o' },
- { { STATE_DDR }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_ddr_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_ddr_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_XTSYNC }, 'o' },
- { { STATE_DDR }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rfdo_args[] = {
- { { 41 /* imms */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rfdo_stateArgs[] = {
- { { STATE_InOCDMode }, 'm' },
- { { STATE_EPC6 }, 'i' },
- { { STATE_PSWOE }, 'o' },
- { { STATE_PSCALLINC }, 'o' },
- { { STATE_PSOWB }, 'o' },
- { { STATE_PSRING }, 'o' },
- { { STATE_PSUM }, 'o' },
- { { STATE_PSEXCM }, 'o' },
- { { STATE_PSINTLEVEL }, 'o' },
- { { STATE_EPS6 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rfdd_stateArgs[] = {
- { { STATE_InOCDMode }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_mmid_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_mmid_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_XTSYNC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_bbool1_args[] = {
- { { 44 /* br */ }, 'o' },
- { { 43 /* bs */ }, 'i' },
- { { 42 /* bt */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_bbool4_args[] = {
- { { 42 /* bt */ }, 'o' },
- { { 49 /* bs4 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_bbool8_args[] = {
- { { 42 /* bt */ }, 'o' },
- { { 52 /* bs8 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_bbranch_args[] = {
- { { 43 /* bs */ }, 'i' },
- { { 28 /* label8 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_bmove_args[] = {
- { { 3 /* arr */ }, 'm' },
- { { 4 /* ars */ }, 'i' },
- { { 42 /* bt */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_RSR_BR_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 57 /* brall */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_WSR_BR_args[] = {
- { { 6 /* art */ }, 'i' },
- { { 57 /* brall */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_XSR_BR_args[] = {
- { { 6 /* art */ }, 'm' },
- { { 57 /* brall */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_ccount_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_ccount_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_CCOUNT }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_ccount_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_ccount_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_XTSYNC }, 'o' },
- { { STATE_CCOUNT }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_ccount_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_ccount_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_XTSYNC }, 'o' },
- { { STATE_CCOUNT }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_ccompare0_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_ccompare0_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_CCOMPARE0 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_ccompare0_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_ccompare0_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_CCOMPARE0 }, 'o' },
- { { STATE_INTERRUPT }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_ccompare0_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_ccompare0_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_CCOMPARE0 }, 'm' },
- { { STATE_INTERRUPT }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_ccompare1_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_ccompare1_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_CCOMPARE1 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_ccompare1_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_ccompare1_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_CCOMPARE1 }, 'o' },
- { { STATE_INTERRUPT }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_ccompare1_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_ccompare1_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_CCOMPARE1 }, 'm' },
- { { STATE_INTERRUPT }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_ccompare2_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_ccompare2_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_CCOMPARE2 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_ccompare2_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_ccompare2_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_CCOMPARE2 }, 'o' },
- { { STATE_INTERRUPT }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_ccompare2_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_ccompare2_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_CCOMPARE2 }, 'm' },
- { { STATE_INTERRUPT }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_icache_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 21 /* uimm8x4 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_icache_lock_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 22 /* uimm4x16 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_icache_lock_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_icache_inv_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 21 /* uimm8x4 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_icache_inv_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_licx_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 4 /* ars */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_licx_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_sicx_args[] = {
- { { 6 /* art */ }, 'i' },
- { { 4 /* ars */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_sicx_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_dcache_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 21 /* uimm8x4 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_dcache_ind_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 22 /* uimm4x16 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_dcache_ind_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_dcache_inv_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 21 /* uimm8x4 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_dcache_inv_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_dpf_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 21 /* uimm8x4 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_dcache_lock_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 22 /* uimm4x16 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_dcache_lock_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_sdct_args[] = {
- { { 6 /* art */ }, 'i' },
- { { 4 /* ars */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_sdct_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_ldct_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 4 /* ars */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_ldct_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_ptevaddr_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_ptevaddr_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_PTBASE }, 'o' },
- { { STATE_XTSYNC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_ptevaddr_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_ptevaddr_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_PTBASE }, 'i' },
- { { STATE_EXCVADDR }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_ptevaddr_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_ptevaddr_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_PTBASE }, 'm' },
- { { STATE_EXCVADDR }, 'i' },
- { { STATE_XTSYNC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_rasid_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_rasid_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_ASID3 }, 'i' },
- { { STATE_ASID2 }, 'i' },
- { { STATE_ASID1 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_rasid_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_rasid_stateArgs[] = {
- { { STATE_XTSYNC }, 'o' },
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_ASID3 }, 'o' },
- { { STATE_ASID2 }, 'o' },
- { { STATE_ASID1 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_rasid_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_rasid_stateArgs[] = {
- { { STATE_XTSYNC }, 'o' },
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_ASID3 }, 'm' },
- { { STATE_ASID2 }, 'm' },
- { { STATE_ASID1 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_itlbcfg_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_itlbcfg_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_INSTPGSZID4 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_itlbcfg_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_itlbcfg_stateArgs[] = {
- { { STATE_XTSYNC }, 'o' },
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_INSTPGSZID4 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_itlbcfg_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_itlbcfg_stateArgs[] = {
- { { STATE_XTSYNC }, 'o' },
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_INSTPGSZID4 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_dtlbcfg_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_dtlbcfg_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_DATAPGSZID4 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_dtlbcfg_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_dtlbcfg_stateArgs[] = {
- { { STATE_XTSYNC }, 'o' },
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_DATAPGSZID4 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_dtlbcfg_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_dtlbcfg_stateArgs[] = {
- { { STATE_XTSYNC }, 'o' },
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_DATAPGSZID4 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_idtlb_args[] = {
- { { 4 /* ars */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_idtlb_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_XTSYNC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rdtlb_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 4 /* ars */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rdtlb_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wdtlb_args[] = {
- { { 6 /* art */ }, 'i' },
- { { 4 /* ars */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wdtlb_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_XTSYNC }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_iitlb_args[] = {
- { { 4 /* ars */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_iitlb_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_ritlb_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 4 /* ars */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_ritlb_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_witlb_args[] = {
- { { 6 /* art */ }, 'i' },
- { { 4 /* ars */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_witlb_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_ldpte_stateArgs[] = {
- { { STATE_PTBASE }, 'i' },
- { { STATE_EXCVADDR }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_hwwitlba_stateArgs[] = {
- { { STATE_EXCVADDR }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_hwwdtlba_stateArgs[] = {
- { { STATE_EXCVADDR }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_cpenable_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_cpenable_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_CPENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_cpenable_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_cpenable_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_CPENABLE }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_cpenable_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_cpenable_stateArgs[] = {
- { { STATE_PSEXCM }, 'i' },
- { { STATE_PSRING }, 'i' },
- { { STATE_CPENABLE }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_clamp_args[] = {
- { { 3 /* arr */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 58 /* tp7 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_minmax_args[] = {
- { { 3 /* arr */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_nsa_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 4 /* ars */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_sx_args[] = {
- { { 3 /* arr */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 58 /* tp7 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_l32ai_args[] = {
- { { 6 /* art */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 21 /* uimm8x4 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_s32ri_args[] = {
- { { 6 /* art */ }, 'i' },
- { { 4 /* ars */ }, 'i' },
- { { 21 /* uimm8x4 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_s32c1i_args[] = {
- { { 6 /* art */ }, 'm' },
- { { 4 /* ars */ }, 'i' },
- { { 21 /* uimm8x4 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_s32c1i_stateArgs[] = {
- { { STATE_SCOMPARE1 }, 'i' },
- { { STATE_SCOMPARE1 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_scompare1_args[] = {
- { { 6 /* art */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_rsr_scompare1_stateArgs[] = {
- { { STATE_SCOMPARE1 }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_scompare1_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wsr_scompare1_stateArgs[] = {
- { { STATE_SCOMPARE1 }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_scompare1_args[] = {
- { { 6 /* art */ }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_xsr_scompare1_stateArgs[] = {
- { { STATE_SCOMPARE1 }, 'm' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_div_args[] = {
- { { 3 /* arr */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_mul32_args[] = {
- { { 3 /* arr */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_rur_fcr_args[] = {
- { { 3 /* arr */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_rur_fcr_stateArgs[] = {
- { { STATE_RoundMode }, 'i' },
- { { STATE_InvalidEnable }, 'i' },
- { { STATE_DivZeroEnable }, 'i' },
- { { STATE_OverflowEnable }, 'i' },
- { { STATE_UnderflowEnable }, 'i' },
- { { STATE_InexactEnable }, 'i' },
- { { STATE_FPreserved20 }, 'i' },
- { { STATE_FPreserved5 }, 'i' },
- { { STATE_CPENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_wur_fcr_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_wur_fcr_stateArgs[] = {
- { { STATE_RoundMode }, 'o' },
- { { STATE_InvalidEnable }, 'o' },
- { { STATE_DivZeroEnable }, 'o' },
- { { STATE_OverflowEnable }, 'o' },
- { { STATE_UnderflowEnable }, 'o' },
- { { STATE_InexactEnable }, 'o' },
- { { STATE_FPreserved20 }, 'o' },
- { { STATE_FPreserved5 }, 'o' },
- { { STATE_CPENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_rur_fsr_args[] = {
- { { 3 /* arr */ }, 'o' }
-};
-
-static xtensa_arg_internal Iclass_rur_fsr_stateArgs[] = {
- { { STATE_InvalidFlag }, 'i' },
- { { STATE_DivZeroFlag }, 'i' },
- { { STATE_OverflowFlag }, 'i' },
- { { STATE_UnderflowFlag }, 'i' },
- { { STATE_InexactFlag }, 'i' },
- { { STATE_FPreserved20a }, 'i' },
- { { STATE_FPreserved7 }, 'i' },
- { { STATE_CPENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_wur_fsr_args[] = {
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_wur_fsr_stateArgs[] = {
- { { STATE_InvalidFlag }, 'o' },
- { { STATE_DivZeroFlag }, 'o' },
- { { STATE_OverflowFlag }, 'o' },
- { { STATE_UnderflowFlag }, 'o' },
- { { STATE_InexactFlag }, 'o' },
- { { STATE_FPreserved20a }, 'o' },
- { { STATE_FPreserved7 }, 'o' },
- { { STATE_CPENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_args[] = {
- { { 62 /* frr */ }, 'o' },
- { { 63 /* frs */ }, 'i' },
- { { 64 /* frt */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_stateArgs[] = {
- { { STATE_RoundMode }, 'i' },
- { { STATE_CPENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_mac_args[] = {
- { { 62 /* frr */ }, 'm' },
- { { 63 /* frs */ }, 'i' },
- { { 64 /* frt */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_mac_stateArgs[] = {
- { { STATE_RoundMode }, 'i' },
- { { STATE_CPENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_cmov_args[] = {
- { { 62 /* frr */ }, 'm' },
- { { 63 /* frs */ }, 'i' },
- { { 42 /* bt */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_cmov_stateArgs[] = {
- { { STATE_CPENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_mov_args[] = {
- { { 62 /* frr */ }, 'm' },
- { { 63 /* frs */ }, 'i' },
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_mov_stateArgs[] = {
- { { STATE_CPENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_mov2_args[] = {
- { { 62 /* frr */ }, 'o' },
- { { 63 /* frs */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_mov2_stateArgs[] = {
- { { STATE_CPENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_cmp_args[] = {
- { { 44 /* br */ }, 'o' },
- { { 63 /* frs */ }, 'i' },
- { { 64 /* frt */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_cmp_stateArgs[] = {
- { { STATE_CPENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_float_args[] = {
- { { 62 /* frr */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 65 /* t */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_float_stateArgs[] = {
- { { STATE_RoundMode }, 'i' },
- { { STATE_CPENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_int_args[] = {
- { { 3 /* arr */ }, 'o' },
- { { 63 /* frs */ }, 'i' },
- { { 65 /* t */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_int_stateArgs[] = {
- { { STATE_CPENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_rfr_args[] = {
- { { 3 /* arr */ }, 'o' },
- { { 63 /* frs */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_rfr_stateArgs[] = {
- { { STATE_CPENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_wfr_args[] = {
- { { 62 /* frr */ }, 'o' },
- { { 4 /* ars */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_wfr_stateArgs[] = {
- { { STATE_CPENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_lsi_args[] = {
- { { 64 /* frt */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 61 /* cimm8x4 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_lsi_stateArgs[] = {
- { { STATE_CPENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_lsiu_args[] = {
- { { 64 /* frt */ }, 'o' },
- { { 4 /* ars */ }, 'm' },
- { { 61 /* cimm8x4 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_lsiu_stateArgs[] = {
- { { STATE_CPENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_lsx_args[] = {
- { { 62 /* frr */ }, 'o' },
- { { 4 /* ars */ }, 'i' },
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_lsx_stateArgs[] = {
- { { STATE_CPENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_lsxu_args[] = {
- { { 62 /* frr */ }, 'o' },
- { { 4 /* ars */ }, 'm' },
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_lsxu_stateArgs[] = {
- { { STATE_CPENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_ssi_args[] = {
- { { 64 /* frt */ }, 'i' },
- { { 4 /* ars */ }, 'i' },
- { { 61 /* cimm8x4 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_ssi_stateArgs[] = {
- { { STATE_CPENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_ssiu_args[] = {
- { { 64 /* frt */ }, 'i' },
- { { 4 /* ars */ }, 'm' },
- { { 61 /* cimm8x4 */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_ssiu_stateArgs[] = {
- { { STATE_CPENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_ssx_args[] = {
- { { 62 /* frr */ }, 'i' },
- { { 4 /* ars */ }, 'i' },
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_ssx_stateArgs[] = {
- { { STATE_CPENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_ssxu_args[] = {
- { { 62 /* frr */ }, 'i' },
- { { 4 /* ars */ }, 'm' },
- { { 6 /* art */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_fp_ssxu_stateArgs[] = {
- { { STATE_CPENABLE }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wb18_0_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 60 /* xt_wbr18_label */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wb18_1_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 17 /* b4const */ }, 'i' },
- { { 60 /* xt_wbr18_label */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wb18_2_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 18 /* b4constu */ }, 'i' },
- { { 60 /* xt_wbr18_label */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wb18_3_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 67 /* bbi */ }, 'i' },
- { { 60 /* xt_wbr18_label */ }, 'i' }
-};
-
-static xtensa_arg_internal Iclass_xt_iclass_wb18_4_args[] = {
- { { 4 /* ars */ }, 'i' },
- { { 6 /* art */ }, 'i' },
- { { 60 /* xt_wbr18_label */ }, 'i' }
-};
-
-static xtensa_iclass_internal iclasses[] = {
- { 0, 0 /* xt_iclass_excw */,
- 0, 0, 0, 0 },
- { 0, 0 /* xt_iclass_rfe */,
- 3, Iclass_xt_iclass_rfe_stateArgs, 0, 0 },
- { 0, 0 /* xt_iclass_rfde */,
- 3, Iclass_xt_iclass_rfde_stateArgs, 0, 0 },
- { 0, 0 /* xt_iclass_syscall */,
- 0, 0, 0, 0 },
- { 0, 0 /* xt_iclass_simcall */,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_call12_args,
- 1, Iclass_xt_iclass_call12_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_call8_args,
- 1, Iclass_xt_iclass_call8_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_call4_args,
- 1, Iclass_xt_iclass_call4_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_callx12_args,
- 1, Iclass_xt_iclass_callx12_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_callx8_args,
- 1, Iclass_xt_iclass_callx8_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_callx4_args,
- 1, Iclass_xt_iclass_callx4_stateArgs, 0, 0 },
- { 3, Iclass_xt_iclass_entry_args,
- 5, Iclass_xt_iclass_entry_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_movsp_args,
- 2, Iclass_xt_iclass_movsp_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rotw_args,
- 3, Iclass_xt_iclass_rotw_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_retw_args,
- 4, Iclass_xt_iclass_retw_stateArgs, 0, 0 },
- { 0, 0 /* xt_iclass_rfwou */,
- 6, Iclass_xt_iclass_rfwou_stateArgs, 0, 0 },
- { 3, Iclass_xt_iclass_l32e_args,
- 2, Iclass_xt_iclass_l32e_stateArgs, 0, 0 },
- { 3, Iclass_xt_iclass_s32e_args,
- 2, Iclass_xt_iclass_s32e_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_windowbase_args,
- 3, Iclass_xt_iclass_rsr_windowbase_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_windowbase_args,
- 3, Iclass_xt_iclass_wsr_windowbase_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_windowbase_args,
- 3, Iclass_xt_iclass_xsr_windowbase_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_windowstart_args,
- 3, Iclass_xt_iclass_rsr_windowstart_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_windowstart_args,
- 3, Iclass_xt_iclass_wsr_windowstart_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_windowstart_args,
- 3, Iclass_xt_iclass_xsr_windowstart_stateArgs, 0, 0 },
- { 3, Iclass_xt_iclass_add_n_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_addi_n_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_bz6_args,
- 0, 0, 0, 0 },
- { 0, 0 /* xt_iclass_ill_n */,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_loadi4_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_mov_n_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_movi_n_args,
- 0, 0, 0, 0 },
- { 0, 0 /* xt_iclass_nopn */,
- 0, 0, 0, 0 },
- { 1, Iclass_xt_iclass_retn_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_storei4_args,
- 0, 0, 0, 0 },
- { 1, Iclass_rur_threadptr_args,
- 1, Iclass_rur_threadptr_stateArgs, 0, 0 },
- { 1, Iclass_wur_threadptr_args,
- 1, Iclass_wur_threadptr_stateArgs, 0, 0 },
- { 3, Iclass_xt_iclass_addi_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_addmi_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_addsub_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_bit_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_bsi8_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_bsi8b_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_bsi8u_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_bst8_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_bsz12_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_call0_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_callx0_args,
- 0, 0, 0, 0 },
- { 4, Iclass_xt_iclass_exti_args,
- 0, 0, 0, 0 },
- { 0, 0 /* xt_iclass_ill */,
- 0, 0, 0, 0 },
- { 1, Iclass_xt_iclass_jump_args,
- 0, 0, 0, 0 },
- { 1, Iclass_xt_iclass_jumpx_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_l16ui_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_l16si_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_l32i_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_l32r_args,
- 2, Iclass_xt_iclass_l32r_stateArgs, 0, 0 },
- { 3, Iclass_xt_iclass_l8i_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_loop_args,
- 3, Iclass_xt_iclass_loop_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_loopz_args,
- 3, Iclass_xt_iclass_loopz_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_movi_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_movz_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_neg_args,
- 0, 0, 0, 0 },
- { 0, 0 /* xt_iclass_nop */,
- 0, 0, 0, 0 },
- { 1, Iclass_xt_iclass_return_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_s16i_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_s32i_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_s8i_args,
- 0, 0, 0, 0 },
- { 1, Iclass_xt_iclass_sar_args,
- 1, Iclass_xt_iclass_sar_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_sari_args,
- 1, Iclass_xt_iclass_sari_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_shifts_args,
- 1, Iclass_xt_iclass_shifts_stateArgs, 0, 0 },
- { 3, Iclass_xt_iclass_shiftst_args,
- 1, Iclass_xt_iclass_shiftst_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_shiftt_args,
- 1, Iclass_xt_iclass_shiftt_stateArgs, 0, 0 },
- { 3, Iclass_xt_iclass_slli_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_srai_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_srli_args,
- 0, 0, 0, 0 },
- { 0, 0 /* xt_iclass_memw */,
- 0, 0, 0, 0 },
- { 0, 0 /* xt_iclass_extw */,
- 0, 0, 0, 0 },
- { 0, 0 /* xt_iclass_isync */,
- 0, 0, 0, 0 },
- { 0, 0 /* xt_iclass_sync */,
- 1, Iclass_xt_iclass_sync_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_rsil_args,
- 7, Iclass_xt_iclass_rsil_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_lend_args,
- 1, Iclass_xt_iclass_rsr_lend_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_lend_args,
- 1, Iclass_xt_iclass_wsr_lend_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_lend_args,
- 1, Iclass_xt_iclass_xsr_lend_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_lcount_args,
- 1, Iclass_xt_iclass_rsr_lcount_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_lcount_args,
- 2, Iclass_xt_iclass_wsr_lcount_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_lcount_args,
- 2, Iclass_xt_iclass_xsr_lcount_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_lbeg_args,
- 1, Iclass_xt_iclass_rsr_lbeg_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_lbeg_args,
- 1, Iclass_xt_iclass_wsr_lbeg_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_lbeg_args,
- 1, Iclass_xt_iclass_xsr_lbeg_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_sar_args,
- 1, Iclass_xt_iclass_rsr_sar_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_sar_args,
- 2, Iclass_xt_iclass_wsr_sar_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_sar_args,
- 1, Iclass_xt_iclass_xsr_sar_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_litbase_args,
- 2, Iclass_xt_iclass_rsr_litbase_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_litbase_args,
- 2, Iclass_xt_iclass_wsr_litbase_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_litbase_args,
- 2, Iclass_xt_iclass_xsr_litbase_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_176_args,
- 2, Iclass_xt_iclass_rsr_176_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_208_args,
- 2, Iclass_xt_iclass_rsr_208_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_ps_args,
- 7, Iclass_xt_iclass_rsr_ps_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_ps_args,
- 7, Iclass_xt_iclass_wsr_ps_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_ps_args,
- 7, Iclass_xt_iclass_xsr_ps_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_epc1_args,
- 3, Iclass_xt_iclass_rsr_epc1_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_epc1_args,
- 3, Iclass_xt_iclass_wsr_epc1_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_epc1_args,
- 3, Iclass_xt_iclass_xsr_epc1_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_excsave1_args,
- 3, Iclass_xt_iclass_rsr_excsave1_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_excsave1_args,
- 3, Iclass_xt_iclass_wsr_excsave1_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_excsave1_args,
- 3, Iclass_xt_iclass_xsr_excsave1_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_epc2_args,
- 3, Iclass_xt_iclass_rsr_epc2_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_epc2_args,
- 3, Iclass_xt_iclass_wsr_epc2_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_epc2_args,
- 3, Iclass_xt_iclass_xsr_epc2_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_excsave2_args,
- 3, Iclass_xt_iclass_rsr_excsave2_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_excsave2_args,
- 3, Iclass_xt_iclass_wsr_excsave2_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_excsave2_args,
- 3, Iclass_xt_iclass_xsr_excsave2_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_epc3_args,
- 3, Iclass_xt_iclass_rsr_epc3_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_epc3_args,
- 3, Iclass_xt_iclass_wsr_epc3_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_epc3_args,
- 3, Iclass_xt_iclass_xsr_epc3_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_excsave3_args,
- 3, Iclass_xt_iclass_rsr_excsave3_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_excsave3_args,
- 3, Iclass_xt_iclass_wsr_excsave3_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_excsave3_args,
- 3, Iclass_xt_iclass_xsr_excsave3_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_epc4_args,
- 3, Iclass_xt_iclass_rsr_epc4_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_epc4_args,
- 3, Iclass_xt_iclass_wsr_epc4_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_epc4_args,
- 3, Iclass_xt_iclass_xsr_epc4_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_excsave4_args,
- 3, Iclass_xt_iclass_rsr_excsave4_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_excsave4_args,
- 3, Iclass_xt_iclass_wsr_excsave4_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_excsave4_args,
- 3, Iclass_xt_iclass_xsr_excsave4_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_epc5_args,
- 3, Iclass_xt_iclass_rsr_epc5_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_epc5_args,
- 3, Iclass_xt_iclass_wsr_epc5_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_epc5_args,
- 3, Iclass_xt_iclass_xsr_epc5_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_excsave5_args,
- 3, Iclass_xt_iclass_rsr_excsave5_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_excsave5_args,
- 3, Iclass_xt_iclass_wsr_excsave5_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_excsave5_args,
- 3, Iclass_xt_iclass_xsr_excsave5_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_epc6_args,
- 3, Iclass_xt_iclass_rsr_epc6_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_epc6_args,
- 3, Iclass_xt_iclass_wsr_epc6_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_epc6_args,
- 3, Iclass_xt_iclass_xsr_epc6_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_excsave6_args,
- 3, Iclass_xt_iclass_rsr_excsave6_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_excsave6_args,
- 3, Iclass_xt_iclass_wsr_excsave6_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_excsave6_args,
- 3, Iclass_xt_iclass_xsr_excsave6_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_epc7_args,
- 3, Iclass_xt_iclass_rsr_epc7_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_epc7_args,
- 3, Iclass_xt_iclass_wsr_epc7_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_epc7_args,
- 3, Iclass_xt_iclass_xsr_epc7_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_excsave7_args,
- 3, Iclass_xt_iclass_rsr_excsave7_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_excsave7_args,
- 3, Iclass_xt_iclass_wsr_excsave7_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_excsave7_args,
- 3, Iclass_xt_iclass_xsr_excsave7_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_eps2_args,
- 3, Iclass_xt_iclass_rsr_eps2_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_eps2_args,
- 3, Iclass_xt_iclass_wsr_eps2_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_eps2_args,
- 3, Iclass_xt_iclass_xsr_eps2_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_eps3_args,
- 3, Iclass_xt_iclass_rsr_eps3_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_eps3_args,
- 3, Iclass_xt_iclass_wsr_eps3_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_eps3_args,
- 3, Iclass_xt_iclass_xsr_eps3_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_eps4_args,
- 3, Iclass_xt_iclass_rsr_eps4_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_eps4_args,
- 3, Iclass_xt_iclass_wsr_eps4_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_eps4_args,
- 3, Iclass_xt_iclass_xsr_eps4_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_eps5_args,
- 3, Iclass_xt_iclass_rsr_eps5_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_eps5_args,
- 3, Iclass_xt_iclass_wsr_eps5_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_eps5_args,
- 3, Iclass_xt_iclass_xsr_eps5_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_eps6_args,
- 3, Iclass_xt_iclass_rsr_eps6_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_eps6_args,
- 3, Iclass_xt_iclass_wsr_eps6_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_eps6_args,
- 3, Iclass_xt_iclass_xsr_eps6_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_eps7_args,
- 3, Iclass_xt_iclass_rsr_eps7_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_eps7_args,
- 3, Iclass_xt_iclass_wsr_eps7_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_eps7_args,
- 3, Iclass_xt_iclass_xsr_eps7_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_excvaddr_args,
- 3, Iclass_xt_iclass_rsr_excvaddr_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_excvaddr_args,
- 3, Iclass_xt_iclass_wsr_excvaddr_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_excvaddr_args,
- 3, Iclass_xt_iclass_xsr_excvaddr_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_depc_args,
- 3, Iclass_xt_iclass_rsr_depc_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_depc_args,
- 3, Iclass_xt_iclass_wsr_depc_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_depc_args,
- 3, Iclass_xt_iclass_xsr_depc_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_exccause_args,
- 4, Iclass_xt_iclass_rsr_exccause_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_exccause_args,
- 3, Iclass_xt_iclass_wsr_exccause_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_exccause_args,
- 3, Iclass_xt_iclass_xsr_exccause_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_misc0_args,
- 3, Iclass_xt_iclass_rsr_misc0_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_misc0_args,
- 3, Iclass_xt_iclass_wsr_misc0_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_misc0_args,
- 3, Iclass_xt_iclass_xsr_misc0_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_misc1_args,
- 3, Iclass_xt_iclass_rsr_misc1_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_misc1_args,
- 3, Iclass_xt_iclass_wsr_misc1_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_misc1_args,
- 3, Iclass_xt_iclass_xsr_misc1_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_misc2_args,
- 3, Iclass_xt_iclass_rsr_misc2_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_misc2_args,
- 3, Iclass_xt_iclass_wsr_misc2_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_misc2_args,
- 3, Iclass_xt_iclass_xsr_misc2_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_misc3_args,
- 3, Iclass_xt_iclass_rsr_misc3_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_misc3_args,
- 3, Iclass_xt_iclass_wsr_misc3_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_misc3_args,
- 3, Iclass_xt_iclass_xsr_misc3_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_prid_args,
- 2, Iclass_xt_iclass_rsr_prid_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_vecbase_args,
- 3, Iclass_xt_iclass_rsr_vecbase_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_vecbase_args,
- 3, Iclass_xt_iclass_wsr_vecbase_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_vecbase_args,
- 3, Iclass_xt_iclass_xsr_vecbase_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_mac16_aa_args,
- 1, Iclass_xt_iclass_mac16_aa_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_mac16_ad_args,
- 1, Iclass_xt_iclass_mac16_ad_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_mac16_da_args,
- 1, Iclass_xt_iclass_mac16_da_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_mac16_dd_args,
- 1, Iclass_xt_iclass_mac16_dd_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_mac16a_aa_args,
- 1, Iclass_xt_iclass_mac16a_aa_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_mac16a_ad_args,
- 1, Iclass_xt_iclass_mac16a_ad_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_mac16a_da_args,
- 1, Iclass_xt_iclass_mac16a_da_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_mac16a_dd_args,
- 1, Iclass_xt_iclass_mac16a_dd_stateArgs, 0, 0 },
- { 4, Iclass_xt_iclass_mac16al_da_args,
- 1, Iclass_xt_iclass_mac16al_da_stateArgs, 0, 0 },
- { 4, Iclass_xt_iclass_mac16al_dd_args,
- 1, Iclass_xt_iclass_mac16al_dd_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_mac16_l_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_mul16_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_rsr_m0_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_wsr_m0_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_xsr_m0_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_rsr_m1_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_wsr_m1_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_xsr_m1_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_rsr_m2_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_wsr_m2_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_xsr_m2_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_rsr_m3_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_wsr_m3_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_xsr_m3_args,
- 0, 0, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_acclo_args,
- 1, Iclass_xt_iclass_rsr_acclo_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_acclo_args,
- 1, Iclass_xt_iclass_wsr_acclo_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_acclo_args,
- 1, Iclass_xt_iclass_xsr_acclo_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_acchi_args,
- 1, Iclass_xt_iclass_rsr_acchi_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_acchi_args,
- 1, Iclass_xt_iclass_wsr_acchi_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_acchi_args,
- 1, Iclass_xt_iclass_xsr_acchi_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rfi_args,
- 21, Iclass_xt_iclass_rfi_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wait_args,
- 3, Iclass_xt_iclass_wait_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_interrupt_args,
- 3, Iclass_xt_iclass_rsr_interrupt_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_intset_args,
- 4, Iclass_xt_iclass_wsr_intset_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_intclear_args,
- 4, Iclass_xt_iclass_wsr_intclear_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_intenable_args,
- 3, Iclass_xt_iclass_rsr_intenable_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_intenable_args,
- 3, Iclass_xt_iclass_wsr_intenable_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_intenable_args,
- 3, Iclass_xt_iclass_xsr_intenable_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_break_args,
- 2, Iclass_xt_iclass_break_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_break_n_args,
- 2, Iclass_xt_iclass_break_n_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_dbreaka0_args,
- 3, Iclass_xt_iclass_rsr_dbreaka0_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_dbreaka0_args,
- 4, Iclass_xt_iclass_wsr_dbreaka0_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_dbreaka0_args,
- 4, Iclass_xt_iclass_xsr_dbreaka0_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_dbreakc0_args,
- 3, Iclass_xt_iclass_rsr_dbreakc0_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_dbreakc0_args,
- 4, Iclass_xt_iclass_wsr_dbreakc0_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_dbreakc0_args,
- 4, Iclass_xt_iclass_xsr_dbreakc0_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_dbreaka1_args,
- 3, Iclass_xt_iclass_rsr_dbreaka1_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_dbreaka1_args,
- 4, Iclass_xt_iclass_wsr_dbreaka1_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_dbreaka1_args,
- 4, Iclass_xt_iclass_xsr_dbreaka1_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_dbreakc1_args,
- 3, Iclass_xt_iclass_rsr_dbreakc1_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_dbreakc1_args,
- 4, Iclass_xt_iclass_wsr_dbreakc1_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_dbreakc1_args,
- 4, Iclass_xt_iclass_xsr_dbreakc1_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_ibreaka0_args,
- 3, Iclass_xt_iclass_rsr_ibreaka0_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_ibreaka0_args,
- 3, Iclass_xt_iclass_wsr_ibreaka0_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_ibreaka0_args,
- 3, Iclass_xt_iclass_xsr_ibreaka0_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_ibreaka1_args,
- 3, Iclass_xt_iclass_rsr_ibreaka1_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_ibreaka1_args,
- 3, Iclass_xt_iclass_wsr_ibreaka1_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_ibreaka1_args,
- 3, Iclass_xt_iclass_xsr_ibreaka1_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_ibreakenable_args,
- 3, Iclass_xt_iclass_rsr_ibreakenable_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_ibreakenable_args,
- 3, Iclass_xt_iclass_wsr_ibreakenable_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_ibreakenable_args,
- 3, Iclass_xt_iclass_xsr_ibreakenable_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_debugcause_args,
- 4, Iclass_xt_iclass_rsr_debugcause_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_debugcause_args,
- 4, Iclass_xt_iclass_wsr_debugcause_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_debugcause_args,
- 4, Iclass_xt_iclass_xsr_debugcause_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_icount_args,
- 3, Iclass_xt_iclass_rsr_icount_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_icount_args,
- 4, Iclass_xt_iclass_wsr_icount_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_icount_args,
- 4, Iclass_xt_iclass_xsr_icount_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_icountlevel_args,
- 3, Iclass_xt_iclass_rsr_icountlevel_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_icountlevel_args,
- 3, Iclass_xt_iclass_wsr_icountlevel_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_icountlevel_args,
- 3, Iclass_xt_iclass_xsr_icountlevel_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_ddr_args,
- 3, Iclass_xt_iclass_rsr_ddr_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_ddr_args,
- 4, Iclass_xt_iclass_wsr_ddr_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_ddr_args,
- 4, Iclass_xt_iclass_xsr_ddr_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rfdo_args,
- 10, Iclass_xt_iclass_rfdo_stateArgs, 0, 0 },
- { 0, 0 /* xt_iclass_rfdd */,
- 1, Iclass_xt_iclass_rfdd_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_mmid_args,
- 3, Iclass_xt_iclass_wsr_mmid_stateArgs, 0, 0 },
- { 3, Iclass_xt_iclass_bbool1_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_bbool4_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_bbool8_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_bbranch_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_bmove_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_RSR_BR_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_WSR_BR_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_XSR_BR_args,
- 0, 0, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_ccount_args,
- 3, Iclass_xt_iclass_rsr_ccount_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_ccount_args,
- 4, Iclass_xt_iclass_wsr_ccount_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_ccount_args,
- 4, Iclass_xt_iclass_xsr_ccount_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_ccompare0_args,
- 3, Iclass_xt_iclass_rsr_ccompare0_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_ccompare0_args,
- 4, Iclass_xt_iclass_wsr_ccompare0_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_ccompare0_args,
- 4, Iclass_xt_iclass_xsr_ccompare0_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_ccompare1_args,
- 3, Iclass_xt_iclass_rsr_ccompare1_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_ccompare1_args,
- 4, Iclass_xt_iclass_wsr_ccompare1_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_ccompare1_args,
- 4, Iclass_xt_iclass_xsr_ccompare1_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_ccompare2_args,
- 3, Iclass_xt_iclass_rsr_ccompare2_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_ccompare2_args,
- 4, Iclass_xt_iclass_wsr_ccompare2_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_ccompare2_args,
- 4, Iclass_xt_iclass_xsr_ccompare2_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_icache_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_icache_lock_args,
- 2, Iclass_xt_iclass_icache_lock_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_icache_inv_args,
- 2, Iclass_xt_iclass_icache_inv_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_licx_args,
- 2, Iclass_xt_iclass_licx_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_sicx_args,
- 2, Iclass_xt_iclass_sicx_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_dcache_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_dcache_ind_args,
- 2, Iclass_xt_iclass_dcache_ind_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_dcache_inv_args,
- 2, Iclass_xt_iclass_dcache_inv_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_dpf_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_dcache_lock_args,
- 2, Iclass_xt_iclass_dcache_lock_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_sdct_args,
- 2, Iclass_xt_iclass_sdct_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_ldct_args,
- 2, Iclass_xt_iclass_ldct_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_ptevaddr_args,
- 4, Iclass_xt_iclass_wsr_ptevaddr_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_ptevaddr_args,
- 4, Iclass_xt_iclass_rsr_ptevaddr_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_ptevaddr_args,
- 5, Iclass_xt_iclass_xsr_ptevaddr_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_rasid_args,
- 5, Iclass_xt_iclass_rsr_rasid_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_rasid_args,
- 6, Iclass_xt_iclass_wsr_rasid_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_rasid_args,
- 6, Iclass_xt_iclass_xsr_rasid_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_itlbcfg_args,
- 3, Iclass_xt_iclass_rsr_itlbcfg_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_itlbcfg_args,
- 4, Iclass_xt_iclass_wsr_itlbcfg_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_itlbcfg_args,
- 4, Iclass_xt_iclass_xsr_itlbcfg_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_dtlbcfg_args,
- 3, Iclass_xt_iclass_rsr_dtlbcfg_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_dtlbcfg_args,
- 4, Iclass_xt_iclass_wsr_dtlbcfg_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_dtlbcfg_args,
- 4, Iclass_xt_iclass_xsr_dtlbcfg_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_idtlb_args,
- 3, Iclass_xt_iclass_idtlb_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_rdtlb_args,
- 2, Iclass_xt_iclass_rdtlb_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_wdtlb_args,
- 3, Iclass_xt_iclass_wdtlb_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_iitlb_args,
- 2, Iclass_xt_iclass_iitlb_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_ritlb_args,
- 2, Iclass_xt_iclass_ritlb_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_witlb_args,
- 2, Iclass_xt_iclass_witlb_stateArgs, 0, 0 },
- { 0, 0 /* xt_iclass_ldpte */,
- 2, Iclass_xt_iclass_ldpte_stateArgs, 0, 0 },
- { 0, 0 /* xt_iclass_hwwitlba */,
- 1, Iclass_xt_iclass_hwwitlba_stateArgs, 0, 0 },
- { 0, 0 /* xt_iclass_hwwdtlba */,
- 1, Iclass_xt_iclass_hwwdtlba_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_cpenable_args,
- 3, Iclass_xt_iclass_rsr_cpenable_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_cpenable_args,
- 3, Iclass_xt_iclass_wsr_cpenable_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_cpenable_args,
- 3, Iclass_xt_iclass_xsr_cpenable_stateArgs, 0, 0 },
- { 3, Iclass_xt_iclass_clamp_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_minmax_args,
- 0, 0, 0, 0 },
- { 2, Iclass_xt_iclass_nsa_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_sx_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_l32ai_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_s32ri_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_s32c1i_args,
- 2, Iclass_xt_iclass_s32c1i_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_rsr_scompare1_args,
- 1, Iclass_xt_iclass_rsr_scompare1_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_wsr_scompare1_args,
- 1, Iclass_xt_iclass_wsr_scompare1_stateArgs, 0, 0 },
- { 1, Iclass_xt_iclass_xsr_scompare1_args,
- 1, Iclass_xt_iclass_xsr_scompare1_stateArgs, 0, 0 },
- { 3, Iclass_xt_iclass_div_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_mul32_args,
- 0, 0, 0, 0 },
- { 1, Iclass_rur_fcr_args,
- 9, Iclass_rur_fcr_stateArgs, 0, 0 },
- { 1, Iclass_wur_fcr_args,
- 9, Iclass_wur_fcr_stateArgs, 0, 0 },
- { 1, Iclass_rur_fsr_args,
- 8, Iclass_rur_fsr_stateArgs, 0, 0 },
- { 1, Iclass_wur_fsr_args,
- 8, Iclass_wur_fsr_stateArgs, 0, 0 },
- { 3, Iclass_fp_args,
- 2, Iclass_fp_stateArgs, 0, 0 },
- { 3, Iclass_fp_mac_args,
- 2, Iclass_fp_mac_stateArgs, 0, 0 },
- { 3, Iclass_fp_cmov_args,
- 1, Iclass_fp_cmov_stateArgs, 0, 0 },
- { 3, Iclass_fp_mov_args,
- 1, Iclass_fp_mov_stateArgs, 0, 0 },
- { 2, Iclass_fp_mov2_args,
- 1, Iclass_fp_mov2_stateArgs, 0, 0 },
- { 3, Iclass_fp_cmp_args,
- 1, Iclass_fp_cmp_stateArgs, 0, 0 },
- { 3, Iclass_fp_float_args,
- 2, Iclass_fp_float_stateArgs, 0, 0 },
- { 3, Iclass_fp_int_args,
- 1, Iclass_fp_int_stateArgs, 0, 0 },
- { 2, Iclass_fp_rfr_args,
- 1, Iclass_fp_rfr_stateArgs, 0, 0 },
- { 2, Iclass_fp_wfr_args,
- 1, Iclass_fp_wfr_stateArgs, 0, 0 },
- { 3, Iclass_fp_lsi_args,
- 1, Iclass_fp_lsi_stateArgs, 0, 0 },
- { 3, Iclass_fp_lsiu_args,
- 1, Iclass_fp_lsiu_stateArgs, 0, 0 },
- { 3, Iclass_fp_lsx_args,
- 1, Iclass_fp_lsx_stateArgs, 0, 0 },
- { 3, Iclass_fp_lsxu_args,
- 1, Iclass_fp_lsxu_stateArgs, 0, 0 },
- { 3, Iclass_fp_ssi_args,
- 1, Iclass_fp_ssi_stateArgs, 0, 0 },
- { 3, Iclass_fp_ssiu_args,
- 1, Iclass_fp_ssiu_stateArgs, 0, 0 },
- { 3, Iclass_fp_ssx_args,
- 1, Iclass_fp_ssx_stateArgs, 0, 0 },
- { 3, Iclass_fp_ssxu_args,
- 1, Iclass_fp_ssxu_stateArgs, 0, 0 },
- { 2, Iclass_xt_iclass_wb18_0_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_wb18_1_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_wb18_2_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_wb18_3_args,
- 0, 0, 0, 0 },
- { 3, Iclass_xt_iclass_wb18_4_args,
- 0, 0, 0, 0 }
-};
-
-
-/* Opcode encodings. */
-
-static void
-Opcode_excw_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x2080;
-}
-
-static void
-Opcode_rfe_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3000;
-}
-
-static void
-Opcode_rfde_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3200;
-}
-
-static void
-Opcode_syscall_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x5000;
-}
-
-static void
-Opcode_simcall_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x5100;
-}
-
-static void
-Opcode_call12_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x35;
-}
-
-static void
-Opcode_call8_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x25;
-}
-
-static void
-Opcode_call4_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x15;
-}
-
-static void
-Opcode_callx12_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xf0;
-}
-
-static void
-Opcode_callx8_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xe0;
-}
-
-static void
-Opcode_callx4_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xd0;
-}
-
-static void
-Opcode_entry_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x36;
-}
-
-static void
-Opcode_movsp_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x1000;
-}
-
-static void
-Opcode_rotw_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x408000;
-}
-
-static void
-Opcode_retw_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x90;
-}
-
-static void
-Opcode_retw_n_Slot_inst16b_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xf01d;
-}
-
-static void
-Opcode_rfwo_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3400;
-}
-
-static void
-Opcode_rfwu_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3500;
-}
-
-static void
-Opcode_l32e_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x90000;
-}
-
-static void
-Opcode_s32e_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x490000;
-}
-
-static void
-Opcode_rsr_windowbase_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x34800;
-}
-
-static void
-Opcode_wsr_windowbase_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x134800;
-}
-
-static void
-Opcode_xsr_windowbase_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x614800;
-}
-
-static void
-Opcode_rsr_windowstart_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x34900;
-}
-
-static void
-Opcode_wsr_windowstart_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x134900;
-}
-
-static void
-Opcode_xsr_windowstart_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x614900;
-}
-
-static void
-Opcode_add_n_Slot_inst16a_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa;
-}
-
-static void
-Opcode_addi_n_Slot_inst16a_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xb;
-}
-
-static void
-Opcode_addi_n_Slot_xt_flix64_slot2_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3000;
-}
-
-static void
-Opcode_beqz_n_Slot_inst16b_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x8c;
-}
-
-static void
-Opcode_bnez_n_Slot_inst16b_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xcc;
-}
-
-static void
-Opcode_ill_n_Slot_inst16b_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xf06d;
-}
-
-static void
-Opcode_l32i_n_Slot_inst16a_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x8;
-}
-
-static void
-Opcode_mov_n_Slot_inst16b_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xd;
-}
-
-static void
-Opcode_mov_n_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x6000;
-}
-
-static void
-Opcode_mov_n_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa3000;
-}
-
-static void
-Opcode_mov_n_Slot_xt_flix64_slot2_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xc080;
-}
-
-static void
-Opcode_movi_n_Slot_inst16b_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xc;
-}
-
-static void
-Opcode_movi_n_Slot_xt_flix64_slot2_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xc000;
-}
-
-static void
-Opcode_nop_n_Slot_inst16b_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xf03d;
-}
-
-static void
-Opcode_ret_n_Slot_inst16b_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xf00d;
-}
-
-static void
-Opcode_s32i_n_Slot_inst16a_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x9;
-}
-
-static void
-Opcode_rur_threadptr_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xe30e70;
-}
-
-static void
-Opcode_wur_threadptr_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xf3e700;
-}
-
-static void
-Opcode_addi_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xc002;
-}
-
-static void
-Opcode_addi_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x60000;
-}
-
-static void
-Opcode_addi_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x200c00;
-}
-
-static void
-Opcode_addmi_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xd002;
-}
-
-static void
-Opcode_addmi_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x70000;
-}
-
-static void
-Opcode_addmi_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x200d00;
-}
-
-static void
-Opcode_add_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x800000;
-}
-
-static void
-Opcode_add_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x92000;
-}
-
-static void
-Opcode_add_Slot_xt_flix64_slot2_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x2000;
-}
-
-static void
-Opcode_add_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x80000;
-}
-
-static void
-Opcode_sub_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xc00000;
-}
-
-static void
-Opcode_sub_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa8000;
-}
-
-static void
-Opcode_sub_Slot_xt_flix64_slot2_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa000;
-}
-
-static void
-Opcode_sub_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xc0000;
-}
-
-static void
-Opcode_addx2_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x900000;
-}
-
-static void
-Opcode_addx2_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x94000;
-}
-
-static void
-Opcode_addx2_Slot_xt_flix64_slot2_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x4000;
-}
-
-static void
-Opcode_addx2_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x90000;
-}
-
-static void
-Opcode_addx4_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa00000;
-}
-
-static void
-Opcode_addx4_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x98000;
-}
-
-static void
-Opcode_addx4_Slot_xt_flix64_slot2_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x5000;
-}
-
-static void
-Opcode_addx4_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa0000;
-}
-
-static void
-Opcode_addx8_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xb00000;
-}
-
-static void
-Opcode_addx8_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x93000;
-}
-
-static void
-Opcode_addx8_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xb0000;
-}
-
-static void
-Opcode_subx2_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xd00000;
-}
-
-static void
-Opcode_subx2_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xd0000;
-}
-
-static void
-Opcode_subx4_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xe00000;
-}
-
-static void
-Opcode_subx4_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xe0000;
-}
-
-static void
-Opcode_subx8_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xf00000;
-}
-
-static void
-Opcode_subx8_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xf0000;
-}
-
-static void
-Opcode_and_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x100000;
-}
-
-static void
-Opcode_and_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x95000;
-}
-
-static void
-Opcode_and_Slot_xt_flix64_slot2_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x6000;
-}
-
-static void
-Opcode_and_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x10000;
-}
-
-static void
-Opcode_or_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x200000;
-}
-
-static void
-Opcode_or_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x9e000;
-}
-
-static void
-Opcode_or_Slot_xt_flix64_slot2_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x7000;
-}
-
-static void
-Opcode_or_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x20000;
-}
-
-static void
-Opcode_xor_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x300000;
-}
-
-static void
-Opcode_xor_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xb0000;
-}
-
-static void
-Opcode_xor_Slot_xt_flix64_slot2_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xb000;
-}
-
-static void
-Opcode_xor_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x30000;
-}
-
-static void
-Opcode_beqi_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x26;
-}
-
-static void
-Opcode_bnei_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x66;
-}
-
-static void
-Opcode_bgei_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xe6;
-}
-
-static void
-Opcode_blti_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa6;
-}
-
-static void
-Opcode_bbci_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x6007;
-}
-
-static void
-Opcode_bbsi_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xe007;
-}
-
-static void
-Opcode_bgeui_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xf6;
-}
-
-static void
-Opcode_bltui_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xb6;
-}
-
-static void
-Opcode_beq_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x1007;
-}
-
-static void
-Opcode_bne_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x9007;
-}
-
-static void
-Opcode_bge_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa007;
-}
-
-static void
-Opcode_blt_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x2007;
-}
-
-static void
-Opcode_bgeu_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xb007;
-}
-
-static void
-Opcode_bltu_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3007;
-}
-
-static void
-Opcode_bany_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x8007;
-}
-
-static void
-Opcode_bnone_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x7;
-}
-
-static void
-Opcode_ball_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x4007;
-}
-
-static void
-Opcode_bnall_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xc007;
-}
-
-static void
-Opcode_bbc_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x5007;
-}
-
-static void
-Opcode_bbs_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xd007;
-}
-
-static void
-Opcode_beqz_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x16;
-}
-
-static void
-Opcode_bnez_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x56;
-}
-
-static void
-Opcode_bgez_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xd6;
-}
-
-static void
-Opcode_bltz_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x96;
-}
-
-static void
-Opcode_call0_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x5;
-}
-
-static void
-Opcode_callx0_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xc0;
-}
-
-static void
-Opcode_extui_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x40000;
-}
-
-static void
-Opcode_extui_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x40000;
-}
-
-static void
-Opcode_extui_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x4000;
-}
-
-static void
-Opcode_ill_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0;
-}
-
-static void
-Opcode_j_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x6;
-}
-
-static void
-Opcode_j_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xc0000;
-}
-
-static void
-Opcode_jx_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa0;
-}
-
-static void
-Opcode_jx_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa3010;
-}
-
-static void
-Opcode_l16ui_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x1002;
-}
-
-static void
-Opcode_l16ui_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x200100;
-}
-
-static void
-Opcode_l16si_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x9002;
-}
-
-static void
-Opcode_l16si_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x200900;
-}
-
-static void
-Opcode_l32i_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x2002;
-}
-
-static void
-Opcode_l32i_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x200200;
-}
-
-static void
-Opcode_l32r_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x1;
-}
-
-static void
-Opcode_l32r_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x100000;
-}
-
-static void
-Opcode_l8ui_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x2;
-}
-
-static void
-Opcode_l8ui_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x200000;
-}
-
-static void
-Opcode_loop_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x8076;
-}
-
-static void
-Opcode_loopnez_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x9076;
-}
-
-static void
-Opcode_loopgtz_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa076;
-}
-
-static void
-Opcode_movi_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa002;
-}
-
-static void
-Opcode_movi_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x80000;
-}
-
-static void
-Opcode_movi_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x200a00;
-}
-
-static void
-Opcode_moveqz_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x830000;
-}
-
-static void
-Opcode_moveqz_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x96000;
-}
-
-static void
-Opcode_moveqz_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x83000;
-}
-
-static void
-Opcode_movnez_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x930000;
-}
-
-static void
-Opcode_movnez_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x9a000;
-}
-
-static void
-Opcode_movnez_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x93000;
-}
-
-static void
-Opcode_movltz_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa30000;
-}
-
-static void
-Opcode_movltz_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x99000;
-}
-
-static void
-Opcode_movltz_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa3000;
-}
-
-static void
-Opcode_movgez_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xb30000;
-}
-
-static void
-Opcode_movgez_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x97000;
-}
-
-static void
-Opcode_movgez_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xb3000;
-}
-
-static void
-Opcode_neg_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x600000;
-}
-
-static void
-Opcode_neg_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa5000;
-}
-
-static void
-Opcode_neg_Slot_xt_flix64_slot2_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xd100;
-}
-
-static void
-Opcode_neg_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x60000;
-}
-
-static void
-Opcode_abs_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x600100;
-}
-
-static void
-Opcode_abs_Slot_xt_flix64_slot2_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xd000;
-}
-
-static void
-Opcode_abs_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x60010;
-}
-
-static void
-Opcode_nop_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x20f0;
-}
-
-static void
-Opcode_nop_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa3040;
-}
-
-static void
-Opcode_nop_Slot_xt_flix64_slot2_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xc090;
-}
-
-static void
-Opcode_nop_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xc8000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_nop_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x20f;
-}
-
-static void
-Opcode_ret_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x80;
-}
-
-static void
-Opcode_s16i_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x5002;
-}
-
-static void
-Opcode_s16i_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x200500;
-}
-
-static void
-Opcode_s32i_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x6002;
-}
-
-static void
-Opcode_s32i_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x200600;
-}
-
-static void
-Opcode_s8i_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x4002;
-}
-
-static void
-Opcode_s8i_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x200400;
-}
-
-static void
-Opcode_ssr_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x400000;
-}
-
-static void
-Opcode_ssr_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x40000;
-}
-
-static void
-Opcode_ssl_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x401000;
-}
-
-static void
-Opcode_ssl_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa3020;
-}
-
-static void
-Opcode_ssl_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x40100;
-}
-
-static void
-Opcode_ssa8l_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x402000;
-}
-
-static void
-Opcode_ssa8l_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x40200;
-}
-
-static void
-Opcode_ssa8b_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x403000;
-}
-
-static void
-Opcode_ssa8b_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x40300;
-}
-
-static void
-Opcode_ssai_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x404000;
-}
-
-static void
-Opcode_ssai_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x40400;
-}
-
-static void
-Opcode_sll_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa10000;
-}
-
-static void
-Opcode_sll_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa6000;
-}
-
-static void
-Opcode_sll_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa1000;
-}
-
-static void
-Opcode_src_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x810000;
-}
-
-static void
-Opcode_src_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa2000;
-}
-
-static void
-Opcode_src_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x81000;
-}
-
-static void
-Opcode_srl_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x910000;
-}
-
-static void
-Opcode_srl_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa5200;
-}
-
-static void
-Opcode_srl_Slot_xt_flix64_slot2_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xd400;
-}
-
-static void
-Opcode_srl_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x91000;
-}
-
-static void
-Opcode_sra_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xb10000;
-}
-
-static void
-Opcode_sra_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa5100;
-}
-
-static void
-Opcode_sra_Slot_xt_flix64_slot2_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xd200;
-}
-
-static void
-Opcode_sra_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xb1000;
-}
-
-static void
-Opcode_slli_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x10000;
-}
-
-static void
-Opcode_slli_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x90000;
-}
-
-static void
-Opcode_slli_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x1000;
-}
-
-static void
-Opcode_srai_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x210000;
-}
-
-static void
-Opcode_srai_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa0000;
-}
-
-static void
-Opcode_srai_Slot_xt_flix64_slot2_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xe000;
-}
-
-static void
-Opcode_srai_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x21000;
-}
-
-static void
-Opcode_srli_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x410000;
-}
-
-static void
-Opcode_srli_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa4000;
-}
-
-static void
-Opcode_srli_Slot_xt_flix64_slot2_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x9000;
-}
-
-static void
-Opcode_srli_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x41000;
-}
-
-static void
-Opcode_memw_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x20c0;
-}
-
-static void
-Opcode_extw_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x20d0;
-}
-
-static void
-Opcode_isync_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x2000;
-}
-
-static void
-Opcode_rsync_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x2010;
-}
-
-static void
-Opcode_esync_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x2020;
-}
-
-static void
-Opcode_dsync_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x2030;
-}
-
-static void
-Opcode_rsil_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x6000;
-}
-
-static void
-Opcode_rsr_lend_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x30100;
-}
-
-static void
-Opcode_wsr_lend_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x130100;
-}
-
-static void
-Opcode_xsr_lend_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x610100;
-}
-
-static void
-Opcode_rsr_lcount_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x30200;
-}
-
-static void
-Opcode_wsr_lcount_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x130200;
-}
-
-static void
-Opcode_xsr_lcount_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x610200;
-}
-
-static void
-Opcode_rsr_lbeg_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x30000;
-}
-
-static void
-Opcode_wsr_lbeg_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x130000;
-}
-
-static void
-Opcode_xsr_lbeg_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x610000;
-}
-
-static void
-Opcode_rsr_sar_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x30300;
-}
-
-static void
-Opcode_wsr_sar_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x130300;
-}
-
-static void
-Opcode_xsr_sar_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x610300;
-}
-
-static void
-Opcode_rsr_litbase_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x30500;
-}
-
-static void
-Opcode_wsr_litbase_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x130500;
-}
-
-static void
-Opcode_xsr_litbase_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x610500;
-}
-
-static void
-Opcode_rsr_176_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3b000;
-}
-
-static void
-Opcode_rsr_208_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3d000;
-}
-
-static void
-Opcode_rsr_ps_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3e600;
-}
-
-static void
-Opcode_wsr_ps_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13e600;
-}
-
-static void
-Opcode_xsr_ps_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61e600;
-}
-
-static void
-Opcode_rsr_epc1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3b100;
-}
-
-static void
-Opcode_wsr_epc1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13b100;
-}
-
-static void
-Opcode_xsr_epc1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61b100;
-}
-
-static void
-Opcode_rsr_excsave1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3d100;
-}
-
-static void
-Opcode_wsr_excsave1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13d100;
-}
-
-static void
-Opcode_xsr_excsave1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61d100;
-}
-
-static void
-Opcode_rsr_epc2_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3b200;
-}
-
-static void
-Opcode_wsr_epc2_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13b200;
-}
-
-static void
-Opcode_xsr_epc2_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61b200;
-}
-
-static void
-Opcode_rsr_excsave2_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3d200;
-}
-
-static void
-Opcode_wsr_excsave2_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13d200;
-}
-
-static void
-Opcode_xsr_excsave2_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61d200;
-}
-
-static void
-Opcode_rsr_epc3_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3b300;
-}
-
-static void
-Opcode_wsr_epc3_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13b300;
-}
-
-static void
-Opcode_xsr_epc3_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61b300;
-}
-
-static void
-Opcode_rsr_excsave3_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3d300;
-}
-
-static void
-Opcode_wsr_excsave3_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13d300;
-}
-
-static void
-Opcode_xsr_excsave3_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61d300;
-}
-
-static void
-Opcode_rsr_epc4_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3b400;
-}
-
-static void
-Opcode_wsr_epc4_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13b400;
-}
-
-static void
-Opcode_xsr_epc4_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61b400;
-}
-
-static void
-Opcode_rsr_excsave4_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3d400;
-}
-
-static void
-Opcode_wsr_excsave4_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13d400;
-}
-
-static void
-Opcode_xsr_excsave4_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61d400;
-}
-
-static void
-Opcode_rsr_epc5_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3b500;
-}
-
-static void
-Opcode_wsr_epc5_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13b500;
-}
-
-static void
-Opcode_xsr_epc5_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61b500;
-}
-
-static void
-Opcode_rsr_excsave5_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3d500;
-}
-
-static void
-Opcode_wsr_excsave5_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13d500;
-}
-
-static void
-Opcode_xsr_excsave5_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61d500;
-}
-
-static void
-Opcode_rsr_epc6_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3b600;
-}
-
-static void
-Opcode_wsr_epc6_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13b600;
-}
-
-static void
-Opcode_xsr_epc6_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61b600;
-}
-
-static void
-Opcode_rsr_excsave6_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3d600;
-}
-
-static void
-Opcode_wsr_excsave6_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13d600;
-}
-
-static void
-Opcode_xsr_excsave6_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61d600;
-}
-
-static void
-Opcode_rsr_epc7_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3b700;
-}
-
-static void
-Opcode_wsr_epc7_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13b700;
-}
-
-static void
-Opcode_xsr_epc7_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61b700;
-}
-
-static void
-Opcode_rsr_excsave7_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3d700;
-}
-
-static void
-Opcode_wsr_excsave7_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13d700;
-}
-
-static void
-Opcode_xsr_excsave7_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61d700;
-}
-
-static void
-Opcode_rsr_eps2_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3c200;
-}
-
-static void
-Opcode_wsr_eps2_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13c200;
-}
-
-static void
-Opcode_xsr_eps2_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61c200;
-}
-
-static void
-Opcode_rsr_eps3_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3c300;
-}
-
-static void
-Opcode_wsr_eps3_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13c300;
-}
-
-static void
-Opcode_xsr_eps3_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61c300;
-}
-
-static void
-Opcode_rsr_eps4_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3c400;
-}
-
-static void
-Opcode_wsr_eps4_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13c400;
-}
-
-static void
-Opcode_xsr_eps4_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61c400;
-}
-
-static void
-Opcode_rsr_eps5_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3c500;
-}
-
-static void
-Opcode_wsr_eps5_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13c500;
-}
-
-static void
-Opcode_xsr_eps5_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61c500;
-}
-
-static void
-Opcode_rsr_eps6_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3c600;
-}
-
-static void
-Opcode_wsr_eps6_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13c600;
-}
-
-static void
-Opcode_xsr_eps6_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61c600;
-}
-
-static void
-Opcode_rsr_eps7_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3c700;
-}
-
-static void
-Opcode_wsr_eps7_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13c700;
-}
-
-static void
-Opcode_xsr_eps7_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61c700;
-}
-
-static void
-Opcode_rsr_excvaddr_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3ee00;
-}
-
-static void
-Opcode_wsr_excvaddr_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13ee00;
-}
-
-static void
-Opcode_xsr_excvaddr_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61ee00;
-}
-
-static void
-Opcode_rsr_depc_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3c000;
-}
-
-static void
-Opcode_wsr_depc_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13c000;
-}
-
-static void
-Opcode_xsr_depc_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61c000;
-}
-
-static void
-Opcode_rsr_exccause_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3e800;
-}
-
-static void
-Opcode_wsr_exccause_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13e800;
-}
-
-static void
-Opcode_xsr_exccause_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61e800;
-}
-
-static void
-Opcode_rsr_misc0_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3f400;
-}
-
-static void
-Opcode_wsr_misc0_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13f400;
-}
-
-static void
-Opcode_xsr_misc0_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61f400;
-}
-
-static void
-Opcode_rsr_misc1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3f500;
-}
-
-static void
-Opcode_wsr_misc1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13f500;
-}
-
-static void
-Opcode_xsr_misc1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61f500;
-}
-
-static void
-Opcode_rsr_misc2_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3f600;
-}
-
-static void
-Opcode_wsr_misc2_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13f600;
-}
-
-static void
-Opcode_xsr_misc2_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61f600;
-}
-
-static void
-Opcode_rsr_misc3_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3f700;
-}
-
-static void
-Opcode_wsr_misc3_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13f700;
-}
-
-static void
-Opcode_xsr_misc3_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61f700;
-}
-
-static void
-Opcode_rsr_prid_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3eb00;
-}
-
-static void
-Opcode_rsr_vecbase_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3e700;
-}
-
-static void
-Opcode_wsr_vecbase_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13e700;
-}
-
-static void
-Opcode_xsr_vecbase_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61e700;
-}
-
-static void
-Opcode_mul_aa_ll_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x740004;
-}
-
-static void
-Opcode_mul_aa_hl_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x750004;
-}
-
-static void
-Opcode_mul_aa_lh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x760004;
-}
-
-static void
-Opcode_mul_aa_hh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x770004;
-}
-
-static void
-Opcode_umul_aa_ll_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x700004;
-}
-
-static void
-Opcode_umul_aa_hl_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x710004;
-}
-
-static void
-Opcode_umul_aa_lh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x720004;
-}
-
-static void
-Opcode_umul_aa_hh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x730004;
-}
-
-static void
-Opcode_mul_ad_ll_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x340004;
-}
-
-static void
-Opcode_mul_ad_hl_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x350004;
-}
-
-static void
-Opcode_mul_ad_lh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x360004;
-}
-
-static void
-Opcode_mul_ad_hh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x370004;
-}
-
-static void
-Opcode_mul_da_ll_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x640004;
-}
-
-static void
-Opcode_mul_da_hl_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x650004;
-}
-
-static void
-Opcode_mul_da_lh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x660004;
-}
-
-static void
-Opcode_mul_da_hh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x670004;
-}
-
-static void
-Opcode_mul_dd_ll_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x240004;
-}
-
-static void
-Opcode_mul_dd_hl_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x250004;
-}
-
-static void
-Opcode_mul_dd_lh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x260004;
-}
-
-static void
-Opcode_mul_dd_hh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x270004;
-}
-
-static void
-Opcode_mula_aa_ll_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x780004;
-}
-
-static void
-Opcode_mula_aa_hl_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x790004;
-}
-
-static void
-Opcode_mula_aa_lh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x7a0004;
-}
-
-static void
-Opcode_mula_aa_hh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x7b0004;
-}
-
-static void
-Opcode_muls_aa_ll_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x7c0004;
-}
-
-static void
-Opcode_muls_aa_hl_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x7d0004;
-}
-
-static void
-Opcode_muls_aa_lh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x7e0004;
-}
-
-static void
-Opcode_muls_aa_hh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x7f0004;
-}
-
-static void
-Opcode_mula_ad_ll_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x380004;
-}
-
-static void
-Opcode_mula_ad_hl_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x390004;
-}
-
-static void
-Opcode_mula_ad_lh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3a0004;
-}
-
-static void
-Opcode_mula_ad_hh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3b0004;
-}
-
-static void
-Opcode_muls_ad_ll_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3c0004;
-}
-
-static void
-Opcode_muls_ad_hl_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3d0004;
-}
-
-static void
-Opcode_muls_ad_lh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3e0004;
-}
-
-static void
-Opcode_muls_ad_hh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3f0004;
-}
-
-static void
-Opcode_mula_da_ll_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x680004;
-}
-
-static void
-Opcode_mula_da_hl_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x690004;
-}
-
-static void
-Opcode_mula_da_lh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x6a0004;
-}
-
-static void
-Opcode_mula_da_hh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x6b0004;
-}
-
-static void
-Opcode_muls_da_ll_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x6c0004;
-}
-
-static void
-Opcode_muls_da_hl_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x6d0004;
-}
-
-static void
-Opcode_muls_da_lh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x6e0004;
-}
-
-static void
-Opcode_muls_da_hh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x6f0004;
-}
-
-static void
-Opcode_mula_dd_ll_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x280004;
-}
-
-static void
-Opcode_mula_dd_hl_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x290004;
-}
-
-static void
-Opcode_mula_dd_lh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x2a0004;
-}
-
-static void
-Opcode_mula_dd_hh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x2b0004;
-}
-
-static void
-Opcode_muls_dd_ll_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x2c0004;
-}
-
-static void
-Opcode_muls_dd_hl_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x2d0004;
-}
-
-static void
-Opcode_muls_dd_lh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x2e0004;
-}
-
-static void
-Opcode_muls_dd_hh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x2f0004;
-}
-
-static void
-Opcode_mula_da_ll_lddec_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x580004;
-}
-
-static void
-Opcode_mula_da_ll_ldinc_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x480004;
-}
-
-static void
-Opcode_mula_da_hl_lddec_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x590004;
-}
-
-static void
-Opcode_mula_da_hl_ldinc_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x490004;
-}
-
-static void
-Opcode_mula_da_lh_lddec_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x5a0004;
-}
-
-static void
-Opcode_mula_da_lh_ldinc_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x4a0004;
-}
-
-static void
-Opcode_mula_da_hh_lddec_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x5b0004;
-}
-
-static void
-Opcode_mula_da_hh_ldinc_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x4b0004;
-}
-
-static void
-Opcode_mula_dd_ll_lddec_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x180004;
-}
-
-static void
-Opcode_mula_dd_ll_ldinc_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x80004;
-}
-
-static void
-Opcode_mula_dd_hl_lddec_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x190004;
-}
-
-static void
-Opcode_mula_dd_hl_ldinc_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x90004;
-}
-
-static void
-Opcode_mula_dd_lh_lddec_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x1a0004;
-}
-
-static void
-Opcode_mula_dd_lh_ldinc_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa0004;
-}
-
-static void
-Opcode_mula_dd_hh_lddec_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x1b0004;
-}
-
-static void
-Opcode_mula_dd_hh_ldinc_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xb0004;
-}
-
-static void
-Opcode_lddec_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x900004;
-}
-
-static void
-Opcode_ldinc_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x800004;
-}
-
-static void
-Opcode_mul16u_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xc10000;
-}
-
-static void
-Opcode_mul16u_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x9b000;
-}
-
-static void
-Opcode_mul16u_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xc1000;
-}
-
-static void
-Opcode_mul16s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xd10000;
-}
-
-static void
-Opcode_mul16s_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x9c000;
-}
-
-static void
-Opcode_mul16s_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xd1000;
-}
-
-static void
-Opcode_rsr_m0_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x32000;
-}
-
-static void
-Opcode_wsr_m0_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x132000;
-}
-
-static void
-Opcode_xsr_m0_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x612000;
-}
-
-static void
-Opcode_rsr_m1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x32100;
-}
-
-static void
-Opcode_wsr_m1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x132100;
-}
-
-static void
-Opcode_xsr_m1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x612100;
-}
-
-static void
-Opcode_rsr_m2_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x32200;
-}
-
-static void
-Opcode_wsr_m2_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x132200;
-}
-
-static void
-Opcode_xsr_m2_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x612200;
-}
-
-static void
-Opcode_rsr_m3_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x32300;
-}
-
-static void
-Opcode_wsr_m3_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x132300;
-}
-
-static void
-Opcode_xsr_m3_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x612300;
-}
-
-static void
-Opcode_rsr_acclo_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x31000;
-}
-
-static void
-Opcode_wsr_acclo_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x131000;
-}
-
-static void
-Opcode_xsr_acclo_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x611000;
-}
-
-static void
-Opcode_rsr_acchi_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x31100;
-}
-
-static void
-Opcode_wsr_acchi_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x131100;
-}
-
-static void
-Opcode_xsr_acchi_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x611100;
-}
-
-static void
-Opcode_rfi_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3010;
-}
-
-static void
-Opcode_waiti_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x7000;
-}
-
-static void
-Opcode_rsr_interrupt_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3e200;
-}
-
-static void
-Opcode_wsr_intset_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13e200;
-}
-
-static void
-Opcode_wsr_intclear_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13e300;
-}
-
-static void
-Opcode_rsr_intenable_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3e400;
-}
-
-static void
-Opcode_wsr_intenable_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13e400;
-}
-
-static void
-Opcode_xsr_intenable_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61e400;
-}
-
-static void
-Opcode_break_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x4000;
-}
-
-static void
-Opcode_break_n_Slot_inst16b_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xf02d;
-}
-
-static void
-Opcode_rsr_dbreaka0_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x39000;
-}
-
-static void
-Opcode_wsr_dbreaka0_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x139000;
-}
-
-static void
-Opcode_xsr_dbreaka0_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x619000;
-}
-
-static void
-Opcode_rsr_dbreakc0_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3a000;
-}
-
-static void
-Opcode_wsr_dbreakc0_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13a000;
-}
-
-static void
-Opcode_xsr_dbreakc0_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61a000;
-}
-
-static void
-Opcode_rsr_dbreaka1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x39100;
-}
-
-static void
-Opcode_wsr_dbreaka1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x139100;
-}
-
-static void
-Opcode_xsr_dbreaka1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x619100;
-}
-
-static void
-Opcode_rsr_dbreakc1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3a100;
-}
-
-static void
-Opcode_wsr_dbreakc1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13a100;
-}
-
-static void
-Opcode_xsr_dbreakc1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61a100;
-}
-
-static void
-Opcode_rsr_ibreaka0_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x38000;
-}
-
-static void
-Opcode_wsr_ibreaka0_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x138000;
-}
-
-static void
-Opcode_xsr_ibreaka0_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x618000;
-}
-
-static void
-Opcode_rsr_ibreaka1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x38100;
-}
-
-static void
-Opcode_wsr_ibreaka1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x138100;
-}
-
-static void
-Opcode_xsr_ibreaka1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x618100;
-}
-
-static void
-Opcode_rsr_ibreakenable_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x36000;
-}
-
-static void
-Opcode_wsr_ibreakenable_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x136000;
-}
-
-static void
-Opcode_xsr_ibreakenable_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x616000;
-}
-
-static void
-Opcode_rsr_debugcause_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3e900;
-}
-
-static void
-Opcode_wsr_debugcause_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13e900;
-}
-
-static void
-Opcode_xsr_debugcause_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61e900;
-}
-
-static void
-Opcode_rsr_icount_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3ec00;
-}
-
-static void
-Opcode_wsr_icount_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13ec00;
-}
-
-static void
-Opcode_xsr_icount_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61ec00;
-}
-
-static void
-Opcode_rsr_icountlevel_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3ed00;
-}
-
-static void
-Opcode_wsr_icountlevel_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13ed00;
-}
-
-static void
-Opcode_xsr_icountlevel_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61ed00;
-}
-
-static void
-Opcode_rsr_ddr_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x36800;
-}
-
-static void
-Opcode_wsr_ddr_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x136800;
-}
-
-static void
-Opcode_xsr_ddr_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x616800;
-}
-
-static void
-Opcode_rfdo_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xf1e000;
-}
-
-static void
-Opcode_rfdd_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xf1e010;
-}
-
-static void
-Opcode_wsr_mmid_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x135900;
-}
-
-static void
-Opcode_andb_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x20000;
-}
-
-static void
-Opcode_andbc_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x120000;
-}
-
-static void
-Opcode_orb_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x220000;
-}
-
-static void
-Opcode_orbc_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x320000;
-}
-
-static void
-Opcode_xorb_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x420000;
-}
-
-static void
-Opcode_any4_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x8000;
-}
-
-static void
-Opcode_all4_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x9000;
-}
-
-static void
-Opcode_any8_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa000;
-}
-
-static void
-Opcode_all8_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xb000;
-}
-
-static void
-Opcode_bf_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x76;
-}
-
-static void
-Opcode_bt_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x1076;
-}
-
-static void
-Opcode_movf_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xc30000;
-}
-
-static void
-Opcode_movt_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xd30000;
-}
-
-static void
-Opcode_rsr_br_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x30400;
-}
-
-static void
-Opcode_wsr_br_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x130400;
-}
-
-static void
-Opcode_xsr_br_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x610400;
-}
-
-static void
-Opcode_rsr_ccount_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3ea00;
-}
-
-static void
-Opcode_wsr_ccount_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13ea00;
-}
-
-static void
-Opcode_xsr_ccount_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61ea00;
-}
-
-static void
-Opcode_rsr_ccompare0_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3f000;
-}
-
-static void
-Opcode_wsr_ccompare0_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13f000;
-}
-
-static void
-Opcode_xsr_ccompare0_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61f000;
-}
-
-static void
-Opcode_rsr_ccompare1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3f100;
-}
-
-static void
-Opcode_wsr_ccompare1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13f100;
-}
-
-static void
-Opcode_xsr_ccompare1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61f100;
-}
-
-static void
-Opcode_rsr_ccompare2_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3f200;
-}
-
-static void
-Opcode_wsr_ccompare2_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13f200;
-}
-
-static void
-Opcode_xsr_ccompare2_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61f200;
-}
-
-static void
-Opcode_ipf_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x70c2;
-}
-
-static void
-Opcode_ihi_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x70e2;
-}
-
-static void
-Opcode_ipfl_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x70d2;
-}
-
-static void
-Opcode_ihu_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x270d2;
-}
-
-static void
-Opcode_iiu_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x370d2;
-}
-
-static void
-Opcode_iii_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x70f2;
-}
-
-static void
-Opcode_lict_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xf10000;
-}
-
-static void
-Opcode_licw_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xf12000;
-}
-
-static void
-Opcode_sict_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xf11000;
-}
-
-static void
-Opcode_sicw_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xf13000;
-}
-
-static void
-Opcode_dhwb_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x7042;
-}
-
-static void
-Opcode_dhwbi_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x7052;
-}
-
-static void
-Opcode_diwb_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x47082;
-}
-
-static void
-Opcode_diwbi_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x57082;
-}
-
-static void
-Opcode_dhi_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x7062;
-}
-
-static void
-Opcode_dii_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x7072;
-}
-
-static void
-Opcode_dpfr_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x7002;
-}
-
-static void
-Opcode_dpfw_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x7012;
-}
-
-static void
-Opcode_dpfro_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x7022;
-}
-
-static void
-Opcode_dpfwo_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x7032;
-}
-
-static void
-Opcode_dpfl_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x7082;
-}
-
-static void
-Opcode_dhu_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x27082;
-}
-
-static void
-Opcode_diu_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x37082;
-}
-
-static void
-Opcode_sdct_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xf19000;
-}
-
-static void
-Opcode_ldct_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xf18000;
-}
-
-static void
-Opcode_wsr_ptevaddr_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x135300;
-}
-
-static void
-Opcode_rsr_ptevaddr_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x35300;
-}
-
-static void
-Opcode_xsr_ptevaddr_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x615300;
-}
-
-static void
-Opcode_rsr_rasid_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x35a00;
-}
-
-static void
-Opcode_wsr_rasid_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x135a00;
-}
-
-static void
-Opcode_xsr_rasid_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x615a00;
-}
-
-static void
-Opcode_rsr_itlbcfg_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x35b00;
-}
-
-static void
-Opcode_wsr_itlbcfg_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x135b00;
-}
-
-static void
-Opcode_xsr_itlbcfg_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x615b00;
-}
-
-static void
-Opcode_rsr_dtlbcfg_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x35c00;
-}
-
-static void
-Opcode_wsr_dtlbcfg_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x135c00;
-}
-
-static void
-Opcode_xsr_dtlbcfg_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x615c00;
-}
-
-static void
-Opcode_idtlb_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x50c000;
-}
-
-static void
-Opcode_pdtlb_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x50d000;
-}
-
-static void
-Opcode_rdtlb0_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x50b000;
-}
-
-static void
-Opcode_rdtlb1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x50f000;
-}
-
-static void
-Opcode_wdtlb_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x50e000;
-}
-
-static void
-Opcode_iitlb_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x504000;
-}
-
-static void
-Opcode_pitlb_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x505000;
-}
-
-static void
-Opcode_ritlb0_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x503000;
-}
-
-static void
-Opcode_ritlb1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x507000;
-}
-
-static void
-Opcode_witlb_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x506000;
-}
-
-static void
-Opcode_ldpte_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xf1f000;
-}
-
-static void
-Opcode_hwwitlba_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x501000;
-}
-
-static void
-Opcode_hwwdtlba_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x509000;
-}
-
-static void
-Opcode_rsr_cpenable_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3e000;
-}
-
-static void
-Opcode_wsr_cpenable_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x13e000;
-}
-
-static void
-Opcode_xsr_cpenable_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x61e000;
-}
-
-static void
-Opcode_clamps_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x330000;
-}
-
-static void
-Opcode_clamps_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x33000;
-}
-
-static void
-Opcode_min_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x430000;
-}
-
-static void
-Opcode_min_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x43000;
-}
-
-static void
-Opcode_max_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x530000;
-}
-
-static void
-Opcode_max_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x53000;
-}
-
-static void
-Opcode_minu_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x630000;
-}
-
-static void
-Opcode_minu_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x63000;
-}
-
-static void
-Opcode_maxu_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x730000;
-}
-
-static void
-Opcode_maxu_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x73000;
-}
-
-static void
-Opcode_nsa_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x40e000;
-}
-
-static void
-Opcode_nsa_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x40e00;
-}
-
-static void
-Opcode_nsau_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x40f000;
-}
-
-static void
-Opcode_nsau_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x40f00;
-}
-
-static void
-Opcode_sext_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x230000;
-}
-
-static void
-Opcode_sext_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x9f000;
-}
-
-static void
-Opcode_sext_Slot_xt_flix64_slot2_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x8000;
-}
-
-static void
-Opcode_sext_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x23000;
-}
-
-static void
-Opcode_l32ai_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xb002;
-}
-
-static void
-Opcode_s32ri_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xf002;
-}
-
-static void
-Opcode_s32c1i_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xe002;
-}
-
-static void
-Opcode_rsr_scompare1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x30c00;
-}
-
-static void
-Opcode_wsr_scompare1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x130c00;
-}
-
-static void
-Opcode_xsr_scompare1_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x610c00;
-}
-
-static void
-Opcode_quou_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xc20000;
-}
-
-static void
-Opcode_quos_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xd20000;
-}
-
-static void
-Opcode_remu_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xe20000;
-}
-
-static void
-Opcode_rems_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xf20000;
-}
-
-static void
-Opcode_mull_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x820000;
-}
-
-static void
-Opcode_mull_Slot_xt_flix64_slot1_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x9d000;
-}
-
-static void
-Opcode_mull_Slot_xt_flix64_slot0_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x82000;
-}
-
-static void
-Opcode_muluh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa20000;
-}
-
-static void
-Opcode_mulsh_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xb20000;
-}
-
-static void
-Opcode_rur_fcr_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xe30e80;
-}
-
-static void
-Opcode_wur_fcr_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xf3e800;
-}
-
-static void
-Opcode_rur_fsr_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xe30e90;
-}
-
-static void
-Opcode_wur_fsr_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xf3e900;
-}
-
-static void
-Opcode_add_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa0000;
-}
-
-static void
-Opcode_sub_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x1a0000;
-}
-
-static void
-Opcode_mul_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x2a0000;
-}
-
-static void
-Opcode_madd_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x4a0000;
-}
-
-static void
-Opcode_msub_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x5a0000;
-}
-
-static void
-Opcode_movf_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xcb0000;
-}
-
-static void
-Opcode_movt_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xdb0000;
-}
-
-static void
-Opcode_moveqz_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x8b0000;
-}
-
-static void
-Opcode_movnez_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x9b0000;
-}
-
-static void
-Opcode_movltz_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xab0000;
-}
-
-static void
-Opcode_movgez_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xbb0000;
-}
-
-static void
-Opcode_abs_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xfa0010;
-}
-
-static void
-Opcode_mov_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xfa0000;
-}
-
-static void
-Opcode_neg_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xfa0060;
-}
-
-static void
-Opcode_un_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x1b0000;
-}
-
-static void
-Opcode_oeq_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x2b0000;
-}
-
-static void
-Opcode_ueq_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3b0000;
-}
-
-static void
-Opcode_olt_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x4b0000;
-}
-
-static void
-Opcode_ult_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x5b0000;
-}
-
-static void
-Opcode_ole_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x6b0000;
-}
-
-static void
-Opcode_ule_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x7b0000;
-}
-
-static void
-Opcode_float_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xca0000;
-}
-
-static void
-Opcode_ufloat_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xda0000;
-}
-
-static void
-Opcode_round_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x8a0000;
-}
-
-static void
-Opcode_ceil_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xba0000;
-}
-
-static void
-Opcode_floor_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xaa0000;
-}
-
-static void
-Opcode_trunc_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x9a0000;
-}
-
-static void
-Opcode_utrunc_s_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xea0000;
-}
-
-static void
-Opcode_rfr_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xfa0040;
-}
-
-static void
-Opcode_wfr_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xfa0050;
-}
-
-static void
-Opcode_lsi_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x3;
-}
-
-static void
-Opcode_lsiu_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x8003;
-}
-
-static void
-Opcode_lsx_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x80000;
-}
-
-static void
-Opcode_lsxu_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x180000;
-}
-
-static void
-Opcode_ssi_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x4003;
-}
-
-static void
-Opcode_ssiu_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xc003;
-}
-
-static void
-Opcode_ssx_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x480000;
-}
-
-static void
-Opcode_ssxu_Slot_inst_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x580000;
-}
-
-static void
-Opcode_beqz_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa8000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_bnez_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xc0000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_bgez_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xb0000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_bltz_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xb8000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_beqi_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x40000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_bnei_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x98000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_bgei_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x50000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_blti_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x70000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_bgeui_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x60000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_bltui_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x80000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_bbci_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x8000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_bbsi_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x10000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_beq_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x38000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_bne_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x90000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_bge_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x48000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_blt_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x68000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_bgeu_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x58000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_bltu_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x78000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_bany_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x20000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_bnone_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0xa0000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_ball_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x18000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_bnall_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x88000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_bbc_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x28000000;
- slotbuf[1] = 0;
-}
-
-static void
-Opcode_bbs_w18_Slot_xt_flix64_slot3_encode (xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = 0x30000000;
- slotbuf[1] = 0;
-}
-
-xtensa_opcode_encode_fn Opcode_excw_encode_fns[] = {
- Opcode_excw_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rfe_encode_fns[] = {
- Opcode_rfe_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rfde_encode_fns[] = {
- Opcode_rfde_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_syscall_encode_fns[] = {
- Opcode_syscall_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_simcall_encode_fns[] = {
- Opcode_simcall_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_call12_encode_fns[] = {
- Opcode_call12_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_call8_encode_fns[] = {
- Opcode_call8_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_call4_encode_fns[] = {
- Opcode_call4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_callx12_encode_fns[] = {
- Opcode_callx12_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_callx8_encode_fns[] = {
- Opcode_callx8_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_callx4_encode_fns[] = {
- Opcode_callx4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_entry_encode_fns[] = {
- Opcode_entry_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_movsp_encode_fns[] = {
- Opcode_movsp_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rotw_encode_fns[] = {
- Opcode_rotw_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_retw_encode_fns[] = {
- Opcode_retw_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_retw_n_encode_fns[] = {
- 0, 0, Opcode_retw_n_Slot_inst16b_encode, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rfwo_encode_fns[] = {
- Opcode_rfwo_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rfwu_encode_fns[] = {
- Opcode_rfwu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_l32e_encode_fns[] = {
- Opcode_l32e_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_s32e_encode_fns[] = {
- Opcode_s32e_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_windowbase_encode_fns[] = {
- Opcode_rsr_windowbase_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_windowbase_encode_fns[] = {
- Opcode_wsr_windowbase_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_windowbase_encode_fns[] = {
- Opcode_xsr_windowbase_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_windowstart_encode_fns[] = {
- Opcode_rsr_windowstart_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_windowstart_encode_fns[] = {
- Opcode_wsr_windowstart_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_windowstart_encode_fns[] = {
- Opcode_xsr_windowstart_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_add_n_encode_fns[] = {
- 0, Opcode_add_n_Slot_inst16a_encode, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_addi_n_encode_fns[] = {
- 0, Opcode_addi_n_Slot_inst16a_encode, 0, 0, 0, 0, Opcode_addi_n_Slot_xt_flix64_slot2_encode, 0
-};
-
-xtensa_opcode_encode_fn Opcode_beqz_n_encode_fns[] = {
- 0, 0, Opcode_beqz_n_Slot_inst16b_encode, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_bnez_n_encode_fns[] = {
- 0, 0, Opcode_bnez_n_Slot_inst16b_encode, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ill_n_encode_fns[] = {
- 0, 0, Opcode_ill_n_Slot_inst16b_encode, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_l32i_n_encode_fns[] = {
- 0, Opcode_l32i_n_Slot_inst16a_encode, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mov_n_encode_fns[] = {
- 0, 0, Opcode_mov_n_Slot_inst16b_encode, Opcode_mov_n_Slot_xt_flix64_slot0_encode, Opcode_mov_n_Slot_xt_flix64_slot0_encode, Opcode_mov_n_Slot_xt_flix64_slot1_encode, Opcode_mov_n_Slot_xt_flix64_slot2_encode, 0
-};
-
-xtensa_opcode_encode_fn Opcode_movi_n_encode_fns[] = {
- 0, 0, Opcode_movi_n_Slot_inst16b_encode, 0, 0, 0, Opcode_movi_n_Slot_xt_flix64_slot2_encode, 0
-};
-
-xtensa_opcode_encode_fn Opcode_nop_n_encode_fns[] = {
- 0, 0, Opcode_nop_n_Slot_inst16b_encode, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ret_n_encode_fns[] = {
- 0, 0, Opcode_ret_n_Slot_inst16b_encode, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_s32i_n_encode_fns[] = {
- 0, Opcode_s32i_n_Slot_inst16a_encode, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rur_threadptr_encode_fns[] = {
- Opcode_rur_threadptr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wur_threadptr_encode_fns[] = {
- Opcode_wur_threadptr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_addi_encode_fns[] = {
- Opcode_addi_Slot_inst_encode, 0, 0, Opcode_addi_Slot_xt_flix64_slot0_encode, Opcode_addi_Slot_xt_flix64_slot0_encode, Opcode_addi_Slot_xt_flix64_slot1_encode, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_addmi_encode_fns[] = {
- Opcode_addmi_Slot_inst_encode, 0, 0, Opcode_addmi_Slot_xt_flix64_slot0_encode, Opcode_addmi_Slot_xt_flix64_slot0_encode, Opcode_addmi_Slot_xt_flix64_slot1_encode, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_add_encode_fns[] = {
- Opcode_add_Slot_inst_encode, 0, 0, Opcode_add_Slot_xt_flix64_slot0_encode, Opcode_add_Slot_xt_flix64_slot0_encode, Opcode_add_Slot_xt_flix64_slot1_encode, Opcode_add_Slot_xt_flix64_slot2_encode, 0
-};
-
-xtensa_opcode_encode_fn Opcode_sub_encode_fns[] = {
- Opcode_sub_Slot_inst_encode, 0, 0, Opcode_sub_Slot_xt_flix64_slot0_encode, Opcode_sub_Slot_xt_flix64_slot0_encode, Opcode_sub_Slot_xt_flix64_slot1_encode, Opcode_sub_Slot_xt_flix64_slot2_encode, 0
-};
-
-xtensa_opcode_encode_fn Opcode_addx2_encode_fns[] = {
- Opcode_addx2_Slot_inst_encode, 0, 0, Opcode_addx2_Slot_xt_flix64_slot0_encode, Opcode_addx2_Slot_xt_flix64_slot0_encode, Opcode_addx2_Slot_xt_flix64_slot1_encode, Opcode_addx2_Slot_xt_flix64_slot2_encode, 0
-};
-
-xtensa_opcode_encode_fn Opcode_addx4_encode_fns[] = {
- Opcode_addx4_Slot_inst_encode, 0, 0, Opcode_addx4_Slot_xt_flix64_slot0_encode, Opcode_addx4_Slot_xt_flix64_slot0_encode, Opcode_addx4_Slot_xt_flix64_slot1_encode, Opcode_addx4_Slot_xt_flix64_slot2_encode, 0
-};
-
-xtensa_opcode_encode_fn Opcode_addx8_encode_fns[] = {
- Opcode_addx8_Slot_inst_encode, 0, 0, Opcode_addx8_Slot_xt_flix64_slot0_encode, Opcode_addx8_Slot_xt_flix64_slot0_encode, Opcode_addx8_Slot_xt_flix64_slot1_encode, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_subx2_encode_fns[] = {
- Opcode_subx2_Slot_inst_encode, 0, 0, Opcode_subx2_Slot_xt_flix64_slot0_encode, Opcode_subx2_Slot_xt_flix64_slot0_encode, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_subx4_encode_fns[] = {
- Opcode_subx4_Slot_inst_encode, 0, 0, Opcode_subx4_Slot_xt_flix64_slot0_encode, Opcode_subx4_Slot_xt_flix64_slot0_encode, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_subx8_encode_fns[] = {
- Opcode_subx8_Slot_inst_encode, 0, 0, Opcode_subx8_Slot_xt_flix64_slot0_encode, Opcode_subx8_Slot_xt_flix64_slot0_encode, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_and_encode_fns[] = {
- Opcode_and_Slot_inst_encode, 0, 0, Opcode_and_Slot_xt_flix64_slot0_encode, Opcode_and_Slot_xt_flix64_slot0_encode, Opcode_and_Slot_xt_flix64_slot1_encode, Opcode_and_Slot_xt_flix64_slot2_encode, 0
-};
-
-xtensa_opcode_encode_fn Opcode_or_encode_fns[] = {
- Opcode_or_Slot_inst_encode, 0, 0, Opcode_or_Slot_xt_flix64_slot0_encode, Opcode_or_Slot_xt_flix64_slot0_encode, Opcode_or_Slot_xt_flix64_slot1_encode, Opcode_or_Slot_xt_flix64_slot2_encode, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xor_encode_fns[] = {
- Opcode_xor_Slot_inst_encode, 0, 0, Opcode_xor_Slot_xt_flix64_slot0_encode, Opcode_xor_Slot_xt_flix64_slot0_encode, Opcode_xor_Slot_xt_flix64_slot1_encode, Opcode_xor_Slot_xt_flix64_slot2_encode, 0
-};
-
-xtensa_opcode_encode_fn Opcode_beqi_encode_fns[] = {
- Opcode_beqi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_bnei_encode_fns[] = {
- Opcode_bnei_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_bgei_encode_fns[] = {
- Opcode_bgei_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_blti_encode_fns[] = {
- Opcode_blti_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_bbci_encode_fns[] = {
- Opcode_bbci_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_bbsi_encode_fns[] = {
- Opcode_bbsi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_bgeui_encode_fns[] = {
- Opcode_bgeui_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_bltui_encode_fns[] = {
- Opcode_bltui_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_beq_encode_fns[] = {
- Opcode_beq_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_bne_encode_fns[] = {
- Opcode_bne_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_bge_encode_fns[] = {
- Opcode_bge_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_blt_encode_fns[] = {
- Opcode_blt_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_bgeu_encode_fns[] = {
- Opcode_bgeu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_bltu_encode_fns[] = {
- Opcode_bltu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_bany_encode_fns[] = {
- Opcode_bany_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_bnone_encode_fns[] = {
- Opcode_bnone_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ball_encode_fns[] = {
- Opcode_ball_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_bnall_encode_fns[] = {
- Opcode_bnall_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_bbc_encode_fns[] = {
- Opcode_bbc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_bbs_encode_fns[] = {
- Opcode_bbs_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_beqz_encode_fns[] = {
- Opcode_beqz_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_bnez_encode_fns[] = {
- Opcode_bnez_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_bgez_encode_fns[] = {
- Opcode_bgez_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_bltz_encode_fns[] = {
- Opcode_bltz_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_call0_encode_fns[] = {
- Opcode_call0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_callx0_encode_fns[] = {
- Opcode_callx0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_extui_encode_fns[] = {
- Opcode_extui_Slot_inst_encode, 0, 0, Opcode_extui_Slot_xt_flix64_slot0_encode, Opcode_extui_Slot_xt_flix64_slot0_encode, Opcode_extui_Slot_xt_flix64_slot1_encode, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ill_encode_fns[] = {
- Opcode_ill_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_j_encode_fns[] = {
- Opcode_j_Slot_inst_encode, 0, 0, 0, 0, Opcode_j_Slot_xt_flix64_slot1_encode, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_jx_encode_fns[] = {
- Opcode_jx_Slot_inst_encode, 0, 0, 0, 0, Opcode_jx_Slot_xt_flix64_slot1_encode, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_l16ui_encode_fns[] = {
- Opcode_l16ui_Slot_inst_encode, 0, 0, Opcode_l16ui_Slot_xt_flix64_slot0_encode, Opcode_l16ui_Slot_xt_flix64_slot0_encode, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_l16si_encode_fns[] = {
- Opcode_l16si_Slot_inst_encode, 0, 0, Opcode_l16si_Slot_xt_flix64_slot0_encode, Opcode_l16si_Slot_xt_flix64_slot0_encode, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_l32i_encode_fns[] = {
- Opcode_l32i_Slot_inst_encode, 0, 0, Opcode_l32i_Slot_xt_flix64_slot0_encode, Opcode_l32i_Slot_xt_flix64_slot0_encode, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_l32r_encode_fns[] = {
- Opcode_l32r_Slot_inst_encode, 0, 0, Opcode_l32r_Slot_xt_flix64_slot0_encode, Opcode_l32r_Slot_xt_flix64_slot0_encode, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_l8ui_encode_fns[] = {
- Opcode_l8ui_Slot_inst_encode, 0, 0, Opcode_l8ui_Slot_xt_flix64_slot0_encode, Opcode_l8ui_Slot_xt_flix64_slot0_encode, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_loop_encode_fns[] = {
- Opcode_loop_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_loopnez_encode_fns[] = {
- Opcode_loopnez_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_loopgtz_encode_fns[] = {
- Opcode_loopgtz_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_movi_encode_fns[] = {
- Opcode_movi_Slot_inst_encode, 0, 0, Opcode_movi_Slot_xt_flix64_slot0_encode, Opcode_movi_Slot_xt_flix64_slot0_encode, Opcode_movi_Slot_xt_flix64_slot1_encode, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_moveqz_encode_fns[] = {
- Opcode_moveqz_Slot_inst_encode, 0, 0, Opcode_moveqz_Slot_xt_flix64_slot0_encode, Opcode_moveqz_Slot_xt_flix64_slot0_encode, Opcode_moveqz_Slot_xt_flix64_slot1_encode, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_movnez_encode_fns[] = {
- Opcode_movnez_Slot_inst_encode, 0, 0, Opcode_movnez_Slot_xt_flix64_slot0_encode, Opcode_movnez_Slot_xt_flix64_slot0_encode, Opcode_movnez_Slot_xt_flix64_slot1_encode, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_movltz_encode_fns[] = {
- Opcode_movltz_Slot_inst_encode, 0, 0, Opcode_movltz_Slot_xt_flix64_slot0_encode, Opcode_movltz_Slot_xt_flix64_slot0_encode, Opcode_movltz_Slot_xt_flix64_slot1_encode, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_movgez_encode_fns[] = {
- Opcode_movgez_Slot_inst_encode, 0, 0, Opcode_movgez_Slot_xt_flix64_slot0_encode, Opcode_movgez_Slot_xt_flix64_slot0_encode, Opcode_movgez_Slot_xt_flix64_slot1_encode, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_neg_encode_fns[] = {
- Opcode_neg_Slot_inst_encode, 0, 0, Opcode_neg_Slot_xt_flix64_slot0_encode, Opcode_neg_Slot_xt_flix64_slot0_encode, Opcode_neg_Slot_xt_flix64_slot1_encode, Opcode_neg_Slot_xt_flix64_slot2_encode, 0
-};
-
-xtensa_opcode_encode_fn Opcode_abs_encode_fns[] = {
- Opcode_abs_Slot_inst_encode, 0, 0, Opcode_abs_Slot_xt_flix64_slot0_encode, Opcode_abs_Slot_xt_flix64_slot0_encode, 0, Opcode_abs_Slot_xt_flix64_slot2_encode, 0
-};
-
-xtensa_opcode_encode_fn Opcode_nop_encode_fns[] = {
- Opcode_nop_Slot_inst_encode, 0, 0, Opcode_nop_Slot_xt_flix64_slot0_encode, Opcode_nop_Slot_xt_flix64_slot0_encode, Opcode_nop_Slot_xt_flix64_slot1_encode, Opcode_nop_Slot_xt_flix64_slot2_encode, Opcode_nop_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_ret_encode_fns[] = {
- Opcode_ret_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_s16i_encode_fns[] = {
- Opcode_s16i_Slot_inst_encode, 0, 0, Opcode_s16i_Slot_xt_flix64_slot0_encode, Opcode_s16i_Slot_xt_flix64_slot0_encode, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_s32i_encode_fns[] = {
- Opcode_s32i_Slot_inst_encode, 0, 0, Opcode_s32i_Slot_xt_flix64_slot0_encode, Opcode_s32i_Slot_xt_flix64_slot0_encode, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_s8i_encode_fns[] = {
- Opcode_s8i_Slot_inst_encode, 0, 0, Opcode_s8i_Slot_xt_flix64_slot0_encode, Opcode_s8i_Slot_xt_flix64_slot0_encode, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ssr_encode_fns[] = {
- Opcode_ssr_Slot_inst_encode, 0, 0, Opcode_ssr_Slot_xt_flix64_slot0_encode, Opcode_ssr_Slot_xt_flix64_slot0_encode, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ssl_encode_fns[] = {
- Opcode_ssl_Slot_inst_encode, 0, 0, Opcode_ssl_Slot_xt_flix64_slot0_encode, Opcode_ssl_Slot_xt_flix64_slot0_encode, Opcode_ssl_Slot_xt_flix64_slot1_encode, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ssa8l_encode_fns[] = {
- Opcode_ssa8l_Slot_inst_encode, 0, 0, Opcode_ssa8l_Slot_xt_flix64_slot0_encode, Opcode_ssa8l_Slot_xt_flix64_slot0_encode, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ssa8b_encode_fns[] = {
- Opcode_ssa8b_Slot_inst_encode, 0, 0, Opcode_ssa8b_Slot_xt_flix64_slot0_encode, Opcode_ssa8b_Slot_xt_flix64_slot0_encode, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ssai_encode_fns[] = {
- Opcode_ssai_Slot_inst_encode, 0, 0, Opcode_ssai_Slot_xt_flix64_slot0_encode, Opcode_ssai_Slot_xt_flix64_slot0_encode, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_sll_encode_fns[] = {
- Opcode_sll_Slot_inst_encode, 0, 0, Opcode_sll_Slot_xt_flix64_slot0_encode, Opcode_sll_Slot_xt_flix64_slot0_encode, Opcode_sll_Slot_xt_flix64_slot1_encode, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_src_encode_fns[] = {
- Opcode_src_Slot_inst_encode, 0, 0, Opcode_src_Slot_xt_flix64_slot0_encode, Opcode_src_Slot_xt_flix64_slot0_encode, Opcode_src_Slot_xt_flix64_slot1_encode, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_srl_encode_fns[] = {
- Opcode_srl_Slot_inst_encode, 0, 0, Opcode_srl_Slot_xt_flix64_slot0_encode, Opcode_srl_Slot_xt_flix64_slot0_encode, Opcode_srl_Slot_xt_flix64_slot1_encode, Opcode_srl_Slot_xt_flix64_slot2_encode, 0
-};
-
-xtensa_opcode_encode_fn Opcode_sra_encode_fns[] = {
- Opcode_sra_Slot_inst_encode, 0, 0, Opcode_sra_Slot_xt_flix64_slot0_encode, Opcode_sra_Slot_xt_flix64_slot0_encode, Opcode_sra_Slot_xt_flix64_slot1_encode, Opcode_sra_Slot_xt_flix64_slot2_encode, 0
-};
-
-xtensa_opcode_encode_fn Opcode_slli_encode_fns[] = {
- Opcode_slli_Slot_inst_encode, 0, 0, Opcode_slli_Slot_xt_flix64_slot0_encode, Opcode_slli_Slot_xt_flix64_slot0_encode, Opcode_slli_Slot_xt_flix64_slot1_encode, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_srai_encode_fns[] = {
- Opcode_srai_Slot_inst_encode, 0, 0, Opcode_srai_Slot_xt_flix64_slot0_encode, Opcode_srai_Slot_xt_flix64_slot0_encode, Opcode_srai_Slot_xt_flix64_slot1_encode, Opcode_srai_Slot_xt_flix64_slot2_encode, 0
-};
-
-xtensa_opcode_encode_fn Opcode_srli_encode_fns[] = {
- Opcode_srli_Slot_inst_encode, 0, 0, Opcode_srli_Slot_xt_flix64_slot0_encode, Opcode_srli_Slot_xt_flix64_slot0_encode, Opcode_srli_Slot_xt_flix64_slot1_encode, Opcode_srli_Slot_xt_flix64_slot2_encode, 0
-};
-
-xtensa_opcode_encode_fn Opcode_memw_encode_fns[] = {
- Opcode_memw_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_extw_encode_fns[] = {
- Opcode_extw_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_isync_encode_fns[] = {
- Opcode_isync_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsync_encode_fns[] = {
- Opcode_rsync_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_esync_encode_fns[] = {
- Opcode_esync_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_dsync_encode_fns[] = {
- Opcode_dsync_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsil_encode_fns[] = {
- Opcode_rsil_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_lend_encode_fns[] = {
- Opcode_rsr_lend_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_lend_encode_fns[] = {
- Opcode_wsr_lend_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_lend_encode_fns[] = {
- Opcode_xsr_lend_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_lcount_encode_fns[] = {
- Opcode_rsr_lcount_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_lcount_encode_fns[] = {
- Opcode_wsr_lcount_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_lcount_encode_fns[] = {
- Opcode_xsr_lcount_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_lbeg_encode_fns[] = {
- Opcode_rsr_lbeg_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_lbeg_encode_fns[] = {
- Opcode_wsr_lbeg_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_lbeg_encode_fns[] = {
- Opcode_xsr_lbeg_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_sar_encode_fns[] = {
- Opcode_rsr_sar_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_sar_encode_fns[] = {
- Opcode_wsr_sar_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_sar_encode_fns[] = {
- Opcode_xsr_sar_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_litbase_encode_fns[] = {
- Opcode_rsr_litbase_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_litbase_encode_fns[] = {
- Opcode_wsr_litbase_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_litbase_encode_fns[] = {
- Opcode_xsr_litbase_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_176_encode_fns[] = {
- Opcode_rsr_176_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_208_encode_fns[] = {
- Opcode_rsr_208_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_ps_encode_fns[] = {
- Opcode_rsr_ps_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_ps_encode_fns[] = {
- Opcode_wsr_ps_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_ps_encode_fns[] = {
- Opcode_xsr_ps_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_epc1_encode_fns[] = {
- Opcode_rsr_epc1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_epc1_encode_fns[] = {
- Opcode_wsr_epc1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_epc1_encode_fns[] = {
- Opcode_xsr_epc1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_excsave1_encode_fns[] = {
- Opcode_rsr_excsave1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_excsave1_encode_fns[] = {
- Opcode_wsr_excsave1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_excsave1_encode_fns[] = {
- Opcode_xsr_excsave1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_epc2_encode_fns[] = {
- Opcode_rsr_epc2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_epc2_encode_fns[] = {
- Opcode_wsr_epc2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_epc2_encode_fns[] = {
- Opcode_xsr_epc2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_excsave2_encode_fns[] = {
- Opcode_rsr_excsave2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_excsave2_encode_fns[] = {
- Opcode_wsr_excsave2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_excsave2_encode_fns[] = {
- Opcode_xsr_excsave2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_epc3_encode_fns[] = {
- Opcode_rsr_epc3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_epc3_encode_fns[] = {
- Opcode_wsr_epc3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_epc3_encode_fns[] = {
- Opcode_xsr_epc3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_excsave3_encode_fns[] = {
- Opcode_rsr_excsave3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_excsave3_encode_fns[] = {
- Opcode_wsr_excsave3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_excsave3_encode_fns[] = {
- Opcode_xsr_excsave3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_epc4_encode_fns[] = {
- Opcode_rsr_epc4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_epc4_encode_fns[] = {
- Opcode_wsr_epc4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_epc4_encode_fns[] = {
- Opcode_xsr_epc4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_excsave4_encode_fns[] = {
- Opcode_rsr_excsave4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_excsave4_encode_fns[] = {
- Opcode_wsr_excsave4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_excsave4_encode_fns[] = {
- Opcode_xsr_excsave4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_epc5_encode_fns[] = {
- Opcode_rsr_epc5_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_epc5_encode_fns[] = {
- Opcode_wsr_epc5_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_epc5_encode_fns[] = {
- Opcode_xsr_epc5_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_excsave5_encode_fns[] = {
- Opcode_rsr_excsave5_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_excsave5_encode_fns[] = {
- Opcode_wsr_excsave5_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_excsave5_encode_fns[] = {
- Opcode_xsr_excsave5_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_epc6_encode_fns[] = {
- Opcode_rsr_epc6_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_epc6_encode_fns[] = {
- Opcode_wsr_epc6_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_epc6_encode_fns[] = {
- Opcode_xsr_epc6_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_excsave6_encode_fns[] = {
- Opcode_rsr_excsave6_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_excsave6_encode_fns[] = {
- Opcode_wsr_excsave6_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_excsave6_encode_fns[] = {
- Opcode_xsr_excsave6_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_epc7_encode_fns[] = {
- Opcode_rsr_epc7_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_epc7_encode_fns[] = {
- Opcode_wsr_epc7_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_epc7_encode_fns[] = {
- Opcode_xsr_epc7_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_excsave7_encode_fns[] = {
- Opcode_rsr_excsave7_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_excsave7_encode_fns[] = {
- Opcode_wsr_excsave7_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_excsave7_encode_fns[] = {
- Opcode_xsr_excsave7_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_eps2_encode_fns[] = {
- Opcode_rsr_eps2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_eps2_encode_fns[] = {
- Opcode_wsr_eps2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_eps2_encode_fns[] = {
- Opcode_xsr_eps2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_eps3_encode_fns[] = {
- Opcode_rsr_eps3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_eps3_encode_fns[] = {
- Opcode_wsr_eps3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_eps3_encode_fns[] = {
- Opcode_xsr_eps3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_eps4_encode_fns[] = {
- Opcode_rsr_eps4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_eps4_encode_fns[] = {
- Opcode_wsr_eps4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_eps4_encode_fns[] = {
- Opcode_xsr_eps4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_eps5_encode_fns[] = {
- Opcode_rsr_eps5_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_eps5_encode_fns[] = {
- Opcode_wsr_eps5_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_eps5_encode_fns[] = {
- Opcode_xsr_eps5_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_eps6_encode_fns[] = {
- Opcode_rsr_eps6_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_eps6_encode_fns[] = {
- Opcode_wsr_eps6_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_eps6_encode_fns[] = {
- Opcode_xsr_eps6_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_eps7_encode_fns[] = {
- Opcode_rsr_eps7_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_eps7_encode_fns[] = {
- Opcode_wsr_eps7_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_eps7_encode_fns[] = {
- Opcode_xsr_eps7_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_excvaddr_encode_fns[] = {
- Opcode_rsr_excvaddr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_excvaddr_encode_fns[] = {
- Opcode_wsr_excvaddr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_excvaddr_encode_fns[] = {
- Opcode_xsr_excvaddr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_depc_encode_fns[] = {
- Opcode_rsr_depc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_depc_encode_fns[] = {
- Opcode_wsr_depc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_depc_encode_fns[] = {
- Opcode_xsr_depc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_exccause_encode_fns[] = {
- Opcode_rsr_exccause_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_exccause_encode_fns[] = {
- Opcode_wsr_exccause_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_exccause_encode_fns[] = {
- Opcode_xsr_exccause_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_misc0_encode_fns[] = {
- Opcode_rsr_misc0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_misc0_encode_fns[] = {
- Opcode_wsr_misc0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_misc0_encode_fns[] = {
- Opcode_xsr_misc0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_misc1_encode_fns[] = {
- Opcode_rsr_misc1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_misc1_encode_fns[] = {
- Opcode_wsr_misc1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_misc1_encode_fns[] = {
- Opcode_xsr_misc1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_misc2_encode_fns[] = {
- Opcode_rsr_misc2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_misc2_encode_fns[] = {
- Opcode_wsr_misc2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_misc2_encode_fns[] = {
- Opcode_xsr_misc2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_misc3_encode_fns[] = {
- Opcode_rsr_misc3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_misc3_encode_fns[] = {
- Opcode_wsr_misc3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_misc3_encode_fns[] = {
- Opcode_xsr_misc3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_prid_encode_fns[] = {
- Opcode_rsr_prid_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_vecbase_encode_fns[] = {
- Opcode_rsr_vecbase_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_vecbase_encode_fns[] = {
- Opcode_wsr_vecbase_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_vecbase_encode_fns[] = {
- Opcode_xsr_vecbase_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mul_aa_ll_encode_fns[] = {
- Opcode_mul_aa_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mul_aa_hl_encode_fns[] = {
- Opcode_mul_aa_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mul_aa_lh_encode_fns[] = {
- Opcode_mul_aa_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mul_aa_hh_encode_fns[] = {
- Opcode_mul_aa_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_umul_aa_ll_encode_fns[] = {
- Opcode_umul_aa_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_umul_aa_hl_encode_fns[] = {
- Opcode_umul_aa_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_umul_aa_lh_encode_fns[] = {
- Opcode_umul_aa_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_umul_aa_hh_encode_fns[] = {
- Opcode_umul_aa_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mul_ad_ll_encode_fns[] = {
- Opcode_mul_ad_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mul_ad_hl_encode_fns[] = {
- Opcode_mul_ad_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mul_ad_lh_encode_fns[] = {
- Opcode_mul_ad_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mul_ad_hh_encode_fns[] = {
- Opcode_mul_ad_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mul_da_ll_encode_fns[] = {
- Opcode_mul_da_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mul_da_hl_encode_fns[] = {
- Opcode_mul_da_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mul_da_lh_encode_fns[] = {
- Opcode_mul_da_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mul_da_hh_encode_fns[] = {
- Opcode_mul_da_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mul_dd_ll_encode_fns[] = {
- Opcode_mul_dd_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mul_dd_hl_encode_fns[] = {
- Opcode_mul_dd_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mul_dd_lh_encode_fns[] = {
- Opcode_mul_dd_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mul_dd_hh_encode_fns[] = {
- Opcode_mul_dd_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_aa_ll_encode_fns[] = {
- Opcode_mula_aa_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_aa_hl_encode_fns[] = {
- Opcode_mula_aa_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_aa_lh_encode_fns[] = {
- Opcode_mula_aa_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_aa_hh_encode_fns[] = {
- Opcode_mula_aa_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_muls_aa_ll_encode_fns[] = {
- Opcode_muls_aa_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_muls_aa_hl_encode_fns[] = {
- Opcode_muls_aa_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_muls_aa_lh_encode_fns[] = {
- Opcode_muls_aa_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_muls_aa_hh_encode_fns[] = {
- Opcode_muls_aa_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_ad_ll_encode_fns[] = {
- Opcode_mula_ad_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_ad_hl_encode_fns[] = {
- Opcode_mula_ad_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_ad_lh_encode_fns[] = {
- Opcode_mula_ad_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_ad_hh_encode_fns[] = {
- Opcode_mula_ad_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_muls_ad_ll_encode_fns[] = {
- Opcode_muls_ad_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_muls_ad_hl_encode_fns[] = {
- Opcode_muls_ad_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_muls_ad_lh_encode_fns[] = {
- Opcode_muls_ad_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_muls_ad_hh_encode_fns[] = {
- Opcode_muls_ad_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_da_ll_encode_fns[] = {
- Opcode_mula_da_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_da_hl_encode_fns[] = {
- Opcode_mula_da_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_da_lh_encode_fns[] = {
- Opcode_mula_da_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_da_hh_encode_fns[] = {
- Opcode_mula_da_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_muls_da_ll_encode_fns[] = {
- Opcode_muls_da_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_muls_da_hl_encode_fns[] = {
- Opcode_muls_da_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_muls_da_lh_encode_fns[] = {
- Opcode_muls_da_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_muls_da_hh_encode_fns[] = {
- Opcode_muls_da_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_dd_ll_encode_fns[] = {
- Opcode_mula_dd_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_dd_hl_encode_fns[] = {
- Opcode_mula_dd_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_dd_lh_encode_fns[] = {
- Opcode_mula_dd_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_dd_hh_encode_fns[] = {
- Opcode_mula_dd_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_muls_dd_ll_encode_fns[] = {
- Opcode_muls_dd_ll_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_muls_dd_hl_encode_fns[] = {
- Opcode_muls_dd_hl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_muls_dd_lh_encode_fns[] = {
- Opcode_muls_dd_lh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_muls_dd_hh_encode_fns[] = {
- Opcode_muls_dd_hh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_da_ll_lddec_encode_fns[] = {
- Opcode_mula_da_ll_lddec_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_da_ll_ldinc_encode_fns[] = {
- Opcode_mula_da_ll_ldinc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_da_hl_lddec_encode_fns[] = {
- Opcode_mula_da_hl_lddec_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_da_hl_ldinc_encode_fns[] = {
- Opcode_mula_da_hl_ldinc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_da_lh_lddec_encode_fns[] = {
- Opcode_mula_da_lh_lddec_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_da_lh_ldinc_encode_fns[] = {
- Opcode_mula_da_lh_ldinc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_da_hh_lddec_encode_fns[] = {
- Opcode_mula_da_hh_lddec_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_da_hh_ldinc_encode_fns[] = {
- Opcode_mula_da_hh_ldinc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_dd_ll_lddec_encode_fns[] = {
- Opcode_mula_dd_ll_lddec_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_dd_ll_ldinc_encode_fns[] = {
- Opcode_mula_dd_ll_ldinc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_dd_hl_lddec_encode_fns[] = {
- Opcode_mula_dd_hl_lddec_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_dd_hl_ldinc_encode_fns[] = {
- Opcode_mula_dd_hl_ldinc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_dd_lh_lddec_encode_fns[] = {
- Opcode_mula_dd_lh_lddec_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_dd_lh_ldinc_encode_fns[] = {
- Opcode_mula_dd_lh_ldinc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_dd_hh_lddec_encode_fns[] = {
- Opcode_mula_dd_hh_lddec_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mula_dd_hh_ldinc_encode_fns[] = {
- Opcode_mula_dd_hh_ldinc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_lddec_encode_fns[] = {
- Opcode_lddec_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ldinc_encode_fns[] = {
- Opcode_ldinc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mul16u_encode_fns[] = {
- Opcode_mul16u_Slot_inst_encode, 0, 0, Opcode_mul16u_Slot_xt_flix64_slot0_encode, Opcode_mul16u_Slot_xt_flix64_slot0_encode, Opcode_mul16u_Slot_xt_flix64_slot1_encode, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mul16s_encode_fns[] = {
- Opcode_mul16s_Slot_inst_encode, 0, 0, Opcode_mul16s_Slot_xt_flix64_slot0_encode, Opcode_mul16s_Slot_xt_flix64_slot0_encode, Opcode_mul16s_Slot_xt_flix64_slot1_encode, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_m0_encode_fns[] = {
- Opcode_rsr_m0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_m0_encode_fns[] = {
- Opcode_wsr_m0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_m0_encode_fns[] = {
- Opcode_xsr_m0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_m1_encode_fns[] = {
- Opcode_rsr_m1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_m1_encode_fns[] = {
- Opcode_wsr_m1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_m1_encode_fns[] = {
- Opcode_xsr_m1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_m2_encode_fns[] = {
- Opcode_rsr_m2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_m2_encode_fns[] = {
- Opcode_wsr_m2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_m2_encode_fns[] = {
- Opcode_xsr_m2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_m3_encode_fns[] = {
- Opcode_rsr_m3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_m3_encode_fns[] = {
- Opcode_wsr_m3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_m3_encode_fns[] = {
- Opcode_xsr_m3_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_acclo_encode_fns[] = {
- Opcode_rsr_acclo_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_acclo_encode_fns[] = {
- Opcode_wsr_acclo_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_acclo_encode_fns[] = {
- Opcode_xsr_acclo_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_acchi_encode_fns[] = {
- Opcode_rsr_acchi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_acchi_encode_fns[] = {
- Opcode_wsr_acchi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_acchi_encode_fns[] = {
- Opcode_xsr_acchi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rfi_encode_fns[] = {
- Opcode_rfi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_waiti_encode_fns[] = {
- Opcode_waiti_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_interrupt_encode_fns[] = {
- Opcode_rsr_interrupt_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_intset_encode_fns[] = {
- Opcode_wsr_intset_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_intclear_encode_fns[] = {
- Opcode_wsr_intclear_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_intenable_encode_fns[] = {
- Opcode_rsr_intenable_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_intenable_encode_fns[] = {
- Opcode_wsr_intenable_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_intenable_encode_fns[] = {
- Opcode_xsr_intenable_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_break_encode_fns[] = {
- Opcode_break_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_break_n_encode_fns[] = {
- 0, 0, Opcode_break_n_Slot_inst16b_encode, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_dbreaka0_encode_fns[] = {
- Opcode_rsr_dbreaka0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_dbreaka0_encode_fns[] = {
- Opcode_wsr_dbreaka0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_dbreaka0_encode_fns[] = {
- Opcode_xsr_dbreaka0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_dbreakc0_encode_fns[] = {
- Opcode_rsr_dbreakc0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_dbreakc0_encode_fns[] = {
- Opcode_wsr_dbreakc0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_dbreakc0_encode_fns[] = {
- Opcode_xsr_dbreakc0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_dbreaka1_encode_fns[] = {
- Opcode_rsr_dbreaka1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_dbreaka1_encode_fns[] = {
- Opcode_wsr_dbreaka1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_dbreaka1_encode_fns[] = {
- Opcode_xsr_dbreaka1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_dbreakc1_encode_fns[] = {
- Opcode_rsr_dbreakc1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_dbreakc1_encode_fns[] = {
- Opcode_wsr_dbreakc1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_dbreakc1_encode_fns[] = {
- Opcode_xsr_dbreakc1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_ibreaka0_encode_fns[] = {
- Opcode_rsr_ibreaka0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_ibreaka0_encode_fns[] = {
- Opcode_wsr_ibreaka0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_ibreaka0_encode_fns[] = {
- Opcode_xsr_ibreaka0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_ibreaka1_encode_fns[] = {
- Opcode_rsr_ibreaka1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_ibreaka1_encode_fns[] = {
- Opcode_wsr_ibreaka1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_ibreaka1_encode_fns[] = {
- Opcode_xsr_ibreaka1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_ibreakenable_encode_fns[] = {
- Opcode_rsr_ibreakenable_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_ibreakenable_encode_fns[] = {
- Opcode_wsr_ibreakenable_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_ibreakenable_encode_fns[] = {
- Opcode_xsr_ibreakenable_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_debugcause_encode_fns[] = {
- Opcode_rsr_debugcause_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_debugcause_encode_fns[] = {
- Opcode_wsr_debugcause_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_debugcause_encode_fns[] = {
- Opcode_xsr_debugcause_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_icount_encode_fns[] = {
- Opcode_rsr_icount_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_icount_encode_fns[] = {
- Opcode_wsr_icount_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_icount_encode_fns[] = {
- Opcode_xsr_icount_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_icountlevel_encode_fns[] = {
- Opcode_rsr_icountlevel_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_icountlevel_encode_fns[] = {
- Opcode_wsr_icountlevel_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_icountlevel_encode_fns[] = {
- Opcode_xsr_icountlevel_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_ddr_encode_fns[] = {
- Opcode_rsr_ddr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_ddr_encode_fns[] = {
- Opcode_wsr_ddr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_ddr_encode_fns[] = {
- Opcode_xsr_ddr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rfdo_encode_fns[] = {
- Opcode_rfdo_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rfdd_encode_fns[] = {
- Opcode_rfdd_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_mmid_encode_fns[] = {
- Opcode_wsr_mmid_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_andb_encode_fns[] = {
- Opcode_andb_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_andbc_encode_fns[] = {
- Opcode_andbc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_orb_encode_fns[] = {
- Opcode_orb_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_orbc_encode_fns[] = {
- Opcode_orbc_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xorb_encode_fns[] = {
- Opcode_xorb_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_any4_encode_fns[] = {
- Opcode_any4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_all4_encode_fns[] = {
- Opcode_all4_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_any8_encode_fns[] = {
- Opcode_any8_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_all8_encode_fns[] = {
- Opcode_all8_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_bf_encode_fns[] = {
- Opcode_bf_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_bt_encode_fns[] = {
- Opcode_bt_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_movf_encode_fns[] = {
- Opcode_movf_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_movt_encode_fns[] = {
- Opcode_movt_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_br_encode_fns[] = {
- Opcode_rsr_br_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_br_encode_fns[] = {
- Opcode_wsr_br_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_br_encode_fns[] = {
- Opcode_xsr_br_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_ccount_encode_fns[] = {
- Opcode_rsr_ccount_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_ccount_encode_fns[] = {
- Opcode_wsr_ccount_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_ccount_encode_fns[] = {
- Opcode_xsr_ccount_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_ccompare0_encode_fns[] = {
- Opcode_rsr_ccompare0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_ccompare0_encode_fns[] = {
- Opcode_wsr_ccompare0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_ccompare0_encode_fns[] = {
- Opcode_xsr_ccompare0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_ccompare1_encode_fns[] = {
- Opcode_rsr_ccompare1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_ccompare1_encode_fns[] = {
- Opcode_wsr_ccompare1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_ccompare1_encode_fns[] = {
- Opcode_xsr_ccompare1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_ccompare2_encode_fns[] = {
- Opcode_rsr_ccompare2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_ccompare2_encode_fns[] = {
- Opcode_wsr_ccompare2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_ccompare2_encode_fns[] = {
- Opcode_xsr_ccompare2_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ipf_encode_fns[] = {
- Opcode_ipf_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ihi_encode_fns[] = {
- Opcode_ihi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ipfl_encode_fns[] = {
- Opcode_ipfl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ihu_encode_fns[] = {
- Opcode_ihu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_iiu_encode_fns[] = {
- Opcode_iiu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_iii_encode_fns[] = {
- Opcode_iii_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_lict_encode_fns[] = {
- Opcode_lict_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_licw_encode_fns[] = {
- Opcode_licw_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_sict_encode_fns[] = {
- Opcode_sict_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_sicw_encode_fns[] = {
- Opcode_sicw_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_dhwb_encode_fns[] = {
- Opcode_dhwb_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_dhwbi_encode_fns[] = {
- Opcode_dhwbi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_diwb_encode_fns[] = {
- Opcode_diwb_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_diwbi_encode_fns[] = {
- Opcode_diwbi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_dhi_encode_fns[] = {
- Opcode_dhi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_dii_encode_fns[] = {
- Opcode_dii_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_dpfr_encode_fns[] = {
- Opcode_dpfr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_dpfw_encode_fns[] = {
- Opcode_dpfw_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_dpfro_encode_fns[] = {
- Opcode_dpfro_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_dpfwo_encode_fns[] = {
- Opcode_dpfwo_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_dpfl_encode_fns[] = {
- Opcode_dpfl_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_dhu_encode_fns[] = {
- Opcode_dhu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_diu_encode_fns[] = {
- Opcode_diu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_sdct_encode_fns[] = {
- Opcode_sdct_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ldct_encode_fns[] = {
- Opcode_ldct_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_ptevaddr_encode_fns[] = {
- Opcode_wsr_ptevaddr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_ptevaddr_encode_fns[] = {
- Opcode_rsr_ptevaddr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_ptevaddr_encode_fns[] = {
- Opcode_xsr_ptevaddr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_rasid_encode_fns[] = {
- Opcode_rsr_rasid_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_rasid_encode_fns[] = {
- Opcode_wsr_rasid_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_rasid_encode_fns[] = {
- Opcode_xsr_rasid_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_itlbcfg_encode_fns[] = {
- Opcode_rsr_itlbcfg_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_itlbcfg_encode_fns[] = {
- Opcode_wsr_itlbcfg_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_itlbcfg_encode_fns[] = {
- Opcode_xsr_itlbcfg_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_dtlbcfg_encode_fns[] = {
- Opcode_rsr_dtlbcfg_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_dtlbcfg_encode_fns[] = {
- Opcode_wsr_dtlbcfg_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_dtlbcfg_encode_fns[] = {
- Opcode_xsr_dtlbcfg_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_idtlb_encode_fns[] = {
- Opcode_idtlb_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_pdtlb_encode_fns[] = {
- Opcode_pdtlb_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rdtlb0_encode_fns[] = {
- Opcode_rdtlb0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rdtlb1_encode_fns[] = {
- Opcode_rdtlb1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wdtlb_encode_fns[] = {
- Opcode_wdtlb_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_iitlb_encode_fns[] = {
- Opcode_iitlb_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_pitlb_encode_fns[] = {
- Opcode_pitlb_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ritlb0_encode_fns[] = {
- Opcode_ritlb0_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ritlb1_encode_fns[] = {
- Opcode_ritlb1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_witlb_encode_fns[] = {
- Opcode_witlb_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ldpte_encode_fns[] = {
- Opcode_ldpte_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_hwwitlba_encode_fns[] = {
- Opcode_hwwitlba_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_hwwdtlba_encode_fns[] = {
- Opcode_hwwdtlba_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_cpenable_encode_fns[] = {
- Opcode_rsr_cpenable_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_cpenable_encode_fns[] = {
- Opcode_wsr_cpenable_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_cpenable_encode_fns[] = {
- Opcode_xsr_cpenable_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_clamps_encode_fns[] = {
- Opcode_clamps_Slot_inst_encode, 0, 0, Opcode_clamps_Slot_xt_flix64_slot0_encode, Opcode_clamps_Slot_xt_flix64_slot0_encode, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_min_encode_fns[] = {
- Opcode_min_Slot_inst_encode, 0, 0, Opcode_min_Slot_xt_flix64_slot0_encode, Opcode_min_Slot_xt_flix64_slot0_encode, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_max_encode_fns[] = {
- Opcode_max_Slot_inst_encode, 0, 0, Opcode_max_Slot_xt_flix64_slot0_encode, Opcode_max_Slot_xt_flix64_slot0_encode, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_minu_encode_fns[] = {
- Opcode_minu_Slot_inst_encode, 0, 0, Opcode_minu_Slot_xt_flix64_slot0_encode, Opcode_minu_Slot_xt_flix64_slot0_encode, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_maxu_encode_fns[] = {
- Opcode_maxu_Slot_inst_encode, 0, 0, Opcode_maxu_Slot_xt_flix64_slot0_encode, Opcode_maxu_Slot_xt_flix64_slot0_encode, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_nsa_encode_fns[] = {
- Opcode_nsa_Slot_inst_encode, 0, 0, Opcode_nsa_Slot_xt_flix64_slot0_encode, Opcode_nsa_Slot_xt_flix64_slot0_encode, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_nsau_encode_fns[] = {
- Opcode_nsau_Slot_inst_encode, 0, 0, Opcode_nsau_Slot_xt_flix64_slot0_encode, Opcode_nsau_Slot_xt_flix64_slot0_encode, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_sext_encode_fns[] = {
- Opcode_sext_Slot_inst_encode, 0, 0, Opcode_sext_Slot_xt_flix64_slot0_encode, Opcode_sext_Slot_xt_flix64_slot0_encode, Opcode_sext_Slot_xt_flix64_slot1_encode, Opcode_sext_Slot_xt_flix64_slot2_encode, 0
-};
-
-xtensa_opcode_encode_fn Opcode_l32ai_encode_fns[] = {
- Opcode_l32ai_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_s32ri_encode_fns[] = {
- Opcode_s32ri_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_s32c1i_encode_fns[] = {
- Opcode_s32c1i_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rsr_scompare1_encode_fns[] = {
- Opcode_rsr_scompare1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wsr_scompare1_encode_fns[] = {
- Opcode_wsr_scompare1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_xsr_scompare1_encode_fns[] = {
- Opcode_xsr_scompare1_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_quou_encode_fns[] = {
- Opcode_quou_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_quos_encode_fns[] = {
- Opcode_quos_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_remu_encode_fns[] = {
- Opcode_remu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rems_encode_fns[] = {
- Opcode_rems_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mull_encode_fns[] = {
- Opcode_mull_Slot_inst_encode, 0, 0, Opcode_mull_Slot_xt_flix64_slot0_encode, Opcode_mull_Slot_xt_flix64_slot0_encode, Opcode_mull_Slot_xt_flix64_slot1_encode, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_muluh_encode_fns[] = {
- Opcode_muluh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mulsh_encode_fns[] = {
- Opcode_mulsh_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rur_fcr_encode_fns[] = {
- Opcode_rur_fcr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wur_fcr_encode_fns[] = {
- Opcode_wur_fcr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rur_fsr_encode_fns[] = {
- Opcode_rur_fsr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wur_fsr_encode_fns[] = {
- Opcode_wur_fsr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_add_s_encode_fns[] = {
- Opcode_add_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_sub_s_encode_fns[] = {
- Opcode_sub_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mul_s_encode_fns[] = {
- Opcode_mul_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_madd_s_encode_fns[] = {
- Opcode_madd_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_msub_s_encode_fns[] = {
- Opcode_msub_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_movf_s_encode_fns[] = {
- Opcode_movf_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_movt_s_encode_fns[] = {
- Opcode_movt_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_moveqz_s_encode_fns[] = {
- Opcode_moveqz_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_movnez_s_encode_fns[] = {
- Opcode_movnez_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_movltz_s_encode_fns[] = {
- Opcode_movltz_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_movgez_s_encode_fns[] = {
- Opcode_movgez_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_abs_s_encode_fns[] = {
- Opcode_abs_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_mov_s_encode_fns[] = {
- Opcode_mov_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_neg_s_encode_fns[] = {
- Opcode_neg_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_un_s_encode_fns[] = {
- Opcode_un_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_oeq_s_encode_fns[] = {
- Opcode_oeq_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ueq_s_encode_fns[] = {
- Opcode_ueq_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_olt_s_encode_fns[] = {
- Opcode_olt_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ult_s_encode_fns[] = {
- Opcode_ult_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ole_s_encode_fns[] = {
- Opcode_ole_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ule_s_encode_fns[] = {
- Opcode_ule_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_float_s_encode_fns[] = {
- Opcode_float_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ufloat_s_encode_fns[] = {
- Opcode_ufloat_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_round_s_encode_fns[] = {
- Opcode_round_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ceil_s_encode_fns[] = {
- Opcode_ceil_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_floor_s_encode_fns[] = {
- Opcode_floor_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_trunc_s_encode_fns[] = {
- Opcode_trunc_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_utrunc_s_encode_fns[] = {
- Opcode_utrunc_s_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_rfr_encode_fns[] = {
- Opcode_rfr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_wfr_encode_fns[] = {
- Opcode_wfr_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_lsi_encode_fns[] = {
- Opcode_lsi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_lsiu_encode_fns[] = {
- Opcode_lsiu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_lsx_encode_fns[] = {
- Opcode_lsx_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_lsxu_encode_fns[] = {
- Opcode_lsxu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ssi_encode_fns[] = {
- Opcode_ssi_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ssiu_encode_fns[] = {
- Opcode_ssiu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ssx_encode_fns[] = {
- Opcode_ssx_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_ssxu_encode_fns[] = {
- Opcode_ssxu_Slot_inst_encode, 0, 0, 0, 0, 0, 0, 0
-};
-
-xtensa_opcode_encode_fn Opcode_beqz_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_beqz_w18_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_bnez_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_bnez_w18_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_bgez_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_bgez_w18_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_bltz_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_bltz_w18_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_beqi_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_beqi_w18_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_bnei_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_bnei_w18_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_bgei_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_bgei_w18_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_blti_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_blti_w18_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_bgeui_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_bgeui_w18_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_bltui_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_bltui_w18_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_bbci_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_bbci_w18_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_bbsi_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_bbsi_w18_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_beq_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_beq_w18_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_bne_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_bne_w18_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_bge_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_bge_w18_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_blt_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_blt_w18_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_bgeu_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_bgeu_w18_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_bltu_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_bltu_w18_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_bany_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_bany_w18_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_bnone_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_bnone_w18_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_ball_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_ball_w18_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_bnall_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_bnall_w18_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_bbc_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_bbc_w18_Slot_xt_flix64_slot3_encode
-};
-
-xtensa_opcode_encode_fn Opcode_bbs_w18_encode_fns[] = {
- 0, 0, 0, 0, 0, 0, 0, Opcode_bbs_w18_Slot_xt_flix64_slot3_encode
-};
-
-
-/* Opcode table. */
-
-static xtensa_opcode_internal opcodes[] = {
- { "excw", 0 /* xt_iclass_excw */,
- 0,
- Opcode_excw_encode_fns, 0, 0 },
- { "rfe", 1 /* xt_iclass_rfe */,
- XTENSA_OPCODE_IS_JUMP,
- Opcode_rfe_encode_fns, 0, 0 },
- { "rfde", 2 /* xt_iclass_rfde */,
- XTENSA_OPCODE_IS_JUMP,
- Opcode_rfde_encode_fns, 0, 0 },
- { "syscall", 3 /* xt_iclass_syscall */,
- 0,
- Opcode_syscall_encode_fns, 0, 0 },
- { "simcall", 4 /* xt_iclass_simcall */,
- 0,
- Opcode_simcall_encode_fns, 0, 0 },
- { "call12", 5 /* xt_iclass_call12 */,
- XTENSA_OPCODE_IS_CALL,
- Opcode_call12_encode_fns, 0, 0 },
- { "call8", 6 /* xt_iclass_call8 */,
- XTENSA_OPCODE_IS_CALL,
- Opcode_call8_encode_fns, 0, 0 },
- { "call4", 7 /* xt_iclass_call4 */,
- XTENSA_OPCODE_IS_CALL,
- Opcode_call4_encode_fns, 0, 0 },
- { "callx12", 8 /* xt_iclass_callx12 */,
- XTENSA_OPCODE_IS_CALL,
- Opcode_callx12_encode_fns, 0, 0 },
- { "callx8", 9 /* xt_iclass_callx8 */,
- XTENSA_OPCODE_IS_CALL,
- Opcode_callx8_encode_fns, 0, 0 },
- { "callx4", 10 /* xt_iclass_callx4 */,
- XTENSA_OPCODE_IS_CALL,
- Opcode_callx4_encode_fns, 0, 0 },
- { "entry", 11 /* xt_iclass_entry */,
- 0,
- Opcode_entry_encode_fns, 0, 0 },
- { "movsp", 12 /* xt_iclass_movsp */,
- 0,
- Opcode_movsp_encode_fns, 0, 0 },
- { "rotw", 13 /* xt_iclass_rotw */,
- 0,
- Opcode_rotw_encode_fns, 0, 0 },
- { "retw", 14 /* xt_iclass_retw */,
- XTENSA_OPCODE_IS_JUMP,
- Opcode_retw_encode_fns, 0, 0 },
- { "retw.n", 14 /* xt_iclass_retw */,
- XTENSA_OPCODE_IS_JUMP,
- Opcode_retw_n_encode_fns, 0, 0 },
- { "rfwo", 15 /* xt_iclass_rfwou */,
- XTENSA_OPCODE_IS_JUMP,
- Opcode_rfwo_encode_fns, 0, 0 },
- { "rfwu", 15 /* xt_iclass_rfwou */,
- XTENSA_OPCODE_IS_JUMP,
- Opcode_rfwu_encode_fns, 0, 0 },
- { "l32e", 16 /* xt_iclass_l32e */,
- 0,
- Opcode_l32e_encode_fns, 0, 0 },
- { "s32e", 17 /* xt_iclass_s32e */,
- 0,
- Opcode_s32e_encode_fns, 0, 0 },
- { "rsr.windowbase", 18 /* xt_iclass_rsr.windowbase */,
- 0,
- Opcode_rsr_windowbase_encode_fns, 0, 0 },
- { "wsr.windowbase", 19 /* xt_iclass_wsr.windowbase */,
- 0,
- Opcode_wsr_windowbase_encode_fns, 0, 0 },
- { "xsr.windowbase", 20 /* xt_iclass_xsr.windowbase */,
- 0,
- Opcode_xsr_windowbase_encode_fns, 0, 0 },
- { "rsr.windowstart", 21 /* xt_iclass_rsr.windowstart */,
- 0,
- Opcode_rsr_windowstart_encode_fns, 0, 0 },
- { "wsr.windowstart", 22 /* xt_iclass_wsr.windowstart */,
- 0,
- Opcode_wsr_windowstart_encode_fns, 0, 0 },
- { "xsr.windowstart", 23 /* xt_iclass_xsr.windowstart */,
- 0,
- Opcode_xsr_windowstart_encode_fns, 0, 0 },
- { "add.n", 24 /* xt_iclass_add.n */,
- 0,
- Opcode_add_n_encode_fns, 0, 0 },
- { "addi.n", 25 /* xt_iclass_addi.n */,
- 0,
- Opcode_addi_n_encode_fns, 0, 0 },
- { "beqz.n", 26 /* xt_iclass_bz6 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_beqz_n_encode_fns, 0, 0 },
- { "bnez.n", 26 /* xt_iclass_bz6 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bnez_n_encode_fns, 0, 0 },
- { "ill.n", 27 /* xt_iclass_ill.n */,
- 0,
- Opcode_ill_n_encode_fns, 0, 0 },
- { "l32i.n", 28 /* xt_iclass_loadi4 */,
- 0,
- Opcode_l32i_n_encode_fns, 0, 0 },
- { "mov.n", 29 /* xt_iclass_mov.n */,
- 0,
- Opcode_mov_n_encode_fns, 0, 0 },
- { "movi.n", 30 /* xt_iclass_movi.n */,
- 0,
- Opcode_movi_n_encode_fns, 0, 0 },
- { "nop.n", 31 /* xt_iclass_nopn */,
- 0,
- Opcode_nop_n_encode_fns, 0, 0 },
- { "ret.n", 32 /* xt_iclass_retn */,
- XTENSA_OPCODE_IS_JUMP,
- Opcode_ret_n_encode_fns, 0, 0 },
- { "s32i.n", 33 /* xt_iclass_storei4 */,
- 0,
- Opcode_s32i_n_encode_fns, 0, 0 },
- { "rur.threadptr", 34 /* rur_threadptr */,
- 0,
- Opcode_rur_threadptr_encode_fns, 0, 0 },
- { "wur.threadptr", 35 /* wur_threadptr */,
- 0,
- Opcode_wur_threadptr_encode_fns, 0, 0 },
- { "addi", 36 /* xt_iclass_addi */,
- 0,
- Opcode_addi_encode_fns, 0, 0 },
- { "addmi", 37 /* xt_iclass_addmi */,
- 0,
- Opcode_addmi_encode_fns, 0, 0 },
- { "add", 38 /* xt_iclass_addsub */,
- 0,
- Opcode_add_encode_fns, 0, 0 },
- { "sub", 38 /* xt_iclass_addsub */,
- 0,
- Opcode_sub_encode_fns, 0, 0 },
- { "addx2", 38 /* xt_iclass_addsub */,
- 0,
- Opcode_addx2_encode_fns, 0, 0 },
- { "addx4", 38 /* xt_iclass_addsub */,
- 0,
- Opcode_addx4_encode_fns, 0, 0 },
- { "addx8", 38 /* xt_iclass_addsub */,
- 0,
- Opcode_addx8_encode_fns, 0, 0 },
- { "subx2", 38 /* xt_iclass_addsub */,
- 0,
- Opcode_subx2_encode_fns, 0, 0 },
- { "subx4", 38 /* xt_iclass_addsub */,
- 0,
- Opcode_subx4_encode_fns, 0, 0 },
- { "subx8", 38 /* xt_iclass_addsub */,
- 0,
- Opcode_subx8_encode_fns, 0, 0 },
- { "and", 39 /* xt_iclass_bit */,
- 0,
- Opcode_and_encode_fns, 0, 0 },
- { "or", 39 /* xt_iclass_bit */,
- 0,
- Opcode_or_encode_fns, 0, 0 },
- { "xor", 39 /* xt_iclass_bit */,
- 0,
- Opcode_xor_encode_fns, 0, 0 },
- { "beqi", 40 /* xt_iclass_bsi8 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_beqi_encode_fns, 0, 0 },
- { "bnei", 40 /* xt_iclass_bsi8 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bnei_encode_fns, 0, 0 },
- { "bgei", 40 /* xt_iclass_bsi8 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bgei_encode_fns, 0, 0 },
- { "blti", 40 /* xt_iclass_bsi8 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_blti_encode_fns, 0, 0 },
- { "bbci", 41 /* xt_iclass_bsi8b */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bbci_encode_fns, 0, 0 },
- { "bbsi", 41 /* xt_iclass_bsi8b */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bbsi_encode_fns, 0, 0 },
- { "bgeui", 42 /* xt_iclass_bsi8u */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bgeui_encode_fns, 0, 0 },
- { "bltui", 42 /* xt_iclass_bsi8u */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bltui_encode_fns, 0, 0 },
- { "beq", 43 /* xt_iclass_bst8 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_beq_encode_fns, 0, 0 },
- { "bne", 43 /* xt_iclass_bst8 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bne_encode_fns, 0, 0 },
- { "bge", 43 /* xt_iclass_bst8 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bge_encode_fns, 0, 0 },
- { "blt", 43 /* xt_iclass_bst8 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_blt_encode_fns, 0, 0 },
- { "bgeu", 43 /* xt_iclass_bst8 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bgeu_encode_fns, 0, 0 },
- { "bltu", 43 /* xt_iclass_bst8 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bltu_encode_fns, 0, 0 },
- { "bany", 43 /* xt_iclass_bst8 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bany_encode_fns, 0, 0 },
- { "bnone", 43 /* xt_iclass_bst8 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bnone_encode_fns, 0, 0 },
- { "ball", 43 /* xt_iclass_bst8 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_ball_encode_fns, 0, 0 },
- { "bnall", 43 /* xt_iclass_bst8 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bnall_encode_fns, 0, 0 },
- { "bbc", 43 /* xt_iclass_bst8 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bbc_encode_fns, 0, 0 },
- { "bbs", 43 /* xt_iclass_bst8 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bbs_encode_fns, 0, 0 },
- { "beqz", 44 /* xt_iclass_bsz12 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_beqz_encode_fns, 0, 0 },
- { "bnez", 44 /* xt_iclass_bsz12 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bnez_encode_fns, 0, 0 },
- { "bgez", 44 /* xt_iclass_bsz12 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bgez_encode_fns, 0, 0 },
- { "bltz", 44 /* xt_iclass_bsz12 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bltz_encode_fns, 0, 0 },
- { "call0", 45 /* xt_iclass_call0 */,
- XTENSA_OPCODE_IS_CALL,
- Opcode_call0_encode_fns, 0, 0 },
- { "callx0", 46 /* xt_iclass_callx0 */,
- XTENSA_OPCODE_IS_CALL,
- Opcode_callx0_encode_fns, 0, 0 },
- { "extui", 47 /* xt_iclass_exti */,
- 0,
- Opcode_extui_encode_fns, 0, 0 },
- { "ill", 48 /* xt_iclass_ill */,
- 0,
- Opcode_ill_encode_fns, 0, 0 },
- { "j", 49 /* xt_iclass_jump */,
- XTENSA_OPCODE_IS_JUMP,
- Opcode_j_encode_fns, 0, 0 },
- { "jx", 50 /* xt_iclass_jumpx */,
- XTENSA_OPCODE_IS_JUMP,
- Opcode_jx_encode_fns, 0, 0 },
- { "l16ui", 51 /* xt_iclass_l16ui */,
- 0,
- Opcode_l16ui_encode_fns, 0, 0 },
- { "l16si", 52 /* xt_iclass_l16si */,
- 0,
- Opcode_l16si_encode_fns, 0, 0 },
- { "l32i", 53 /* xt_iclass_l32i */,
- 0,
- Opcode_l32i_encode_fns, 0, 0 },
- { "l32r", 54 /* xt_iclass_l32r */,
- 0,
- Opcode_l32r_encode_fns, 0, 0 },
- { "l8ui", 55 /* xt_iclass_l8i */,
- 0,
- Opcode_l8ui_encode_fns, 0, 0 },
- { "loop", 56 /* xt_iclass_loop */,
- XTENSA_OPCODE_IS_LOOP,
- Opcode_loop_encode_fns, 0, 0 },
- { "loopnez", 57 /* xt_iclass_loopz */,
- XTENSA_OPCODE_IS_LOOP,
- Opcode_loopnez_encode_fns, 0, 0 },
- { "loopgtz", 57 /* xt_iclass_loopz */,
- XTENSA_OPCODE_IS_LOOP,
- Opcode_loopgtz_encode_fns, 0, 0 },
- { "movi", 58 /* xt_iclass_movi */,
- 0,
- Opcode_movi_encode_fns, 0, 0 },
- { "moveqz", 59 /* xt_iclass_movz */,
- 0,
- Opcode_moveqz_encode_fns, 0, 0 },
- { "movnez", 59 /* xt_iclass_movz */,
- 0,
- Opcode_movnez_encode_fns, 0, 0 },
- { "movltz", 59 /* xt_iclass_movz */,
- 0,
- Opcode_movltz_encode_fns, 0, 0 },
- { "movgez", 59 /* xt_iclass_movz */,
- 0,
- Opcode_movgez_encode_fns, 0, 0 },
- { "neg", 60 /* xt_iclass_neg */,
- 0,
- Opcode_neg_encode_fns, 0, 0 },
- { "abs", 60 /* xt_iclass_neg */,
- 0,
- Opcode_abs_encode_fns, 0, 0 },
- { "nop", 61 /* xt_iclass_nop */,
- 0,
- Opcode_nop_encode_fns, 0, 0 },
- { "ret", 62 /* xt_iclass_return */,
- XTENSA_OPCODE_IS_JUMP,
- Opcode_ret_encode_fns, 0, 0 },
- { "s16i", 63 /* xt_iclass_s16i */,
- 0,
- Opcode_s16i_encode_fns, 0, 0 },
- { "s32i", 64 /* xt_iclass_s32i */,
- 0,
- Opcode_s32i_encode_fns, 0, 0 },
- { "s8i", 65 /* xt_iclass_s8i */,
- 0,
- Opcode_s8i_encode_fns, 0, 0 },
- { "ssr", 66 /* xt_iclass_sar */,
- 0,
- Opcode_ssr_encode_fns, 0, 0 },
- { "ssl", 66 /* xt_iclass_sar */,
- 0,
- Opcode_ssl_encode_fns, 0, 0 },
- { "ssa8l", 66 /* xt_iclass_sar */,
- 0,
- Opcode_ssa8l_encode_fns, 0, 0 },
- { "ssa8b", 66 /* xt_iclass_sar */,
- 0,
- Opcode_ssa8b_encode_fns, 0, 0 },
- { "ssai", 67 /* xt_iclass_sari */,
- 0,
- Opcode_ssai_encode_fns, 0, 0 },
- { "sll", 68 /* xt_iclass_shifts */,
- 0,
- Opcode_sll_encode_fns, 0, 0 },
- { "src", 69 /* xt_iclass_shiftst */,
- 0,
- Opcode_src_encode_fns, 0, 0 },
- { "srl", 70 /* xt_iclass_shiftt */,
- 0,
- Opcode_srl_encode_fns, 0, 0 },
- { "sra", 70 /* xt_iclass_shiftt */,
- 0,
- Opcode_sra_encode_fns, 0, 0 },
- { "slli", 71 /* xt_iclass_slli */,
- 0,
- Opcode_slli_encode_fns, 0, 0 },
- { "srai", 72 /* xt_iclass_srai */,
- 0,
- Opcode_srai_encode_fns, 0, 0 },
- { "srli", 73 /* xt_iclass_srli */,
- 0,
- Opcode_srli_encode_fns, 0, 0 },
- { "memw", 74 /* xt_iclass_memw */,
- 0,
- Opcode_memw_encode_fns, 0, 0 },
- { "extw", 75 /* xt_iclass_extw */,
- 0,
- Opcode_extw_encode_fns, 0, 0 },
- { "isync", 76 /* xt_iclass_isync */,
- 0,
- Opcode_isync_encode_fns, 0, 0 },
- { "rsync", 77 /* xt_iclass_sync */,
- 0,
- Opcode_rsync_encode_fns, 0, 0 },
- { "esync", 77 /* xt_iclass_sync */,
- 0,
- Opcode_esync_encode_fns, 0, 0 },
- { "dsync", 77 /* xt_iclass_sync */,
- 0,
- Opcode_dsync_encode_fns, 0, 0 },
- { "rsil", 78 /* xt_iclass_rsil */,
- 0,
- Opcode_rsil_encode_fns, 0, 0 },
- { "rsr.lend", 79 /* xt_iclass_rsr.lend */,
- 0,
- Opcode_rsr_lend_encode_fns, 0, 0 },
- { "wsr.lend", 80 /* xt_iclass_wsr.lend */,
- 0,
- Opcode_wsr_lend_encode_fns, 0, 0 },
- { "xsr.lend", 81 /* xt_iclass_xsr.lend */,
- 0,
- Opcode_xsr_lend_encode_fns, 0, 0 },
- { "rsr.lcount", 82 /* xt_iclass_rsr.lcount */,
- 0,
- Opcode_rsr_lcount_encode_fns, 0, 0 },
- { "wsr.lcount", 83 /* xt_iclass_wsr.lcount */,
- 0,
- Opcode_wsr_lcount_encode_fns, 0, 0 },
- { "xsr.lcount", 84 /* xt_iclass_xsr.lcount */,
- 0,
- Opcode_xsr_lcount_encode_fns, 0, 0 },
- { "rsr.lbeg", 85 /* xt_iclass_rsr.lbeg */,
- 0,
- Opcode_rsr_lbeg_encode_fns, 0, 0 },
- { "wsr.lbeg", 86 /* xt_iclass_wsr.lbeg */,
- 0,
- Opcode_wsr_lbeg_encode_fns, 0, 0 },
- { "xsr.lbeg", 87 /* xt_iclass_xsr.lbeg */,
- 0,
- Opcode_xsr_lbeg_encode_fns, 0, 0 },
- { "rsr.sar", 88 /* xt_iclass_rsr.sar */,
- 0,
- Opcode_rsr_sar_encode_fns, 0, 0 },
- { "wsr.sar", 89 /* xt_iclass_wsr.sar */,
- 0,
- Opcode_wsr_sar_encode_fns, 0, 0 },
- { "xsr.sar", 90 /* xt_iclass_xsr.sar */,
- 0,
- Opcode_xsr_sar_encode_fns, 0, 0 },
- { "rsr.litbase", 91 /* xt_iclass_rsr.litbase */,
- 0,
- Opcode_rsr_litbase_encode_fns, 0, 0 },
- { "wsr.litbase", 92 /* xt_iclass_wsr.litbase */,
- 0,
- Opcode_wsr_litbase_encode_fns, 0, 0 },
- { "xsr.litbase", 93 /* xt_iclass_xsr.litbase */,
- 0,
- Opcode_xsr_litbase_encode_fns, 0, 0 },
- { "rsr.176", 94 /* xt_iclass_rsr.176 */,
- 0,
- Opcode_rsr_176_encode_fns, 0, 0 },
- { "rsr.208", 95 /* xt_iclass_rsr.208 */,
- 0,
- Opcode_rsr_208_encode_fns, 0, 0 },
- { "rsr.ps", 96 /* xt_iclass_rsr.ps */,
- 0,
- Opcode_rsr_ps_encode_fns, 0, 0 },
- { "wsr.ps", 97 /* xt_iclass_wsr.ps */,
- 0,
- Opcode_wsr_ps_encode_fns, 0, 0 },
- { "xsr.ps", 98 /* xt_iclass_xsr.ps */,
- 0,
- Opcode_xsr_ps_encode_fns, 0, 0 },
- { "rsr.epc1", 99 /* xt_iclass_rsr.epc1 */,
- 0,
- Opcode_rsr_epc1_encode_fns, 0, 0 },
- { "wsr.epc1", 100 /* xt_iclass_wsr.epc1 */,
- 0,
- Opcode_wsr_epc1_encode_fns, 0, 0 },
- { "xsr.epc1", 101 /* xt_iclass_xsr.epc1 */,
- 0,
- Opcode_xsr_epc1_encode_fns, 0, 0 },
- { "rsr.excsave1", 102 /* xt_iclass_rsr.excsave1 */,
- 0,
- Opcode_rsr_excsave1_encode_fns, 0, 0 },
- { "wsr.excsave1", 103 /* xt_iclass_wsr.excsave1 */,
- 0,
- Opcode_wsr_excsave1_encode_fns, 0, 0 },
- { "xsr.excsave1", 104 /* xt_iclass_xsr.excsave1 */,
- 0,
- Opcode_xsr_excsave1_encode_fns, 0, 0 },
- { "rsr.epc2", 105 /* xt_iclass_rsr.epc2 */,
- 0,
- Opcode_rsr_epc2_encode_fns, 0, 0 },
- { "wsr.epc2", 106 /* xt_iclass_wsr.epc2 */,
- 0,
- Opcode_wsr_epc2_encode_fns, 0, 0 },
- { "xsr.epc2", 107 /* xt_iclass_xsr.epc2 */,
- 0,
- Opcode_xsr_epc2_encode_fns, 0, 0 },
- { "rsr.excsave2", 108 /* xt_iclass_rsr.excsave2 */,
- 0,
- Opcode_rsr_excsave2_encode_fns, 0, 0 },
- { "wsr.excsave2", 109 /* xt_iclass_wsr.excsave2 */,
- 0,
- Opcode_wsr_excsave2_encode_fns, 0, 0 },
- { "xsr.excsave2", 110 /* xt_iclass_xsr.excsave2 */,
- 0,
- Opcode_xsr_excsave2_encode_fns, 0, 0 },
- { "rsr.epc3", 111 /* xt_iclass_rsr.epc3 */,
- 0,
- Opcode_rsr_epc3_encode_fns, 0, 0 },
- { "wsr.epc3", 112 /* xt_iclass_wsr.epc3 */,
- 0,
- Opcode_wsr_epc3_encode_fns, 0, 0 },
- { "xsr.epc3", 113 /* xt_iclass_xsr.epc3 */,
- 0,
- Opcode_xsr_epc3_encode_fns, 0, 0 },
- { "rsr.excsave3", 114 /* xt_iclass_rsr.excsave3 */,
- 0,
- Opcode_rsr_excsave3_encode_fns, 0, 0 },
- { "wsr.excsave3", 115 /* xt_iclass_wsr.excsave3 */,
- 0,
- Opcode_wsr_excsave3_encode_fns, 0, 0 },
- { "xsr.excsave3", 116 /* xt_iclass_xsr.excsave3 */,
- 0,
- Opcode_xsr_excsave3_encode_fns, 0, 0 },
- { "rsr.epc4", 117 /* xt_iclass_rsr.epc4 */,
- 0,
- Opcode_rsr_epc4_encode_fns, 0, 0 },
- { "wsr.epc4", 118 /* xt_iclass_wsr.epc4 */,
- 0,
- Opcode_wsr_epc4_encode_fns, 0, 0 },
- { "xsr.epc4", 119 /* xt_iclass_xsr.epc4 */,
- 0,
- Opcode_xsr_epc4_encode_fns, 0, 0 },
- { "rsr.excsave4", 120 /* xt_iclass_rsr.excsave4 */,
- 0,
- Opcode_rsr_excsave4_encode_fns, 0, 0 },
- { "wsr.excsave4", 121 /* xt_iclass_wsr.excsave4 */,
- 0,
- Opcode_wsr_excsave4_encode_fns, 0, 0 },
- { "xsr.excsave4", 122 /* xt_iclass_xsr.excsave4 */,
- 0,
- Opcode_xsr_excsave4_encode_fns, 0, 0 },
- { "rsr.epc5", 123 /* xt_iclass_rsr.epc5 */,
- 0,
- Opcode_rsr_epc5_encode_fns, 0, 0 },
- { "wsr.epc5", 124 /* xt_iclass_wsr.epc5 */,
- 0,
- Opcode_wsr_epc5_encode_fns, 0, 0 },
- { "xsr.epc5", 125 /* xt_iclass_xsr.epc5 */,
- 0,
- Opcode_xsr_epc5_encode_fns, 0, 0 },
- { "rsr.excsave5", 126 /* xt_iclass_rsr.excsave5 */,
- 0,
- Opcode_rsr_excsave5_encode_fns, 0, 0 },
- { "wsr.excsave5", 127 /* xt_iclass_wsr.excsave5 */,
- 0,
- Opcode_wsr_excsave5_encode_fns, 0, 0 },
- { "xsr.excsave5", 128 /* xt_iclass_xsr.excsave5 */,
- 0,
- Opcode_xsr_excsave5_encode_fns, 0, 0 },
- { "rsr.epc6", 129 /* xt_iclass_rsr.epc6 */,
- 0,
- Opcode_rsr_epc6_encode_fns, 0, 0 },
- { "wsr.epc6", 130 /* xt_iclass_wsr.epc6 */,
- 0,
- Opcode_wsr_epc6_encode_fns, 0, 0 },
- { "xsr.epc6", 131 /* xt_iclass_xsr.epc6 */,
- 0,
- Opcode_xsr_epc6_encode_fns, 0, 0 },
- { "rsr.excsave6", 132 /* xt_iclass_rsr.excsave6 */,
- 0,
- Opcode_rsr_excsave6_encode_fns, 0, 0 },
- { "wsr.excsave6", 133 /* xt_iclass_wsr.excsave6 */,
- 0,
- Opcode_wsr_excsave6_encode_fns, 0, 0 },
- { "xsr.excsave6", 134 /* xt_iclass_xsr.excsave6 */,
- 0,
- Opcode_xsr_excsave6_encode_fns, 0, 0 },
- { "rsr.epc7", 135 /* xt_iclass_rsr.epc7 */,
- 0,
- Opcode_rsr_epc7_encode_fns, 0, 0 },
- { "wsr.epc7", 136 /* xt_iclass_wsr.epc7 */,
- 0,
- Opcode_wsr_epc7_encode_fns, 0, 0 },
- { "xsr.epc7", 137 /* xt_iclass_xsr.epc7 */,
- 0,
- Opcode_xsr_epc7_encode_fns, 0, 0 },
- { "rsr.excsave7", 138 /* xt_iclass_rsr.excsave7 */,
- 0,
- Opcode_rsr_excsave7_encode_fns, 0, 0 },
- { "wsr.excsave7", 139 /* xt_iclass_wsr.excsave7 */,
- 0,
- Opcode_wsr_excsave7_encode_fns, 0, 0 },
- { "xsr.excsave7", 140 /* xt_iclass_xsr.excsave7 */,
- 0,
- Opcode_xsr_excsave7_encode_fns, 0, 0 },
- { "rsr.eps2", 141 /* xt_iclass_rsr.eps2 */,
- 0,
- Opcode_rsr_eps2_encode_fns, 0, 0 },
- { "wsr.eps2", 142 /* xt_iclass_wsr.eps2 */,
- 0,
- Opcode_wsr_eps2_encode_fns, 0, 0 },
- { "xsr.eps2", 143 /* xt_iclass_xsr.eps2 */,
- 0,
- Opcode_xsr_eps2_encode_fns, 0, 0 },
- { "rsr.eps3", 144 /* xt_iclass_rsr.eps3 */,
- 0,
- Opcode_rsr_eps3_encode_fns, 0, 0 },
- { "wsr.eps3", 145 /* xt_iclass_wsr.eps3 */,
- 0,
- Opcode_wsr_eps3_encode_fns, 0, 0 },
- { "xsr.eps3", 146 /* xt_iclass_xsr.eps3 */,
- 0,
- Opcode_xsr_eps3_encode_fns, 0, 0 },
- { "rsr.eps4", 147 /* xt_iclass_rsr.eps4 */,
- 0,
- Opcode_rsr_eps4_encode_fns, 0, 0 },
- { "wsr.eps4", 148 /* xt_iclass_wsr.eps4 */,
- 0,
- Opcode_wsr_eps4_encode_fns, 0, 0 },
- { "xsr.eps4", 149 /* xt_iclass_xsr.eps4 */,
- 0,
- Opcode_xsr_eps4_encode_fns, 0, 0 },
- { "rsr.eps5", 150 /* xt_iclass_rsr.eps5 */,
- 0,
- Opcode_rsr_eps5_encode_fns, 0, 0 },
- { "wsr.eps5", 151 /* xt_iclass_wsr.eps5 */,
- 0,
- Opcode_wsr_eps5_encode_fns, 0, 0 },
- { "xsr.eps5", 152 /* xt_iclass_xsr.eps5 */,
- 0,
- Opcode_xsr_eps5_encode_fns, 0, 0 },
- { "rsr.eps6", 153 /* xt_iclass_rsr.eps6 */,
- 0,
- Opcode_rsr_eps6_encode_fns, 0, 0 },
- { "wsr.eps6", 154 /* xt_iclass_wsr.eps6 */,
- 0,
- Opcode_wsr_eps6_encode_fns, 0, 0 },
- { "xsr.eps6", 155 /* xt_iclass_xsr.eps6 */,
- 0,
- Opcode_xsr_eps6_encode_fns, 0, 0 },
- { "rsr.eps7", 156 /* xt_iclass_rsr.eps7 */,
- 0,
- Opcode_rsr_eps7_encode_fns, 0, 0 },
- { "wsr.eps7", 157 /* xt_iclass_wsr.eps7 */,
- 0,
- Opcode_wsr_eps7_encode_fns, 0, 0 },
- { "xsr.eps7", 158 /* xt_iclass_xsr.eps7 */,
- 0,
- Opcode_xsr_eps7_encode_fns, 0, 0 },
- { "rsr.excvaddr", 159 /* xt_iclass_rsr.excvaddr */,
- 0,
- Opcode_rsr_excvaddr_encode_fns, 0, 0 },
- { "wsr.excvaddr", 160 /* xt_iclass_wsr.excvaddr */,
- 0,
- Opcode_wsr_excvaddr_encode_fns, 0, 0 },
- { "xsr.excvaddr", 161 /* xt_iclass_xsr.excvaddr */,
- 0,
- Opcode_xsr_excvaddr_encode_fns, 0, 0 },
- { "rsr.depc", 162 /* xt_iclass_rsr.depc */,
- 0,
- Opcode_rsr_depc_encode_fns, 0, 0 },
- { "wsr.depc", 163 /* xt_iclass_wsr.depc */,
- 0,
- Opcode_wsr_depc_encode_fns, 0, 0 },
- { "xsr.depc", 164 /* xt_iclass_xsr.depc */,
- 0,
- Opcode_xsr_depc_encode_fns, 0, 0 },
- { "rsr.exccause", 165 /* xt_iclass_rsr.exccause */,
- 0,
- Opcode_rsr_exccause_encode_fns, 0, 0 },
- { "wsr.exccause", 166 /* xt_iclass_wsr.exccause */,
- 0,
- Opcode_wsr_exccause_encode_fns, 0, 0 },
- { "xsr.exccause", 167 /* xt_iclass_xsr.exccause */,
- 0,
- Opcode_xsr_exccause_encode_fns, 0, 0 },
- { "rsr.misc0", 168 /* xt_iclass_rsr.misc0 */,
- 0,
- Opcode_rsr_misc0_encode_fns, 0, 0 },
- { "wsr.misc0", 169 /* xt_iclass_wsr.misc0 */,
- 0,
- Opcode_wsr_misc0_encode_fns, 0, 0 },
- { "xsr.misc0", 170 /* xt_iclass_xsr.misc0 */,
- 0,
- Opcode_xsr_misc0_encode_fns, 0, 0 },
- { "rsr.misc1", 171 /* xt_iclass_rsr.misc1 */,
- 0,
- Opcode_rsr_misc1_encode_fns, 0, 0 },
- { "wsr.misc1", 172 /* xt_iclass_wsr.misc1 */,
- 0,
- Opcode_wsr_misc1_encode_fns, 0, 0 },
- { "xsr.misc1", 173 /* xt_iclass_xsr.misc1 */,
- 0,
- Opcode_xsr_misc1_encode_fns, 0, 0 },
- { "rsr.misc2", 174 /* xt_iclass_rsr.misc2 */,
- 0,
- Opcode_rsr_misc2_encode_fns, 0, 0 },
- { "wsr.misc2", 175 /* xt_iclass_wsr.misc2 */,
- 0,
- Opcode_wsr_misc2_encode_fns, 0, 0 },
- { "xsr.misc2", 176 /* xt_iclass_xsr.misc2 */,
- 0,
- Opcode_xsr_misc2_encode_fns, 0, 0 },
- { "rsr.misc3", 177 /* xt_iclass_rsr.misc3 */,
- 0,
- Opcode_rsr_misc3_encode_fns, 0, 0 },
- { "wsr.misc3", 178 /* xt_iclass_wsr.misc3 */,
- 0,
- Opcode_wsr_misc3_encode_fns, 0, 0 },
- { "xsr.misc3", 179 /* xt_iclass_xsr.misc3 */,
- 0,
- Opcode_xsr_misc3_encode_fns, 0, 0 },
- { "rsr.prid", 180 /* xt_iclass_rsr.prid */,
- 0,
- Opcode_rsr_prid_encode_fns, 0, 0 },
- { "rsr.vecbase", 181 /* xt_iclass_rsr.vecbase */,
- 0,
- Opcode_rsr_vecbase_encode_fns, 0, 0 },
- { "wsr.vecbase", 182 /* xt_iclass_wsr.vecbase */,
- 0,
- Opcode_wsr_vecbase_encode_fns, 0, 0 },
- { "xsr.vecbase", 183 /* xt_iclass_xsr.vecbase */,
- 0,
- Opcode_xsr_vecbase_encode_fns, 0, 0 },
- { "mul.aa.ll", 184 /* xt_iclass_mac16_aa */,
- 0,
- Opcode_mul_aa_ll_encode_fns, 0, 0 },
- { "mul.aa.hl", 184 /* xt_iclass_mac16_aa */,
- 0,
- Opcode_mul_aa_hl_encode_fns, 0, 0 },
- { "mul.aa.lh", 184 /* xt_iclass_mac16_aa */,
- 0,
- Opcode_mul_aa_lh_encode_fns, 0, 0 },
- { "mul.aa.hh", 184 /* xt_iclass_mac16_aa */,
- 0,
- Opcode_mul_aa_hh_encode_fns, 0, 0 },
- { "umul.aa.ll", 184 /* xt_iclass_mac16_aa */,
- 0,
- Opcode_umul_aa_ll_encode_fns, 0, 0 },
- { "umul.aa.hl", 184 /* xt_iclass_mac16_aa */,
- 0,
- Opcode_umul_aa_hl_encode_fns, 0, 0 },
- { "umul.aa.lh", 184 /* xt_iclass_mac16_aa */,
- 0,
- Opcode_umul_aa_lh_encode_fns, 0, 0 },
- { "umul.aa.hh", 184 /* xt_iclass_mac16_aa */,
- 0,
- Opcode_umul_aa_hh_encode_fns, 0, 0 },
- { "mul.ad.ll", 185 /* xt_iclass_mac16_ad */,
- 0,
- Opcode_mul_ad_ll_encode_fns, 0, 0 },
- { "mul.ad.hl", 185 /* xt_iclass_mac16_ad */,
- 0,
- Opcode_mul_ad_hl_encode_fns, 0, 0 },
- { "mul.ad.lh", 185 /* xt_iclass_mac16_ad */,
- 0,
- Opcode_mul_ad_lh_encode_fns, 0, 0 },
- { "mul.ad.hh", 185 /* xt_iclass_mac16_ad */,
- 0,
- Opcode_mul_ad_hh_encode_fns, 0, 0 },
- { "mul.da.ll", 186 /* xt_iclass_mac16_da */,
- 0,
- Opcode_mul_da_ll_encode_fns, 0, 0 },
- { "mul.da.hl", 186 /* xt_iclass_mac16_da */,
- 0,
- Opcode_mul_da_hl_encode_fns, 0, 0 },
- { "mul.da.lh", 186 /* xt_iclass_mac16_da */,
- 0,
- Opcode_mul_da_lh_encode_fns, 0, 0 },
- { "mul.da.hh", 186 /* xt_iclass_mac16_da */,
- 0,
- Opcode_mul_da_hh_encode_fns, 0, 0 },
- { "mul.dd.ll", 187 /* xt_iclass_mac16_dd */,
- 0,
- Opcode_mul_dd_ll_encode_fns, 0, 0 },
- { "mul.dd.hl", 187 /* xt_iclass_mac16_dd */,
- 0,
- Opcode_mul_dd_hl_encode_fns, 0, 0 },
- { "mul.dd.lh", 187 /* xt_iclass_mac16_dd */,
- 0,
- Opcode_mul_dd_lh_encode_fns, 0, 0 },
- { "mul.dd.hh", 187 /* xt_iclass_mac16_dd */,
- 0,
- Opcode_mul_dd_hh_encode_fns, 0, 0 },
- { "mula.aa.ll", 188 /* xt_iclass_mac16a_aa */,
- 0,
- Opcode_mula_aa_ll_encode_fns, 0, 0 },
- { "mula.aa.hl", 188 /* xt_iclass_mac16a_aa */,
- 0,
- Opcode_mula_aa_hl_encode_fns, 0, 0 },
- { "mula.aa.lh", 188 /* xt_iclass_mac16a_aa */,
- 0,
- Opcode_mula_aa_lh_encode_fns, 0, 0 },
- { "mula.aa.hh", 188 /* xt_iclass_mac16a_aa */,
- 0,
- Opcode_mula_aa_hh_encode_fns, 0, 0 },
- { "muls.aa.ll", 188 /* xt_iclass_mac16a_aa */,
- 0,
- Opcode_muls_aa_ll_encode_fns, 0, 0 },
- { "muls.aa.hl", 188 /* xt_iclass_mac16a_aa */,
- 0,
- Opcode_muls_aa_hl_encode_fns, 0, 0 },
- { "muls.aa.lh", 188 /* xt_iclass_mac16a_aa */,
- 0,
- Opcode_muls_aa_lh_encode_fns, 0, 0 },
- { "muls.aa.hh", 188 /* xt_iclass_mac16a_aa */,
- 0,
- Opcode_muls_aa_hh_encode_fns, 0, 0 },
- { "mula.ad.ll", 189 /* xt_iclass_mac16a_ad */,
- 0,
- Opcode_mula_ad_ll_encode_fns, 0, 0 },
- { "mula.ad.hl", 189 /* xt_iclass_mac16a_ad */,
- 0,
- Opcode_mula_ad_hl_encode_fns, 0, 0 },
- { "mula.ad.lh", 189 /* xt_iclass_mac16a_ad */,
- 0,
- Opcode_mula_ad_lh_encode_fns, 0, 0 },
- { "mula.ad.hh", 189 /* xt_iclass_mac16a_ad */,
- 0,
- Opcode_mula_ad_hh_encode_fns, 0, 0 },
- { "muls.ad.ll", 189 /* xt_iclass_mac16a_ad */,
- 0,
- Opcode_muls_ad_ll_encode_fns, 0, 0 },
- { "muls.ad.hl", 189 /* xt_iclass_mac16a_ad */,
- 0,
- Opcode_muls_ad_hl_encode_fns, 0, 0 },
- { "muls.ad.lh", 189 /* xt_iclass_mac16a_ad */,
- 0,
- Opcode_muls_ad_lh_encode_fns, 0, 0 },
- { "muls.ad.hh", 189 /* xt_iclass_mac16a_ad */,
- 0,
- Opcode_muls_ad_hh_encode_fns, 0, 0 },
- { "mula.da.ll", 190 /* xt_iclass_mac16a_da */,
- 0,
- Opcode_mula_da_ll_encode_fns, 0, 0 },
- { "mula.da.hl", 190 /* xt_iclass_mac16a_da */,
- 0,
- Opcode_mula_da_hl_encode_fns, 0, 0 },
- { "mula.da.lh", 190 /* xt_iclass_mac16a_da */,
- 0,
- Opcode_mula_da_lh_encode_fns, 0, 0 },
- { "mula.da.hh", 190 /* xt_iclass_mac16a_da */,
- 0,
- Opcode_mula_da_hh_encode_fns, 0, 0 },
- { "muls.da.ll", 190 /* xt_iclass_mac16a_da */,
- 0,
- Opcode_muls_da_ll_encode_fns, 0, 0 },
- { "muls.da.hl", 190 /* xt_iclass_mac16a_da */,
- 0,
- Opcode_muls_da_hl_encode_fns, 0, 0 },
- { "muls.da.lh", 190 /* xt_iclass_mac16a_da */,
- 0,
- Opcode_muls_da_lh_encode_fns, 0, 0 },
- { "muls.da.hh", 190 /* xt_iclass_mac16a_da */,
- 0,
- Opcode_muls_da_hh_encode_fns, 0, 0 },
- { "mula.dd.ll", 191 /* xt_iclass_mac16a_dd */,
- 0,
- Opcode_mula_dd_ll_encode_fns, 0, 0 },
- { "mula.dd.hl", 191 /* xt_iclass_mac16a_dd */,
- 0,
- Opcode_mula_dd_hl_encode_fns, 0, 0 },
- { "mula.dd.lh", 191 /* xt_iclass_mac16a_dd */,
- 0,
- Opcode_mula_dd_lh_encode_fns, 0, 0 },
- { "mula.dd.hh", 191 /* xt_iclass_mac16a_dd */,
- 0,
- Opcode_mula_dd_hh_encode_fns, 0, 0 },
- { "muls.dd.ll", 191 /* xt_iclass_mac16a_dd */,
- 0,
- Opcode_muls_dd_ll_encode_fns, 0, 0 },
- { "muls.dd.hl", 191 /* xt_iclass_mac16a_dd */,
- 0,
- Opcode_muls_dd_hl_encode_fns, 0, 0 },
- { "muls.dd.lh", 191 /* xt_iclass_mac16a_dd */,
- 0,
- Opcode_muls_dd_lh_encode_fns, 0, 0 },
- { "muls.dd.hh", 191 /* xt_iclass_mac16a_dd */,
- 0,
- Opcode_muls_dd_hh_encode_fns, 0, 0 },
- { "mula.da.ll.lddec", 192 /* xt_iclass_mac16al_da */,
- 0,
- Opcode_mula_da_ll_lddec_encode_fns, 0, 0 },
- { "mula.da.ll.ldinc", 192 /* xt_iclass_mac16al_da */,
- 0,
- Opcode_mula_da_ll_ldinc_encode_fns, 0, 0 },
- { "mula.da.hl.lddec", 192 /* xt_iclass_mac16al_da */,
- 0,
- Opcode_mula_da_hl_lddec_encode_fns, 0, 0 },
- { "mula.da.hl.ldinc", 192 /* xt_iclass_mac16al_da */,
- 0,
- Opcode_mula_da_hl_ldinc_encode_fns, 0, 0 },
- { "mula.da.lh.lddec", 192 /* xt_iclass_mac16al_da */,
- 0,
- Opcode_mula_da_lh_lddec_encode_fns, 0, 0 },
- { "mula.da.lh.ldinc", 192 /* xt_iclass_mac16al_da */,
- 0,
- Opcode_mula_da_lh_ldinc_encode_fns, 0, 0 },
- { "mula.da.hh.lddec", 192 /* xt_iclass_mac16al_da */,
- 0,
- Opcode_mula_da_hh_lddec_encode_fns, 0, 0 },
- { "mula.da.hh.ldinc", 192 /* xt_iclass_mac16al_da */,
- 0,
- Opcode_mula_da_hh_ldinc_encode_fns, 0, 0 },
- { "mula.dd.ll.lddec", 193 /* xt_iclass_mac16al_dd */,
- 0,
- Opcode_mula_dd_ll_lddec_encode_fns, 0, 0 },
- { "mula.dd.ll.ldinc", 193 /* xt_iclass_mac16al_dd */,
- 0,
- Opcode_mula_dd_ll_ldinc_encode_fns, 0, 0 },
- { "mula.dd.hl.lddec", 193 /* xt_iclass_mac16al_dd */,
- 0,
- Opcode_mula_dd_hl_lddec_encode_fns, 0, 0 },
- { "mula.dd.hl.ldinc", 193 /* xt_iclass_mac16al_dd */,
- 0,
- Opcode_mula_dd_hl_ldinc_encode_fns, 0, 0 },
- { "mula.dd.lh.lddec", 193 /* xt_iclass_mac16al_dd */,
- 0,
- Opcode_mula_dd_lh_lddec_encode_fns, 0, 0 },
- { "mula.dd.lh.ldinc", 193 /* xt_iclass_mac16al_dd */,
- 0,
- Opcode_mula_dd_lh_ldinc_encode_fns, 0, 0 },
- { "mula.dd.hh.lddec", 193 /* xt_iclass_mac16al_dd */,
- 0,
- Opcode_mula_dd_hh_lddec_encode_fns, 0, 0 },
- { "mula.dd.hh.ldinc", 193 /* xt_iclass_mac16al_dd */,
- 0,
- Opcode_mula_dd_hh_ldinc_encode_fns, 0, 0 },
- { "lddec", 194 /* xt_iclass_mac16_l */,
- 0,
- Opcode_lddec_encode_fns, 0, 0 },
- { "ldinc", 194 /* xt_iclass_mac16_l */,
- 0,
- Opcode_ldinc_encode_fns, 0, 0 },
- { "mul16u", 195 /* xt_iclass_mul16 */,
- 0,
- Opcode_mul16u_encode_fns, 0, 0 },
- { "mul16s", 195 /* xt_iclass_mul16 */,
- 0,
- Opcode_mul16s_encode_fns, 0, 0 },
- { "rsr.m0", 196 /* xt_iclass_rsr.m0 */,
- 0,
- Opcode_rsr_m0_encode_fns, 0, 0 },
- { "wsr.m0", 197 /* xt_iclass_wsr.m0 */,
- 0,
- Opcode_wsr_m0_encode_fns, 0, 0 },
- { "xsr.m0", 198 /* xt_iclass_xsr.m0 */,
- 0,
- Opcode_xsr_m0_encode_fns, 0, 0 },
- { "rsr.m1", 199 /* xt_iclass_rsr.m1 */,
- 0,
- Opcode_rsr_m1_encode_fns, 0, 0 },
- { "wsr.m1", 200 /* xt_iclass_wsr.m1 */,
- 0,
- Opcode_wsr_m1_encode_fns, 0, 0 },
- { "xsr.m1", 201 /* xt_iclass_xsr.m1 */,
- 0,
- Opcode_xsr_m1_encode_fns, 0, 0 },
- { "rsr.m2", 202 /* xt_iclass_rsr.m2 */,
- 0,
- Opcode_rsr_m2_encode_fns, 0, 0 },
- { "wsr.m2", 203 /* xt_iclass_wsr.m2 */,
- 0,
- Opcode_wsr_m2_encode_fns, 0, 0 },
- { "xsr.m2", 204 /* xt_iclass_xsr.m2 */,
- 0,
- Opcode_xsr_m2_encode_fns, 0, 0 },
- { "rsr.m3", 205 /* xt_iclass_rsr.m3 */,
- 0,
- Opcode_rsr_m3_encode_fns, 0, 0 },
- { "wsr.m3", 206 /* xt_iclass_wsr.m3 */,
- 0,
- Opcode_wsr_m3_encode_fns, 0, 0 },
- { "xsr.m3", 207 /* xt_iclass_xsr.m3 */,
- 0,
- Opcode_xsr_m3_encode_fns, 0, 0 },
- { "rsr.acclo", 208 /* xt_iclass_rsr.acclo */,
- 0,
- Opcode_rsr_acclo_encode_fns, 0, 0 },
- { "wsr.acclo", 209 /* xt_iclass_wsr.acclo */,
- 0,
- Opcode_wsr_acclo_encode_fns, 0, 0 },
- { "xsr.acclo", 210 /* xt_iclass_xsr.acclo */,
- 0,
- Opcode_xsr_acclo_encode_fns, 0, 0 },
- { "rsr.acchi", 211 /* xt_iclass_rsr.acchi */,
- 0,
- Opcode_rsr_acchi_encode_fns, 0, 0 },
- { "wsr.acchi", 212 /* xt_iclass_wsr.acchi */,
- 0,
- Opcode_wsr_acchi_encode_fns, 0, 0 },
- { "xsr.acchi", 213 /* xt_iclass_xsr.acchi */,
- 0,
- Opcode_xsr_acchi_encode_fns, 0, 0 },
- { "rfi", 214 /* xt_iclass_rfi */,
- XTENSA_OPCODE_IS_JUMP,
- Opcode_rfi_encode_fns, 0, 0 },
- { "waiti", 215 /* xt_iclass_wait */,
- 0,
- Opcode_waiti_encode_fns, 0, 0 },
- { "rsr.interrupt", 216 /* xt_iclass_rsr.interrupt */,
- 0,
- Opcode_rsr_interrupt_encode_fns, 0, 0 },
- { "wsr.intset", 217 /* xt_iclass_wsr.intset */,
- 0,
- Opcode_wsr_intset_encode_fns, 0, 0 },
- { "wsr.intclear", 218 /* xt_iclass_wsr.intclear */,
- 0,
- Opcode_wsr_intclear_encode_fns, 0, 0 },
- { "rsr.intenable", 219 /* xt_iclass_rsr.intenable */,
- 0,
- Opcode_rsr_intenable_encode_fns, 0, 0 },
- { "wsr.intenable", 220 /* xt_iclass_wsr.intenable */,
- 0,
- Opcode_wsr_intenable_encode_fns, 0, 0 },
- { "xsr.intenable", 221 /* xt_iclass_xsr.intenable */,
- 0,
- Opcode_xsr_intenable_encode_fns, 0, 0 },
- { "break", 222 /* xt_iclass_break */,
- 0,
- Opcode_break_encode_fns, 0, 0 },
- { "break.n", 223 /* xt_iclass_break.n */,
- 0,
- Opcode_break_n_encode_fns, 0, 0 },
- { "rsr.dbreaka0", 224 /* xt_iclass_rsr.dbreaka0 */,
- 0,
- Opcode_rsr_dbreaka0_encode_fns, 0, 0 },
- { "wsr.dbreaka0", 225 /* xt_iclass_wsr.dbreaka0 */,
- 0,
- Opcode_wsr_dbreaka0_encode_fns, 0, 0 },
- { "xsr.dbreaka0", 226 /* xt_iclass_xsr.dbreaka0 */,
- 0,
- Opcode_xsr_dbreaka0_encode_fns, 0, 0 },
- { "rsr.dbreakc0", 227 /* xt_iclass_rsr.dbreakc0 */,
- 0,
- Opcode_rsr_dbreakc0_encode_fns, 0, 0 },
- { "wsr.dbreakc0", 228 /* xt_iclass_wsr.dbreakc0 */,
- 0,
- Opcode_wsr_dbreakc0_encode_fns, 0, 0 },
- { "xsr.dbreakc0", 229 /* xt_iclass_xsr.dbreakc0 */,
- 0,
- Opcode_xsr_dbreakc0_encode_fns, 0, 0 },
- { "rsr.dbreaka1", 230 /* xt_iclass_rsr.dbreaka1 */,
- 0,
- Opcode_rsr_dbreaka1_encode_fns, 0, 0 },
- { "wsr.dbreaka1", 231 /* xt_iclass_wsr.dbreaka1 */,
- 0,
- Opcode_wsr_dbreaka1_encode_fns, 0, 0 },
- { "xsr.dbreaka1", 232 /* xt_iclass_xsr.dbreaka1 */,
- 0,
- Opcode_xsr_dbreaka1_encode_fns, 0, 0 },
- { "rsr.dbreakc1", 233 /* xt_iclass_rsr.dbreakc1 */,
- 0,
- Opcode_rsr_dbreakc1_encode_fns, 0, 0 },
- { "wsr.dbreakc1", 234 /* xt_iclass_wsr.dbreakc1 */,
- 0,
- Opcode_wsr_dbreakc1_encode_fns, 0, 0 },
- { "xsr.dbreakc1", 235 /* xt_iclass_xsr.dbreakc1 */,
- 0,
- Opcode_xsr_dbreakc1_encode_fns, 0, 0 },
- { "rsr.ibreaka0", 236 /* xt_iclass_rsr.ibreaka0 */,
- 0,
- Opcode_rsr_ibreaka0_encode_fns, 0, 0 },
- { "wsr.ibreaka0", 237 /* xt_iclass_wsr.ibreaka0 */,
- 0,
- Opcode_wsr_ibreaka0_encode_fns, 0, 0 },
- { "xsr.ibreaka0", 238 /* xt_iclass_xsr.ibreaka0 */,
- 0,
- Opcode_xsr_ibreaka0_encode_fns, 0, 0 },
- { "rsr.ibreaka1", 239 /* xt_iclass_rsr.ibreaka1 */,
- 0,
- Opcode_rsr_ibreaka1_encode_fns, 0, 0 },
- { "wsr.ibreaka1", 240 /* xt_iclass_wsr.ibreaka1 */,
- 0,
- Opcode_wsr_ibreaka1_encode_fns, 0, 0 },
- { "xsr.ibreaka1", 241 /* xt_iclass_xsr.ibreaka1 */,
- 0,
- Opcode_xsr_ibreaka1_encode_fns, 0, 0 },
- { "rsr.ibreakenable", 242 /* xt_iclass_rsr.ibreakenable */,
- 0,
- Opcode_rsr_ibreakenable_encode_fns, 0, 0 },
- { "wsr.ibreakenable", 243 /* xt_iclass_wsr.ibreakenable */,
- 0,
- Opcode_wsr_ibreakenable_encode_fns, 0, 0 },
- { "xsr.ibreakenable", 244 /* xt_iclass_xsr.ibreakenable */,
- 0,
- Opcode_xsr_ibreakenable_encode_fns, 0, 0 },
- { "rsr.debugcause", 245 /* xt_iclass_rsr.debugcause */,
- 0,
- Opcode_rsr_debugcause_encode_fns, 0, 0 },
- { "wsr.debugcause", 246 /* xt_iclass_wsr.debugcause */,
- 0,
- Opcode_wsr_debugcause_encode_fns, 0, 0 },
- { "xsr.debugcause", 247 /* xt_iclass_xsr.debugcause */,
- 0,
- Opcode_xsr_debugcause_encode_fns, 0, 0 },
- { "rsr.icount", 248 /* xt_iclass_rsr.icount */,
- 0,
- Opcode_rsr_icount_encode_fns, 0, 0 },
- { "wsr.icount", 249 /* xt_iclass_wsr.icount */,
- 0,
- Opcode_wsr_icount_encode_fns, 0, 0 },
- { "xsr.icount", 250 /* xt_iclass_xsr.icount */,
- 0,
- Opcode_xsr_icount_encode_fns, 0, 0 },
- { "rsr.icountlevel", 251 /* xt_iclass_rsr.icountlevel */,
- 0,
- Opcode_rsr_icountlevel_encode_fns, 0, 0 },
- { "wsr.icountlevel", 252 /* xt_iclass_wsr.icountlevel */,
- 0,
- Opcode_wsr_icountlevel_encode_fns, 0, 0 },
- { "xsr.icountlevel", 253 /* xt_iclass_xsr.icountlevel */,
- 0,
- Opcode_xsr_icountlevel_encode_fns, 0, 0 },
- { "rsr.ddr", 254 /* xt_iclass_rsr.ddr */,
- 0,
- Opcode_rsr_ddr_encode_fns, 0, 0 },
- { "wsr.ddr", 255 /* xt_iclass_wsr.ddr */,
- 0,
- Opcode_wsr_ddr_encode_fns, 0, 0 },
- { "xsr.ddr", 256 /* xt_iclass_xsr.ddr */,
- 0,
- Opcode_xsr_ddr_encode_fns, 0, 0 },
- { "rfdo", 257 /* xt_iclass_rfdo */,
- XTENSA_OPCODE_IS_JUMP,
- Opcode_rfdo_encode_fns, 0, 0 },
- { "rfdd", 258 /* xt_iclass_rfdd */,
- XTENSA_OPCODE_IS_JUMP,
- Opcode_rfdd_encode_fns, 0, 0 },
- { "wsr.mmid", 259 /* xt_iclass_wsr.mmid */,
- 0,
- Opcode_wsr_mmid_encode_fns, 0, 0 },
- { "andb", 260 /* xt_iclass_bbool1 */,
- 0,
- Opcode_andb_encode_fns, 0, 0 },
- { "andbc", 260 /* xt_iclass_bbool1 */,
- 0,
- Opcode_andbc_encode_fns, 0, 0 },
- { "orb", 260 /* xt_iclass_bbool1 */,
- 0,
- Opcode_orb_encode_fns, 0, 0 },
- { "orbc", 260 /* xt_iclass_bbool1 */,
- 0,
- Opcode_orbc_encode_fns, 0, 0 },
- { "xorb", 260 /* xt_iclass_bbool1 */,
- 0,
- Opcode_xorb_encode_fns, 0, 0 },
- { "any4", 261 /* xt_iclass_bbool4 */,
- 0,
- Opcode_any4_encode_fns, 0, 0 },
- { "all4", 261 /* xt_iclass_bbool4 */,
- 0,
- Opcode_all4_encode_fns, 0, 0 },
- { "any8", 262 /* xt_iclass_bbool8 */,
- 0,
- Opcode_any8_encode_fns, 0, 0 },
- { "all8", 262 /* xt_iclass_bbool8 */,
- 0,
- Opcode_all8_encode_fns, 0, 0 },
- { "bf", 263 /* xt_iclass_bbranch */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bf_encode_fns, 0, 0 },
- { "bt", 263 /* xt_iclass_bbranch */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bt_encode_fns, 0, 0 },
- { "movf", 264 /* xt_iclass_bmove */,
- 0,
- Opcode_movf_encode_fns, 0, 0 },
- { "movt", 264 /* xt_iclass_bmove */,
- 0,
- Opcode_movt_encode_fns, 0, 0 },
- { "rsr.br", 265 /* xt_iclass_RSR.BR */,
- 0,
- Opcode_rsr_br_encode_fns, 0, 0 },
- { "wsr.br", 266 /* xt_iclass_WSR.BR */,
- 0,
- Opcode_wsr_br_encode_fns, 0, 0 },
- { "xsr.br", 267 /* xt_iclass_XSR.BR */,
- 0,
- Opcode_xsr_br_encode_fns, 0, 0 },
- { "rsr.ccount", 268 /* xt_iclass_rsr.ccount */,
- 0,
- Opcode_rsr_ccount_encode_fns, 0, 0 },
- { "wsr.ccount", 269 /* xt_iclass_wsr.ccount */,
- 0,
- Opcode_wsr_ccount_encode_fns, 0, 0 },
- { "xsr.ccount", 270 /* xt_iclass_xsr.ccount */,
- 0,
- Opcode_xsr_ccount_encode_fns, 0, 0 },
- { "rsr.ccompare0", 271 /* xt_iclass_rsr.ccompare0 */,
- 0,
- Opcode_rsr_ccompare0_encode_fns, 0, 0 },
- { "wsr.ccompare0", 272 /* xt_iclass_wsr.ccompare0 */,
- 0,
- Opcode_wsr_ccompare0_encode_fns, 0, 0 },
- { "xsr.ccompare0", 273 /* xt_iclass_xsr.ccompare0 */,
- 0,
- Opcode_xsr_ccompare0_encode_fns, 0, 0 },
- { "rsr.ccompare1", 274 /* xt_iclass_rsr.ccompare1 */,
- 0,
- Opcode_rsr_ccompare1_encode_fns, 0, 0 },
- { "wsr.ccompare1", 275 /* xt_iclass_wsr.ccompare1 */,
- 0,
- Opcode_wsr_ccompare1_encode_fns, 0, 0 },
- { "xsr.ccompare1", 276 /* xt_iclass_xsr.ccompare1 */,
- 0,
- Opcode_xsr_ccompare1_encode_fns, 0, 0 },
- { "rsr.ccompare2", 277 /* xt_iclass_rsr.ccompare2 */,
- 0,
- Opcode_rsr_ccompare2_encode_fns, 0, 0 },
- { "wsr.ccompare2", 278 /* xt_iclass_wsr.ccompare2 */,
- 0,
- Opcode_wsr_ccompare2_encode_fns, 0, 0 },
- { "xsr.ccompare2", 279 /* xt_iclass_xsr.ccompare2 */,
- 0,
- Opcode_xsr_ccompare2_encode_fns, 0, 0 },
- { "ipf", 280 /* xt_iclass_icache */,
- 0,
- Opcode_ipf_encode_fns, 0, 0 },
- { "ihi", 280 /* xt_iclass_icache */,
- 0,
- Opcode_ihi_encode_fns, 0, 0 },
- { "ipfl", 281 /* xt_iclass_icache_lock */,
- 0,
- Opcode_ipfl_encode_fns, 0, 0 },
- { "ihu", 281 /* xt_iclass_icache_lock */,
- 0,
- Opcode_ihu_encode_fns, 0, 0 },
- { "iiu", 281 /* xt_iclass_icache_lock */,
- 0,
- Opcode_iiu_encode_fns, 0, 0 },
- { "iii", 282 /* xt_iclass_icache_inv */,
- 0,
- Opcode_iii_encode_fns, 0, 0 },
- { "lict", 283 /* xt_iclass_licx */,
- 0,
- Opcode_lict_encode_fns, 0, 0 },
- { "licw", 283 /* xt_iclass_licx */,
- 0,
- Opcode_licw_encode_fns, 0, 0 },
- { "sict", 284 /* xt_iclass_sicx */,
- 0,
- Opcode_sict_encode_fns, 0, 0 },
- { "sicw", 284 /* xt_iclass_sicx */,
- 0,
- Opcode_sicw_encode_fns, 0, 0 },
- { "dhwb", 285 /* xt_iclass_dcache */,
- 0,
- Opcode_dhwb_encode_fns, 0, 0 },
- { "dhwbi", 285 /* xt_iclass_dcache */,
- 0,
- Opcode_dhwbi_encode_fns, 0, 0 },
- { "diwb", 286 /* xt_iclass_dcache_ind */,
- 0,
- Opcode_diwb_encode_fns, 0, 0 },
- { "diwbi", 286 /* xt_iclass_dcache_ind */,
- 0,
- Opcode_diwbi_encode_fns, 0, 0 },
- { "dhi", 287 /* xt_iclass_dcache_inv */,
- 0,
- Opcode_dhi_encode_fns, 0, 0 },
- { "dii", 287 /* xt_iclass_dcache_inv */,
- 0,
- Opcode_dii_encode_fns, 0, 0 },
- { "dpfr", 288 /* xt_iclass_dpf */,
- 0,
- Opcode_dpfr_encode_fns, 0, 0 },
- { "dpfw", 288 /* xt_iclass_dpf */,
- 0,
- Opcode_dpfw_encode_fns, 0, 0 },
- { "dpfro", 288 /* xt_iclass_dpf */,
- 0,
- Opcode_dpfro_encode_fns, 0, 0 },
- { "dpfwo", 288 /* xt_iclass_dpf */,
- 0,
- Opcode_dpfwo_encode_fns, 0, 0 },
- { "dpfl", 289 /* xt_iclass_dcache_lock */,
- 0,
- Opcode_dpfl_encode_fns, 0, 0 },
- { "dhu", 289 /* xt_iclass_dcache_lock */,
- 0,
- Opcode_dhu_encode_fns, 0, 0 },
- { "diu", 289 /* xt_iclass_dcache_lock */,
- 0,
- Opcode_diu_encode_fns, 0, 0 },
- { "sdct", 290 /* xt_iclass_sdct */,
- 0,
- Opcode_sdct_encode_fns, 0, 0 },
- { "ldct", 291 /* xt_iclass_ldct */,
- 0,
- Opcode_ldct_encode_fns, 0, 0 },
- { "wsr.ptevaddr", 292 /* xt_iclass_wsr.ptevaddr */,
- 0,
- Opcode_wsr_ptevaddr_encode_fns, 0, 0 },
- { "rsr.ptevaddr", 293 /* xt_iclass_rsr.ptevaddr */,
- 0,
- Opcode_rsr_ptevaddr_encode_fns, 0, 0 },
- { "xsr.ptevaddr", 294 /* xt_iclass_xsr.ptevaddr */,
- 0,
- Opcode_xsr_ptevaddr_encode_fns, 0, 0 },
- { "rsr.rasid", 295 /* xt_iclass_rsr.rasid */,
- 0,
- Opcode_rsr_rasid_encode_fns, 0, 0 },
- { "wsr.rasid", 296 /* xt_iclass_wsr.rasid */,
- 0,
- Opcode_wsr_rasid_encode_fns, 0, 0 },
- { "xsr.rasid", 297 /* xt_iclass_xsr.rasid */,
- 0,
- Opcode_xsr_rasid_encode_fns, 0, 0 },
- { "rsr.itlbcfg", 298 /* xt_iclass_rsr.itlbcfg */,
- 0,
- Opcode_rsr_itlbcfg_encode_fns, 0, 0 },
- { "wsr.itlbcfg", 299 /* xt_iclass_wsr.itlbcfg */,
- 0,
- Opcode_wsr_itlbcfg_encode_fns, 0, 0 },
- { "xsr.itlbcfg", 300 /* xt_iclass_xsr.itlbcfg */,
- 0,
- Opcode_xsr_itlbcfg_encode_fns, 0, 0 },
- { "rsr.dtlbcfg", 301 /* xt_iclass_rsr.dtlbcfg */,
- 0,
- Opcode_rsr_dtlbcfg_encode_fns, 0, 0 },
- { "wsr.dtlbcfg", 302 /* xt_iclass_wsr.dtlbcfg */,
- 0,
- Opcode_wsr_dtlbcfg_encode_fns, 0, 0 },
- { "xsr.dtlbcfg", 303 /* xt_iclass_xsr.dtlbcfg */,
- 0,
- Opcode_xsr_dtlbcfg_encode_fns, 0, 0 },
- { "idtlb", 304 /* xt_iclass_idtlb */,
- 0,
- Opcode_idtlb_encode_fns, 0, 0 },
- { "pdtlb", 305 /* xt_iclass_rdtlb */,
- 0,
- Opcode_pdtlb_encode_fns, 0, 0 },
- { "rdtlb0", 305 /* xt_iclass_rdtlb */,
- 0,
- Opcode_rdtlb0_encode_fns, 0, 0 },
- { "rdtlb1", 305 /* xt_iclass_rdtlb */,
- 0,
- Opcode_rdtlb1_encode_fns, 0, 0 },
- { "wdtlb", 306 /* xt_iclass_wdtlb */,
- 0,
- Opcode_wdtlb_encode_fns, 0, 0 },
- { "iitlb", 307 /* xt_iclass_iitlb */,
- 0,
- Opcode_iitlb_encode_fns, 0, 0 },
- { "pitlb", 308 /* xt_iclass_ritlb */,
- 0,
- Opcode_pitlb_encode_fns, 0, 0 },
- { "ritlb0", 308 /* xt_iclass_ritlb */,
- 0,
- Opcode_ritlb0_encode_fns, 0, 0 },
- { "ritlb1", 308 /* xt_iclass_ritlb */,
- 0,
- Opcode_ritlb1_encode_fns, 0, 0 },
- { "witlb", 309 /* xt_iclass_witlb */,
- 0,
- Opcode_witlb_encode_fns, 0, 0 },
- { "ldpte", 310 /* xt_iclass_ldpte */,
- 0,
- Opcode_ldpte_encode_fns, 0, 0 },
- { "hwwitlba", 311 /* xt_iclass_hwwitlba */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_hwwitlba_encode_fns, 0, 0 },
- { "hwwdtlba", 312 /* xt_iclass_hwwdtlba */,
- 0,
- Opcode_hwwdtlba_encode_fns, 0, 0 },
- { "rsr.cpenable", 313 /* xt_iclass_rsr.cpenable */,
- 0,
- Opcode_rsr_cpenable_encode_fns, 0, 0 },
- { "wsr.cpenable", 314 /* xt_iclass_wsr.cpenable */,
- 0,
- Opcode_wsr_cpenable_encode_fns, 0, 0 },
- { "xsr.cpenable", 315 /* xt_iclass_xsr.cpenable */,
- 0,
- Opcode_xsr_cpenable_encode_fns, 0, 0 },
- { "clamps", 316 /* xt_iclass_clamp */,
- 0,
- Opcode_clamps_encode_fns, 0, 0 },
- { "min", 317 /* xt_iclass_minmax */,
- 0,
- Opcode_min_encode_fns, 0, 0 },
- { "max", 317 /* xt_iclass_minmax */,
- 0,
- Opcode_max_encode_fns, 0, 0 },
- { "minu", 317 /* xt_iclass_minmax */,
- 0,
- Opcode_minu_encode_fns, 0, 0 },
- { "maxu", 317 /* xt_iclass_minmax */,
- 0,
- Opcode_maxu_encode_fns, 0, 0 },
- { "nsa", 318 /* xt_iclass_nsa */,
- 0,
- Opcode_nsa_encode_fns, 0, 0 },
- { "nsau", 318 /* xt_iclass_nsa */,
- 0,
- Opcode_nsau_encode_fns, 0, 0 },
- { "sext", 319 /* xt_iclass_sx */,
- 0,
- Opcode_sext_encode_fns, 0, 0 },
- { "l32ai", 320 /* xt_iclass_l32ai */,
- 0,
- Opcode_l32ai_encode_fns, 0, 0 },
- { "s32ri", 321 /* xt_iclass_s32ri */,
- 0,
- Opcode_s32ri_encode_fns, 0, 0 },
- { "s32c1i", 322 /* xt_iclass_s32c1i */,
- 0,
- Opcode_s32c1i_encode_fns, 0, 0 },
- { "rsr.scompare1", 323 /* xt_iclass_rsr.scompare1 */,
- 0,
- Opcode_rsr_scompare1_encode_fns, 0, 0 },
- { "wsr.scompare1", 324 /* xt_iclass_wsr.scompare1 */,
- 0,
- Opcode_wsr_scompare1_encode_fns, 0, 0 },
- { "xsr.scompare1", 325 /* xt_iclass_xsr.scompare1 */,
- 0,
- Opcode_xsr_scompare1_encode_fns, 0, 0 },
- { "quou", 326 /* xt_iclass_div */,
- 0,
- Opcode_quou_encode_fns, 0, 0 },
- { "quos", 326 /* xt_iclass_div */,
- 0,
- Opcode_quos_encode_fns, 0, 0 },
- { "remu", 326 /* xt_iclass_div */,
- 0,
- Opcode_remu_encode_fns, 0, 0 },
- { "rems", 326 /* xt_iclass_div */,
- 0,
- Opcode_rems_encode_fns, 0, 0 },
- { "mull", 327 /* xt_mul32 */,
- 0,
- Opcode_mull_encode_fns, 0, 0 },
- { "muluh", 327 /* xt_mul32 */,
- 0,
- Opcode_muluh_encode_fns, 0, 0 },
- { "mulsh", 327 /* xt_mul32 */,
- 0,
- Opcode_mulsh_encode_fns, 0, 0 },
- { "rur.fcr", 328 /* rur_fcr */,
- 0,
- Opcode_rur_fcr_encode_fns, 0, 0 },
- { "wur.fcr", 329 /* wur_fcr */,
- 0,
- Opcode_wur_fcr_encode_fns, 0, 0 },
- { "rur.fsr", 330 /* rur_fsr */,
- 0,
- Opcode_rur_fsr_encode_fns, 0, 0 },
- { "wur.fsr", 331 /* wur_fsr */,
- 0,
- Opcode_wur_fsr_encode_fns, 0, 0 },
- { "add.s", 332 /* fp */,
- 0,
- Opcode_add_s_encode_fns, 0, 0 },
- { "sub.s", 332 /* fp */,
- 0,
- Opcode_sub_s_encode_fns, 0, 0 },
- { "mul.s", 332 /* fp */,
- 0,
- Opcode_mul_s_encode_fns, 0, 0 },
- { "madd.s", 333 /* fp_mac */,
- 0,
- Opcode_madd_s_encode_fns, 0, 0 },
- { "msub.s", 333 /* fp_mac */,
- 0,
- Opcode_msub_s_encode_fns, 0, 0 },
- { "movf.s", 334 /* fp_cmov */,
- 0,
- Opcode_movf_s_encode_fns, 0, 0 },
- { "movt.s", 334 /* fp_cmov */,
- 0,
- Opcode_movt_s_encode_fns, 0, 0 },
- { "moveqz.s", 335 /* fp_mov */,
- 0,
- Opcode_moveqz_s_encode_fns, 0, 0 },
- { "movnez.s", 335 /* fp_mov */,
- 0,
- Opcode_movnez_s_encode_fns, 0, 0 },
- { "movltz.s", 335 /* fp_mov */,
- 0,
- Opcode_movltz_s_encode_fns, 0, 0 },
- { "movgez.s", 335 /* fp_mov */,
- 0,
- Opcode_movgez_s_encode_fns, 0, 0 },
- { "abs.s", 336 /* fp_mov2 */,
- 0,
- Opcode_abs_s_encode_fns, 0, 0 },
- { "mov.s", 336 /* fp_mov2 */,
- 0,
- Opcode_mov_s_encode_fns, 0, 0 },
- { "neg.s", 336 /* fp_mov2 */,
- 0,
- Opcode_neg_s_encode_fns, 0, 0 },
- { "un.s", 337 /* fp_cmp */,
- 0,
- Opcode_un_s_encode_fns, 0, 0 },
- { "oeq.s", 337 /* fp_cmp */,
- 0,
- Opcode_oeq_s_encode_fns, 0, 0 },
- { "ueq.s", 337 /* fp_cmp */,
- 0,
- Opcode_ueq_s_encode_fns, 0, 0 },
- { "olt.s", 337 /* fp_cmp */,
- 0,
- Opcode_olt_s_encode_fns, 0, 0 },
- { "ult.s", 337 /* fp_cmp */,
- 0,
- Opcode_ult_s_encode_fns, 0, 0 },
- { "ole.s", 337 /* fp_cmp */,
- 0,
- Opcode_ole_s_encode_fns, 0, 0 },
- { "ule.s", 337 /* fp_cmp */,
- 0,
- Opcode_ule_s_encode_fns, 0, 0 },
- { "float.s", 338 /* fp_float */,
- 0,
- Opcode_float_s_encode_fns, 0, 0 },
- { "ufloat.s", 338 /* fp_float */,
- 0,
- Opcode_ufloat_s_encode_fns, 0, 0 },
- { "round.s", 339 /* fp_int */,
- 0,
- Opcode_round_s_encode_fns, 0, 0 },
- { "ceil.s", 339 /* fp_int */,
- 0,
- Opcode_ceil_s_encode_fns, 0, 0 },
- { "floor.s", 339 /* fp_int */,
- 0,
- Opcode_floor_s_encode_fns, 0, 0 },
- { "trunc.s", 339 /* fp_int */,
- 0,
- Opcode_trunc_s_encode_fns, 0, 0 },
- { "utrunc.s", 339 /* fp_int */,
- 0,
- Opcode_utrunc_s_encode_fns, 0, 0 },
- { "rfr", 340 /* fp_rfr */,
- 0,
- Opcode_rfr_encode_fns, 0, 0 },
- { "wfr", 341 /* fp_wfr */,
- 0,
- Opcode_wfr_encode_fns, 0, 0 },
- { "lsi", 342 /* fp_lsi */,
- 0,
- Opcode_lsi_encode_fns, 0, 0 },
- { "lsiu", 343 /* fp_lsiu */,
- 0,
- Opcode_lsiu_encode_fns, 0, 0 },
- { "lsx", 344 /* fp_lsx */,
- 0,
- Opcode_lsx_encode_fns, 0, 0 },
- { "lsxu", 345 /* fp_lsxu */,
- 0,
- Opcode_lsxu_encode_fns, 0, 0 },
- { "ssi", 346 /* fp_ssi */,
- 0,
- Opcode_ssi_encode_fns, 0, 0 },
- { "ssiu", 347 /* fp_ssiu */,
- 0,
- Opcode_ssiu_encode_fns, 0, 0 },
- { "ssx", 348 /* fp_ssx */,
- 0,
- Opcode_ssx_encode_fns, 0, 0 },
- { "ssxu", 349 /* fp_ssxu */,
- 0,
- Opcode_ssxu_encode_fns, 0, 0 },
- { "beqz.w18", 350 /* xt_iclass_wb18_0 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_beqz_w18_encode_fns, 0, 0 },
- { "bnez.w18", 350 /* xt_iclass_wb18_0 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bnez_w18_encode_fns, 0, 0 },
- { "bgez.w18", 350 /* xt_iclass_wb18_0 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bgez_w18_encode_fns, 0, 0 },
- { "bltz.w18", 350 /* xt_iclass_wb18_0 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bltz_w18_encode_fns, 0, 0 },
- { "beqi.w18", 351 /* xt_iclass_wb18_1 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_beqi_w18_encode_fns, 0, 0 },
- { "bnei.w18", 351 /* xt_iclass_wb18_1 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bnei_w18_encode_fns, 0, 0 },
- { "bgei.w18", 351 /* xt_iclass_wb18_1 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bgei_w18_encode_fns, 0, 0 },
- { "blti.w18", 351 /* xt_iclass_wb18_1 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_blti_w18_encode_fns, 0, 0 },
- { "bgeui.w18", 352 /* xt_iclass_wb18_2 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bgeui_w18_encode_fns, 0, 0 },
- { "bltui.w18", 352 /* xt_iclass_wb18_2 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bltui_w18_encode_fns, 0, 0 },
- { "bbci.w18", 353 /* xt_iclass_wb18_3 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bbci_w18_encode_fns, 0, 0 },
- { "bbsi.w18", 353 /* xt_iclass_wb18_3 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bbsi_w18_encode_fns, 0, 0 },
- { "beq.w18", 354 /* xt_iclass_wb18_4 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_beq_w18_encode_fns, 0, 0 },
- { "bne.w18", 354 /* xt_iclass_wb18_4 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bne_w18_encode_fns, 0, 0 },
- { "bge.w18", 354 /* xt_iclass_wb18_4 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bge_w18_encode_fns, 0, 0 },
- { "blt.w18", 354 /* xt_iclass_wb18_4 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_blt_w18_encode_fns, 0, 0 },
- { "bgeu.w18", 354 /* xt_iclass_wb18_4 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bgeu_w18_encode_fns, 0, 0 },
- { "bltu.w18", 354 /* xt_iclass_wb18_4 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bltu_w18_encode_fns, 0, 0 },
- { "bany.w18", 354 /* xt_iclass_wb18_4 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bany_w18_encode_fns, 0, 0 },
- { "bnone.w18", 354 /* xt_iclass_wb18_4 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bnone_w18_encode_fns, 0, 0 },
- { "ball.w18", 354 /* xt_iclass_wb18_4 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_ball_w18_encode_fns, 0, 0 },
- { "bnall.w18", 354 /* xt_iclass_wb18_4 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bnall_w18_encode_fns, 0, 0 },
- { "bbc.w18", 354 /* xt_iclass_wb18_4 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bbc_w18_encode_fns, 0, 0 },
- { "bbs.w18", 354 /* xt_iclass_wb18_4 */,
- XTENSA_OPCODE_IS_BRANCH,
- Opcode_bbs_w18_encode_fns, 0, 0 }
-};
-
-
-/* Slot-specific opcode decode functions. */
-
-static int
-Slot_inst_decode (const xtensa_insnbuf insn)
-{
- switch (Field_op0_Slot_inst_get (insn))
- {
- case 0:
- switch (Field_op1_Slot_inst_get (insn))
- {
- case 0:
- switch (Field_op2_Slot_inst_get (insn))
- {
- case 0:
- switch (Field_r_Slot_inst_get (insn))
- {
- case 0:
- switch (Field_m_Slot_inst_get (insn))
- {
- case 0:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_n_Slot_inst_get (insn) == 0) {
- return 79; /* ill */
- }
- break;
- case 2:
- switch (Field_n_Slot_inst_get (insn))
- {
- case 0:
- return 98; /* ret */
- case 1:
- return 14; /* retw */
- case 2:
- return 81; /* jx */
- }
- break;
- case 3:
- switch (Field_n_Slot_inst_get (insn))
- {
- case 0:
- return 77; /* callx0 */
- case 1:
- return 10; /* callx4 */
- case 2:
- return 9; /* callx8 */
- case 3:
- return 8; /* callx12 */
- }
- break;
- }
- break;
- case 1:
- return 12; /* movsp */
- case 2:
- if (Field_s_Slot_inst_get (insn) == 0)
- {
- switch (Field_t_Slot_inst_get (insn))
- {
- case 0:
- return 116; /* isync */
- case 1:
- return 117; /* rsync */
- case 2:
- return 118; /* esync */
- case 3:
- return 119; /* dsync */
- case 8:
- return 0; /* excw */
- case 12:
- return 114; /* memw */
- case 13:
- return 115; /* extw */
- case 15:
- return 97; /* nop */
- }
- }
- break;
- case 3:
- switch (Field_t_Slot_inst_get (insn))
- {
- case 0:
- switch (Field_s_Slot_inst_get (insn))
- {
- case 0:
- return 1; /* rfe */
- case 2:
- return 2; /* rfde */
- case 4:
- return 16; /* rfwo */
- case 5:
- return 17; /* rfwu */
- }
- break;
- case 1:
- return 316; /* rfi */
- }
- break;
- case 4:
- return 324; /* break */
- case 5:
- switch (Field_s_Slot_inst_get (insn))
- {
- case 0:
- if (Field_t_Slot_inst_get (insn) == 0) {
- return 3; /* syscall */
- }
- break;
- case 1:
- if (Field_t_Slot_inst_get (insn) == 0) {
- return 4; /* simcall */
- }
- break;
- }
- break;
- case 6:
- return 120; /* rsil */
- case 7:
- if (Field_t_Slot_inst_get (insn) == 0) {
- return 317; /* waiti */
- }
- break;
- case 8:
- return 367; /* any4 */
- case 9:
- return 368; /* all4 */
- case 10:
- return 369; /* any8 */
- case 11:
- return 370; /* all8 */
- }
- break;
- case 1:
- return 49; /* and */
- case 2:
- return 50; /* or */
- case 3:
- return 51; /* xor */
- case 4:
- switch (Field_r_Slot_inst_get (insn))
- {
- case 0:
- if (Field_t_Slot_inst_get (insn) == 0) {
- return 102; /* ssr */
- }
- break;
- case 1:
- if (Field_t_Slot_inst_get (insn) == 0) {
- return 103; /* ssl */
- }
- break;
- case 2:
- if (Field_t_Slot_inst_get (insn) == 0) {
- return 104; /* ssa8l */
- }
- break;
- case 3:
- if (Field_t_Slot_inst_get (insn) == 0) {
- return 105; /* ssa8b */
- }
- break;
- case 4:
- if (Field_thi3_Slot_inst_get (insn) == 0) {
- return 106; /* ssai */
- }
- break;
- case 8:
- if (Field_s_Slot_inst_get (insn) == 0) {
- return 13; /* rotw */
- }
- break;
- case 14:
- return 448; /* nsa */
- case 15:
- return 449; /* nsau */
- }
- break;
- case 5:
- switch (Field_r_Slot_inst_get (insn))
- {
- case 1:
- return 438; /* hwwitlba */
- case 3:
- return 434; /* ritlb0 */
- case 4:
- if (Field_t_Slot_inst_get (insn) == 0) {
- return 432; /* iitlb */
- }
- break;
- case 5:
- return 433; /* pitlb */
- case 6:
- return 436; /* witlb */
- case 7:
- return 435; /* ritlb1 */
- case 9:
- return 439; /* hwwdtlba */
- case 11:
- return 429; /* rdtlb0 */
- case 12:
- if (Field_t_Slot_inst_get (insn) == 0) {
- return 427; /* idtlb */
- }
- break;
- case 13:
- return 428; /* pdtlb */
- case 14:
- return 431; /* wdtlb */
- case 15:
- return 430; /* rdtlb1 */
- }
- break;
- case 6:
- switch (Field_s_Slot_inst_get (insn))
- {
- case 0:
- return 95; /* neg */
- case 1:
- return 96; /* abs */
- }
- break;
- case 8:
- return 41; /* add */
- case 9:
- return 43; /* addx2 */
- case 10:
- return 44; /* addx4 */
- case 11:
- return 45; /* addx8 */
- case 12:
- return 42; /* sub */
- case 13:
- return 46; /* subx2 */
- case 14:
- return 47; /* subx4 */
- case 15:
- return 48; /* subx8 */
- }
- break;
- case 1:
- switch (Field_op2_Slot_inst_get (insn))
- {
- case 0:
- case 1:
- return 111; /* slli */
- case 2:
- case 3:
- return 112; /* srai */
- case 4:
- return 113; /* srli */
- case 6:
- switch (Field_sr_Slot_inst_get (insn))
- {
- case 0:
- return 129; /* xsr.lbeg */
- case 1:
- return 123; /* xsr.lend */
- case 2:
- return 126; /* xsr.lcount */
- case 3:
- return 132; /* xsr.sar */
- case 4:
- return 377; /* xsr.br */
- case 5:
- return 135; /* xsr.litbase */
- case 12:
- return 456; /* xsr.scompare1 */
- case 16:
- return 312; /* xsr.acclo */
- case 17:
- return 315; /* xsr.acchi */
- case 32:
- return 300; /* xsr.m0 */
- case 33:
- return 303; /* xsr.m1 */
- case 34:
- return 306; /* xsr.m2 */
- case 35:
- return 309; /* xsr.m3 */
- case 72:
- return 22; /* xsr.windowbase */
- case 73:
- return 25; /* xsr.windowstart */
- case 83:
- return 417; /* xsr.ptevaddr */
- case 90:
- return 420; /* xsr.rasid */
- case 91:
- return 423; /* xsr.itlbcfg */
- case 92:
- return 426; /* xsr.dtlbcfg */
- case 96:
- return 346; /* xsr.ibreakenable */
- case 104:
- return 358; /* xsr.ddr */
- case 128:
- return 340; /* xsr.ibreaka0 */
- case 129:
- return 343; /* xsr.ibreaka1 */
- case 144:
- return 328; /* xsr.dbreaka0 */
- case 145:
- return 334; /* xsr.dbreaka1 */
- case 160:
- return 331; /* xsr.dbreakc0 */
- case 161:
- return 337; /* xsr.dbreakc1 */
- case 177:
- return 143; /* xsr.epc1 */
- case 178:
- return 149; /* xsr.epc2 */
- case 179:
- return 155; /* xsr.epc3 */
- case 180:
- return 161; /* xsr.epc4 */
- case 181:
- return 167; /* xsr.epc5 */
- case 182:
- return 173; /* xsr.epc6 */
- case 183:
- return 179; /* xsr.epc7 */
- case 192:
- return 206; /* xsr.depc */
- case 194:
- return 185; /* xsr.eps2 */
- case 195:
- return 188; /* xsr.eps3 */
- case 196:
- return 191; /* xsr.eps4 */
- case 197:
- return 194; /* xsr.eps5 */
- case 198:
- return 197; /* xsr.eps6 */
- case 199:
- return 200; /* xsr.eps7 */
- case 209:
- return 146; /* xsr.excsave1 */
- case 210:
- return 152; /* xsr.excsave2 */
- case 211:
- return 158; /* xsr.excsave3 */
- case 212:
- return 164; /* xsr.excsave4 */
- case 213:
- return 170; /* xsr.excsave5 */
- case 214:
- return 176; /* xsr.excsave6 */
- case 215:
- return 182; /* xsr.excsave7 */
- case 224:
- return 442; /* xsr.cpenable */
- case 228:
- return 323; /* xsr.intenable */
- case 230:
- return 140; /* xsr.ps */
- case 231:
- return 225; /* xsr.vecbase */
- case 232:
- return 209; /* xsr.exccause */
- case 233:
- return 349; /* xsr.debugcause */
- case 234:
- return 380; /* xsr.ccount */
- case 236:
- return 352; /* xsr.icount */
- case 237:
- return 355; /* xsr.icountlevel */
- case 238:
- return 203; /* xsr.excvaddr */
- case 240:
- return 383; /* xsr.ccompare0 */
- case 241:
- return 386; /* xsr.ccompare1 */
- case 242:
- return 389; /* xsr.ccompare2 */
- case 244:
- return 212; /* xsr.misc0 */
- case 245:
- return 215; /* xsr.misc1 */
- case 246:
- return 218; /* xsr.misc2 */
- case 247:
- return 221; /* xsr.misc3 */
- }
- break;
- case 8:
- return 108; /* src */
- case 9:
- if (Field_s_Slot_inst_get (insn) == 0) {
- return 109; /* srl */
- }
- break;
- case 10:
- if (Field_t_Slot_inst_get (insn) == 0) {
- return 107; /* sll */
- }
- break;
- case 11:
- if (Field_s_Slot_inst_get (insn) == 0) {
- return 110; /* sra */
- }
- break;
- case 12:
- return 296; /* mul16u */
- case 13:
- return 297; /* mul16s */
- case 15:
- switch (Field_r_Slot_inst_get (insn))
- {
- case 0:
- return 396; /* lict */
- case 1:
- return 398; /* sict */
- case 2:
- return 397; /* licw */
- case 3:
- return 399; /* sicw */
- case 8:
- return 414; /* ldct */
- case 9:
- return 413; /* sdct */
- case 14:
- if (Field_t_Slot_inst_get (insn) == 0) {
- return 359; /* rfdo */
- }
- if (Field_t_Slot_inst_get (insn) == 1) {
- return 360; /* rfdd */
- }
- break;
- case 15:
- return 437; /* ldpte */
- }
- break;
- }
- break;
- case 2:
- switch (Field_op2_Slot_inst_get (insn))
- {
- case 0:
- return 362; /* andb */
- case 1:
- return 363; /* andbc */
- case 2:
- return 364; /* orb */
- case 3:
- return 365; /* orbc */
- case 4:
- return 366; /* xorb */
- case 8:
- return 461; /* mull */
- case 10:
- return 462; /* muluh */
- case 11:
- return 463; /* mulsh */
- case 12:
- return 457; /* quou */
- case 13:
- return 458; /* quos */
- case 14:
- return 459; /* remu */
- case 15:
- return 460; /* rems */
- }
- break;
- case 3:
- switch (Field_op2_Slot_inst_get (insn))
- {
- case 0:
- switch (Field_sr_Slot_inst_get (insn))
- {
- case 0:
- return 127; /* rsr.lbeg */
- case 1:
- return 121; /* rsr.lend */
- case 2:
- return 124; /* rsr.lcount */
- case 3:
- return 130; /* rsr.sar */
- case 4:
- return 375; /* rsr.br */
- case 5:
- return 133; /* rsr.litbase */
- case 12:
- return 454; /* rsr.scompare1 */
- case 16:
- return 310; /* rsr.acclo */
- case 17:
- return 313; /* rsr.acchi */
- case 32:
- return 298; /* rsr.m0 */
- case 33:
- return 301; /* rsr.m1 */
- case 34:
- return 304; /* rsr.m2 */
- case 35:
- return 307; /* rsr.m3 */
- case 72:
- return 20; /* rsr.windowbase */
- case 73:
- return 23; /* rsr.windowstart */
- case 83:
- return 416; /* rsr.ptevaddr */
- case 90:
- return 418; /* rsr.rasid */
- case 91:
- return 421; /* rsr.itlbcfg */
- case 92:
- return 424; /* rsr.dtlbcfg */
- case 96:
- return 344; /* rsr.ibreakenable */
- case 104:
- return 356; /* rsr.ddr */
- case 128:
- return 338; /* rsr.ibreaka0 */
- case 129:
- return 341; /* rsr.ibreaka1 */
- case 144:
- return 326; /* rsr.dbreaka0 */
- case 145:
- return 332; /* rsr.dbreaka1 */
- case 160:
- return 329; /* rsr.dbreakc0 */
- case 161:
- return 335; /* rsr.dbreakc1 */
- case 176:
- return 136; /* rsr.176 */
- case 177:
- return 141; /* rsr.epc1 */
- case 178:
- return 147; /* rsr.epc2 */
- case 179:
- return 153; /* rsr.epc3 */
- case 180:
- return 159; /* rsr.epc4 */
- case 181:
- return 165; /* rsr.epc5 */
- case 182:
- return 171; /* rsr.epc6 */
- case 183:
- return 177; /* rsr.epc7 */
- case 192:
- return 204; /* rsr.depc */
- case 194:
- return 183; /* rsr.eps2 */
- case 195:
- return 186; /* rsr.eps3 */
- case 196:
- return 189; /* rsr.eps4 */
- case 197:
- return 192; /* rsr.eps5 */
- case 198:
- return 195; /* rsr.eps6 */
- case 199:
- return 198; /* rsr.eps7 */
- case 208:
- return 137; /* rsr.208 */
- case 209:
- return 144; /* rsr.excsave1 */
- case 210:
- return 150; /* rsr.excsave2 */
- case 211:
- return 156; /* rsr.excsave3 */
- case 212:
- return 162; /* rsr.excsave4 */
- case 213:
- return 168; /* rsr.excsave5 */
- case 214:
- return 174; /* rsr.excsave6 */
- case 215:
- return 180; /* rsr.excsave7 */
- case 224:
- return 440; /* rsr.cpenable */
- case 226:
- return 318; /* rsr.interrupt */
- case 228:
- return 321; /* rsr.intenable */
- case 230:
- return 138; /* rsr.ps */
- case 231:
- return 223; /* rsr.vecbase */
- case 232:
- return 207; /* rsr.exccause */
- case 233:
- return 347; /* rsr.debugcause */
- case 234:
- return 378; /* rsr.ccount */
- case 235:
- return 222; /* rsr.prid */
- case 236:
- return 350; /* rsr.icount */
- case 237:
- return 353; /* rsr.icountlevel */
- case 238:
- return 201; /* rsr.excvaddr */
- case 240:
- return 381; /* rsr.ccompare0 */
- case 241:
- return 384; /* rsr.ccompare1 */
- case 242:
- return 387; /* rsr.ccompare2 */
- case 244:
- return 210; /* rsr.misc0 */
- case 245:
- return 213; /* rsr.misc1 */
- case 246:
- return 216; /* rsr.misc2 */
- case 247:
- return 219; /* rsr.misc3 */
- }
- break;
- case 1:
- switch (Field_sr_Slot_inst_get (insn))
- {
- case 0:
- return 128; /* wsr.lbeg */
- case 1:
- return 122; /* wsr.lend */
- case 2:
- return 125; /* wsr.lcount */
- case 3:
- return 131; /* wsr.sar */
- case 4:
- return 376; /* wsr.br */
- case 5:
- return 134; /* wsr.litbase */
- case 12:
- return 455; /* wsr.scompare1 */
- case 16:
- return 311; /* wsr.acclo */
- case 17:
- return 314; /* wsr.acchi */
- case 32:
- return 299; /* wsr.m0 */
- case 33:
- return 302; /* wsr.m1 */
- case 34:
- return 305; /* wsr.m2 */
- case 35:
- return 308; /* wsr.m3 */
- case 72:
- return 21; /* wsr.windowbase */
- case 73:
- return 24; /* wsr.windowstart */
- case 83:
- return 415; /* wsr.ptevaddr */
- case 89:
- return 361; /* wsr.mmid */
- case 90:
- return 419; /* wsr.rasid */
- case 91:
- return 422; /* wsr.itlbcfg */
- case 92:
- return 425; /* wsr.dtlbcfg */
- case 96:
- return 345; /* wsr.ibreakenable */
- case 104:
- return 357; /* wsr.ddr */
- case 128:
- return 339; /* wsr.ibreaka0 */
- case 129:
- return 342; /* wsr.ibreaka1 */
- case 144:
- return 327; /* wsr.dbreaka0 */
- case 145:
- return 333; /* wsr.dbreaka1 */
- case 160:
- return 330; /* wsr.dbreakc0 */
- case 161:
- return 336; /* wsr.dbreakc1 */
- case 177:
- return 142; /* wsr.epc1 */
- case 178:
- return 148; /* wsr.epc2 */
- case 179:
- return 154; /* wsr.epc3 */
- case 180:
- return 160; /* wsr.epc4 */
- case 181:
- return 166; /* wsr.epc5 */
- case 182:
- return 172; /* wsr.epc6 */
- case 183:
- return 178; /* wsr.epc7 */
- case 192:
- return 205; /* wsr.depc */
- case 194:
- return 184; /* wsr.eps2 */
- case 195:
- return 187; /* wsr.eps3 */
- case 196:
- return 190; /* wsr.eps4 */
- case 197:
- return 193; /* wsr.eps5 */
- case 198:
- return 196; /* wsr.eps6 */
- case 199:
- return 199; /* wsr.eps7 */
- case 209:
- return 145; /* wsr.excsave1 */
- case 210:
- return 151; /* wsr.excsave2 */
- case 211:
- return 157; /* wsr.excsave3 */
- case 212:
- return 163; /* wsr.excsave4 */
- case 213:
- return 169; /* wsr.excsave5 */
- case 214:
- return 175; /* wsr.excsave6 */
- case 215:
- return 181; /* wsr.excsave7 */
- case 224:
- return 441; /* wsr.cpenable */
- case 226:
- return 319; /* wsr.intset */
- case 227:
- return 320; /* wsr.intclear */
- case 228:
- return 322; /* wsr.intenable */
- case 230:
- return 139; /* wsr.ps */
- case 231:
- return 224; /* wsr.vecbase */
- case 232:
- return 208; /* wsr.exccause */
- case 233:
- return 348; /* wsr.debugcause */
- case 234:
- return 379; /* wsr.ccount */
- case 236:
- return 351; /* wsr.icount */
- case 237:
- return 354; /* wsr.icountlevel */
- case 238:
- return 202; /* wsr.excvaddr */
- case 240:
- return 382; /* wsr.ccompare0 */
- case 241:
- return 385; /* wsr.ccompare1 */
- case 242:
- return 388; /* wsr.ccompare2 */
- case 244:
- return 211; /* wsr.misc0 */
- case 245:
- return 214; /* wsr.misc1 */
- case 246:
- return 217; /* wsr.misc2 */
- case 247:
- return 220; /* wsr.misc3 */
- }
- break;
- case 2:
- return 450; /* sext */
- case 3:
- return 443; /* clamps */
- case 4:
- return 444; /* min */
- case 5:
- return 445; /* max */
- case 6:
- return 446; /* minu */
- case 7:
- return 447; /* maxu */
- case 8:
- return 91; /* moveqz */
- case 9:
- return 92; /* movnez */
- case 10:
- return 93; /* movltz */
- case 11:
- return 94; /* movgez */
- case 12:
- return 373; /* movf */
- case 13:
- return 374; /* movt */
- case 14:
- switch (Field_st_Slot_inst_get (insn))
- {
- case 231:
- return 37; /* rur.threadptr */
- case 232:
- return 464; /* rur.fcr */
- case 233:
- return 466; /* rur.fsr */
- }
- break;
- case 15:
- switch (Field_sr_Slot_inst_get (insn))
- {
- case 231:
- return 38; /* wur.threadptr */
- case 232:
- return 465; /* wur.fcr */
- case 233:
- return 467; /* wur.fsr */
- }
- break;
- }
- break;
- case 4:
- case 5:
- return 78; /* extui */
- case 8:
- switch (Field_op2_Slot_inst_get (insn))
- {
- case 0:
- return 500; /* lsx */
- case 1:
- return 501; /* lsxu */
- case 4:
- return 504; /* ssx */
- case 5:
- return 505; /* ssxu */
- }
- break;
- case 9:
- switch (Field_op2_Slot_inst_get (insn))
- {
- case 0:
- return 18; /* l32e */
- case 4:
- return 19; /* s32e */
- }
- break;
- case 10:
- switch (Field_op2_Slot_inst_get (insn))
- {
- case 0:
- return 468; /* add.s */
- case 1:
- return 469; /* sub.s */
- case 2:
- return 470; /* mul.s */
- case 4:
- return 471; /* madd.s */
- case 5:
- return 472; /* msub.s */
- case 8:
- return 491; /* round.s */
- case 9:
- return 494; /* trunc.s */
- case 10:
- return 493; /* floor.s */
- case 11:
- return 492; /* ceil.s */
- case 12:
- return 489; /* float.s */
- case 13:
- return 490; /* ufloat.s */
- case 14:
- return 495; /* utrunc.s */
- case 15:
- switch (Field_t_Slot_inst_get (insn))
- {
- case 0:
- return 480; /* mov.s */
- case 1:
- return 479; /* abs.s */
- case 4:
- return 496; /* rfr */
- case 5:
- return 497; /* wfr */
- case 6:
- return 481; /* neg.s */
- }
- break;
- }
- break;
- case 11:
- switch (Field_op2_Slot_inst_get (insn))
- {
- case 1:
- return 482; /* un.s */
- case 2:
- return 483; /* oeq.s */
- case 3:
- return 484; /* ueq.s */
- case 4:
- return 485; /* olt.s */
- case 5:
- return 486; /* ult.s */
- case 6:
- return 487; /* ole.s */
- case 7:
- return 488; /* ule.s */
- case 8:
- return 475; /* moveqz.s */
- case 9:
- return 476; /* movnez.s */
- case 10:
- return 477; /* movltz.s */
- case 11:
- return 478; /* movgez.s */
- case 12:
- return 473; /* movf.s */
- case 13:
- return 474; /* movt.s */
- }
- break;
- }
- break;
- case 1:
- return 85; /* l32r */
- case 2:
- switch (Field_r_Slot_inst_get (insn))
- {
- case 0:
- return 86; /* l8ui */
- case 1:
- return 82; /* l16ui */
- case 2:
- return 84; /* l32i */
- case 4:
- return 101; /* s8i */
- case 5:
- return 99; /* s16i */
- case 6:
- return 100; /* s32i */
- case 7:
- switch (Field_t_Slot_inst_get (insn))
- {
- case 0:
- return 406; /* dpfr */
- case 1:
- return 407; /* dpfw */
- case 2:
- return 408; /* dpfro */
- case 3:
- return 409; /* dpfwo */
- case 4:
- return 400; /* dhwb */
- case 5:
- return 401; /* dhwbi */
- case 6:
- return 404; /* dhi */
- case 7:
- return 405; /* dii */
- case 8:
- switch (Field_op1_Slot_inst_get (insn))
- {
- case 0:
- return 410; /* dpfl */
- case 2:
- return 411; /* dhu */
- case 3:
- return 412; /* diu */
- case 4:
- return 402; /* diwb */
- case 5:
- return 403; /* diwbi */
- }
- break;
- case 12:
- return 390; /* ipf */
- case 13:
- switch (Field_op1_Slot_inst_get (insn))
- {
- case 0:
- return 392; /* ipfl */
- case 2:
- return 393; /* ihu */
- case 3:
- return 394; /* iiu */
- }
- break;
- case 14:
- return 391; /* ihi */
- case 15:
- return 395; /* iii */
- }
- break;
- case 9:
- return 83; /* l16si */
- case 10:
- return 90; /* movi */
- case 11:
- return 451; /* l32ai */
- case 12:
- return 39; /* addi */
- case 13:
- return 40; /* addmi */
- case 14:
- return 453; /* s32c1i */
- case 15:
- return 452; /* s32ri */
- }
- break;
- case 3:
- switch (Field_r_Slot_inst_get (insn))
- {
- case 0:
- return 498; /* lsi */
- case 4:
- return 502; /* ssi */
- case 8:
- return 499; /* lsiu */
- case 12:
- return 503; /* ssiu */
- }
- break;
- case 4:
- switch (Field_op2_Slot_inst_get (insn))
- {
- case 0:
- switch (Field_op1_Slot_inst_get (insn))
- {
- case 8:
- if (Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0) {
- return 287; /* mula.dd.ll.ldinc */
- }
- break;
- case 9:
- if (Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0) {
- return 289; /* mula.dd.hl.ldinc */
- }
- break;
- case 10:
- if (Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0) {
- return 291; /* mula.dd.lh.ldinc */
- }
- break;
- case 11:
- if (Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0) {
- return 293; /* mula.dd.hh.ldinc */
- }
- break;
- }
- break;
- case 1:
- switch (Field_op1_Slot_inst_get (insn))
- {
- case 8:
- if (Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0) {
- return 286; /* mula.dd.ll.lddec */
- }
- break;
- case 9:
- if (Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0) {
- return 288; /* mula.dd.hl.lddec */
- }
- break;
- case 10:
- if (Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0) {
- return 290; /* mula.dd.lh.lddec */
- }
- break;
- case 11:
- if (Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0) {
- return 292; /* mula.dd.hh.lddec */
- }
- break;
- }
- break;
- case 2:
- switch (Field_op1_Slot_inst_get (insn))
- {
- case 4:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 242; /* mul.dd.ll */
- }
- break;
- case 5:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 243; /* mul.dd.hl */
- }
- break;
- case 6:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 244; /* mul.dd.lh */
- }
- break;
- case 7:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 245; /* mul.dd.hh */
- }
- break;
- case 8:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 270; /* mula.dd.ll */
- }
- break;
- case 9:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 271; /* mula.dd.hl */
- }
- break;
- case 10:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 272; /* mula.dd.lh */
- }
- break;
- case 11:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 273; /* mula.dd.hh */
- }
- break;
- case 12:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 274; /* muls.dd.ll */
- }
- break;
- case 13:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 275; /* muls.dd.hl */
- }
- break;
- case 14:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 276; /* muls.dd.lh */
- }
- break;
- case 15:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 277; /* muls.dd.hh */
- }
- break;
- }
- break;
- case 3:
- switch (Field_op1_Slot_inst_get (insn))
- {
- case 4:
- if (Field_r_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 234; /* mul.ad.ll */
- }
- break;
- case 5:
- if (Field_r_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 235; /* mul.ad.hl */
- }
- break;
- case 6:
- if (Field_r_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 236; /* mul.ad.lh */
- }
- break;
- case 7:
- if (Field_r_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 237; /* mul.ad.hh */
- }
- break;
- case 8:
- if (Field_r_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 254; /* mula.ad.ll */
- }
- break;
- case 9:
- if (Field_r_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 255; /* mula.ad.hl */
- }
- break;
- case 10:
- if (Field_r_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 256; /* mula.ad.lh */
- }
- break;
- case 11:
- if (Field_r_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 257; /* mula.ad.hh */
- }
- break;
- case 12:
- if (Field_r_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 258; /* muls.ad.ll */
- }
- break;
- case 13:
- if (Field_r_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 259; /* muls.ad.hl */
- }
- break;
- case 14:
- if (Field_r_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 260; /* muls.ad.lh */
- }
- break;
- case 15:
- if (Field_r_Slot_inst_get (insn) == 0 &&
- Field_t3_Slot_inst_get (insn) == 0 &&
- Field_tlo_Slot_inst_get (insn) == 0) {
- return 261; /* muls.ad.hh */
- }
- break;
- }
- break;
- case 4:
- switch (Field_op1_Slot_inst_get (insn))
- {
- case 8:
- if (Field_r3_Slot_inst_get (insn) == 0) {
- return 279; /* mula.da.ll.ldinc */
- }
- break;
- case 9:
- if (Field_r3_Slot_inst_get (insn) == 0) {
- return 281; /* mula.da.hl.ldinc */
- }
- break;
- case 10:
- if (Field_r3_Slot_inst_get (insn) == 0) {
- return 283; /* mula.da.lh.ldinc */
- }
- break;
- case 11:
- if (Field_r3_Slot_inst_get (insn) == 0) {
- return 285; /* mula.da.hh.ldinc */
- }
- break;
- }
- break;
- case 5:
- switch (Field_op1_Slot_inst_get (insn))
- {
- case 8:
- if (Field_r3_Slot_inst_get (insn) == 0) {
- return 278; /* mula.da.ll.lddec */
- }
- break;
- case 9:
- if (Field_r3_Slot_inst_get (insn) == 0) {
- return 280; /* mula.da.hl.lddec */
- }
- break;
- case 10:
- if (Field_r3_Slot_inst_get (insn) == 0) {
- return 282; /* mula.da.lh.lddec */
- }
- break;
- case 11:
- if (Field_r3_Slot_inst_get (insn) == 0) {
- return 284; /* mula.da.hh.lddec */
- }
- break;
- }
- break;
- case 6:
- switch (Field_op1_Slot_inst_get (insn))
- {
- case 4:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0) {
- return 238; /* mul.da.ll */
- }
- break;
- case 5:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0) {
- return 239; /* mul.da.hl */
- }
- break;
- case 6:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0) {
- return 240; /* mul.da.lh */
- }
- break;
- case 7:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0) {
- return 241; /* mul.da.hh */
- }
- break;
- case 8:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0) {
- return 262; /* mula.da.ll */
- }
- break;
- case 9:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0) {
- return 263; /* mula.da.hl */
- }
- break;
- case 10:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0) {
- return 264; /* mula.da.lh */
- }
- break;
- case 11:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0) {
- return 265; /* mula.da.hh */
- }
- break;
- case 12:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0) {
- return 266; /* muls.da.ll */
- }
- break;
- case 13:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0) {
- return 267; /* muls.da.hl */
- }
- break;
- case 14:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0) {
- return 268; /* muls.da.lh */
- }
- break;
- case 15:
- if (Field_s_Slot_inst_get (insn) == 0 &&
- Field_w_Slot_inst_get (insn) == 0 &&
- Field_r3_Slot_inst_get (insn) == 0) {
- return 269; /* muls.da.hh */
- }
- break;
- }
- break;
- case 7:
- switch (Field_op1_Slot_inst_get (insn))
- {
- case 0:
- if (Field_r_Slot_inst_get (insn) == 0) {
- return 230; /* umul.aa.ll */
- }
- break;
- case 1:
- if (Field_r_Slot_inst_get (insn) == 0) {
- return 231; /* umul.aa.hl */
- }
- break;
- case 2:
- if (Field_r_Slot_inst_get (insn) == 0) {
- return 232; /* umul.aa.lh */
- }
- break;
- case 3:
- if (Field_r_Slot_inst_get (insn) == 0) {
- return 233; /* umul.aa.hh */
- }
- break;
- case 4:
- if (Field_r_Slot_inst_get (insn) == 0) {
- return 226; /* mul.aa.ll */
- }
- break;
- case 5:
- if (Field_r_Slot_inst_get (insn) == 0) {
- return 227; /* mul.aa.hl */
- }
- break;
- case 6:
- if (Field_r_Slot_inst_get (insn) == 0) {
- return 228; /* mul.aa.lh */
- }
- break;
- case 7:
- if (Field_r_Slot_inst_get (insn) == 0) {
- return 229; /* mul.aa.hh */
- }
- break;
- case 8:
- if (Field_r_Slot_inst_get (insn) == 0) {
- return 246; /* mula.aa.ll */
- }
- break;
- case 9:
- if (Field_r_Slot_inst_get (insn) == 0) {
- return 247; /* mula.aa.hl */
- }
- break;
- case 10:
- if (Field_r_Slot_inst_get (insn) == 0) {
- return 248; /* mula.aa.lh */
- }
- break;
- case 11:
- if (Field_r_Slot_inst_get (insn) == 0) {
- return 249; /* mula.aa.hh */
- }
- break;
- case 12:
- if (Field_r_Slot_inst_get (insn) == 0) {
- return 250; /* muls.aa.ll */
- }
- break;
- case 13:
- if (Field_r_Slot_inst_get (insn) == 0) {
- return 251; /* muls.aa.hl */
- }
- break;
- case 14:
- if (Field_r_Slot_inst_get (insn) == 0) {
- return 252; /* muls.aa.lh */
- }
- break;
- case 15:
- if (Field_r_Slot_inst_get (insn) == 0) {
- return 253; /* muls.aa.hh */
- }
- break;
- }
- break;
- case 8:
- if (Field_op1_Slot_inst_get (insn) == 0 &&
- Field_t_Slot_inst_get (insn) == 0 &&
- Field_rhi_Slot_inst_get (insn) == 0) {
- return 295; /* ldinc */
- }
- break;
- case 9:
- if (Field_op1_Slot_inst_get (insn) == 0 &&
- Field_t_Slot_inst_get (insn) == 0 &&
- Field_rhi_Slot_inst_get (insn) == 0) {
- return 294; /* lddec */
- }
- break;
- }
- break;
- case 5:
- switch (Field_n_Slot_inst_get (insn))
- {
- case 0:
- return 76; /* call0 */
- case 1:
- return 7; /* call4 */
- case 2:
- return 6; /* call8 */
- case 3:
- return 5; /* call12 */
- }
- break;
- case 6:
- switch (Field_n_Slot_inst_get (insn))
- {
- case 0:
- return 80; /* j */
- case 1:
- switch (Field_m_Slot_inst_get (insn))
- {
- case 0:
- return 72; /* beqz */
- case 1:
- return 73; /* bnez */
- case 2:
- return 75; /* bltz */
- case 3:
- return 74; /* bgez */
- }
- break;
- case 2:
- switch (Field_m_Slot_inst_get (insn))
- {
- case 0:
- return 52; /* beqi */
- case 1:
- return 53; /* bnei */
- case 2:
- return 55; /* blti */
- case 3:
- return 54; /* bgei */
- }
- break;
- case 3:
- switch (Field_m_Slot_inst_get (insn))
- {
- case 0:
- return 11; /* entry */
- case 1:
- switch (Field_r_Slot_inst_get (insn))
- {
- case 0:
- return 371; /* bf */
- case 1:
- return 372; /* bt */
- case 8:
- return 87; /* loop */
- case 9:
- return 88; /* loopnez */
- case 10:
- return 89; /* loopgtz */
- }
- break;
- case 2:
- return 59; /* bltui */
- case 3:
- return 58; /* bgeui */
- }
- break;
- }
- break;
- case 7:
- switch (Field_r_Slot_inst_get (insn))
- {
- case 0:
- return 67; /* bnone */
- case 1:
- return 60; /* beq */
- case 2:
- return 63; /* blt */
- case 3:
- return 65; /* bltu */
- case 4:
- return 68; /* ball */
- case 5:
- return 70; /* bbc */
- case 6:
- case 7:
- return 56; /* bbci */
- case 8:
- return 66; /* bany */
- case 9:
- return 61; /* bne */
- case 10:
- return 62; /* bge */
- case 11:
- return 64; /* bgeu */
- case 12:
- return 69; /* bnall */
- case 13:
- return 71; /* bbs */
- case 14:
- case 15:
- return 57; /* bbsi */
- }
- break;
- }
- return 0;
-}
-
-static int
-Slot_inst16b_decode (const xtensa_insnbuf insn)
-{
- switch (Field_op0_Slot_inst16b_get (insn))
- {
- case 12:
- switch (Field_i_Slot_inst16b_get (insn))
- {
- case 0:
- return 33; /* movi.n */
- case 1:
- switch (Field_z_Slot_inst16b_get (insn))
- {
- case 0:
- return 28; /* beqz.n */
- case 1:
- return 29; /* bnez.n */
- }
- break;
- }
- break;
- case 13:
- switch (Field_r_Slot_inst16b_get (insn))
- {
- case 0:
- return 32; /* mov.n */
- case 15:
- switch (Field_t_Slot_inst16b_get (insn))
- {
- case 0:
- return 35; /* ret.n */
- case 1:
- return 15; /* retw.n */
- case 2:
- return 325; /* break.n */
- case 3:
- if (Field_s_Slot_inst16b_get (insn) == 0) {
- return 34; /* nop.n */
- }
- break;
- case 6:
- if (Field_s_Slot_inst16b_get (insn) == 0) {
- return 30; /* ill.n */
- }
- break;
- }
- break;
- }
- break;
- }
- return 0;
-}
-
-static int
-Slot_inst16a_decode (const xtensa_insnbuf insn)
-{
- switch (Field_op0_Slot_inst16a_get (insn))
- {
- case 8:
- return 31; /* l32i.n */
- case 9:
- return 36; /* s32i.n */
- case 10:
- return 26; /* add.n */
- case 11:
- return 27; /* addi.n */
- }
- return 0;
-}
-
-static int
-Slot_xt_flix64_slot2_decode (const xtensa_insnbuf insn)
-{
- switch (Field_combined3e2c5767_fld36xt_flix64_slot2_Slot_xt_flix64_slot2_get (insn))
- {
- case 0:
- if (Field_op0_s5_Slot_xt_flix64_slot2_get (insn) == 1) {
- return 41; /* add */
- }
- if (Field_op0_s5_Slot_xt_flix64_slot2_get (insn) == 5) {
- return 42; /* sub */
- }
- if (Field_op0_s5_Slot_xt_flix64_slot2_get (insn) == 2) {
- return 43; /* addx2 */
- }
- if (Field_op0_s5_Slot_xt_flix64_slot2_get (insn) == 3) {
- return 49; /* and */
- }
- if (Field_op0_s5_Slot_xt_flix64_slot2_get (insn) == 4) {
- return 450; /* sext */
- }
- break;
- case 1:
- if (Field_op0_s5_Slot_xt_flix64_slot2_get (insn) == 1) {
- return 27; /* addi.n */
- }
- if (Field_op0_s5_Slot_xt_flix64_slot2_get (insn) == 2) {
- return 44; /* addx4 */
- }
- if (Field_op0_s5_Slot_xt_flix64_slot2_get (insn) == 3) {
- return 50; /* or */
- }
- if (Field_op0_s5_Slot_xt_flix64_slot2_get (insn) == 5) {
- return 51; /* xor */
- }
- if (Field_op0_s5_Slot_xt_flix64_slot2_get (insn) == 4) {
- return 113; /* srli */
- }
- break;
- }
- if (Field_combined3e2c5767_fld37xt_flix64_slot2_Slot_xt_flix64_slot2_get (insn) == 0 &&
- Field_op0_s5_Slot_xt_flix64_slot2_get (insn) == 6) {
- return 33; /* movi.n */
- }
- if (Field_combined3e2c5767_fld39xt_flix64_slot2_Slot_xt_flix64_slot2_get (insn) == 2 &&
- Field_op0_s5_Slot_xt_flix64_slot2_get (insn) == 6 &&
- Field_combined3e2c5767_fld63xt_flix64_slot2_Slot_xt_flix64_slot2_get (insn) == 0) {
- return 32; /* mov.n */
- }
- if (Field_combined3e2c5767_fld41xt_flix64_slot2_Slot_xt_flix64_slot2_get (insn) == 3 &&
- Field_op0_s5_Slot_xt_flix64_slot2_get (insn) == 6 &&
- Field_combined3e2c5767_fld65xt_flix64_slot2_Slot_xt_flix64_slot2_get (insn) == 0) {
- return 97; /* nop */
- }
- if (Field_combined3e2c5767_fld42xt_flix64_slot2_Slot_xt_flix64_slot2_get (insn) == 8 &&
- Field_op0_s5_Slot_xt_flix64_slot2_get (insn) == 6 &&
- Field_combined3e2c5767_fld64xt_flix64_slot2_Slot_xt_flix64_slot2_get (insn) == 0) {
- return 96; /* abs */
- }
- if (Field_combined3e2c5767_fld44xt_flix64_slot2_Slot_xt_flix64_slot2_get (insn) == 9 &&
- Field_op0_s5_Slot_xt_flix64_slot2_get (insn) == 6 &&
- Field_combined3e2c5767_fld64xt_flix64_slot2_Slot_xt_flix64_slot2_get (insn) == 0) {
- return 95; /* neg */
- }
- if (Field_combined3e2c5767_fld45xt_flix64_slot2_Slot_xt_flix64_slot2_get (insn) == 5 &&
- Field_op0_s5_Slot_xt_flix64_slot2_get (insn) == 6 &&
- Field_combined3e2c5767_fld66xt_flix64_slot2_Slot_xt_flix64_slot2_get (insn) == 0) {
- return 110; /* sra */
- }
- if (Field_combined3e2c5767_fld47xt_flix64_slot2_Slot_xt_flix64_slot2_get (insn) == 3 &&
- Field_op0_s5_Slot_xt_flix64_slot2_get (insn) == 6 &&
- Field_combined3e2c5767_fld68xt_flix64_slot2_Slot_xt_flix64_slot2_get (insn) == 0) {
- return 109; /* srl */
- }
- if (Field_op0_s5_Slot_xt_flix64_slot2_get (insn) == 7) {
- return 112; /* srai */
- }
- return 0;
-}
-
-static int
-Slot_xt_flix64_slot0_decode (const xtensa_insnbuf insn)
-{
- switch (Field_op0_xt_flix64_slot0_Slot_xt_flix64_slot0_get (insn))
- {
- case 0:
- if (Field_combined3e2c5767_fld7_Slot_xt_flix64_slot0_get (insn) == 2) {
- return 78; /* extui */
- }
- switch (Field_op1_Slot_xt_flix64_slot0_get (insn)) {
- case 0:
- switch (Field_op2_Slot_xt_flix64_slot0_get (insn)) {
- case 0:
- if (Field_r_Slot_xt_flix64_slot0_get (insn) == 2) {
- if (Field_s_Slot_xt_flix64_slot0_get (insn) == 0) {
- if (Field_t_Slot_xt_flix64_slot0_get (insn) == 15) {
- return 97; /* nop */
- }
- }
- }
- break;
- case 1:
- return 49; /* and */
- case 2:
- return 50; /* or */
- case 3:
- return 51; /* xor */
- case 4:
- switch (Field_r_Slot_xt_flix64_slot0_get (insn)) {
- case 0:
- if (Field_t_Slot_xt_flix64_slot0_get (insn) == 0) {
- return 102; /* ssr */
- }
- break;
- case 1:
- if (Field_t_Slot_xt_flix64_slot0_get (insn) == 0) {
- return 103; /* ssl */
- }
- break;
- case 2:
- if (Field_t_Slot_xt_flix64_slot0_get (insn) == 0) {
- return 104; /* ssa8l */
- }
- break;
- case 3:
- if (Field_t_Slot_xt_flix64_slot0_get (insn) == 0) {
- return 105; /* ssa8b */
- }
- break;
- case 4:
- if (Field_thi3_Slot_xt_flix64_slot0_get (insn) == 0) {
- return 106; /* ssai */
- }
- break;
- case 14:
- return 448; /* nsa */
- case 15:
- return 449; /* nsau */
- }
- break;
- case 6:
- switch (Field_s_Slot_xt_flix64_slot0_get (insn)) {
- case 0:
- return 95; /* neg */
- case 1:
- return 96; /* abs */
- }
- break;
- case 8:
- return 41; /* add */
- case 9:
- return 43; /* addx2 */
- case 10:
- return 44; /* addx4 */
- case 11:
- return 45; /* addx8 */
- case 12:
- return 42; /* sub */
- case 13:
- return 46; /* subx2 */
- case 14:
- return 47; /* subx4 */
- case 15:
- return 48; /* subx8 */
- }
- break;
- case 1:
- if (Field_combined3e2c5767_fld11_Slot_xt_flix64_slot0_get (insn) == 1) {
- return 112; /* srai */
- }
- if (Field_combined3e2c5767_fld9_Slot_xt_flix64_slot0_get (insn) == 0) {
- return 111; /* slli */
- }
- switch (Field_op2_Slot_xt_flix64_slot0_get (insn)) {
- case 4:
- return 113; /* srli */
- case 8:
- return 108; /* src */
- case 9:
- if (Field_s_Slot_xt_flix64_slot0_get (insn) == 0) {
- return 109; /* srl */
- }
- break;
- case 10:
- if (Field_t_Slot_xt_flix64_slot0_get (insn) == 0) {
- return 107; /* sll */
- }
- break;
- case 11:
- if (Field_s_Slot_xt_flix64_slot0_get (insn) == 0) {
- return 110; /* sra */
- }
- break;
- case 12:
- return 296; /* mul16u */
- case 13:
- return 297; /* mul16s */
- }
- break;
- case 2:
- if (Field_op2_Slot_xt_flix64_slot0_get (insn) == 8) {
- return 461; /* mull */
- }
- break;
- case 3:
- switch (Field_op2_Slot_xt_flix64_slot0_get (insn)) {
- case 2:
- return 450; /* sext */
- case 3:
- return 443; /* clamps */
- case 4:
- return 444; /* min */
- case 5:
- return 445; /* max */
- case 6:
- return 446; /* minu */
- case 7:
- return 447; /* maxu */
- case 8:
- return 91; /* moveqz */
- case 9:
- return 92; /* movnez */
- case 10:
- return 93; /* movltz */
- case 11:
- return 94; /* movgez */
- }
- break;
- }
- break;
- case 2:
- switch (Field_r_Slot_xt_flix64_slot0_get (insn))
- {
- case 0:
- return 86; /* l8ui */
- case 1:
- return 82; /* l16ui */
- case 2:
- return 84; /* l32i */
- case 4:
- return 101; /* s8i */
- case 5:
- return 99; /* s16i */
- case 6:
- return 100; /* s32i */
- case 9:
- return 83; /* l16si */
- case 10:
- return 90; /* movi */
- case 12:
- return 39; /* addi */
- case 13:
- return 40; /* addmi */
- }
- break;
- }
- if (Field_op0_xt_flix64_slot0_s3_Slot_xt_flix64_slot0_get (insn) == 1) {
- return 85; /* l32r */
- }
- if (Field_sae4_Slot_xt_flix64_slot0_get (insn) == 0 &&
- Field_combined3e2c5767_fld8_Slot_xt_flix64_slot0_get (insn) == 3 &&
- Field_op0_xt_flix64_slot0_s3_Slot_xt_flix64_slot0_get (insn) == 0 &&
- Field_combined3e2c5767_fld49xt_flix64_slot0_Slot_xt_flix64_slot0_get (insn) == 0) {
- return 32; /* mov.n */
- }
- return 0;
-}
-
-static int
-Slot_xt_flix64_slot1_decode (const xtensa_insnbuf insn)
-{
- if (Field_combined3e2c5767_fld19xt_flix64_slot1_Slot_xt_flix64_slot1_get (insn) == 0 &&
- Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 1) {
- return 78; /* extui */
- }
- switch (Field_combined3e2c5767_fld20xt_flix64_slot1_Slot_xt_flix64_slot1_get (insn)) {
- case 0:
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2) {
- return 90; /* movi */
- }
- break;
- case 2:
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 1) {
- return 39; /* addi */
- }
- break;
- case 3:
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 1) {
- return 40; /* addmi */
- }
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2 &&
- Field_combined3e2c5767_fld16_Slot_xt_flix64_slot1_get (insn) == 0) {
- return 51; /* xor */
- }
- break;
- }
- switch (Field_combined3e2c5767_fld21xt_flix64_slot1_Slot_xt_flix64_slot1_get (insn))
- {
- case 8:
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2) {
- return 111; /* slli */
- }
- break;
- case 16:
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2) {
- return 112; /* srai */
- }
- break;
- case 19:
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2 &&
- Field_combined3e2c5767_fld57xt_flix64_slot1_Slot_xt_flix64_slot1_get (insn) == 0) {
- return 107; /* sll */
- }
- break;
- }
- switch (Field_combined3e2c5767_fld22xt_flix64_slot1_Slot_xt_flix64_slot1_get (insn))
- {
- case 18:
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2) {
- return 41; /* add */
- }
- break;
- case 19:
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2) {
- return 45; /* addx8 */
- }
- break;
- case 20:
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2) {
- return 43; /* addx2 */
- }
- break;
- case 21:
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2) {
- return 49; /* and */
- }
- break;
- case 22:
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2) {
- return 91; /* moveqz */
- }
- break;
- case 23:
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2) {
- return 94; /* movgez */
- }
- break;
- case 24:
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2) {
- return 44; /* addx4 */
- }
- break;
- case 25:
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2) {
- return 93; /* movltz */
- }
- break;
- case 26:
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2) {
- return 92; /* movnez */
- }
- break;
- case 27:
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2) {
- return 296; /* mul16u */
- }
- break;
- case 28:
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2) {
- return 297; /* mul16s */
- }
- break;
- case 29:
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2) {
- return 461; /* mull */
- }
- break;
- case 30:
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2) {
- return 50; /* or */
- }
- break;
- case 31:
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2) {
- return 450; /* sext */
- }
- break;
- case 34:
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2) {
- return 108; /* src */
- }
- break;
- case 36:
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2) {
- return 113; /* srli */
- }
- break;
- }
- if (Field_combined3e2c5767_fld23xt_flix64_slot1_Slot_xt_flix64_slot1_get (insn) == 280 &&
- Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2 &&
- Field_combined3e2c5767_fld51xt_flix64_slot1_Slot_xt_flix64_slot1_get (insn) == 0) {
- return 32; /* mov.n */
- }
- if (Field_combined3e2c5767_fld25xt_flix64_slot1_Slot_xt_flix64_slot1_get (insn) == 281 &&
- Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2 &&
- Field_combined3e2c5767_fld52xt_flix64_slot1_Slot_xt_flix64_slot1_get (insn) == 0) {
- return 81; /* jx */
- }
- if (Field_combined3e2c5767_fld26xt_flix64_slot1_Slot_xt_flix64_slot1_get (insn) == 141 &&
- Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2 &&
- Field_combined3e2c5767_fld60xt_flix64_slot1_Slot_xt_flix64_slot1_get (insn) == 0) {
- return 103; /* ssl */
- }
- if (Field_combined3e2c5767_fld28xt_flix64_slot1_Slot_xt_flix64_slot1_get (insn) == 71 &&
- Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2 &&
- Field_combined3e2c5767_fld54xt_flix64_slot1_Slot_xt_flix64_slot1_get (insn) == 0) {
- return 97; /* nop */
- }
- if (Field_combined3e2c5767_fld30xt_flix64_slot1_Slot_xt_flix64_slot1_get (insn) == 148 &&
- Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2 &&
- Field_combined3e2c5767_fld53xt_flix64_slot1_Slot_xt_flix64_slot1_get (insn) == 0) {
- return 95; /* neg */
- }
- if (Field_combined3e2c5767_fld32xt_flix64_slot1_Slot_xt_flix64_slot1_get (insn) == 149 &&
- Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2 &&
- Field_combined3e2c5767_fld53xt_flix64_slot1_Slot_xt_flix64_slot1_get (insn) == 0) {
- return 110; /* sra */
- }
- if (Field_combined3e2c5767_fld33xt_flix64_slot1_Slot_xt_flix64_slot1_get (insn) == 75 &&
- Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2 &&
- Field_combined3e2c5767_fld58xt_flix64_slot1_Slot_xt_flix64_slot1_get (insn) == 0) {
- return 109; /* srl */
- }
- if (Field_combined3e2c5767_fld35xt_flix64_slot1_Slot_xt_flix64_slot1_get (insn) == 5 &&
- Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 2 &&
- Field_combined3e2c5767_fld62xt_flix64_slot1_Slot_xt_flix64_slot1_get (insn) == 0) {
- return 42; /* sub */
- }
- if (Field_op0_s4_Slot_xt_flix64_slot1_get (insn) == 3) {
- return 80; /* j */
- }
- return 0;
-}
-
-static int
-Slot_xt_flix64_slot3_decode (const xtensa_insnbuf insn)
-{
- switch (Field_op0_s6_Slot_xt_flix64_slot3_get (insn))
- {
- case 1:
- if (Field_combined3e2c5767_fld71_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 516; /* bbci.w18 */
- }
- break;
- case 2:
- if (Field_combined3e2c5767_fld71_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 517; /* bbsi.w18 */
- }
- break;
- case 3:
- if (Field_combined3e2c5767_fld89xt_flix64_slot3_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 526; /* ball.w18 */
- }
- break;
- case 4:
- if (Field_combined3e2c5767_fld87xt_flix64_slot3_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 524; /* bany.w18 */
- }
- break;
- case 5:
- if (Field_combined3e2c5767_fld91xt_flix64_slot3_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 528; /* bbc.w18 */
- }
- break;
- case 6:
- if (Field_combined3e2c5767_fld92xt_flix64_slot3_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 529; /* bbs.w18 */
- }
- break;
- case 7:
- if (Field_combined3e2c5767_fld81xt_flix64_slot3_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 518; /* beq.w18 */
- }
- break;
- case 8:
- if (Field_combined3e2c5767_fld75xt_flix64_slot3_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 510; /* beqi.w18 */
- }
- break;
- case 9:
- if (Field_combined3e2c5767_fld83xt_flix64_slot3_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 520; /* bge.w18 */
- }
- break;
- case 10:
- if (Field_combined3e2c5767_fld77xt_flix64_slot3_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 512; /* bgei.w18 */
- }
- break;
- case 11:
- if (Field_combined3e2c5767_fld85xt_flix64_slot3_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 522; /* bgeu.w18 */
- }
- break;
- case 12:
- if (Field_combined3e2c5767_fld79xt_flix64_slot3_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 514; /* bgeui.w18 */
- }
- break;
- case 13:
- if (Field_combined3e2c5767_fld84xt_flix64_slot3_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 521; /* blt.w18 */
- }
- break;
- case 14:
- if (Field_combined3e2c5767_fld78xt_flix64_slot3_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 513; /* blti.w18 */
- }
- break;
- case 15:
- if (Field_combined3e2c5767_fld86xt_flix64_slot3_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 523; /* bltu.w18 */
- }
- break;
- case 16:
- if (Field_combined3e2c5767_fld80xt_flix64_slot3_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 515; /* bltui.w18 */
- }
- break;
- case 17:
- if (Field_combined3e2c5767_fld90xt_flix64_slot3_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 527; /* bnall.w18 */
- }
- break;
- case 18:
- if (Field_combined3e2c5767_fld82xt_flix64_slot3_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 519; /* bne.w18 */
- }
- break;
- case 19:
- if (Field_combined3e2c5767_fld76xt_flix64_slot3_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 511; /* bnei.w18 */
- }
- break;
- case 20:
- if (Field_combined3e2c5767_fld88xt_flix64_slot3_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 525; /* bnone.w18 */
- }
- break;
- case 21:
- if (Field_combined3e2c5767_fld70xt_flix64_slot3_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 506; /* beqz.w18 */
- }
- break;
- case 22:
- if (Field_combined3e2c5767_fld73xt_flix64_slot3_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 508; /* bgez.w18 */
- }
- break;
- case 23:
- if (Field_combined3e2c5767_fld74xt_flix64_slot3_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 509; /* bltz.w18 */
- }
- break;
- case 24:
- if (Field_combined3e2c5767_fld72xt_flix64_slot3_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 507; /* bnez.w18 */
- }
- break;
- case 25:
- if (Field_combined3e2c5767_fld93xt_flix64_slot3_Slot_xt_flix64_slot3_get (insn) == 0) {
- return 97; /* nop */
- }
- break;
- }
- return 0;
-}
-
-
-/* Instruction slots. */
-
-static void
-Slot_x24_Format_inst_0_get (const xtensa_insnbuf insn,
- xtensa_insnbuf slotbuf)
-{
- slotbuf[1] = 0;
- slotbuf[0] = (insn[0] & 0xffffff);
-}
-
-static void
-Slot_x24_Format_inst_0_set (xtensa_insnbuf insn,
- const xtensa_insnbuf slotbuf)
-{
- insn[0] = (insn[0] & ~0xffffff) | (slotbuf[0] & 0xffffff);
-}
-
-static void
-Slot_x16a_Format_inst16a_0_get (const xtensa_insnbuf insn,
- xtensa_insnbuf slotbuf)
-{
- slotbuf[1] = 0;
- slotbuf[0] = (insn[0] & 0xffff);
-}
-
-static void
-Slot_x16a_Format_inst16a_0_set (xtensa_insnbuf insn,
- const xtensa_insnbuf slotbuf)
-{
- insn[0] = (insn[0] & ~0xffff) | (slotbuf[0] & 0xffff);
-}
-
-static void
-Slot_x16b_Format_inst16b_0_get (const xtensa_insnbuf insn,
- xtensa_insnbuf slotbuf)
-{
- slotbuf[1] = 0;
- slotbuf[0] = (insn[0] & 0xffff);
-}
-
-static void
-Slot_x16b_Format_inst16b_0_set (xtensa_insnbuf insn,
- const xtensa_insnbuf slotbuf)
-{
- insn[0] = (insn[0] & ~0xffff) | (slotbuf[0] & 0xffff);
-}
-
-static void
-Slot_xt_format1_Format_xt_flix64_slot0_4_get (const xtensa_insnbuf insn,
- xtensa_insnbuf slotbuf)
-{
- slotbuf[1] = 0;
- slotbuf[0] = ((insn[0] & 0xffffff0) >> 4);
-}
-
-static void
-Slot_xt_format1_Format_xt_flix64_slot0_4_set (xtensa_insnbuf insn,
- const xtensa_insnbuf slotbuf)
-{
- insn[0] = (insn[0] & ~0xffffff0) | ((slotbuf[0] & 0xffffff) << 4);
-}
-
-static void
-Slot_xt_format2_Format_xt_flix64_slot0_4_get (const xtensa_insnbuf insn,
- xtensa_insnbuf slotbuf)
-{
- slotbuf[1] = 0;
- slotbuf[0] = ((insn[0] & 0xffffff0) >> 4);
-}
-
-static void
-Slot_xt_format2_Format_xt_flix64_slot0_4_set (xtensa_insnbuf insn,
- const xtensa_insnbuf slotbuf)
-{
- insn[0] = (insn[0] & ~0xffffff0) | ((slotbuf[0] & 0xffffff) << 4);
-}
-
-static void
-Slot_xt_format1_Format_xt_flix64_slot1_28_get (const xtensa_insnbuf insn,
- xtensa_insnbuf slotbuf)
-{
- slotbuf[1] = 0;
- slotbuf[0] = ((insn[0] & 0xf0000000) >> 28);
- slotbuf[0] = (slotbuf[0] & ~0xffff0) | ((insn[1] & 0xffff) << 4);
-}
-
-static void
-Slot_xt_format1_Format_xt_flix64_slot1_28_set (xtensa_insnbuf insn,
- const xtensa_insnbuf slotbuf)
-{
- insn[0] = (insn[0] & ~0xf0000000) | ((slotbuf[0] & 0xf) << 28);
- insn[1] = (insn[1] & ~0xffff) | ((slotbuf[0] & 0xffff0) >> 4);
-}
-
-static void
-Slot_xt_format1_Format_xt_flix64_slot2_48_get (const xtensa_insnbuf insn,
- xtensa_insnbuf slotbuf)
-{
- slotbuf[1] = 0;
- slotbuf[0] = ((insn[1] & 0xffff0000) >> 16);
-}
-
-static void
-Slot_xt_format1_Format_xt_flix64_slot2_48_set (xtensa_insnbuf insn,
- const xtensa_insnbuf slotbuf)
-{
- insn[1] = (insn[1] & ~0xffff0000) | ((slotbuf[0] & 0xffff) << 16);
-}
-
-static void
-Slot_xt_format2_Format_xt_flix64_slot3_28_get (const xtensa_insnbuf insn,
- xtensa_insnbuf slotbuf)
-{
- slotbuf[0] = ((insn[0] & 0xf0000000) >> 28);
- slotbuf[0] = (slotbuf[0] & ~0xfffffff0) | ((insn[1] & 0xfffffff) << 4);
- slotbuf[1] = ((insn[1] & 0x70000000) >> 28);
-}
-
-static void
-Slot_xt_format2_Format_xt_flix64_slot3_28_set (xtensa_insnbuf insn,
- const xtensa_insnbuf slotbuf)
-{
- insn[0] = (insn[0] & ~0xf0000000) | ((slotbuf[0] & 0xf) << 28);
- insn[1] = (insn[1] & ~0xfffffff) | ((slotbuf[0] & 0xfffffff0) >> 4);
- insn[1] = (insn[1] & ~0x70000000) | ((slotbuf[1] & 0x7) << 28);
-}
-
-static xtensa_get_field_fn
-Slot_inst_get_field_fns[] = {
- Field_t_Slot_inst_get,
- Field_bbi4_Slot_inst_get,
- Field_bbi_Slot_inst_get,
- Field_imm12_Slot_inst_get,
- Field_imm8_Slot_inst_get,
- Field_s_Slot_inst_get,
- Field_imm12b_Slot_inst_get,
- Field_imm16_Slot_inst_get,
- Field_m_Slot_inst_get,
- Field_n_Slot_inst_get,
- Field_offset_Slot_inst_get,
- Field_op0_Slot_inst_get,
- Field_op1_Slot_inst_get,
- Field_op2_Slot_inst_get,
- Field_r_Slot_inst_get,
- Field_sa4_Slot_inst_get,
- Field_sae4_Slot_inst_get,
- Field_sae_Slot_inst_get,
- Field_sal_Slot_inst_get,
- Field_sargt_Slot_inst_get,
- Field_sas4_Slot_inst_get,
- Field_sas_Slot_inst_get,
- Field_sr_Slot_inst_get,
- Field_st_Slot_inst_get,
- Field_thi3_Slot_inst_get,
- Field_imm4_Slot_inst_get,
- Field_mn_Slot_inst_get,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_r3_Slot_inst_get,
- Field_rbit2_Slot_inst_get,
- Field_rhi_Slot_inst_get,
- Field_t3_Slot_inst_get,
- Field_tbit2_Slot_inst_get,
- Field_tlo_Slot_inst_get,
- Field_w_Slot_inst_get,
- Field_y_Slot_inst_get,
- Field_x_Slot_inst_get,
- Field_t2_Slot_inst_get,
- Field_s2_Slot_inst_get,
- Field_rz_Slot_inst_get,
- Field_t4_Slot_inst_get,
- Field_s4_Slot_inst_get,
- Field_r4_Slot_inst_get,
- Field_t8_Slot_inst_get,
- Field_s8_Slot_inst_get,
- Field_r8_Slot_inst_get,
- Field_xt_wbr15_imm_Slot_inst_get,
- Field_xt_wbr18_imm_Slot_inst_get,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Implicit_Field_ar0_get,
- Implicit_Field_ar4_get,
- Implicit_Field_ar8_get,
- Implicit_Field_ar12_get,
- Implicit_Field_mr0_get,
- Implicit_Field_mr1_get,
- Implicit_Field_mr2_get,
- Implicit_Field_mr3_get,
- Implicit_Field_bt16_get,
- Implicit_Field_bs16_get,
- Implicit_Field_br16_get,
- Implicit_Field_brall_get
-};
-
-static xtensa_set_field_fn
-Slot_inst_set_field_fns[] = {
- Field_t_Slot_inst_set,
- Field_bbi4_Slot_inst_set,
- Field_bbi_Slot_inst_set,
- Field_imm12_Slot_inst_set,
- Field_imm8_Slot_inst_set,
- Field_s_Slot_inst_set,
- Field_imm12b_Slot_inst_set,
- Field_imm16_Slot_inst_set,
- Field_m_Slot_inst_set,
- Field_n_Slot_inst_set,
- Field_offset_Slot_inst_set,
- Field_op0_Slot_inst_set,
- Field_op1_Slot_inst_set,
- Field_op2_Slot_inst_set,
- Field_r_Slot_inst_set,
- Field_sa4_Slot_inst_set,
- Field_sae4_Slot_inst_set,
- Field_sae_Slot_inst_set,
- Field_sal_Slot_inst_set,
- Field_sargt_Slot_inst_set,
- Field_sas4_Slot_inst_set,
- Field_sas_Slot_inst_set,
- Field_sr_Slot_inst_set,
- Field_st_Slot_inst_set,
- Field_thi3_Slot_inst_set,
- Field_imm4_Slot_inst_set,
- Field_mn_Slot_inst_set,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_r3_Slot_inst_set,
- Field_rbit2_Slot_inst_set,
- Field_rhi_Slot_inst_set,
- Field_t3_Slot_inst_set,
- Field_tbit2_Slot_inst_set,
- Field_tlo_Slot_inst_set,
- Field_w_Slot_inst_set,
- Field_y_Slot_inst_set,
- Field_x_Slot_inst_set,
- Field_t2_Slot_inst_set,
- Field_s2_Slot_inst_set,
- Field_rz_Slot_inst_set,
- Field_t4_Slot_inst_set,
- Field_s4_Slot_inst_set,
- Field_r4_Slot_inst_set,
- Field_t8_Slot_inst_set,
- Field_s8_Slot_inst_set,
- Field_r8_Slot_inst_set,
- Field_xt_wbr15_imm_Slot_inst_set,
- Field_xt_wbr18_imm_Slot_inst_set,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set
-};
-
-static xtensa_get_field_fn
-Slot_inst16a_get_field_fns[] = {
- Field_t_Slot_inst16a_get,
- 0,
- 0,
- 0,
- 0,
- Field_s_Slot_inst16a_get,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_op0_Slot_inst16a_get,
- 0,
- 0,
- Field_r_Slot_inst16a_get,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_sr_Slot_inst16a_get,
- Field_st_Slot_inst16a_get,
- 0,
- Field_imm4_Slot_inst16a_get,
- 0,
- Field_i_Slot_inst16a_get,
- Field_imm6lo_Slot_inst16a_get,
- Field_imm6hi_Slot_inst16a_get,
- Field_imm7lo_Slot_inst16a_get,
- Field_imm7hi_Slot_inst16a_get,
- Field_z_Slot_inst16a_get,
- Field_imm6_Slot_inst16a_get,
- Field_imm7_Slot_inst16a_get,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_t2_Slot_inst16a_get,
- Field_s2_Slot_inst16a_get,
- Field_rz_Slot_inst16a_get,
- Field_t4_Slot_inst16a_get,
- Field_s4_Slot_inst16a_get,
- Field_r4_Slot_inst16a_get,
- Field_t8_Slot_inst16a_get,
- Field_s8_Slot_inst16a_get,
- Field_r8_Slot_inst16a_get,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Implicit_Field_ar0_get,
- Implicit_Field_ar4_get,
- Implicit_Field_ar8_get,
- Implicit_Field_ar12_get,
- Implicit_Field_mr0_get,
- Implicit_Field_mr1_get,
- Implicit_Field_mr2_get,
- Implicit_Field_mr3_get,
- Implicit_Field_bt16_get,
- Implicit_Field_bs16_get,
- Implicit_Field_br16_get,
- Implicit_Field_brall_get
-};
-
-static xtensa_set_field_fn
-Slot_inst16a_set_field_fns[] = {
- Field_t_Slot_inst16a_set,
- 0,
- 0,
- 0,
- 0,
- Field_s_Slot_inst16a_set,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_op0_Slot_inst16a_set,
- 0,
- 0,
- Field_r_Slot_inst16a_set,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_sr_Slot_inst16a_set,
- Field_st_Slot_inst16a_set,
- 0,
- Field_imm4_Slot_inst16a_set,
- 0,
- Field_i_Slot_inst16a_set,
- Field_imm6lo_Slot_inst16a_set,
- Field_imm6hi_Slot_inst16a_set,
- Field_imm7lo_Slot_inst16a_set,
- Field_imm7hi_Slot_inst16a_set,
- Field_z_Slot_inst16a_set,
- Field_imm6_Slot_inst16a_set,
- Field_imm7_Slot_inst16a_set,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_t2_Slot_inst16a_set,
- Field_s2_Slot_inst16a_set,
- Field_rz_Slot_inst16a_set,
- Field_t4_Slot_inst16a_set,
- Field_s4_Slot_inst16a_set,
- Field_r4_Slot_inst16a_set,
- Field_t8_Slot_inst16a_set,
- Field_s8_Slot_inst16a_set,
- Field_r8_Slot_inst16a_set,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set
-};
-
-static xtensa_get_field_fn
-Slot_inst16b_get_field_fns[] = {
- Field_t_Slot_inst16b_get,
- 0,
- 0,
- 0,
- 0,
- Field_s_Slot_inst16b_get,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_op0_Slot_inst16b_get,
- 0,
- 0,
- Field_r_Slot_inst16b_get,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_sr_Slot_inst16b_get,
- Field_st_Slot_inst16b_get,
- 0,
- Field_imm4_Slot_inst16b_get,
- 0,
- Field_i_Slot_inst16b_get,
- Field_imm6lo_Slot_inst16b_get,
- Field_imm6hi_Slot_inst16b_get,
- Field_imm7lo_Slot_inst16b_get,
- Field_imm7hi_Slot_inst16b_get,
- Field_z_Slot_inst16b_get,
- Field_imm6_Slot_inst16b_get,
- Field_imm7_Slot_inst16b_get,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_t2_Slot_inst16b_get,
- Field_s2_Slot_inst16b_get,
- Field_rz_Slot_inst16b_get,
- Field_t4_Slot_inst16b_get,
- Field_s4_Slot_inst16b_get,
- Field_r4_Slot_inst16b_get,
- Field_t8_Slot_inst16b_get,
- Field_s8_Slot_inst16b_get,
- Field_r8_Slot_inst16b_get,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Implicit_Field_ar0_get,
- Implicit_Field_ar4_get,
- Implicit_Field_ar8_get,
- Implicit_Field_ar12_get,
- Implicit_Field_mr0_get,
- Implicit_Field_mr1_get,
- Implicit_Field_mr2_get,
- Implicit_Field_mr3_get,
- Implicit_Field_bt16_get,
- Implicit_Field_bs16_get,
- Implicit_Field_br16_get,
- Implicit_Field_brall_get
-};
-
-static xtensa_set_field_fn
-Slot_inst16b_set_field_fns[] = {
- Field_t_Slot_inst16b_set,
- 0,
- 0,
- 0,
- 0,
- Field_s_Slot_inst16b_set,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_op0_Slot_inst16b_set,
- 0,
- 0,
- Field_r_Slot_inst16b_set,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_sr_Slot_inst16b_set,
- Field_st_Slot_inst16b_set,
- 0,
- Field_imm4_Slot_inst16b_set,
- 0,
- Field_i_Slot_inst16b_set,
- Field_imm6lo_Slot_inst16b_set,
- Field_imm6hi_Slot_inst16b_set,
- Field_imm7lo_Slot_inst16b_set,
- Field_imm7hi_Slot_inst16b_set,
- Field_z_Slot_inst16b_set,
- Field_imm6_Slot_inst16b_set,
- Field_imm7_Slot_inst16b_set,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_t2_Slot_inst16b_set,
- Field_s2_Slot_inst16b_set,
- Field_rz_Slot_inst16b_set,
- Field_t4_Slot_inst16b_set,
- Field_s4_Slot_inst16b_set,
- Field_r4_Slot_inst16b_set,
- Field_t8_Slot_inst16b_set,
- Field_s8_Slot_inst16b_set,
- Field_r8_Slot_inst16b_set,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set
-};
-
-static xtensa_get_field_fn
-Slot_xt_flix64_slot0_get_field_fns[] = {
- Field_t_Slot_xt_flix64_slot0_get,
- 0,
- 0,
- 0,
- Field_imm8_Slot_xt_flix64_slot0_get,
- Field_s_Slot_xt_flix64_slot0_get,
- Field_imm12b_Slot_xt_flix64_slot0_get,
- Field_imm16_Slot_xt_flix64_slot0_get,
- Field_m_Slot_xt_flix64_slot0_get,
- Field_n_Slot_xt_flix64_slot0_get,
- 0,
- 0,
- Field_op1_Slot_xt_flix64_slot0_get,
- Field_op2_Slot_xt_flix64_slot0_get,
- Field_r_Slot_xt_flix64_slot0_get,
- 0,
- Field_sae4_Slot_xt_flix64_slot0_get,
- Field_sae_Slot_xt_flix64_slot0_get,
- Field_sal_Slot_xt_flix64_slot0_get,
- Field_sargt_Slot_xt_flix64_slot0_get,
- 0,
- Field_sas_Slot_xt_flix64_slot0_get,
- 0,
- 0,
- Field_thi3_Slot_xt_flix64_slot0_get,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_op0_xt_flix64_slot0_s3_Slot_xt_flix64_slot0_get,
- Field_combined3e2c5767_fld7_Slot_xt_flix64_slot0_get,
- Field_combined3e2c5767_fld8_Slot_xt_flix64_slot0_get,
- Field_combined3e2c5767_fld9_Slot_xt_flix64_slot0_get,
- Field_combined3e2c5767_fld11_Slot_xt_flix64_slot0_get,
- Field_combined3e2c5767_fld49xt_flix64_slot0_Slot_xt_flix64_slot0_get,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_op0_xt_flix64_slot0_Slot_xt_flix64_slot0_get,
- Implicit_Field_ar0_get,
- Implicit_Field_ar4_get,
- Implicit_Field_ar8_get,
- Implicit_Field_ar12_get,
- Implicit_Field_mr0_get,
- Implicit_Field_mr1_get,
- Implicit_Field_mr2_get,
- Implicit_Field_mr3_get,
- Implicit_Field_bt16_get,
- Implicit_Field_bs16_get,
- Implicit_Field_br16_get,
- Implicit_Field_brall_get
-};
-
-static xtensa_set_field_fn
-Slot_xt_flix64_slot0_set_field_fns[] = {
- Field_t_Slot_xt_flix64_slot0_set,
- 0,
- 0,
- 0,
- Field_imm8_Slot_xt_flix64_slot0_set,
- Field_s_Slot_xt_flix64_slot0_set,
- Field_imm12b_Slot_xt_flix64_slot0_set,
- Field_imm16_Slot_xt_flix64_slot0_set,
- Field_m_Slot_xt_flix64_slot0_set,
- Field_n_Slot_xt_flix64_slot0_set,
- 0,
- 0,
- Field_op1_Slot_xt_flix64_slot0_set,
- Field_op2_Slot_xt_flix64_slot0_set,
- Field_r_Slot_xt_flix64_slot0_set,
- 0,
- Field_sae4_Slot_xt_flix64_slot0_set,
- Field_sae_Slot_xt_flix64_slot0_set,
- Field_sal_Slot_xt_flix64_slot0_set,
- Field_sargt_Slot_xt_flix64_slot0_set,
- 0,
- Field_sas_Slot_xt_flix64_slot0_set,
- 0,
- 0,
- Field_thi3_Slot_xt_flix64_slot0_set,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_op0_xt_flix64_slot0_s3_Slot_xt_flix64_slot0_set,
- Field_combined3e2c5767_fld7_Slot_xt_flix64_slot0_set,
- Field_combined3e2c5767_fld8_Slot_xt_flix64_slot0_set,
- Field_combined3e2c5767_fld9_Slot_xt_flix64_slot0_set,
- Field_combined3e2c5767_fld11_Slot_xt_flix64_slot0_set,
- Field_combined3e2c5767_fld49xt_flix64_slot0_Slot_xt_flix64_slot0_set,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_op0_xt_flix64_slot0_Slot_xt_flix64_slot0_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set
-};
-
-static xtensa_get_field_fn
-Slot_xt_flix64_slot1_get_field_fns[] = {
- Field_t_Slot_xt_flix64_slot1_get,
- 0,
- 0,
- 0,
- Field_imm8_Slot_xt_flix64_slot1_get,
- Field_s_Slot_xt_flix64_slot1_get,
- Field_imm12b_Slot_xt_flix64_slot1_get,
- 0,
- 0,
- 0,
- Field_offset_Slot_xt_flix64_slot1_get,
- 0,
- 0,
- Field_op2_Slot_xt_flix64_slot1_get,
- Field_r_Slot_xt_flix64_slot1_get,
- 0,
- 0,
- Field_sae_Slot_xt_flix64_slot1_get,
- Field_sal_Slot_xt_flix64_slot1_get,
- Field_sargt_Slot_xt_flix64_slot1_get,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_op0_s4_Slot_xt_flix64_slot1_get,
- Field_combined3e2c5767_fld16_Slot_xt_flix64_slot1_get,
- Field_combined3e2c5767_fld19xt_flix64_slot1_Slot_xt_flix64_slot1_get,
- Field_combined3e2c5767_fld20xt_flix64_slot1_Slot_xt_flix64_slot1_get,
- Field_combined3e2c5767_fld21xt_flix64_slot1_Slot_xt_flix64_slot1_get,
- Field_combined3e2c5767_fld22xt_flix64_slot1_Slot_xt_flix64_slot1_get,
- Field_combined3e2c5767_fld23xt_flix64_slot1_Slot_xt_flix64_slot1_get,
- Field_combined3e2c5767_fld25xt_flix64_slot1_Slot_xt_flix64_slot1_get,
- Field_combined3e2c5767_fld26xt_flix64_slot1_Slot_xt_flix64_slot1_get,
- Field_combined3e2c5767_fld28xt_flix64_slot1_Slot_xt_flix64_slot1_get,
- Field_combined3e2c5767_fld30xt_flix64_slot1_Slot_xt_flix64_slot1_get,
- Field_combined3e2c5767_fld32xt_flix64_slot1_Slot_xt_flix64_slot1_get,
- Field_combined3e2c5767_fld33xt_flix64_slot1_Slot_xt_flix64_slot1_get,
- Field_combined3e2c5767_fld35xt_flix64_slot1_Slot_xt_flix64_slot1_get,
- Field_combined3e2c5767_fld51xt_flix64_slot1_Slot_xt_flix64_slot1_get,
- Field_combined3e2c5767_fld52xt_flix64_slot1_Slot_xt_flix64_slot1_get,
- Field_combined3e2c5767_fld53xt_flix64_slot1_Slot_xt_flix64_slot1_get,
- Field_combined3e2c5767_fld54xt_flix64_slot1_Slot_xt_flix64_slot1_get,
- Field_combined3e2c5767_fld57xt_flix64_slot1_Slot_xt_flix64_slot1_get,
- Field_combined3e2c5767_fld58xt_flix64_slot1_Slot_xt_flix64_slot1_get,
- Field_combined3e2c5767_fld60xt_flix64_slot1_Slot_xt_flix64_slot1_get,
- Field_combined3e2c5767_fld62xt_flix64_slot1_Slot_xt_flix64_slot1_get,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Implicit_Field_ar0_get,
- Implicit_Field_ar4_get,
- Implicit_Field_ar8_get,
- Implicit_Field_ar12_get,
- Implicit_Field_mr0_get,
- Implicit_Field_mr1_get,
- Implicit_Field_mr2_get,
- Implicit_Field_mr3_get,
- Implicit_Field_bt16_get,
- Implicit_Field_bs16_get,
- Implicit_Field_br16_get,
- Implicit_Field_brall_get
-};
-
-static xtensa_set_field_fn
-Slot_xt_flix64_slot1_set_field_fns[] = {
- Field_t_Slot_xt_flix64_slot1_set,
- 0,
- 0,
- 0,
- Field_imm8_Slot_xt_flix64_slot1_set,
- Field_s_Slot_xt_flix64_slot1_set,
- Field_imm12b_Slot_xt_flix64_slot1_set,
- 0,
- 0,
- 0,
- Field_offset_Slot_xt_flix64_slot1_set,
- 0,
- 0,
- Field_op2_Slot_xt_flix64_slot1_set,
- Field_r_Slot_xt_flix64_slot1_set,
- 0,
- 0,
- Field_sae_Slot_xt_flix64_slot1_set,
- Field_sal_Slot_xt_flix64_slot1_set,
- Field_sargt_Slot_xt_flix64_slot1_set,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_op0_s4_Slot_xt_flix64_slot1_set,
- Field_combined3e2c5767_fld16_Slot_xt_flix64_slot1_set,
- Field_combined3e2c5767_fld19xt_flix64_slot1_Slot_xt_flix64_slot1_set,
- Field_combined3e2c5767_fld20xt_flix64_slot1_Slot_xt_flix64_slot1_set,
- Field_combined3e2c5767_fld21xt_flix64_slot1_Slot_xt_flix64_slot1_set,
- Field_combined3e2c5767_fld22xt_flix64_slot1_Slot_xt_flix64_slot1_set,
- Field_combined3e2c5767_fld23xt_flix64_slot1_Slot_xt_flix64_slot1_set,
- Field_combined3e2c5767_fld25xt_flix64_slot1_Slot_xt_flix64_slot1_set,
- Field_combined3e2c5767_fld26xt_flix64_slot1_Slot_xt_flix64_slot1_set,
- Field_combined3e2c5767_fld28xt_flix64_slot1_Slot_xt_flix64_slot1_set,
- Field_combined3e2c5767_fld30xt_flix64_slot1_Slot_xt_flix64_slot1_set,
- Field_combined3e2c5767_fld32xt_flix64_slot1_Slot_xt_flix64_slot1_set,
- Field_combined3e2c5767_fld33xt_flix64_slot1_Slot_xt_flix64_slot1_set,
- Field_combined3e2c5767_fld35xt_flix64_slot1_Slot_xt_flix64_slot1_set,
- Field_combined3e2c5767_fld51xt_flix64_slot1_Slot_xt_flix64_slot1_set,
- Field_combined3e2c5767_fld52xt_flix64_slot1_Slot_xt_flix64_slot1_set,
- Field_combined3e2c5767_fld53xt_flix64_slot1_Slot_xt_flix64_slot1_set,
- Field_combined3e2c5767_fld54xt_flix64_slot1_Slot_xt_flix64_slot1_set,
- Field_combined3e2c5767_fld57xt_flix64_slot1_Slot_xt_flix64_slot1_set,
- Field_combined3e2c5767_fld58xt_flix64_slot1_Slot_xt_flix64_slot1_set,
- Field_combined3e2c5767_fld60xt_flix64_slot1_Slot_xt_flix64_slot1_set,
- Field_combined3e2c5767_fld62xt_flix64_slot1_Slot_xt_flix64_slot1_set,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set
-};
-
-static xtensa_get_field_fn
-Slot_xt_flix64_slot2_get_field_fns[] = {
- Field_t_Slot_xt_flix64_slot2_get,
- 0,
- 0,
- 0,
- 0,
- Field_s_Slot_xt_flix64_slot2_get,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_r_Slot_xt_flix64_slot2_get,
- 0,
- 0,
- 0,
- 0,
- Field_sargt_Slot_xt_flix64_slot2_get,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_imm7_Slot_xt_flix64_slot2_get,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_op0_s5_Slot_xt_flix64_slot2_get,
- Field_combined3e2c5767_fld36xt_flix64_slot2_Slot_xt_flix64_slot2_get,
- Field_combined3e2c5767_fld37xt_flix64_slot2_Slot_xt_flix64_slot2_get,
- Field_combined3e2c5767_fld39xt_flix64_slot2_Slot_xt_flix64_slot2_get,
- Field_combined3e2c5767_fld41xt_flix64_slot2_Slot_xt_flix64_slot2_get,
- Field_combined3e2c5767_fld42xt_flix64_slot2_Slot_xt_flix64_slot2_get,
- Field_combined3e2c5767_fld44xt_flix64_slot2_Slot_xt_flix64_slot2_get,
- Field_combined3e2c5767_fld45xt_flix64_slot2_Slot_xt_flix64_slot2_get,
- Field_combined3e2c5767_fld47xt_flix64_slot2_Slot_xt_flix64_slot2_get,
- Field_combined3e2c5767_fld63xt_flix64_slot2_Slot_xt_flix64_slot2_get,
- Field_combined3e2c5767_fld64xt_flix64_slot2_Slot_xt_flix64_slot2_get,
- Field_combined3e2c5767_fld65xt_flix64_slot2_Slot_xt_flix64_slot2_get,
- Field_combined3e2c5767_fld66xt_flix64_slot2_Slot_xt_flix64_slot2_get,
- Field_combined3e2c5767_fld68xt_flix64_slot2_Slot_xt_flix64_slot2_get,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Implicit_Field_ar0_get,
- Implicit_Field_ar4_get,
- Implicit_Field_ar8_get,
- Implicit_Field_ar12_get,
- Implicit_Field_mr0_get,
- Implicit_Field_mr1_get,
- Implicit_Field_mr2_get,
- Implicit_Field_mr3_get,
- Implicit_Field_bt16_get,
- Implicit_Field_bs16_get,
- Implicit_Field_br16_get,
- Implicit_Field_brall_get
-};
-
-static xtensa_set_field_fn
-Slot_xt_flix64_slot2_set_field_fns[] = {
- Field_t_Slot_xt_flix64_slot2_set,
- 0,
- 0,
- 0,
- 0,
- Field_s_Slot_xt_flix64_slot2_set,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_r_Slot_xt_flix64_slot2_set,
- 0,
- 0,
- 0,
- 0,
- Field_sargt_Slot_xt_flix64_slot2_set,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_imm7_Slot_xt_flix64_slot2_set,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_op0_s5_Slot_xt_flix64_slot2_set,
- Field_combined3e2c5767_fld36xt_flix64_slot2_Slot_xt_flix64_slot2_set,
- Field_combined3e2c5767_fld37xt_flix64_slot2_Slot_xt_flix64_slot2_set,
- Field_combined3e2c5767_fld39xt_flix64_slot2_Slot_xt_flix64_slot2_set,
- Field_combined3e2c5767_fld41xt_flix64_slot2_Slot_xt_flix64_slot2_set,
- Field_combined3e2c5767_fld42xt_flix64_slot2_Slot_xt_flix64_slot2_set,
- Field_combined3e2c5767_fld44xt_flix64_slot2_Slot_xt_flix64_slot2_set,
- Field_combined3e2c5767_fld45xt_flix64_slot2_Slot_xt_flix64_slot2_set,
- Field_combined3e2c5767_fld47xt_flix64_slot2_Slot_xt_flix64_slot2_set,
- Field_combined3e2c5767_fld63xt_flix64_slot2_Slot_xt_flix64_slot2_set,
- Field_combined3e2c5767_fld64xt_flix64_slot2_Slot_xt_flix64_slot2_set,
- Field_combined3e2c5767_fld65xt_flix64_slot2_Slot_xt_flix64_slot2_set,
- Field_combined3e2c5767_fld66xt_flix64_slot2_Slot_xt_flix64_slot2_set,
- Field_combined3e2c5767_fld68xt_flix64_slot2_Slot_xt_flix64_slot2_set,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set
-};
-
-static xtensa_get_field_fn
-Slot_xt_flix64_slot3_get_field_fns[] = {
- Field_t_Slot_xt_flix64_slot3_get,
- 0,
- Field_bbi_Slot_xt_flix64_slot3_get,
- 0,
- 0,
- Field_s_Slot_xt_flix64_slot3_get,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_r_Slot_xt_flix64_slot3_get,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_xt_wbr18_imm_Slot_xt_flix64_slot3_get,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_op0_s6_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld70xt_flix64_slot3_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld71_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld72xt_flix64_slot3_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld73xt_flix64_slot3_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld74xt_flix64_slot3_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld75xt_flix64_slot3_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld76xt_flix64_slot3_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld77xt_flix64_slot3_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld78xt_flix64_slot3_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld79xt_flix64_slot3_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld80xt_flix64_slot3_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld81xt_flix64_slot3_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld82xt_flix64_slot3_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld83xt_flix64_slot3_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld84xt_flix64_slot3_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld85xt_flix64_slot3_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld86xt_flix64_slot3_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld87xt_flix64_slot3_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld88xt_flix64_slot3_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld89xt_flix64_slot3_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld90xt_flix64_slot3_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld91xt_flix64_slot3_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld92xt_flix64_slot3_Slot_xt_flix64_slot3_get,
- Field_combined3e2c5767_fld93xt_flix64_slot3_Slot_xt_flix64_slot3_get,
- 0,
- Implicit_Field_ar0_get,
- Implicit_Field_ar4_get,
- Implicit_Field_ar8_get,
- Implicit_Field_ar12_get,
- Implicit_Field_mr0_get,
- Implicit_Field_mr1_get,
- Implicit_Field_mr2_get,
- Implicit_Field_mr3_get,
- Implicit_Field_bt16_get,
- Implicit_Field_bs16_get,
- Implicit_Field_br16_get,
- Implicit_Field_brall_get
-};
-
-static xtensa_set_field_fn
-Slot_xt_flix64_slot3_set_field_fns[] = {
- Field_t_Slot_xt_flix64_slot3_set,
- 0,
- Field_bbi_Slot_xt_flix64_slot3_set,
- 0,
- 0,
- Field_s_Slot_xt_flix64_slot3_set,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_r_Slot_xt_flix64_slot3_set,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_xt_wbr18_imm_Slot_xt_flix64_slot3_set,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- 0,
- Field_op0_s6_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld70xt_flix64_slot3_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld71_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld72xt_flix64_slot3_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld73xt_flix64_slot3_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld74xt_flix64_slot3_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld75xt_flix64_slot3_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld76xt_flix64_slot3_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld77xt_flix64_slot3_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld78xt_flix64_slot3_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld79xt_flix64_slot3_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld80xt_flix64_slot3_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld81xt_flix64_slot3_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld82xt_flix64_slot3_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld83xt_flix64_slot3_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld84xt_flix64_slot3_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld85xt_flix64_slot3_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld86xt_flix64_slot3_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld87xt_flix64_slot3_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld88xt_flix64_slot3_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld89xt_flix64_slot3_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld90xt_flix64_slot3_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld91xt_flix64_slot3_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld92xt_flix64_slot3_Slot_xt_flix64_slot3_set,
- Field_combined3e2c5767_fld93xt_flix64_slot3_Slot_xt_flix64_slot3_set,
- 0,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set,
- Implicit_Field_set
-};
-
-static xtensa_slot_internal slots[] = {
- { "Inst", "x24", 0,
- Slot_x24_Format_inst_0_get, Slot_x24_Format_inst_0_set,
- Slot_inst_get_field_fns, Slot_inst_set_field_fns,
- Slot_inst_decode, "nop" },
- { "Inst16a", "x16a", 0,
- Slot_x16a_Format_inst16a_0_get, Slot_x16a_Format_inst16a_0_set,
- Slot_inst16a_get_field_fns, Slot_inst16a_set_field_fns,
- Slot_inst16a_decode, "" },
- { "Inst16b", "x16b", 0,
- Slot_x16b_Format_inst16b_0_get, Slot_x16b_Format_inst16b_0_set,
- Slot_inst16b_get_field_fns, Slot_inst16b_set_field_fns,
- Slot_inst16b_decode, "nop.n" },
- { "xt_flix64_slot0", "xt_format1", 0,
- Slot_xt_format1_Format_xt_flix64_slot0_4_get, Slot_xt_format1_Format_xt_flix64_slot0_4_set,
- Slot_xt_flix64_slot0_get_field_fns, Slot_xt_flix64_slot0_set_field_fns,
- Slot_xt_flix64_slot0_decode, "nop" },
- { "xt_flix64_slot0", "xt_format2", 0,
- Slot_xt_format2_Format_xt_flix64_slot0_4_get, Slot_xt_format2_Format_xt_flix64_slot0_4_set,
- Slot_xt_flix64_slot0_get_field_fns, Slot_xt_flix64_slot0_set_field_fns,
- Slot_xt_flix64_slot0_decode, "nop" },
- { "xt_flix64_slot1", "xt_format1", 1,
- Slot_xt_format1_Format_xt_flix64_slot1_28_get, Slot_xt_format1_Format_xt_flix64_slot1_28_set,
- Slot_xt_flix64_slot1_get_field_fns, Slot_xt_flix64_slot1_set_field_fns,
- Slot_xt_flix64_slot1_decode, "nop" },
- { "xt_flix64_slot2", "xt_format1", 2,
- Slot_xt_format1_Format_xt_flix64_slot2_48_get, Slot_xt_format1_Format_xt_flix64_slot2_48_set,
- Slot_xt_flix64_slot2_get_field_fns, Slot_xt_flix64_slot2_set_field_fns,
- Slot_xt_flix64_slot2_decode, "nop" },
- { "xt_flix64_slot3", "xt_format2", 1,
- Slot_xt_format2_Format_xt_flix64_slot3_28_get, Slot_xt_format2_Format_xt_flix64_slot3_28_set,
- Slot_xt_flix64_slot3_get_field_fns, Slot_xt_flix64_slot3_set_field_fns,
- Slot_xt_flix64_slot3_decode, "nop" }
-};
-
-
-/* Instruction formats. */
-
-static void
-Format_x24_encode (xtensa_insnbuf insn)
-{
- insn[0] = 0;
- insn[1] = 0;
-}
-
-static void
-Format_x16a_encode (xtensa_insnbuf insn)
-{
- insn[0] = 0x8;
- insn[1] = 0;
-}
-
-static void
-Format_x16b_encode (xtensa_insnbuf insn)
-{
- insn[0] = 0xc;
- insn[1] = 0;
-}
-
-static void
-Format_xt_format1_encode (xtensa_insnbuf insn)
-{
- insn[0] = 0xe;
- insn[1] = 0;
-}
-
-static void
-Format_xt_format2_encode (xtensa_insnbuf insn)
-{
- insn[0] = 0xf;
- insn[1] = 0;
-}
-
-static int Format_x24_slots[] = { 0 };
-
-static int Format_x16a_slots[] = { 1 };
-
-static int Format_x16b_slots[] = { 2 };
-
-static int Format_xt_format1_slots[] = { 3, 5, 6 };
-
-static int Format_xt_format2_slots[] = { 4, 7 };
-
-static xtensa_format_internal formats[] = {
- { "x24", 3, Format_x24_encode, 1, Format_x24_slots },
- { "x16a", 2, Format_x16a_encode, 1, Format_x16a_slots },
- { "x16b", 2, Format_x16b_encode, 1, Format_x16b_slots },
- { "xt_format1", 8, Format_xt_format1_encode, 3, Format_xt_format1_slots },
- { "xt_format2", 8, Format_xt_format2_encode, 2, Format_xt_format2_slots }
-};
-
-
-static int
-format_decoder (const xtensa_insnbuf insn)
-{
- if ((insn[0] & 0x8) == 0 && (insn[1] & 0) == 0) {
- return 0; /* x24 */
- }
- if ((insn[0] & 0xc) == 0x8 && (insn[1] & 0) == 0) {
- return 1; /* x16a */
- }
- if ((insn[0] & 0xe) == 0xc && (insn[1] & 0) == 0) {
- return 2; /* x16b */
- }
- if ((insn[0] & 0xf) == 0xe && (insn[1] & 0) == 0) {
- return 3; /* xt_format1 */
- }
- if ((insn[0] & 0xf) == 0xf && (insn[1] & 0x80000000) == 0) {
- return 4; /* xt_format2 */
- }
- return -1;
-}
-
-static int length_table[16] = {
- 3,
- 3,
- 3,
- 3,
- 3,
- 3,
- 3,
- 3,
- 2,
- 2,
- 2,
- 2,
- 2,
- 2,
- 8,
- 8
-};
-
-static int
-length_decoder (const unsigned char *insn)
-{
- int op0 = insn[0] & 0xf;
- return length_table[op0];
-}
-
-
-/* Top-level ISA structure. */
-
-xtensa_isa_internal xtensa_modules = {
- 0 /* little-endian */,
- 8 /* insn_size */, 0,
- 5, formats, format_decoder, length_decoder,
- 8, slots,
- 135 /* num_fields */,
- 188, operands,
- 355, iclasses,
- 530, opcodes, 0,
- 8, regfiles,
- NUM_STATES, states, 0,
- NUM_SYSREGS, sysregs, 0,
- { MAX_SPECIAL_REG, MAX_USER_REG }, { 0, 0 },
- 0, interfaces, 0,
- 0, funcUnits, 0
-};
diff --git a/librz/arch/meson.build b/librz/arch/meson.build
index 0fd00351960..6a0603234c0 100644
--- a/librz/arch/meson.build
+++ b/librz/arch/meson.build
@@ -307,17 +307,21 @@ if capstone_dep.version() == 'next' or capstone_dep.version().split('.')[0].to_i
arch_plugins_list += [
'riscv_cs',
'tricore_cs',
+ 'xtensa_cs',
]
# plugins sources
arch_plugin_sources += [
'p/arch_riscv_cs.c',
'p/arch_tricore_cs.c',
+ 'p/arch_xtensa_cs.c',
]
# isa sources
arch_isa_sources += [
'isa/tricore/tricore_il.c',
+ 'isa/xtensa/xtensa.c',
+ 'isa/xtensa/xtensa_esil.c',
]
endif
@@ -332,7 +336,6 @@ if get_option('use_gpl')
'riscv_gnu',
'sparc_gnu',
'vax_gnu',
- 'xtensa_gnu',
'z80_gnu',
]
@@ -346,7 +349,6 @@ if get_option('use_gpl')
'p_gnu/arch_riscv.c',
'p_gnu/arch_sparc.c',
'p_gnu/arch_vax.c',
- 'p_gnu/arch_xtensa.c',
'p_gnu/arch_z80.c',
]
@@ -369,10 +371,6 @@ if get_option('use_gpl')
'isa_gnu/sparc/sparc-dis.c',
'isa_gnu/sparc/sparc-opc.c',
'isa_gnu/vax/vax-dis.c',
- 'isa_gnu/xtensa/elf32-xtensa.c',
- 'isa_gnu/xtensa/xtensa-dis.c',
- 'isa_gnu/xtensa/xtensa-isa.c',
- 'isa_gnu/xtensa/xtensa-modules.c',
# 'isa_gnu/z80/expressions.c',
# 'isa_gnu/z80/z80.c',
# 'isa_gnu/z80/z80asm.c',
diff --git a/librz/arch/p/analysis/analysis_xtensa_cs.c b/librz/arch/p/analysis/analysis_xtensa_cs.c
new file mode 100644
index 00000000000..e3ef2f40eb5
--- /dev/null
+++ b/librz/arch/p/analysis/analysis_xtensa_cs.c
@@ -0,0 +1,366 @@
+// SPDX-FileCopyrightText: 2024 billow <billow.fun@gmail.com>
+// SPDX-License-Identifier: LGPL-3.0-only
+
+#include <rz_lib.h>
+#include <rz_analysis.h>
+#include <rz_util.h>
+#include <rz_endian.h>
+#include <xtensa/xtensa.h>
+
+static int xtensa_archinfo(RzAnalysis *a, RzAnalysisInfoType query) {
+ switch (query) {
+ case RZ_ANALYSIS_ARCHINFO_MIN_OP_SIZE:
+ return 2;
+ case RZ_ANALYSIS_ARCHINFO_MAX_OP_SIZE:
+ return 6;
+ case RZ_ANALYSIS_ARCHINFO_CAN_USE_POINTERS:
+ return 1;
+ default:
+ return -1;
+ }
+}
+
+static char *xtensa_get_reg_profile(RzAnalysis *analysis) {
+ return rz_str_dup(
+ // Assuming call0 ABI
+ "# a0 return address\n"
+ "# a1 stack pointer\n"
+ "# a2-a7 arguments\n"
+ "# a2-a5 return value (call0 ABI)\n"
+ "# a12-a15 callee-saved (call0 ABI)\n"
+ "=PC pc\n"
+ "=BP a14\n"
+ "=SP a1\n"
+ "=A0 a2\n"
+ "=A1 a3\n"
+ "=A2 a4\n"
+ "=A3 a5\n"
+ "=A4 a6\n"
+ "=A5 a7\n"
+ "=R0 a2\n"
+ "=R1 a3\n"
+ "=R2 a4\n"
+ "=R3 a5\n"
+ "gpr a0 .32 0 0\n"
+ "gpr a1 .32 4 0\n"
+ "gpr a2 .32 8 0\n"
+ "gpr a3 .32 16 0\n"
+ "gpr a4 .32 20 0\n"
+ "gpr a5 .32 24 0\n"
+ "gpr a6 .32 28 0\n"
+ "gpr a7 .32 32 0\n"
+ "gpr a8 .32 36 0\n"
+ "gpr a9 .32 40 0\n"
+ "gpr a10 .32 44 0\n"
+ "gpr a11 .32 48 0\n"
+ "gpr a12 .32 52 0\n"
+ "gpr a13 .32 56 0\n"
+ "gpr a14 .32 60 0\n"
+ "gpr a15 .32 64 0\n"
+
+ // pc
+ "gpr pc .32 68 0\n"
+
+ // sr
+ "gpr sar .32 72 0\n");
+}
+
+static RzTypeCond xtensa_cond(xtensa_insn insn) {
+ switch (insn) {
+ case XTENSA_INS_BEQI: return RZ_TYPE_COND_EQ;
+ case XTENSA_INS_BNEI: return RZ_TYPE_COND_NE;
+ case XTENSA_INS_BGEI: return RZ_TYPE_COND_GE;
+ case XTENSA_INS_BLTI: return RZ_TYPE_COND_LT;
+ case XTENSA_INS_BGEUI: return RZ_TYPE_COND_GE;
+ case XTENSA_INS_BLTUI: return RZ_TYPE_COND_LT;
+ case XTENSA_INS_BBCI: return RZ_TYPE_COND_LT;
+ case XTENSA_INS_BBSI: return RZ_TYPE_COND_LT;
+ case XTENSA_INS_BEQ: return RZ_TYPE_COND_EQ;
+ case XTENSA_INS_BNE: return RZ_TYPE_COND_NE;
+ case XTENSA_INS_BGE: return RZ_TYPE_COND_GE;
+ case XTENSA_INS_BLT: return RZ_TYPE_COND_LT;
+ case XTENSA_INS_BGEU: return RZ_TYPE_COND_GE;
+ case XTENSA_INS_BLTU: return RZ_TYPE_COND_LT;
+ case XTENSA_INS_BANY:
+ case XTENSA_INS_BNONE:
+ case XTENSA_INS_BALL:
+ case XTENSA_INS_BNALL:
+ case XTENSA_INS_BBC:
+ case XTENSA_INS_BBS: break;
+ case XTENSA_INS_BEQZ: return RZ_TYPE_COND_EQ;
+ case XTENSA_INS_BNEZ: return RZ_TYPE_COND_NE;
+ case XTENSA_INS_BGEZ: return RZ_TYPE_COND_GE;
+ case XTENSA_INS_BLTZ: return RZ_TYPE_COND_LT;
+ default: break;
+ }
+ return RZ_TYPE_COND_AL;
+}
+
+static void xop_to_rval(RzAnalysis *a, XtensaContext *ctx, cs_xtensa_op *xop, RzAnalysisValue **prv) {
+ RzAnalysisValue *rv = rz_analysis_value_new();
+ if (!rv) {
+ return;
+ }
+
+ if (xop->access & CS_AC_WRITE) {
+ rv->access |= RZ_ANALYSIS_ACC_W;
+ }
+ if (xop->access & CS_AC_READ) {
+ rv->access |= RZ_ANALYSIS_ACC_R;
+ }
+ switch (xop->type) {
+ case XTENSA_OP_REG:
+ rv->reg = rz_reg_get(a->reg, cs_reg_name(ctx->handle, xop->reg), RZ_REG_TYPE_ANY);
+ rv->type = RZ_ANALYSIS_VAL_REG;
+ break;
+ case XTENSA_OP_IMM:
+ rv->imm = xop->imm;
+ rv->type = RZ_ANALYSIS_VAL_IMM;
+ break;
+ case XTENSA_OP_MEM:
+ rv->reg = rz_reg_get(a->reg, cs_reg_name(ctx->handle, xop->mem.base), RZ_REG_TYPE_ANY);
+ rv->delta = xop->mem.disp;
+ rv->type = RZ_ANALYSIS_VAL_MEM;
+ break;
+ case XTENSA_OP_L32R:
+ rv->reg = rz_reg_get(a->reg, "pc", RZ_REG_TYPE_ANY);
+ rv->delta = xop->imm;
+ rv->type = RZ_ANALYSIS_VAL_MEM;
+ break;
+ default:
+ rv->type = RZ_ANALYSIS_VAL_UNK;
+ break;
+ }
+ if (*prv) {
+ rz_analysis_value_free(*prv);
+ }
+ *prv = rv;
+}
+
+static void xtensa_analyze_op(RzAnalysis *a, RzAnalysisOp *op, XtensaContext *ctx) {
+ int src_count = 0;
+ for (int i = 0; i < ctx->insn->detail->xtensa.op_count; ++i) {
+ cs_xtensa_op *xop = XOP(i);
+ if (xop->access & CS_AC_WRITE) {
+ xop_to_rval(a, ctx, xop, &op->dst);
+ }
+ if (xop->access & CS_AC_READ) {
+ xop_to_rval(a, ctx, xop, &op->src[src_count++]);
+ }
+ }
+
+ switch (ctx->insn->id) {
+ case XTENSA_INS_ADD: /* add */
+ case XTENSA_INS_ADDX2: /* addx2 */
+ case XTENSA_INS_ADDX4: /* addx4 */
+ case XTENSA_INS_ADDX8: /* addx8 */
+ case XTENSA_INS_ADD_N:
+ case XTENSA_INS_ADD_S:
+ op->type = RZ_ANALYSIS_OP_TYPE_ADD;
+ break;
+ case XTENSA_INS_SUB: /* sub */
+ case XTENSA_INS_SUBX2: /* subx2 */
+ case XTENSA_INS_SUBX4: /* subx4 */
+ case XTENSA_INS_SUBX8: /* subx8 */
+ op->type = RZ_ANALYSIS_OP_TYPE_SUB;
+ break;
+ case XTENSA_INS_MOVI:
+ case XTENSA_INS_MOVI_N:
+ case XTENSA_INS_MOV_S:
+ op->type = RZ_ANALYSIS_OP_TYPE_MOV;
+ break;
+ case XTENSA_INS_EXCW:
+ case XTENSA_INS_NOP: /* nop.n */
+ op->type = RZ_ANALYSIS_OP_TYPE_NOP;
+ break;
+ case XTENSA_INS_S32I: /* s32i */
+ case XTENSA_INS_S16I: /* s16i */
+ case XTENSA_INS_S8I: /* s8i */
+ case XTENSA_INS_S32I_N:
+ case XTENSA_INS_S32C1I:
+ op->type = RZ_ANALYSIS_OP_TYPE_STORE;
+ op->direction = RZ_ANALYSIS_OP_DIR_WRITE;
+ if (XOP(1)->type == XTENSA_OP_MEM && MEM(1)->base == XTENSA_REG_SP) {
+ op->type = RZ_ANALYSIS_OP_TYPE_PUSH;
+ }
+ break;
+ case XTENSA_INS_ADDI: /* addi */
+ case XTENSA_INS_ADDI_N: {
+ op->type = RZ_ANALYSIS_OP_TYPE_ADD;
+ // a1 = stack
+ if (REGI(0) == XTENSA_REG_SP && REGI(1) == XTENSA_REG_SP) {
+ op->val = IMM(2);
+ op->stackptr = -IMM(2);
+ op->stackop = RZ_ANALYSIS_STACK_INC;
+ }
+ break;
+ }
+ case XTENSA_INS_RET: /* ret */
+ case XTENSA_INS_RET_N:
+ case XTENSA_INS_RETW_N:
+ op->eob = true;
+ op->type = RZ_ANALYSIS_OP_TYPE_RET;
+ break;
+ case XTENSA_INS_L16UI: /* l16ui */
+ case XTENSA_INS_L16SI: /* l16si */
+ case XTENSA_INS_L32I: /* l32i */
+ case XTENSA_INS_L8UI: /* l8ui */
+ case XTENSA_INS_L32I_N:
+ case XTENSA_INS_L32R:
+ case XTENSA_INS_L32E:
+ op->type = RZ_ANALYSIS_OP_TYPE_LOAD;
+ op->direction = RZ_ANALYSIS_OP_DIR_READ;
+ if (XOP(1)->type == XTENSA_OP_MEM && MEM(1)->base == XTENSA_REG_SP) {
+ op->type = RZ_ANALYSIS_OP_TYPE_POP;
+ }
+ break;
+ case XTENSA_INS_ADDMI: /* addmi */
+ op->type = RZ_ANALYSIS_OP_TYPE_ADD;
+ break;
+ case XTENSA_INS_AND: /* and */
+ case XTENSA_INS_OR: /* or */
+ case XTENSA_INS_XOR: /* xor */
+ op->type = RZ_ANALYSIS_OP_TYPE_COND;
+ break;
+ case XTENSA_INS_BEQZ: /* beqz */
+ case XTENSA_INS_BNEZ: /* bnez */
+ case XTENSA_INS_BGEZ: /* bgez */
+ case XTENSA_INS_BLTZ: /* bltz */
+ op->type = RZ_ANALYSIS_OP_TYPE_CJMP;
+ op->jump = ctx->insn->address + IMM(1);
+ op->fail = ctx->insn->address + ctx->insn->size;
+ op->cond = xtensa_cond(ctx->insn->id);
+ break;
+ case XTENSA_INS_BEQ:
+ case XTENSA_INS_BNE:
+ case XTENSA_INS_BGE:
+ case XTENSA_INS_BLT:
+ case XTENSA_INS_BGEU: /* bgeu */
+ case XTENSA_INS_BLTU: /* bltu */
+ case XTENSA_INS_BEQI: /* beqi */
+ case XTENSA_INS_BNEI: /* bnei */
+ case XTENSA_INS_BGEI: /* bgei */
+ case XTENSA_INS_BLTI: /* blti */
+ case XTENSA_INS_BGEUI: /* bgeui */
+ case XTENSA_INS_BLTUI: /* bltui */
+ case XTENSA_INS_BANY: /* bany */
+ case XTENSA_INS_BNONE: /* bnone */
+ case XTENSA_INS_BALL: /* ball */
+ case XTENSA_INS_BNALL: /* bnall */
+ case XTENSA_INS_BBCI: /* bbci */
+ case XTENSA_INS_BBSI: /* bbsi */
+ case XTENSA_INS_BBC: /* bbc */
+ case XTENSA_INS_BBS: /* bbs */
+ op->type = RZ_ANALYSIS_OP_TYPE_CJMP;
+ op->jump = ctx->insn->address + IMM(2);
+ op->fail = ctx->insn->address + ctx->insn->size;
+ op->cond = xtensa_cond(ctx->insn->id);
+ break;
+ case XTENSA_INS_EXTUI: /* extui */
+ op->type = RZ_ANALYSIS_OP_TYPE_CAST;
+ break;
+ case XTENSA_INS_J: /* j */
+ op->type = RZ_ANALYSIS_OP_TYPE_JMP;
+ op->jump = ctx->insn->address + IMM(0);
+ op->fail = ctx->insn->address + ctx->insn->size;
+ break;
+ case XTENSA_INS_CALLX0: /* callx0 */
+ case XTENSA_INS_CALLX4:
+ case XTENSA_INS_CALLX8:
+ case XTENSA_INS_CALLX12:
+ op->type = RZ_ANALYSIS_OP_TYPE_RCALL;
+ op->reg = REGN(0);
+ break;
+ case XTENSA_INS_CALL0: /* call0 */
+ case XTENSA_INS_CALL4:
+ case XTENSA_INS_CALL8:
+ case XTENSA_INS_CALL12:
+ op->type = RZ_ANALYSIS_OP_TYPE_CALL;
+ op->jump = ctx->insn->address + IMM(0);
+ op->fail = ctx->insn->address + ctx->insn->size;
+ break;
+ case XTENSA_INS_MOVEQZ: /* moveqz */
+ case XTENSA_INS_MOVNEZ: /* movnez */
+ case XTENSA_INS_MOVLTZ: /* movltz */
+ case XTENSA_INS_MOVGEZ: /* movgez */
+ op->type = RZ_ANALYSIS_OP_TYPE_CMOV;
+ break;
+ case XTENSA_INS_ABS: /* abs */
+ case XTENSA_INS_ABS_S:
+ op->type = RZ_ANALYSIS_OP_TYPE_ABS;
+ break;
+ case XTENSA_INS_NEG: /* neg */
+ op->type = RZ_ANALYSIS_OP_TYPE_NULL;
+ break;
+ case XTENSA_INS_SSR: /* ssr */
+ op->type = RZ_ANALYSIS_OP_TYPE_SHR;
+ break;
+ case XTENSA_INS_SSL: /* ssl */
+ op->type = RZ_ANALYSIS_OP_TYPE_SHL;
+ break;
+ case XTENSA_INS_SLLI: /* slli */
+ op->type = RZ_ANALYSIS_OP_TYPE_SHL;
+ break;
+ case XTENSA_INS_SRLI: /* srli */
+ op->type = RZ_ANALYSIS_OP_TYPE_SHR;
+ break;
+ case XTENSA_INS_SSAI: /* ssai */
+ op->type = RZ_ANALYSIS_OP_TYPE_SAR;
+ break;
+ case XTENSA_INS_SLL: /* sll */
+ op->type = RZ_ANALYSIS_OP_TYPE_SHL;
+ break;
+ case XTENSA_INS_SRL: /* srl */
+ op->type = RZ_ANALYSIS_OP_TYPE_SHR;
+ break;
+ }
+}
+
+static int xtensa_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf, int len, RzAnalysisOpMask mask) {
+ XtensaContext *ctx = analysis->plugin_data;
+ if (!xtensa_open(ctx, analysis->cpu, analysis->big_endian)) {
+ goto beach;
+ }
+ if (!xtensa_disassemble(ctx, buf, len, addr)) {
+ goto beach;
+ }
+
+ xtensa_analyze_op(analysis, op, ctx);
+
+ if (mask & RZ_ANALYSIS_OP_MASK_DISASM) {
+ op->mnemonic = rz_str_newf(
+ "%s%s%s",
+ ctx->insn->mnemonic,
+ ctx->insn->op_str[0] ? " " : "",
+ ctx->insn->op_str);
+ }
+
+ if (mask & RZ_ANALYSIS_OP_MASK_ESIL) {
+ xtensa_analyze_op_esil(ctx, op);
+ }
+
+ op->size = ctx->insn->size;
+ op->id = ctx->insn->id;
+ op->addr = addr;
+
+ xtensa_disassemble_fini(ctx);
+ return op->size;
+beach:
+ xtensa_disassemble_fini(ctx);
+ return -1;
+}
+
+RzAnalysisPlugin rz_analysis_plugin_xtensa_cs = {
+ .name = "xtensa",
+ .desc = "Capstone Xtensa analysis plugin",
+ .author = "billow",
+ .license = "LGPL3",
+ .arch = "xtensa",
+ .bits = 8,
+ .op = xtensa_op,
+ .esil = true,
+ .archinfo = xtensa_archinfo,
+ .get_reg_profile = xtensa_get_reg_profile,
+ .init = xtensa_init,
+ .fini = xtensa_fini,
+};
diff --git a/librz/arch/p/arch_xtensa_cs.c b/librz/arch/p/arch_xtensa_cs.c
new file mode 100644
index 00000000000..91bef5cea6f
--- /dev/null
+++ b/librz/arch/p/arch_xtensa_cs.c
@@ -0,0 +1,10 @@
+// SPDX-FileCopyrightText: 2024 billow <billow.fun@gmail.com>
+// SPDX-License-Identifier: LGPL-3.0-only
+
+#include <rz_arch.h>
+#include <deprecated_arch_helper.h>
+
+#include "analysis/analysis_xtensa_cs.c"
+#include "asm/asm_xtensa_cs.c"
+
+RZ_ARCH_PLUGIN_DEFINE_DEPRECATED(xtensa_cs);
diff --git a/librz/arch/p/asm/asm_tricore_cs.c b/librz/arch/p/asm/asm_tricore_cs.c
index 276c7842f9f..ecdeaf36d07 100644
--- a/librz/arch/p/asm/asm_tricore_cs.c
+++ b/librz/arch/p/asm/asm_tricore_cs.c
@@ -106,6 +106,7 @@ static bool fini(void *u) {
RzAsmPlugin rz_asm_plugin_tricore_cs = {
.name = "tricore",
.arch = "tricore",
+ .cpus = "tricore",
.author = "billow",
.license = "BSD",
.bits = 32,
diff --git a/librz/arch/p/asm/asm_xtensa_cs.c b/librz/arch/p/asm/asm_xtensa_cs.c
new file mode 100644
index 00000000000..522cdbb27db
--- /dev/null
+++ b/librz/arch/p/asm/asm_xtensa_cs.c
@@ -0,0 +1,42 @@
+// SPDX-FileCopyrightText: 2024 billow <billow.fun@gmail.com>
+// SPDX-License-Identifier: LGPL-3.0-only
+
+#include <rz_types.h>
+#include <rz_asm.h>
+#include <xtensa/xtensa.h>
+
+static int asm_xtensa_disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) {
+ XtensaContext *ctx = a->plugin_data;
+ if (!xtensa_open(ctx, a->cpu, a->big_endian)) {
+ goto beach;
+ }
+ if (!xtensa_disassemble(ctx, buf, len, a->pc)) {
+ goto beach;
+ }
+
+ rz_asm_op_setf_asm(op,
+ "%s%s%s",
+ ctx->insn->mnemonic,
+ ctx->insn->op_str[0] ? " " : "",
+ ctx->insn->op_str);
+ op->size = ctx->insn->size;
+ xtensa_disassemble_fini(ctx);
+ return op->size;
+beach:
+ xtensa_disassemble_fini(ctx);
+ return -1;
+}
+
+RzAsmPlugin rz_asm_plugin_xtensa_cs = {
+ .name = "xtensa",
+ .license = "LGPL3",
+ .desc = "Capstone Xtensa disassembly plugin",
+ .author = "billow",
+ .arch = "xtensa",
+ .cpus = "esp32,esp32s2,esp8266",
+ .bits = 32,
+ .endian = RZ_SYS_ENDIAN_LITTLE | RZ_SYS_ENDIAN_BIG,
+ .disassemble = asm_xtensa_disassemble,
+ .init = &xtensa_init,
+ .fini = &xtensa_fini,
+};
diff --git a/librz/arch/p_gnu/analysis/analysis_xtensa_gnu.c b/librz/arch/p_gnu/analysis/analysis_xtensa_gnu.c
deleted file mode 100644
index 69c00761cf7..00000000000
--- a/librz/arch/p_gnu/analysis/analysis_xtensa_gnu.c
+++ /dev/null
@@ -1,2079 +0,0 @@
-// SPDX-FileCopyrightText: 2016-2018 pancake <pancake@nopcode.org>
-// SPDX-License-Identifier: LGPL-3.0-only
-
-#include <string.h>
-#include <rz_types.h>
-#include <rz_lib.h>
-#include <rz_asm.h>
-#include <rz_analysis.h>
-
-#include <xtensa/xtensa-isa.h>
-
-#define CM ","
-#define XTENSA_MAX_LENGTH 8
-
-typedef struct {
- xtensa_insnbuf insn_buffer;
- xtensa_insnbuf slot_buffer;
-} XtensaContext;
-
-static bool xtensa_init(void **user) {
- XtensaContext *ctx = RZ_NEW0(XtensaContext);
- rz_return_val_if_fail(ctx, false);
- ctx->insn_buffer = NULL;
- ctx->slot_buffer = NULL;
- *user = ctx;
- return true;
-}
-
-static int xtensa_length(const ut8 *insn) {
- static const int length_table[16] = { 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 8, 8 };
- return length_table[*insn & 0xf];
-}
-
-static inline ut64 xtensa_offset(ut64 addr, const ut8 *buf) {
- ut32 offset = ((buf[0] >> 4) & 0xc) | (((ut32)buf[1]) << 4) | (((ut32)buf[2]) << 12);
- if (offset & 0x80000) {
- return (addr + 4 + offset - 0x100000) & ~3;
- }
- return (addr + 4 + offset) & ~3;
-}
-
-static inline ut64 xtensa_imm18s(ut64 addr, const ut8 *buf) {
- ut32 offset = (buf[0] >> 6) | (((ut32)buf[1]) << 2) | (((ut32)buf[2]) << 10);
- if (offset & 0x20000) {
- return addr + 4 + offset - 0x40000;
- }
- return addr + 4 + offset;
-}
-
-static inline ut64 xtensa_imm6s(ut64 addr, const ut8 *buf) {
- ut8 imm6 = (buf[1] >> 4) | (buf[0] & 0x30);
- return (addr + 4 + imm6);
-}
-
-static inline ut64 xtensa_imm8s(ut64 addr, ut8 imm8) {
- if (imm8 & 0x80) {
- return (addr + 4 + imm8 - 0x100);
- }
- return (addr + 4 + imm8);
-}
-
-static inline ut64 xtensa_imm12s(ut64 addr, const ut8 *buf) {
- ut16 imm12 = (buf[1] >> 4) | (((ut16)buf[2]) << 4);
- if (imm12 & 0x800) {
- return (addr + 4 + imm12 - 0x1000);
- }
- return (addr + 4 + imm12);
-}
-
-typedef void (*XtensaOpFn)(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf);
-
-static void xtensa_null_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- op->type = RZ_ANALYSIS_OP_TYPE_NULL;
-}
-
-static void xtensa_unk_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- op->type = RZ_ANALYSIS_OP_TYPE_UNK;
-}
-
-static void xtensa_mov_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- op->type = RZ_ANALYSIS_OP_TYPE_MOV;
-}
-
-static void xtensa_load_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- op->type = RZ_ANALYSIS_OP_TYPE_LOAD;
-}
-
-static void xtensa_store_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- op->type = RZ_ANALYSIS_OP_TYPE_STORE;
-}
-
-static void xtensa_add_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- op->type = RZ_ANALYSIS_OP_TYPE_ADD;
-}
-
-static void xtensa_sub_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- op->type = RZ_ANALYSIS_OP_TYPE_SUB;
-}
-
-static void xtensa_mul_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- op->type = RZ_ANALYSIS_OP_TYPE_MUL;
-}
-
-static void xtensa_div_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- op->type = RZ_ANALYSIS_OP_TYPE_DIV;
-}
-
-static void xtensa_mod_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- op->type = RZ_ANALYSIS_OP_TYPE_MOD;
-}
-
-static void xtensa_and_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- op->type = RZ_ANALYSIS_OP_TYPE_AND;
-}
-
-static void xtensa_or_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- op->type = RZ_ANALYSIS_OP_TYPE_OR;
-}
-
-static void xtensa_xor_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- op->type = RZ_ANALYSIS_OP_TYPE_XOR;
-}
-
-static void xtensa_shl_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- op->type = RZ_ANALYSIS_OP_TYPE_SHL;
-}
-
-static void xtensa_shr_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- op->type = RZ_ANALYSIS_OP_TYPE_SHR;
-}
-
-static void xtensa_l32r_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- op->type = RZ_ANALYSIS_OP_TYPE_LOAD;
- op->ptr = ((addr + 3) & ~3) + ((buf[2] << 8 | buf[1]) << 2) - 0x40000;
- op->refptr = 4;
-}
-
-static void xtensa_snm0_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- switch ((buf[0] >> 4) & 0xf) {
- case 0x0:
- case 0x1:
- case 0x2:
- case 0x3:
- op->type = RZ_ANALYSIS_OP_TYPE_ILL;
- break;
- case 0x8:
- case 0x9:
- op->type = RZ_ANALYSIS_OP_TYPE_RET;
- break;
- case 0xa:
- op->type = RZ_ANALYSIS_OP_TYPE_UJMP;
- break;
- case 0xc:
- case 0xd:
- case 0xe:
- case 0xf:
- op->type = RZ_ANALYSIS_OP_TYPE_UCALL;
- break;
- default:
- xtensa_unk_op(analysis, op, addr, buf);
- break;
- }
-}
-
-static void xtensa_sync_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- switch ((buf[0] >> 4) & 0xf) {
- case 0x0:
- case 0x1:
- case 0x2:
- case 0x3:
- case 0x8:
- case 0xc:
- case 0xd:
- /* Wait/sync instructions? */
- op->type = RZ_ANALYSIS_OP_TYPE_NULL;
- break;
- default:
- xtensa_unk_op(analysis, op, addr, buf);
- break;
- }
-}
-
-static void xtensa_rfei_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- switch ((buf[0] >> 4) & 0xf) {
- case 0x0:
- switch (buf[1] & 0xf) {
- case 0x0:
- case 0x1:
- case 0x2:
- case 0x4:
- case 0x5:
- op->type = RZ_ANALYSIS_OP_TYPE_RET;
- break;
- default:
- xtensa_unk_op(analysis, op, addr, buf);
- break;
- }
- break;
- case 0x1:
- case 0x2:
- op->type = RZ_ANALYSIS_OP_TYPE_RET;
- break;
- default:
- xtensa_unk_op(analysis, op, addr, buf);
- break;
- }
-}
-
-static void xtensa_st0_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- switch ((buf[1] >> 4) & 0xf) {
- case 0x0:
- xtensa_snm0_op(analysis, op, addr, buf);
- break;
- case 0x1:
- op->type = RZ_ANALYSIS_OP_TYPE_CMOV;
- break;
- case 0x2:
- xtensa_sync_op(analysis, op, addr, buf);
- break;
- case 0x3:
- xtensa_rfei_op(analysis, op, addr, buf);
- break;
- case 0x4:
- op->type = RZ_ANALYSIS_OP_TYPE_TRAP;
- break;
- case 0x5:
- case 0x6:
- case 0x7:
- op->type = RZ_ANALYSIS_OP_TYPE_SWI;
- break;
- case 0x8:
- case 0x9:
- case 0xa:
- case 0xb:
- op->type = RZ_ANALYSIS_OP_TYPE_MOV;
- break;
- default:
- xtensa_unk_op(analysis, op, addr, buf);
- break;
- }
-}
-
-static void xtensa_st1_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- switch ((buf[1] >> 4) & 0xf) {
- case 0x0:
- case 0x1:
- case 0x2:
- case 0x3:
- case 0x4:
- /* Set shift-amount-register */
- op->type = RZ_ANALYSIS_OP_TYPE_NULL;
- /*op->type = RZ_ANALYSIS_OP_TYPE_MOV;*/
- break;
- case 0x6:
- case 0x7:
- op->type = RZ_ANALYSIS_OP_TYPE_IO;
- /*op->type = RZ_ANALYSIS_OP_TYPE_MOV;*/
- break;
- case 0x8:
- op->type = RZ_ANALYSIS_OP_TYPE_SWI;
- break;
- case 0xe:
- case 0xf:
- op->type = RZ_ANALYSIS_OP_TYPE_NULL;
- break;
- default:
- xtensa_unk_op(analysis, op, addr, buf);
- break;
- }
-}
-
-static void xtensa_rt0_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- switch (buf[1] & 0xf) {
- case 0:
- op->type = RZ_ANALYSIS_OP_TYPE_NOT;
- break;
- case 1:
- /*op->type = RZ_ANALYSIS_OP_TYPE_ABS;*/
- op->type = RZ_ANALYSIS_OP_TYPE_MOV;
- break;
- default:
- xtensa_unk_op(analysis, op, addr, buf);
- break;
- }
-}
-
-static void xtensa_tlb_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- switch ((buf[2] >> 4) & 0xf) {
- case 0x3:
- case 0x4:
- case 0x5:
- case 0x6:
- case 0x7:
- case 0xb:
- case 0xc:
- case 0xd:
- case 0xe:
- case 0xf:
- op->type = RZ_ANALYSIS_OP_TYPE_MOV;
- break;
- default:
- xtensa_unk_op(analysis, op, addr, buf);
- break;
- }
-}
-
-static void xtensa_accer_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- switch ((buf[2] >> 4) & 0xf) {
- case 0x0:
- case 0x8:
- op->type = RZ_ANALYSIS_OP_TYPE_IO;
- /*op->type = RZ_ANALYSIS_OP_TYPE_MOV;*/
- break;
- default:
- xtensa_unk_op(analysis, op, addr, buf);
- break;
- }
-}
-
-static void xtensa_imp_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- switch ((buf[1] >> 4) & 0xf) {
- case 0x0:
- case 0x1:
- case 0x2:
- case 0x3:
- case 0x8:
- case 0x9:
- op->type = RZ_ANALYSIS_OP_TYPE_NULL;
- break;
- case 0xe:
- if (((buf[0] >> 4) & 0xf) <= 1) {
- op->type = RZ_ANALYSIS_OP_TYPE_RET;
- } else {
- xtensa_unk_op(analysis, op, addr, buf);
- }
- break;
- default:
- xtensa_unk_op(analysis, op, addr, buf);
- break;
- }
-}
-
-static XtensaOpFn xtensa_rst0_fns[] = {
- xtensa_st0_op,
- xtensa_and_op,
- xtensa_or_op,
- xtensa_xor_op,
- xtensa_st1_op,
- xtensa_tlb_op,
- xtensa_rt0_op,
- xtensa_unk_op,
- xtensa_add_op,
- xtensa_add_op,
- xtensa_add_op,
- xtensa_add_op,
- xtensa_sub_op,
- xtensa_sub_op,
- xtensa_sub_op,
- xtensa_sub_op
-};
-
-static XtensaOpFn xtensa_rst1_fns[] = {
- xtensa_shl_op,
- xtensa_shl_op,
- xtensa_shr_op,
- xtensa_shr_op,
- xtensa_shr_op,
- xtensa_unk_op,
- xtensa_null_op,
- xtensa_accer_op,
- xtensa_shr_op,
- xtensa_shr_op,
- xtensa_shl_op,
- xtensa_shr_op,
- xtensa_mul_op,
- xtensa_mul_op,
- xtensa_unk_op,
- xtensa_imp_op
-};
-
-static XtensaOpFn xtensa_rst2_fns[] = {
- xtensa_and_op,
- xtensa_and_op,
- xtensa_or_op,
- xtensa_or_op,
- xtensa_xor_op,
- xtensa_unk_op,
- xtensa_unk_op,
- xtensa_unk_op,
- xtensa_mul_op,
- xtensa_unk_op,
- xtensa_mul_op,
- xtensa_mul_op,
- xtensa_div_op,
- xtensa_div_op,
- xtensa_mod_op,
- xtensa_mod_op
-};
-
-static void xtensa_rst0_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- xtensa_rst0_fns[(buf[2] >> 4) & 0xf](analysis, op, addr, buf);
-}
-static void xtensa_rst1_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- xtensa_rst1_fns[(buf[2] >> 4) & 0xf](analysis, op, addr, buf);
-}
-
-static void xtensa_rst2_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- xtensa_rst2_fns[(buf[2] >> 4) & 0xf](analysis, op, addr, buf);
-}
-
-static void xtensa_lsc4_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- switch ((buf[2] >> 4) & 0xf) {
- case 0x0:
- xtensa_load_op(analysis, op, addr, buf);
- break;
- case 0x4:
- xtensa_store_op(analysis, op, addr, buf);
- break;
- default:
- xtensa_unk_op(analysis, op, addr, buf);
- break;
- }
-}
-
-static void xtensa_lscx_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- op->family = RZ_ANALYSIS_OP_FAMILY_FPU;
- switch ((buf[2] >> 4) & 0xf) {
- case 0x0:
- case 0x1:
- xtensa_load_op(analysis, op, addr, buf);
- break;
- case 0x4:
- case 0x5:
- xtensa_store_op(analysis, op, addr, buf);
- break;
- default:
- xtensa_unk_op(analysis, op, addr, buf);
- break;
- }
-}
-
-static void xtensa_fp0_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- op->family = RZ_ANALYSIS_OP_FAMILY_FPU;
- switch ((buf[2] >> 4) & 0xf) {
- case 0x0:
- case 0x4:
- op->type = RZ_ANALYSIS_OP_TYPE_ADD;
- break;
- case 0x1:
- case 0x5:
- op->type = RZ_ANALYSIS_OP_TYPE_SUB;
- break;
- case 0x2:
- op->type = RZ_ANALYSIS_OP_TYPE_MUL;
- break;
- case 0x8:
- case 0x9:
- case 0xa:
- case 0xb:
- case 0xc:
- case 0xd:
- case 0xe:
- op->type = RZ_ANALYSIS_OP_TYPE_MOV;
- break;
- case 0xf:
- switch ((buf[0] >> 4) & 0xf) {
- case 0x0:
- case 0x4:
- case 0x5:
- op->type = RZ_ANALYSIS_OP_TYPE_MOV;
- break;
- case 0x1:
- op->type = RZ_ANALYSIS_OP_TYPE_ABS;
- break;
- case 0x6:
- op->type = RZ_ANALYSIS_OP_TYPE_NOT;
- break;
- default:
- xtensa_unk_op(analysis, op, addr, buf);
- break;
- }
- break;
- default:
- xtensa_unk_op(analysis, op, addr, buf);
- break;
- }
-}
-
-static void xtensa_fp1_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- op->family = RZ_ANALYSIS_OP_FAMILY_FPU;
- switch ((buf[2] >> 4) & 0xf) {
- case 0x1:
- case 0x2:
- case 0x3:
- case 0x4:
- case 0x5:
- case 0x6:
- case 0x7:
- op->type = RZ_ANALYSIS_OP_TYPE_CMP;
- break;
- case 0x8:
- case 0x9:
- case 0xa:
- case 0xb:
- case 0xc:
- case 0xd:
- op->type = RZ_ANALYSIS_OP_TYPE_MOV;
- break;
- default:
- xtensa_unk_op(analysis, op, addr, buf);
- break;
- }
-}
-
-static XtensaOpFn xtensa_qrst_fns[] = {
- xtensa_rst0_op,
- xtensa_rst1_op,
- xtensa_rst2_op,
- xtensa_mov_op, /*xtensa_rst3_op,*/
- xtensa_null_op, /*xtensa_extui_op,*/
- xtensa_null_op, /*xtensa_extui_op,*/
- xtensa_unk_op, /*xtensa_cust0_op,*/
- xtensa_unk_op, /*xtensa_cust1_op,*/
- xtensa_lscx_op,
- xtensa_lsc4_op,
- xtensa_fp0_op,
- xtensa_fp1_op,
- xtensa_unk_op,
- xtensa_unk_op,
- xtensa_unk_op,
- xtensa_unk_op
-};
-
-static void xtensa_qrst_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- xtensa_qrst_fns[buf[2] & 0xf](analysis, op, addr, buf);
-}
-
-static XtensaOpFn xtensa_lsai_fns[] = {
- xtensa_load_op,
- xtensa_load_op,
- xtensa_load_op,
- xtensa_unk_op,
- xtensa_store_op,
- xtensa_store_op,
- xtensa_store_op,
- xtensa_null_op, /*xtensa_cache_op,probably not interesting for analysis?*/
- xtensa_unk_op,
- xtensa_load_op,
- xtensa_mov_op,
- xtensa_load_op,
- xtensa_add_op,
- xtensa_add_op,
- xtensa_store_op,
- xtensa_store_op
-};
-
-static void xtensa_lsai_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- xtensa_lsai_fns[(buf[1] >> 4) & 0xf](analysis, op, addr, buf);
-}
-
-static void xtensa_lsci_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- ut8 r = buf[1] >> 4;
- op->family = RZ_ANALYSIS_OP_FAMILY_FPU;
- if ((r & 3) == 0) {
- if (r & 4) {
- xtensa_store_op(analysis, op, addr, buf);
- } else {
- xtensa_load_op(analysis, op, addr, buf);
- }
- } else {
- xtensa_unk_op(analysis, op, addr, buf);
- }
-}
-
-static void xtensa_calln_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- op->type = RZ_ANALYSIS_OP_TYPE_CALL;
- op->fail = addr + op->size;
- op->jump = xtensa_offset(addr, buf);
-}
-
-static void xtensa_b_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- op->type = RZ_ANALYSIS_OP_TYPE_CJMP;
- op->fail = addr + op->size;
- op->jump = xtensa_imm8s(addr, buf[2]);
-}
-
-static void xtensa_si_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- ut8 n = (buf[0] >> 4) & 3;
- ut8 m = (buf[0] >> 6);
- switch (n) {
- case 0:
- op->type = RZ_ANALYSIS_OP_TYPE_JMP;
- op->jump = xtensa_imm18s(addr, buf);
- break;
- case 1:
- op->type = RZ_ANALYSIS_OP_TYPE_CJMP;
- op->fail = addr + op->size;
- op->jump = xtensa_imm12s(addr, buf);
- break;
- case 2:
- xtensa_b_op(analysis, op, addr, buf);
- break;
- case 3:
- switch (m) {
- case 0:
- op->type = RZ_ANALYSIS_OP_TYPE_UPUSH;
- break;
- case 1:
- switch (buf[1] >> 4) {
- case 0:
- case 1:
- xtensa_b_op(analysis, op, addr, buf);
- break;
- case 0x8:
- case 0x9:
- case 0xa:
- op->type = RZ_ANALYSIS_OP_TYPE_CJMP;
- op->fail = addr + op->size;
- op->jump = addr + 4 + buf[2];
- break;
- default:
- xtensa_unk_op(analysis, op, addr, buf);
- break;
- }
- break;
- case 2:
- case 3:
- xtensa_b_op(analysis, op, addr, buf);
- break;
- default:
- xtensa_unk_op(analysis, op, addr, buf);
- break;
- }
- break;
- default:
- xtensa_unk_op(analysis, op, addr, buf);
- break;
- }
-}
-
-static void xtensa_st2n_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- if (buf[0] & 0x80) {
- op->type = RZ_ANALYSIS_OP_TYPE_CJMP;
- op->fail = addr + op->size;
- op->jump = xtensa_imm6s(addr, buf);
- } else {
- op->type = RZ_ANALYSIS_OP_TYPE_MOV;
- }
-}
-
-static void xtensa_st3n_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf) {
- switch ((buf[1] >> 4) & 0xf) {
- case 0x0:
- op->type = RZ_ANALYSIS_OP_TYPE_MOV;
- break;
- case 0xf:
- switch ((buf[0] >> 4) & 0xf) {
- case 0:
- case 1:
- op->type = RZ_ANALYSIS_OP_TYPE_RET;
- break;
- case 2:
- op->type = RZ_ANALYSIS_OP_TYPE_TRAP;
- break;
- case 3:
- op->type = RZ_ANALYSIS_OP_TYPE_NOP;
- break;
- case 6:
- op->type = RZ_ANALYSIS_OP_TYPE_ILL;
- break;
- default:
- xtensa_unk_op(analysis, op, addr, buf);
- break;
- }
- break;
- default:
- xtensa_unk_op(analysis, op, addr, buf);
- break;
- }
-}
-
-static XtensaOpFn xtensa_op0_fns[] = {
- xtensa_qrst_op,
- xtensa_l32r_op,
- xtensa_lsai_op,
- xtensa_lsci_op,
- xtensa_null_op, /*xtensa_mac16_op,*/
- xtensa_calln_op,
- xtensa_si_op,
- xtensa_b_op,
-
- xtensa_load_op,
- xtensa_store_op,
- xtensa_add_op,
- xtensa_add_op,
- xtensa_st2n_op,
- xtensa_st3n_op,
- xtensa_null_op, /*xtensa_xt_format1_op,*/ /*TODO*/
- xtensa_null_op /*xtensa_xt_format2_op*/ /*TODO*/
-};
-
-static inline void sign_extend(st32 *value, ut8 bit) {
- if (*value & (1 << bit)) {
- *value |= 0xFFFFFFFF << bit;
- }
-}
-
-static inline void sign_extend2(st32 *value, ut8 bit1, ut8 bit2, ut8 shift) {
- if (((*value >> bit1) & 1) && ((*value >> bit2) & 1)) {
- *value |= UT32_MAX << (32 - shift);
- }
-}
-
-static void xtensa_check_stack_op(xtensa_isa isa, xtensa_opcode opcode, xtensa_format format,
- size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- st32 imm;
- ut32 dst;
- ut32 src;
-
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer, &dst);
- xtensa_operand_get_field(isa, opcode, 1, format, i, slot_buffer, &src);
- xtensa_operand_get_field(isa, opcode, 2, format, i, slot_buffer, (ut32 *)&imm);
-
- // wide form of addi requires sign extension
- if (opcode == 39) {
- sign_extend(&imm, 7);
- }
-
- // a1 = stack
- if (dst == 1 && src == 1) {
- op->val = imm;
- op->stackptr = -imm;
- op->stackop = RZ_ANALYSIS_STACK_INC;
- }
-}
-
-static void esil_push_signed_imm(RzStrBuf *esil, st32 imm) {
- if (imm >= 0) {
- rz_strbuf_appendf(esil, "0x%x" CM, imm);
- } else {
- rz_strbuf_appendf(
- esil,
- "0x%x" CM
- "0x0" CM
- "-" CM,
- -imm);
- }
-}
-
-static void esil_sign_extend(RzStrBuf *esil, ut8 bit) {
- // check sign bit, and, if needed, apply or mask
-
- ut32 bit_mask = 1 << bit;
- ut32 extend_mask = 0xFFFFFFFF << bit;
-
- rz_strbuf_appendf(
- esil,
- "DUP" CM
- "0x%x" CM
- "&" CM
- "0" CM
- "==,$z,!" CM
- "?{" CM
- "0x%x" CM
- "|" CM
- "}" CM,
- bit_mask,
- extend_mask);
-}
-
-static void esil_load_imm(xtensa_isa isa, xtensa_opcode opcode, xtensa_format format,
- size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- ut32 offset;
- ut32 reg_d;
- ut32 reg_a;
- ut8 sign_extend_bit;
-
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer, ®_d);
- xtensa_operand_get_field(isa, opcode, 1, format, i, slot_buffer, ®_a);
- xtensa_operand_get_field(isa, opcode, 2, format, i, slot_buffer, &offset);
-
- xtensa_regfile dst_rf = xtensa_operand_regfile(isa, opcode, 0);
- xtensa_regfile src_rf = xtensa_operand_regfile(isa, opcode, 1);
-
- // example: l32i a2, a1, 0x10
- // 0x10,a1,+, // address on stack
- // [x], // read data
- // a2, // push data reg
- // = // assign to data reg
-
- ut8 data_size = opcode == 82 ? 2 // l16ui
- : opcode == 83 ? 2 // l16si
- : opcode == 84 ? 4 // l32i
- : opcode == 31 ? 4 // l32i.n
- : 1; // opcode == 86 ? 1 : 1; // l8ui
-
- sign_extend_bit = 0;
-
- switch (opcode) {
- case 84: // l32i
- case 31: // l32i.n
- offset <<= 2;
- break;
- case 83: // l16si
- sign_extend_bit = 15;
- // fallthrough
- case 82:
- // l16ui
- offset <<= 1;
- break;
- }
-
- rz_strbuf_appendf(
- &op->esil,
- "0x%x" CM
- "%s%d" CM
- "+" CM
- "[%d]" CM,
- // offset
- offset,
- // address
- xtensa_regfile_shortname(isa, src_rf),
- reg_a,
- // size
- data_size);
-
- if (sign_extend_bit != 0) {
- esil_sign_extend(&op->esil, sign_extend_bit);
- }
-
- rz_strbuf_appendf(
- &op->esil,
- "%s%d" CM
- "=",
- // data
- xtensa_regfile_shortname(isa, dst_rf),
- reg_d);
-}
-
-static void esil_load_relative(xtensa_isa isa, xtensa_opcode opcode, xtensa_format format,
- size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- ut32 offset;
- st32 dst;
-
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer, (ut32 *)&dst);
- xtensa_operand_get_field(isa, opcode, 1, format, i, slot_buffer, &offset);
-
- xtensa_regfile dst_rf = xtensa_operand_regfile(isa, opcode, 0);
-
- // example: l32r a2, 0x10
- // 0x10,$$,3,+ // l32r address + 3 on stack
- // 0xFFFFFFFC,&, // clear 2 lsb
- // -, // subtract offset
- // [4], // read data
- // a2, // push data reg
- // = // assign to data reg
-
- offset = -((offset | 0xFFFF0000) << 2);
-
- rz_strbuf_appendf(
- &op->esil,
- "0x%x" CM
- "$$" CM
- "3" CM
- "+" CM
- "0xFFFFFFFC" CM
- "&" CM
- "-" CM
- "[4]" CM
- "%s%d" CM
- "=",
- // offset
- offset,
- // data
- xtensa_regfile_shortname(isa, dst_rf),
- dst);
-}
-
-static void esil_add_imm(xtensa_isa isa, xtensa_opcode opcode, xtensa_format format,
- size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- st32 imm;
- ut32 dst;
- ut32 src;
-
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer, &dst);
- xtensa_operand_get_field(isa, opcode, 1, format, i, slot_buffer, &src);
- xtensa_operand_get_field(isa, opcode, 2, format, i, slot_buffer, (ut32 *)&imm);
-
- xtensa_regfile dst_rf = xtensa_operand_regfile(isa, opcode, 0);
- xtensa_regfile src_rf = xtensa_operand_regfile(isa, opcode, 1);
-
- // example: addi a3, a4, 0x01
- // a4,0x01,+,a3,=
-
- // wide form of addi requires sign extension
- if (opcode == 39) {
- sign_extend(&imm, 7);
- }
-
- rz_strbuf_appendf(&op->esil, "%s%d" CM, xtensa_regfile_shortname(isa, src_rf), src);
- esil_push_signed_imm(&op->esil, imm);
- rz_strbuf_appendf(
- &op->esil,
- "+" CM
- "%s%d" CM
- "=",
- xtensa_regfile_shortname(isa, dst_rf),
- dst);
-}
-
-static void esil_store_imm(xtensa_isa isa, xtensa_opcode opcode, xtensa_format format,
- size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
-
- ut32 offset;
- ut32 reg_d;
- ut32 reg_a;
-
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer, ®_d);
- xtensa_operand_get_field(isa, opcode, 1, format, i, slot_buffer, ®_a);
- xtensa_operand_get_field(isa, opcode, 2, format, i, slot_buffer, &offset);
-
- xtensa_regfile dst_rf = xtensa_operand_regfile(isa, opcode, 0);
- xtensa_regfile src_rf = xtensa_operand_regfile(isa, opcode, 1);
-
- // example: s32i a2, a1, 0x10
- // a2, // push data
- // 0x10,a1,+, // address on stack
- // =[x] // write data
-
- ut8 data_size =
- opcode == 453 ? 4 // s32cli
- : opcode == 36 ? 4 // s32i.n
- : opcode == 100 ? 4 // s32i
- : opcode == 99 ? 2 // s16i
- : 1; // opcode == 101 ? 1 : 1; // s8i
-
- switch (opcode) {
- case 100: // s32i
- case 453: // s32cli
- case 36: // s32i.n
- offset <<= 2;
- break;
- case 99: // s16i
- offset <<= 1;
- break;
- }
-
- rz_strbuf_appendf(
- &op->esil,
- "%s%d" CM
- "0x%x" CM
- "%s%d" CM
- "+" CM
- "=[%d]",
- // data
- xtensa_regfile_shortname(isa, dst_rf),
- reg_d,
- // offset
- offset,
- // address
- xtensa_regfile_shortname(isa, src_rf),
- reg_a,
- // size
- data_size);
-}
-
-static void esil_move_imm(xtensa_isa isa, xtensa_opcode opcode, xtensa_format format,
- size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- st32 imm;
- ut32 reg;
-
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer, ®);
- xtensa_operand_get_field(isa, opcode, 1, format, i, slot_buffer, (ut32 *)&imm);
-
- xtensa_regfile rf = xtensa_operand_regfile(isa, opcode, 0);
-
- // sign extension
- // 90: movi
- if (opcode == 90) {
- sign_extend(&imm, 11);
- }
-
- // 33: movi.n
- if (opcode == 33) {
- sign_extend2(&imm, 6, 5, 25);
- }
-
- esil_push_signed_imm(&op->esil, imm);
-
- rz_strbuf_appendf(
- &op->esil,
- "%s%d" CM
- "=",
- xtensa_regfile_shortname(isa, rf),
- reg);
-}
-
-static void esil_move(xtensa_isa isa, xtensa_opcode opcode, xtensa_format format,
- size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- ut32 dst;
- ut32 src;
-
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer, &dst);
- xtensa_operand_get_field(isa, opcode, 1, format, i, slot_buffer, &src);
-
- xtensa_regfile dst_rf = xtensa_operand_regfile(isa, opcode, 0);
- xtensa_regfile src_rf = xtensa_operand_regfile(isa, opcode, 1);
-
- rz_strbuf_appendf(
- &op->esil,
- "%s%d" CM
- "%s%d" CM
- "=",
- xtensa_regfile_shortname(isa, src_rf),
- src,
- xtensa_regfile_shortname(isa, dst_rf),
- dst);
-}
-
-static void esil_move_conditional(xtensa_isa isa, xtensa_opcode opcode, xtensa_format format,
- size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- ut32 dst;
- ut32 src;
- ut32 cond;
-
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer, &dst);
- xtensa_operand_get_field(isa, opcode, 1, format, i, slot_buffer, &src);
- xtensa_operand_get_field(isa, opcode, 2, format, i, slot_buffer, &cond);
-
- xtensa_regfile dst_rf = xtensa_operand_regfile(isa, opcode, 0);
- xtensa_regfile src_rf = xtensa_operand_regfile(isa, opcode, 1);
- xtensa_regfile cond_rf = xtensa_operand_regfile(isa, opcode, 2);
-
- const char *compare_op = "";
-
- switch (opcode) {
- case 91: /* moveqz */
- compare_op = "==,$z";
- break;
- case 92: /* movnez */
- compare_op = "==,$z,!";
- break;
- case 93: /* movltz */
- compare_op = "<";
- break;
- case 94: /* movgez */
- compare_op = ">=";
- break;
- }
-
- // example: moveqz a3, a4, a5
- // 0,
- // a5,
- // ==,
- // ?{,
- // a4,
- // a3,
- // =,
- // }
-
- rz_strbuf_appendf(
- &op->esil,
- "0" CM
- "%s%d" CM
- "%s" CM
- "?{" CM
- "%s%d" CM
- "%s%d" CM
- "=" CM
- "}",
- xtensa_regfile_shortname(isa, cond_rf),
- cond,
- compare_op,
- xtensa_regfile_shortname(isa, src_rf),
- src,
- xtensa_regfile_shortname(isa, dst_rf),
- dst);
-}
-
-static void esil_add_sub(xtensa_isa isa, xtensa_opcode opcode, xtensa_format format,
- size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- ut32 dst;
- ut32 op1;
- ut32 op2;
- bool is_add;
- ut8 shift;
-
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer, &dst);
- xtensa_operand_get_field(isa, opcode, 1, format, i, slot_buffer, &op1);
- xtensa_operand_get_field(isa, opcode, 2, format, i, slot_buffer, &op2);
-
- xtensa_regfile dst_rf = xtensa_operand_regfile(isa, opcode, 0);
- xtensa_regfile op1_rf = xtensa_operand_regfile(isa, opcode, 1);
- xtensa_regfile op2_rf = xtensa_operand_regfile(isa, opcode, 2);
-
- is_add =
- (opcode == 26) ||
- (opcode == 41) ||
- (opcode == 43) ||
- (opcode == 44) ||
- (opcode == 45);
-
- switch (opcode) {
- case 43:
- case 46:
- shift = 1;
- break;
- case 44:
- case 47:
- shift = 2;
- break;
- case 45:
- case 48:
- shift = 3;
- break;
- default:
- shift = 0;
- break;
- }
-
- rz_strbuf_appendf(
- &op->esil,
- "%s%d" CM
- "%d" CM
- "%s%d" CM
- "<<" CM
- "%s" CM
- "%s%d" CM
- "=",
- xtensa_regfile_shortname(isa, op2_rf),
- op2,
- shift,
- xtensa_regfile_shortname(isa, op1_rf),
- op1,
- (is_add ? "+" : "-"),
- xtensa_regfile_shortname(isa, dst_rf),
- dst);
-}
-
-static void esil_branch_compare_imm(xtensa_isa isa, xtensa_opcode opcode,
- xtensa_format format, size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- ut32 cmp_reg;
- // Unsigned immediate operands still fit in st32
- st32 cmp_imm;
- st32 branch_imm;
-
- const char *compare_op = "";
-
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer, &cmp_reg);
- xtensa_operand_get_field(isa, opcode, 1, format, i, slot_buffer, (ut32 *)&cmp_imm);
- xtensa_operand_get_field(isa, opcode, 2, format, i, slot_buffer, (ut32 *)&branch_imm);
-
- xtensa_regfile cmp_rf = xtensa_operand_regfile(isa, opcode, 0);
-
- // TODO: unsigned comparisons
- switch (opcode) {
- case 52: /* beqi */
- compare_op = "==,$z";
- break;
- case 53: /* bnei */
- compare_op = "==,$z,!";
- break;
- case 58: /* bgeui */
- case 54: /* bgei */
- compare_op = ">=";
- break;
- case 59: /* bltui */
- case 55: /* blti */
- compare_op = "<";
- break;
- }
-
- // example: beqi a4, 4, offset
- // a4, // push data reg
- // 0x4, // push imm operand
- // ==,
- // ?{,
- // offset,
- // pc,
- // +=,
- // }
-
- rz_strbuf_appendf(
- &op->esil,
- "%s%d" CM,
- // data reg
- xtensa_regfile_shortname(isa, cmp_rf),
- cmp_reg);
-
- esil_push_signed_imm(&op->esil, cmp_imm);
-
- rz_strbuf_appendf(&op->esil, "%s" CM, compare_op);
- rz_strbuf_appendf(&op->esil, "?{" CM);
-
- // ISA defines branch target as offset + 4,
- // but at the time of ESIL evaluation
- // PC will be already incremented by 3
- esil_push_signed_imm(&op->esil, branch_imm + 4 - 3);
-
- rz_strbuf_appendf(&op->esil, "pc" CM "+=" CM "}");
-}
-
-static void esil_branch_compare(xtensa_isa isa, xtensa_opcode opcode,
- xtensa_format format, size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- ut32 op1_reg;
- ut32 op2_reg;
- st32 branch_imm;
-
- const char *compare_op = "";
-
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer, &op1_reg);
- xtensa_operand_get_field(isa, opcode, 1, format, i, slot_buffer, &op2_reg);
- xtensa_operand_get_field(isa, opcode, 2, format, i, slot_buffer, (ut32 *)&branch_imm);
-
- xtensa_regfile op1_rf = xtensa_operand_regfile(isa, opcode, 0);
- xtensa_regfile op2_rf = xtensa_operand_regfile(isa, opcode, 1);
-
- switch (opcode) {
- case 60: /* beq */
- compare_op = "==,$z";
- break;
- case 61: /* bne */
- compare_op = "==,$z,!";
- break;
- case 62: /* bge */
- case 64: /* bgeu */
- compare_op = ">=";
- break;
- case 63: /* blt */
- case 65: /* bltu */
- compare_op = "<";
- break;
- }
-
- sign_extend(&branch_imm, 7);
- branch_imm += 4 - 3;
-
- // example: beq a4, a3, offset
- // a3, // push op1
- // a4, // push op2
- // ==,
- // ?{,
- // offset,
- // pc,
- // +=,
- // }
-
- rz_strbuf_appendf(
- &op->esil,
- "%s%d" CM
- "%s%d" CM
- "%s" CM
- "?{" CM,
- xtensa_regfile_shortname(isa, op2_rf),
- op2_reg,
- xtensa_regfile_shortname(isa, op1_rf),
- op1_reg,
- compare_op);
-
- esil_push_signed_imm(&op->esil, branch_imm);
-
- rz_strbuf_append(&op->esil, "pc" CM "+=" CM "}");
-}
-
-static void esil_branch_compare_single(xtensa_isa isa, xtensa_opcode opcode,
- xtensa_format format, size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- ut32 op_reg;
- st32 branch_imm;
-
- const char *compare_op = "";
-
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer, &op_reg);
- xtensa_operand_get_field(isa, opcode, 1, format, i, slot_buffer, (ut32 *)&branch_imm);
-
- xtensa_regfile op_rf = xtensa_operand_regfile(isa, opcode, 0);
-
- switch (opcode) {
- case 72: /* beqz */
- case 28: /* beqz.n */
- compare_op = "==,$z";
- break;
- case 73: /* bnez */
- case 29: /* bnez.n */
- compare_op = "==,$z,!";
- break;
- case 74: /* bgez */
- compare_op = ">=";
- break;
- case 75: /* bltz */
- compare_op = "<";
- break;
- }
-
- sign_extend(&branch_imm, 12);
- branch_imm += 4 - 3;
-
- // example: beqz a4, 0, offset
- // 0, // push 0
- // a4, // push op
- // ==,
- // ?{,
- // offset,
- // pc,
- // +=,
- // }
-
- rz_strbuf_appendf(
- &op->esil,
- "0" CM
- "%s%d" CM
- "%s" CM
- "?{" CM,
- xtensa_regfile_shortname(isa, op_rf),
- op_reg,
- compare_op);
-
- esil_push_signed_imm(&op->esil, branch_imm);
-
- rz_strbuf_append(&op->esil, "pc" CM "+=" CM "}");
-}
-
-static void esil_branch_check_mask(xtensa_isa isa, xtensa_opcode opcode,
- xtensa_format format, size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- ut32 op1_reg;
- ut32 op2_reg;
- st32 branch_imm;
-
- const char *compare_op = "";
- char compare_val[4] = "0";
-
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer, &op1_reg);
- xtensa_operand_get_field(isa, opcode, 1, format, i, slot_buffer, &op2_reg);
- xtensa_operand_get_field(isa, opcode, 2, format, i, slot_buffer, (ut32 *)&branch_imm);
-
- xtensa_regfile op1_rf = xtensa_operand_regfile(isa, opcode, 0);
- xtensa_regfile op2_rf = xtensa_operand_regfile(isa, opcode, 1);
-
- switch (opcode) {
- case 69: /* bnall */
- case 66: /* bany */
- compare_op = "==,$z,!";
- break;
- case 68: /* ball */
- case 67: /* bnone */
- compare_op = "==,$z";
- break;
- }
-
- switch (opcode) {
- case 69: /* bnall */
- case 68: /* ball */
- snprintf(
- compare_val,
- sizeof(compare_val),
- "%s%d",
- xtensa_regfile_shortname(isa, op2_rf),
- op2_reg);
- break;
- }
-
- sign_extend(&branch_imm, 7);
- branch_imm += 4 - 3;
-
- // example: bnall a4, a3, offset
- // a4, // push op1
- // a3, // push op2
- // &,
- // a3,
- // ==,!,
- // ?{,
- // offset,
- // pc,
- // +=,
- // }
-
- rz_strbuf_appendf(
- &op->esil,
- "%s%d" CM
- "%s%d" CM
- "&" CM
- "%s%d" CM
- "%s" CM
- "?{" CM,
- xtensa_regfile_shortname(isa, op1_rf),
- op1_reg,
- xtensa_regfile_shortname(isa, op2_rf),
- op2_reg,
- xtensa_regfile_shortname(isa, op2_rf),
- op2_reg,
- compare_op);
-
- esil_push_signed_imm(&op->esil, branch_imm);
-
- rz_strbuf_append(&op->esil, "pc" CM "+=" CM "}");
-}
-
-static void esil_bitwise_op(xtensa_isa isa, xtensa_opcode opcode, xtensa_format format,
- size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- ut32 dst;
- ut32 op1;
- ut32 op2;
- char bop;
-
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer, &dst);
- xtensa_operand_get_field(isa, opcode, 1, format, i, slot_buffer, &op1);
- xtensa_operand_get_field(isa, opcode, 2, format, i, slot_buffer, &op2);
-
- xtensa_regfile dst_rf = xtensa_operand_regfile(isa, opcode, 0);
- xtensa_regfile op1_rf = xtensa_operand_regfile(isa, opcode, 1);
- xtensa_regfile op2_rf = xtensa_operand_regfile(isa, opcode, 2);
-
- switch (opcode) {
- case 49: /* and */
- bop = '&';
- break;
- case 50: /* or */
- bop = '|';
- break;
- case 51: /* xor */
- bop = '^';
- break;
- default:
- bop = '=';
- break;
- }
-
- rz_strbuf_appendf(
- &op->esil,
- "%s%d" CM
- "%s%d" CM
- "%c" CM
- "%s%d" CM
- "=",
- xtensa_regfile_shortname(isa, op1_rf),
- op1,
- xtensa_regfile_shortname(isa, op2_rf),
- op2,
- bop,
- xtensa_regfile_shortname(isa, dst_rf),
- dst);
-}
-
-static void esil_branch_check_bit_imm(xtensa_isa isa, xtensa_opcode opcode, xtensa_format format,
- size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- ut32 src_reg;
- ut32 imm_bit;
- st32 imm_offset;
- ut8 bit_clear;
- ut32 mask;
- const char *cmp_op;
-
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer, &src_reg);
- xtensa_operand_get_field(isa, opcode, 1, format, i, slot_buffer, &imm_bit);
- xtensa_operand_decode(isa, opcode, 1, &imm_bit);
- xtensa_operand_get_field(isa, opcode, 2, format, i, slot_buffer, (ut32 *)&imm_offset);
-
- xtensa_regfile src_rf = xtensa_operand_regfile(isa, opcode, 0);
-
- bit_clear = opcode == 56;
- cmp_op = bit_clear ? "==,$z" : "==,$z,!";
- mask = 1 << imm_bit;
-
- sign_extend(&imm_offset, 7);
- imm_offset += 4 - 3;
-
- // example: bbsi a4, 2, offset
- // a4,
- // mask,
- // &,
- // 0,
- // ==,
- // ?{,
- // offset,
- // pc,
- // +=,
- // }
-
- rz_strbuf_appendf(
- &op->esil,
- "%s%d" CM
- "0x%x" CM
- "&" CM
- "0" CM
- "%s" CM
- "?{" CM,
- xtensa_regfile_shortname(isa, src_rf),
- src_reg,
- mask,
- cmp_op);
-
- esil_push_signed_imm(&op->esil, imm_offset);
-
- rz_strbuf_appendf(
- &op->esil,
- "pc" CM
- "+=" CM
- "}");
-}
-
-static void esil_branch_check_bit(xtensa_isa isa, xtensa_opcode opcode, xtensa_format format,
- size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- ut32 src_reg;
- ut32 bit_reg;
- st32 imm_offset;
-
- ut8 bit_clear;
- const char *cmp_op;
-
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer, &src_reg);
- xtensa_operand_get_field(isa, opcode, 1, format, i, slot_buffer, &bit_reg);
- xtensa_operand_get_field(isa, opcode, 2, format, i, slot_buffer, (ut32 *)&imm_offset);
-
- xtensa_regfile src_rf = xtensa_operand_regfile(isa, opcode, 0);
- xtensa_regfile bit_rf = xtensa_operand_regfile(isa, opcode, 1);
-
- // bbc
- bit_clear = opcode == 70;
- cmp_op = bit_clear ? "==,$z" : "==,$z,!";
-
- sign_extend(&imm_offset, 7);
- imm_offset += 4 - 3;
-
- // example: bbc a4, a2, offset
- // a2,
- // 1,
- // <<,
- // a4,
- // &
- // 0
- // ==,
- // ?{,
- // offset,
- // pc,
- // +=,
- // }
-
- rz_strbuf_appendf(
- &op->esil,
- "%s%d" CM
- "1" CM
- "<<" CM
- "%s%d" CM
- "&" CM
- "0" CM
- "%s" CM
- "?{" CM,
- xtensa_regfile_shortname(isa, bit_rf),
- bit_reg,
- xtensa_regfile_shortname(isa, src_rf),
- src_reg,
- cmp_op);
-
- esil_push_signed_imm(&op->esil, imm_offset);
-
- rz_strbuf_appendf(
- &op->esil,
- "pc" CM
- "+=" CM
- "}");
-}
-
-static void esil_abs_neg(xtensa_isa isa, xtensa_opcode opcode, xtensa_format format,
- size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- ut32 src_reg;
- ut32 dst_reg;
-
- ut8 neg;
-
- xtensa_operand_get_field(isa, opcode, 1, format, i, slot_buffer, &dst_reg);
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer, &src_reg);
-
- xtensa_regfile dst_rf = xtensa_operand_regfile(isa, opcode, 1);
- xtensa_regfile src_rf = xtensa_operand_regfile(isa, opcode, 0);
-
- neg = opcode == 95;
-
- if (!neg) {
- rz_strbuf_appendf(
- &op->esil,
- "0" CM
- "%s%d" CM
- "<" CM
- "?{" CM
- "0" CM
- "%s%d" CM
- "-" CM
- "}" CM
- "0" CM
- "%s%d" CM
- ">=" CM
- "?{" CM
- "%s%d" CM
- "}" CM,
- xtensa_regfile_shortname(isa, src_rf),
- src_reg,
- xtensa_regfile_shortname(isa, src_rf),
- src_reg,
- xtensa_regfile_shortname(isa, src_rf),
- src_reg,
- xtensa_regfile_shortname(isa, src_rf),
- src_reg);
- } else {
- rz_strbuf_appendf(
- &op->esil,
- "0" CM
- "%s%d" CM
- "-" CM,
- xtensa_regfile_shortname(isa, src_rf),
- src_reg);
- }
-
- rz_strbuf_appendf(
- &op->esil,
- "%s%d" CM
- "=" CM,
- xtensa_regfile_shortname(isa, dst_rf),
- dst_reg);
-}
-
-static void esil_call(xtensa_isa isa, xtensa_opcode opcode,
- xtensa_format format, size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- bool call = opcode == 76;
- st32 imm_offset;
-
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer,
- (ut32 *)&imm_offset);
-
- if (call) {
- rz_strbuf_append(
- &op->esil,
- "pc" CM
- "a0" CM
- "=" CM);
- }
-
- sign_extend(&imm_offset, 17);
-
- if (call) {
- imm_offset <<= 2;
- }
-
- imm_offset += 4 - 3;
-
- esil_push_signed_imm(&op->esil, imm_offset);
-
- rz_strbuf_append(&op->esil, "pc" CM "+=");
-}
-
-static void esil_callx(xtensa_isa isa, xtensa_opcode opcode,
- xtensa_format format, size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- bool callx = opcode == 77;
- ut32 dst_reg;
-
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer, &dst_reg);
- xtensa_regfile dst_rf = xtensa_operand_regfile(isa, opcode, 0);
-
- rz_strbuf_appendf(
- &op->esil,
- "%s%d" CM "0" CM "+" CM,
- xtensa_regfile_shortname(isa, dst_rf),
- dst_reg);
-
- if (callx) {
- rz_strbuf_append(
- &op->esil,
- "pc" CM
- "a0" CM
- "=" CM);
- }
-
- rz_strbuf_append(&op->esil, "pc" CM "=");
-}
-
-static void esil_set_shift_amount(xtensa_isa isa, xtensa_opcode opcode,
- xtensa_format format, size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- ut32 src_reg;
-
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer, &src_reg);
- xtensa_regfile src_rf = xtensa_operand_regfile(isa, opcode, 0);
-
- rz_strbuf_appendf(
- &op->esil,
- "%s%d" CM
- "sar" CM
- "=",
- xtensa_regfile_shortname(isa, src_rf),
- src_reg);
-}
-
-static void esil_set_shift_amount_imm(xtensa_isa isa, xtensa_opcode opcode,
- xtensa_format format, size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- ut32 sa_imm;
-
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer, &sa_imm);
- xtensa_operand_decode(isa, opcode, 0, &sa_imm);
-
- rz_strbuf_appendf(
- &op->esil,
- "0x%x" CM
- "sar" CM
- "=",
- sa_imm);
-}
-
-static void esil_shift_logic_imm(xtensa_isa isa, xtensa_opcode opcode,
- xtensa_format format, size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- ut32 reg_dst;
- ut32 reg_src;
- ut32 imm_amount;
-
- const char *shift_op = "";
-
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer, ®_dst);
- xtensa_operand_get_field(isa, opcode, 1, format, i, slot_buffer, ®_src);
- xtensa_operand_get_field(isa, opcode, 2, format, i, slot_buffer, &imm_amount);
- xtensa_operand_decode(isa, opcode, 2, &imm_amount);
-
- xtensa_regfile dst_rf = xtensa_operand_regfile(isa, opcode, 0);
- xtensa_regfile src_rf = xtensa_operand_regfile(isa, opcode, 1);
-
- // srli
- if (opcode == 113) {
- shift_op = ">>";
- } else {
- shift_op = "<<";
- }
-
- rz_strbuf_appendf(
- &op->esil,
- "0x%x" CM
- "%s%d" CM
- "%s" CM
- "%s%d" CM
- "=",
- imm_amount,
- xtensa_regfile_shortname(isa, src_rf),
- reg_src,
- shift_op,
- xtensa_regfile_shortname(isa, dst_rf),
- reg_dst);
-}
-
-static void esil_shift_logic_sar(xtensa_isa isa, xtensa_opcode opcode,
- xtensa_format format, size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- ut32 reg_dst;
- ut32 reg_src;
-
- const char *shift_op = "";
-
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer, ®_dst);
- xtensa_operand_get_field(isa, opcode, 1, format, i, slot_buffer, ®_src);
-
- xtensa_regfile dst_rf = xtensa_operand_regfile(isa, opcode, 0);
- xtensa_regfile src_rf = xtensa_operand_regfile(isa, opcode, 1);
-
- // srl
- if (opcode == 109) {
- shift_op = ">>";
- } else {
- shift_op = "<<";
- }
-
- rz_strbuf_appendf(
- &op->esil,
- "sar" CM
- "%s%d" CM
- "%s" CM
- "%s%d" CM
- "=",
- xtensa_regfile_shortname(isa, src_rf),
- reg_src,
- shift_op,
- xtensa_regfile_shortname(isa, dst_rf),
- reg_dst);
-}
-
-static void esil_extract_unsigned(xtensa_isa isa, xtensa_opcode opcode,
- xtensa_format format, size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- ut32 reg_dst;
- ut32 reg_src;
- ut32 imm_shift;
- ut32 imm_mask;
-
- xtensa_operand_get_field(isa, opcode, 0, format, i, slot_buffer, ®_dst);
- xtensa_operand_get_field(isa, opcode, 1, format, i, slot_buffer, ®_src);
- xtensa_operand_get_field(isa, opcode, 2, format, i, slot_buffer, &imm_shift);
- xtensa_operand_get_field(isa, opcode, 3, format, i, slot_buffer, &imm_mask);
-
- xtensa_regfile dst_rf = xtensa_operand_regfile(isa, opcode, 0);
- xtensa_regfile src_rf = xtensa_operand_regfile(isa, opcode, 1);
-
- ut32 and_mask = (1 << (imm_mask + 1)) - 1;
-
- rz_strbuf_appendf(
- &op->esil,
- "0x%x" CM
- "%s%d" CM
- ">>" CM
- "0x%x" CM
- "&" CM
- "%s%d" CM
- "=",
- imm_shift,
- xtensa_regfile_shortname(isa, src_rf),
- reg_src,
- and_mask,
- xtensa_regfile_shortname(isa, dst_rf),
- reg_dst);
-}
-
-static void analyze_op_esil(xtensa_isa isa, xtensa_opcode opcode, xtensa_format format,
- size_t i, xtensa_insnbuf slot_buffer, RzAnalysisOp *op) {
- switch (opcode) {
- case 26: /* add.n */
- case 41: /* add */
- case 43: /* addx2 */
- case 44: /* addx4 */
- case 45: /* addx8 */
- case 42: /* sub */
- case 46: /* subx2 */
- case 47: /* subx4 */
- case 48: /* subx8 */
- esil_add_sub(isa, opcode, format, i, slot_buffer, op);
- break;
- case 32: /* mov.n */
- esil_move(isa, opcode, format, i, slot_buffer, op);
- break;
- case 90: /* movi */
- case 33: /* movi.n */
- esil_move_imm(isa, opcode, format, i, slot_buffer, op);
- break;
- case 0: /* excw */
- case 34: /* nop.n */
- rz_strbuf_setf(&op->esil, "%s", "");
- break;
- // TODO: s32cli (s32c1i) is conditional (CAS)
- // should it be handled here?
- case 453: /* s32c1i */
- case 36: /* s32i.n */
- case 100: /* s32i */
- case 99: /* s16i */
- case 101: /* s8i */
- esil_store_imm(isa, opcode, format, i, slot_buffer, op);
- break;
- case 27: /* addi.n */
- case 39: /* addi */
- xtensa_check_stack_op(isa, opcode, format, i, slot_buffer, op);
- esil_add_imm(isa, opcode, format, i, slot_buffer, op);
- break;
- case 98: /* ret */
- case 35: /* ret.n */
- rz_strbuf_setf(&op->esil, "a0,pc,=");
- break;
- case 82: /* l16ui */
- case 83: /* l16si */
- case 84: /* l32i */
- case 31: /* l32i.n */
- case 86: /* l8ui */
- esil_load_imm(isa, opcode, format, i, slot_buffer, op);
- break;
- // TODO: s32r
- // l32r is different because it is relative to LITBASE
- // which also may or may not be present
- case 85: /* l32r */
- esil_load_relative(isa, opcode, format, i, slot_buffer, op);
- break;
- case 40: /* addmi */
- break;
- case 49: /* and */
- case 50: /* or */
- case 51: /* xor */
- esil_bitwise_op(isa, opcode, format, i, slot_buffer, op);
- break;
- case 52: /* beqi */
- case 53: /* bnei */
- case 54: /* bgei */
- case 55: /* blti */
- case 58: /* bgeui */
- case 59: /* bltui */
- esil_branch_compare_imm(isa, opcode, format, i, slot_buffer, op);
- break;
- case 56: /* bbci */
- case 57: /* bbsi */
- esil_branch_check_bit_imm(isa, opcode, format, i, slot_buffer, op);
- break;
- case 60: /* beq */
- case 61: /* bne */
- case 62: /* bge */
- case 63: /* blt */
- case 64: /* bgeu */
- case 65: /* bltu */
- esil_branch_compare(isa, opcode, format, i, slot_buffer, op);
- break;
- case 66: /* bany */
- case 67: /* bnone */
- case 68: /* ball */
- case 69: /* bnall */
- esil_branch_check_mask(isa, opcode, format, i, slot_buffer, op);
- break;
- case 70: /* bbc */
- case 71: /* bbs */
- esil_branch_check_bit(isa, opcode, format, i, slot_buffer, op);
- break;
- case 72: /* beqz */
- case 73: /* bnez */
- case 28: /* beqz.n */
- case 29: /* bnez.n */
- case 74: /* bgez */
- case 75: /* bltz */
- esil_branch_compare_single(isa, opcode, format, i, slot_buffer, op);
- break;
- case 78: /* extui */
- esil_extract_unsigned(isa, opcode, format, i, slot_buffer, op);
- break;
- case 79: /* ill */
- rz_strbuf_setf(&op->esil, "%s", "");
- break;
- // TODO: windowed calls?
- case 7: /* call4 */
- break;
- case 76: /* call0 */
- case 80: /* j */
- esil_call(isa, opcode, format, i, slot_buffer, op);
- break;
- case 81: /* jx */
- case 77: /* callx0 */
- esil_callx(isa, opcode, format, i, slot_buffer, op);
- break;
- case 91: /* moveqz */
- case 92: /* movnez */
- case 93: /* movltz */
- case 94: /* movgez */
- esil_move_conditional(isa, opcode, format, i, slot_buffer, op);
- break;
- case 96: /* abs */
- case 95: /* neg */
- esil_abs_neg(isa, opcode, format, i, slot_buffer, op);
- break;
- case 102: /* ssr */
- case 103: /* ssl */
- esil_set_shift_amount(isa, opcode, format, i, slot_buffer, op);
- break;
- case 111: /* slli */
- case 113: /* srli */
- esil_shift_logic_imm(isa, opcode, format, i, slot_buffer, op);
- break;
- case 106: /* ssai */
- esil_set_shift_amount_imm(isa, opcode, format, i, slot_buffer, op);
- break;
- case 107: /* sll */
- case 109: /* srl */
- esil_shift_logic_sar(isa, opcode, format, i, slot_buffer, op);
- break;
- }
-}
-
-static int xtensa_op(RzAnalysis *analysis, RzAnalysisOp *op, ut64 addr, const ut8 *buf_original, int len_original, RzAnalysisOpMask mask) {
- XtensaContext *ctx = (XtensaContext *)analysis->plugin_data;
- if (!op) {
- return 1;
- }
-
- op->size = xtensa_length(buf_original);
- if (op->size > len_original) {
- return 1;
- }
-
- xtensa_op0_fns[(buf_original[0] & 0xf)](analysis, op, addr, buf_original);
-
- ut8 buffer[XTENSA_MAX_LENGTH] = { 0 };
- int len = RZ_MIN(op->size, XTENSA_MAX_LENGTH);
- memcpy(buffer, buf_original, len);
-
- unsigned int i;
- if (!xtensa_default_isa) {
- xtensa_default_isa = xtensa_isa_init(0, 0);
- }
-
- xtensa_opcode opcode;
- xtensa_isa isa = xtensa_default_isa;
- xtensa_format format;
- int nslots;
-
- if (!ctx->insn_buffer) {
- ctx->insn_buffer = xtensa_insnbuf_alloc(isa);
- ctx->slot_buffer = xtensa_insnbuf_alloc(isa);
- }
-
- memset(ctx->insn_buffer, 0, xtensa_insnbuf_size(isa) * sizeof(xtensa_insnbuf_word));
-
- xtensa_insnbuf_from_chars(isa, ctx->insn_buffer, buffer, len);
- format = xtensa_format_decode(isa, ctx->insn_buffer);
-
- if (format == XTENSA_UNDEFINED) {
- return op->size;
- }
-
- nslots = xtensa_format_num_slots(isa, format);
- if (nslots < 1) {
- return op->size;
- }
-
- for (i = 0; i < nslots; i++) {
- xtensa_format_get_slot(isa, format, i, ctx->insn_buffer, ctx->slot_buffer);
- opcode = xtensa_opcode_decode(isa, format, i, ctx->slot_buffer);
-
- if (opcode == 39) { /* addi */
- xtensa_check_stack_op(isa, opcode, format, i, ctx->slot_buffer, op);
- }
-
- if (mask & RZ_ANALYSIS_OP_MASK_ESIL) {
- analyze_op_esil(isa, opcode, format, i, ctx->slot_buffer, op);
- }
- }
-
- return op->size;
-}
-
-static char *get_reg_profile(RzAnalysis *analysis) {
- return rz_str_dup(
- // Assuming call0 ABI
- "# a0 return address\n"
- "# a1 stack pointer\n"
- "# a2-a7 arguments\n"
- "# a2-a5 return value (call0 ABI)\n"
- "# a12-a15 callee-saved (call0 ABI)\n"
- "=PC pc\n"
- "=BP a14\n"
- "=SP a1\n"
- "=A0 a2\n"
- "=A1 a3\n"
- "=A2 a4\n"
- "=A3 a5\n"
- "=A4 a6\n"
- "=A5 a7\n"
- "gpr a0 .32 0 0\n"
- "gpr a1 .32 4 0\n"
- "gpr a2 .32 8 0\n"
- "gpr a3 .32 16 0\n"
- "gpr a4 .32 20 0\n"
- "gpr a5 .32 24 0\n"
- "gpr a6 .32 28 0\n"
- "gpr a7 .32 32 0\n"
- "gpr a8 .32 36 0\n"
- "gpr a9 .32 40 0\n"
- "gpr a10 .32 44 0\n"
- "gpr a11 .32 48 0\n"
- "gpr a12 .32 52 0\n"
- "gpr a13 .32 56 0\n"
- "gpr a14 .32 60 0\n"
- "gpr a15 .32 64 0\n"
-
- // pc
- "gpr pc .32 68 0\n"
-
- // sr
- "gpr sar .32 72 0\n");
-}
-
-static bool xtensa_fini(void *user) {
- XtensaContext *ctx = (XtensaContext *)user;
- if (ctx) {
- RZ_FREE(ctx);
- }
- return true;
-}
-
-RzAnalysisPlugin rz_analysis_plugin_xtensa_gnu = {
- .name = "xtensa",
- .desc = "Xtensa disassembler",
- .license = "LGPL3",
- .arch = "xtensa",
- .bits = 8,
- .esil = true,
- .op = &xtensa_op,
- .init = xtensa_init,
- .fini = xtensa_fini,
- .get_reg_profile = get_reg_profile,
-};
diff --git a/librz/arch/p_gnu/arch_xtensa.c b/librz/arch/p_gnu/arch_xtensa.c
deleted file mode 100644
index 28be737e346..00000000000
--- a/librz/arch/p_gnu/arch_xtensa.c
+++ /dev/null
@@ -1,10 +0,0 @@
-// SPDX-FileCopyrightText: 2024 RizinOrg <info@rizin.re>
-// SPDX-FileCopyrightText: 2024 deroad <wargio@libero.it>
-// SPDX-License-Identifier: LGPL-3.0-only
-
-#include <deprecated_arch_helper.h>
-
-#include "analysis/analysis_xtensa_gnu.c"
-#include "asm/asm_xtensa_gnu.c"
-
-RZ_ARCH_PLUGIN_DEFINE_DEPRECATED(xtensa_gnu);
diff --git a/librz/arch/p_gnu/asm/asm_xtensa_gnu.c b/librz/arch/p_gnu/asm/asm_xtensa_gnu.c
deleted file mode 100644
index 33a0edf173f..00000000000
--- a/librz/arch/p_gnu/asm/asm_xtensa_gnu.c
+++ /dev/null
@@ -1,77 +0,0 @@
-// SPDX-FileCopyrightText: 2016-2018 pancake <pancake@nopcode.org>
-// SPDX-License-Identifier: LGPL-3.0-only
-
-#include <stdio.h>
-#include <stdarg.h>
-#include <string.h>
-
-#include <rz_types.h>
-#include <rz_lib.h>
-#include <rz_util.h>
-#include <rz_asm.h>
-
-#include <common_gnu/disas-asm.h>
-
-#define INSN_BUFFER_SIZE 4
-
-static ut64 offset = 0;
-static RzStrBuf *buf_global = NULL;
-static ut8 bytes[INSN_BUFFER_SIZE];
-
-static int xtensa_buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, ut32 length, struct disassemble_info *info) {
- if (length > INSN_BUFFER_SIZE) {
- length = INSN_BUFFER_SIZE;
- }
- memcpy(myaddr, bytes, length);
- return 0;
-}
-
-static int symbol_at_address(bfd_vma addr, struct disassemble_info *info) {
- return 0;
-}
-
-static void memory_error_func(int status, bfd_vma memaddr, struct disassemble_info *info) {
- //--
-}
-
-DECLARE_GENERIC_PRINT_ADDRESS_FUNC()
-DECLARE_GENERIC_FPRINTF_FUNC()
-
-static int disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) {
- struct disassemble_info disasm_obj;
- buf_global = &op->buf_asm;
- offset = a->pc;
- if (len > INSN_BUFFER_SIZE) {
- len = INSN_BUFFER_SIZE;
- }
- memcpy(bytes, buf, len); // TODO handle thumb
-
- /* prepare disassembler */
- memset(&disasm_obj, '\0', sizeof(struct disassemble_info));
- disasm_obj.disassembler_options = (a->bits == 64) ? "64" : "";
- disasm_obj.buffer = bytes;
- disasm_obj.buffer_length = len;
- disasm_obj.read_memory_func = &xtensa_buffer_read_memory;
- disasm_obj.symbol_at_address_func = &symbol_at_address;
- disasm_obj.memory_error_func = &memory_error_func;
- disasm_obj.print_address_func = &generic_print_address_func;
- disasm_obj.endian = !a->big_endian;
- disasm_obj.fprintf_func = &generic_fprintf_func;
- disasm_obj.stream = stdout;
-
- op->size = print_insn_xtensa((bfd_vma)offset, &disasm_obj);
- if (op->size == -1) {
- rz_asm_op_set_asm(op, "(data)");
- }
- return op->size;
-}
-
-RzAsmPlugin rz_asm_plugin_xtensa_gnu = {
- .name = "xtensa",
- .arch = "xtensa",
- .license = "GPL3",
- .bits = 32,
- .endian = RZ_SYS_ENDIAN_LITTLE | RZ_SYS_ENDIAN_BIG,
- .desc = "XTensa CPU",
- .disassemble = &disassemble
-};
diff --git a/librz/core/cconfig.c b/librz/core/cconfig.c
index 190725e56b7..ea80742fd5d 100644
--- a/librz/core/cconfig.c
+++ b/librz/core/cconfig.c
@@ -510,26 +510,29 @@ static bool cb_asmarch(void *user, void *data) {
RZ_LOG_ERROR("core: asm.arch: cannot find (%s)\n", node->value);
return false;
}
- // we should rz_str_dup here otherwise will crash if any rz_config_set
- // free the old value
- char *asm_cpu = rz_str_dup(rz_config_get(core->config, "asm.cpu"));
+
+ RzConfigNode *asm_cpu_node = rz_config_node_get(core->config, "asm.cpu");
if (core->rasm->cur) {
- const char *newAsmCPU = core->rasm->cur->cpus;
- if (newAsmCPU) {
- if (*newAsmCPU) {
- char *nac = rz_str_dup(newAsmCPU);
- char *comma = strchr(nac, ',');
- if (comma) {
- if (!*asm_cpu || (*asm_cpu && !strstr(nac, asm_cpu))) {
+ const char *cpus = core->rasm->cur->cpus;
+ if (asm_cpu_node) {
+ if (RZ_STR_ISNOTEMPTY(cpus)) {
+ if ((asm_cpu_node->value && strstr(cpus, asm_cpu_node->value) == NULL) || RZ_STR_ISEMPTY(asm_cpu_node->value)) {
+ char *cpu0 = rz_str_dup(cpus);
+ char *comma = strchr(cpu0, ',');
+ if (comma) {
*comma = 0;
- rz_config_set(core->config, "asm.cpu", nac);
}
+
+ if (!*asm_cpu_node->value || (*asm_cpu_node->value && RZ_STR_NE(cpu0, asm_cpu_node->value))) {
+ rz_config_set(core->config, "asm.cpu", cpu0);
+ }
+ free(cpu0);
}
- free(nac);
- } else {
+ } else if (cpus && !*cpus) {
rz_config_set(core->config, "asm.cpu", "");
}
}
+
bits = core->rasm->cur->bits;
if (8 & bits) {
bits = 8;
@@ -587,11 +590,9 @@ static bool cb_asmarch(void *user, void *data) {
// set endian of display to match binary
core->print->big_endian = big_endian;
- rz_asm_set_cpu(core->rasm, asm_cpu);
- free(asm_cpu);
- RzConfigNode *asmcpu = rz_config_node_get(core->config, "asm.cpu");
- if (asmcpu) {
- update_asmcpu_options(core, asmcpu);
+ rz_asm_set_cpu(core->rasm, asm_cpu_node->value);
+ if (asm_cpu_node) {
+ update_asmcpu_options(core, asm_cpu_node);
}
{
int v = rz_analysis_archinfo(core->analysis, RZ_ANALYSIS_ARCHINFO_TEXT_ALIGN);
@@ -614,11 +615,11 @@ static bool cb_asmarch(void *user, void *data) {
rz_core_analysis_cc_init(core);
const char *platform = rz_config_get(core->config, "asm.platform");
- if (asmcpu) {
+ if (asm_cpu_node) {
char *platforms_dir = rz_path_system(RZ_SDB_ARCH_PLATFORMS);
char *cpus_dir = rz_path_system(RZ_SDB_ARCH_CPUS);
- rz_platform_target_index_init(core->analysis->platform_target, node->value, asmcpu->value, platform, platforms_dir);
- rz_platform_profiles_init(core->analysis->arch_target, asmcpu->value, node->value, cpus_dir);
+ rz_platform_target_index_init(core->analysis->platform_target, node->value, asm_cpu_node->value, platform, platforms_dir);
+ rz_platform_profiles_init(core->analysis->arch_target, asm_cpu_node->value, node->value, cpus_dir);
free(cpus_dir);
free(platforms_dir);
}
diff --git a/librz/core/cmd/cmd_print.c b/librz/core/cmd/cmd_print.c
index f49f92fb0b7..4d98685a6b1 100644
--- a/librz/core/cmd/cmd_print.c
+++ b/librz/core/cmd/cmd_print.c
@@ -3212,6 +3212,11 @@ static void disassembly_as_table(RzTable *t, RzCore *core, ut64 addr, int n_inst
static bool core_disassembly(RzCore *core, int n_bytes, int n_instrs, RzCmdStateOutput *state, bool cbytes) {
ut64 offset = rz_core_backward_offset(core, core->offset, &n_instrs, &n_bytes);
+ if (n_bytes == 0) {
+ const int max_op_size = rz_analysis_archinfo(core->analysis, RZ_ANALYSIS_ARCHINFO_MAX_OP_SIZE);
+ n_bytes = max_op_size * n_instrs;
+ }
+
RZ_LOG_VERBOSE("disassembly at: 0x%" PFMT64x " "
"blocksize: %" PFMT32d " "
"n_bytes: %" PFMT32d " "
@@ -3220,6 +3225,7 @@ static bool core_disassembly(RzCore *core, int n_bytes, int n_instrs, RzCmdState
RzCoreDisasmOptions disasm_options = {
.cbytes = cbytes,
};
+
ut8 *buf = malloc(n_bytes + 1);
if (!buf) {
RZ_LOG_ERROR("Failed to allocate memory\n");
diff --git a/subprojects/capstone-next.wrap b/subprojects/capstone-next.wrap
index 002f8f9a571..7c7ae21ede8 100644
--- a/subprojects/capstone-next.wrap
+++ b/subprojects/capstone-next.wrap
@@ -1,6 +1,6 @@
[wrap-git]
url = https://github.com/capstone-engine/capstone.git
-revision = f6f967961b913cf4fc1c6233f6cf42194a0938ca
+revision = 1ecfb5b04235539e0d94cc67b8984347be2f6a73
directory = capstone-next
patch_directory = capstone-next
depth = 1
diff --git a/subprojects/packagefiles/capstone-next/meson.build b/subprojects/packagefiles/capstone-next/meson.build
index 7750c39b12d..d6965e1f6d1 100644
--- a/subprojects/packagefiles/capstone-next/meson.build
+++ b/subprojects/packagefiles/capstone-next/meson.build
@@ -75,6 +75,10 @@ cs_files = [
'arch/TriCore/TriCoreInstPrinter.c',
'arch/TriCore/TriCoreMapping.c',
'arch/TriCore/TriCoreModule.c',
+ 'arch/Xtensa/XtensaDisassembler.c',
+ 'arch/Xtensa/XtensaInstPrinter.c',
+ 'arch/Xtensa/XtensaMapping.c',
+ 'arch/Xtensa/XtensaModule.c',
'cs.c',
'Mapping.c',
'MCInst.c',
@@ -106,6 +110,7 @@ libcapstone_c_args = [
'-DCAPSTONE_HAS_XCORE',
'-DCAPSTONE_HAS_TMS320C64X',
'-DCAPSTONE_HAS_TRICORE',
+ '-DCAPSTONE_HAS_XTENSA',
]
if meson.get_compiler('c').has_argument('-Wmaybe-uninitialized')
diff --git a/test/db/analysis/xtensa b/test/db/analysis/xtensa
index e6e5c4e6ef3..283fab6869b 100644
--- a/test/db/analysis/xtensa
+++ b/test/db/analysis/xtensa
@@ -18,12 +18,12 @@ e asm.arch=xtensa
e asm.bits=32
wx 12c1f0d91140d382c9213d0d093101f5ebc00000cd028c820c034d0d0112e4c0000008312d0cd811c82112c1100df0
af
-afvs
+afvl
EOF
EXPECT=<<EOF
-var int32_t var_ch @ stack - 0xc
-var int32_t var_8h @ stack - 0x8
-var int32_t var_4h @ stack - 0x4
+arg int32_t arg1 @ a2
+arg int32_t arg2 @ a3
+arg int32_t arg3 @ a4
EOF
RUN
@@ -37,7 +37,7 @@ wx 00000000ff11ff1121ffff0df0ff
pD 3 @ 8
EOF
EXPECT=<<EOF
- 0x00000008 l32r a2, 0x00000004 ; [0x4:4]=0x11ff11ff
+ 0x00000008 l32r a2, . 4
EOF
RUN
diff --git a/test/db/cmd/cmd_list b/test/db/cmd/cmd_list
index 428a3fa9516..379bc1c59c7 100644
--- a/test/db/cmd/cmd_list
+++ b/test/db/cmd/cmd_list
@@ -444,7 +444,7 @@ a____ 16 32 64 x86.nasm LGPL3 X86 nasm assembler
a____ 16 32 64 x86.nz LGPL3 x86 handmade assembler
_dA__ 16 xap PD XAP4 RISC (CSR)
_dA__ 32 xcore BSD Capstone XCore disassembler (by pancake)
-_dAe_ 32 xtensa GPL3 XTensa CPU
+_dAe_ 32 xtensa LGPL3 Capstone Xtensa disassembly plugin (by billow)
adA__ 8 z80 GPL3 Zilog Z80 (by condret)
EOF
RUN
@@ -526,7 +526,7 @@ NAME=Print the asm/analysis plugins in JSON
FILE==
CMDS=Laj
EXPECT=<<EOF
-["6502":{"bits":"8 16 ","license":"LGPL3","description":"6502/NES/C64/Tamagotchi/T-1000 CPU","features":"_d"},"8051":{"bits":"8 ","license":"PD","description":"8051 Intel CPU","features":"ad"},"amd29k":{"bits":"32 ","license":"LGPL3","description":"AMD 29k RISC CPU","features":"_d"},"arc":{"bits":"16 32 ","license":"GPL3","description":"Argonaut RISC Core","features":"_d"},"arm":{"bits":"16 32 64","license":"BSD","description":"Capstone ARM disassembler","features":"ad"},"arm.as":{"bits":"16 32 64","license":"LGPL3","description":"as ARM Assembler (use RZ_ARM32_AS and RZ_ARM64_AS environment)","features":"a_"},"avr":{"bits":"8 16 ","license":"LGPL3","description":"AVR Atmel","features":"ad"},"bf":{"bits":"16 32 64","license":"LGPL3","description":"Brainfuck","features":"ad"},"chip8":{"bits":"32 ","license":"LGPL3","description":"Chip8 disassembler","features":"_d"},"cil":{"bits":"16 32 64","license":"LGPL3","description":".NET Common Intermediate Language","features":"_d"},"cr16":{"bits":"16 ","license":"LGPL3","description":"cr16 disassembly plugin","features":"_d"},"cris":{"bits":"32 ","license":"GPL3","description":"Axis Communications 32-bit embedded processor","features":"_d"},"dalvik":{"bits":"32 64","license":"LGPL3","description":"AndroidVM Dalvik","features":"ad"},"dcpu16":{"bits":"16 ","license":"PD","description":"Mojang's DCPU-16","features":"ad"},"ebc":{"bits":"32 64","license":"LGPL3","description":"EFI Bytecode","features":"_d"},"gb":{"bits":"16 ","license":"LGPL3","description":"GameBoy(TM) (z80-like)","features":"ad"},"h8300":{"bits":"16 ","license":"LGPL3","description":"H8/300 disassembly plugin","features":"_d"},"hexagon":{"bits":"32 ","license":"LGPL3","description":"Qualcomm Hexagon (QDSP6) V6","features":"_d"},"hppa":{"bits":"32 ","license":"GPL3","description":"HP PA-RISC","features":"_d"},"i4004":{"bits":"4 ","license":"LGPL3","description":"Intel 4004 microprocessor","features":"_d"},"i8080":{"bits":"8 ","license":"BSD","description":"Intel 8080 CPU","features":"_d"},"java":{"bits":"32 ","license":"LGPL-3","description":"Java bytecode disassembler","features":"ad"},"lanai":{"bits":"32 ","license":"GPL3","description":"LANAI","features":"_d"},"lh5801":{"bits":"8 ","license":"LGPL3","description":"SHARP LH5801 disassembler","features":"_d"},"lm32":{"bits":"32 ","license":"BSD","description":"disassembly plugin for Lattice Micro 32 ISA","features":"_d"},"luac":{"bits":"8 ","license":"LGPL3","description":"luac disassemble plugin","features":"ad"},"m680x":{"bits":"8 32 ","license":"BSD","description":"Capstone M680X Disassembler","features":"_d"},"m68k":{"bits":"32 ","license":"BSD","description":"Capstone M68K disassembler","features":"_d"},"malbolge":{"bits":"32 ","license":"LGPL3","description":"Malbolge Ternary VM","features":"_d"},"mcore":{"bits":"32 ","license":"LGPL3","description":"Motorola MCORE disassembler","features":"_d"},"mcs96":{"bits":"16 ","license":"LGPL3","description":"condrets car","features":"_d"},"mips":{"bits":"16 32 64","license":"BSD","description":"Capstone MIPS disassembler","features":"ad"},"mips.gnu":{"bits":"32 64","license":"GPL3","description":"MIPS CPU","features":"ad"},"msp430":{"bits":"16 ","license":"LGPL3","description":"msp430 disassembly plugin","features":"_d"},"null":{"bits":"16 32 64","license":"MIT","description":"no disassemble","features":"ad"},"or1k":{"bits":"32 ","license":"LGPL3","description":"OpenRISC 1000","features":"_d"},"pic":{"bits":"16 32 ","license":"LGPL3","description":"PIC disassembler","features":"_d"},"ppc":{"bits":"32 64","license":"BSD","description":"Capstone PowerPC disassembler","features":"_d"},"ppc.as":{"bits":"32 64","license":"LGPL3","description":"as PPC Assembler (use RZ_PPC_AS environment)","features":"a_"},"propeller":{"bits":"32 ","license":"LGPL3","description":"propeller disassembly plugin","features":"_d"},"pyc":{"bits":"8 16 ","license":"LGPL3","description":"PYC disassemble plugin","features":"_d"},"riscv":{"bits":"32 64","license":"GPL3","description":"RISC-V","features":"_d"},"riscv.cs":{"bits":"32 64","license":"BSD","description":"Capstone RISCV disassembler","features":"_d"},"rl78":{"bits":"32 ","license":"LGPL3","description":"Renesas RL78 disassembler","features":"ad"},"rsp":{"bits":"32 ","license":"LGPL3","description":"Reality Signal Processor","features":"_d"},"rx":{"bits":"32 ","license":"LGPL3","description":"Renesas RX Family disassembler","features":"_d"},"sh":{"bits":"32 ","license":"LGPL3","description":"SuperH-4 CPU","features":"ad"},"snes":{"bits":"8 16 ","license":"LGPL3","description":"SuperNES CPU","features":"_d"},"sparc":{"bits":"32 64","license":"BSD","description":"Capstone SPARC disassembler","features":"_d"},"sparc.gnu":{"bits":"32 64","license":"GPL3","description":"Scalable Processor Architecture","features":"_d"},"spc700":{"bits":"16 ","license":"LGPL3","description":"spc700, snes' sound-chip","features":"_d"},"sysz":{"bits":"32 64","license":"BSD","description":"SystemZ CPU disassembler","features":"_d"},"tms320":{"bits":"32 ","license":"LGPL3","description":"TMS320 DSP family (c54x,c55x,c55x+,c64x)","features":"_d"},"tricore":{"bits":"32 ","license":"BSD","description":"Siemens TriCore CPU","features":"_d"},"v810":{"bits":"32 ","license":"LGPL3","description":"v810 disassembly plugin","features":"_d"},"v850":{"bits":"32 ","license":"LGPL3","description":"v850 disassembly plugin","features":"_d"},"vax":{"bits":"8 32 ","license":"GPL3","description":"VAX","features":"_d"},"wasm":{"bits":"32 ","license":"MIT","description":"WebAssembly","features":"ad"},"x86":{"bits":"16 32 64","license":"BSD","description":"Capstone X86 disassembler","features":"_d"},"x86.as":{"bits":"16 32 64","license":"LGPL3","description":"Intel X86 GNU Assembler (Use RZ_X86_AS env)","features":"a_"},"x86.nasm":{"bits":"16 32 64","license":"LGPL3","description":"X86 nasm assembler","features":"a_"},"x86.nz":{"bits":"16 32 64","license":"LGPL3","description":"x86 handmade assembler","features":"a_"},"xap":{"bits":"16 ","license":"PD","description":"XAP4 RISC (CSR)","features":"_d"},"xcore":{"bits":"32 ","license":"BSD","description":"Capstone XCore disassembler","features":"_d"},"xtensa":{"bits":"32 ","license":"GPL3","description":"XTensa CPU","features":"_d"},"z80":{"bits":"8 ","license":"GPL3","description":"Zilog Z80","features":"ad"}]
+["6502":{"bits":"8 16 ","license":"LGPL3","description":"6502/NES/C64/Tamagotchi/T-1000 CPU","features":"_d"},"8051":{"bits":"8 ","license":"PD","description":"8051 Intel CPU","features":"ad"},"amd29k":{"bits":"32 ","license":"LGPL3","description":"AMD 29k RISC CPU","features":"_d"},"arc":{"bits":"16 32 ","license":"GPL3","description":"Argonaut RISC Core","features":"_d"},"arm":{"bits":"16 32 64","license":"BSD","description":"Capstone ARM disassembler","features":"ad"},"arm.as":{"bits":"16 32 64","license":"LGPL3","description":"as ARM Assembler (use RZ_ARM32_AS and RZ_ARM64_AS environment)","features":"a_"},"avr":{"bits":"8 16 ","license":"LGPL3","description":"AVR Atmel","features":"ad"},"bf":{"bits":"16 32 64","license":"LGPL3","description":"Brainfuck","features":"ad"},"chip8":{"bits":"32 ","license":"LGPL3","description":"Chip8 disassembler","features":"_d"},"cil":{"bits":"16 32 64","license":"LGPL3","description":".NET Common Intermediate Language","features":"_d"},"cr16":{"bits":"16 ","license":"LGPL3","description":"cr16 disassembly plugin","features":"_d"},"cris":{"bits":"32 ","license":"GPL3","description":"Axis Communications 32-bit embedded processor","features":"_d"},"dalvik":{"bits":"32 64","license":"LGPL3","description":"AndroidVM Dalvik","features":"ad"},"dcpu16":{"bits":"16 ","license":"PD","description":"Mojang's DCPU-16","features":"ad"},"ebc":{"bits":"32 64","license":"LGPL3","description":"EFI Bytecode","features":"_d"},"gb":{"bits":"16 ","license":"LGPL3","description":"GameBoy(TM) (z80-like)","features":"ad"},"h8300":{"bits":"16 ","license":"LGPL3","description":"H8/300 disassembly plugin","features":"_d"},"hexagon":{"bits":"32 ","license":"LGPL3","description":"Qualcomm Hexagon (QDSP6) V6","features":"_d"},"hppa":{"bits":"32 ","license":"GPL3","description":"HP PA-RISC","features":"_d"},"i4004":{"bits":"4 ","license":"LGPL3","description":"Intel 4004 microprocessor","features":"_d"},"i8080":{"bits":"8 ","license":"BSD","description":"Intel 8080 CPU","features":"_d"},"java":{"bits":"32 ","license":"LGPL-3","description":"Java bytecode disassembler","features":"ad"},"lanai":{"bits":"32 ","license":"GPL3","description":"LANAI","features":"_d"},"lh5801":{"bits":"8 ","license":"LGPL3","description":"SHARP LH5801 disassembler","features":"_d"},"lm32":{"bits":"32 ","license":"BSD","description":"disassembly plugin for Lattice Micro 32 ISA","features":"_d"},"luac":{"bits":"8 ","license":"LGPL3","description":"luac disassemble plugin","features":"ad"},"m680x":{"bits":"8 32 ","license":"BSD","description":"Capstone M680X Disassembler","features":"_d"},"m68k":{"bits":"32 ","license":"BSD","description":"Capstone M68K disassembler","features":"_d"},"malbolge":{"bits":"32 ","license":"LGPL3","description":"Malbolge Ternary VM","features":"_d"},"mcore":{"bits":"32 ","license":"LGPL3","description":"Motorola MCORE disassembler","features":"_d"},"mcs96":{"bits":"16 ","license":"LGPL3","description":"condrets car","features":"_d"},"mips":{"bits":"16 32 64","license":"BSD","description":"Capstone MIPS disassembler","features":"ad"},"mips.gnu":{"bits":"32 64","license":"GPL3","description":"MIPS CPU","features":"ad"},"msp430":{"bits":"16 ","license":"LGPL3","description":"msp430 disassembly plugin","features":"_d"},"null":{"bits":"16 32 64","license":"MIT","description":"no disassemble","features":"ad"},"or1k":{"bits":"32 ","license":"LGPL3","description":"OpenRISC 1000","features":"_d"},"pic":{"bits":"16 32 ","license":"LGPL3","description":"PIC disassembler","features":"_d"},"ppc":{"bits":"32 64","license":"BSD","description":"Capstone PowerPC disassembler","features":"_d"},"ppc.as":{"bits":"32 64","license":"LGPL3","description":"as PPC Assembler (use RZ_PPC_AS environment)","features":"a_"},"propeller":{"bits":"32 ","license":"LGPL3","description":"propeller disassembly plugin","features":"_d"},"pyc":{"bits":"8 16 ","license":"LGPL3","description":"PYC disassemble plugin","features":"_d"},"riscv":{"bits":"32 64","license":"GPL3","description":"RISC-V","features":"_d"},"riscv.cs":{"bits":"32 64","license":"BSD","description":"Capstone RISCV disassembler","features":"_d"},"rl78":{"bits":"32 ","license":"LGPL3","description":"Renesas RL78 disassembler","features":"ad"},"rsp":{"bits":"32 ","license":"LGPL3","description":"Reality Signal Processor","features":"_d"},"rx":{"bits":"32 ","license":"LGPL3","description":"Renesas RX Family disassembler","features":"_d"},"sh":{"bits":"32 ","license":"LGPL3","description":"SuperH-4 CPU","features":"ad"},"snes":{"bits":"8 16 ","license":"LGPL3","description":"SuperNES CPU","features":"_d"},"sparc":{"bits":"32 64","license":"BSD","description":"Capstone SPARC disassembler","features":"_d"},"sparc.gnu":{"bits":"32 64","license":"GPL3","description":"Scalable Processor Architecture","features":"_d"},"spc700":{"bits":"16 ","license":"LGPL3","description":"spc700, snes' sound-chip","features":"_d"},"sysz":{"bits":"32 64","license":"BSD","description":"SystemZ CPU disassembler","features":"_d"},"tms320":{"bits":"32 ","license":"LGPL3","description":"TMS320 DSP family (c54x,c55x,c55x+,c64x)","features":"_d"},"tricore":{"bits":"32 ","license":"BSD","description":"Siemens TriCore CPU","features":"_d"},"v810":{"bits":"32 ","license":"LGPL3","description":"v810 disassembly plugin","features":"_d"},"v850":{"bits":"32 ","license":"LGPL3","description":"v850 disassembly plugin","features":"_d"},"vax":{"bits":"8 32 ","license":"GPL3","description":"VAX","features":"_d"},"wasm":{"bits":"32 ","license":"MIT","description":"WebAssembly","features":"ad"},"x86":{"bits":"16 32 64","license":"BSD","description":"Capstone X86 disassembler","features":"_d"},"x86.as":{"bits":"16 32 64","license":"LGPL3","description":"Intel X86 GNU Assembler (Use RZ_X86_AS env)","features":"a_"},"x86.nasm":{"bits":"16 32 64","license":"LGPL3","description":"X86 nasm assembler","features":"a_"},"x86.nz":{"bits":"16 32 64","license":"LGPL3","description":"x86 handmade assembler","features":"a_"},"xap":{"bits":"16 ","license":"PD","description":"XAP4 RISC (CSR)","features":"_d"},"xcore":{"bits":"32 ","license":"BSD","description":"Capstone XCore disassembler","features":"_d"},"xtensa":{"bits":"32 ","license":"LGPL3","description":"Capstone Xtensa disassembly plugin","features":"_d"},"z80":{"bits":"8 ","license":"GPL3","description":"Zilog Z80","features":"ad"}]
EOF
RUN