From 31a6281f3c7793b7c6c00daae3d2fe86e8bcee81 Mon Sep 17 00:00:00 2001 From: Vadim Kaushan Date: Mon, 1 Jul 2019 13:56:44 +0300 Subject: [PATCH] [RISCV] Support RISC-V in getBitcodeMachineKind https://reviews.llvm.org/D52165 --- lld/ELF/InputFiles.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/lld/ELF/InputFiles.cpp b/lld/ELF/InputFiles.cpp index bc7e61072e6422..4b5aa2c106f29b 100644 --- a/lld/ELF/InputFiles.cpp +++ b/lld/ELF/InputFiles.cpp @@ -1086,6 +1086,9 @@ static uint8_t getBitcodeMachineKind(StringRef Path, const Triple &T) { case Triple::ppc64: case Triple::ppc64le: return EM_PPC64; + case Triple::riscv32: + case Triple::riscv64: + return EM_RISCV; case Triple::x86: return T.isOSIAMCU() ? EM_IAMCU : EM_386; case Triple::x86_64: