From 0fd7c8e138db1362e3cba9cdb40403dc7a83364b Mon Sep 17 00:00:00 2001 From: Caleb Zulawski Date: Sun, 19 Feb 2023 12:21:27 -0500 Subject: [PATCH 1/2] Add copy_to_slice --- crates/core_simd/src/vector.rs | 31 ++++++++++++++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-) diff --git a/crates/core_simd/src/vector.rs b/crates/core_simd/src/vector.rs index 51b0d999a81..870c2eefee1 100644 --- a/crates/core_simd/src/vector.rs +++ b/crates/core_simd/src/vector.rs @@ -159,7 +159,7 @@ where /// /// Panics if the slice's length is less than the vector's `Simd::LANES`. /// - /// # Examples + /// # Example /// /// ``` /// # #![feature(portable_simd)] @@ -180,6 +180,35 @@ where unsafe { slice.as_ptr().cast::().read_unaligned() } } + /// Writes a SIMD vector to the first `LANES` elements of a slice. + /// + /// # Panics + /// + /// Panics if the slice's length is less than the vector's `Simd::LANES`. + /// + /// # Example + /// + /// ``` + /// # #![feature(portable_simd)] + /// # #[cfg(feature = "as_crate")] use core_simd::simd; + /// # #[cfg(not(feature = "as_crate"))] use core::simd; + /// # use simd::u32x4; + /// let mut dest = vec![0; 6]; + /// let v = u32x4::from_array([1, 2, 3, 4]); + /// v.copy_to_slice(&mut dest); + /// assert_eq!(&dest, &[1, 2, 3, 4, 0, 0]); + /// ``` + pub fn copy_to_slice(self, slice: &mut [T]) { + assert!( + slice.len() >= LANES, + "slice length must be at least the number of lanes" + ); + // Safety: + // - We've checked the length is sufficient + // - `T` and `Simd` are Copy types. + unsafe { slice.as_mut_ptr().cast::().write_unaligned(self) } + } + /// Performs lanewise conversion of a SIMD vector's elements to another SIMD-valid type. /// /// This follows the semantics of Rust's `as` conversion for casting From 36829ddca7de02b4d8bad31bdfb0fbc83664017b Mon Sep 17 00:00:00 2001 From: Caleb Zulawski Date: Sun, 19 Feb 2023 15:35:36 -0500 Subject: [PATCH 2/2] Check that vectors aren't padded --- crates/core_simd/src/vector.rs | 2 ++ 1 file changed, 2 insertions(+) diff --git a/crates/core_simd/src/vector.rs b/crates/core_simd/src/vector.rs index 870c2eefee1..3e39f1d623c 100644 --- a/crates/core_simd/src/vector.rs +++ b/crates/core_simd/src/vector.rs @@ -174,6 +174,7 @@ where slice.len() >= LANES, "slice length must be at least the number of lanes" ); + assert!(core::mem::size_of::() == LANES * core::mem::size_of::()); // Safety: // - We've checked the length is sufficient. // - `T` and `Simd` are Copy types. @@ -203,6 +204,7 @@ where slice.len() >= LANES, "slice length must be at least the number of lanes" ); + assert!(core::mem::size_of::() == LANES * core::mem::size_of::()); // Safety: // - We've checked the length is sufficient // - `T` and `Simd` are Copy types.