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Rollup merge of #72439 - westernmagic:master, r=Amanieu
NVPTX support for new asm! This PR implements the new `asm!` syntax for the `nvptx64-nvidia-cuda` target. r? @Amanieu
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Original file line number | Diff line number | Diff line change |
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use super::{InlineAsmArch, InlineAsmType}; | ||
use rustc_macros::HashStable_Generic; | ||
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def_reg_class! { | ||
Nvptx NvptxInlineAsmRegClass { | ||
reg16, | ||
reg32, | ||
reg64, | ||
} | ||
} | ||
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impl NvptxInlineAsmRegClass { | ||
pub fn valid_modifiers(self, _arch: InlineAsmArch) -> &'static [char] { | ||
&[] | ||
} | ||
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pub fn suggest_class(self, _arch: InlineAsmArch, _ty: InlineAsmType) -> Option<Self> { | ||
None | ||
} | ||
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pub fn suggest_modifier( | ||
self, | ||
_arch: InlineAsmArch, | ||
_ty: InlineAsmType, | ||
) -> Option<(char, &'static str)> { | ||
None | ||
} | ||
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pub fn default_modifier(self, _arch: InlineAsmArch) -> Option<(char, &'static str)> { | ||
None | ||
} | ||
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pub fn supported_types( | ||
self, | ||
_arch: InlineAsmArch, | ||
) -> &'static [(InlineAsmType, Option<&'static str>)] { | ||
match self { | ||
Self::reg16 => types! { _: I8, I16; }, | ||
Self::reg32 => types! { _: I8, I16, I32, F32; }, | ||
Self::reg64 => types! { _: I8, I16, I32, F32, I64, F64; }, | ||
} | ||
} | ||
} | ||
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def_regs! { | ||
// Registers in PTX are declared in the assembly. | ||
// There are no predefined registers that one can use. | ||
Nvptx NvptxInlineAsmReg NvptxInlineAsmRegClass {} | ||
} |
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